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path: root/src/devices/cpu/mips/mips3drc.cpp
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* You know, if I'm nice enough to give you an accessor, please use it. Aaron Giles2021-04-241-2/+2
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* mip3drc: Fix edge case where a count read in the delay slot would prevent ↵ Aaron Giles2021-04-221-0/+12
| | | | checking the cycle count.
* Eliminate ARRAY_LENGTH template in favor of C++17's std::size AJR2021-02-141-4/+4
| | | | | | | | | | * osdcomm.h: Move definition of EQUIVALENT_ARRAY to coretmpl.h * sharc.cpp, gt64xxx.cpp, ym2413.cpp, gb_lcd.cpp, snes_ppu.cpp: Use STRUCT_MEMBER for save state registration * gio/newport.cpp, megadrive/svp.cpp, nes_ctrl/bcbattle.cpp, arm7.cpp, tms9995.cpp, pckeybrd.cpp, sa1110.cpp, sa1111.cpp, jangou_blitter.cpp, vic4567.cpp: Use std::fill(_n) instead of memset * emucore.h: Remove obsolete typedef
* mips3: Removed depricated DRC flag and add a flag to disable intrablock ↵ Ted Green2020-06-281-1/+5
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* MISP3 DRC: Fix tlbmiss in delay slot (#4979) tedgreen992019-05-051-5/+10
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* MIPS3 DRC: Always set BadVaddr on TLB miss. The TLB handler needs this to ↵ Ted Green2019-04-101-2/+1
| | | | fill in the table. (nw)
* MIPS3: Clean up LL/SC instructions and add debug break to DRC (nw) Ted Green2019-04-091-17/+45
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* MIPS3: Add divide by zero floating point exception (nw) Ted Green2019-04-061-2/+21
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* (nw) Clean up the mess on master Vas Crabb2019-03-261-24/+35
| | | | | | | | | | | | | This effectively reverts b380514764cf857469bae61c11143a19f79a74c5 and c24473ddff715ecec2e258a6eb38960cf8c8e98e, restoring the state at 598cd5227223c3b04ca31f0dbc1981256d9ea3ff. Before pushing, please check that what you're about to push is sane. Check your local commit log and ensure there isn't anything out-of-place before pushing to mainline. When things like this happen, it wastes everyone's time. I really don't need this in a week when real work™ is busting my balls and I'm behind where I want to be with preparing for MAME release.
* Revert "conflict resolution (nw)" andreasnaive2019-03-251-35/+24
| | | | | This reverts commit c24473ddff715ecec2e258a6eb38960cf8c8e98e, reversing changes made to 009cba4fb8102102168ef32870892438327f3705.
* srcclean and cleanup (nw) Vas Crabb2019-01-271-5/+5
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* mips3drc: Fixed block checksumming. Fixes IRIX installer hang on ip225015. ↵ MooglyGuy2019-01-121-24/+35
| | | | [Ryan Holtz]
* mips3.cpp: Started laying the groundwork for cache support, nw mooglyguy2018-11-191-2/+2
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* Revert "MIPS3: Fixup LL/SC opcode operation. (nw)" Ted Green2018-09-011-2/+0
| | | | This reverts commit 326b1f7465540684ffe539099b20b2384f16feb7.
* MIPS3: Fixup LL/SC opcode operation. (nw) Ted Green2018-09-011-0/+2
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* ps2sony: Some basic VU1 support, major file reshuffling, nw mooglyguy2018-07-211-0/+1
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* emumem: Rename direct_read_handler to memory_access_cache. Parametrize the ↵ Olivier Galibert2018-05-111-6/+6
| | | | template on more information (data width, endianness) to make it possible to turn it into an handler cache eventually, and not just a memory block cache. Make it capable of large and unaligned accesses. [O. Galibert]
* don't pass so many naked pointers around (nw) Vas Crabb2018-03-251-283/+264
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* dvdisasm: Overhaul [O. Galibert] Olivier Galibert2017-11-261-2/+7
| | | | | | | | Disassemblers are now independant classes. Not only the code is cleaner, but unidasm has access to all the cpu cores again. The interface to the disassembly method has changed from byte buffers to objects that give a result to read methods. This also adds support for lfsr and/or paged PCs.
* mips3: Cleanup TX4925 implementation. (nw) Ted Green2017-11-061-63/+0
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* mips3: Revert removal of start and end checks as they potentially improve ↵ Ted Green2017-10-291-5/+10
| | | | performance. (nw)
* mips3: Minor MIPS DRC fastram optimization and simplification. (nw) Ted Green2017-10-291-18/+8
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* srcclean (nw) Vas Crabb2017-03-261-66/+66
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* MIPS: initial support for VR5500 and TX4925 CPUs. [R. Belmont] arbee2017-03-251-0/+63
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* mips3 drc : Make sure branch delay slot instruction is not virtual Happy2017-03-241-2/+6
| | | | | instruction before trying to generate code to add it to the block checksum.
* mips3: Retry fixing FPU register aliasing Happy2017-02-261-769/+109
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* srcclean (nw) Vas Crabb2016-11-271-1/+1
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* Changing the MIPS DRC to not use static char buffers when disassembling Nathan Woods2016-11-201-7/+10
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* Introduce u8/u16/u32/u64/s8/s16/s32/s64 Vas Crabb2016-11-191-1/+1
| | | | | | | | | | | | * New abbreviated types are in osd and util namespaces, and also in global namespace for things that #include "emu.h" * Get rid of import of cstdint types to global namespace (C99 does this anyway) * Remove the cstdint types from everything in emu * Get rid of U64/S64 macros * Fix a bug in dps16 caused by incorrect use of macro * Fix debugcon not checking for "do " prefix case-insensitively * Fix a lot of messed up tabulation * More constexpr * Fix up many __names
* Put the declaration of dasmmips3() in a header file Nathan Woods2016-11-161-2/+0
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* converted lot of TRUE/FALSE to real boolean and updated types (nw) Miodrag Milanovic2016-10-221-354/+354
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* NOTICE (TYPE NAME CONSOLIDATION) Miodrag Milanovic2016-10-221-89/+89
| | | | | Use standard uint64_t, uint32_t, uint16_t or uint8_t instead of UINT64, UINT32, UINT16 or UINT8 also use standard int64_t, int32_t, int16_t or int8_t instead of INT64, INT32, INT16 or INT8
* use standard types uintptr_t, char16_t and char32_t instead of FPTR, ↵ Miodrag Milanovic2016-10-221-4/+4
| | | | utf16_char, unicode_char (nw)
* (nw) Updated rom naming/mapping and changed ram instantiation. Ted Green2016-05-251-1/+3
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* iteagle: fix gtfore (nw) cracyc2016-04-281-1/+1
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* Cleanups and version bumpmame0173 Miodrag Milanovic2016-04-271-349/+349
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* NULL->nullptr, instead of DEVCB_NULL use always DEVCB_NOOP to prevent ↵ Miodrag Milanovic2016-04-241-1/+1
| | | | confusion (nw)
* Port Happy's PPC aliasing fix to the MIPS3 DRC, nw therealmogminer@gmail.com2016-04-151-179/+967
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* Back out DMULT/DMULTU change, nw therealmogminer@gmail.com2016-04-131-68/+2
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* Port Happy's branch-and-link fix from mips3 interpreter to DRC, nw therealmogminer@gmail.com2016-04-121-7/+16
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* -mips3: Fixed DMULT and DMULTU in both interpreter and DRC modes. [marathonman] therealmogminer@gmail.com2016-04-121-2/+68
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* Revert software-installed slot/image options when changing software AJR2016-04-041-2/+2
| | | | | - Remove emu.h's stealth include of emuopts.h through mconfig.h; reduce dependency on emuopts.h in other headers and source files. - MCFG_CPU_FORCE_NO_DRC is now a CPU configuration parameter rather than a global one; it still works to override the -drc option setting.
* Make generic VTLB implementation a modern device interface (nw) AJR2016-02-071-3/+3
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* some handmade changes (nw) Miodrag Milanovic2015-12-211-7/+7
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* macro removal INLINE -> static inline (nw) Miodrag Milanovic2015-12-121-2/+2
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* clang-modernize part 3 Miodrag Milanovic2015-12-041-23/+23
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* Rename *.c -> *.cpp in our source (nw) Miodrag Milanovic2015-11-081-0/+3310