| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | MIPS disassembler refinements (mips1, mips3, psx, rsp) | 2025-04-17 | 1 | -75/+83 | |
| | | | | | | | | | * Change hexadecimal prefix from $ to 0x ($ means something else in MIPS assembler syntax) and omit for small numbers * mips1, mips3, psx: Use shorthand mnemonics bal, beqz(l), bnez(l), li, move, neg, negu, not where applicable * mips1, mips3, psx: Add delay slot to jr ra for stepping out * mips1, mips3: Remove invalid instructions from other MIPS cores and use .word syntax for invalid instructions * mips3: Fix field spacing for some instructions | ||||
| * | Debugger feature improvements | 2022-03-27 | 1 | -13/+16 | |
| | | | | | | | | | - Add 'gbt' and 'gbf' debugger commands to step until a true or false conditional branch has been detected. - Update over 100 of the disassemblers in MAME to output a new STEP_COND flag for all conditional branches. Besides being used for execution of the new 'gbt' and 'gbf' commands, this flag also now helps the debugger 'out' command to properly handle conditional return instructions. - Remove STEP_OVER from many instructions that aren't actually subroutine calls (e.g. DJNZ on Z80). A 'gni' debugger command (go next instruction) has been added to accommodate some of the misuse. - Add instruction flag support to several more disassemblers that lacked them entirely (e.g. st62xx) - Don't pass over delay slots for debugging in ASAP core | ||||
| * | mips1dsm: address is only 26 bits (nw) | 2019-08-05 | 1 | -2/+2 | |
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| * | r3000: call it like it is (nw) | 2018-11-06 | 1 | -0/+382 | |
