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* Build fixes (nw) AJR2017-11-261-0/+1
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* dvdisasm: Overhaul [O. Galibert] Olivier Galibert2017-11-261-59/+34
| | | | | | | | Disassemblers are now independant classes. Not only the code is cleaner, but unidasm has access to all the cpu cores again. The interface to the disassembly method has changed from byte buffers to objects that give a result to read methods. This also adds support for lfsr and/or paged PCs.
* wtf (nw) Vas Crabb2017-07-111-1/+1
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* fixup (nw) Vas Crabb2017-06-291-5/+5
| | | | | | * can't use opram when program and opcodes are not related in the slightest * check for disabled side-effects! * better reflection of 4289 timings for performing program read/write
* MCS-40 and INTELLEC 4/MOD 40 updates: Vas Crabb2017-06-291-87/+60
| | | | | | | | | | | | * Make disassembler/debugger use syntax closer to what ASL accepts * Use 2D lookup to make debugger tables more compact * Allow 4-bit registers to be set independently * Save state fixes * Implement WPM/RPM instructions * Expose some signals from a 4008/4009 or 4289 * Implement RAM read/write mechanism for INTELLEC 4/MOD 40 - Can test with S and D commands in monitor * Connect INTELLEC 4/MOD 40 paper tape run output to RTS on RS232 port
* Rewrote 4004 core and disassembler: Vas Crabb2017-06-271-0/+189
* Renamed to MCS-40. * Emulated 8-clock instruction cycle, interruptible at any point. * Converted TEST input to an input line. * Added SYNC and CM output lines. * Added support for 4040 CY output, logical operations, extended registers, ROM banking and disassembly. * Made I/O space mapping more flexible to support the variety of peripherals available. * Notable missing features are 4040 interrupt and halt, and "program memory" space.