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path: root/src/devices/cpu/hmcs40/hmcs40op.cpp
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* hmcs40: add hmcs46/hmcs47 hap2024-09-251-1/+5
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* hmcs400: add irq controller hap2024-09-191-1/+1
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* hmcs400: add i/o ports hap2024-09-181-9/+9
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* hmcs400: fill in most of the opcodes hap2024-09-161-10/+9
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* hmcs400: add opcode placeholders hap2024-09-161-18/+18
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* hmcs400: add cpu skeleton device hap2024-09-161-1/+1
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* eturtles: add game speed control hap2022-08-141-0/+4
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* hmcs40: block interrupt after conditional jump hap2022-08-131-17/+9
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* added MM76 disassembler and preliminary PPS-4/1 MCU core [hap] hap2021-02-261-1/+1
| | | | | | New machines marked as NOT_WORKING ---------------------------------- Electronic Master Mind (Invicta) [hap, Sean Riddle]
* hmcs40: change stack op (nw) hap2020-04-231-6/+14
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* hmcs40: simplify internal timer (nw) hap2020-04-231-3/+4
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* New machines marked as NOT_WORKING hap2020-04-221-1/+1
| | | | | ---------------------------------- Executive Chess [hap, Sean Riddle]
* Revert "Revert "Merge branch 'master' of https://github.com/mamedev/mame"" Firehawke2017-12-131-2/+2
| | | | This reverts commit 54155441e9ba9941e85d80c4834a66376a11e791.
* Revert "Merge branch 'master' of https://github.com/mamedev/mame" Firehawke2017-12-131-2/+2
| | | | | This reverts commit f537428e5a40ba6dde8ca9bf0fe9ae6b1f189ac4, reversing changes made to 0d70d798107d4e4e8fb9f230410aeb1e888d65c5.
* get rid of legacy BITSWAP* (nw) Vas Crabb2017-12-131-2/+2
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* emumem: API change [O. Galibert] Olivier Galibert2017-11-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * direct_read_data is now a template which takes the address bus shift as a parameter. * address_space::direct<shift>() is now a template method that takes the shift as a parameter and returns a pointer instead of a reference * the address to give to {read|write}_* on address_space or direct_read_data is now the address one wants to access Longer explanation: Up until now, the {read|write}_* methods required the caller to give the byte offset instead of the actual address. That's the same on byte-addressing CPUs, e.g. the ones everyone knows, but it's different on the word/long/quad addressing ones (tms, sharc, etc...) or the bit-addressing one (tms340x0). Changing that required templatizing the direct access interface on the bus addressing granularity, historically called address bus shift. Also, since everybody was taking the address of the reference returned by direct(), and structurally didn't have much choice in the matter, it got changed to return a pointer directly. Longest historical explanation: In a cpu core, the hottest memory access, by far, is the opcode fetching. It's also an access with very good locality (doesn't move much, tends to stay in the same rom/ram zone even when jumping around, tends not to hit handlers), which makes efficient caching worthwhile (as in, 30-50% faster core iirc on something like the 6502, but that was 20 years ago and a number of things changed since then). In fact, opcode fetching was, in the distant past, just an array lookup indexed by pc on an offset pointer, which was updated on branches. It didn't stay that way because more elaborate access is often needed (handlers, banking with instructions crossing a bank...) but it still ends up with a frontend of "if the address is still in the current range read from pointer+address otherwise do the slowpath", e.g. two usually correctly predicted branches plus the read most of the time. Then the >8 bits cpus arrived. That was ok, it just required to do the add to a u8 *, then convert to a u16/u32 * and do the read. At the asm level, it was all identical except for the final read, and read_byte/word/long being separate there was no test (and associated overhead) added in the path. Then the word-addressing CPUs arrived with, iirc, the tms cpus used in atari games. They require, to read from the pointer, to shift the address, either explicitely, or implicitely through indexing a u16 *. There were three possibilities: 1- create a new read_* method for each size and granularity. That amounts to a lot of copy/paste in the end, and functions with identical prototypes so the compiler can't detect you're using the wrong one. 2- put a variable shift in the read path. That was too expensive especially since the most critical cpus are byte-addressing (68000 at the time was the key). Having bit-adressing cpus which means the shift can either be right or left depending on the variable makes things even worse. 3- require the caller to do the shift himself when needed. The last solution was chosen, and starting that day the address was a byte offset and not the real address. Which is, actually, quite surprising when writing a new cpu core or, worse, when using the read/write methods from the driver code. But since then, C++ happened. And, in particular, templates with non-type parameters. Suddendly, solution 1 can be done without the copy/paste and with different types allowing to detect (at runtime, but systematically and at startup) if you got it wrong, while still generating optimal code. So it was time to switch to that solution and makes the address parameter sane again. Especially since it makes mucking in the rest of the memory subsystem code a lot more understandable.
* hmcs40: fix possible issue with irq/lpu (nw) hap2017-05-121-1/+1
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* Remove emu.h from headers (nw) Olivier Galibert2017-02-111-0/+1
| | | | | | | | | | | | Per Vas' request. If the compile fails for you (i'm thinking osx and windows native debuggers here in particular), add '#include "emu.h"' as first include of the cpp files that fail. Due to our use of precompilation and forced inclusion, emu.h must be included as the very first non-comment thing we do if we want to be sure msvc compiles are identical to gcc/clang ones. Doing it directly instead of through an include increases the correctness probability by a magnitude.
* change some of my files to use abbreviated integer types (nw) hap2017-01-161-14/+14
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* NOTICE (TYPE NAME CONSOLIDATION) Miodrag Milanovic2016-10-221-14/+14
| | | | | Use standard uint64_t, uint32_t, uint16_t or uint8_t instead of UINT64, UINT32, UINT16 or UINT8 also use standard int64_t, int32_t, int16_t or int8_t instead of INT64, INT32, INT16 or INT8
* hh_hmcs40: updated cpacman svg by Rik hap2016-04-261-5/+5
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* hmcs40: REDD/SEDD param is only 2 bits hap2016-04-091-2/+2
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* reverting: Miodrag Milanovic2016-01-201-1/+1
| | | | | | | SHA-1: 1f90ceab075c4869298e963bf0a14a0aac2f1caa * tags are now strings (nw) fix start project for custom builds in Visual Studio (nw)
* tags are now strings (nw) Miodrag Milanovic2016-01-161-1/+1
| | | | fix start project for custom builds in Visual Studio (nw)
* Rename *.c -> *.cpp in our source (nw) Miodrag Milanovic2015-11-081-0/+681