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* h8500: Add mode control and EPROM variant types AJR2021-06-201-1/+2
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* emumem: A little more speedup. cache and specific change syntax, and are ↵ Olivier Galibert2020-05-251-3/+1
| | | | | | | | | | | | | | | | not pointers anymore [O. Galibert] The last(?) two changes are: - Add a template parameter to everything (theoretically the address space width, in practice a level derived from it to keep as much compatibility between widths as possible) so that the shift size becomes a constant. - Change the syntax of declaring and initializing the caches and specifics so that they're embedded in the owner device. Solves lifetime issues and also removes one indirection (looking up the base dispatch pointer through the cache/specific pointer).
* Add H8/500 disassembler and skeleton CPU device family AJR2020-04-041-0/+151
alesis_qs.cpp: Document XTALs; replace legacy MCFG in comments (nw) picno.cpp: Replace legacy MCFG in comments (nw)