| Commit message (Collapse) | Author | Age | Files | Lines |
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generator, interrupt controller/Extended intelligent I/O service, I/O port, Programmable Pulse Generator, reload timer and UART.
CPU core exposes the RMW line for onboard devices.
Log messages will contain the address of the start of the instruction, rather than the next byte the CPU is about to fetch.
Added INT9/INT addr16 & INT addr24 software interrupt instructions.
Fixed INCW @RWx & DECW @RWx instruction length
Added missing fetch of immediate value in MOV @RWx + RW7, #imm8.
Rewrote Tomy Prin-C keyboard handling and pen to use new onboard devices, substantially increasing the reload timer 0 frequency as it's now correctly waiting for 0x7530 underflows with reload = 0x37f at startup.
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* sony_news.xml: Added proper compatibility flags for different
generations.
* cpu/pic16x8x: This is very much a derivative work.
* cpu/tms32025.cpp: Allow stack push/pop to be inlined.
* tecmo/bombjack.cpp: Avoid needing to remove and replace devices in
machine configuration.
* Various other cleanup.
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- Support INT #vct8, LSL A, R0 and FILSWI instructions
- Support many more EA-type instruction modes
- Prevent MOVS(W)I and FILS(W)I from clobbering RW0 if it lies within the destination range
* mt80s: Add adequate amount of RAM to address map
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- Make CPUs pass interrupt return PC as a second argument to standard_irq_callback
- Add interrupt return PC to "Stopped at interrupt" message produced by debugger 'gint' command
- Add messages to trace logs whenever interrupts are accepted
- Attempt to step over interrupt routines for applicable debugger commands
- Eliminate standard_irq_callback_member wrapper method
- Update many CPU cores to invoke standard_irq_callback at the start of or during interrupt processing, rather than at the end or when the input line changes
- Remove IRQ callbacks for some input lines that never cause interrupts
- mb88xx, mcs48: Add IRQ callbacks for internal interrupts
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-layouts: Started cleaning up fruit machine layouts to reduce bloat.
-Fixed a few miscellaneous Coverity errors.
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- Emulate many more opcodes
- Add interrupt callback for debugger
- Correct disassembly of MOVW io, A
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- Add helper functions for increment and decrement operations and short direct banking
- Rationalize use of temporary variables
- Modify only lowest 8 bits of accumulator for XOR A, #imm8
- Perform a 16-bit rather than 8-bit write for MOVW @RLx + #disp8, A
- Use SSB instead of USB for @RW3 or @RW7 addressing when S flag is set
- Fix numerous flag calculations
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- Emulate various additional instructions and modes
- Fix banking for direct addressing mode
- Fix semantics of CLRB and number of bytes consumed by SETB
- Fix mistake with calculating N and Z flags for SUB and CMP and writing incorrect result for SUB
- Use INC(W)(L) A and DEC(W)(L) A pseudo-operations in disassembly
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- Fix bug in CPU core advancing PC by one too many bytes when executing ADDL A, RLn
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utility functions [R. Belmont]
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mb9061x: Implemented timers 0 and 1, including external event counter mode [R. Belmont]
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princ now runs for a few seconds then enables Timer 0 (not yet implemented) and waits for it.
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princ now does what looks like a palette upload and waits for a timer interrupt.
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and emulation (nw)
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hasn't copied any code. (nw)
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Many more instructions are supported, including prefixes.
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