| Commit message (Collapse) | Author | Age | Files | Lines |
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ui/info.cpp, imagedev/cassette.cpp: Deal with UTF-8 strings as a distint
type.
ui/inputmap.cpp, debugger/qt/dasmwindow.cpp, debugger/qt/mainwindow.cpp,
sound/coreaudio_sound.cpp, cpu/drcbec.cpp, mit/tx0_v.cpp,
konami/3dom2.cpp: machine/mc68328.cpp, cpu/mips/mips1.cpp,
cpu/mips/r4000.cpp, cpu/romp, machine/cammu.cpp, machine/ns32081.cpp:
Avoid arithmetic between different enum types.
dec/pdp1.cpp, konami/firebeat.cpp, mit/tx0.cpp, sound/lc7535.cpp,
sound/spkrdev.cpp: Avoid arithmetic between enum and floating point.
gaelco/gaelco3d_m.cpp: Fixed deprecated uses of volatile variables.
sound/discrete.h: Avoid comparing enum to floatint point.
ui/toolbar.ipp: Don't use UTF-8 qualifier on pure ASCII strings, just
assume char is ASCII-like.
cpu/unsp: Use default constructor for compiler_state.
sgi/pm2_mmu.cpp: Avoid conflict between file static access and
identically named function in unistd.h.
osd/interface/audio.h: Provide an explicit constructor.
util/server_http_impl.hpp: Fixed uninitialised class member warning.
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* cpu/drcbec.cpp: Work around older clang that doesn't support the
floating point environment access pragma.
* machine/i8251.cpp, emu/audio_effects/reverb.cpp: Fixed uninitialised
data accesses.
* sega/model2.cpp: Use 8251 ready output line status rather than
pretending to be able to read the status register asynchronously.
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environment when calling out to C code. (#14934)
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thrown, use C99 nearbyint/nearbyintf.
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cpu/drcbec.cpp: Added support for invariant code, and removed a bunch of
crud that shouldn't be there.
cpu/drcbeut.cpp: Added support for invariant code; simplified DRC label
list class (only used by C back-end).
cpu/drcuml.cpp: Added support for invariant code blocks.
cpu/drcbearm64.cpp, cpu/drcbex64.cpp, cpu/drcbex86.cpp: Added support
for invariant code blocks, and made helper code invariant.
cpu/drcbec.cpp: Added support for invariant code blocks.
cpu/e132xs, cpu/powerpc: Made static helper code invariant.
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cpu/drcbex64.cpp: Also added LZCNT implementation using x86 LZCNT
instruction and optimised the BSR-based implementation.
cpu/e132xs: Use bit field extract instructions.
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* cpu/drcbex64.cpp: Simplified and ptimised flag calculations for rotate
instructions.
* cpu/drcbex64.cpp, cpu/drcbex86.cpp: Mask flags when setting via
SETFLGS or RESTORE to avoid possible buffer overrun, slightly
optimised SETFLGS with an immediate operand.
* cpu/drcbex64.cpp, cpu/drcbex86.cpp: Optimised FCMP when only the
unordered flags is required.
* drcbearm64.cpp, drcbec.cpp: Fixed default floating point rounding mode
not applying after RESTORE.
* drcbearm64.cpp: Optimised generated code for SETFLGS a little.
* docs: Documented a few more UML instructions.
-sound/l7a1045_l6028_dsp_a.cpp: More plausible loop point calculation.
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* cpu/drcbearm64.cpp: Use bfxil to save an instruction for smae cases of
CARRY and ROLINS.
* cpu/drcbec.cpp: Fixed code for ROLC that played fast and loose with
integer promotion, producing incorrect results for some
compilers/targets.
* cpu/uml.cpp: Truncate immediate operands for CARRY.
* docs: Documented a few more UML instructions.
-igs/igs_m027xa.cpp: Got rid of some stuff carried over from
igs_m027.cpp that no games on this platform seem to use.
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arithmetic.
-cpu/drcbex64.cpp: Fixed some cases where GETFLGS would produce
incorrect results when the destination is not a UML register
permanently assigned to a host register.
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-docs: Documented several DRC UML shift/rotate instructions.
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* cpu/drcbearm64.cpp: Fixed ROLAND, ROLINS and CARRY clobbering the
shift input when it's a a register.
* cpu/drcbex86.cpp: Fixed DROLINS clobbering source in I0 and
miscalculating flags when destination is I0.
* cpu/uml.h: Removed assertion that's no longer valid.
* cpu/drcbearm64.cpp: Added minimal operand swizzling to allow AND, OR
and XOR to work without the simplifier.
* cpu/drcbex64.cpp: Optimised shift operations slightly.
* cpu/drcbec.cpp: Added stub implementations for TEST with no flag
outputs to allow running with simplifier disabled.
* cpu/drcbec.cpp: Implemented DREADM/DWRITEM with byte size access.
* cpu/drcbec.cpp: Store pointer to address space directly in instruction
stream.
* cpu/drcbearm64.cpp: Removed some special cases for situations the
simplifier deals with for ROLAND and ROLINS.
* cpu/drcbec.cpp: Added some actual detail to error messages on
encountering unexpected instructions.
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* cpu/drcbec.cpp: Interpret index operand for load/store instructions as
a signed value for consistency with other back-ends.
* cpu/drcbec.cpp: Honour alignment rules when packing immediate values.
* cpu/drcbex64.cpp: Don't special-case SEXT with an immediate source -
the simplifier takes care of this.
* cpu/drcbex86.cpp: Be explicit about preserving flags in load/store
instructions.
* docs: Added a couple more UML data movement instructions.
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* cpu/uml.cpp: Fixed some cases where simplifying multiplication
instructons incorrectly changed output flags.
* cpu/drcbex64.cpp: Fixed some cases where a ROLC/RORC with zero shift
count could incorrectly clear the carry flag.
* cpu/drcbex86.cpp: Made 64-bit ROLC/RORC with zero bit count preserve
the carry flag.
* cpu/drcbec.cpp: Fixed FSMOV/FDMOV turning things that look like
signalling NaNs into quiet NaNs on i686.
* cpu/drcbex64.cpp: Greatly reduced copy/paste in the code generation
for multiply instructions.
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* cpu/drcbec.cpp: Don't clear carry flag on a zero-bit rotate through
carry.
* cpu/drcbex86.cpp: Don't clear carry flag on a word-sized zero-bit
rotate through carry (64-bit case is more involved).
* cpu/drcbex64.cpp: Removed code for another special case of ROLAND that
the simplifier deals with.
-konami/ksys573.cpp, bus/pccard/linflash.cpp: Corrected "Gacha Gachamp".
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namespaces.
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handling.
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* Build all native back-ends if any native back-end is enabled so errors
caused by changing interfaces can be found faster.
* cpu/drcbeut.cpp: Moved resolved member function stuff to a place where
it can be shared by back-ends.
* cpu/drcbearm64.cpp: Use ubfx instruction to extract unordered flag.
* cpu/drcbearm64.cpp, cpu/drcbex64.cpp: Bypass trampolines when calling
get map variable value and debugger instruction hook functions.
* cpu/drcbearm64.cpp: Moved some internal helpers that don't need to be
members to anonymous namespace.
* cpu/drcbearm64.cpp: Added a comment with some info to help when
debugging generated code.
* cpu/drcbec.cpp: Put code in the drc namespace.
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This wasn't added to the DRC implementations when it was added to the
address space classes.
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count. (#13232)
* cpu/drcbec.cpp, cpu/drcbearm64.cpp, cpu/drcbex64.cpp, cpu/drcbex86.cpp: Calculate NZ flags for shifts/rotates by 0 bits.
* cpu/drcbex86.cpp: Fixed flag calculation for 64-bit multiplication when result is zero.
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fix build error
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* cpu/drcbex86.cpp: Clear top half of iregs on loads to I0-I3, fix LOADS sign extension, and fixed FLOAD/FSTORE data size.
* cpu/drcbex64.cpp: Use appropriate register size for LOAD.
* cpu/drcbec.cpp: Fix parameter sizes for READM/WRITEM, and clear upper half of registers after 32-bit operations.
* cpu/uml.cpp: Fixed definition for FSREAD/FSWRITE and FDREAD/FDWRITE, and fixed READM/WRITEM simplification.
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* cpu/uml.cpp: Added BREAK, SETFLGS, MULSLW and MULULW opcodes.
* cpu/uml.cpp: Limit range of immediate shift count arguments for consistency.
* cpu/uml.cpp: Fix simplification of multiplication and division operations.
* cpu/drcbec.cpp: Added more methods of accessing OP_CARRY.
* cpu/drcbec.cpp: Fixed flag calculation for BSWAP and MULS opcodes.
* cpu/drcbec.cpp: Made calculation for shift and rotation opcodes consistent.
* cpu/drcbec.cpp: Return mapvar register ID instead of value for mapvars.
* cpu/drcbex64.cpp, cpu/drcbex86.cpp: Fixed bugs in various opcodes to make them behave like the C backend.
* cpu/drcbex64.cpp: Fixed SAVE, RESTORE and SETFMOD.
* cpu/powerpc: Implement MULLWx and MULLWOx using the new MULSLW opcode.
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the limit.
* This makes it easier to see that you’ve hit the limit and MAME isn't
just ignoring your keystrokes.
-emu/inpttype.ipp: Restored tabulation.
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- Add mul_16x16 inline function to perform a signed 16x16-bit multiplication with 32-bit result. This was moved from cpu/e132xs to unite it with the analogous 32x32 operations.
- Add rotl_32, rotr_32, rotl_64 and rotr_64 inline functions to perform 32-bit and 64-bit circular shifts in either direction by the specified number of places, modulo 32 or 64. It is anticipated that these will eventually be replaced by standard functions in C++20's <bit> header, and so they have been given similar signatures and semantics (which are also validity-checked).
- Remove LSL, LSR, ROL and ROR macros from cpu/arm and cpu/arm7 to ameliorate unnecessary obfuscation.
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* osdcomm.h: Move definition of EQUIVALENT_ARRAY to coretmpl.h
* sharc.cpp, gt64xxx.cpp, ym2413.cpp, gb_lcd.cpp, snes_ppu.cpp: Use STRUCT_MEMBER for save state registration
* gio/newport.cpp, megadrive/svp.cpp, nes_ctrl/bcbattle.cpp, arm7.cpp, tms9995.cpp, pckeybrd.cpp, sa1110.cpp, sa1111.cpp, jangou_blitter.cpp, vic4567.cpp: Use std::fill(_n) instead of memset
* emucore.h: Remove obsolete typedef
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functions to tell to another person who spent minutes trying to find the functions, and we refer to such functions as swapping just about everywhere else in the codebase, nw
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* Move around the debugger hooks to get a small but measurable performance increase
* Remove emucore from external tools
* Improve performance of DSP16 interpreter a little by generating six variants of execution loop
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Use standard uint64_t, uint32_t, uint16_t or uint8_t instead of UINT64, UINT32, UINT16 or UINT8
also use standard int64_t, int32_t, int16_t or int8_t instead of INT64, INT32, INT16 or INT8
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utf16_char, unicode_char (nw)
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to inline functions (nw)
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and floating-point registers. [Ville Linde]
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and string_format
Update MAME to use new function
Instantiate ODR-used static constant members
Make some of the UI code more localisable
Remove use of retired functions in tools
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