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path: root/src/devices/cpu/bcp/dp8344.cpp
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* emu/devcb.h: Eliminated the need to call resolve() on callbacks. (#11333) Vas Crabb2023-06-171-16/+0
| | | | | | | | | | | | Read callbacks now need a default return value supplied at construction. Replaced isnull() with isunset() which tells you if the callback wasn't configured rather than whether it isn't safe to call. Enabled validation of device callbacks (it seems it was disabled at some point, probably accidentally). Device callbacks and object finders now implement the same interface for resolution.
* dp8344.cpp: Remove erroneous fallthrough AJR2021-01-301-1/+2
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* Enable GCC implicit fallthrough warning. Vas Crabb2020-11-151-1/+1
| | | | | | I've guessed whether break or [[fallthrough]] is appropriate. In cases where it looked particularly suspicious, I added a FIXME comment. All of these changes should be reviewed by someone familiar with the code.
* dp8344: Simulate data loopback; misc. tweaks and fixes AJR2020-09-211-54/+116
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* emumem: A little more speedup. cache and specific change syntax, and are ↵ Olivier Galibert2020-05-251-13/+10
| | | | | | | | | | | | | | | | not pointers anymore [O. Galibert] The last(?) two changes are: - Add a template parameter to everything (theoretically the address space width, in practice a level derived from it to keep as much compatibility between widths as possible) so that the shift size becomes a constant. - Change the syntax of declaring and initializing the caches and specifics so that they're embedded in the owner device. Solves lifetime issues and also removes one indirection (looking up the base dispatch pointer through the cache/specific pointer).
* appease vs2019_clang with llvm 10.0 smf-2020-04-251-2/+2
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* dp8344: Disable side effects with certain opcodes; implement halt on reset (nw) AJR2019-12-031-35/+43
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* dp8344: Add timer interrupt (nw) AJR2019-12-021-7/+7
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* dp8344: Emulate timer (nw) AJR2019-12-021-10/+28
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* dp8344: Improve register logging (nw) AJR2019-12-021-11/+78
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* dp8344: Fix return address for LCALL (nw) AJR2019-12-021-0/+1
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* dp8344: Split into two device types (only nominally different for now) (nw) AJR2019-12-011-3/+26
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* dp8344: Fix EI and DI for EXX and RET instructions (nw) AJR2019-12-011-2/+2
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* dp8344: SHL uses a bit count of 0-7, not 1-8 (nw) AJR2019-12-011-1/+2
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* dp8344: Fix bizarre coding mistake (nw) AJR2019-12-011-2/+2
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* dp8344: Unconditional RET only takes 2 T-states (nw) AJR2019-12-011-3/+9
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* dp8344: Fix accidental fallthrough (nw) AJR2019-12-011-0/+1
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* dp8344: Add preliminary execution core AJR2019-12-011-77/+739
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* dp8344: Minor points (nw) AJR2019-07-061-1/+1
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* dp8344: Preliminary remote interface (nw) AJR2019-07-061-8/+98
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* bcpdasm: Correct some instruction decodings and formats (nw) AJR2019-06-221-3/+2
| | | | dp8344: Tweak register display (nw)
* Add disassembler and skeleton device for DP8344 Biphase Communications Processor AJR2019-06-221-0/+1290