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path: root/src/devices/cpu/arm7/arm7.cpp
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* Eliminate ARRAY_LENGTH template in favor of C++17's std::size AJR2021-02-141-15/+31
| | | | | | | | | | * osdcomm.h: Move definition of EQUIVALENT_ARRAY to coretmpl.h * sharc.cpp, gt64xxx.cpp, ym2413.cpp, gb_lcd.cpp, snes_ppu.cpp: Use STRUCT_MEMBER for save state registration * gio/newport.cpp, megadrive/svp.cpp, nes_ctrl/bcbattle.cpp, arm7.cpp, tms9995.cpp, pckeybrd.cpp, sa1110.cpp, sa1111.cpp, jangou_blitter.cpp, vic4567.cpp: Use std::fill(_n) instead of memset * emucore.h: Remove obsolete typedef
* srcclean in preparation for branching release Vas Crabb2021-01-241-1/+1
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* -arm7: Moved WinCE call logging into a separate .hxx file. [Ryan Holtz] Ryan Holtz2021-01-011-1055/+1
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* -arm7: Added optional logging for Windows CE calls. [Ryan Holtz] Ryan Holtz2020-12-311-14/+1128
| | | | | | -uda1344: Added skeleton audio device for Philips UDA13444 Codec. [Ryan Holtz] -sa1111: Hooked up basic L3 audio transceiver support. [Ryan Holtz]
* srcclean for 0.227 Vas Crabb2020-12-271-1/+1
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* -arm7: Fixed the build. [Ryan Holtz] Ryan Holtz2020-12-261-8/+8
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* -arm7: Added rudimentary TLB support. Allows HP Jornada 720 to boot further. ↵ Ryan Holtz2020-12-261-114/+452
| | | | [Ryan Holtz]
* New machines marked as NOT_WORKING Ryan Holtz2020-12-241-126/+80
| | | | | | | | | | | | | ------------------ Hewlett-Packard Jornada 720 [Ryan Holtz] * arm7: Fixed interaction between instruction prefetching with the MMU enabled. [Ryan Holtz] * sa111: Added skeleton device for Intel SA-1111 Microprocessor Companion Chip. [Ryan Holtz] * sed1356: Added skeleton device for Epson/Seiko SED1356 video controller. [Ryan Holtz] * sa1110: Various cleanups. Added rudimentary SSP module support. [Ryan Holtz]
* -arm7: Added placeholder devices for PXA250 and PXA270, and corrected PXA255 ↵ MooglyGuy2020-06-221-2/+21
| | | | | | | | CPU ID. [Ryan Holtz] -pxa255: Added preliminary support for RTC, clock, and power management registers. [Ryan Holtz] -zaurus: Added correct dumps for SL-5500 model. Renamed existing SL-5500 model to suspected model (SL-C500). [Ryan Holtz]
* finally retired the READ8/16/32/64 and WRITE8/16/32/64 macros (nw) Ivan Vangelista2020-06-181-7/+7
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* emumem: A little more speedup. cache and specific change syntax, and are ↵ Olivier Galibert2020-05-251-6/+6
| | | | | | | | | | | | | | | | not pointers anymore [O. Galibert] The last(?) two changes are: - Add a template parameter to everything (theoretically the address space width, in practice a level derived from it to keep as much compatibility between widths as possible) so that the shift size becomes a constant. - Change the syntax of declaring and initializing the caches and specifics so that they're embedded in the owner device. Solves lifetime issues and also removes one indirection (looking up the base dispatch pointer through the cache/specific pointer).
* iphone2g wip (nw) (#6226) Melissa Goad2020-01-291-3/+45
| | | | | | | | | | | | * iphone2g wip (nw) * fixup * fixup * fixup * iphone2g: hacky spi and non-existent timers (nw)
* srcclean, manual adjustments (nw) Vas Crabb2020-01-261-9/+9
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* -arm7: Added debug print ability for hapyfsh2. [Ryan Holtz] MooglyGuy2020-01-141-0/+194
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* -arm7: Switched to using logmacro, and disabled logging by default, nw MooglyGuy2020-01-051-46/+55
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* -arm710t: Fixed CPUID value in order to make psion5mx happy. [Ryan Holtz] MooglyGuy2020-01-021-1/+0
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* -arm7: Added ARM710T variant subclass. [Ryan Holtz] mooglyguy2020-01-021-0/+11
| | | | -psion5: Added skeleton driver for the Psion 5mx. [Ninji, Ryan Holtz]
* gdbstub: added new GDB stub debugger (#5456) Ramiro Polla2019-08-111-0/+2
| | | | | | | | | | | | * gdbstub: added new GDB stub debugger This debugger can be used to connect to an external debugger that communicates using the GDB Remote Serial Protocol, such as GDB itself or many other GDB frontends. Currently i386 (ct486), arm7 (gba), and ppc (pmac6100) are supported. * gdbstub: enable GDB stub debugger in mac and windows builds
* -6525tpi, 6532riot: Removed MCFG and old devcb accessors, nw mooglyguy2018-08-101-0/+10
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* Wow. I can't believe I missed this. (nw) Melissa Goad2018-07-151-1/+1
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* Add a driver for the original iPhone. (#3742) Melissa Goad2018-07-151-14/+37
| | | * Add ARM1176JZF-S CPU device and a driver for the original iPhone.
* emumem: Rename direct_read_handler to memory_access_cache. Parametrize the ↵ Olivier Galibert2018-05-111-2/+11
| | | | template on more information (data width, endianness) to make it possible to turn it into an handler cache eventually, and not just a memory block cache. Make it capable of large and unaligned accesses. [O. Galibert]
* Reshuffle some stuff: Vas Crabb2018-03-281-2/+2
| | | | | | * Move around the debugger hooks to get a small but measurable performance increase * Remove emucore from external tools * Improve performance of DSP16 interpreter a little by generating six variants of execution loop
* don't pass so many naked pointers around (nw) Vas Crabb2018-03-251-2/+2
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* pgm2 / arm9 : ensure savestates work from commandline (eg launching with ↵ David Haywood2018-01-041-0/+36
| | | | -state 0) tag driver as supporting states.
* arm7: revert previous changes, explicit masking and rotating was unneeded ↵ MetalliC2017-12-251-15/+6
| | | | | | | | | | | (except for POP {Rlist} which is correct), handle v5 behavior (lsb address bit is ignored in 16bit loads) in arm946es_cpu_device::arm7_cpu_read16 instead, manually handle v4 and v5 difference for LDRSH signed halfword load. note: it looks like all? v5 cores ignore least significant address bit during 16bit loads, so we should add something like virtual uint32_t arm7_cpu_read16(uint32_t addr) override { return base_class::arm7_cpu_read16(addr & ~1)}; into theirs class declaration.
* Revert "Revert "Merge branch 'master' of https://github.com/mamedev/mame"" Firehawke2017-12-131-20/+18
| | | | This reverts commit 54155441e9ba9941e85d80c4834a66376a11e791.
* Revert "Merge branch 'master' of https://github.com/mamedev/mame" Firehawke2017-12-131-18/+20
| | | | | This reverts commit f537428e5a40ba6dde8ca9bf0fe9ae6b1f189ac4, reversing changes made to 0d70d798107d4e4e8fb9f230410aeb1e888d65c5.
* igs036 seems to be derived from a 946 type core based on using MPU not MMU, ↵ David Haywood2017-12-111-20/+18
| | | | change it to be such.
* arm7: fix unaligned 16-bit loads Vas Crabb2017-11-301-6/+6
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* emumem: API change [O. Galibert] Olivier Galibert2017-11-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * direct_read_data is now a template which takes the address bus shift as a parameter. * address_space::direct<shift>() is now a template method that takes the shift as a parameter and returns a pointer instead of a reference * the address to give to {read|write}_* on address_space or direct_read_data is now the address one wants to access Longer explanation: Up until now, the {read|write}_* methods required the caller to give the byte offset instead of the actual address. That's the same on byte-addressing CPUs, e.g. the ones everyone knows, but it's different on the word/long/quad addressing ones (tms, sharc, etc...) or the bit-addressing one (tms340x0). Changing that required templatizing the direct access interface on the bus addressing granularity, historically called address bus shift. Also, since everybody was taking the address of the reference returned by direct(), and structurally didn't have much choice in the matter, it got changed to return a pointer directly. Longest historical explanation: In a cpu core, the hottest memory access, by far, is the opcode fetching. It's also an access with very good locality (doesn't move much, tends to stay in the same rom/ram zone even when jumping around, tends not to hit handlers), which makes efficient caching worthwhile (as in, 30-50% faster core iirc on something like the 6502, but that was 20 years ago and a number of things changed since then). In fact, opcode fetching was, in the distant past, just an array lookup indexed by pc on an offset pointer, which was updated on branches. It didn't stay that way because more elaborate access is often needed (handlers, banking with instructions crossing a bank...) but it still ends up with a frontend of "if the address is still in the current range read from pointer+address otherwise do the slowpath", e.g. two usually correctly predicted branches plus the read most of the time. Then the >8 bits cpus arrived. That was ok, it just required to do the add to a u8 *, then convert to a u16/u32 * and do the read. At the asm level, it was all identical except for the final read, and read_byte/word/long being separate there was no test (and associated overhead) added in the path. Then the word-addressing CPUs arrived with, iirc, the tms cpus used in atari games. They require, to read from the pointer, to shift the address, either explicitely, or implicitely through indexing a u16 *. There were three possibilities: 1- create a new read_* method for each size and granularity. That amounts to a lot of copy/paste in the end, and functions with identical prototypes so the compiler can't detect you're using the wrong one. 2- put a variable shift in the read path. That was too expensive especially since the most critical cpus are byte-addressing (68000 at the time was the key). Having bit-adressing cpus which means the shift can either be right or left depending on the variable makes things even worse. 3- require the caller to do the shift himself when needed. The last solution was chosen, and starting that day the address was a byte offset and not the real address. Which is, actually, quite surprising when writing a new cpu core or, worse, when using the read/write methods from the driver code. But since then, C++ happened. And, in particular, templates with non-type parameters. Suddendly, solution 1 can be done without the copy/paste and with different types allowing to detect (at runtime, but systematically and at startup) if you got it wrong, while still generating optimal code. So it was time to switch to that solution and makes the address parameter sane again. Especially since it makes mucking in the rest of the memory subsystem code a lot more understandable.
* dvdisasm: Overhaul [O. Galibert] Olivier Galibert2017-11-261-76/+7
| | | | | | | | Disassemblers are now independant classes. Not only the code is cleaner, but unidasm has access to all the cpu cores again. The interface to the disassembly method has changed from byte buffers to objects that give a result to read methods. This also adds support for lfsr and/or paged PCs.
* srcclean (nw) Vas Crabb2017-11-261-6/+6
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* Coverity fix (nw) arbee2017-11-201-0/+1
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* typo fix (nw) arbee2017-11-191-1/+1
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* arm7: Flesh out ARM946ES, add movable DTCM and ITCM support. [R. Belmont] arbee2017-11-191-1/+297
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* arm7: add support for high vector option, fixed v5 BLX to save the return ↵ arbee2017-11-151-1/+2
| | | | address in R14 [R. Belmont]
* dumped internal IGS036 rom for Oriental Legend 2 [Morten Shearman Kirkegaard ↵ David Haywood2017-11-061-0/+15
| | | | | | | | | | and Peter Wilhelmsen] started adding some devices to the driver to support it [David Haywood] derived IGS036 type in ARM7/9 core, because it seems like mmu could be different, and there are probably other internal devices [David Haywood] fixed(?) BLX (LO) thumb opcode in ARM7/9 core, was storing a return address that skipped the following opcode [David Haywood] I think there might still be ARM9 issues.
* Fix ARM7_BE and ARM7 MMU regressions. (nw) mooglyguy2017-10-251-14/+23
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* -arm7: Added rudimentary instruction prefetch buffer. Fixes GBA NES Classics ↵ mooglyguy2017-10-231-9/+148
| | | | games. [Ryan Holtz]
* (nw) srcclean - please use UTF-8 for source files, stuff that isn't valid ↵ Vas Crabb2017-09-241-16/+16
| | | | UTF-8 will be nuked, and cleaning it up by hand is annoying
* -arm7: Various changes: [Ryan Holtz] MooglyGuy2017-09-021-115/+114
| | | | | * Added ARM946ES variant. * Fixed up CPU ID values.
* This is too contentious, please put it up for review Vas Crabb2017-08-011-3/+3
| | | | | | Revert "Changes to debugger memory address translation" This reverts commit bb0964f9a284b15851773f5428bd602ca01cc28b.
* Changes to debugger memory address translation AJR2017-08-011-3/+3
| | | | | | - memory_translate now returns an address space number rather a boolean flag, permitting addresses in part of one space to map to an entirely different space. This is primarily intended to help MCUs which have blocks of internal memory that can be dynamically remapped, but may also allow for more accurate emulation of MMUs that drive multiple external address spaces, since the old limit of four address spaces per MAME device has been lifted. - memory_translate has also been made a const method, in spite of a couple of badly behaved CPU cores that can't honestly treat it as one. - The (read|write)_(byte|word|dword|qword|memory|opcode) accessors have been transferred from debugger_cpu to device_memory_interface, with somewhat modified arguments corresponding to the translate function it calls through to if requested.
* make device_memory_interface slightly less of a special case, use a typedef ↵ Vas Crabb2017-07-101-2/+2
| | | | to avoid nested templates everywhere (nw)
* dimemory: Lift the cap on the number of address spaces per device [O. Galibert] Olivier Galibert2017-07-031-1/+8
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* Move static data out of devices into the device types. This is a ↵ Vas Crabb2017-05-141-23/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | significant change, so please pay attention. The core changes are: * Short name, full name and source file are no longer members of device_t, they are part of the device type * MACHINE_COFIG_START no longer needs a driver class * MACHINE_CONFIG_DERIVED_CLASS is no longer necessary * Specify the state class you want in the GAME/COMP/CONS line * The compiler will work out the base class where the driver init member is declared * There is one static device type object per driver rather than one per machine configuration Use DECLARE_DEVICE_TYPE or DECLARE_DEVICE_TYPE_NS to declare device type. * DECLARE_DEVICE_TYPE forward-declares teh device type and class, and declares extern object finders. * DECLARE_DEVICE_TYPE_NS is for devices classes in namespaces - it doesn't forward-declare the device type. Use DEFINE_DEVICE_TYPE or DEFINE_DEVICE_TYPE_NS to define device types. * These macros declare storage for the static data, and instantiate the device type and device finder templates. The rest of the changes are mostly just moving stuff out of headers that shouldn't be there, renaming stuff for consistency, and scoping stuff down where appropriate. Things I've actually messed with substantially: * More descriptive names for a lot of devices * Untangled the fantasy sound from the driver state, which necessitates breaking up sound/flip writes * Changed DECO BSMT2000 ready callback into a device delegate * Untangled Microprose 3D noise from driver state * Used object finders for CoCo multipak, KC85 D002, and Irem sound subdevices * Started to get TI-99 stuff out of the TI-990 directory and arrange bus devices properly * Started to break out common parts of Samsung ARM SoC devices * Turned some of FM, SID, SCSP DSP, EPIC12 and Voodoo cores into something resmbling C++ * Tried to make Z180 table allocation/setup a bit safer * Converted generic keyboard/terminal to not use WRITE8 - space/offset aren't relevant * Dynamically allocate generic terminal buffer so derived devices (e.g. teleprinter) can specify size * Imporved encapsulation of Z80DART channels * Refactored the SPC7110 bit table generator loop to make it more readable * Added wrappers for SNES PPU operations so members can be made protected * Factored out some boilerplate for YM chips with PSG * toaplan2 gfx * stic/intv resolution * Video System video * Out Run/Y-board sprite alignment * GIC video hookup * Amstrad CPC ROM box members * IQ151 ROM cart region * MSX cart IRQ callback resolution time * SMS passthrough control devices starting subslots I've smoke-tested several drivers, but I've probably missed something. Things I've missed will likely blow up spectacularly with failure to bind errors and the like. Let me know if there's more subtle breakage (could have happened in FM or Voodoo). And can everyone please, please try to keep stuff clean. In particular, please stop polluting the global namespace. Keep things out of headers that don't need to be there, and use things that can be scoped down rather than macros. It feels like an uphill battle trying to get this stuff under control while more of it's added.
* Self-registering devices prep: Vas Crabb2017-02-271-7/+7
| | | | | | | | | | | | | | * Make device_creator a variable template and get rid of the ampersands * Remove screen.h and speaker.h from emu.h and add where necessary * Centralise instantiations of screen and speaker finder templates * Add/standardise #include guards in many hearers * Remove many redundant #includes * Order #includesr to help catch headers that can't be #included alone (nw) This changes #include order to be prefix, unit header if applicable then other stuff roughly in order from most dependent to least dependent library. This helps catch headers that don't #include things that they use.
* ARMv5 additions to ARM7 trap152017-02-101-2/+7
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* Changed disassembler infrastructure to not use char buffers internally Nathan Woods2016-11-201-5/+5
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