| Commit message (Collapse) | Author | Age | Files | Lines |
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- add CD4006 and CD4070 devices
- add TL084 opamp model
- Clock now supports proxies, i.e. can be connected to
analog devices.
- Fixed netlists using CLOCK
- added some comments
- removed a forgotten header file.
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- Separate code out into pmath.h and pstonum.h.
- Fix VC build error
- optimize pfmtlog.h a bit
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- Removed code no longer used
- Add noexcept where appropriate
- split pparser.[c|h] into ppreprocessor and ptokenizer
- smaller optimizations, e.g. use of std::size_t
- fix lint warnings
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- solver now uses dynamic allocation on systems larger than 512x512
- fixed osx build
- moved nl_lists.h classes to plists.h
- fixed netlist makefile clint section
- readability and typos
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- clang lint and pedantic fixes
- mat_cr.h: separate solving linear systems from underlying matrix
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- move more code in headers - delete some cpp files.
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This effectively reverts b380514764cf857469bae61c11143a19f79a74c5 and
c24473ddff715ecec2e258a6eb38960cf8c8e98e, restoring the state at
598cd5227223c3b04ca31f0dbc1981256d9ea3ff.
Before pushing, please check that what you're about to push is sane.
Check your local commit log and ensure there isn't anything out-of-place
before pushing to mainline. When things like this happen, it wastes
everyone's time. I really don't need this in a week when real work™ is
busting my balls and I'm behind where I want to be with preparing for
MAME release.
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This reverts commit c24473ddff715ecec2e258a6eb38960cf8c8e98e, reversing
changes made to 009cba4fb8102102168ef32870892438327f3705.
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- added MOSFET model. Currently capacitances are not modelled.
This is a 3-pin model (Bulk connected to Source) with provisions to
extend it to 4-pin at a later stage.
- Add a capacitor generic model which is charge conserving.
Switch netlist to use this model instead of constant capacity model.
- Start putting constants into a central place.
Please expect minor timing differences due to a different numerical
path.
The cmos inverter example illustrates the analog implementation of a
cmos inverter gate. These were used a lot back in the 70s/80s to
generate sinus waves. The model should also be able to better emulate
4066 analog switches.
The addition of a relatively simple capacitor model is planned at a
later stage.
Expect everything from the MOSFET model at the current stage. Wrong
results as well as convergence issues and crashes.
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implemented on MAME using the netlist subsystem.
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sound board, completing the tromba circuit
(nw) I'm not sure whether the model works properly or not, but in the
circuit where it's used, I don't think it can work properly with the
current TTL output model. A capacitor is charged by the Q output of a
74LS74 flipflop (U3A) until the voltage passes the Schmitt trigger's
threshold, causing it to reset the flipflop. However, the positive
trigger voltage of the Schmitt trigger is 1.6V, but our TTL output model
has a high output voltage of 1.0V (see nl_base.cpp:89). I realise the
simplified model of TTL logic with high impedance inputs and outputs
behaving as though thery're loaded is convenient and fast to simulate,
but it's not detailed enough for applications like this where
7400-series chips are used in analog circuitry. This is what held me up
last time I tried adding a netlist for this sound board.
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- OPENMP refactored. All OPENMP operations are now templatized in pomp.h
- We don't need thread-safe priority queue. Event code updating analog
outputs now runs outside the parallel code.
(nw)
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Prodigy display
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- Moved 9312 and 74279 to ttl macro library.
- Renamed TTL_9312_* to DM9312. This is more appropriate.
- Fixed a number of warnings from latest ubuntu clang-5.0.
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nltool and nlwav now use wmain, i.e. UNICODE main on windows. (nw)
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Instead, they have to be prefixed by "netlist/". Removed unneeded link
librariers for nltool and nlwav along the way. (nw)
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Device implementations (all cpp files in netlist/devices) now should
only include nl_base.h.
Netlist implementation sources should only include "net_lib.h".
Refactored netlist.h and netlist.cpp to avoid namespace congestion in
netlist.h.
Fixed VC2015 build. (nw)
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- refactored reverse polish notation evaluator into own source files.
- added function parameter to current and voltage sources VS and CS.
You can now use those to e.g. produce a sine wave.
- Changed code to allow devices to optionally be treated as dynamic or
timestepping devices.
[Couriersud]
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code along the way. (nw)
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into these files as well. The code uses <cfenv> which is part of c++11
standard. Non-standard glib extensions are currently only used on linux
and (i386 or x86_64). (nw)
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need updating by non-netlist driver code. [Ryan Holtz]
-netlist: Added new devices: [Ryan Holtz]
* Intel 2102A 1Kbit (1024 x 1) Static RAM
* 74365 Hex Bus Driver with 3-State Outputs
* Generic 2- and 3-terminal Tristate device
* Note: Tristate device and 74365 do not actually tristate, they are simply a way of combining multiple outputs + chip enables.
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* 74161 Synchronous 4-Bit Binary Counter with Clock
* 7473 Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
* Am2847 Quad 80-bit Static Shift Register
* DM9334 8-bit Addressable Latch
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