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* srcclean and regenerate localisations (nw) Vas Crabb2018-03-251-1/+1
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* dsp16: move most core state into DRC cache - keeps a lot of details out of ↵ Vas Crabb2018-03-211-0/+5
| | | | the main header (DRC is still stubbed out) (nw)
* prettier way of adding DRC framework on-demand (nw) Vas Crabb2018-03-201-2/+12
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* dsp16: start adding recompiler boilerplate (nw) Vas Crabb2018-03-171-2/+4
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* use more constexpr and literal classes in UML to give compiler more ↵ Vas Crabb2018-03-171-4/+4
| | | | optimisation opportunities (nw)
* Blind faith fixed long names for almost all CPUs (nw) angelosa2018-03-151-0/+1
| | | | mb86235.cpp: renamed pcs_ptr into pcp, and added a file for future interpreter core (nw)
* Cycle-accurate DSP16 core (disabled in QSound for performance reasons) Vas Crabb2018-03-151-1/+0
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* Merge pull request #3266 from JoakimLarsson/diablo_1 R. Belmont2018-02-281-0/+17
|\ | | | | WIP: Diablo printer CPU
| * WIP: Diablo printer CPU joakim2018-02-241-0/+17
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* | srcclean (nw) Vas Crabb2018-02-251-1/+1
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* | NUON disassembler [O. Galibert] Olivier Galibert2018-02-181-0/+10
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* create derived 6502 type for XaviX because it has at least one custom… (#3154) David Haywood2018-02-021-1/+10
| | | | | | | | | | | | | | | | | | | | | * create derived 6502 type for XaviX because it has at least one custom 4-byte opcode that doesn't fit any other type. treating that opcode as NOP for now. have a feeling it might be something to do with the other integrated hardware, might be 'execute co-processor code chain at this address' or something similar It isn't a standard JSL (Jump Subroutine Long) like the SNES cpu opcode in the same place as this, it seems to point at some code-like structures tho) could also be a secondary operation mode with different encoding like ARM's Thumb mode tho I guess. We currently only have a single XaviX based dump (taitons1) but there are more on the way. I'm going to see if the code flow makes any sense at all with these missing, or if any of it gives a clue as to what they should actually do. * xavix - let's call these callf and retf then after further investigation these are some kind of extra 'long jump' subroutine / task handlers, the 0x80 also being a custom opcode was throwing me off trying to identify them before. looks like they might have been hacking 65816 features into the regular 6502 core? * prepare for extra address bits (nw) * better program flow (nw)
* -e132xs: fix botched DRC merge, nw mooglyguy2017-12-291-0/+3
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* fixed build errors, nw mooglyguy2017-12-291-1/+1
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* tms1000c: added correct microinstructions pla (nw) hap2017-12-211-0/+3
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* Revert "Revert "Merge branch 'master' of https://github.com/mamedev/mame"" Firehawke2017-12-131-1/+1
| | | | This reverts commit 54155441e9ba9941e85d80c4834a66376a11e791.
* Revert "Merge branch 'master' of https://github.com/mamedev/mame" Firehawke2017-12-131-1/+1
| | | | | This reverts commit f537428e5a40ba6dde8ca9bf0fe9ae6b1f189ac4, reversing changes made to 0d70d798107d4e4e8fb9f230410aeb1e888d65c5.
* no help = no hyperstone drc, nw mooglyguy2017-12-061-5/+1
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* e132xs: initial work on drc, nw mooglyguy2017-12-021-1/+1
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* e132xs: initial drc work, and templated conditional db/b, nw mooglyguy2017-12-021-2/+6
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* dvdisasm: Overhaul [O. Galibert] Olivier Galibert2017-11-261-40/+231
| | | | | | | | Disassemblers are now independant classes. Not only the code is cleaner, but unidasm has access to all the cpu cores again. The interface to the disassembly method has changed from byte buffers to objects that give a result to read methods. This also adds support for lfsr and/or paged PCs.
* i8085: moved opcode macros to main file, will convert these to functions (nw) hap2017-11-141-1/+0
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* rename misleading i8085cpu.h to i8085ops.hxx (nw) hap2017-11-141-1/+1
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* einstein: Major cleanup, add a ADC0844 device Dirk Best2017-11-061-0/+2
| | | | | | | | The analogue joystick is now emulated. Also fixed a few minor issues with the memory map. This also adds a generic Z80 dasisy chain device, for use in drivers with non-Z80 peripherals.
* srcclean (nw) Vas Crabb2017-10-221-1/+1
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* Preliminary SH3 / SH4 recompiler [David Haywood] (#2711) David Haywood2017-10-111-3/+5
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* use 'sh' instead of 'superh' David Haywood2017-10-021-31/+31
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* move sh2 / sh4 to a folder called superh David Haywood2017-10-021-44/+32
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* Create explicit i386dasm include for x86 DRC (nw) AJR2017-08-011-1/+2
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* need this for debug trace logging on DRC cores (nw) Vas Crabb2017-08-011-1/+1
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* Fix single build for i386-based drivers (nw) AJR2017-07-311-1/+1
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* Begin of HP80 emulation (#2448) fulivi2017-07-081-0/+16
| | | | | | | | | | | | | | | | | What works: * HP85A machine with 16K of RAM * Capricorn CPU works * Keyboard works (with minor issues) * CRT text / graphics modes work (correct speed is not emulated yet so service ROM complaints) * BASIC is usable What is missing (and I'll have hopefully working soon): * HW timers * Beeper * Integral printer * DC100 cassette drive * Extension ROMs * I/O modules (especially the HPIB interface so that we can hook up floppy drives) * Other models in the family (e.g. HP86)
* create c-chip device with correct CPU type in it and a bunch of notes ↵ David Haywood2017-07-051-0/+2
| | | | | | | | | (pinout etc.) create a uPD78C11 derived CPU type for this purpose, with internal ROM map use internal ROM map for other uPD78C10 chips as it's always present. add missing NO_DUMP definitions to various games using C-Chips with correct size etc. pump megablast through the device code as really all it ever does is bank the c-chip window and test the RAM.
* Rewrote 4004 core and disassembler: Vas Crabb2017-06-271-7/+7
| | | | | | | | | | * Renamed to MCS-40. * Emulated 8-clock instruction cycle, interruptible at any point. * Converted TEST input to an input line. * Added SYNC and CM output lines. * Added support for 4040 CY output, logical operations, extended registers, ROM banking and disassembly. * Made I/O space mapping more flexible to support the variety of peripherals available. * Notable missing features are 4040 interrupt and halt, and "program memory" space.
* sm510: made KB1013VK12 device a clone of SM5A (nw) hap2017-06-231-4/+2
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* Update cpu.lua properly (nw) AJR2017-05-261-0/+1
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* Quick and dirty split of most MC6801/MC6803/HD63701 features from base M6800 ↵ AJR2017-05-261-0/+2
| | | | | | class (nw) The code remains generally archaic and awful and in need of a sweeping rewrite. At least one static variable is no more.
* Fixed some inaccuracies in file names in lua scripts. dankan18902017-05-211-2/+2
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* Move static data out of devices into the device types. This is a ↵ Vas Crabb2017-05-141-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | significant change, so please pay attention. The core changes are: * Short name, full name and source file are no longer members of device_t, they are part of the device type * MACHINE_COFIG_START no longer needs a driver class * MACHINE_CONFIG_DERIVED_CLASS is no longer necessary * Specify the state class you want in the GAME/COMP/CONS line * The compiler will work out the base class where the driver init member is declared * There is one static device type object per driver rather than one per machine configuration Use DECLARE_DEVICE_TYPE or DECLARE_DEVICE_TYPE_NS to declare device type. * DECLARE_DEVICE_TYPE forward-declares teh device type and class, and declares extern object finders. * DECLARE_DEVICE_TYPE_NS is for devices classes in namespaces - it doesn't forward-declare the device type. Use DEFINE_DEVICE_TYPE or DEFINE_DEVICE_TYPE_NS to define device types. * These macros declare storage for the static data, and instantiate the device type and device finder templates. The rest of the changes are mostly just moving stuff out of headers that shouldn't be there, renaming stuff for consistency, and scoping stuff down where appropriate. Things I've actually messed with substantially: * More descriptive names for a lot of devices * Untangled the fantasy sound from the driver state, which necessitates breaking up sound/flip writes * Changed DECO BSMT2000 ready callback into a device delegate * Untangled Microprose 3D noise from driver state * Used object finders for CoCo multipak, KC85 D002, and Irem sound subdevices * Started to get TI-99 stuff out of the TI-990 directory and arrange bus devices properly * Started to break out common parts of Samsung ARM SoC devices * Turned some of FM, SID, SCSP DSP, EPIC12 and Voodoo cores into something resmbling C++ * Tried to make Z180 table allocation/setup a bit safer * Converted generic keyboard/terminal to not use WRITE8 - space/offset aren't relevant * Dynamically allocate generic terminal buffer so derived devices (e.g. teleprinter) can specify size * Imporved encapsulation of Z80DART channels * Refactored the SPC7110 bit table generator loop to make it more readable * Added wrappers for SNES PPU operations so members can be made protected * Factored out some boilerplate for YM chips with PSG * toaplan2 gfx * stic/intv resolution * Video System video * Out Run/Y-board sprite alignment * GIC video hookup * Amstrad CPC ROM box members * IQ151 ROM cart region * MSX cart IRQ callback resolution time * SMS passthrough control devices starting subslots I've smoke-tested several drivers, but I've probably missed something. Things I've missed will likely blow up spectacularly with failure to bind errors and the like. Let me know if there's more subtle breakage (could have happened in FM or Voodoo). And can everyone please, please try to keep stuff clean. In particular, please stop polluting the global namespace. Keep things out of headers that don't need to be there, and use things that can be scoped down rather than macros. It feels like an uphill battle trying to get this stuff under control while more of it's added.
* Add preliminary Sharp SM590 CPU core [Lord Nightmare, hap] Lord-Nightmare2017-05-091-0/+3
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* Cherry-pick some features from self-registering drivers PoC: Vas Crabb2017-02-161-6/+1
| | | | | | | | * Use size_t for sizes and <algorithm> for algorithms * Fix up some files that were getting linked into multiple libs * Add missing virtual method to sh2 peripheral class * Put shortname in driver struct for locality * Use shared pointers in config LRU cache for safety
* preliminary TLCS-870 disassembler - Work in Progress (#1967) ajrhacker2017-02-051-0/+12
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* m6805: added skeleton CMOS devices Vas Crabb2017-01-301-1/+3
| | | | | | | * Added m146805 and m68hc05 to unidasm * Made opcode tables configurable in m6805_base_device, provided tables for HMOS, CMOS and HC families * Implemented MUL instruction, made unimplemented STOP and WAIT raise fatal error * Added skeleton MC68HC05C4 with RAM and ROM in correct locations in memory map
* Merge pull request #2016 from pmackinlay/interpro R. Belmont2017-01-241-0/+16
|\ | | | | Interpro
| * initial pull request Patrick Mackinlay2017-01-241-0/+16
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* | Merge pull request #2002 from wilbertpol/hcd62121 R. Belmont2017-01-201-1/+0
|\ \ | |/ |/| hcd62121/cfx9850: several small cleanups (nw)
| * hcd62121: several small cleanups (nw) Wilbert Pol2017-01-191-1/+0
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* | cop400: Properly separated COP444L from COP444C. [Curt Coder] Curt Coder2017-01-161-0/+1
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* cop400: Removed non-working, incomplete COP440 code. (nw) Curt Coder2017-01-161-1/+1
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* m6805: refactoring and improvements Vas Crabb2017-01-121-0/+3
| | | | | | | | | | | | | * Moved 68705 devices into their own file. * Made P3, P5 and U3 variants and made them load bootstrap ROMs. * Implemented EPROM control (write is stubbed out with a logerror). * Implemented differences for open drain I/O ports. (nw) Base device with peripherals should really derive from the 6805 device directly, not the 68705 devices, as I/O ports are present on mask devices (e.g. 6805P2). All drivers and devices that were using M68705_NEW have been changed to M68705P5 - someone who knows the drivers better should fix them up.