| Commit message (Collapse) | Author | Age | Files | Lines |
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cpu/drcbex86.cpp: Removed i686 recompiler back-end. Without a practical
way to make Windows i686 builds, it's just going to rot. Also, x86-64
is now older than Pac-Man was when MAME was initially created. It's
dead on the desktop
tools: Removed aueffectutil - it's no longer useful.
emu/video/rgbutil.cpp: Removed Altivec/VMX bilinear filtering
implementation. PowerPC on desktop is dead.
file/posixptty.cpp, sdl, sdl3, scripts: Removed support for SysV
operating systems. They’re dead on the desktop.
scripts: Removed outdated Lua compatibility macros. They weren't doing
anything sice we updated to Lua 5.4 (the compatibility options changed,
but we just left the old macros in place, which no longer had any
effect).
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* tmp94c241: Add serial port sub-device with I/O interface mode
Replace the inline serial stubs (which just instantly set TX-complete)
with a proper sub-device implementation supporting:
- I/O interface mode (mode 0): Synchronous clocked serial using SCLK
pin. Supports both internal (baud rate generator) and external
(IOC=1) clock sources. TX double buffering with auto-load from
buffer to shift register. Pre-outputs bit 0 on TXD before first
clock edge so receiver can sample it on the rising edge.
- Baud rate generator: Configurable via BRxCR register with divisor
and clock source selection. Timer drives SCLK at the configured
rate. Clock frequency derived from CPU clock.
- TX/RX data callbacks: txd(), rxd(), sclk_out(), sclk_in() for
connecting external devices to the serial ports.
- tx_start callback: Signals the start of each byte transmission with
the current PFFC pin function state, allowing connected devices to
distinguish real transmissions from phantom ones.
The serial registers (SC0BUF/SC1BUF, SC0CR/SC1CR, SC0MOD/SC1MOD,
BR0CR/BR1CR) are now delegated to the sub-devices in the internal
memory map. TX-complete flags (INTES0/INTES1 bit 7) are set at
device_reset to indicate empty TX buffers at power-on.
UART modes (7/8/9-bit) are recognized but not yet implemented.
Also moves interrupt register indices from a file-scope enum to
public static constexpr members of tmp94c241_device.
* tmp94c241: move irq vector map to static const class member
Per galibert's review suggestion: defining the IRQ vector table as a
static const member of tmp94c241_device and providing the out-of-class
definition in class scope allows the INTE* constants to be referenced
without tmp94c241_device:: qualifiers in the initializer.
The nested struct is named irq_vector_entry. NUM_MASKABLE_IRQS is
replaced by std::size(irq_vector_map) directly at each use site inside
member functions.
* tmp94c241: use enum for public interrupt index constants
* tmp94c241: use required_device for serial sub-device parent access
Replace dynamic_cast with required_device<tmp94c241_device> using
DEVICE_SELF_OWNER to access the parent CPU from the serial sub-device.
This provides automatic type checking during MAME's -valid pass.
Break the circular header dependency by replacing the #include of
tmp94c241_serial.h in tmp94c241.h with a forward declaration, and
having tmp94c241_serial.h include tmp94c241.h instead. The .cpp
files include what they need directly.
Addresses review feedback from galibert on PR #15015.
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* Add cv1k SH7709S cache handling behavior for slowdown emulation
- Handles some basic caching for the sh7709s used for cv1k titles so that they run at more appropriate speeds
* sh7709s.cpp: Fix up a couple of timing handling bugs
- Use the writeback flag instead of write flag as the access to external memory is what matters for those
- Fix up the writeback buffer timing, we don't need to precharge twice for writes. Also rolled up the command costs the SDRAM region handling so the writes only need to add trwl to the penalty
- Check for burst mode availability when determining the base cycle cost, only burst ROM and sdram can use burst access to each other area requires 4 separate accesses
* sh7709s.cpp: Add some comments explaining missing/unimplemented features
- Add the non-burst timing table for WCR2
- Updates and adds a couple of extra comments related to the penalties/timing
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cpu/drcbearm64.cpp: Don't set the rounding mode on SETFMOD if it hasn't
changed.
cpu/e132xs.cpp: Skip more unnecessary flag calculations, use
pre-calculated PC for updating G0 in memory when possible, better
analysis of pre-calculated PC values when delay slots are involved.
cpu/sh: Cleaned up register dependency analysis logging, fixed an
instruction analysis bug.
cpu/sharc: Disassemble unimplemented instructions executed in recompiled
code, include tag in more fatal errors, use throw syntax to make it
cleared it's an early out.
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-cpu/powerpc: Modernised recompiler front-end code, improved instruction
analysis logging.
-cpu/sh: Cleaned up instruction analysis logging a little
-util/client_ws.hpp, util/server_ws_impl.hpp, capcom/cps2comm.cpp:
Updated some use of deprecation ASIO APIs.
-nakajima/nakajies.cpp: Use range-based loops.
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The base opcode description now only has the parts that are used by the
base recompiler front-end. CPU cores are free to define their own
extensions as they see fit without being limited to pre-defined fields.
The base recompiler front-end is now a template, eliminating the virtual
member functions. It no longer has any dependencies on libemu, which
paves the way to decoupling the recompiler front-ends and allowing the
instruction analysis to be tested without the rest of the emulator.
Also added a compile-time option to disable ASTAT flag update elision in
the SHARC recompiler, and fixed some recompiler front-end bugs.
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This is required by Last Bronx, which has code that de-duplicates the
common part of multiple successive loops. It reduces the performance of
do-nothing spin loops a bit but not too much - the DRC still has
substantially better performance than the interpreter.
Unfortunately, this exposes a pre-existing issue with how ASTAT
conditions are handled in the SHARC front-end which causes the Midnight
Run and Racing Jam DSP programs to crash. Fixing it will require major
changes. Use -nodrc for now, I'll probably have to disable to
recompiler before the next release until this can be fixed.
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* machine/k033906.cpp: Added read side effects check (should fix
MT08830).
* cpu/tms320c3x: Marked TMS320C31 as parent ROM of TMS320VC33.
* cpu/sharc: Cleaned up formatting of 64-bit values and initialisation
of opcode dispatch table.
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Name folders after families rather than the first family member emulated
by MAME (yes, TMS320C1x and TMS320C2x are retrospective names).
Follow TI's convention of including the "C" in the names.
Don't try to jam all the disassembler source file names into 8.3.
The TMS32010, TMS320M10 and TMS320C10 are different things, but
unfortunately MAME hasn't made a distinction between them so far. As
far as I can tell, early DECTalk devices used TMS32010 or TMS320M10
chips, while the Atari and Toaplan games used TMS320C10 chips, but this
should be verified.
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amiga/cdtv: Implement front panel with VFD and control buttons. Play/Pause, Stop, Previous and Forward buttons not yet working because the "Remote Control Input Converter" isn't hooked up yet.
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* misc/3do.cpp: split Clio into own device
* misc/3do.cpp: convert Madam to device
* misc/3do_clip.cpp: hookup DSPP
* misc/3do_clio.cpp: add logmacro
* misc/3do_madam.cpp: move diag port as devcb, disable by default
* misc/3do_madam.cpp: add logmacro
* misc/3do.cpp: fix lambda capture
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and Mahjong Raijinhai.
Also cleaned up some stuff.
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Also bumped documentation version to 0.285 as it describes new
functionality not in 0.284, and removed ARM7 from the list of DRC CPUs
since its incomplete recompiler functionality was removed.
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* dsp563xx: Implement bset #n,r instruction
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bootloader at 0x100 in the virus b.
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other systems) and greatly improve its disassembler
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boot + games selectable (#13727)
- added a derived 6502 core for the VT3xx Sound CPU (built into the SoC), it has some customized opcodes
- added enough emulation of the Sound CPU to get denv150 to pass initial checks
- added internal SoC ROM to a number of sets that copy the sound program from it, allowing those to pass startup checks too
- added preliminary support for some of the extra VT3xx background video features, note even the way the hardware implements these is ugly, they really are hacked on top of the standard NES modes
- added preliminary support for extra VT3xx sprite modes
- the above also allow various Lexibook sets to show boot screens eg. lxcmcysw, lxcmcyfz, lxcmcydp, lxcmcysp, lxcmcycr, lxcmcypj, lxcmcyba, lxcmcypp
- paired some scrambling/encryption to specific SoC classes, as it's likely these represent slightly customized models, added modes for nubsupmf, red5mam, dgun2593, gcs2mgp, 240in1ar which also now show something
- started looking at the new DMA modes needed by 240in1ar etc.
- denv150 basically now works, but leaving it marked as NOT WORKING until the rest of the sound CPU logic is hooked up
- flagged a few sets as potentially bad dumps
- verified / corrected metadata for a number of sets now that they boot and can be better identified
- identified some cases where there seem to be additional protection devices present, supplying either code or data
- replaced vt1682 ALU in vt3xx emulation with its own implementation as it isn't the same
- added relative offset support (a kind of banking internal to the VT3xx) allowing the majority of games in the multi-game menus to go ingame
- added external banking support to a number of the larger games (anything larger than 32Mbytes has to be externally banked)
- corrected ROM loading for a number of sets
- fixed additional opcodes on sound CPU, and added the remaining peripherals
- misc other VT related tweaks
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sources from build script. (#13622)
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* Made it a bit easier to cross-compile for x86-64 or i686 on an AArch64
Windows system.
* Choose the default native recompiler back-end based on predefined
macros rather than requiring the build scripts to set it.
* Don't require every target without a native recompiler to declare
this.
* Got rid of the code that was supposed to set -m32 or -m64 when
building GENie (it didn't work - it tried to use ARCHITECTURE before
setting it).
* Avoid relying on the unreliable PROCESSOR_ARCHITECTURE environment
variable.
* Got rid of stuff for versions of Xcode that are definitely no longer
supported.
* Got rid of workarounds for very old Linux distros.
* Use newer makefile syntax for if/else/if structures, comment some else
and endif statements for clarity.
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* z80/z80make.py: Revisited z80 code generator
* cpu/z80/t6a84.cpp: isolate device specific callbacks
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----------------------------------
MicroVAX I [microvax2.org]
MicroVAX II [microvax2.org]
MicroVAX 3400 [microvax2.org]
MicroVAX 3500 [microvax2.org]
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(#13220)
matsushita/kn5000.cpp: Use TMP94C241 CPU, hooked up I/O to onboard CPU peripherals.
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portables. [R. Belmont]
apple/gsc.cpp: Split Apple Gray Scale Controller (remarked C&T 65210) to its own device. [R. Belmont]
apple/csc.cpp: Initial Apple Color Screen Controller (remarked C&T 65220) support. [R. Belmont]
apple/msc.cpp: Initial Apple Main System Controller and MSC II support. [R. Belmont]
m6805/m68hc05pge.cpp: Initial support for the Apple/Motorola "PG&E" microcontroller. [R. Belmont]
apple/macpwrbkmsc.cpp: New driver for MSC and MSC II-based Mac PowerBooks and PowerBook Duos. [R. Belmont]
Systems promoted to working
---------------------------
Apple Macintosh PowerBook Duo 210 [R. Belmont]
New working systems
-------------------
Apple Macintosh PowerBook Duo 270c [R. Belmont]
Apple Macintosh PowerBook Duo 280 [R. Belmont]
New working clones
------------------
Apple Macintosh PowerBook Duo 230 [R. Belmont]
Apple Macintosh PowerBook Duo 250 [R. Belmont]
Apple Macintosh PowerBook Duo 280c [R. Belmont]
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* Build all native back-ends if any native back-end is enabled so errors
caused by changing interfaces can be found faster.
* cpu/drcbeut.cpp: Moved resolved member function stuff to a place where
it can be shared by back-ends.
* cpu/drcbearm64.cpp: Use ubfx instruction to extract unordered flag.
* cpu/drcbearm64.cpp, cpu/drcbex64.cpp: Bypass trampolines when calling
get map variable value and debugger instruction hook functions.
* cpu/drcbearm64.cpp: Moved some internal helpers that don't need to be
members to anonymous namespace.
* cpu/drcbearm64.cpp: Added a comment with some info to help when
debugging generated code.
* cpu/drcbec.cpp: Put code in the drc namespace.
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* cpu/uml.cpp: Removed unused vector type.
* 3rdparty/asmjit: Update asmjit to latest upstream.
* cpu/drcbex64.cpp: Fixed crash with LOG_HASHJMPS enabled (stack needs to be 16-byte aligned before calling debug_log_hashjmp_fail).
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* cpu/upd177x/upd177x.cpp: Add NEC uPD177x cpu core.
* scv.xml: Promoted 1 item.
Software list items promoted to working
------------------------------------------
Star Speeder
* cpu/upd177x/upd177x.cpp: Remove a comment.
* cpu/upd177x/upd177x.cpp: Remove callback on PA.
* cpu/upd177x/upd177x.cpp: Update comment about setting m_pc to 1 during reset.
* Add a different workaround for the sync issue between the 2 cpus in scv.
* cpu/upd1771x/updf177x.cpp: Use little endian.
* cpu/upd177x/upd177x.cpp: Include device tag in fatalerror messages.
* epoch/scv.cpp: Update upd1771c rom region sizes.
* nec/apc.cpp: Switch to upd177x_cpu_device.
* epoch/scv.cpp: Add location to upd1771c rom name.
* cpu/upd177x/upd177x.h: Remove 'overrides' comments.
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* abandoned cassette vison work
* remove comment now that the useful table is gone
* force github to rebuild because github is being github
* add a note based on earlier research
* bring this part over from the previous tree too, it seems worth having still
* actually use this version instead, I thought it was broken, but it actually has advantages
* I've been informed this will be merged if I assign a copyright holder, so as I don't really recognize it as my own design anymore, I'm assigning Vas.
* Update cpu.lua
* Start cleaning up:
* cassvisn_cart.xml: Fixed program region width.
* cassvisn_cart.xml: Added Japanese titles and proper markup for release
dates.
* epoch/cassvisn.cpp: Removed unnecessary byte swapping when loading
software list items.
* cpu/upd777.cpp: Made order of declarations and definitions more
consistent with each other, added more inline and const hints.
* tools/unidasm.cpp: Make data source big Endian to match CPU core.
* epoch/cassvisn.cpp: Digit grouping for big numbers, better error messages.
---------
Co-authored-by: David Haywood <hazemamewip@hotmail.com>
Co-authored-by: Vas Crabb <vas@vastheman.com>
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New systems added as NOT WORKING
---------------------------------------
Ferie Kitten (1994, Sega)
Ferie Puppy (1995, Sega)
Ferie World Travel (1995, Sega)
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generator, interrupt controller/Extended intelligent I/O service, I/O port, Programmable Pulse Generator, reload timer and UART.
CPU core exposes the RMW line for onboard devices.
Log messages will contain the address of the start of the instruction, rather than the next byte the CPU is about to fetch.
Added INT9/INT addr16 & INT addr24 software interrupt instructions.
Fixed INCW @RWx & DECW @RWx instruction length
Added missing fetch of immediate value in MOV @RWx + RW7, #imm8.
Rewrote Tomy Prin-C keyboard handling and pen to use new onboard devices, substantially increasing the reload timer 0 frequency as it's now correctly waiting for 0x7530 underflows with reload = 0x37f at startup.
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mpl1839/kl1839vm1.cpp: MPL's l1839vm1 cpu device
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