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2015-07-08victor9k: Updated pinout. (nw) Curt Coder1-5/+5
2015-07-08starcrus.c, tapatune.c: added / enabled save state support (nw) Ivan Vangelista4-50/+79
2015-07-08stupid bug hap2-5/+5
2015-07-08scfinals: Add correct default eeproms [O. Galibert] Olivier Galibert1-8/+6
2015-07-08also vendettar is a US set, there's a WDUD logo after the attract cycles (nw) David Haywood1-2/+2
2015-07-08new clones David Haywood3-7/+35
Vendetta (Asia, 4 Players, ver. Z) [Fraspe]
2015-07-08new clones David Haywood3-88/+116
Quizard (v1.0) [TeamEurope]
2015-07-08m68k: fix unaligned pc-relative accesses [O. Galibert] Olivier Galibert1-8/+19
2015-07-08Fix for MAMETESTERS bug #05981 mamesick1-9/+9
Discussed this commit with Haze directly. If we cannot get rid of the draw_sprites hack we use, at least we should make it working correctly, not to be the cause of bugs. Fixed the mentioned bug and priorities in all other games that uses same drawing routine.
2015-07-07fix note for gigaman2 set (n/w) Lord-Nightmare1-2/+2
2015-07-08Added transfer size clear for DMAs, used by Chaos Seed in SS (still randomly ↵ angelosa2-2/+3
crashes tho), nw
2015-07-08Added bread-and-butter DMA CH 0 for SH7032, used by Casio Loopy for RAM fill. angelosa3-3/+79
2015-07-08Document progress on congo bongo. Gorilla sound now works. Performance couriersud8-103/+282
up from 30% to 170%. Use ./nltool -c run -f nl_examples/congoBongo.c -t 2 to test. Minor enhancements and bugfixes. [Couriersud]
2015-07-08Added SH-2A flavour, which is SH-2 + SH7021 used by Casio Loopy. angelosa4-6/+108
2015-07-07added wake up on K input hap3-10/+34
2015-07-07Also simplified TMNT calculation in line with Bells & Whistles. system11b1-1/+1
2015-07-07Corrected screen size for Bells & Whistles as per bug 05594 system11b1-1/+1
2015-07-07Bulk replace, nw angelosa3-12/+5
2015-07-07Fixed accessing to internal map, might need another parameter for address ↵ angelosa1-10/+36
cache "masking" (i.e. SH-1 uses address bit 27 for cache), nw
2015-07-07Fixed number of address lines for SH-1 angelosa2-5/+5
2015-07-07Fixed SH-1 internal mem map, nw angelosa3-22/+7
2015-07-07nw hap2-1/+3
2015-07-07added internal timer hap3-29/+119
2015-07-07First step in converting SH-2 to have separate internal devices. Fixed SH-1 ↵ angelosa5-79/+35
num of address bits, removed extra read / write memory checks, added cache data array to main SH-2. (out-of-whatsnew) If anything regresses please let me know.
2015-07-07Fix compile angelosa1-1/+1
2015-07-07Minor mod, nw angelosa1-2/+2
2015-07-07I'm sick of seeing MCFG_SCREEN_VBLANK_TIME ... angelosa1-0/+3
... It's an AIDS-inducting blantant hack, and it roots from 199x original MAME design. (in pull request just because it needs compiling and testing)
2015-07-07Added a bunch of doxygen style comments in screen.h, regarding MCFG_SCREEN_* ↵ angelosa1-0/+43
functions
2015-07-07c128_flop.xml: Added Paperback Writer 128, Term Paper Writer, The Great War, ↵ Curt Coder3-8/+80
and Your Personal Financial Planner 128 disk images. [Curt Coder]
2015-07-07Fix for MAMETESTERS bug #04877 mamesick1-1/+1
There's no need to keep that visible area wrong value now that the offsets are fixed. If this change was made for the offsets bug, now can go away. If not, I don't see a valid reason to keep it, since it's the cause of the bug.
2015-07-06new Sunset Riders Clone briantro2-0/+27
New Clone Added -------------------------------------- Sunset Riders (4 Players ver JAD) [Fraspe]
2015-07-07Video registers are waaaay outside of the supposed range. angelosa1-4/+14
2015-07-07skeleton added hap8-46/+137
Game & Watch: Mickey & Donald
2015-07-06improve sprite colours in aquastge (nw) David Haywood1-13/+11
2015-07-06(nw) Firepower PCB P/N thx to Alex Stiletto1-1/+1
(nw) Firepower PCB P/N thx to Alex
2015-07-06Some work towards Aqua Stage, looks like both SH-2/SH-1 shared RAMs ↵ angelosa1-1/+152
addresses can be modified somehow. It currently asks for attendant if out of service mode (which is probably the purpose of the extra input field I suppose). (nw)
2015-07-06vicdual.c: enabled save state support (nw) Ivan Vangelista4-221/+218
2015-07-06seta.c: completed dipswitches for keroppi from the manual. Thanks to Diet Go ↵ Ivan Vangelista1-46/+41
Go Fan for pointing it out (nw)
2015-07-06fix the implementation of the AVR8 EIJMP instruction Felipe Corrêa da Silva Sanches1-1/+1
2015-07-06Fix for MAMETESTERS bug #00317, #04405 mamesick1-8/+11
Adjusted offsets in seta.c video hardware file. The mentioned bugs in commit title are fixed, probably others too. No time to test all games in normal and flip screen mode, also detect a 1 pixel bug is often really difficult with screen flipped. The vast majority of games have been tested with service mode test grid and are ok. Curiously these changes don't fix #04877 which seems to be another kind of issue: offsets values are right but the whole screen is shifted 8 pixels to the right.
2015-07-06c1pmf: updated to use new floppy Dirk Best2-27/+25
2015-07-06Fix for MAMETESTERS bug #05959 mamesick1-2/+2
This simple line change fixes the missing sound bug in KYROS and SSTINGRY (which was not reported in the bug). There's no more need to doubling audio CPU interrupts per frame after the conversion of the driver to the usage of scanline timers. Sorry for opened and closed this request multiple times, I'm learning how to GIT works just now. Thanks.
2015-07-06Add missing pals as NO_DUMP for TNZS old and new style PCBs (n/w) Lord-Nightmare1-4/+39
2015-07-05m20: notes (nw) cracyc1-5/+5
2015-07-05New non-working driver: Metamáquina 2 desktop 3d printer (This also ↵ Felipe Corrêa da Silva Sanches4-6/+245
provides an implementation of the AVR8 EIJMP instruction)
2015-07-05Added 'jumpingi' (red Imnoe PCB based on jumpinga, or possibly parent of) system11b2-3/+47
Corrected date to 1998 for jumpinga
2015-07-05g64_dsk: Respect the number of tracks specified in the image header. [Curt ↵ Curt Coder2-55/+76
Coder]
2015-07-05winfile.c: Stop crashing after saving to a disk image loaded from a software ↵ Curt Coder1-0/+3
list. [Curt Coder]
2015-07-05m20: use 6845 to draw (nw) cracyc1-25/+29
2015-07-06Removed name because is can be confused with Namco System 11 hardware which ↵ Guru1-4/+4
this is not (nw) Please don't add dumper's names etc as comments in the src unless they do real coding work or detailed readme's.
an>, reg_B_DM = 0x04, reg_B_24h = 0x02, reg_B_DSE = 0x01, reg_C_IRQF = 0x80, reg_C_PF = 0x40, reg_C_AF = 0x20, reg_C_UF = 0x10, reg_D_VRT = 0x80 }; static const int SQW_freq_table[16] = { 0, 256, 128, 8192, 4096, 2048, 1024, 512, 256, 128, 64, 32, 16, 8, 4, 2, }; /* BCD utilities */ /* Increment a binary-encoded UINT8 */ static UINT8 increment_binary(UINT8 data) { return data+1; } /* Increment a BCD-encoded UINT8 */ static UINT8 increment_BCD(UINT8 data) { if ((data & 0x0f) < 0x09) { if ((data & 0xf0) < 0xa0) data++; else data = data + 0x01 - 0xa0; } else { if ((data & 0xf0) < 0xa0) data = data - 0x09 + 0x10; else data = data - 0x09 - 0x90; } return data; } /* Convert a binary-encoded UINT8 to BCD */ static UINT8 binary_to_BCD(UINT8 data) { data %= 100; return ((data / 10) << 4) | (data %10); } /* Convert a BCD-encoded UINT8 to binary */ static UINT8 BCD_to_binary(UINT8 data) { if ((data & 0x0f) >= 0x0a) data = data - 0x0a + 0x10; if ((data & 0xf0) >= 0xa0) data = data - 0xa0; return (data & 0x0f) + (((data & 0xf0) >> 4) * 10); } /* Public functions */ /* load the SRAM and register contents from file */ static int rtc65271_file_load(device_t *device, mame_file *file) { rtc65271_state *state = get_safe_token(device); UINT8 buf; /* version flag */ if (mame_fread(file, & buf, 1) != 1) return 1; if (buf != 0) return 1; /* control registers */ if (mame_fread(file, &buf, 1) != 1) return 1; state->regs[reg_A] = buf & (reg_A_DV /*| reg_A_RS*/); if (mame_fread(file, &buf, 1) != 1) return 1; state->regs[reg_B] = buf & (reg_B_SET | reg_B_DM | reg_B_24h | reg_B_DSE); /* alarm registers */ if (mame_fread(file, &state->regs[reg_alarm_second], 1) != 1) return 1; if (mame_fread(file, &state->regs[reg_alarm_minute], 1) != 1) return 1; if (mame_fread(file, &state->regs[reg_alarm_hour], 1) != 1) return 1; /* user RAM */ if (mame_fread(file, state->regs+14, 50) != 50) return 1; /* extended RAM */ if (mame_fread(file, state->xram, 4096) != 4096) return 1; state->regs[reg_D] |= reg_D_VRT; /* the data was backed up successfully */ /*state->dirty = FALSE;*/ { system_time systime; /* get the current date/time from the core */ device->machine->current_datetime(systime); /* set clock registers */ state->regs[reg_second] = systime.local_time.second; state->regs[reg_minute] = systime.local_time.minute; if (state->regs[reg_B] & reg_B_24h) /* 24-hour mode */ state->regs[reg_hour] = systime.local_time.hour; else { /* 12-hour mode */ if (systime.local_time.hour >= 12) { state->regs[reg_hour] = 0x80; systime.local_time.hour -= 12; } else state->regs[reg_hour] = 0; state->regs[reg_hour] |= systime.local_time.hour ? systime.local_time.hour : 12; } state->regs[reg_weekday] = systime.local_time.weekday + 1; state->regs[reg_monthday] = systime.local_time.mday; state->regs[reg_month] = systime.local_time.month + 1; state->regs[reg_year] = systime.local_time.year % 100; if (! (state->regs[reg_B] & reg_B_DM)) { /* BCD mode */ state->regs[reg_second] = binary_to_BCD(state->regs[reg_second]); state->regs[reg_minute] = binary_to_BCD(state->regs[reg_minute]); state->regs[reg_hour] = (state->regs[reg_hour] & 0x80) | binary_to_BCD(state->regs[reg_hour] & 0x7f); /*state->regs[reg_weekday] = binary_to_BCD(state->regs[reg_weekday]);*/ state->regs[reg_monthday] = binary_to_BCD(state->regs[reg_monthday]); state->regs[reg_month] = binary_to_BCD(state->regs[reg_month]); state->regs[reg_year] = binary_to_BCD(state->regs[reg_year]); } } return 0; } /* save the SRAM and register contents to file */ static int rtc65271_file_save(device_t *device, mame_file *file) { rtc65271_state *state = get_safe_token(device); UINT8 buf; /* version flag */ buf = 0; if (mame_fwrite(file, & buf, 1) != 1) return 1; /* control registers */ buf = state->regs[reg_A] & (reg_A_DV | reg_A_RS); if (mame_fwrite(file, &buf, 1) != 1) return 1; buf = state->regs[reg_B] & (reg_B_SET | reg_B_DM | reg_B_24h | reg_B_DSE); if (mame_fwrite(file, &buf, 1) != 1) return 1; /* alarm registers */ if (mame_fwrite(file, &state->regs[reg_alarm_second], 1) != 1) return 1; if (mame_fwrite(file, &state->regs[reg_alarm_minute], 1) != 1) return 1; if (mame_fwrite(file, &state->regs[reg_alarm_hour], 1) != 1) return 1; /* user RAM */ if (mame_fwrite(file, state->regs+14, 50) != 50) return 1; /* extended RAM */ if (mame_fwrite(file, state->xram, 4096) != 4096) return 1; return 0; } /* Read a byte from clock xramsel: select RTC register if 0, XRAM if 1 offset: address (A0-A5 pins) */ UINT8 rtc65271_r(device_t *device, int xramsel, offs_t offset) { rtc65271_state *state = get_safe_token(device); int reply; if (xramsel) { if (offset & 0x20) /* XRAM page register */ reply = state->cur_xram_page; else /* XRAM data */ reply = state->xram[(offset & 0x1f) + 0x0020*state->cur_xram_page]; } else { if (offset & 0x01) /* data register */ switch (state->cur_reg) { case reg_C: reply = state->regs[state->cur_reg]; state->regs[state->cur_reg] = 0; field_interrupts(device); break; case reg_D: reply = state->regs[state->cur_reg]; state->regs[state->cur_reg] = /*0*/reg_D_VRT; /* set VRT flag so that the computer does not complain that the battery is low */ break; default: reply = state->regs[state->cur_reg]; break; } else /* indirect address register */ reply = state->cur_reg; } return reply; } READ8_DEVICE_HANDLER( rtc65271_rtc_r ) { return rtc65271_r( device, 0, offset ); } READ8_DEVICE_HANDLER( rtc65271_xram_r ) { return rtc65271_r( device, 1, offset ); } /* Write a byte to clock xramsel: select RTC register if 0, XRAM if 1 offset: address (A0-A5 pins) */ void rtc65271_w(device_t *device, int xramsel, offs_t offset, UINT8 data) { rtc65271_state *state = get_safe_token(device); if (xramsel) { if (offset & 0x20) /* XRAM page register */ state->cur_xram_page = data & 0x7f; else /* XRAM data */ state->xram[(offset & 0x1f) + 0x0020*state->cur_xram_page] = data; } else { if (offset & 0x01) /* data register */ switch (state->cur_reg) { case reg_second: /* the data sheet says bit 7 is read-only. (I have no idea of the reason why it is.) */ state->regs[reg_second] = data & 0x7f; break; case reg_A: if ((data & reg_A_RS) != (state->regs[state->cur_reg] & reg_A_RS)) { if (data & reg_A_RS) { attotime period = ATTOTIME_IN_HZ(SQW_freq_table[data & reg_A_RS]); attotime half_period = attotime_div(period, 2); attotime elapsed = timer_timeelapsed(state->update_timer); if (attotime_compare(half_period, elapsed) > 0) timer_adjust_oneshot(state->SQW_timer, attotime_sub(half_period, elapsed), 0); else timer_adjust_oneshot(state->SQW_timer, half_period, 0); } else { state->SQW_internal_state = 0; /* right??? */ /* Stop the divider used for SQW and periodic interrupts. */ timer_adjust_oneshot(state->SQW_timer, attotime_never, 0); } } /* The UIP bit is read-only */ state->regs[reg_A] = (data & ~reg_A_UIP) | (state->regs[reg_A] & reg_A_UIP); break; case reg_B: state->regs[state->cur_reg] = data; if (data & reg_B_SET) { /* if we are in SET mode, clear update cycle */ state->regs[reg_A] &= ~reg_A_UIP; state->regs[reg_B] &= ~reg_B_UIE; /* the data sheet tells this, but I wonder how much sense it makes */ field_interrupts(device); } break; case reg_C: case reg_D: break; default: state->regs[state->cur_reg] = data; break; } else /* indirect address register */ state->cur_reg = data & 0x3f; } } WRITE8_DEVICE_HANDLER( rtc65271_rtc_w ) { rtc65271_w( device, 0, offset, data ); } WRITE8_DEVICE_HANDLER( rtc65271_xram_w ) { rtc65271_w( device, 1, offset, data ); } static void field_interrupts(device_t *device) { rtc65271_state *state = get_safe_token(device); if (state->regs[reg_C] & state->regs[reg_B] & (reg_C_PF | reg_C_AF | reg_C_UF)) { state->regs[reg_C] |= reg_C_IRQF; if (state->interrupt_callback) state->interrupt_callback(device, 1); } else { state->regs[reg_C] &= ~reg_C_IRQF; if (state->interrupt_callback) state->interrupt_callback(device, 0); } } /* Timer handlers */ /* Update SQW output state each half-period and assert periodic interrupt each period. */ static TIMER_CALLBACK( rtc_SQW_callback ) { device_t *device = (device_t *)ptr; rtc65271_state *state = get_safe_token(device); attotime half_period; state->SQW_internal_state = ! state->SQW_internal_state; if (! state->SQW_internal_state) { /* high-to-low??? transition -> interrupt (or should it be low-to-high?) */ state->regs[reg_C] |= reg_C_PF; field_interrupts(device); } half_period = attotime_div(ATTOTIME_IN_HZ(SQW_freq_table[state->regs[reg_A] & reg_A_RS]), 2); timer_adjust_oneshot(state->SQW_timer, half_period, 0); } /* Begin update cycle (called every second) */ static TIMER_CALLBACK( rtc_begin_update_callback ) { device_t *device = (device_t *)ptr; rtc65271_state *state = get_safe_token(device); if (((state->regs[reg_A] & reg_A_DV) == 0x20) && ! (state->regs[reg_B] & reg_B_SET)) { state->regs[reg_A] |= reg_A_UIP; /* schedule end of update cycle */ timer_set(device->machine, UPDATE_CYCLE_TIME, (void *)device, 0, rtc_end_update_callback); } } /* End update cycle (called UPDATE_CYCLE_TIME = 1948us after start of update cycle) */ static TIMER_CALLBACK( rtc_end_update_callback ) { static const int days_in_month_table[12] = { 31,28,31, 30,31,30, 31,31,30, 31,30,31 }; device_t *device = (device_t *)ptr; rtc65271_state *state = get_safe_token(device); UINT8 (*increment)(UINT8 data); int c59, c23, c12, c11, c29; if (! (state->regs[reg_A] & reg_A_UIP)) /* abort if update cycle has been canceled */ return; if (state->regs[reg_B] & reg_B_DM) { /* binary mode */ increment = increment_binary; c59 = 59; c23 = 23; c12 = 12; c11 = 11; c29 = 29; } else { /* BCD mode */ increment = increment_BCD; c59 = 0x59; c23 = 0x23; c12 = 0x12; c11 = 0x11; c29 = 0x29; } /* increment second */ if (state->regs[reg_second] < c59) state->regs[reg_second] = (*increment)(state->regs[reg_second]); else { state->regs[reg_second] = 0; /* increment minute */ if (state->regs[reg_minute] < c59) state->regs[reg_minute] = (*increment)(state->regs[reg_minute]); else { state->regs[reg_minute] = 0; /* increment hour */ if (state->regs[reg_B] & reg_B_24h) { /* 24 hour mode */ if (state->regs[reg_hour] < c23) state->regs[reg_hour] = (*increment)(state->regs[reg_hour]); else state->regs[reg_hour] = 0; } else { /* 12 hour mode */ if (state->regs[reg_hour] < c12) { if ((state->regs[reg_hour] & 0x7f) == c11) state->regs[reg_hour] ^= 0x80; state->regs[reg_hour] = ((*increment)(state->regs[reg_hour] & 0x7f) & 0x7f) | (state->regs[reg_hour] & 0x80); } else state->regs[reg_hour] = 1 | (state->regs[reg_hour] & 0x80); } /* increment day if needed */ if (state->regs[reg_hour] == ((state->regs[reg_B] & reg_B_24h) ? 0 : c12)) { /* increment day */ int days_in_month; if (state->regs[reg_weekday] < 7) state->regs[reg_weekday]++; else state->regs[reg_weekday] = 1; if ((state->regs[reg_month] != 2) || (state->regs[reg_year] & 0x03)) { if (state->regs[reg_B] & reg_B_DM) { /* binary mode */ days_in_month = days_in_month_table[state->regs[reg_month] - 1]; } else { /* BCD mode */ days_in_month = binary_to_BCD(days_in_month_table[BCD_to_binary(state->regs[reg_month]) - 1]); } } else days_in_month = c29; if (state->regs[reg_monthday] < days_in_month) state->regs[reg_monthday] = (*increment)(state->regs[reg_monthday]); else { /* increment month */ state->regs[reg_monthday] = 1; if (state->regs[reg_month] < c12) state->regs[reg_month] = (*increment)(state->regs[reg_month]); else { /* increment year */ state->regs[reg_month] = 1; if (state->regs[reg_B] & reg_B_DM) { /* binary mode */ if (state->regs[reg_year] < 99) state->regs[reg_year]++; else state->regs[reg_year] = 0; } else { /* BCD mode */ state->regs[reg_year] = increment_BCD(state->regs[reg_year]); } } } } } } state->regs[reg_A] &= ~reg_A_UIP; state->regs[reg_C] |= reg_C_UF; /* test for alarm (values in range 0xc0-0xff mean "don't care") */ if ((((state->regs[reg_alarm_second] & 0xc0) == 0xc0) || (state->regs[reg_alarm_second] == state->regs[reg_second])) && (((state->regs[reg_alarm_minute] & 0xc0) == 0xc0) || (state->regs[reg_alarm_minute] == state->regs[reg_minute])) && (((state->regs[reg_alarm_hour] & 0xc0) == 0xc0) || (state->regs[reg_alarm_hour] == state->regs[reg_hour]))) state->regs[reg_C] |= reg_C_AF; field_interrupts(device); } /* Initialize clock interrupt_callback: callback called when interrupt pin state changes (may be NULL) */ static DEVICE_START( rtc65271 ) { rtc65271_config *config = (rtc65271_config *)downcast<const legacy_device_config_base &>(device->baseconfig()).inline_config(); rtc65271_state *state = get_safe_token(device); state->update_timer = timer_alloc(device->machine, rtc_begin_update_callback, (void *)device); timer_adjust_periodic(state->update_timer, ATTOTIME_IN_SEC(1), 0, ATTOTIME_IN_SEC(1)); state->SQW_timer = timer_alloc(device->machine, rtc_SQW_callback, (void *)device); state->interrupt_callback = config->interrupt_callback; state_save_register_device_item_array(device, 0, state->regs); state_save_register_device_item(device, 0, state->cur_reg); state_save_register_device_item_array(device, 0, state->xram); state_save_register_device_item(device, 0, state->cur_xram_page); state_save_register_device_item(device, 0, state->SQW_internal_state); } static DEVICE_NVRAM( rtc65271 ) { if (read_or_write) rtc65271_file_save(device, file); else if (file) rtc65271_file_load(device, file); } static const char DEVTEMPLATE_SOURCE[] = __FILE__; #define DEVTEMPLATE_ID(p,s) p##rtc65271##s #define DEVTEMPLATE_FEATURES DT_HAS_START | DT_HAS_NVRAM | DT_HAS_INLINE_CONFIG #define DEVTEMPLATE_NAME "RTC65271" #define DEVTEMPLATE_FAMILY "RTC" #include "devtempl.h" DEFINE_LEGACY_NVRAM_DEVICE(RTC65271, rtc65271);