diff options
Diffstat (limited to 'src')
296 files changed, 12821 insertions, 7395 deletions
diff --git a/src/devices/bus/a2bus/a2thunderclock.cpp b/src/devices/bus/a2bus/a2thunderclock.cpp index dfa54932f5a..69cc87a07ff 100644 --- a/src/devices/bus/a2bus/a2thunderclock.cpp +++ b/src/devices/bus/a2bus/a2thunderclock.cpp @@ -54,9 +54,11 @@ ROM_END // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(a2bus_thunderclock_device::device_add_mconfig) - MCFG_UPD1990A_ADD(THUNDERCLOCK_UPD1990_TAG, 1021800, WRITELINE(DEVICE_SELF, a2bus_thunderclock_device, upd_dataout_w), NOOP) -MACHINE_CONFIG_END +void a2bus_thunderclock_device::device_add_mconfig(machine_config &config) +{ + UPD1990A(config, m_upd1990ac, 1021800); + m_upd1990ac->data_callback().set(FUNC(a2bus_thunderclock_device::upd_dataout_w)); +} //------------------------------------------------- // rom_region - device-specific ROM region diff --git a/src/devices/bus/a2bus/corvfdc02.cpp b/src/devices/bus/a2bus/corvfdc02.cpp index 04282f080a1..4b67b6e364f 100644 --- a/src/devices/bus/a2bus/corvfdc02.cpp +++ b/src/devices/bus/a2bus/corvfdc02.cpp @@ -52,15 +52,16 @@ ROM_END // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(a2bus_corvfdc02_device::device_add_mconfig) - MCFG_UPD765A_ADD(FDC02_FDC_TAG, true, false) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, a2bus_corvfdc02_device, intrq_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, a2bus_corvfdc02_device, drq_w)) - MCFG_FLOPPY_DRIVE_ADD(FDC02_FDC_TAG":0", corv_floppies, "525dsqd", a2bus_corvfdc02_device::corv_floppy_formats) - MCFG_FLOPPY_DRIVE_ADD(FDC02_FDC_TAG":1", corv_floppies, "525dsqd", a2bus_corvfdc02_device::corv_floppy_formats) - MCFG_FLOPPY_DRIVE_ADD(FDC02_FDC_TAG":2", corv_floppies, "525dsqd", a2bus_corvfdc02_device::corv_floppy_formats) - MCFG_FLOPPY_DRIVE_ADD(FDC02_FDC_TAG":3", corv_floppies, "525dsqd", a2bus_corvfdc02_device::corv_floppy_formats) -MACHINE_CONFIG_END +void a2bus_corvfdc02_device::device_add_mconfig(machine_config &config) +{ + UPD765A(config, m_fdc, true, false); + m_fdc->intrq_wr_callback().set(FUNC(a2bus_corvfdc02_device::intrq_w)); + m_fdc->drq_wr_callback().set(FUNC(a2bus_corvfdc02_device::drq_w)); + FLOPPY_CONNECTOR(config, m_con1, corv_floppies, "525dsqd", a2bus_corvfdc02_device::corv_floppy_formats); + FLOPPY_CONNECTOR(config, m_con2, corv_floppies, "525dsqd", a2bus_corvfdc02_device::corv_floppy_formats); + FLOPPY_CONNECTOR(config, m_con3, corv_floppies, "525dsqd", a2bus_corvfdc02_device::corv_floppy_formats); + FLOPPY_CONNECTOR(config, m_con4, corv_floppies, "525dsqd", a2bus_corvfdc02_device::corv_floppy_formats); +} //------------------------------------------------- // rom_region - device-specific ROM region diff --git a/src/devices/bus/bbc/fdc/opus.cpp b/src/devices/bus/bbc/fdc/opus.cpp index 85eb8f5e7e9..0a0bb79ffd0 100644 --- a/src/devices/bus/bbc/fdc/opus.cpp +++ b/src/devices/bus/bbc/fdc/opus.cpp @@ -91,8 +91,7 @@ ROM_END void bbc_opus8272_device::device_add_mconfig(machine_config &config) { - I8272A(config, m_fdc, 0); - m_fdc->set_ready_line_connected(true); + I8272A(config, m_fdc, true); m_fdc->intrq_wr_callback().set(FUNC(bbc_opus8272_device::fdc_intrq_w)); FLOPPY_CONNECTOR(config, m_floppy0, bbc_floppies_525, "525qd", bbc_opusfdc_device::floppy_formats).enable_sound(true); diff --git a/src/devices/bus/bbc/tube/tube.cpp b/src/devices/bus/bbc/tube/tube.cpp index c69b57cd45f..521497361ee 100644 --- a/src/devices/bus/bbc/tube/tube.cpp +++ b/src/devices/bus/bbc/tube/tube.cpp @@ -113,7 +113,6 @@ WRITE8_MEMBER(bbc_tube_slot_device::host_w) // slot devices #include "tube_6502.h" -#include "tube_65c102.h" #include "tube_80186.h" #include "tube_80286.h" //#include "tube_a500.h" diff --git a/src/devices/bus/bbc/tube/tube_6502.cpp b/src/devices/bus/bbc/tube/tube_6502.cpp index 3aa3c6a1175..8120ab16812 100644 --- a/src/devices/bus/bbc/tube/tube_6502.cpp +++ b/src/devices/bus/bbc/tube/tube_6502.cpp @@ -6,6 +6,10 @@ http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Acorn_ANC01_65022ndproc.html + Acorn ADC06 65C102 Co-processor + + http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Acorn_ADC06_65C102CoPro.html + **********************************************************************/ @@ -18,7 +22,8 @@ // DEVICE DEFINITIONS //************************************************************************** -DEFINE_DEVICE_TYPE(BBC_TUBE_6502, bbc_tube_6502_device, "bbc_tube_6502", "Acorn 6502 2nd Processor") +DEFINE_DEVICE_TYPE(BBC_TUBE_6502, bbc_tube_6502_device, "bbc_tube_6502", "Acorn 6502 2nd Processor") +DEFINE_DEVICE_TYPE(BBC_TUBE_65C102, bbc_tube_65c102_device, "bbc_tube_65c102", "Acorn 65C102 Co-Processor") //------------------------------------------------- @@ -27,7 +32,17 @@ DEFINE_DEVICE_TYPE(BBC_TUBE_6502, bbc_tube_6502_device, "bbc_tube_6502", "Acorn void bbc_tube_6502_device::tube_6502_mem(address_map &map) { - map(0x0000, 0xffff).rw(FUNC(bbc_tube_6502_device::read), FUNC(bbc_tube_6502_device::write)); + map(0x0000, 0xffff).m(m_bankdev, FUNC(address_map_bank_device::amap8)); + map(0xfef0, 0xfeff).rw(FUNC(bbc_tube_6502_device::tube_r), FUNC(bbc_tube_6502_device::tube_w)); +} + +void bbc_tube_6502_device::tube_6502_bank(address_map &map) +{ + // ROM enabled + map(0x00000, 0x0ffff).ram().share("ram"); + map(0x0f000, 0x0ffff).rom().region("rom", 0); + // ROM disabled + map(0x10000, 0x1ffff).ram().share("ram"); } //------------------------------------------------- @@ -36,21 +51,33 @@ void bbc_tube_6502_device::tube_6502_mem(address_map &map) ROM_START( tube_6502 ) ROM_REGION(0x1000, "rom", 0) - ROM_LOAD("6502tube.rom", 0x0000, 0x1000, CRC(98b5fe42) SHA1(338269d03cf6bfa28e09d1651c273ea53394323b)) + ROM_DEFAULT_BIOS("110") + ROM_SYSTEM_BIOS(0, "110", "Tube 1.10") + ROMX_LOAD("6502tube.rom", 0x0000, 0x1000, CRC(98b5fe42) SHA1(338269d03cf6bfa28e09d1651c273ea53394323b), ROM_BIOS(0)) + ROM_SYSTEM_BIOS(1, "121", "Tube 1.21 (ReCo6502)") + ROMX_LOAD("reco6502tube.rom", 0x0000, 0x1000, CRC(75b2a466) SHA1(9ecef24de58a48c3fbe01b12888c3f6a5d24f57f), ROM_BIOS(1)) +ROM_END + +ROM_START( tube_65c102 ) + ROM_REGION(0x1000, "rom", 0) + ROM_DEFAULT_BIOS("110") + ROM_SYSTEM_BIOS(0, "110", "Tube 1.10") + ROMX_LOAD("65c102_boot_110.rom", 0x0000, 0x1000, CRC(ad5b70cc) SHA1(0ac9a1c70e55a79e2c81e102afae1d016af229fa), ROM_BIOS(0)) // 2201,243-02 + ROM_SYSTEM_BIOS(1, "121", "Tube 1.21 (ReCo6502)") + ROMX_LOAD("reco6502tube.rom", 0x0000, 0x1000, CRC(75b2a466) SHA1(9ecef24de58a48c3fbe01b12888c3f6a5d24f57f), ROM_BIOS(1)) ROM_END //------------------------------------------------- // device_add_mconfig - add device configuration //------------------------------------------------- -void bbc_tube_6502_device::device_add_mconfig(machine_config &config) +void bbc_tube_6502_device::add_common_devices(machine_config &config) { - M65C02(config, m_m6502, 12_MHz_XTAL / 4); - m_m6502->set_addrmap(AS_PROGRAM, &bbc_tube_6502_device::tube_6502_mem); + ADDRESS_MAP_BANK(config, m_bankdev).set_map(&bbc_tube_6502_device::tube_6502_bank).set_options(ENDIANNESS_LITTLE, 8, 17, 0x10000); TUBE(config, m_ula); - m_ula->pnmi_handler().set_inputline(m_m6502, M65C02_NMI_LINE); - m_ula->pirq_handler().set_inputline(m_m6502, M65C02_IRQ_LINE); + m_ula->pnmi_handler().set_inputline(m_maincpu, M65C02_NMI_LINE); + m_ula->pirq_handler().set_inputline(m_maincpu, M65C02_IRQ_LINE); /* internal ram */ RAM(config, m_ram).set_default_size("64K").set_default_value(0); @@ -60,6 +87,22 @@ void bbc_tube_6502_device::device_add_mconfig(machine_config &config) SOFTWARE_LIST(config, "flop_ls_65c102").set_original("bbc_flop_65c102"); } +void bbc_tube_6502_device::device_add_mconfig(machine_config &config) +{ + M65C02(config, m_maincpu, 12_MHz_XTAL / 4); + m_maincpu->set_addrmap(AS_PROGRAM, &bbc_tube_6502_device::tube_6502_mem); + + add_common_devices(config); +} + +void bbc_tube_65c102_device::device_add_mconfig(machine_config &config) +{ + M65C02(config, m_maincpu, 16_MHz_XTAL / 4); + m_maincpu->set_addrmap(AS_PROGRAM, &bbc_tube_65c102_device::tube_6502_mem); + + add_common_devices(config); +} + //------------------------------------------------- // rom_region - device-specific ROM region //------------------------------------------------- @@ -69,6 +112,11 @@ const tiny_rom_entry *bbc_tube_6502_device::device_rom_region() const return ROM_NAME( tube_6502 ); } +const tiny_rom_entry *bbc_tube_65c102_device::device_rom_region() const +{ + return ROM_NAME( tube_65c102 ); +} + //************************************************************************** // LIVE DEVICE //************************************************************************** @@ -77,14 +125,24 @@ const tiny_rom_entry *bbc_tube_6502_device::device_rom_region() const // bbc_tube_6502_device - constructor //------------------------------------------------- +bbc_tube_6502_device::bbc_tube_6502_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) + , device_bbc_tube_interface(mconfig, *this) + , m_maincpu(*this, "maincpu") + , m_bankdev(*this, "bankdev") + , m_ula(*this, "ula") + , m_ram(*this, "ram") + , m_rom(*this, "rom") +{ +} + bbc_tube_6502_device::bbc_tube_6502_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, BBC_TUBE_6502, tag, owner, clock), - device_bbc_tube_interface(mconfig, *this), - m_m6502(*this, "m6502"), - m_ula(*this, "ula"), - m_ram(*this, "ram"), - m_rom(*this, "rom"), - m_rom_enabled(true) + : bbc_tube_6502_device(mconfig, BBC_TUBE_6502, tag, owner, clock) +{ +} + +bbc_tube_65c102_device::bbc_tube_65c102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : bbc_tube_6502_device(mconfig, BBC_TUBE_65C102, tag, owner, clock) { } @@ -94,7 +152,6 @@ bbc_tube_6502_device::bbc_tube_6502_device(const machine_config &mconfig, const void bbc_tube_6502_device::device_start() { - m_slot = dynamic_cast<bbc_tube_slot_device *>(owner()); } //------------------------------------------------- @@ -103,9 +160,7 @@ void bbc_tube_6502_device::device_start() void bbc_tube_6502_device::device_reset() { - m_ula->reset(); - - m_rom_enabled = true; + m_bankdev->set_bank(0); } @@ -124,34 +179,16 @@ WRITE8_MEMBER(bbc_tube_6502_device::host_w) } -READ8_MEMBER(bbc_tube_6502_device::read) +READ8_MEMBER(bbc_tube_6502_device::tube_r) { - uint8_t data; + // Disable ROM on first access + if (!machine().side_effects_disabled()) + m_bankdev->set_bank(1); - if (offset >= 0xfef0 && offset <= 0xfeff) - { - if (!machine().side_effects_disabled()) m_rom_enabled = false; - data = m_ula->parasite_r(space, offset); - } - else if (m_rom_enabled && (offset >= 0xf000)) - { - data = m_rom->base()[offset & 0xfff]; - } - else - { - data = m_ram->pointer()[offset]; - } - return data; + return m_ula->parasite_r(space, offset); } -WRITE8_MEMBER(bbc_tube_6502_device::write) +WRITE8_MEMBER(bbc_tube_6502_device::tube_w) { - if (offset >= 0xfef0 && offset <= 0xfeff) - { - m_ula->parasite_w(space, offset, data); - } - else - { - m_ram->pointer()[offset] = data; - } + m_ula->parasite_w(space, offset, data); } diff --git a/src/devices/bus/bbc/tube/tube_6502.h b/src/devices/bus/bbc/tube/tube_6502.h index 67d14bd539f..244eb9f2105 100644 --- a/src/devices/bus/bbc/tube/tube_6502.h +++ b/src/devices/bus/bbc/tube/tube_6502.h @@ -6,6 +6,10 @@ http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Acorn_ANC01_65022ndproc.html + Acorn ADC06 65C102 Co-processor + + http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Acorn_ADC06_65C102CoPro.html + **********************************************************************/ @@ -14,6 +18,7 @@ #include "tube.h" #include "cpu/m6502/m65c02.h" +#include "machine/bankdev.h" #include "machine/ram.h" #include "machine/tube.h" @@ -32,6 +37,8 @@ public: bbc_tube_6502_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); protected: + bbc_tube_6502_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + // device-level overrides virtual void device_start() override; virtual void device_reset() override; @@ -40,26 +47,40 @@ protected: virtual void device_add_mconfig(machine_config &config) override; virtual const tiny_rom_entry *device_rom_region() const override; + void tube_6502_bank(address_map &map); + void tube_6502_mem(address_map &map); + + void add_common_devices(machine_config &config); + virtual DECLARE_READ8_MEMBER( host_r ) override; virtual DECLARE_WRITE8_MEMBER( host_w ) override; -private: - required_device<cpu_device> m_m6502; + virtual DECLARE_READ8_MEMBER( tube_r ); + virtual DECLARE_WRITE8_MEMBER( tube_w ); + + required_device<cpu_device> m_maincpu; + required_device<address_map_bank_device> m_bankdev; required_device<tube_device> m_ula; required_device<ram_device> m_ram; required_memory_region m_rom; +}; - bool m_rom_enabled; - DECLARE_READ8_MEMBER( read ); - DECLARE_WRITE8_MEMBER( write ); +class bbc_tube_65c102_device : public bbc_tube_6502_device +{ +public: + bbc_tube_65c102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - void tube_6502_mem(address_map &map); +protected: + // optional information overrides + virtual void device_add_mconfig(machine_config &config) override; + virtual const tiny_rom_entry *device_rom_region() const override; }; // device type definition DECLARE_DEVICE_TYPE(BBC_TUBE_6502, bbc_tube_6502_device) +DECLARE_DEVICE_TYPE(BBC_TUBE_65C102, bbc_tube_65c102_device) #endif /* MAME_BUS_BBC_TUBE_6502_H */ diff --git a/src/devices/bus/bbc/tube/tube_65c102.cpp b/src/devices/bus/bbc/tube/tube_65c102.cpp deleted file mode 100644 index 1ef92732526..00000000000 --- a/src/devices/bus/bbc/tube/tube_65c102.cpp +++ /dev/null @@ -1,157 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Nigel Barnes -/********************************************************************** - - Acorn ADC06 65C102 Co-processor - - http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Acorn_ADC06_65C102CoPro.html - -**********************************************************************/ - - -#include "emu.h" -#include "tube_65c102.h" -#include "softlist_dev.h" - - -//************************************************************************** -// DEVICE DEFINITIONS -//************************************************************************** - -DEFINE_DEVICE_TYPE(BBC_TUBE_65C102, bbc_tube_65c102_device, "bbc_tube_65c102", "Acorn 65C102 Co-Processor") - - -//------------------------------------------------- -// ADDRESS_MAP( tube_6502_mem ) -//------------------------------------------------- - -void bbc_tube_65c102_device::tube_6502_mem(address_map &map) -{ - map(0x0000, 0xffff).rw(FUNC(bbc_tube_65c102_device::read), FUNC(bbc_tube_65c102_device::write)); -} - -//------------------------------------------------- -// ROM( tube_65c102 ) -//------------------------------------------------- - -ROM_START( tube_65c102 ) - ROM_REGION(0x1000, "rom", 0) - ROM_LOAD("65c102_boot_110.rom", 0x0000, 0x1000, CRC(ad5b70cc) SHA1(0ac9a1c70e55a79e2c81e102afae1d016af229fa)) // 2201,243-02 -ROM_END - -//------------------------------------------------- -// device_add_mconfig - add device configuration -//------------------------------------------------- - -void bbc_tube_65c102_device::device_add_mconfig(machine_config &config) -{ - M65C02(config, m_maincpu, 16_MHz_XTAL / 4); - m_maincpu->set_addrmap(AS_PROGRAM, &bbc_tube_65c102_device::tube_6502_mem); - - TUBE(config, m_ula); - m_ula->pnmi_handler().set_inputline(m_maincpu, M65C02_NMI_LINE); - m_ula->pirq_handler().set_inputline(m_maincpu, M65C02_IRQ_LINE); - - /* internal ram */ - RAM(config, m_ram).set_default_size("64K").set_default_value(0); - - /* software lists */ - SOFTWARE_LIST(config, "flop_ls_6502").set_original("bbc_flop_6502"); - SOFTWARE_LIST(config, "flop_ls_65c102").set_original("bbc_flop_65c102"); -} - -//------------------------------------------------- -// rom_region - device-specific ROM region -//------------------------------------------------- - -const tiny_rom_entry *bbc_tube_65c102_device::device_rom_region() const -{ - return ROM_NAME( tube_65c102 ); -} - -//************************************************************************** -// LIVE DEVICE -//************************************************************************** - -//------------------------------------------------- -// bbc_tube_65c102_device - constructor -//------------------------------------------------- - -bbc_tube_65c102_device::bbc_tube_65c102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, BBC_TUBE_65C102, tag, owner, clock), - device_bbc_tube_interface(mconfig, *this), - m_maincpu(*this, "maincpu"), - m_ula(*this, "ula"), - m_ram(*this, "ram"), - m_rom(*this, "rom"), - m_rom_enabled(true) -{ -} - -//------------------------------------------------- -// device_start - device-specific startup -//------------------------------------------------- - -void bbc_tube_65c102_device::device_start() -{ - m_slot = dynamic_cast<bbc_tube_slot_device *>(owner()); -} - -//------------------------------------------------- -// device_reset - device-specific reset -//------------------------------------------------- - -void bbc_tube_65c102_device::device_reset() -{ - m_ula->reset(); - - m_rom_enabled = true; -} - - -//************************************************************************** -// IMPLEMENTATION -//************************************************************************** - -READ8_MEMBER(bbc_tube_65c102_device::host_r) -{ - return m_ula->host_r(space, offset); -} - -WRITE8_MEMBER(bbc_tube_65c102_device::host_w) -{ - m_ula->host_w(space, offset, data); -} - - -READ8_MEMBER(bbc_tube_65c102_device::read) -{ - uint8_t data; - - if ((offset >= 0xfef0) && (offset <= 0xfeff)) - { - if (!machine().side_effects_disabled()) m_rom_enabled = false; - data = m_ula->parasite_r(space, offset); - } - else if (m_rom_enabled && (offset >= 0xf000)) - { - data = m_rom->base()[offset & 0xfff]; - } - else - { - data = m_ram->pointer()[offset]; - } - return data; -} - -WRITE8_MEMBER(bbc_tube_65c102_device::write) -{ - if ((offset >= 0xfef0) && (offset <= 0xfeff)) - { - m_ula->parasite_w(space, offset, data); - } - else - { - m_ram->pointer()[offset] = data; - } -} diff --git a/src/devices/bus/bbc/tube/tube_65c102.h b/src/devices/bus/bbc/tube/tube_65c102.h deleted file mode 100644 index 1ba891739d1..00000000000 --- a/src/devices/bus/bbc/tube/tube_65c102.h +++ /dev/null @@ -1,66 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Nigel Barnes -/********************************************************************** - - Acorn ADC06 65C102 Co-processor - - http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Acorn_ADC06_65C102CoPro.html - -**********************************************************************/ - - -#ifndef MAME_BUS_BBC_TUBE_65C102_H -#define MAME_BUS_BBC_TUBE_65C102_H - -#include "tube.h" -#include "cpu/m6502/m65c02.h" -#include "machine/ram.h" -#include "machine/tube.h" - -//************************************************************************** -// TYPE DEFINITIONS -//************************************************************************** - -// ======================> bbc_tube_65c102_device - -class bbc_tube_65c102_device : - public device_t, - public device_bbc_tube_interface -{ -public: - // construction/destruction - bbc_tube_65c102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - -protected: - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; - - // optional information overrides - virtual void device_add_mconfig(machine_config &config) override; - virtual const tiny_rom_entry *device_rom_region() const override; - - virtual DECLARE_READ8_MEMBER( host_r ) override; - virtual DECLARE_WRITE8_MEMBER( host_w ) override; - -private: - required_device<cpu_device> m_maincpu; - required_device<tube_device> m_ula; - required_device<ram_device> m_ram; - required_memory_region m_rom; - - bool m_rom_enabled; - - DECLARE_READ8_MEMBER( read ); - DECLARE_WRITE8_MEMBER( write ); - - void tube_6502_mem(address_map &map); -}; - - - -// device type definition -DECLARE_DEVICE_TYPE(BBC_TUBE_65C102, bbc_tube_65c102_device) - - -#endif /* MAME_BUS_BBC_TUBE_65C102_H */ diff --git a/src/devices/bus/coco/coco_pak.cpp b/src/devices/bus/coco/coco_pak.cpp index 6605a992f14..7c184dc67ad 100644 --- a/src/devices/bus/coco/coco_pak.cpp +++ b/src/devices/bus/coco/coco_pak.cpp @@ -199,7 +199,7 @@ uint8_t *coco_pak_banked_device::get_cart_base() uint32_t coco_pak_banked_device::get_cart_size() { - return 0x4000; + return 0x20000; } //------------------------------------------------- diff --git a/src/devices/bus/cpc/ddi1.cpp b/src/devices/bus/cpc/ddi1.cpp index bac64263871..6e75738d76a 100644 --- a/src/devices/bus/cpc/ddi1.cpp +++ b/src/devices/bus/cpc/ddi1.cpp @@ -41,7 +41,7 @@ const tiny_rom_entry *cpc_ddi1_device::device_rom_region() const // device machine config MACHINE_CONFIG_START(cpc_ddi1_device::device_add_mconfig) - MCFG_UPD765A_ADD("upd765", true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD("upd765:0", ddi1_floppies, "3ssdd", floppy_image_device::default_floppy_formats) MCFG_SOFTWARE_LIST_ADD("flop_list","cpc_flop") diff --git a/src/devices/bus/epson_sio/pf10.cpp b/src/devices/bus/epson_sio/pf10.cpp index b1c2859599d..a295975d964 100644 --- a/src/devices/bus/epson_sio/pf10.cpp +++ b/src/devices/bus/epson_sio/pf10.cpp @@ -72,7 +72,7 @@ MACHINE_CONFIG_START(epson_pf10_device::device_add_mconfig) MCFG_DEVICE_IO_MAP(cpu_io) MCFG_M6801_SER_TX(WRITELINE(DEVICE_SELF, epson_pf10_device, hd6303_tx_w)) - MCFG_UPD765A_ADD("upd765a", false, true) + UPD765A(config, m_fdc, false, true); MCFG_FLOPPY_DRIVE_ADD("upd765a:0", pf10_floppies, "smd165", floppy_image_device::default_floppy_formats) MCFG_EPSON_SIO_ADD("sio", nullptr) diff --git a/src/devices/bus/epson_sio/tf20.cpp b/src/devices/bus/epson_sio/tf20.cpp index 1ba26849112..bc9bb669b1e 100644 --- a/src/devices/bus/epson_sio/tf20.cpp +++ b/src/devices/bus/epson_sio/tf20.cpp @@ -101,8 +101,8 @@ MACHINE_CONFIG_START(epson_tf20_device::device_add_mconfig) m_mpsc->out_dtra_callback().set(FUNC(epson_tf20_device::dtra_w)); // floppy disk controller - MCFG_UPD765A_ADD("5a", true, true) - MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE("19b", INPUT_LINE_IRQ0)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set_inputline(m_cpu, INPUT_LINE_IRQ0); // floppy drives MCFG_FLOPPY_DRIVE_ADD("5a:0", tf20_floppies, "sd320", floppy_image_device::default_floppy_formats) diff --git a/src/devices/bus/generic/slot.h b/src/devices/bus/generic/slot.h index d0f76b2ea78..d0c0d84a053 100644 --- a/src/devices/bus/generic/slot.h +++ b/src/devices/bus/generic/slot.h @@ -208,13 +208,14 @@ class generic_cartslot_device : public generic_slot_device { public: template <typename T> - generic_cartslot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *intf, const char *exts) + generic_cartslot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *intf, const char *exts = nullptr) : generic_cartslot_device(mconfig, tag, owner, (uint32_t)0) { opts(*this); set_fixed(false); set_interface(intf); - set_extensions(exts); + if (exts) + set_extensions(exts); } generic_cartslot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); diff --git a/src/devices/bus/hexbus/hx5102.cpp b/src/devices/bus/hexbus/hx5102.cpp index cb715ec51fe..1fbced1bc80 100644 --- a/src/devices/bus/hexbus/hx5102.cpp +++ b/src/devices/bus/hexbus/hx5102.cpp @@ -688,8 +688,7 @@ void hx5102_device::device_add_mconfig(machine_config& config) // Not connected: Select lines (DS0, DS1), Head load (HDL), VCO // Tied to 1: READY // Tied to 0: TC - I8272A(config, m_floppy_ctrl, 0); - m_floppy_ctrl->set_ready_line_connected(false); + I8272A(config, m_floppy_ctrl, false); m_floppy_ctrl->intrq_wr_callback().set(FUNC(hx5102_device::fdc_irq_w)); m_floppy_ctrl->drq_wr_callback().set(FUNC(hx5102_device::fdc_drq_w)); diff --git a/src/devices/bus/hp_dio/hp98543.cpp b/src/devices/bus/hp_dio/hp98543.cpp index b9d75b5a7eb..00de8cc43f9 100644 --- a/src/devices/bus/hp_dio/hp98543.cpp +++ b/src/devices/bus/hp_dio/hp98543.cpp @@ -21,7 +21,10 @@ ROM_START(hp98543) ROM_LOAD("1818-3907.bin", 0x000000, 0x002000, CRC(5e2bf02a) SHA1(9ba9391cf39624ef8027ce42c84e100344b2a2b8)) ROM_END -DEFINE_DEVICE_TYPE(HPDIO_98543, dio16_98543_device, "dio98543", "HP98543 medium-res color DIO video card") +DEFINE_DEVICE_TYPE_NS(HPDIO_98543, bus::hp_dio, dio16_98543_device, "dio98543", "HP98543 medium-res color DIO video card") + +namespace bus { + namespace hp_dio { MACHINE_CONFIG_START(dio16_98543_device::device_add_mconfig) MCFG_SCREEN_ADD(HP98543_SCREEN_NAME, RASTER) @@ -53,7 +56,6 @@ MACHINE_CONFIG_START(dio16_98543_device::device_add_mconfig) MCFG_DEVICE_ADD("nereid", NEREID, 0) MACHINE_CONFIG_END - const tiny_rom_entry *dio16_98543_device::device_rom_region() const { return ROM_NAME(hp98543); @@ -190,3 +192,6 @@ uint32_t dio16_98543_device::screen_update(screen_device &screen, bitmap_rgb32 & } return 0; } + +} // namespace bus::hp_dio +} // namespace bus diff --git a/src/devices/bus/hp_dio/hp98543.h b/src/devices/bus/hp_dio/hp98543.h index c1b9a5762bf..e676cfe5867 100644 --- a/src/devices/bus/hp_dio/hp98543.h +++ b/src/devices/bus/hp_dio/hp98543.h @@ -11,6 +11,9 @@ #include "video/nereid.h" #include "machine/ram.h" +namespace bus { + namespace hp_dio { + class dio16_98543_device : public device_t, public device_dio16_card_interface, @@ -57,7 +60,10 @@ private: }; +} // namespace bus::hp_dio +} // namespace bus + // device type definition -DECLARE_DEVICE_TYPE(HPDIO_98543, dio16_98543_device) +DECLARE_DEVICE_TYPE_NS(HPDIO_98543, bus::hp_dio, dio16_98543_device) #endif // MAME_BUS_HPDIO_98543_H diff --git a/src/devices/bus/hp_dio/hp98544.cpp b/src/devices/bus/hp_dio/hp98544.cpp index 824a393ddd2..b797c859df4 100644 --- a/src/devices/bus/hp_dio/hp98544.cpp +++ b/src/devices/bus/hp_dio/hp98544.cpp @@ -24,8 +24,10 @@ ROM_END // GLOBAL VARIABLES //************************************************************************** -DEFINE_DEVICE_TYPE(HPDIO_98544, dio16_98544_device, "dio98544", "HP98544 high-res monochrome DIO video card") +DEFINE_DEVICE_TYPE_NS(HPDIO_98544, bus::hp_dio, dio16_98544_device, "dio98544", "HP98544 high-res monochrome DIO video card") +namespace bus { + namespace hp_dio { //------------------------------------------------- // device_add_mconfig - add device configuration @@ -156,4 +158,5 @@ uint32_t dio16_98544_device::screen_update(screen_device &screen, bitmap_rgb32 & return 0; } - +} // namespace bus::hp_dio +} // namespace bus diff --git a/src/devices/bus/hp_dio/hp98544.h b/src/devices/bus/hp_dio/hp98544.h index 74e12905834..ab53db6933c 100644 --- a/src/devices/bus/hp_dio/hp98544.h +++ b/src/devices/bus/hp_dio/hp98544.h @@ -14,6 +14,9 @@ // ======================> dio16_98544_device +namespace bus { + namespace hp_dio { + class dio16_98544_device : public device_t, public device_dio16_card_interface, @@ -52,7 +55,10 @@ private: required_shared_ptr<uint8_t> m_vram; }; +} // namespace bus::hp_dio +} // namespace bus + // device type definition -DECLARE_DEVICE_TYPE(HPDIO_98544, dio16_98544_device) +DECLARE_DEVICE_TYPE_NS(HPDIO_98544, bus::hp_dio, dio16_98544_device) #endif // MAME_BUS_HPDIO_98544_H diff --git a/src/devices/bus/hp_dio/hp98603a.cpp b/src/devices/bus/hp_dio/hp98603a.cpp index 330d051b735..bcd5fe3536c 100644 --- a/src/devices/bus/hp_dio/hp98603a.cpp +++ b/src/devices/bus/hp_dio/hp98603a.cpp @@ -9,10 +9,13 @@ #include "emu.h" #include "hp98603a.h" -DEFINE_DEVICE_TYPE(HPDIO_98603A, dio16_98603a_device, "dio98603a", "HP98603A BASIC 4.0 ROM card") +DEFINE_DEVICE_TYPE_NS(HPDIO_98603A, bus::hp_dio, dio16_98603a_device, "dio98603a", "HP98603A BASIC 4.0 ROM card") #define HP98603A_ROM_REGION "98603a_rom" +namespace bus { + namespace hp_dio { + ROM_START(hp98603a) ROM_REGION(0x80000, HP98603A_ROM_REGION, 0) ROM_LOAD16_BYTE("98603_80001.bin", 0x00001, 32768, CRC(5d8c9657) SHA1(f5d89e7f8a61072f362532d1b5e05f5b5e3f42b3)) @@ -75,3 +78,6 @@ READ16_MEMBER(dio16_98603a_device::rom_r) WRITE16_MEMBER(dio16_98603a_device::rom_w) { } + +} // namespace bus::hp_dio +} // namespace bus diff --git a/src/devices/bus/hp_dio/hp98603a.h b/src/devices/bus/hp_dio/hp98603a.h index 30a501b1b39..1d08cf83e0b 100644 --- a/src/devices/bus/hp_dio/hp98603a.h +++ b/src/devices/bus/hp_dio/hp98603a.h @@ -8,6 +8,9 @@ #include "hp_dio.h" +namespace bus { + namespace hp_dio { + class dio16_98603a_device : public device_t, public device_dio16_card_interface @@ -33,6 +36,9 @@ private: uint8_t *m_rom; }; -DECLARE_DEVICE_TYPE(HPDIO_98603A, dio16_98603a_device) +} // namespace bus::hp_dio +} // namespace bus + +DECLARE_DEVICE_TYPE_NS(HPDIO_98603A, bus::hp_dio, dio16_98603a_device) #endif // MAME_BUS_HPDIO_98603A_H diff --git a/src/devices/bus/hp_dio/hp98603b.cpp b/src/devices/bus/hp_dio/hp98603b.cpp index 4a91ddcdb51..4da45470d0e 100644 --- a/src/devices/bus/hp_dio/hp98603b.cpp +++ b/src/devices/bus/hp_dio/hp98603b.cpp @@ -9,10 +9,13 @@ #include "emu.h" #include "hp98603b.h" -DEFINE_DEVICE_TYPE(HPDIO_98603B, dio16_98603b_device, "dio98603b", "HP98603 BASIC ROM card") +DEFINE_DEVICE_TYPE_NS(HPDIO_98603B, bus::hp_dio, dio16_98603b_device, "dio98603b", "HP98603 BASIC ROM card") #define HP98603B_ROM_REGION "98603b_rom" +namespace bus { + namespace hp_dio { + ROM_START(hp98603b) ROM_REGION(0x100000, HP98603B_ROM_REGION, 0) @@ -69,3 +72,6 @@ READ16_MEMBER(dio16_98603b_device::rom_r) WRITE16_MEMBER(dio16_98603b_device::rom_w) { } + +} // namespace bus::hp_dio +} // namespace bus diff --git a/src/devices/bus/hp_dio/hp98603b.h b/src/devices/bus/hp_dio/hp98603b.h index 8d1780432a5..ea16286c98e 100644 --- a/src/devices/bus/hp_dio/hp98603b.h +++ b/src/devices/bus/hp_dio/hp98603b.h @@ -8,6 +8,9 @@ #include "hp_dio.h" +namespace bus { + namespace hp_dio { + class dio16_98603b_device : public device_t, public device_dio16_card_interface @@ -33,6 +36,9 @@ private: uint8_t *m_rom; }; -DECLARE_DEVICE_TYPE(HPDIO_98603B, dio16_98603b_device) +} // namespace bus::hp_dio +} // namespace bus + +DECLARE_DEVICE_TYPE_NS(HPDIO_98603B, bus::hp_dio, dio16_98603b_device) #endif // MAME_BUS_HPDIO_98603B_H diff --git a/src/devices/bus/hp_dio/hp98644.cpp b/src/devices/bus/hp_dio/hp98644.cpp index 5ac97e3826b..09d70616ae7 100644 --- a/src/devices/bus/hp_dio/hp98644.cpp +++ b/src/devices/bus/hp_dio/hp98644.cpp @@ -15,8 +15,10 @@ // GLOBAL VARIABLES //************************************************************************** -DEFINE_DEVICE_TYPE(HPDIO_98644, dio16_98644_device, "dio98644", "HP98644A Asynchronous Serial Interface") +DEFINE_DEVICE_TYPE_NS(HPDIO_98644, bus::hp_dio, dio16_98644_device, "dio98644", "HP98644A Asynchronous Serial Interface") +namespace bus { + namespace hp_dio { //------------------------------------------------- // device_add_mconfig - add device configuration @@ -226,3 +228,6 @@ WRITE16_MEMBER(dio16_98644_device::io_w) break; } } + +} // namespace bus::hp_dio +} // namespace bus diff --git a/src/devices/bus/hp_dio/hp98644.h b/src/devices/bus/hp_dio/hp98644.h index 94bb4437fae..c4ad925fc30 100644 --- a/src/devices/bus/hp_dio/hp98644.h +++ b/src/devices/bus/hp_dio/hp98644.h @@ -15,6 +15,9 @@ // ======================> dio16_98644_device +namespace bus { + namespace hp_dio { + class dio16_98644_device : public device_t, public device_dio16_card_interface @@ -49,7 +52,10 @@ private: uint8_t m_data; }; +} // namespace bus::hp_dio +} // namespace bus + // device type definition -DECLARE_DEVICE_TYPE(HPDIO_98644, dio16_98644_device) +DECLARE_DEVICE_TYPE_NS(HPDIO_98644, bus::hp_dio, dio16_98644_device) #endif // MAME_BUS_HPDIO_98644_H diff --git a/src/devices/bus/hp_dio/hp_dio.cpp b/src/devices/bus/hp_dio/hp_dio.cpp index e6bccba3460..e487fa5b396 100644 --- a/src/devices/bus/hp_dio/hp_dio.cpp +++ b/src/devices/bus/hp_dio/hp_dio.cpp @@ -13,7 +13,13 @@ // GLOBAL VARIABLES //************************************************************************** -DEFINE_DEVICE_TYPE(DIO16_SLOT, dio16_slot_device, "dio16_slot", "16-bit DIO slot") +DEFINE_DEVICE_TYPE_NS(DIO16_SLOT, bus::hp_dio, dio16_slot_device, "dio16_slot", "16-bit DIO slot") +DEFINE_DEVICE_TYPE_NS(DIO32_SLOT, bus::hp_dio, dio32_slot_device, "dio32_slot", "32-bit DIO-II slot") +DEFINE_DEVICE_TYPE_NS(DIO16, bus::hp_dio, dio16_device, "dio16", "16-bit DIO bus") +DEFINE_DEVICE_TYPE_NS(DIO32, bus::hp_dio, dio32_device, "dio32", "32-bit DIO-II bus") + +namespace bus { + namespace hp_dio { //************************************************************************** // LIVE DEVICE @@ -52,14 +58,6 @@ void dio16_slot_device::device_start() throw emu_fatalerror("dio16_slot_device: card device %s (%s) does not implement device_dio16_card_interface\n", card->tag(), card->name()); } - - -//************************************************************************** -// GLOBAL VARIABLES -//************************************************************************** - -DEFINE_DEVICE_TYPE(DIO32_SLOT, dio32_slot_device, "dio32_slot", "32-bit DIO-II slot") - //************************************************************************** // LIVE DEVICE //************************************************************************** @@ -81,13 +79,6 @@ void dio32_slot_device::device_start() dio16_slot_device::device_start(); } - -//************************************************************************** -// GLOBAL VARIABLES -//************************************************************************** - -DEFINE_DEVICE_TYPE(DIO16, dio16_device, "dio16", "16-bit DIO bus") - //************************************************************************** // LIVE DEVICE //************************************************************************** @@ -200,7 +191,7 @@ void device_dio16_card_interface::interface_pre_start() // DIO32 DEVICE //************************************************************************** -DEFINE_DEVICE_TYPE(DIO32, dio32_device, "dio32", "32-bit DIO-II bus") + dio32_device::dio32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : dio16_device(mconfig, DIO32, tag, owner, clock) @@ -233,3 +224,5 @@ void device_dio32_card_interface::interface_pre_start() if (m_dio_dev && !dynamic_cast<dio32_device *>(m_dio_dev)) throw emu_fatalerror("device_dio32_card_interface: DIO32 device %s (%s) in DIO16 slot %s\n", device().tag(), device().name(), m_dio_dev->name()); } +} +} diff --git a/src/devices/bus/hp_dio/hp_dio.h b/src/devices/bus/hp_dio/hp_dio.h index b63b44c0482..9596c15107d 100644 --- a/src/devices/bus/hp_dio/hp_dio.h +++ b/src/devices/bus/hp_dio/hp_dio.h @@ -17,26 +17,28 @@ #pragma once +namespace bus { + namespace hp_dio { //************************************************************************** // INTERFACE CONFIGURATION MACROS //************************************************************************** #define MCFG_DIO16_CPU(_cputag) \ - downcast<dio16_device &>(*device).set_cputag(_cputag); + downcast<bus::hp_dio::dio16_device &>(*device).set_cputag(_cputag); #define MCFG_DIO32_CPU(_cputag) \ - downcast<dio32_device &>(*device).set_cputag(_cputag); + downcast<bus::hp_dio::dio32_device &>(*device).set_cputag(_cputag); #define MCFG_ISA_OUT_IRQ3_CB(_devcb) \ - downcast<dio16_device &>(*device).set_out_irq3_callback(DEVCB_##_devcb); + downcast<bus::hp_dio::dio16_device &>(*device).set_out_irq3_callback(DEVCB_##_devcb); #define MCFG_ISA_OUT_IRQ4_CB(_devcb) \ - downcast<dio16_device &>(*device).set_out_irq4_callback(DEVCB_##_devcb); + downcast<bus::hp_dio::dio16_device &>(*device).set_out_irq4_callback(DEVCB_##_devcb); #define MCFG_ISA_OUT_IRQ5_CB(_devcb) \ - downcast<dio16_device &>(*device).set_out_irq5_callback(DEVCB_##_devcb); + downcast<bus::hp_dio::dio16_device &>(*device).set_out_irq5_callback(DEVCB_##_devcb); #define MCFG_ISA_OUT_IRQ6_CB(_devcb) \ - downcast<dio16_device &>(*device).set_out_irq6_callback(DEVCB_##_devcb); + downcast<bus::hp_dio::dio16_device &>(*device).set_out_irq6_callback(DEVCB_##_devcb); //************************************************************************** // TYPE DEFINITIONS @@ -75,8 +77,6 @@ protected: required_device<dio16_device> m_dio; }; -// device type definition -DECLARE_DEVICE_TYPE(DIO16_SLOT, dio16_slot_device) class device_dio16_card_interface; // ======================> dio16_device @@ -133,10 +133,6 @@ protected: devcb_write_line m_out_irq6_cb; }; - -// device type definition -DECLARE_DEVICE_TYPE(DIO16, dio16_device) - // ======================> device_dio16_card_interface // class representing interface-specific live dio16 card @@ -189,8 +185,6 @@ protected: }; -// device type definition -DECLARE_DEVICE_TYPE(DIO32_SLOT, dio32_slot_device) // ======================> dio32_device class dio32_device : public dio16_device @@ -207,8 +201,6 @@ protected: }; -// device type definition -DECLARE_DEVICE_TYPE(DIO32, dio32_device) // ======================> device_dio32_card_interface @@ -227,5 +219,13 @@ protected: dio32_device &dio() { assert(m_dio_dev); return downcast<dio32_device &>(*m_dio_dev); } }; +} // namespace bus::hp_dio +} // namespace bus + +// device type definition +DECLARE_DEVICE_TYPE_NS(DIO16_SLOT, bus::hp_dio, dio16_slot_device) +DECLARE_DEVICE_TYPE_NS(DIO32, bus::hp_dio, dio32_device) +DECLARE_DEVICE_TYPE_NS(DIO32_SLOT, bus::hp_dio, dio32_slot_device) +DECLARE_DEVICE_TYPE_NS(DIO16, bus::hp_dio, dio16_device) #endif // MAME_BUS_HPDIO_HPDIO_H diff --git a/src/devices/bus/iq151/disc2.cpp b/src/devices/bus/iq151/disc2.cpp index d48ea10e9c2..e3445d61897 100644 --- a/src/devices/bus/iq151/disc2.cpp +++ b/src/devices/bus/iq151/disc2.cpp @@ -72,11 +72,12 @@ void iq151_disc2_device::device_reset() // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(iq151_disc2_device::device_add_mconfig) - MCFG_UPD765A_ADD("fdc", false, true) - MCFG_FLOPPY_DRIVE_ADD("fdc:1", iq151_disc2_floppies, "8sssd", iq151_disc2_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:2", iq151_disc2_floppies, "8sssd", iq151_disc2_device::floppy_formats) -MACHINE_CONFIG_END +void iq151_disc2_device::device_add_mconfig(machine_config &config) +{ + UPD765A(config, m_fdc, false, true); + FLOPPY_CONNECTOR(config, "fdc:1", iq151_disc2_floppies, "8sssd", iq151_disc2_device::floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:2", iq151_disc2_floppies, "8sssd", iq151_disc2_device::floppy_formats); +} //------------------------------------------------- diff --git a/src/devices/bus/isa/fdc.cpp b/src/devices/bus/isa/fdc.cpp index f341480cb17..7b24fcd00e9 100644 --- a/src/devices/bus/isa/fdc.cpp +++ b/src/devices/bus/isa/fdc.cpp @@ -108,37 +108,40 @@ isa8_fdc_smc_device::isa8_fdc_smc_device(const machine_config &mconfig, const ch { } -MACHINE_CONFIG_START(isa8_fdc_smc_device::device_add_mconfig) - MCFG_SMC37C78_ADD("fdc") - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, isa8_fdc_device, irq_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, isa8_fdc_device, drq_w)) - MCFG_FLOPPY_DRIVE_ADD("fdc:0", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:1", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats) -MACHINE_CONFIG_END +void isa8_fdc_smc_device::device_add_mconfig(machine_config &config) +{ + smc37c78_device &smc(SMC37C78(config, fdc)); + smc.intrq_wr_callback().set(FUNC(isa8_fdc_device::irq_w)); + smc.drq_wr_callback().set(FUNC(isa8_fdc_device::drq_w)); + FLOPPY_CONNECTOR(config, "fdc:0", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:1", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats); +} isa8_fdc_ps2_device::isa8_fdc_ps2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : isa8_fdc_device(mconfig, ISA8_FDC_PS2, tag, owner, clock) { } -MACHINE_CONFIG_START(isa8_fdc_ps2_device::device_add_mconfig) - MCFG_N82077AA_ADD("fdc", n82077aa_device::MODE_PS2) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, isa8_fdc_device, irq_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, isa8_fdc_device, drq_w)) - MCFG_FLOPPY_DRIVE_ADD("fdc:0", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:1", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats) -MACHINE_CONFIG_END +void isa8_fdc_ps2_device::device_add_mconfig(machine_config &config) +{ + n82077aa_device &n82077aa(N82077AA(config, fdc, n82077aa_device::MODE_PS2)); + n82077aa.intrq_wr_callback().set(FUNC(isa8_fdc_device::irq_w)); + n82077aa.drq_wr_callback().set(FUNC(isa8_fdc_device::drq_w)); + FLOPPY_CONNECTOR(config, "fdc:0", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:1", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats); +} isa8_fdc_superio_device::isa8_fdc_superio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : isa8_fdc_device(mconfig, ISA8_FDC_SUPERIO, tag, owner, clock) { } -MACHINE_CONFIG_START(isa8_fdc_superio_device::device_add_mconfig) - MCFG_PC_FDC_SUPERIO_ADD("fdc") - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, isa8_fdc_device, irq_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, isa8_fdc_device, drq_w)) - MCFG_FLOPPY_DRIVE_ADD("fdc:0", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:1", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats) -MACHINE_CONFIG_END +void isa8_fdc_superio_device::device_add_mconfig(machine_config &config) +{ + pc_fdc_superio_device &superio(PC_FDC_SUPERIO(config, fdc)); + superio.intrq_wr_callback().set(FUNC(isa8_fdc_device::irq_w)); + superio.drq_wr_callback().set(FUNC(isa8_fdc_device::drq_w)); + FLOPPY_CONNECTOR(config, "fdc:0", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:1", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats); +} isa8_ec1841_0003_device::isa8_ec1841_0003_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : isa8_fdc_device(mconfig, ISA8_EC1841_0003, tag, owner, clock) diff --git a/src/devices/bus/isa/lpt.cpp b/src/devices/bus/isa/lpt.cpp index 3860896bf7b..e47404a498d 100644 --- a/src/devices/bus/isa/lpt.cpp +++ b/src/devices/bus/isa/lpt.cpp @@ -19,10 +19,11 @@ isa8_lpt_device::isa8_lpt_device(const machine_config &mconfig, const char *tag, { } -MACHINE_CONFIG_START(isa8_lpt_device::device_add_mconfig) - MCFG_DEVICE_ADD("lpt", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE(*this, isa8_lpt_device, pc_cpu_line)) -MACHINE_CONFIG_END +void isa8_lpt_device::device_add_mconfig(machine_config &config) +{ + pc_lpt_device &lpt(PC_LPT(config, "lpt")); + lpt.irq_handler().set(FUNC(isa8_lpt_device::pc_cpu_line)); +} static INPUT_PORTS_START( lpt_dsw ) PORT_START("DSW") diff --git a/src/devices/bus/isa/mda.cpp b/src/devices/bus/isa/mda.cpp index bd1f2d19300..7d5ffb6efd9 100644 --- a/src/devices/bus/isa/mda.cpp +++ b/src/devices/bus/isa/mda.cpp @@ -126,8 +126,8 @@ MACHINE_CONFIG_START(isa8_mda_device::device_add_mconfig) MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_pcmda) - MCFG_DEVICE_ADD("lpt", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE(*this, isa8_mda_device, pc_cpu_line)) + pc_lpt_device &lpt(PC_LPT(config, "lpt")); + lpt.irq_handler().set(FUNC(isa8_mda_device::pc_cpu_line)); MACHINE_CONFIG_END //------------------------------------------------- @@ -554,8 +554,8 @@ MACHINE_CONFIG_START(isa8_hercules_device::device_add_mconfig) MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_pcherc) - MCFG_DEVICE_ADD("lpt", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE(*this, isa8_mda_device, pc_cpu_line)) + pc_lpt_device &lpt(PC_LPT(config, "lpt")); + lpt.irq_handler().set(FUNC(isa8_mda_device::pc_cpu_line)); MACHINE_CONFIG_END //------------------------------------------------- diff --git a/src/devices/bus/isa/mufdc.cpp b/src/devices/bus/isa/mufdc.cpp index e1c16b1b6ea..d402403e4a6 100644 --- a/src/devices/bus/isa/mufdc.cpp +++ b/src/devices/bus/isa/mufdc.cpp @@ -45,16 +45,17 @@ static void drives(device_slot_interface &device) // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(mufdc_device::device_add_mconfig) - MCFG_MCS3201_ADD("fdc") - MCFG_MCS3201_INPUT_HANDLER(READ8(*this, mufdc_device, fdc_input_r)) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, mufdc_device, fdc_irq_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, mufdc_device, fdc_drq_w)) - MCFG_FLOPPY_DRIVE_ADD("fdc:0", drives, "35hd", mufdc_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:1", drives, "35hd", mufdc_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:2", drives, nullptr, mufdc_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:3", drives, nullptr, mufdc_device::floppy_formats) -MACHINE_CONFIG_END +void mufdc_device::device_add_mconfig(machine_config &config) +{ + mcs3201_device &mcs3201(MCS3201(config, m_fdc)); + mcs3201.input_handler().set(FUNC(mufdc_device::fdc_input_r)); + mcs3201.intrq_wr_callback().set(FUNC(mufdc_device::fdc_irq_w)); + mcs3201.drq_wr_callback().set(FUNC(mufdc_device::fdc_drq_w)); + FLOPPY_CONNECTOR(config, "fdc:0", drives, "35hd", mufdc_device::floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:1", drives, "35hd", mufdc_device::floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:2", drives, nullptr, mufdc_device::floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:3", drives, nullptr, mufdc_device::floppy_formats); +} //------------------------------------------------- // input_ports - device-specific input ports diff --git a/src/devices/bus/isbx/compis_fdc.cpp b/src/devices/bus/isbx/compis_fdc.cpp index a2300020119..4a14beacb09 100644 --- a/src/devices/bus/isbx/compis_fdc.cpp +++ b/src/devices/bus/isbx/compis_fdc.cpp @@ -54,13 +54,14 @@ static void compis_floppies(device_slot_interface &device) // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(compis_fdc_device::device_add_mconfig) - MCFG_I8272A_ADD(I8272_TAG, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, compis_fdc_device, fdc_irq)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, compis_fdc_device, fdc_drq)) - MCFG_FLOPPY_DRIVE_ADD(I8272_TAG":0", compis_floppies, "525qd", compis_fdc_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD(I8272_TAG":1", compis_floppies, "525qd", compis_fdc_device::floppy_formats) -MACHINE_CONFIG_END +void compis_fdc_device::device_add_mconfig(machine_config &config) +{ + I8272A(config, m_fdc, true); + m_fdc->intrq_wr_callback().set(FUNC(compis_fdc_device::fdc_irq)); + m_fdc->drq_wr_callback().set(FUNC(compis_fdc_device::fdc_drq)); + FLOPPY_CONNECTOR(config, m_floppy0, compis_floppies, "525qd", compis_fdc_device::floppy_formats); + FLOPPY_CONNECTOR(config, m_floppy1, compis_floppies, "525qd", compis_fdc_device::floppy_formats); +} diff --git a/src/devices/bus/isbx/isbc_218a.cpp b/src/devices/bus/isbx/isbc_218a.cpp index c98df25dd9d..b52054ae5db 100644 --- a/src/devices/bus/isbx/isbc_218a.cpp +++ b/src/devices/bus/isbx/isbc_218a.cpp @@ -54,12 +54,13 @@ static void isbc_218a_floppies(device_slot_interface &device) // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(isbc_218a_device::device_add_mconfig) - MCFG_I8272A_ADD(I8272_TAG, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, isbc_218a_device, fdc_irq)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, isbc_218a_device, fdc_drq)) - MCFG_FLOPPY_DRIVE_ADD(I8272_TAG":0", isbc_218a_floppies, "525dd", isbc_218a_device::floppy_formats) -MACHINE_CONFIG_END +void isbc_218a_device::device_add_mconfig(machine_config &config) +{ + I8272A(config, m_fdc, true); + m_fdc->intrq_wr_callback().set(FUNC(isbc_218a_device::fdc_irq)); + m_fdc->drq_wr_callback().set(FUNC(isbc_218a_device::fdc_drq)); + FLOPPY_CONNECTOR(config, m_floppy0, isbc_218a_floppies, "525dd", isbc_218a_device::floppy_formats); +} //************************************************************************** diff --git a/src/devices/bus/lpci/southbridge.cpp b/src/devices/bus/lpci/southbridge.cpp index 4834f2806ac..e9fec4c7514 100644 --- a/src/devices/bus/lpci/southbridge.cpp +++ b/src/devices/bus/lpci/southbridge.cpp @@ -510,15 +510,15 @@ MACHINE_CONFIG_START(southbridge_extended_device::device_add_mconfig) southbridge_device::device_add_mconfig(config); at_keyboard_controller_device &keybc(AT_KEYBOARD_CONTROLLER(config, "keybc", XTAL(12'000'000))); - keybc.system_reset_cb().set_inputline(":maincpu", INPUT_LINE_RESET); - keybc.gate_a20_cb().set_inputline(":maincpu", INPUT_LINE_A20); - keybc.input_buffer_full_cb().set("pic8259_master", FUNC(pic8259_device::ir1_w)); - keybc.keyboard_clock_cb().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); - keybc.keyboard_data_cb().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); + keybc.hot_res().set_inputline(":maincpu", INPUT_LINE_RESET); + keybc.gate_a20().set_inputline(":maincpu", INPUT_LINE_A20); + keybc.kbd_irq().set("pic8259_master", FUNC(pic8259_device::ir1_w)); + keybc.kbd_clk().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); + keybc.kbd_data().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); MCFG_DEVICE_ADD("pc_kbdc", PC_KBDC, 0) - MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_clock_w)) - MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_data_w)) + MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_clk_w)) + MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_data_w)) MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL) ds12885_device &rtc(DS12885(config, "rtc")); diff --git a/src/devices/bus/msx_cart/disk.cpp b/src/devices/bus/msx_cart/disk.cpp index f66495e1cd8..cbaba85f01c 100644 --- a/src/devices/bus/msx_cart/disk.cpp +++ b/src/devices/bus/msx_cart/disk.cpp @@ -232,7 +232,7 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(msx_cart_fsfd1a_device::device_add_mconfig) - MCFG_TC8566AF_ADD("fdc") + TC8566AF(config, m_fdc); // Double sided 3.5" floppy drive MCFG_FLOPPY_DRIVE_ADD("fdc:0", msx_floppies, "35dd", msx_cart_disk_device::floppy_formats) diff --git a/src/devices/bus/newbrain/fdc.cpp b/src/devices/bus/newbrain/fdc.cpp index 733a277d49f..c3378dd5108 100644 --- a/src/devices/bus/newbrain/fdc.cpp +++ b/src/devices/bus/newbrain/fdc.cpp @@ -84,7 +84,7 @@ void newbrain_fdc_device::newbrain_fdc_io(address_map &map) { map.unmap_value_high(); map.global_mask(0x71); - map(0x00, 0x01).mirror(0x10).m(UPD765_TAG, FUNC(upd765a_device::map)); + map(0x00, 0x01).mirror(0x10).m(m_fdc, FUNC(upd765a_device::map)); map(0x20, 0x20).mirror(0x11).w(FUNC(newbrain_fdc_device::fdc_auxiliary_w)); map(0x40, 0x40).mirror(0x11).r(FUNC(newbrain_fdc_device::fdc_control_r)); } @@ -109,8 +109,8 @@ MACHINE_CONFIG_START(newbrain_fdc_device::device_add_mconfig) MCFG_DEVICE_PROGRAM_MAP(newbrain_fdc_mem) MCFG_DEVICE_IO_MAP(newbrain_fdc_io) - MCFG_UPD765A_ADD(UPD765_TAG, false, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, newbrain_fdc_device, fdc_int_w)) + UPD765A(config, m_fdc, false, true); + m_fdc->intrq_wr_callback().set(FUNC(newbrain_fdc_device::fdc_int_w)); MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", newbrain_floppies, "525dd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", newbrain_floppies, "525dd", floppy_image_device::default_floppy_formats) diff --git a/src/devices/bus/pc_kbd/pc_kbdc.cpp b/src/devices/bus/pc_kbd/pc_kbdc.cpp index 9bd50c1ea5f..6d28227bca2 100644 --- a/src/devices/bus/pc_kbd/pc_kbdc.cpp +++ b/src/devices/bus/pc_kbd/pc_kbdc.cpp @@ -47,9 +47,7 @@ void pc_kbdc_slot_device::device_start() device_pc_kbd_interface *pc_kbd = dynamic_cast<device_pc_kbd_interface *>(get_card_device()); if (pc_kbd) - { pc_kbd->set_pc_kbdc(m_kbdc_device); - } } @@ -71,11 +69,11 @@ pc_kbdc_device::pc_kbdc_device(const machine_config &mconfig, const char *tag, d m_data_state(-1), m_mb_clock_state(0), m_mb_data_state(0), m_kb_clock_state(1), m_kb_data_state(1), - m_keyboard( nullptr ) + m_keyboard(nullptr) { } -void pc_kbdc_device::set_keyboard( device_pc_kbd_interface *keyboard ) +void pc_kbdc_device::set_keyboard(device_pc_kbd_interface *keyboard) { m_keyboard = keyboard; } @@ -84,19 +82,22 @@ void pc_kbdc_device::set_keyboard( device_pc_kbd_interface *keyboard ) //------------------------------------------------- // device_start - device-specific startup //------------------------------------------------- -void pc_kbdc_device::device_start() +void pc_kbdc_device::device_resolve_objects() { - // resolve callbacks m_out_clock_cb.resolve_safe(); m_out_data_cb.resolve_safe(); } - -//------------------------------------------------- -// device_reset - device-specific reset -//------------------------------------------------- -void pc_kbdc_device::device_reset() +void pc_kbdc_device::device_start() { + save_item(NAME(m_clock_state)); + save_item(NAME(m_data_state)); + + save_item(NAME(m_mb_clock_state)); + save_item(NAME(m_mb_data_state)); + save_item(NAME(m_kb_clock_state)); + save_item(NAME(m_kb_data_state)); + m_clock_state = -1; /* initial state of calculated clock line */ m_data_state = -1; /* initial state of calculated data line */ @@ -112,19 +113,14 @@ void pc_kbdc_device::update_clock_state() { int new_clock_state = m_mb_clock_state & m_kb_clock_state; - if ( new_clock_state != m_clock_state ) + if (new_clock_state != m_clock_state) { // We first set our state to prevent possible endless loops m_clock_state = new_clock_state; - // Send state to keyboard interface logic on mainboard - m_out_clock_cb( m_clock_state ); - // Send state to keyboard - if ( m_keyboard ) - { + if (m_keyboard) m_keyboard->clock_write( m_clock_state ); - } } } @@ -133,48 +129,51 @@ void pc_kbdc_device::update_data_state() { int new_data_state = m_mb_data_state & m_kb_data_state; - if ( new_data_state != m_data_state ) + if (new_data_state != m_data_state) { // We first set our state to prevent possible endless loops m_data_state = new_data_state; - // Send state to keyboard interface logic on mainboard - m_out_data_cb( m_data_state ); - // Send state to keyboard - if ( m_keyboard ) - { - m_keyboard->data_write( m_data_state ); - } + if (m_keyboard) + m_keyboard->data_write(m_data_state); } } -WRITE_LINE_MEMBER( pc_kbdc_device::clock_write_from_mb ) +WRITE_LINE_MEMBER(pc_kbdc_device::clock_write_from_mb) { m_mb_clock_state = state; update_clock_state(); } -WRITE_LINE_MEMBER( pc_kbdc_device::data_write_from_mb ) +WRITE_LINE_MEMBER(pc_kbdc_device::data_write_from_mb) { m_mb_data_state = state; update_data_state(); } -WRITE_LINE_MEMBER( pc_kbdc_device::clock_write_from_kb ) +WRITE_LINE_MEMBER(pc_kbdc_device::clock_write_from_kb) { - m_kb_clock_state = state; - update_clock_state(); + state = state ? 1 : 0; + if (state != m_kb_clock_state) + { + m_out_clock_cb(m_kb_clock_state = state); + update_clock_state(); + } } -WRITE_LINE_MEMBER( pc_kbdc_device::data_write_from_kb ) +WRITE_LINE_MEMBER(pc_kbdc_device::data_write_from_kb) { - m_kb_data_state = state; - update_data_state(); + state = state ? 1 : 0; + if (state != m_kb_data_state) + { + m_out_data_cb(m_kb_data_state = state); + update_data_state(); + } } @@ -203,20 +202,18 @@ device_pc_kbd_interface::~device_pc_kbd_interface() } -WRITE_LINE_MEMBER( device_pc_kbd_interface::clock_write ) +WRITE_LINE_MEMBER(device_pc_kbd_interface::clock_write) { } -WRITE_LINE_MEMBER( device_pc_kbd_interface::data_write ) +WRITE_LINE_MEMBER(device_pc_kbd_interface::data_write) { } void device_pc_kbd_interface::set_pc_kbdc_device() { - if ( m_pc_kbdc ) - { - m_pc_kbdc->set_keyboard( this ); - } + if (m_pc_kbdc) + m_pc_kbdc->set_keyboard(this); } diff --git a/src/devices/bus/pc_kbd/pc_kbdc.h b/src/devices/bus/pc_kbd/pc_kbdc.h index 45374dea518..2f0b51e5d69 100644 --- a/src/devices/bus/pc_kbd/pc_kbdc.h +++ b/src/devices/bus/pc_kbd/pc_kbdc.h @@ -43,13 +43,13 @@ public: // construction/destruction pc_kbdc_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - // device-level overrides - virtual void device_start() override; - // inline configuration void set_pc_kbdc_slot(device_t *kbdc_device) { m_kbdc_device = kbdc_device; } protected: + // device-level overrides + virtual void device_start() override; + // configuration device_t *m_kbdc_device; }; @@ -84,8 +84,8 @@ public: protected: // device-level overrides + virtual void device_resolve_objects() override; virtual void device_start() override; - virtual void device_reset() override; void update_clock_state(); void update_data_state(); @@ -93,13 +93,13 @@ protected: devcb_write_line m_out_clock_cb; devcb_write_line m_out_data_cb; - int m_clock_state; - int m_data_state; + int8_t m_clock_state; + int8_t m_data_state; - int m_mb_clock_state; - int m_mb_data_state; - int m_kb_clock_state; - int m_kb_data_state; + uint8_t m_mb_clock_state; + uint8_t m_mb_data_state; + uint8_t m_kb_clock_state; + uint8_t m_kb_data_state; device_pc_kbd_interface *m_keyboard; }; @@ -115,15 +115,10 @@ class device_pc_kbd_interface : public device_slot_card_interface { friend class pc_kbdc_device; public: - // construction/destruction - device_pc_kbd_interface(const machine_config &mconfig, device_t &device); virtual ~device_pc_kbd_interface(); void set_pc_kbdc_device(); - int clock_signal() { return m_pc_kbdc ? m_pc_kbdc->clock_signal() : 1; } - int data_signal() { return m_pc_kbdc ? m_pc_kbdc->data_signal() : 1; } - // // Override the clock_write and data_write methods in a keyboard implementation // @@ -134,6 +129,11 @@ public: void set_pc_kbdc(device_t *kbdc_device) { m_pc_kbdc = dynamic_cast<pc_kbdc_device *>(kbdc_device); } protected: + device_pc_kbd_interface(const machine_config &mconfig, device_t &device); + + int clock_signal() const { return m_pc_kbdc ? m_pc_kbdc->clock_signal() : 1; } + int data_signal() const { return m_pc_kbdc ? m_pc_kbdc->data_signal() : 1; } + pc_kbdc_device *m_pc_kbdc; const char *m_pc_kbdc_tag; }; diff --git a/src/devices/bus/s100/wunderbus.cpp b/src/devices/bus/s100/wunderbus.cpp index 8c7e82e5a27..cb483a7a381 100644 --- a/src/devices/bus/s100/wunderbus.cpp +++ b/src/devices/bus/s100/wunderbus.cpp @@ -132,7 +132,8 @@ MACHINE_CONFIG_START(s100_wunderbus_device::device_add_mconfig) MCFG_RS232_RI_HANDLER(WRITELINE(m_ace3, ins8250_uart_device, ri_w)) MCFG_RS232_CTS_HANDLER(WRITELINE(m_ace3, ins8250_uart_device, cts_w)) - MCFG_UPD1990A_ADD(UPD1990C_TAG, XTAL(32'768), NOOP, WRITELINE(DEVICE_SELF, s100_wunderbus_device, rtc_tp_w)) + UPD1990A(config, m_rtc); + m_rtc->tp_callback().set(FUNC(s100_wunderbus_device::rtc_tp_w)); MACHINE_CONFIG_END diff --git a/src/devices/bus/sbus/bwtwo.cpp b/src/devices/bus/sbus/bwtwo.cpp index e287848675e..65f40df715c 100644 --- a/src/devices/bus/sbus/bwtwo.cpp +++ b/src/devices/bus/sbus/bwtwo.cpp @@ -47,7 +47,6 @@ sbus_bwtwo_device::sbus_bwtwo_device(const machine_config &mconfig, const char * : device_t(mconfig, SBUS_BWTWO, tag, owner, clock) , device_sbus_card_interface(mconfig, *this) , m_rom(*this, "prom") - //, m_vram(*this, "vram") , m_screen(*this, "screen") { } @@ -55,6 +54,7 @@ sbus_bwtwo_device::sbus_bwtwo_device(const machine_config &mconfig, const char * void sbus_bwtwo_device::device_start() { m_vram = std::make_unique<uint8_t[]>(0x100000); + save_pointer(NAME(m_vram), 0x100000); for (int i = 0; i < 0x100; i++) { diff --git a/src/devices/bus/sbus/cgsix.cpp b/src/devices/bus/sbus/cgsix.cpp index 8e713e145c7..beebe3dadd9 100644 --- a/src/devices/bus/sbus/cgsix.cpp +++ b/src/devices/bus/sbus/cgsix.cpp @@ -36,6 +36,128 @@ sbus_cgsix_device::sbus_cgsix_device(const machine_config &mconfig, device_type void sbus_cgsix_device::device_start() { m_vram = std::make_unique<uint32_t[]>(m_vram_size / 4); + + save_pointer(NAME(m_vram), m_vram_size / 4); + save_item(NAME(m_vram_size)); + + save_item(NAME(m_fbc.m_clip_check)); + save_item(NAME(m_fbc.m_status)); + save_item(NAME(m_fbc.m_draw_status)); + save_item(NAME(m_fbc.m_blit_status)); + save_item(NAME(m_fbc.m_font)); + + save_item(NAME(m_fbc.m_x0)); + save_item(NAME(m_fbc.m_y0)); + save_item(NAME(m_fbc.m_z0)); + save_item(NAME(m_fbc.m_color0)); + save_item(NAME(m_fbc.m_x1)); + save_item(NAME(m_fbc.m_y1)); + save_item(NAME(m_fbc.m_z1)); + save_item(NAME(m_fbc.m_color1)); + save_item(NAME(m_fbc.m_x2)); + save_item(NAME(m_fbc.m_y2)); + save_item(NAME(m_fbc.m_z2)); + save_item(NAME(m_fbc.m_color2)); + save_item(NAME(m_fbc.m_x3)); + save_item(NAME(m_fbc.m_y3)); + save_item(NAME(m_fbc.m_z3)); + save_item(NAME(m_fbc.m_color3)); + + save_item(NAME(m_fbc.m_raster_offx)); + save_item(NAME(m_fbc.m_raster_offy)); + + save_item(NAME(m_fbc.m_autoincx)); + save_item(NAME(m_fbc.m_autoincy)); + + save_item(NAME(m_fbc.m_clip_minx)); + save_item(NAME(m_fbc.m_clip_miny)); + + save_item(NAME(m_fbc.m_clip_maxx)); + save_item(NAME(m_fbc.m_clip_maxy)); + + save_item(NAME(m_fbc.m_fcolor)); + save_item(NAME(m_fbc.m_bcolor)); + + save_item(NAME(m_fbc.m_rasterop)); + + save_item(NAME(m_fbc.m_plane_mask)); + save_item(NAME(m_fbc.m_pixel_mask)); + + save_item(NAME(m_fbc.m_patt_align)); + save_item(NAME(m_fbc.m_pattern)); + + save_item(NAME(m_fbc.m_ipoint_absx)); + save_item(NAME(m_fbc.m_ipoint_absy)); + save_item(NAME(m_fbc.m_ipoint_absz)); + save_item(NAME(m_fbc.m_ipoint_relx)); + save_item(NAME(m_fbc.m_ipoint_rely)); + save_item(NAME(m_fbc.m_ipoint_relz)); + save_item(NAME(m_fbc.m_ipoint_r)); + save_item(NAME(m_fbc.m_ipoint_g)); + save_item(NAME(m_fbc.m_ipoint_b)); + save_item(NAME(m_fbc.m_ipoint_a)); + + save_item(NAME(m_fbc.m_iline_absx)); + save_item(NAME(m_fbc.m_iline_absy)); + save_item(NAME(m_fbc.m_iline_absz)); + save_item(NAME(m_fbc.m_iline_relx)); + save_item(NAME(m_fbc.m_iline_rely)); + save_item(NAME(m_fbc.m_iline_relz)); + save_item(NAME(m_fbc.m_iline_r)); + save_item(NAME(m_fbc.m_iline_g)); + save_item(NAME(m_fbc.m_iline_b)); + save_item(NAME(m_fbc.m_iline_a)); + + save_item(NAME(m_fbc.m_itri_absx)); + save_item(NAME(m_fbc.m_itri_absy)); + save_item(NAME(m_fbc.m_itri_absz)); + save_item(NAME(m_fbc.m_itri_relx)); + save_item(NAME(m_fbc.m_itri_rely)); + save_item(NAME(m_fbc.m_itri_relz)); + save_item(NAME(m_fbc.m_itri_r)); + save_item(NAME(m_fbc.m_itri_g)); + save_item(NAME(m_fbc.m_itri_b)); + save_item(NAME(m_fbc.m_itri_a)); + + save_item(NAME(m_fbc.m_iquad_absx)); + save_item(NAME(m_fbc.m_iquad_absy)); + save_item(NAME(m_fbc.m_iquad_absz)); + save_item(NAME(m_fbc.m_iquad_relx)); + save_item(NAME(m_fbc.m_iquad_rely)); + save_item(NAME(m_fbc.m_iquad_relz)); + save_item(NAME(m_fbc.m_iquad_r)); + save_item(NAME(m_fbc.m_iquad_g)); + save_item(NAME(m_fbc.m_iquad_b)); + save_item(NAME(m_fbc.m_iquad_a)); + + save_item(NAME(m_fbc.m_irect_absx)); + save_item(NAME(m_fbc.m_irect_absy)); + save_item(NAME(m_fbc.m_irect_absz)); + save_item(NAME(m_fbc.m_irect_relx)); + save_item(NAME(m_fbc.m_irect_rely)); + save_item(NAME(m_fbc.m_irect_relz)); + save_item(NAME(m_fbc.m_irect_r)); + save_item(NAME(m_fbc.m_irect_g)); + save_item(NAME(m_fbc.m_irect_b)); + save_item(NAME(m_fbc.m_irect_a)); + + save_item(NAME(m_fbc.m_vertex_count)); + + for (int i = 0; i < 0x1000; i++) + { + save_item(NAME(m_fbc.m_prim_buf[i].m_absx), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_absy), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_absz), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_relx), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_rely), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_relz), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_r), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_g), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_b), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_a), i); + } + + save_item(NAME(m_fbc.m_curr_prim_type)); } void sbus_cgsix_device::device_reset() @@ -129,6 +251,35 @@ uint8_t sbus_cgsix_device::perform_rasterop(uint8_t src, uint8_t dst) return result; } +void sbus_cgsix_device::handle_font_poke() +{ + if (fbc_misc_draw() != FBC_MISC_DRAW_RENDER) + { + logerror("handle_font_poke: Unsupported font draw mode %d, abandoning draw\n", fbc_misc_draw()); + return; + } + + const uint32_t daddr = m_fbc.m_y0 * 1152; + uint8_t *vram = (uint8_t*)&m_vram[0]; + vram += daddr; + const int width = (int)m_fbc.m_x1 - (int)m_fbc.m_x0; + const uint32_t font = m_fbc.m_font; + uint32_t x = m_fbc.m_x0; + logerror("Width: %d, bits %d to %d\n", width, 31, 31 - width); + for (int bit = 31; bit >= (31 - width); bit--) + { + const uint8_t src = BIT(font, bit) ? 0xff : 0x00; + const uint8_t dst = vram[BYTE4_XOR_BE(x)]; + vram[BYTE4_XOR_BE(x)]= perform_rasterop(src, dst); + x++; + if (x >= 1152) break; + } + m_fbc.m_x0 += m_fbc.m_autoincx; + m_fbc.m_x1 += m_fbc.m_autoincx; + m_fbc.m_y0 += m_fbc.m_autoincy; + m_fbc.m_y1 += m_fbc.m_autoincy; +} + // NOTE: This is basically untested, and probably full of bugs! void sbus_cgsix_device::handle_draw_command() { @@ -158,15 +309,15 @@ void sbus_cgsix_device::handle_draw_command() vertex_t &v0 = m_fbc.m_prim_buf[vindex++]; vertex_t &v1 = m_fbc.m_prim_buf[vindex++]; - for (uint32_t y = v0.m_absy; y < v1.m_absy; y++) + for (uint32_t y = v0.m_absy; y <= v1.m_absy; y++) { - const uint32_t line = y * (m_fbc.m_clip_maxx + 1); - for (uint32_t x = v0.m_absx; x < v1.m_absx; x++) + uint8_t *line = &vram[y * 1152]; + for (uint32_t x = v0.m_absx; x <= v1.m_absx; x++) { - const uint8_t src = vram[line + x]; + const uint32_t native_x = BYTE4_XOR_BE(x); + const uint8_t src = line[native_x]; const uint8_t dst = src; - const uint8_t result = perform_rasterop(src, dst); - vram[line + x] = result; + line[native_x] = perform_rasterop(src, dst); } } } @@ -177,7 +328,7 @@ void sbus_cgsix_device::handle_draw_command() void sbus_cgsix_device::handle_blit_command() { uint8_t *vram = (uint8_t*)&m_vram[0]; - const uint32_t fbw = (m_fbc.m_clip_maxx + 1); + const uint32_t fbw = 1152;//(m_fbc.m_clip_maxx + 1); logerror("Copying from %d,%d-%d,%d to %d,%d-%d,%d, width %d, height %d\n" , m_fbc.m_x0, m_fbc.m_y0 , m_fbc.m_x1, m_fbc.m_y1 @@ -188,17 +339,18 @@ void sbus_cgsix_device::handle_blit_command() uint32_t dsty = m_fbc.m_y2; for (; srcy < m_fbc.m_y1; srcy++, dsty++) { - uint32_t srcy_index = srcy * fbw; - uint32_t dsty_index = dsty * fbw; + uint8_t *srcline = &vram[srcy * fbw]; + uint8_t *dstline = &vram[dsty * fbw]; uint32_t srcx = m_fbc.m_x0; uint32_t dstx = m_fbc.m_x2; for (; srcx < m_fbc.m_x1; srcx++, dstx++) { - const uint8_t src = vram[srcy_index + srcx]; - const uint8_t dst = vram[dsty_index + dstx]; + const uint32_t native_dstx = BYTE4_XOR_BE(dstx); + const uint8_t src = srcline[BYTE4_XOR_BE(srcx)]; + const uint8_t dst = dstline[native_dstx]; const uint8_t result = perform_rasterop(src, dst); //logerror("vram[%d] = %02x\n", result); - vram[dsty_index + dstx] = result; + dstline[native_dstx] = result; } } } @@ -565,9 +717,12 @@ WRITE32_MEMBER(sbus_cgsix_device::fbc_w) //COMBINE_DATA(&m_fbc.m_blit_status); break; case FBC_FONT: + { logerror("fbc_w: FONT = %08x & %08x\n", data, mem_mask); COMBINE_DATA(&m_fbc.m_font); + handle_font_poke(); break; + } case FBC_X0: logerror("fbc_w: X0 = %08x & %08x\n", data, mem_mask); diff --git a/src/devices/bus/sbus/cgsix.h b/src/devices/bus/sbus/cgsix.h index f4a1cef6b69..4e3302799c1 100644 --- a/src/devices/bus/sbus/cgsix.h +++ b/src/devices/bus/sbus/cgsix.h @@ -45,8 +45,9 @@ protected: protected: uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); uint8_t perform_rasterop(uint8_t src, uint8_t dst); - void handle_blit_command(); + void handle_font_poke(); void handle_draw_command(); + void handle_blit_command(); void base_map(address_map &map); @@ -344,7 +345,7 @@ protected: uint32_t m_a; }; - enum prim_type + enum prim_type : uint32_t { PRIM_POINT = 0, PRIM_LINE, @@ -461,7 +462,7 @@ protected: vertex_t m_prim_buf[0x1000]; // unknown size uint32_t m_vertex_count; - prim_type m_curr_prim_type; + uint32_t m_curr_prim_type; }; required_memory_region m_rom; diff --git a/src/devices/bus/sbus/cgthree.cpp b/src/devices/bus/sbus/cgthree.cpp index f4582c2d862..02ddaba688f 100644 --- a/src/devices/bus/sbus/cgthree.cpp +++ b/src/devices/bus/sbus/cgthree.cpp @@ -55,6 +55,7 @@ sbus_cgthree_device::sbus_cgthree_device(const machine_config &mconfig, const ch void sbus_cgthree_device::device_start() { m_vram = std::make_unique<uint32_t[]>(0x100000/4); + save_pointer(NAME(m_vram), 0x100000/4); } void sbus_cgthree_device::device_reset() diff --git a/src/devices/bus/sbus/sbus.h b/src/devices/bus/sbus/sbus.h index 30acb273213..5349c2c8e42 100644 --- a/src/devices/bus/sbus/sbus.h +++ b/src/devices/bus/sbus/sbus.h @@ -21,13 +21,13 @@ class sbus_slot_device : public device_t, public device_slot_interface public: // construction/destruction template <typename T, typename U> - sbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&sbus_tag, U &&opts, const char *dflt) + sbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&sbus_tag, U &&opts, const char *dflt, bool fixed = false) : sbus_slot_device(mconfig, tag, owner, clock) { option_reset(); opts(*this); set_default_option(dflt); - set_fixed(false); + set_fixed(fixed); m_sbus.set_tag(std::forward<T>(sbus_tag)); } sbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/spc1000/fdd.cpp b/src/devices/bus/spc1000/fdd.cpp index eb04f8e5fb6..dd91cbe898c 100644 --- a/src/devices/bus/spc1000/fdd.cpp +++ b/src/devices/bus/spc1000/fdd.cpp @@ -80,12 +80,12 @@ static void sd725_floppies(device_slot_interface &device) // device_add_mconfig //------------------------------------------------- -MACHINE_CONFIG_START(spc1000_fdd_exp_device::device_add_mconfig) - +void spc1000_fdd_exp_device::device_add_mconfig(machine_config &config) +{ // sub CPU (5 inch floppy drive) - MCFG_DEVICE_ADD("fdccpu", Z80, XTAL(4'000'000)) - MCFG_DEVICE_PROGRAM_MAP(sd725_mem) - MCFG_DEVICE_IO_MAP(sd725_io) + Z80(config, m_cpu, XTAL(4'000'000)); + m_cpu->set_addrmap(AS_PROGRAM, &spc1000_fdd_exp_device::sd725_mem); + m_cpu->set_addrmap(AS_IO, &spc1000_fdd_exp_device::sd725_io); I8255(config, m_ppi); m_ppi->in_pa_callback().set(m_ppi, FUNC(i8255_device::pb_r)); @@ -95,13 +95,13 @@ MACHINE_CONFIG_START(spc1000_fdd_exp_device::device_add_mconfig) m_ppi->out_pc_callback().set(FUNC(spc1000_fdd_exp_device::i8255_c_w)); // floppy disk controller - MCFG_UPD765A_ADD("upd765", true, true) - MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE("fdccpu", INPUT_LINE_IRQ0)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set_inputline(m_cpu, INPUT_LINE_IRQ0); // floppy drives - MCFG_FLOPPY_DRIVE_ADD("upd765:0", sd725_floppies, "sd320", floppy_image_device::default_floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("upd765:1", sd725_floppies, "sd320", floppy_image_device::default_floppy_formats) -MACHINE_CONFIG_END + FLOPPY_CONNECTOR(config, "upd765:0", sd725_floppies, "sd320", floppy_image_device::default_floppy_formats); + FLOPPY_CONNECTOR(config, "upd765:1", sd725_floppies, "sd320", floppy_image_device::default_floppy_formats); +} ROM_START( spc1000_fdd ) ROM_REGION(0x10000, "fdccpu", 0) diff --git a/src/devices/bus/sunkbd/hlekbd.cpp b/src/devices/bus/sunkbd/hlekbd.cpp index 2cb5547947e..4ec8dc74080 100644 --- a/src/devices/bus/sunkbd/hlekbd.cpp +++ b/src/devices/bus/sunkbd/hlekbd.cpp @@ -989,6 +989,7 @@ void hle_device_base::received_byte(uint8_t byte) switch (byte) { case COMMAND_RESET: + printf("Resetting keyboard\n"); device_reset(); break; diff --git a/src/devices/cpu/hphybrid/hphybrid.cpp b/src/devices/cpu/hphybrid/hphybrid.cpp index 280686f5bfa..75706bb1e7b 100644 --- a/src/devices/cpu/hphybrid/hphybrid.cpp +++ b/src/devices/cpu/hphybrid/hphybrid.cpp @@ -69,44 +69,71 @@ enum { HPHYBRID_R37 }; -#define BIT_MASK(n) (1U << (n)) +// Bit manipulation +namespace { + template<typename T> constexpr T BIT_MASK(unsigned n) + { + return (T)1U << n; + } -// Macros to clear/set single bits -#define BIT_CLR(w , n) ((w) &= ~BIT_MASK(n)) -#define BIT_SET(w , n) ((w) |= BIT_MASK(n)) + template<typename T> void BIT_CLR(T& w , unsigned n) + { + w &= ~BIT_MASK<T>(n); + } + + template<typename T> void BIT_SET(T& w , unsigned n) + { + w |= BIT_MASK<T>(n); + } +} // Bits in m_flags -#define HPHYBRID_C_BIT 0 // Carry/extend -#define HPHYBRID_O_BIT 1 // Overflow -#define HPHYBRID_CB_BIT 2 // Cb -#define HPHYBRID_DB_BIT 3 // Db -#define HPHYBRID_INTEN_BIT 4 // Interrupt enable -#define HPHYBRID_DMAEN_BIT 5 // DMA enable -#define HPHYBRID_DMADIR_BIT 6 // DMA direction (1 = OUT) -#define HPHYBRID_HALT_BIT 7 // Halt flag -#define HPHYBRID_IRH_BIT 8 // IRH requested -#define HPHYBRID_IRL_BIT 9 // IRL requested -#define HPHYBRID_IRH_SVC_BIT 10 // IRH in service -#define HPHYBRID_IRL_SVC_BIT 11 // IRL in service -#define HPHYBRID_DMAR_BIT 12 // DMA request -#define HPHYBRID_STS_BIT 13 // Status flag -#define HPHYBRID_FLG_BIT 14 // "Flag" flag -#define HPHYBRID_DC_BIT 15 // Decimal carry -#define HPHYBRID_IM_BIT 16 // Interrupt mode - -#define HPHYBRID_IV_MASK 0xfff0 // IV mask - -#define HP_REG_SE_MASK 0x000f +enum : unsigned { + HPHYBRID_C_BIT = 0, // Carry/extend + HPHYBRID_O_BIT = 1, // Overflow + HPHYBRID_CB_BIT = 2, // Cb + HPHYBRID_DB_BIT = 3, // Db + HPHYBRID_INTEN_BIT = 4, // Interrupt enable + HPHYBRID_DMAEN_BIT = 5, // DMA enable + HPHYBRID_DMADIR_BIT = 6, // DMA direction (1 = OUT) + HPHYBRID_HALT_BIT = 7, // Halt flag + HPHYBRID_IRH_BIT = 8, // IRH requested + HPHYBRID_IRL_BIT = 9, // IRL requested + HPHYBRID_IRH_SVC_BIT = 10, // IRH in service + HPHYBRID_IRL_SVC_BIT = 11, // IRL in service + HPHYBRID_DMAR_BIT = 12, // DMA request + HPHYBRID_STS_BIT = 13, // Status flag + HPHYBRID_FLG_BIT = 14, // "Flag" flag + HPHYBRID_DC_BIT = 15, // Decimal carry + HPHYBRID_IM_BIT = 16 // Interrupt mode +}; + +constexpr uint16_t HP_REG_IV_MASK = 0xfff0; // IV mask +constexpr uint16_t HP_REG_PA_MASK = 0x000f; // PA mask +constexpr uint16_t HP_REG_SE_MASK = 0x000f; // SE mask #define CURRENT_PA (m_reg_PA[ 0 ]) -#define HP_RESET_ADDR 0x0020 +constexpr uint16_t HP_RESET_ADDR = 0x0020; // Part of r32-r37 that is actually output as address extension (6 bits of "BSC": block select code) -#define BSC_REG_MASK 0x3f +constexpr uint16_t BSC_REG_MASK = 0x3f; + +// Address mask of 15-bit processor +constexpr uint16_t ADDR_MASK_15BIT = 0x7fff; + +// Mask of MSB of registers +constexpr uint16_t REG_MSB_MASK = BIT_MASK<uint16_t>(15); + +// Memory, I/O & register access timings +constexpr unsigned DEF_MEM_R_CYCLES = 4; // Default memory read cycles +constexpr unsigned DEF_MEM_W_CYCLES = 4; // Default memory write cycles +constexpr unsigned REGISTER_RW_CYCLES = 5; // Internal register R/W cycles +constexpr unsigned IO_RW_CYCLES = 7; // I/O R/W cycles DEFINE_DEVICE_TYPE(HP_5061_3001, hp_5061_3001_cpu_device, "5061_3001", "Hewlett-Packard HP-5061-3001") DEFINE_DEVICE_TYPE(HP_5061_3011, hp_5061_3011_cpu_device, "5061_3011", "Hewlett-Packard HP-5061-3011") +DEFINE_DEVICE_TYPE(HP_09825_67907, hp_09825_67907_cpu_device, "09825_67907", "Hewlett-Packard HP-09825-67907") WRITE_LINE_MEMBER(hp_hybrid_cpu_device::dmar_w) { @@ -148,9 +175,15 @@ uint8_t hp_hybrid_cpu_device::pa_r(void) const hp_hybrid_cpu_device::hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t addrwidth) : cpu_device(mconfig, type, tag, owner, clock) , m_pa_changed_func(*this) + , m_addr_mask((1U << addrwidth) - 1) + , m_relative_mode(true) + , m_r_cycles(DEF_MEM_R_CYCLES) + , m_w_cycles(DEF_MEM_W_CYCLES) + , m_boot_mode(false) , m_program_config("program", ENDIANNESS_BIG, 16, addrwidth, -1) , m_io_config("io", ENDIANNESS_BIG, 16, 6, -1) { + m_addr_mask_low16 = uint16_t(m_addr_mask & 0xffff); } device_memory_interface::space_config_vector hp_hybrid_cpu_device::memory_space_config() const @@ -163,24 +196,6 @@ device_memory_interface::space_config_vector hp_hybrid_cpu_device::memory_space_ void hp_hybrid_cpu_device::device_start() { - m_reg_A = 0; - m_reg_B = 0; - m_reg_P = HP_RESET_ADDR; - m_reg_R = 0; - m_reg_C = 0; - m_reg_D = 0; - m_reg_IV = 0; - m_reg_PA[ 0 ] = 0; - m_reg_PA[ 1 ] = 0; - m_reg_PA[ 2 ] = 0; - m_reg_W = 0; - m_flags = 0; - m_dmapa = 0; - m_dmama = 0; - m_dmac = 0; - m_reg_I = 0; - m_forced_bsc_25 = false; - { state_add(HPHYBRID_A, "A", m_reg_A); state_add(HPHYBRID_B, "B", m_reg_B); @@ -193,8 +208,8 @@ void hp_hybrid_cpu_device::device_start() state_add(STATE_GENSP, "GENSP", m_reg_R).noshow(); state_add(HPHYBRID_IV, "IV", m_reg_IV); state_add(HPHYBRID_PA, "PA", m_reg_PA[ 0 ]); - state_add(HPHYBRID_W, "W", m_reg_W).noshow(); - state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).noshow().formatstr("%9s"); + state_add(HPHYBRID_W, "W", m_reg_W).noshow(); + state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).noshow().formatstr("%12s"); state_add(HPHYBRID_DMAPA , "DMAPA" , m_dmapa).noshow(); state_add(HPHYBRID_DMAMA , "DMAMA" , m_dmama).noshow(); state_add(HPHYBRID_DMAC , "DMAC" , m_dmac).noshow(); @@ -230,9 +245,27 @@ void hp_hybrid_cpu_device::device_start() void hp_hybrid_cpu_device::device_reset() { + m_reg_A = 0; + m_reg_B = 0; m_reg_P = HP_RESET_ADDR; - m_reg_I = fetch(); + m_reg_R = 0; + m_reg_C = 0; + m_reg_D = 0; + m_reg_IV = 0; + m_reg_PA[ 0 ] = 0; + m_reg_PA[ 1 ] = 0; + m_reg_PA[ 2 ] = 0; + m_reg_W = 0; m_flags = 0; + m_dmapa = 0; + m_dmama = 0; + m_dmac = 0; + m_forced_bsc_25 = m_boot_mode; + + m_last_pa = ~0; + update_pa(); + + m_reg_I = fetch(); } void hp_hybrid_cpu_device::execute_run() @@ -272,30 +305,36 @@ uint16_t hp_hybrid_cpu_device::execute_one(uint16_t opcode) { if ((opcode & 0x7fe0) == 0x7000) { // EXE - m_icount -= 8; - // Indirect addressing in EXE instruction seems to use AEC case A instead of case C - // (because it's an opcode fetch) - uint16_t reg = RM(opcode & 0x1f); + m_icount -= 2; + uint16_t fetch_addr = opcode & 0x1f; if (BIT(opcode , 15)) { - m_icount -= 6; - return RM(add_mae(AEC_CASE_A , reg)); - } else { - return reg; + fetch_addr = get_indirect_target(fetch_addr); } + // Indirect addressing in EXE instruction seems to use AEC case A instead of case C + // (because it's an opcode fetch) + return RM(add_mae(AEC_CASE_A , fetch_addr)); } else { - m_reg_P = execute_one_sub(opcode); + uint16_t next_P; + if (!execute_one_bpc(opcode , next_P) && + !execute_no_bpc(opcode , next_P)) { + // Unrecognized instruction, make it a NOP + logerror("hp_hybrid: unknown opcode %04x @ %06x\n" , opcode , m_genpc); + next_P = m_reg_P + 1; + } + m_reg_P = next_P & m_addr_mask_low16; return fetch(); } } /** - * Execute 1 instruction (except EXE) + * Execute 1 BPC instruction (except EXE) * * @param opcode Opcode to be executed (no EXE instructions) + * @param[out] next_pc new value of P register * - * @return new value of P register + * @return true iff instruction executed */ -uint16_t hp_hybrid_cpu_device::execute_one_sub(uint16_t opcode) +bool hp_hybrid_cpu_device::execute_one_bpc(uint16_t opcode , uint16_t& next_pc) { uint32_t ea; uint16_t tmp; @@ -303,193 +342,220 @@ uint16_t hp_hybrid_cpu_device::execute_one_sub(uint16_t opcode) switch (opcode & 0x7800) { case 0x0000: // LDA - m_icount -= 13; + m_icount -= 1; m_reg_A = RM(get_ea(opcode)); break; case 0x0800: // LDB - m_icount -= 13; + m_icount -= 1; m_reg_B = RM(get_ea(opcode)); break; case 0x1000: // CPA - m_icount -= 16; + m_icount -= 4; if (m_reg_A != RM(get_ea(opcode))) { // Skip next instruction - return m_reg_P + 2; + next_pc = m_reg_P + 2; + return true; } break; case 0x1800: // CPB - m_icount -= 16; + m_icount -= 4; if (m_reg_B != RM(get_ea(opcode))) { // Skip next instruction - return m_reg_P + 2; + next_pc = m_reg_P + 2; + return true; } break; case 0x2000: // ADA - m_icount -= 13; + m_icount -= 1; do_add(m_reg_A , RM(get_ea(opcode))); break; case 0x2800: // ADB - m_icount -= 13; + m_icount -= 1; do_add(m_reg_B , RM(get_ea(opcode))); break; case 0x3000: // STA - m_icount -= 13; + m_icount -= 1; WM(get_ea(opcode) , m_reg_A); break; case 0x3800: // STB - m_icount -= 13; + m_icount -= 1; WM(get_ea(opcode) , m_reg_B); break; case 0x4000: // JSM - m_icount -= 17; - WM(AEC_CASE_C , ++m_reg_R , m_reg_P); - return remove_mae(get_ea(opcode)); + m_icount -= 5; + m_reg_R = (m_reg_R + 1) & m_addr_mask_low16; + WM(AEC_CASE_C , m_reg_R , m_reg_P); + next_pc = remove_mae(get_ea(opcode)); + return true; case 0x4800: // ISZ - m_icount -= 19; + m_icount -= 1; ea = get_ea(opcode); tmp = RM(ea) + 1; WM(ea , tmp); if (tmp == 0) { // Skip next instruction - return m_reg_P + 2; + next_pc = m_reg_P + 2; + return true; } break; case 0x5000: // AND - m_icount -= 13; + m_icount -= 1; m_reg_A &= RM(get_ea(opcode)); break; case 0x5800: // DSZ - m_icount -= 19; + m_icount -= 1; ea = get_ea(opcode); tmp = RM(ea) - 1; WM(ea , tmp); if (tmp == 0) { // Skip next instruction - return m_reg_P + 2; + next_pc = m_reg_P + 2; + return true; } break; case 0x6000: // IOR - m_icount -= 13; + m_icount -= 1; m_reg_A |= RM(get_ea(opcode)); break; case 0x6800: // JMP - m_icount -= 8; - return remove_mae(get_ea(opcode)); + m_icount -= 2; + next_pc = remove_mae(get_ea(opcode)); + return true; default: switch (opcode & 0xfec0) { case 0x7400: // RZA // SZA - m_icount -= 14; - return get_skip_addr(opcode , m_reg_A == 0); + m_icount -= 8; + next_pc = get_skip_addr(opcode , m_reg_A == 0); + return true; case 0x7440: // RIA // SIA - m_icount -= 14; - return get_skip_addr(opcode , m_reg_A++ == 0); + m_icount -= 8; + next_pc = get_skip_addr(opcode , m_reg_A++ == 0); + return true; case 0x7480: // SFS // SFC - m_icount -= 14; - return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_FLG_BIT)); + m_icount -= 8; + next_pc = get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_FLG_BIT)); + return true; + + case 0x74c0: + // SDS + // SDC + m_icount -= 8; + next_pc = get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_DC_BIT)); + return true; case 0x7C00: // RZB // SZB - m_icount -= 14; - return get_skip_addr(opcode , m_reg_B == 0); + m_icount -= 8; + next_pc = get_skip_addr(opcode , m_reg_B == 0); + return true; case 0x7C40: // RIB // SIB - m_icount -= 14; - return get_skip_addr(opcode , m_reg_B++ == 0); + m_icount -= 8; + next_pc = get_skip_addr(opcode , m_reg_B++ == 0); + return true; case 0x7c80: // SSS // SSC - m_icount -= 14; - return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_STS_BIT)); + m_icount -= 8; + next_pc = get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_STS_BIT)); + return true; case 0x7cc0: // SHS // SHC - m_icount -= 14; - return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_HALT_BIT)); + m_icount -= 8; + next_pc = get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_HALT_BIT)); + return true; default: switch (opcode & 0xfe00) { case 0x7600: // SLA // RLA - m_icount -= 14; - return get_skip_addr_sc(opcode , m_reg_A , 0); + m_icount -= 8; + next_pc = get_skip_addr_sc(opcode , m_reg_A , 0); + return true; case 0x7e00: // SLB // RLB - m_icount -= 14; - return get_skip_addr_sc(opcode , m_reg_B , 0); + m_icount -= 8; + next_pc = get_skip_addr_sc(opcode , m_reg_B , 0); + return true; case 0xf400: // SAP // SAM - m_icount -= 14; - return get_skip_addr_sc(opcode , m_reg_A , 15); + m_icount -= 8; + next_pc = get_skip_addr_sc(opcode , m_reg_A , 15); + return true; case 0xf600: // SOC // SOS - m_icount -= 14; - return get_skip_addr_sc(opcode , m_flags , HPHYBRID_O_BIT); + m_icount -= 8; + next_pc = get_skip_addr_sc(opcode , m_flags , HPHYBRID_O_BIT); + return true; case 0xfc00: // SBP // SBM - m_icount -= 14; - return get_skip_addr_sc(opcode , m_reg_B , 15); + m_icount -= 8; + next_pc = get_skip_addr_sc(opcode , m_reg_B , 15); + return true; case 0xfe00: // SEC // SES - m_icount -= 14; - return get_skip_addr_sc(opcode , m_flags , HPHYBRID_C_BIT); + m_icount -= 8; + next_pc = get_skip_addr_sc(opcode , m_flags , HPHYBRID_C_BIT); + return true; default: switch (opcode & 0xfff0) { case 0xf100: // AAR tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); + m_icount -= (3 + tmp); // A shift by 16 positions is equivalent to a shift by 15 tmp = tmp > 15 ? 15 : tmp; m_reg_A = ((m_reg_A ^ 0x8000) >> tmp) - (0x8000 >> tmp); @@ -498,7 +564,7 @@ uint16_t hp_hybrid_cpu_device::execute_one_sub(uint16_t opcode) case 0xf900: // ABR tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); + m_icount -= (3 + tmp); tmp = tmp > 15 ? 15 : tmp; m_reg_B = ((m_reg_B ^ 0x8000) >> tmp) - (0x8000 >> tmp); break; @@ -506,161 +572,123 @@ uint16_t hp_hybrid_cpu_device::execute_one_sub(uint16_t opcode) case 0xf140: // SAR tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); + m_icount -= (3 + tmp); m_reg_A >>= tmp; break; case 0xf940: // SBR tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); + m_icount -= (3 + tmp); m_reg_B >>= tmp; break; case 0xf180: // SAL tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); + m_icount -= (3 + tmp); m_reg_A <<= tmp; break; case 0xf980: // SBL tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); + m_icount -= (3 + tmp); m_reg_B <<= tmp; break; case 0xf1c0: // RAR tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); + m_icount -= (3 + tmp); m_reg_A = (m_reg_A >> tmp) | (m_reg_A << (16 - tmp)); break; case 0xf9c0: // RBR tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); + m_icount -= (3 + tmp); m_reg_B = (m_reg_B >> tmp) | (m_reg_B << (16 - tmp)); break; default: - if ((opcode & 0xf760) == 0x7160) { - // Place/withdraw instructions - m_icount -= 23; - do_pw(opcode); - } else if ((opcode & 0xff80) == 0xf080) { + if ((opcode & 0xff80) == 0xf080) { // RET - m_icount -= 16; + m_icount -= 4; if (BIT(opcode , 6)) { // Pop PA stack if (BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) { BIT_CLR(m_flags , HPHYBRID_IRH_SVC_BIT); memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS); - m_pa_changed_func((uint8_t)CURRENT_PA); + update_pa(); } else if (BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) { BIT_CLR(m_flags , HPHYBRID_IRL_SVC_BIT); memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS); - m_pa_changed_func((uint8_t)CURRENT_PA); + update_pa(); } - tmp = RM(AEC_CASE_C , m_reg_R--) + (opcode & 0x1f); + } + tmp = RM(AEC_CASE_C , m_reg_R) + (opcode & 0x1f); + m_reg_R = (m_reg_R - 1) & m_addr_mask_low16; + if (BIT(opcode , 6)) { BIT_CLR(m_flags, HPHYBRID_IM_BIT); - } else { - tmp = RM(AEC_CASE_C , m_reg_R--) + (opcode & 0x1f); } - return BIT(opcode , 5) ? tmp - 0x20 : tmp; + next_pc = BIT(opcode , 5) ? tmp - 0x20 : tmp; + return true; } else { switch (opcode) { - case 0x7100: - // SDO - m_icount -= 12; - BIT_SET(m_flags , HPHYBRID_DMADIR_BIT); - break; - - case 0x7108: - // SDI - m_icount -= 12; - BIT_CLR(m_flags , HPHYBRID_DMADIR_BIT); - break; - case 0x7110: // EIR - m_icount -= 12; + m_icount -= 6; BIT_SET(m_flags , HPHYBRID_INTEN_BIT); break; case 0x7118: // DIR - m_icount -= 12; + m_icount -= 6; BIT_CLR(m_flags , HPHYBRID_INTEN_BIT); break; case 0x7120: // DMA - m_icount -= 12; + m_icount -= 6; BIT_SET(m_flags , HPHYBRID_DMAEN_BIT); break; case 0x7138: // DDR - m_icount -= 12; + m_icount -= 6; BIT_CLR(m_flags , HPHYBRID_DMAEN_BIT); break; - case 0x7140: - // DBL - m_icount -= 12; - BIT_CLR(m_flags , HPHYBRID_DB_BIT); - break; - - case 0x7148: - // CBL - m_icount -= 12; - BIT_CLR(m_flags , HPHYBRID_CB_BIT); - break; - - case 0x7150: - // DBU - m_icount -= 12; - BIT_SET(m_flags , HPHYBRID_DB_BIT); - break; - - case 0x7158: - // CBU - m_icount -= 12; - BIT_SET(m_flags , HPHYBRID_CB_BIT); - break; - case 0xf020: // TCA - m_icount -= 9; + m_icount -= 3; m_reg_A = ~m_reg_A; do_add(m_reg_A , 1); break; case 0xf060: // CMA - m_icount -= 9; + m_icount -= 3; m_reg_A = ~m_reg_A; break; case 0xf820: // TCB - m_icount -= 9; + m_icount -= 3; m_reg_B = ~m_reg_B; do_add(m_reg_B , 1); break; case 0xf860: // CMB - m_icount -= 9; + m_icount -= 3; m_reg_B = ~m_reg_B; break; default: - // Unrecognized instruction: pass it on for further processing (by EMC if present) - return execute_no_bpc_ioc(opcode); + // Unrecognized instruction: pass it on for further processing by other units + return false; } } } @@ -668,23 +696,241 @@ uint16_t hp_hybrid_cpu_device::execute_one_sub(uint16_t opcode) } } - return m_reg_P + 1; + next_pc = m_reg_P + 1; + return true; +} + +void hp_hybrid_cpu_device::emc_start() +{ + state_add(HPHYBRID_AR2, "Ar2" , m_reg_ar2[ 0 ]); + state_add(HPHYBRID_AR2_2, "Ar2_2" , m_reg_ar2[ 1 ]); + state_add(HPHYBRID_AR2_3, "Ar2_3" , m_reg_ar2[ 2 ]); + state_add(HPHYBRID_AR2_4, "Ar2_4" , m_reg_ar2[ 3 ]); + state_add(HPHYBRID_SE, "SE" , m_reg_se); + state_add(HPHYBRID_R25, "R25" , m_reg_r25).noshow(); + state_add(HPHYBRID_R26, "R26" , m_reg_r26).noshow(); + state_add(HPHYBRID_R27, "R27" , m_reg_r27).noshow(); + + save_item(NAME(m_reg_ar2[ 0 ])); + save_item(NAME(m_reg_ar2[ 1 ])); + save_item(NAME(m_reg_ar2[ 2 ])); + save_item(NAME(m_reg_ar2[ 3 ])); + save_item(NAME(m_reg_se)); + save_item(NAME(m_reg_r25)); + save_item(NAME(m_reg_r26)); + save_item(NAME(m_reg_r27)); +} + +bool hp_hybrid_cpu_device::execute_emc(uint16_t opcode , uint16_t& next_pc) +{ + // EMC instructions + uint8_t n; + uint16_t tmp1; + uint16_t tmp2; + uint64_t tmp_ar; + uint64_t tmp_ar2; + bool carry; + + switch (opcode & 0xfff0) { + case 0x7300: + // XFR + tmp1 = m_reg_A; + tmp2 = m_reg_B; + n = (opcode & 0xf) + 1; + m_icount -= 15; + while (n--) { + WM(AEC_CASE_C , tmp2 , RM(AEC_CASE_C , tmp1)); + tmp1++; + tmp2++; + } + break; + + case 0x7380: + // CLR + tmp1 = m_reg_A; + n = (opcode & 0xf) + 1; + m_icount -= 10; + while (n--) { + WM(AEC_CASE_C , tmp1 , 0); + tmp1++; + } + break; + + default: + switch (opcode) { + case 0x7200: + // MWA + m_icount -= 22; + tmp_ar2 = get_ar2(); + carry = do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , m_reg_B); + set_ar2(tmp_ar2); + if (carry) + BIT_SET(m_flags, HPHYBRID_DC_BIT); + else + BIT_CLR(m_flags, HPHYBRID_DC_BIT); + break; + + case 0x7220: + // CMY + m_icount -= 17; + tmp_ar2 = get_ar2(); + tmp_ar2 = 0x999999999999ULL - tmp_ar2; + do_dec_add(true , tmp_ar2 , 0); + set_ar2(tmp_ar2); + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7260: + // CMX + m_icount -= 17; + tmp_ar = get_ar1(); + tmp_ar = 0x999999999999ULL - tmp_ar; + do_dec_add(true , tmp_ar , 0); + set_ar1(tmp_ar); + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7280: + // FXA + m_icount -= 16; + tmp_ar2 = get_ar2(); + carry = do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , get_ar1()); + set_ar2(tmp_ar2); + if (carry) + BIT_SET(m_flags, HPHYBRID_DC_BIT); + else + BIT_CLR(m_flags, HPHYBRID_DC_BIT); + break; + + case 0x7340: + // NRM + tmp_ar2 = get_ar2(); + m_icount -= 17; + for (n = 0; n < 12 && (tmp_ar2 & 0xf00000000000ULL) == 0; n++) { + do_dec_shift_l(0 , tmp_ar2); + m_icount--; + } + m_reg_B = n; + if (n < 12) { + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + set_ar2(tmp_ar2); + } else { + BIT_SET(m_flags , HPHYBRID_DC_BIT); + // When ar2 is 0, total time is 69 cycles + // (salcazzo che cosa fa per altri 34 cicli) + m_icount -= 34; + } + break; + + case 0x73c0: + // CDC + m_icount -= 5; + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7a00: + // FMP + m_icount -= 15; + m_reg_A = 0; + n = m_reg_B & 0xf; + if (n == 0) { + tmp_ar = 0; + } else { + m_icount -= 3; + tmp_ar = get_ar1(); + n--; + } + tmp_ar2 = get_ar2(); + do { + m_icount -= 13; + if (do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , tmp_ar)) { + m_reg_A++; + } + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + } while (n--); + set_ar2(tmp_ar2); + break; + + case 0x7a21: + // FDV + // This instruction keeps adding AR1 to AR2 until an overflow occurs. + // Register B will hold the number of iterations after the execution. + // Note that if AR1 is 0 overflow never happens and the processor hangs. + // Here we stop at 15 iterations (after all there are only 4 bits in the loop counter). + m_icount -= 13; + m_reg_B = 0; + tmp_ar = get_ar1(); + tmp_ar2 = get_ar2(); + while (m_reg_B < 15 && !do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , tmp_ar)) { + m_icount -= 13; + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + m_reg_B++; + } + set_ar2(tmp_ar2); + break; + + case 0x7b00: + // MRX + // Cycle count is incorrect for the case where B=0, as AR1 doesn't get read or written in real hw + set_ar1(do_mrxy(get_ar1())); + m_icount -= 20; + break; + + case 0x7b21: + // DRS + tmp_ar = get_ar1(); + m_icount -= 14; + m_reg_A = m_reg_se = do_dec_shift_r(0 , tmp_ar); + set_ar1(tmp_ar); + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7b40: + // MRY + set_ar2(do_mrxy(get_ar2())); + m_icount -= 27; + break; + + case 0x7b61: + // MLY + tmp_ar2 = get_ar2(); + m_icount -= 26; + m_reg_A = m_reg_se = do_dec_shift_l(m_reg_A & 0xf , tmp_ar2); + set_ar2(tmp_ar2); + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7b8f: + // MPY + do_mpy(); + break; + + default: + // Unrecognized instruction + return false; + } + } + + next_pc = m_reg_P + 1; + return true; } void hp_hybrid_cpu_device::state_string_export(const device_state_entry &entry, std::string &str) const { if (entry.index() == STATE_GENFLAGS) { - str = string_format("%s %s %c %c", + str = string_format("%s %s %s %c %c", BIT(m_flags , HPHYBRID_DB_BIT) ? "Db":"..", BIT(m_flags , HPHYBRID_CB_BIT) ? "Cb":"..", + BIT(m_flags , HPHYBRID_DC_BIT) ? "DC":"..", BIT(m_flags , HPHYBRID_O_BIT) ? 'O':'.', BIT(m_flags , HPHYBRID_C_BIT) ? 'E':'.'); } } -std::unique_ptr<util::disasm_interface> hp_hybrid_cpu_device::create_disassembler() +uint32_t hp_hybrid_cpu_device::add_mae(aec_cases_t aec_case , uint16_t addr) { - return std::make_unique<hp_hybrid_disassembler>(); + // No MAE on 5061-3011 or 09825-67907 + return addr; } uint16_t hp_hybrid_cpu_device::remove_mae(uint32_t addr) @@ -699,26 +945,31 @@ uint16_t hp_hybrid_cpu_device::RM(aec_cases_t aec_case , uint16_t addr) uint16_t hp_hybrid_cpu_device::RM(uint32_t addr) { - uint16_t tmp; + addr &= m_addr_mask; uint16_t addr_wo_bsc = remove_mae(addr); if (addr_wo_bsc <= HP_REG_LAST_ADDR) { // Any access to internal registers removes forcing of BSC 2x m_forced_bsc_25 = false; - // Memory mapped registers that are present in both 3001 & 3011 + // Memory mapped BPC registers + uint16_t tmp; switch (addr_wo_bsc) { case HP_REG_A_ADDR: - return m_reg_A; + tmp = m_reg_A; + break; case HP_REG_B_ADDR: - return m_reg_B; + tmp = m_reg_B; + break; case HP_REG_P_ADDR: - return m_reg_P; + tmp = m_reg_P; + break; case HP_REG_R_ADDR: - return m_reg_R; + tmp = m_reg_R; + break; case HP_REG_R4_ADDR: case HP_REG_R5_ADDR: @@ -727,44 +978,79 @@ uint16_t hp_hybrid_cpu_device::RM(uint32_t addr) return RIO(CURRENT_PA , addr_wo_bsc - HP_REG_R4_ADDR); case HP_REG_IV_ADDR: - return m_reg_IV; + tmp = m_reg_IV; + break; case HP_REG_PA_ADDR: - return CURRENT_PA; + tmp = CURRENT_PA; + break; case HP_REG_W_ADDR: - return m_reg_W; - - case HP_REG_DMAPA_ADDR: - tmp = m_dmapa & HP_REG_PA_MASK; - if (BIT(m_flags , HPHYBRID_CB_BIT)) { - BIT_SET(tmp , 15); - } - if (BIT(m_flags , HPHYBRID_DB_BIT)) { - BIT_SET(tmp , 14); - } - return tmp; + tmp = m_reg_W; + break; case HP_REG_DMAMA_ADDR: - return m_dmama; + tmp = m_dmama; + break; case HP_REG_DMAC_ADDR: - return m_dmac; + tmp = m_dmac; + break; case HP_REG_C_ADDR: - return m_reg_C; + tmp = m_reg_C; + break; case HP_REG_D_ADDR: - return m_reg_D; + tmp = m_reg_D; + break; default: - return read_non_common_reg(addr_wo_bsc); + if (!read_non_common_reg(addr_wo_bsc , tmp)) { + // Non-existing registers are returned as 0 + tmp = 0; + } + break; } + m_icount -= REGISTER_RW_CYCLES; + return tmp; } else { + m_icount -= m_r_cycles; return m_cache->read_word(addr); } } +bool hp_hybrid_cpu_device::read_emc_reg(uint16_t addr , uint16_t& v) +{ + switch (addr) { + case HP_REG_AR2_ADDR: + case HP_REG_AR2_ADDR + 1: + case HP_REG_AR2_ADDR + 2: + case HP_REG_AR2_ADDR + 3: + v = m_reg_ar2[ addr - HP_REG_AR2_ADDR ]; + return true; + + case HP_REG_SE_ADDR: + v = m_reg_se; + return true; + + case HP_REG_R25_ADDR: + v = m_reg_r25; + return true; + + case HP_REG_R26_ADDR: + v = m_reg_r26; + return true; + + case HP_REG_R27_ADDR: + v = m_reg_r27; + return true; + + default: + return false; + } +} + void hp_hybrid_cpu_device::WM(aec_cases_t aec_case , uint16_t addr , uint16_t v) { WM(add_mae(aec_case , addr) , v); @@ -772,13 +1058,14 @@ void hp_hybrid_cpu_device::WM(aec_cases_t aec_case , uint16_t addr , uint16_t v) void hp_hybrid_cpu_device::WM(uint32_t addr , uint16_t v) { + addr &= m_addr_mask; uint16_t addr_wo_bsc = remove_mae(addr); if (addr_wo_bsc <= HP_REG_LAST_ADDR) { // Any access to internal registers removes forcing of BSC 2x m_forced_bsc_25 = false; - // Memory mapped registers + // Memory mapped BPC registers switch (addr_wo_bsc) { case HP_REG_A_ADDR: m_reg_A = v; @@ -789,11 +1076,11 @@ void hp_hybrid_cpu_device::WM(uint32_t addr , uint16_t v) break; case HP_REG_P_ADDR: - m_reg_P = v; + m_reg_P = v & m_addr_mask_low16; break; case HP_REG_R_ADDR: - m_reg_R = v; + m_reg_R = v & m_addr_mask_low16; break; case HP_REG_R4_ADDR: @@ -801,7 +1088,7 @@ void hp_hybrid_cpu_device::WM(uint32_t addr , uint16_t v) case HP_REG_R6_ADDR: case HP_REG_R7_ADDR: WIO(CURRENT_PA , addr_wo_bsc - HP_REG_R4_ADDR , v); - break; + return; case HP_REG_IV_ADDR: m_reg_IV = v & HP_REG_IV_MASK; @@ -809,7 +1096,7 @@ void hp_hybrid_cpu_device::WM(uint32_t addr , uint16_t v) case HP_REG_PA_ADDR: CURRENT_PA = v & HP_REG_PA_MASK; - m_pa_changed_func((uint8_t)CURRENT_PA); + update_pa(); break; case HP_REG_W_ADDR: @@ -840,17 +1127,56 @@ void hp_hybrid_cpu_device::WM(uint32_t addr , uint16_t v) write_non_common_reg(addr_wo_bsc , v); break; } + m_icount -= REGISTER_RW_CYCLES; } else { + m_icount -= m_w_cycles; m_program->write_word(addr , v); } } +bool hp_hybrid_cpu_device::write_emc_reg(uint16_t addr , uint16_t v) +{ + switch (addr) { + case HP_REG_AR2_ADDR: + case HP_REG_AR2_ADDR + 1: + case HP_REG_AR2_ADDR + 2: + case HP_REG_AR2_ADDR + 3: + m_reg_ar2[ addr - HP_REG_AR2_ADDR ] = v; + return true; + + case HP_REG_SE_ADDR: + m_reg_se = v & HP_REG_SE_MASK; + return true; + + case HP_REG_R25_ADDR: + m_reg_r25 = v; + return true; + + case HP_REG_R26_ADDR: + m_reg_r26 = v; + return true; + + case HP_REG_R27_ADDR: + m_reg_r27 = v; + return true; + + default: + return false; + } +} + uint16_t hp_hybrid_cpu_device::fetch(void) { m_genpc = add_mae(AEC_CASE_A , m_reg_P); return RM(m_genpc); } +uint16_t hp_hybrid_cpu_device::get_indirect_target(uint32_t addr) +{ + // Single-level indirect addressing on 5061-3011 or 5061-3001 + return RM(addr); +} + uint32_t hp_hybrid_cpu_device::get_ea(uint16_t opcode) { uint16_t base; @@ -858,8 +1184,13 @@ uint32_t hp_hybrid_cpu_device::get_ea(uint16_t opcode) aec_cases_t aec; if (BIT(opcode , 10)) { - // Current page - base = m_reg_P; + if (m_relative_mode) { + // Current page relative addressing + base = m_reg_P; + } else { + // Current page absolute addressing + base = (m_reg_P & 0xfc00) | 0x0200; + } aec = AEC_CASE_A; } else { // Base page @@ -873,14 +1204,14 @@ uint32_t hp_hybrid_cpu_device::get_ea(uint16_t opcode) } base += off; + uint32_t ea = add_mae(aec , base); if (BIT(opcode , 15)) { // Indirect addressing - m_icount -= 6; - return add_mae(AEC_CASE_C , RM(aec , base)); + return add_mae(AEC_CASE_C , get_indirect_target(ea)); } else { // Direct addressing - return add_mae(aec , base); + return ea; } } @@ -917,7 +1248,7 @@ uint16_t hp_hybrid_cpu_device::get_skip_addr(uint16_t opcode , bool condition) c } } -uint16_t hp_hybrid_cpu_device::get_skip_addr_sc(uint16_t opcode , uint16_t& v , unsigned n) +template<typename T> uint16_t hp_hybrid_cpu_device::get_skip_addr_sc(uint16_t opcode , T& v , unsigned n) { bool val = BIT(v , n); @@ -932,109 +1263,11 @@ uint16_t hp_hybrid_cpu_device::get_skip_addr_sc(uint16_t opcode , uint16_t& v , return get_skip_addr(opcode , val); } -uint16_t hp_hybrid_cpu_device::get_skip_addr_sc(uint16_t opcode , uint32_t& v , unsigned n) +void hp_hybrid_cpu_device::update_pa() { - bool val = BIT(v , n); - - if (BIT(opcode , 7)) { - if (BIT(opcode , 6)) { - BIT_SET(v , n); - } else { - BIT_CLR(v , n); - } - } - - return get_skip_addr(opcode , val); -} - -void hp_hybrid_cpu_device::do_pw(uint16_t opcode) -{ - uint16_t tmp; - uint16_t reg_addr = opcode & 7; - uint16_t *ptr_reg; - uint16_t b_mask; - - if (BIT(opcode , 3)) { - ptr_reg = &m_reg_D; - b_mask = BIT_MASK(HPHYBRID_DB_BIT); - } else { - ptr_reg = &m_reg_C; - b_mask = BIT_MASK(HPHYBRID_CB_BIT); - } - - if (BIT(opcode , 4)) { - // Withdraw - if (BIT(opcode , 11)) { - // Byte - uint32_t tmp_addr = (uint32_t)(*ptr_reg); - if (m_flags & b_mask) { - tmp_addr |= 0x10000; - } - tmp = RM(AEC_CASE_C , (uint16_t)(tmp_addr >> 1)); - if (BIT(tmp_addr , 0)) { - tmp &= 0xff; - } else { - tmp >>= 8; - } - } else { - // Word - tmp = RM(AEC_CASE_C , *ptr_reg); - } - WM(reg_addr , tmp); - - if (BIT(opcode , 7)) { - // Post-decrement - if ((*ptr_reg)-- == 0) { - m_flags ^= b_mask; - } - } else { - // Post-increment - if (++(*ptr_reg) == 0) { - m_flags ^= b_mask; - } - } - } else { - // Place - if (BIT(opcode , 7)) { - // Pre-decrement - if ((*ptr_reg)-- == 0) { - m_flags ^= b_mask; - } - } else { - // Pre-increment - if (++(*ptr_reg) == 0) { - m_flags ^= b_mask; - } - } - tmp = RM(reg_addr); - if (BIT(opcode , 11)) { - // Byte - uint32_t tmp_addr = (uint32_t)(*ptr_reg); - if (m_flags & b_mask) { - tmp_addr |= 0x10000; - } - if (tmp_addr <= (HP_REG_LAST_ADDR * 2 + 1)) { - // Single bytes can be written to registers. - // The addressed register gets the written byte in the proper position - // and a 0 in the other byte because access to registers is always done in - // 16 bits units. - if (BIT(tmp_addr , 0)) { - tmp &= 0xff; - } else { - tmp <<= 8; - } - WM(tmp_addr >> 1 , tmp); - } else { - // Extend address, form byte address - uint16_t val = (tmp_addr & 1) ? uint8_t(tmp) : (tmp << 8); - uint16_t mask = (tmp_addr & 1) ? 0x00ff : 0xff00; - tmp_addr = add_mae(AEC_CASE_C , tmp_addr >> 1); - m_program->write_word(tmp_addr , val, mask); - } - } else { - // Word - WM(AEC_CASE_C , *ptr_reg , tmp); - } + if (CURRENT_PA != m_last_pa) { + m_last_pa = CURRENT_PA; + m_pa_changed_func(m_last_pa); } } @@ -1081,19 +1314,24 @@ void hp_hybrid_cpu_device::check_for_interrupts(void) memmove(&m_reg_PA[ 1 ] , &m_reg_PA[ 0 ] , HPHYBRID_INT_LVLS); CURRENT_PA = new_PA; + update_pa(); - m_pa_changed_func((uint8_t)CURRENT_PA); - - // Is this correct? Patent @ pg 210 suggests that the whole interrupt recognition sequence - // lasts for 32 cycles - m_icount -= 32; + // Total time for int. ack execution = 12 + WM + RM * (1 + IND) + RR + // WM = memory write cycles + // RM = memory read cycles + // IND = count of indirections (1 in 3001/3011) + // RR = register read cycles + m_icount -= (12 + REGISTER_RW_CYCLES); // Allow special processing in 5061-3001 enter_isr(); // Do a double-indirect JSM IV,I instruction - WM(AEC_CASE_C , ++m_reg_R , m_reg_P); - m_reg_P = RM(AEC_CASE_C , m_reg_IV + CURRENT_PA); + // On 09825 there can be more than 2 levels of indirection + m_reg_R = (m_reg_R + 1) & m_addr_mask_low16; + WM(AEC_CASE_C , m_reg_R , m_reg_P); + uint32_t addr = add_mae(AEC_CASE_C , m_reg_IV + CURRENT_PA); + m_reg_P = get_indirect_target(addr); m_reg_I = fetch(); } @@ -1102,100 +1340,19 @@ void hp_hybrid_cpu_device::enter_isr(void) // Do nothing special } -void hp_hybrid_cpu_device::handle_dma(void) -{ - // Patent hints at the fact that terminal count is detected by bit 15 of dmac being 1 after decrementing - bool tc = BIT(--m_dmac , 15) != 0; - uint16_t tmp; - - if (BIT(m_flags , HPHYBRID_DMADIR_BIT)) { - // "Outward" DMA: memory -> peripheral - tmp = RM(AEC_CASE_D , m_dmama++); - WIO(m_dmapa , tc ? 2 : 0 , tmp); - m_icount -= 10; - } else { - // "Inward" DMA: peripheral -> memory - tmp = RIO(m_dmapa , tc ? 2 : 0); - WM(AEC_CASE_D , m_dmama++ , tmp); - m_icount -= 9; - } - - // Mystery solved: DMA is not automatically disabled at TC (test of 9845's graphic memory relies on this to work) -} - uint16_t hp_hybrid_cpu_device::RIO(uint8_t pa , uint8_t ic) { + m_icount -= IO_RW_CYCLES; return m_io->read_word(HP_MAKE_IOADDR(pa, ic)); } void hp_hybrid_cpu_device::WIO(uint8_t pa , uint8_t ic , uint16_t v) { + m_icount -= IO_RW_CYCLES; m_io->write_word(HP_MAKE_IOADDR(pa, ic) , v); } -hp_5061_3001_cpu_device::hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hp_hybrid_cpu_device(mconfig, HP_5061_3001, tag, owner, clock, 22) - , m_boot_mode(false) -{ -} - -void hp_5061_3001_cpu_device::device_start() -{ - hp_hybrid_cpu_device::device_start(); - - state_add(HPHYBRID_AR2, "Ar2" , m_reg_ar2[ 0 ]); - state_add(HPHYBRID_AR2_2, "Ar2_2" , m_reg_ar2[ 1 ]); - state_add(HPHYBRID_AR2_3, "Ar2_3" , m_reg_ar2[ 2 ]); - state_add(HPHYBRID_AR2_4, "Ar2_4" , m_reg_ar2[ 3 ]); - state_add(HPHYBRID_SE, "SE" , m_reg_se); - state_add(HPHYBRID_R25, "R25" , m_reg_r25).noshow(); - state_add(HPHYBRID_R26, "R26" , m_reg_r26).noshow(); - state_add(HPHYBRID_R27, "R27" , m_reg_r27).noshow(); - state_add(HPHYBRID_R32, "R32" , m_reg_aec[ 0 ]); - state_add(HPHYBRID_R33, "R33" , m_reg_aec[ 1 ]); - state_add(HPHYBRID_R34, "R34" , m_reg_aec[ 2 ]); - state_add(HPHYBRID_R35, "R35" , m_reg_aec[ 3 ]); - state_add(HPHYBRID_R36, "R36" , m_reg_aec[ 4 ]); - state_add(HPHYBRID_R37, "R37" , m_reg_aec[ 5 ]); - - save_item(NAME(m_reg_ar2[ 0 ])); - save_item(NAME(m_reg_ar2[ 1 ])); - save_item(NAME(m_reg_ar2[ 2 ])); - save_item(NAME(m_reg_ar2[ 3 ])); - save_item(NAME(m_reg_se)); - save_item(NAME(m_reg_r25)); - save_item(NAME(m_reg_r26)); - save_item(NAME(m_reg_r27)); - save_item(NAME(m_reg_aec[ 0 ])); - save_item(NAME(m_reg_aec[ 1 ])); - save_item(NAME(m_reg_aec[ 2 ])); - save_item(NAME(m_reg_aec[ 3 ])); - save_item(NAME(m_reg_aec[ 4 ])); - save_item(NAME(m_reg_aec[ 5 ])); -} - -void hp_5061_3001_cpu_device::device_reset() -{ - // Initial state of AEC registers: - // R32 0 - // R33 5 - // R34 0 - // R35 0 - // R36 0 - // R37 0 - m_reg_aec[ 0 ] = 0; - m_reg_aec[ 1 ] = 5; - m_reg_aec[ 2 ] = 0; - m_reg_aec[ 3 ] = 0; - m_reg_aec[ 4 ] = 0; - m_reg_aec[ 5 ] = 0; - - m_forced_bsc_25 = m_boot_mode; - - hp_hybrid_cpu_device::device_reset(); -} - -uint8_t hp_5061_3001_cpu_device::do_dec_shift_r(uint8_t d1 , uint64_t& mantissa) +uint8_t hp_hybrid_cpu_device::do_dec_shift_r(uint8_t d1 , uint64_t& mantissa) { uint8_t d12 = (uint8_t)(mantissa & 0xf); @@ -1204,7 +1361,7 @@ uint8_t hp_5061_3001_cpu_device::do_dec_shift_r(uint8_t d1 , uint64_t& mantissa) return d12; } -uint8_t hp_5061_3001_cpu_device::do_dec_shift_l(uint8_t d12 , uint64_t& mantissa) +uint8_t hp_hybrid_cpu_device::do_dec_shift_l(uint8_t d12 , uint64_t& mantissa) { uint8_t d1 = (uint8_t)((mantissa >> 44) & 0xf); @@ -1214,7 +1371,7 @@ uint8_t hp_5061_3001_cpu_device::do_dec_shift_l(uint8_t d12 , uint64_t& mantissa return d1; } -uint64_t hp_5061_3001_cpu_device::get_ar1(void) +uint64_t hp_hybrid_cpu_device::get_ar1(void) { uint32_t addr; uint64_t tmp; @@ -1229,7 +1386,7 @@ uint64_t hp_5061_3001_cpu_device::get_ar1(void) return tmp; } -void hp_5061_3001_cpu_device::set_ar1(uint64_t v) +void hp_hybrid_cpu_device::set_ar1(uint64_t v) { uint32_t addr; @@ -1241,7 +1398,7 @@ void hp_5061_3001_cpu_device::set_ar1(uint64_t v) WM(addr , (uint16_t)(v & 0xffff)); } -uint64_t hp_5061_3001_cpu_device::get_ar2(void) const +uint64_t hp_hybrid_cpu_device::get_ar2(void) const { uint64_t tmp; @@ -1254,7 +1411,7 @@ uint64_t hp_5061_3001_cpu_device::get_ar2(void) const return tmp; } -void hp_5061_3001_cpu_device::set_ar2(uint64_t v) +void hp_hybrid_cpu_device::set_ar2(uint64_t v) { m_reg_ar2[ 3 ] = (uint16_t)(v & 0xffff); v >>= 16; @@ -1263,7 +1420,7 @@ void hp_5061_3001_cpu_device::set_ar2(uint64_t v) m_reg_ar2[ 1 ] = (uint16_t)(v & 0xffff); } -uint64_t hp_5061_3001_cpu_device::do_mrxy(uint64_t ar) +uint64_t hp_hybrid_cpu_device::do_mrxy(uint64_t ar) { uint8_t n; @@ -1281,7 +1438,7 @@ uint64_t hp_5061_3001_cpu_device::do_mrxy(uint64_t ar) return ar; } -bool hp_5061_3001_cpu_device::do_dec_add(bool carry_in , uint64_t& a , uint64_t b) +bool hp_hybrid_cpu_device::do_dec_add(bool carry_in , uint64_t& a , uint64_t b) { uint64_t tmp = 0; unsigned i; @@ -1314,8 +1471,21 @@ bool hp_5061_3001_cpu_device::do_dec_add(bool carry_in , uint64_t& a , uint64_t return carry_in; } -void hp_5061_3001_cpu_device::do_mpy(void) +void hp_hybrid_cpu_device::do_mpy(void) { + // Count 0->1 and 1->0 transitions in A register + // Correct timing needs this count as real hw uses Booth's algorithm for multiplication + uint16_t tmp = m_reg_A; + uint16_t mask = ~0; + for (unsigned i = 0; i < 16 && tmp; ++i) { + if (BIT(tmp , 0)) { + tmp ^= mask; + m_icount -= 2; + } + tmp >>= 1; + mask >>= 1; + } + int32_t a = (int16_t)m_reg_A; int32_t b = (int16_t)m_reg_B; int32_t p = a * b; @@ -1323,227 +1493,287 @@ void hp_5061_3001_cpu_device::do_mpy(void) m_reg_A = (uint16_t)(p & 0xffff); m_reg_B = (uint16_t)((p >> 16) & 0xffff); - // Not entirely correct, timing depends on initial content of A register - m_icount -= 65; + m_icount -= 59; } -uint16_t hp_5061_3001_cpu_device::execute_no_bpc_ioc(uint16_t opcode) +// ******************************************************************************** +// hp_5061_3011_cpu_device +// ******************************************************************************** +hp_5061_3011_cpu_device::hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : hp_hybrid_cpu_device(mconfig, HP_5061_3011, tag, owner, clock, 16) { - // EMC instructions - uint8_t n; - uint16_t tmp1; - uint16_t tmp2; - uint64_t tmp_ar; - uint64_t tmp_ar2; - bool carry; +} - switch (opcode & 0xfff0) { - case 0x7300: - // XFR - tmp1 = m_reg_A; - tmp2 = m_reg_B; - n = (opcode & 0xf) + 1; - m_icount -= 21; - while (n--) { - m_icount -= 12; - WM(AEC_CASE_C , tmp2 , RM(AEC_CASE_C , tmp1)); - tmp1++; - tmp2++; - } - break; +hp_5061_3011_cpu_device::hp_5061_3011_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t addrwidth) + : hp_hybrid_cpu_device(mconfig, type, tag, owner, clock, addrwidth) +{ +} - case 0x7380: - // CLR - tmp1 = m_reg_A; - n = (opcode & 0xf) + 1; - m_icount -= 16; - while (n--) { - m_icount -= 6; - WM(AEC_CASE_C , tmp1 , 0); - tmp1++; +bool hp_5061_3011_cpu_device::execute_no_bpc(uint16_t opcode , uint16_t& next_pc) +{ + // 16-bit IOC instructions + if ((opcode & 0xf760) == 0x7160) { + // Place/withdraw + uint16_t tmp; + uint16_t reg_addr = opcode & 7; + uint16_t *ptr_reg; + uint32_t b_mask; + + if (BIT(opcode , 3)) { + ptr_reg = &m_reg_D; + b_mask = BIT_MASK<uint32_t>(HPHYBRID_DB_BIT); + } else { + ptr_reg = &m_reg_C; + b_mask = BIT_MASK<uint32_t>(HPHYBRID_CB_BIT); } - break; - default: - switch (opcode) { - case 0x7200: - // MWA - m_icount -= 28; - tmp_ar2 = get_ar2(); - carry = do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , m_reg_B); - set_ar2(tmp_ar2); - if (carry) - BIT_SET(m_flags, HPHYBRID_DC_BIT); - else - BIT_CLR(m_flags, HPHYBRID_DC_BIT); - break; - - case 0x7220: - // CMY - m_icount -= 23; - tmp_ar2 = get_ar2(); - tmp_ar2 = 0x999999999999ULL - tmp_ar2; - do_dec_add(true , tmp_ar2 , 0); - set_ar2(tmp_ar2); - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - break; - - case 0x7260: - // CMX - m_icount -= 59; - tmp_ar = get_ar1(); - tmp_ar = 0x999999999999ULL - tmp_ar; - do_dec_add(true , tmp_ar , 0); - set_ar1(tmp_ar); - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - break; - - case 0x7280: - // FXA - m_icount -= 40; - tmp_ar2 = get_ar2(); - carry = do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , get_ar1()); - set_ar2(tmp_ar2); - if (carry) - BIT_SET(m_flags, HPHYBRID_DC_BIT); - else - BIT_CLR(m_flags, HPHYBRID_DC_BIT); - break; + if (BIT(opcode , 4)) { + // Withdraw + if (BIT(opcode , 11)) { + // Byte + uint32_t tmp_addr = (uint32_t)(*ptr_reg); + if (m_flags & b_mask) { + tmp_addr |= BIT_MASK<uint32_t>(16); + } + tmp = RM(AEC_CASE_C , (uint16_t)(tmp_addr >> 1)); + if (BIT(tmp_addr , 0)) { + tmp &= 0xff; + } else { + tmp >>= 8; + } + } else { + // Word + tmp = RM(AEC_CASE_C , *ptr_reg); + } + WM(reg_addr , tmp); - case 0x7340: - // NRM - tmp_ar2 = get_ar2(); - m_icount -= 23; - for (n = 0; n < 12 && (tmp_ar2 & 0xf00000000000ULL) == 0; n++) { - do_dec_shift_l(0 , tmp_ar2); - m_icount--; + if (BIT(opcode , 7)) { + // Post-decrement + if ((*ptr_reg)-- == 0) { + m_flags ^= b_mask; + } + } else { + // Post-increment + if (++(*ptr_reg) == 0) { + m_flags ^= b_mask; + } } - m_reg_B = n; - if (n < 12) { - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - set_ar2(tmp_ar2); + } else { + // Place + if (BIT(opcode , 7)) { + // Pre-decrement + if ((*ptr_reg)-- == 0) { + m_flags ^= b_mask; + } } else { - BIT_SET(m_flags , HPHYBRID_DC_BIT); - // When ar2 is 0, total time is 69 cycles - // (salcazzo che cosa fa per altri 34 cicli) - m_icount -= 34; + // Pre-increment + if (++(*ptr_reg) == 0) { + m_flags ^= b_mask; + } } + tmp = RM(reg_addr); + if (BIT(opcode , 11)) { + // Byte + uint32_t tmp_addr = (uint32_t)(*ptr_reg); + if (m_flags & b_mask) { + tmp_addr |= BIT_MASK<uint32_t>(16); + } + tmp = BIT(tmp_addr , 0) ? (tmp & 0xff) : (tmp << 8); + if (tmp_addr <= (HP_REG_LAST_ADDR * 2 + 1)) { + // Single bytes can be written to registers. + // The addressed register gets the written byte in the proper position + // and a 0 in the other byte because access to registers is always done in + // 16 bits units. + WM(tmp_addr >> 1 , tmp); + } else { + // Extend address, form byte address + uint16_t mask = BIT(tmp_addr , 0) ? 0x00ff : 0xff00; + tmp_addr = add_mae(AEC_CASE_C , tmp_addr >> 1); + m_program->write_word(tmp_addr , tmp , mask); + m_icount -= m_w_cycles; + } + } else { + // Word + WM(AEC_CASE_C , *ptr_reg , tmp); + } + } + m_icount -= 6; + } else { + switch (opcode) { + case 0x7100: + // SDO + m_icount -= 6; + BIT_SET(m_flags , HPHYBRID_DMADIR_BIT); break; - case 0x73c0: - // CDC - m_icount -= 11; - BIT_CLR(m_flags , HPHYBRID_DC_BIT); + case 0x7108: + // SDI + m_icount -= 6; + BIT_CLR(m_flags , HPHYBRID_DMADIR_BIT); break; - case 0x7a00: - // FMP - m_icount -= 42; - m_reg_A = 0; - tmp_ar = get_ar1(); - tmp_ar2 = get_ar2(); - for (n = m_reg_B & 0xf; n > 0; n--) { - m_icount -= 13; - if (do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , tmp_ar)) - m_reg_A++; - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - } - set_ar2(tmp_ar2); + case 0x7140: + // DBL + m_icount -= 6; + BIT_CLR(m_flags , HPHYBRID_DB_BIT); break; - case 0x7a21: - // FDV - // No doc mentions any limit on the iterations done by this instruction. - // Here we stop at 15 (after all there are only 4 bits in the loop counter). But is it correct? - m_icount -= 37; - m_reg_B = 0; - tmp_ar = get_ar1(); - tmp_ar2 = get_ar2(); - while (m_reg_B < 15 && !do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , tmp_ar)) { - m_icount -= 13; - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - m_reg_B++; - } - set_ar2(tmp_ar2); + case 0x7148: + // CBL + m_icount -= 6; + BIT_CLR(m_flags , HPHYBRID_CB_BIT); break; - case 0x7b00: - // MRX - set_ar1(do_mrxy(get_ar1())); - m_icount -= 62; + case 0x7150: + // DBU + m_icount -= 6; + BIT_SET(m_flags , HPHYBRID_DB_BIT); break; - case 0x7b21: - // DRS - tmp_ar = get_ar1(); - m_icount -= 56; - m_reg_A = m_reg_se = do_dec_shift_r(0 , tmp_ar); - set_ar1(tmp_ar); - BIT_CLR(m_flags , HPHYBRID_DC_BIT); + case 0x7158: + // CBU + m_icount -= 6; + BIT_SET(m_flags , HPHYBRID_CB_BIT); break; - case 0x7b40: - // MRY - set_ar2(do_mrxy(get_ar2())); - m_icount -= 33; - break; + default: + // Unrecognized instruction + return false; + } + } + next_pc = m_reg_P + 1; + return true; +} - case 0x7b61: - // MLY - tmp_ar2 = get_ar2(); - m_icount -= 32; - m_reg_A = m_reg_se = do_dec_shift_l(m_reg_A & 0xf , tmp_ar2); - set_ar2(tmp_ar2); - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - break; +bool hp_5061_3011_cpu_device::read_non_common_reg(uint16_t addr , uint16_t& v) +{ + switch (addr) { + case HP_REG_DMAPA_ADDR: + v = m_dmapa & HP_REG_PA_MASK; + if (BIT(m_flags , HPHYBRID_CB_BIT)) { + BIT_SET(v , 15); + } + if (BIT(m_flags , HPHYBRID_DB_BIT)) { + BIT_SET(v , 14); + } + return true; - case 0x7b8f: - // MPY - do_mpy(); - break; + default: + return false; + } +} - case 0x7026: - // CIM - // Undocumented instruction, see beginning of this file - // Probably "Clear Interrupt Mode" - // No idea at all about exec. time: make it 9 cycles - m_icount -= 9; - BIT_CLR(m_flags, HPHYBRID_IM_BIT); - //logerror("hp-5061-3001: CIM, P = %06x flags = %05x\n" , m_genpc , m_flags); - break; +bool hp_5061_3011_cpu_device::write_non_common_reg(uint16_t addr , uint16_t v) +{ + return false; +} - case 0x7027: - // SIM - // Undocumented instruction, see beginning of this file - // Probably "Set Interrupt Mode" - // No idea at all about exec. time: make it 9 cycles - m_icount -= 9; - BIT_SET(m_flags, HPHYBRID_IM_BIT); - //logerror("hp-5061-3001: SIM, P = %06x flags = %05x\n" , m_genpc , m_flags); - break; +void hp_5061_3011_cpu_device::handle_dma() +{ + // Patent hints at the fact that terminal count is detected by bit 15 of dmac being 1 after decrementing + bool tc = BIT(--m_dmac , 15) != 0; + uint16_t tmp; - default: - if ((opcode & 0xfec0) == 0x74c0) { - // SDS - // SDC - m_icount -= 14; - return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_DC_BIT)); - } else { - // Unrecognized instructions: NOP - // Execution time is fictional - logerror("hp-5061-3001: unknown opcode %04x @ %06x\n" , opcode , m_genpc); - m_icount -= 6; - } - break; - } + // Timing here assumes that DMA transfers are isolated and not done in bursts + if (BIT(m_flags , HPHYBRID_DMADIR_BIT)) { + // "Outward" DMA: memory -> peripheral + tmp = RM(AEC_CASE_D , m_dmama++); + WIO(m_dmapa , tc ? 2 : 0 , tmp); + } else { + // "Inward" DMA: peripheral -> memory + tmp = RIO(m_dmapa , tc ? 2 : 0); + WM(AEC_CASE_D , m_dmama++ , tmp); + m_icount += 1; } - return m_reg_P + 1; + // Mystery solved: DMA is not automatically disabled at TC (test of 9845's graphic memory relies on this to work) } -std::unique_ptr<util::disasm_interface> hp_5061_3001_cpu_device::create_disassembler() +std::unique_ptr<util::disasm_interface> hp_5061_3011_cpu_device::create_disassembler() +{ + return std::make_unique<hp_5061_3011_disassembler>(m_relative_mode); +} + +// ******************************************************************************** +// hp_5061_3001_cpu_device +// ******************************************************************************** +hp_5061_3001_cpu_device::hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : hp_5061_3011_cpu_device(mconfig, HP_5061_3001, tag, owner, clock, 22) +{ +} + +void hp_5061_3001_cpu_device::device_start() { - return std::make_unique<hp_5061_3001_disassembler>(); + hp_hybrid_cpu_device::device_start(); + emc_start(); + + state_add(HPHYBRID_R32, "R32" , m_reg_aec[ 0 ]); + state_add(HPHYBRID_R33, "R33" , m_reg_aec[ 1 ]); + state_add(HPHYBRID_R34, "R34" , m_reg_aec[ 2 ]); + state_add(HPHYBRID_R35, "R35" , m_reg_aec[ 3 ]); + state_add(HPHYBRID_R36, "R36" , m_reg_aec[ 4 ]); + state_add(HPHYBRID_R37, "R37" , m_reg_aec[ 5 ]); + save_item(NAME(m_reg_aec[ 0 ])); + save_item(NAME(m_reg_aec[ 1 ])); + save_item(NAME(m_reg_aec[ 2 ])); + save_item(NAME(m_reg_aec[ 3 ])); + save_item(NAME(m_reg_aec[ 4 ])); + save_item(NAME(m_reg_aec[ 5 ])); +} + +void hp_5061_3001_cpu_device::device_reset() +{ + // Initial state of AEC registers: + // R32 0 + // R33 5 + // R34 0 + // R35 0 + // R36 0 + // R37 0 + m_reg_aec[ 0 ] = 0; + m_reg_aec[ 1 ] = 5; + m_reg_aec[ 2 ] = 0; + m_reg_aec[ 3 ] = 0; + m_reg_aec[ 4 ] = 0; + m_reg_aec[ 5 ] = 0; + + hp_hybrid_cpu_device::device_reset(); +} + +bool hp_5061_3001_cpu_device::execute_no_bpc(uint16_t opcode , uint16_t& next_pc) +{ + // Try to execute opcode as an IOC-16 instruction first then as an EMC one + if (hp_5061_3011_cpu_device::execute_no_bpc(opcode , next_pc) || + execute_emc(opcode , next_pc)) { + return true; + } + + // AEC instructions + switch (opcode) { + case 0x7026: + // CIM + // Undocumented instruction, see beginning of this file + // Probably "Clear Interrupt Mode" + // No idea at all about exec. time: make it 9 cycles (6 are in opcode fetch) + m_icount -= 3; + BIT_CLR(m_flags, HPHYBRID_IM_BIT); + break; + + case 0x7027: + // SIM + // Undocumented instruction, see beginning of this file + // Probably "Set Interrupt Mode" + // No idea at all about exec. time: make it 9 cycles (6 are in opcode fetch) + m_icount -= 3; + BIT_SET(m_flags, HPHYBRID_IM_BIT); + break; + + default: + return false; + } + + next_pc = m_reg_P + 1; + return true; } uint32_t hp_5061_3001_cpu_device::add_mae(aec_cases_t aec_case , uint16_t addr) @@ -1616,66 +1846,27 @@ uint32_t hp_5061_3001_cpu_device::add_mae(aec_cases_t aec_case , uint16_t addr) return (uint32_t)addr | ((uint32_t)aec_reg << 16); } -uint16_t hp_5061_3001_cpu_device::read_non_common_reg(uint16_t addr) +bool hp_5061_3001_cpu_device::read_non_common_reg(uint16_t addr , uint16_t& v) { switch (addr) { - case HP_REG_AR2_ADDR: - case HP_REG_AR2_ADDR + 1: - case HP_REG_AR2_ADDR + 2: - case HP_REG_AR2_ADDR + 3: - return m_reg_ar2[ addr - HP_REG_AR2_ADDR ]; - - case HP_REG_SE_ADDR: - return m_reg_se; - - case HP_REG_R25_ADDR: - return m_reg_r25; - - case HP_REG_R26_ADDR: - return m_reg_r26; - - case HP_REG_R27_ADDR: - return m_reg_r27; - case HP_REG_R32_ADDR: case HP_REG_R33_ADDR: case HP_REG_R34_ADDR: case HP_REG_R35_ADDR: case HP_REG_R36_ADDR: case HP_REG_R37_ADDR: - return m_reg_aec[ addr - HP_REG_R32_ADDR ]; + v = m_reg_aec[ addr - HP_REG_R32_ADDR ]; + return true; default: - return 0; + return hp_5061_3011_cpu_device::read_non_common_reg(addr , v) || + read_emc_reg(addr , v); } } -void hp_5061_3001_cpu_device::write_non_common_reg(uint16_t addr , uint16_t v) +bool hp_5061_3001_cpu_device::write_non_common_reg(uint16_t addr , uint16_t v) { switch (addr) { - case HP_REG_AR2_ADDR: - case HP_REG_AR2_ADDR + 1: - case HP_REG_AR2_ADDR + 2: - case HP_REG_AR2_ADDR + 3: - m_reg_ar2[ addr - HP_REG_AR2_ADDR ] = v; - break; - - case HP_REG_SE_ADDR: - m_reg_se = v & HP_REG_SE_MASK; - break; - - case HP_REG_R25_ADDR: - m_reg_r25 = v; - break; - - case HP_REG_R26_ADDR: - m_reg_r26 = v; - break; - - case HP_REG_R27_ADDR: - m_reg_r27 = v; - break; - case HP_REG_R32_ADDR: case HP_REG_R33_ADDR: case HP_REG_R34_ADDR: @@ -1683,46 +1874,183 @@ void hp_5061_3001_cpu_device::write_non_common_reg(uint16_t addr , uint16_t v) case HP_REG_R36_ADDR: case HP_REG_R37_ADDR: m_reg_aec[ addr - HP_REG_R32_ADDR ] = v; - break; + return true; default: - break; + return hp_5061_3011_cpu_device::write_non_common_reg(addr , v) || + write_emc_reg(addr , v); } } +std::unique_ptr<util::disasm_interface> hp_5061_3001_cpu_device::create_disassembler() +{ + return std::make_unique<hp_5061_3001_disassembler>(m_relative_mode); +} + void hp_5061_3001_cpu_device::enter_isr(void) { // Set interrupt mode when entering an ISR BIT_SET(m_flags, HPHYBRID_IM_BIT); } -hp_5061_3011_cpu_device::hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hp_hybrid_cpu_device(mconfig, HP_5061_3011, tag, owner, clock, 16) +// ******************************************************************************** +// hp_09825_67907_cpu_device +// ******************************************************************************** +hp_09825_67907_cpu_device::hp_09825_67907_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : hp_hybrid_cpu_device(mconfig , HP_09825_67907 , tag , owner , clock , 15) { } -uint16_t hp_5061_3011_cpu_device::execute_no_bpc_ioc(uint16_t opcode) +void hp_09825_67907_cpu_device::device_start() { - // Unrecognized instructions: NOP - // Execution time is fictional - m_icount -= 6; + hp_hybrid_cpu_device::device_start(); + emc_start(); +} - return m_reg_P + 1; +bool hp_09825_67907_cpu_device::execute_no_bpc(uint16_t opcode , uint16_t& next_pc) +{ + // 15-bit IOC instructions + if ((opcode & 0xf760) == 0x7160) { + // Place/withdraw + uint16_t tmp; + uint16_t reg_addr = opcode & 7; + uint16_t *ptr_reg; + + if (BIT(opcode , 3)) { + ptr_reg = &m_reg_D; + } else { + ptr_reg = &m_reg_C; + } + + if (BIT(opcode , 4)) { + // Withdraw + tmp = RM(AEC_CASE_C , *ptr_reg); + if (BIT(opcode , 11)) { + // Byte + if (BIT(*ptr_reg , 15)) { + tmp >>= 8; + } else { + tmp &= 0xff; + } + } + WM(reg_addr , tmp); + + // Post inc/dec + inc_dec_cd(*ptr_reg , !BIT(opcode , 7) , BIT(opcode , 11)); + } else { + // Place + + // Pre inc/dec + inc_dec_cd(*ptr_reg , !BIT(opcode , 7) , BIT(opcode , 11)); + + tmp = RM(reg_addr); + uint16_t tmp_addr = *ptr_reg & ADDR_MASK_15BIT; + if (BIT(opcode , 11)) { + // Byte + tmp = BIT(*ptr_reg , 15) ? (tmp << 8) : (tmp & 0xff); + if (tmp_addr <= HP_REG_LAST_ADDR) { + // Single bytes can be written to registers. + // The addressed register gets the written byte in the proper position + // and a 0 in the other byte because access to registers is always done in + // 16 bits units. + WM(tmp_addr , tmp); + } else { + uint16_t mask = BIT(*ptr_reg , 15) ? 0xff00 : 0x00ff; + m_program->write_word(tmp_addr , tmp , mask); + m_icount -= m_w_cycles; + } + } else { + // Word + WM(AEC_CASE_C , tmp_addr , tmp); + } + } + m_icount -= 6; + next_pc = m_reg_P + 1; + return true; + } else { + return execute_emc(opcode , next_pc); + } } -uint32_t hp_5061_3011_cpu_device::add_mae(aec_cases_t aec_case , uint16_t addr) +void hp_09825_67907_cpu_device::inc_dec_cd(uint16_t& cd_reg , bool increment , bool byte) { - // No MAE on 3011 - return addr; + bool propagate; + if (byte) { + // Byte + // Toggle bit 15 + cd_reg ^= REG_MSB_MASK; + // When incrementing, propagate to 15 LSBs when bit 15 goes 0->1 + propagate = (cd_reg & REG_MSB_MASK) != 0; + if (!increment) { + // When decrementing, propagate when bit 15 goes 1->0 + propagate = !propagate; + } + } else { + // Word + propagate = true; + } + if (propagate) { + if (increment) { + cd_reg = (cd_reg & ~ADDR_MASK_15BIT) | ((cd_reg + 1) & ADDR_MASK_15BIT); + } else { + cd_reg = (cd_reg & ~ADDR_MASK_15BIT) | ((cd_reg - 1) & ADDR_MASK_15BIT); + } + } +} + +bool hp_09825_67907_cpu_device::read_non_common_reg(uint16_t addr , uint16_t& v) +{ + switch (addr) { + case HP_REG_DMAPA_ADDR: + v = m_dmapa; + return true; + + default: + return read_emc_reg(addr , v); + } } -uint16_t hp_5061_3011_cpu_device::read_non_common_reg(uint16_t addr) +bool hp_09825_67907_cpu_device::write_non_common_reg(uint16_t addr , uint16_t v) { - // Non-existing registers are returned as 0 - return 0; + return write_emc_reg(addr , v); +} + +uint16_t hp_09825_67907_cpu_device::get_indirect_target(uint32_t addr) +{ + uint16_t tmp; + bool ind; + + // Multi-level indirect addressing + // TODO: It wouldn't hurt to have some limit on iterations + do { + tmp = RM(addr); + ind = BIT(tmp , 15); + addr = tmp & ADDR_MASK_15BIT; + } while (ind); + + return tmp; +} + +void hp_09825_67907_cpu_device::handle_dma() +{ + bool tc = BIT(--m_dmac , 15) != 0; + uint16_t tmp; + + // Timing here assumes that DMA transfers are isolated and not done in bursts + if (BIT(m_dmama , 15)) { + // "Outward" DMA: memory -> peripheral + tmp = RM(AEC_CASE_D , m_dmama); + WIO(m_dmapa , tc ? 2 : 0 , tmp); + } else { + // "Inward" DMA: peripheral -> memory + tmp = RIO(m_dmapa , tc ? 2 : 0); + WM(AEC_CASE_D , m_dmama , tmp); + m_icount += 1; + } + m_dmama = (m_dmama & ~ADDR_MASK_15BIT) | ((m_dmama + 1) & ADDR_MASK_15BIT); } -void hp_5061_3011_cpu_device::write_non_common_reg(uint16_t addr , uint16_t v) +std::unique_ptr<util::disasm_interface> hp_09825_67907_cpu_device::create_disassembler() { - // Non-existing registers are silently discarded + return std::make_unique<hp_09825_67907_disassembler>(m_relative_mode); } diff --git a/src/devices/cpu/hphybrid/hphybrid.h b/src/devices/cpu/hphybrid/hphybrid.h index 4b03035950a..5d29f77b515 100644 --- a/src/devices/cpu/hphybrid/hphybrid.h +++ b/src/devices/cpu/hphybrid/hphybrid.h @@ -8,15 +8,25 @@ // The HP hybrid processor series is composed of a few different models with different // capabilities. The series was derived from HP's own 2116 processor by translating a // discrete implementation of the 1960s into a multi-chip module (hence the "hybrid" name). -// This emulator currently supports both the 5061-3001 & the 5061-3011 versions. +// This emulator currently supports the 5061-3001, 5061-3011 and 09825-67907 versions. +// +// | *CPU* | *Addr bits* | *Multi-indirect* | *BPC* | *IOC* | *EMC* | *AEC* | *Used in* | +// |-------------+-------------+------------------+-------+-------+-------+-------+-----------| +// | 09825-67907 | 15 | Y | Y | Y | Y | N | HP 9825 | +// | 5061-3001 | 16 (+ext) | N | Y | Y | Y | Y | HP 9845 | +// | 5061-3011 | 16 | N | Y | Y | N | N | HP 64000 | // // For this emulator I mainly relied on these sources: +// - "The how they do dat manual": this manual has way more than you will ever want to know +// about the hybrid processors. It often gets to the single transistor detail level.. +// - "Reference manual for the CPD N-MOS II Processor": this is an internal HP manual that +// was targeted at the hw/sw user of the processors. // - http://www.hp9845.net/ website -// - HP manual "Assembly development ROM manual for the HP9845": this is the most precious -// and "enabling" resource of all +// - HP manual "Assembly development ROM manual for the HP9845" +// - US Patent 4,075,679 describing the HP9825 system // - US Patent 4,180,854 describing the HP9845 system // - Study of disassembly of firmware of HP64000 & HP9845 systems -// - hp9800e emulator for inspiration on implementing EMC instructions +// - hp9800e emulator (now go9800) for inspiration on implementing EMC instructions // - A lot of "educated" guessing #ifndef MAME_CPU_HPHYBRID_HPHYBRID_H @@ -37,15 +47,7 @@ #define HP_IOADDR_IC_SHIFT 0 // Compose an I/O address from PA & IC -#define HP_MAKE_IOADDR(pa , ic) (((pa) << HP_IOADDR_PA_SHIFT) | ((ic) << HP_IOADDR_IC_SHIFT)) - -// Set boot mode of 5061-3001: either normal (false) or as in HP9845 system (true) -#define MCFG_HPHYBRID_SET_9845_BOOT(_mode) \ - downcast<hp_5061_3001_cpu_device &>(*device).set_boot_mode(_mode); - -// PA changed callback -#define MCFG_HPHYBRID_PA_CHANGED(_devcb) \ - downcast<hp_hybrid_cpu_device &>(*device).set_pa_changed_func(DEVCB_##_devcb); +inline constexpr unsigned HP_MAKE_IOADDR(unsigned pa , unsigned ic) { return ((pa << HP_IOADDR_PA_SHIFT) | (ic << HP_IOADDR_IC_SHIFT)); } class hp_hybrid_cpu_device : public cpu_device { @@ -57,7 +59,10 @@ public: uint8_t pa_r() const; - template <class Object> devcb_base &set_pa_changed_func(Object &&cb) { return m_pa_changed_func.set_callback(std::forward<Object>(cb)); } + auto pa_changed_cb() { return m_pa_changed_func.bind(); } + + void set_relative_mode(bool rela) { m_relative_mode = rela; } + void set_rw_cycles(unsigned read_cycles , unsigned write_cycles) { m_r_cycles = read_cycles; m_w_cycles = write_cycles; } protected: hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t addrwidth); @@ -67,16 +72,22 @@ protected: virtual void device_reset() override; // device_execute_interface overrides - virtual uint32_t execute_min_cycles() const override { return 6; } + virtual uint32_t execute_min_cycles() const override { return m_r_cycles; } virtual uint32_t execute_input_lines() const override { return 2; } virtual uint32_t execute_default_irq_vector(int inputnum) const override { return 0xff; } virtual void execute_run() override; virtual void execute_set_input(int inputnum, int state) override; uint16_t execute_one(uint16_t opcode); - uint16_t execute_one_sub(uint16_t opcode); - // Execute an instruction that doesn't belong to either BPC or IOC - virtual uint16_t execute_no_bpc_ioc(uint16_t opcode) = 0; + bool execute_one_bpc(uint16_t opcode , uint16_t& next_pc); + // Execute an instruction that doesn't belong to BPC + virtual bool execute_no_bpc(uint16_t opcode , uint16_t& next_pc) = 0; + + // Add EMC state + void emc_start(); + + // Execute EMC instructions + bool execute_emc(uint16_t opcode , uint16_t& next_pc); // device_memory_interface overrides virtual space_config_vector memory_space_config() const override; @@ -84,9 +95,6 @@ protected: // device_state_interface overrides virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; - // device_disasm_interface overrides - virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; - // Different cases of memory access // See patent @ pg 361 typedef enum { @@ -97,25 +105,42 @@ protected: } aec_cases_t; // do memory address extension - virtual uint32_t add_mae(aec_cases_t aec_case , uint16_t addr) = 0; + virtual uint32_t add_mae(aec_cases_t aec_case , uint16_t addr); - uint16_t remove_mae(uint32_t addr); + static uint16_t remove_mae(uint32_t addr); uint16_t RM(aec_cases_t aec_case , uint16_t addr); uint16_t RM(uint32_t addr); - virtual uint16_t read_non_common_reg(uint16_t addr) = 0; + virtual bool read_non_common_reg(uint16_t addr , uint16_t& v) = 0; + bool read_emc_reg(uint16_t addr , uint16_t& v); void WM(aec_cases_t aec_case , uint16_t addr , uint16_t v); void WM(uint32_t addr , uint16_t v); - virtual void write_non_common_reg(uint16_t addr , uint16_t v) = 0; + virtual bool write_non_common_reg(uint16_t addr , uint16_t v) = 0; + bool write_emc_reg(uint16_t addr , uint16_t v); + + uint16_t RIO(uint8_t pa , uint8_t ic); + void WIO(uint8_t pa , uint8_t ic , uint16_t v); uint16_t fetch(); + virtual uint16_t get_indirect_target(uint32_t addr); + virtual void enter_isr(); + virtual void handle_dma() = 0; uint16_t get_skip_addr(uint16_t opcode , bool condition) const; + void update_pa(); + devcb_write8 m_pa_changed_func; + uint8_t m_last_pa; int m_icount; + uint32_t m_addr_mask; + uint16_t m_addr_mask_low16; + bool m_relative_mode; + unsigned m_r_cycles; + unsigned m_w_cycles; + bool m_boot_mode; bool m_forced_bsc_25; // State of processor @@ -134,85 +159,112 @@ protected: uint16_t m_dmac; // DMA counter uint16_t m_reg_I; // Instruction register uint32_t m_genpc; // Full PC + // EMC registers + uint16_t m_reg_ar2[ 4 ]; // AR2 register + uint16_t m_reg_se; // SE register (4 bits) + uint16_t m_reg_r25; // R25 register + uint16_t m_reg_r26; // R26 register + uint16_t m_reg_r27; // R27 register + + address_space *m_program; private: address_space_config m_program_config; address_space_config m_io_config; - address_space *m_program; memory_access_cache<1, -1, ENDIANNESS_BIG> *m_cache; address_space *m_io; uint32_t get_ea(uint16_t opcode); void do_add(uint16_t& addend1 , uint16_t addend2); - uint16_t get_skip_addr_sc(uint16_t opcode , uint16_t& v , unsigned n); - uint16_t get_skip_addr_sc(uint16_t opcode , uint32_t& v , unsigned n); - void do_pw(uint16_t opcode); + template<typename T> uint16_t get_skip_addr_sc(uint16_t opcode , T& v , unsigned n); void check_for_interrupts(); - virtual void enter_isr(); - void handle_dma(); - uint16_t RIO(uint8_t pa , uint8_t ic); - void WIO(uint8_t pa , uint8_t ic , uint16_t v); + static uint8_t do_dec_shift_r(uint8_t d1 , uint64_t& mantissa); + static uint8_t do_dec_shift_l(uint8_t d12 , uint64_t& mantissa); + uint64_t get_ar1(); + void set_ar1(uint64_t v); + uint64_t get_ar2() const; + void set_ar2(uint64_t v); + uint64_t do_mrxy(uint64_t ar); + bool do_dec_add(bool carry_in , uint64_t& a , uint64_t b); + void do_mpy(); +}; + +class hp_5061_3011_cpu_device : public hp_hybrid_cpu_device +{ +public: + hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + hp_5061_3011_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t addrwidth); + // TODO: fix + virtual uint32_t execute_max_cycles() const override { return 25; } + virtual bool execute_no_bpc(uint16_t opcode , uint16_t& next_pc) override; + virtual bool read_non_common_reg(uint16_t addr , uint16_t& v) override; + virtual bool write_non_common_reg(uint16_t addr , uint16_t v) override; + virtual void handle_dma() override; + + // device_disasm_interface overrides + virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; }; -class hp_5061_3001_cpu_device : public hp_hybrid_cpu_device +class hp_5061_3001_cpu_device : public hp_5061_3011_cpu_device { public: hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - void set_boot_mode(bool mode) { m_boot_mode = mode; } + // Set boot mode of 5061-3001: either normal (false) or as in HP9845 system (true) + void set_9845_boot_mode(bool mode) { m_boot_mode = mode; } protected: virtual void device_start() override; virtual void device_reset() override; + // TODO: fix virtual uint32_t execute_max_cycles() const override { return 237; } // FMP 15 - static uint8_t do_dec_shift_r(uint8_t d1 , uint64_t& mantissa); - static uint8_t do_dec_shift_l(uint8_t d12 , uint64_t& mantissa); - uint64_t get_ar1(); - void set_ar1(uint64_t v); - uint64_t get_ar2() const; - void set_ar2(uint64_t v); - uint64_t do_mrxy(uint64_t ar); - bool do_dec_add(bool carry_in , uint64_t& a , uint64_t b); - void do_mpy(); - - virtual uint16_t execute_no_bpc_ioc(uint16_t opcode) override; - virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; + virtual bool execute_no_bpc(uint16_t opcode , uint16_t& next_pc) override; virtual uint32_t add_mae(aec_cases_t aec_case, uint16_t addr) override; - virtual uint16_t read_non_common_reg(uint16_t addr) override; - virtual void write_non_common_reg(uint16_t addr , uint16_t v) override; + virtual bool read_non_common_reg(uint16_t addr , uint16_t& v) override; + virtual bool write_non_common_reg(uint16_t addr , uint16_t v) override; + virtual void enter_isr() override; + // device_disasm_interface overrides + virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; private: - bool m_boot_mode; - // Additional state of processor - uint16_t m_reg_ar2[ 4 ]; // AR2 register - uint16_t m_reg_se; // SE register (4 bits) - uint16_t m_reg_r25; // R25 register - uint16_t m_reg_r26; // R26 register - uint16_t m_reg_r27; // R27 register uint16_t m_reg_aec[ 37 - 32 + 1 ]; // AEC registers R32-R37 - - virtual void enter_isr() override; }; -class hp_5061_3011_cpu_device : public hp_hybrid_cpu_device +class hp_09825_67907_cpu_device : public hp_hybrid_cpu_device { public: - hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + hp_09825_67907_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); protected: - virtual uint32_t execute_max_cycles() const override { return 25; } - virtual uint16_t execute_no_bpc_ioc(uint16_t opcode) override; - virtual uint32_t add_mae(aec_cases_t aec_case , uint16_t addr) override; - virtual uint16_t read_non_common_reg(uint16_t addr) override; - virtual void write_non_common_reg(uint16_t addr , uint16_t v) override; + // device-level overrides + virtual void device_start() override; + // device_execute_interface overrides + // TODO: fix + virtual uint32_t execute_max_cycles() const override { return 237; } // FMP 15 + + virtual bool execute_no_bpc(uint16_t opcode , uint16_t& next_pc) override; + + // device_disasm_interface overrides + virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; + + virtual bool read_non_common_reg(uint16_t addr , uint16_t& v) override; + virtual bool write_non_common_reg(uint16_t addr , uint16_t v) override; + virtual uint16_t get_indirect_target(uint32_t addr) override; + virtual void handle_dma() override; + +private: + void inc_dec_cd(uint16_t& cd_reg , bool increment , bool byte); }; DECLARE_DEVICE_TYPE(HP_5061_3001, hp_5061_3001_cpu_device) DECLARE_DEVICE_TYPE(HP_5061_3011, hp_5061_3011_cpu_device) +DECLARE_DEVICE_TYPE(HP_09825_67907 , hp_09825_67907_cpu_device) #endif // MAME_CPU_HPHYBRID_HPHYBRID_H diff --git a/src/devices/cpu/hphybrid/hphybrid_dasm.cpp b/src/devices/cpu/hphybrid/hphybrid_dasm.cpp index 74d833803c0..fc7b63559e0 100644 --- a/src/devices/cpu/hphybrid/hphybrid_dasm.cpp +++ b/src/devices/cpu/hphybrid/hphybrid_dasm.cpp @@ -8,86 +8,15 @@ #include "hphybrid_dasm.h" #include "hphybrid_defs.h" -void hp_hybrid_disassembler::addr_2_str(std::ostream &stream, uint16_t addr , bool indirect , bool is_3001) +void hp_hybrid_disassembler::addr_2_str(std::ostream &stream, uint16_t addr , bool indirect) { - util::stream_format(stream, "$%04x" , addr); - - if (is_3001) { - switch (addr) { - case HP_REG_AR1_ADDR: - stream << "(Ar1)"; - break; - - case HP_REG_AR1_ADDR + 1: - stream << "(Ar1_2)"; - break; - - case HP_REG_AR1_ADDR + 2: - stream << "(Ar1_3)"; - break; - - case HP_REG_AR1_ADDR + 3: - stream << "(Ar1_4)"; - break; - - case HP_REG_AR2_ADDR: - stream << "(Ar2)"; - break; - - case HP_REG_AR2_ADDR + 1: - stream << "(Ar2_2)"; - break; - - case HP_REG_AR2_ADDR + 2: - stream << "(Ar2_3)"; - break; - - case HP_REG_AR2_ADDR + 3: - stream << "(Ar2_4)"; - break; - - case HP_REG_SE_ADDR: - stream << "(SE)"; - break; - - case HP_REG_R25_ADDR: - stream << "(R25)"; - break; - - case HP_REG_R26_ADDR: - stream << "(R26)"; - break; - - case HP_REG_R27_ADDR: - stream << "(R27)"; - break; - - case HP_REG_R32_ADDR: - stream << "(R32)"; - break; - - case HP_REG_R33_ADDR: - stream << "(R33)"; - break; - - case HP_REG_R34_ADDR: - stream << "(R34)"; - break; - - case HP_REG_R35_ADDR: - stream << "(R35)"; - break; - - case HP_REG_R36_ADDR: - stream << "(R36)"; - break; - - case HP_REG_R37_ADDR: - stream << "(R37)"; - break; - } + if (m_flags & HP_HYBRID_DASM_HAS_15BITS) { + addr &= 0x7fff; } + util::stream_format(stream, "$%04x" , addr); + + // Common registers switch (addr) { case HP_REG_A_ADDR: stream << "(A)"; @@ -148,6 +77,116 @@ void hp_hybrid_disassembler::addr_2_str(std::ostream &stream, uint16_t addr , bo case HP_REG_D_ADDR: stream << "(D)"; break; + + default: + // EMC registers + if (m_flags & HP_HYBRID_DASM_HAS_EMC) { + if (m_flags & HP_HYBRID_DASM_HAS_15BITS) { + switch (addr) { + case HP_REG_AR1_ADDR & 0x7fff: + stream << "(Ar1)"; + break; + + case (HP_REG_AR1_ADDR & 0x7fff) + 1: + stream << "(Ar1_2)"; + break; + + case (HP_REG_AR1_ADDR & 0x7fff) + 2: + stream << "(Ar1_3)"; + break; + + case (HP_REG_AR1_ADDR & 0x7fff) + 3: + stream << "(Ar1_4)"; + break; + } + } else { + switch (addr) { + case HP_REG_AR1_ADDR: + stream << "(Ar1)"; + break; + + case HP_REG_AR1_ADDR + 1: + stream << "(Ar1_2)"; + break; + + case HP_REG_AR1_ADDR + 2: + stream << "(Ar1_3)"; + break; + + case HP_REG_AR1_ADDR + 3: + stream << "(Ar1_4)"; + break; + } + } + switch (addr) { + case HP_REG_AR2_ADDR: + stream << "(Ar2)"; + break; + + case HP_REG_AR2_ADDR + 1: + stream << "(Ar2_2)"; + break; + + case HP_REG_AR2_ADDR + 2: + stream << "(Ar2_3)"; + break; + + case HP_REG_AR2_ADDR + 3: + stream << "(Ar2_4)"; + break; + + case HP_REG_SE_ADDR: + stream << "(SE)"; + break; + + case HP_REG_R25_ADDR: + stream << "(R25)"; + break; + + case HP_REG_R26_ADDR: + stream << "(R26)"; + break; + + case HP_REG_R27_ADDR: + stream << "(R27)"; + break; + + default: + break; + } + } + // AEC registers + if (m_flags & HP_HYBRID_DASM_HAS_AEC) { + switch (addr) { + case HP_REG_R32_ADDR: + stream << "(R32)"; + break; + + case HP_REG_R33_ADDR: + stream << "(R33)"; + break; + + case HP_REG_R34_ADDR: + stream << "(R34)"; + break; + + case HP_REG_R35_ADDR: + stream << "(R35)"; + break; + + case HP_REG_R36_ADDR: + stream << "(R36)"; + break; + + case HP_REG_R37_ADDR: + stream << "(R37)"; + break; + + default: + break; + } + } + break; } if (indirect) { @@ -155,18 +194,23 @@ void hp_hybrid_disassembler::addr_2_str(std::ostream &stream, uint16_t addr , bo } } -void hp_hybrid_disassembler::param_none(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001) +void hp_hybrid_disassembler::param_none(std::ostream &stream, offs_t pc , uint16_t opcode) { } -void hp_hybrid_disassembler::param_loc(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001) +void hp_hybrid_disassembler::param_loc(std::ostream &stream, offs_t pc , uint16_t opcode) { uint16_t base; uint16_t off; if (opcode & 0x0400) { - // Current page - base = pc; + if (m_flags & HP_HYBRID_DASM_ABS_MODE) { + // Current page, absolute mode + base = (pc & 0xfc00) | 0x200; + } else { + // Current page, relative mode + base = pc; + } } else { // Base page base = 0; @@ -177,26 +221,26 @@ void hp_hybrid_disassembler::param_loc(std::ostream &stream, offs_t pc , uint16_ off -= 0x400; } - addr_2_str(stream, base + off , (opcode & 0x8000) != 0 , is_3001); + addr_2_str(stream, base + off , (opcode & 0x8000) != 0); } -void hp_hybrid_disassembler::param_addr32(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001) +void hp_hybrid_disassembler::param_addr32(std::ostream &stream, offs_t pc , uint16_t opcode) { - addr_2_str(stream, opcode & 0x1f , (opcode & 0x8000) != 0 , is_3001); + addr_2_str(stream, opcode & 0x1f , (opcode & 0x8000) != 0); } -void hp_hybrid_disassembler::param_skip(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001) +void hp_hybrid_disassembler::param_skip(std::ostream &stream, offs_t pc , uint16_t opcode) { uint16_t off = opcode & 0x3f; if (off & 0x20) { off -= 0x40; } - addr_2_str(stream , pc + off , false , is_3001); + addr_2_str(stream , pc + off , false); } -void hp_hybrid_disassembler::param_skip_sc(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001) +void hp_hybrid_disassembler::param_skip_sc(std::ostream &stream, offs_t pc , uint16_t opcode) { - param_skip(stream, pc, opcode , is_3001); + param_skip(stream, pc, opcode); if (opcode & 0x80) { if (opcode & 0x40) { @@ -207,7 +251,7 @@ void hp_hybrid_disassembler::param_skip_sc(std::ostream &stream, offs_t pc , uin } } -void hp_hybrid_disassembler::param_ret(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001) +void hp_hybrid_disassembler::param_ret(std::ostream &stream, offs_t pc , uint16_t opcode) { int off = opcode & 0x3f; @@ -221,14 +265,14 @@ void hp_hybrid_disassembler::param_ret(std::ostream &stream, offs_t pc , uint16_ } } -void hp_hybrid_disassembler::param_n16(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001) +void hp_hybrid_disassembler::param_n16(std::ostream &stream, offs_t pc , uint16_t opcode) { util::stream_format(stream , "%u" , (opcode & 0xf) + 1); } -void hp_hybrid_disassembler::param_reg_id(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001) +void hp_hybrid_disassembler::param_reg_id(std::ostream &stream, offs_t pc , uint16_t opcode) { - addr_2_str(stream, opcode & 7, false , is_3001); + addr_2_str(stream, opcode & 7, false); if (opcode & 0x80) { stream << ",D"; @@ -237,123 +281,131 @@ void hp_hybrid_disassembler::param_reg_id(std::ostream &stream, offs_t pc , uint } } -const hp_hybrid_disassembler::dis_entry_t hp_hybrid_disassembler::dis_table[] = { - // *** BPC Instructions *** - {0xffff , 0x0000 , "NOP" , &hp_hybrid_disassembler::param_none , 0 }, - {0x7800 , 0x0000 , "LDA" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x0800 , "LDB" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x1000 , "CPA" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x1800 , "CPB" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x2000 , "ADA" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x2800 , "ADB" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x3000 , "STA" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x3800 , "STB" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x4000 , "JSM" , &hp_hybrid_disassembler::param_loc , STEP_OVER }, - {0x7800 , 0x4800 , "ISZ" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x5000 , "AND" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x5800 , "DSZ" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x6000 , "IOR" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x6800 , "JMP" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7fe0 , 0x7000 , "EXE" , &hp_hybrid_disassembler::param_addr32 , 0 }, - {0xffc0 , 0x7400 , "RZA" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7C00 , "RZB" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7440 , "RIA" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7C40 , "RIB" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7500 , "SZA" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7D00 , "SZB" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7540 , "SIA" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7D40 , "SIB" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7480 , "SFS" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7580 , "SFC" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7c80 , "SSS" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7d80 , "SSC" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7cc0 , "SHS" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7dc0 , "SHC" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xff00 , 0x7600 , "SLA" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0x7e00 , "SLB" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0x7700 , "RLA" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0x7f00 , "RLB" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0xf400 , "SAP" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0xfc00 , "SBP" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0xf500 , "SAM" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0xfd00 , "SBM" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0xf600 , "SOC" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0xf700 , "SOS" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0xfe00 , "SEC" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0xff00 , "SES" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xffff , 0xf020 , "TCA" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0xf820 , "TCB" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0xf060 , "CMA" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0xf860 , "CMB" , &hp_hybrid_disassembler::param_none , 0 }, - {0xff80 , 0xf080 , "RET" , &hp_hybrid_disassembler::param_ret , STEP_OUT }, - {0xfff0 , 0xf100 , "AAR" , &hp_hybrid_disassembler::param_n16 , 0 }, - {0xfff0 , 0xf900 , "ABR" , &hp_hybrid_disassembler::param_n16 , 0 }, - {0xffff , 0xf14f , "CLA" , &hp_hybrid_disassembler::param_none , 0 }, - {0xfff0 , 0xf140 , "SAR" , &hp_hybrid_disassembler::param_n16 , 0 }, - {0xffff , 0xf94f , "CLB" , &hp_hybrid_disassembler::param_none , 0 }, - {0xfff0 , 0xf940 , "SBR" , &hp_hybrid_disassembler::param_n16 , 0 }, - {0xfff0 , 0xf180 , "SAL" , &hp_hybrid_disassembler::param_n16 , 0 }, - {0xfff0 , 0xf980 , "SBL" , &hp_hybrid_disassembler::param_n16 , 0 }, - {0xfff0 , 0xf1c0 , "RAR" , &hp_hybrid_disassembler::param_n16 , 0 }, - {0xfff0 , 0xf9c0 , "RBR" , &hp_hybrid_disassembler::param_n16 , 0 }, - // *** IOC Instructions *** - {0xffff , 0x7100 , "SDO" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7108 , "SDI" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7110 , "EIR" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7118 , "DIR" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7120 , "DMA" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7128 , "PCM" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7138 , "DDR" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7140 , "DBL" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7148 , "CBL" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7150 , "DBU" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7158 , "CBU" , &hp_hybrid_disassembler::param_none , 0 }, - {0xff78 , 0x7160 , "PWC" , &hp_hybrid_disassembler::param_reg_id , 0 }, - {0xff78 , 0x7168 , "PWD" , &hp_hybrid_disassembler::param_reg_id , 0 }, - {0xff78 , 0x7960 , "PBC" , &hp_hybrid_disassembler::param_reg_id , 0 }, - {0xff78 , 0x7968 , "PBD" , &hp_hybrid_disassembler::param_reg_id , 0 }, - {0xff78 , 0x7170 , "WWC" , &hp_hybrid_disassembler::param_reg_id , 0 }, - {0xff78 , 0x7178 , "WWD" , &hp_hybrid_disassembler::param_reg_id , 0 }, - {0xff78 , 0x7970 , "WBC" , &hp_hybrid_disassembler::param_reg_id , 0 }, - {0xff78 , 0x7978 , "WBD" , &hp_hybrid_disassembler::param_reg_id , 0 }, - // *** END *** - {0 , 0 , nullptr , nullptr , 0 } +const hp_hybrid_disassembler::dis_entry_t hp_hybrid_disassembler::dis_table_common[] = { + // *** BPC Instructions *** + {0xffff , 0x0000 , "NOP" , &hp_hybrid_disassembler::param_none , 0 }, + {0x7800 , 0x0000 , "LDA" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x0800 , "LDB" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x1000 , "CPA" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x1800 , "CPB" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x2000 , "ADA" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x2800 , "ADB" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x3000 , "STA" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x3800 , "STB" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x4000 , "JSM" , &hp_hybrid_disassembler::param_loc , STEP_OVER }, + {0x7800 , 0x4800 , "ISZ" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x5000 , "AND" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x5800 , "DSZ" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x6000 , "IOR" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x6800 , "JMP" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7fe0 , 0x7000 , "EXE" , &hp_hybrid_disassembler::param_addr32 , 0 }, + {0xffc0 , 0x7400 , "RZA" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7C00 , "RZB" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7440 , "RIA" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7C40 , "RIB" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x74c0 , "SDS" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7500 , "SZA" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7D00 , "SZB" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7540 , "SIA" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7D40 , "SIB" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7480 , "SFS" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7580 , "SFC" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x75c0 , "SDC" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7c80 , "SSS" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7d80 , "SSC" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7cc0 , "SHS" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7dc0 , "SHC" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xff00 , 0x7600 , "SLA" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0x7e00 , "SLB" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0x7700 , "RLA" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0x7f00 , "RLB" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0xf400 , "SAP" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0xfc00 , "SBP" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0xf500 , "SAM" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0xfd00 , "SBM" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0xf600 , "SOC" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0xf700 , "SOS" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0xfe00 , "SEC" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0xff00 , "SES" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xffff , 0xf020 , "TCA" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0xf820 , "TCB" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0xf060 , "CMA" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0xf860 , "CMB" , &hp_hybrid_disassembler::param_none , 0 }, + {0xff80 , 0xf080 , "RET" , &hp_hybrid_disassembler::param_ret , STEP_OUT }, + {0xfff0 , 0xf100 , "AAR" , &hp_hybrid_disassembler::param_n16 , 0 }, + {0xfff0 , 0xf900 , "ABR" , &hp_hybrid_disassembler::param_n16 , 0 }, + {0xffff , 0xf14f , "CLA" , &hp_hybrid_disassembler::param_none , 0 }, + {0xfff0 , 0xf140 , "SAR" , &hp_hybrid_disassembler::param_n16 , 0 }, + {0xffff , 0xf94f , "CLB" , &hp_hybrid_disassembler::param_none , 0 }, + {0xfff0 , 0xf940 , "SBR" , &hp_hybrid_disassembler::param_n16 , 0 }, + {0xfff0 , 0xf180 , "SAL" , &hp_hybrid_disassembler::param_n16 , 0 }, + {0xfff0 , 0xf980 , "SBL" , &hp_hybrid_disassembler::param_n16 , 0 }, + {0xfff0 , 0xf1c0 , "RAR" , &hp_hybrid_disassembler::param_n16 , 0 }, + {0xfff0 , 0xf9c0 , "RBR" , &hp_hybrid_disassembler::param_n16 , 0 }, + // *** IOC Instructions *** + {0xffff , 0x7110 , "EIR" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7118 , "DIR" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7120 , "DMA" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7128 , "PCM" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7138 , "DDR" , &hp_hybrid_disassembler::param_none , 0 }, + {0xff78 , 0x7160 , "PWC" , &hp_hybrid_disassembler::param_reg_id , 0 }, + {0xff78 , 0x7168 , "PWD" , &hp_hybrid_disassembler::param_reg_id , 0 }, + {0xff78 , 0x7960 , "PBC" , &hp_hybrid_disassembler::param_reg_id , 0 }, + {0xff78 , 0x7968 , "PBD" , &hp_hybrid_disassembler::param_reg_id , 0 }, + {0xff78 , 0x7170 , "WWC" , &hp_hybrid_disassembler::param_reg_id , 0 }, + {0xff78 , 0x7178 , "WWD" , &hp_hybrid_disassembler::param_reg_id , 0 }, + {0xff78 , 0x7970 , "WBC" , &hp_hybrid_disassembler::param_reg_id , 0 }, + {0xff78 , 0x7978 , "WBD" , &hp_hybrid_disassembler::param_reg_id , 0 }, + // *** END *** + {0 , 0 , nullptr , nullptr , 0 } }; - -const hp_hybrid_disassembler::dis_entry_t hp_5061_3001_disassembler::dis_table_emc[] = { - // *** EMC Instructions *** - {0xffff , 0x7200 , "MWA" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7220 , "CMY" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7260 , "CMX" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7280 , "FXA" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xfff0 , 0x7300 , "XFR" , &hp_5061_3001_disassembler::param_n16 , 0 }, - {0xffff , 0x7340 , "NRM" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xfff0 , 0x7380 , "CLR" , &hp_5061_3001_disassembler::param_n16 , 0 }, - {0xffff , 0x73c0 , "CDC" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffc0 , 0x74c0 , "SDS" , &hp_5061_3001_disassembler::param_skip , 0 }, - {0xffc0 , 0x75c0 , "SDC" , &hp_5061_3001_disassembler::param_skip , 0 }, - {0xffff , 0x7a00 , "FMP" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7a21 , "FDV" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7b00 , "MRX" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7b21 , "DRS" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7b40 , "MRY" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7b61 , "MLY" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7b8f , "MPY" , &hp_5061_3001_disassembler::param_none , 0 }, - // *** Undocumented instructions of 5061-3001 *** - {0xffff , 0x7026 , "CIM" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7027 , "SIM" , &hp_5061_3001_disassembler::param_none , 0 }, - // *** END *** - {0 , 0 , nullptr , nullptr , 0 } +const hp_hybrid_disassembler::dis_entry_t hp_hybrid_disassembler::dis_table_ioc16[] = { + // *** IOC-16 instructions *** + {0xffff , 0x7100 , "SDO" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7108 , "SDI" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7140 , "DBL" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7148 , "CBL" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7150 , "DBU" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7158 , "CBU" , &hp_hybrid_disassembler::param_none , 0 }, + // *** END *** + {0 , 0 , nullptr , nullptr , 0 } +}; +const hp_hybrid_disassembler::dis_entry_t hp_hybrid_disassembler::dis_table_emc[] = { + // *** EMC Instructions *** + {0xffff , 0x7200 , "MWA" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7220 , "CMY" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7260 , "CMX" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7280 , "FXA" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xfff0 , 0x7300 , "XFR" , &hp_5061_3001_disassembler::param_n16 , 0 }, + {0xffff , 0x7340 , "NRM" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xfff0 , 0x7380 , "CLR" , &hp_5061_3001_disassembler::param_n16 , 0 }, + {0xffff , 0x73c0 , "CDC" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7a00 , "FMP" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7a21 , "FDV" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7b00 , "MRX" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7b21 , "DRS" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7b40 , "MRY" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7b61 , "MLY" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7b8f , "MPY" , &hp_5061_3001_disassembler::param_none , 0 }, + // *** END *** + {0 , 0 , nullptr , nullptr , 0 } +}; +const hp_hybrid_disassembler::dis_entry_t hp_hybrid_disassembler::dis_table_aec[] = { + // *** Undocumented AEC instructions of 5061-3001 *** + {0xffff , 0x7026 , "CIM" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7027 , "SIM" , &hp_5061_3001_disassembler::param_none , 0 }, + // *** END *** + {0 , 0 , nullptr , nullptr , 0 } }; -offs_t hp_hybrid_disassembler::disassemble_table(uint16_t opcode , offs_t pc , const dis_entry_t *table , bool is_3001 , std::ostream &stream) +offs_t hp_hybrid_disassembler::disassemble_table(uint16_t opcode , offs_t pc , const dis_entry_t *table , std::ostream &stream) { const dis_entry_t *p; for (p = table; p->m_op_mask; p++) { if ((opcode & p->m_op_mask) == p->m_opcode) { stream << p->m_mnemonic << " "; - (this->*(p->m_param_fn))(stream , pc , opcode , is_3001); + (this->*(p->m_param_fn))(stream , pc , opcode); return 1 | p->m_dasm_flags | SUPPORTED; } } @@ -366,10 +418,19 @@ offs_t hp_hybrid_disassembler::disassemble(std::ostream &stream, offs_t pc, cons uint16_t opcode = opcodes.r16(pc); offs_t res; - res = disassemble_table(opcode, pc, dis_table, false, stream); + res = disassemble_table(opcode, pc, dis_table_common, stream); - if (res == 0) - { + if (res == 0 && (m_flags & HP_HYBRID_DASM_HAS_15BITS) == 0) { + res = disassemble_table(opcode, pc, dis_table_ioc16, stream); + } + if (res == 0 && (m_flags & HP_HYBRID_DASM_HAS_EMC) != 0) { + res = disassemble_table(opcode, pc, dis_table_emc, stream); + } + if (res == 0 && (m_flags & HP_HYBRID_DASM_HAS_AEC) != 0) { + res = disassemble_table(opcode, pc, dis_table_aec, stream); + } + + if (res == 0) { // Unknown opcode stream << "???"; res = 1 | SUPPORTED; @@ -378,26 +439,28 @@ offs_t hp_hybrid_disassembler::disassemble(std::ostream &stream, offs_t pc, cons return res; } -offs_t hp_5061_3001_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) +hp_hybrid_disassembler::hp_hybrid_disassembler(unsigned flags) + : m_flags(flags) { - uint16_t opcode = opcodes.r16(pc); - offs_t res; - - res = disassemble_table(opcode, pc, dis_table_emc, true, stream); +} - if (res == 0) - { - res = disassemble_table(opcode, pc, dis_table, true, stream); - } +hp_5061_3011_disassembler::hp_5061_3011_disassembler(bool relative_mode) + : hp_hybrid_disassembler(relative_mode ? 0 : HP_HYBRID_DASM_ABS_MODE) +{ +} - if (res == 0) - { - // Unknown opcode - stream << "???"; - res = 1 | SUPPORTED; - } +hp_5061_3001_disassembler::hp_5061_3001_disassembler(bool relative_mode) + : hp_hybrid_disassembler(HP_HYBRID_DASM_HAS_EMC | + HP_HYBRID_DASM_HAS_AEC | + (relative_mode ? 0 : HP_HYBRID_DASM_ABS_MODE)) +{ +} - return res; +hp_09825_67907_disassembler::hp_09825_67907_disassembler(bool relative_mode) + : hp_hybrid_disassembler(HP_HYBRID_DASM_HAS_15BITS | + HP_HYBRID_DASM_HAS_EMC | + (relative_mode ? 0 : HP_HYBRID_DASM_ABS_MODE)) +{ } u32 hp_hybrid_disassembler::opcode_alignment() const diff --git a/src/devices/cpu/hphybrid/hphybrid_dasm.h b/src/devices/cpu/hphybrid/hphybrid_dasm.h index 96994ae0632..4059a4aa90a 100644 --- a/src/devices/cpu/hphybrid/hphybrid_dasm.h +++ b/src/devices/cpu/hphybrid/hphybrid_dasm.h @@ -9,17 +9,24 @@ #pragma once +enum : unsigned { + HP_HYBRID_DASM_HAS_15BITS = 1, + HP_HYBRID_DASM_HAS_EMC = 2, + HP_HYBRID_DASM_HAS_AEC = 4, + HP_HYBRID_DASM_ABS_MODE = 8 +}; + class hp_hybrid_disassembler : public util::disasm_interface { public: - hp_hybrid_disassembler() = default; + hp_hybrid_disassembler(unsigned flags); virtual ~hp_hybrid_disassembler() = default; virtual u32 opcode_alignment() const override; virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; protected: - typedef void (hp_hybrid_disassembler::*fn_dis_param)(std::ostream &stream , offs_t pc , uint16_t opcode , bool is_3001); + typedef void (hp_hybrid_disassembler::*fn_dis_param)(std::ostream &stream , offs_t pc , uint16_t opcode); typedef struct { uint16_t m_op_mask; @@ -29,31 +36,44 @@ protected: uint32_t m_dasm_flags; } dis_entry_t; - static const dis_entry_t dis_table[]; + unsigned m_flags; + static const dis_entry_t dis_table_common[]; + static const dis_entry_t dis_table_ioc16[]; + static const dis_entry_t dis_table_emc[]; + static const dis_entry_t dis_table_aec[]; - void addr_2_str(std::ostream &stream, uint16_t addr , bool indirect , bool is_3001); - void param_none(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001); - void param_loc(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001); - void param_addr32(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001); - void param_skip(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001); - void param_skip_sc(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001); - void param_ret(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001); - void param_n16(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001); - void param_reg_id(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001); + void addr_2_str(std::ostream &stream, uint16_t addr , bool indirect); + void param_none(std::ostream &stream, offs_t pc , uint16_t opcode); + void param_loc(std::ostream &stream, offs_t pc , uint16_t opcode); + void param_addr32(std::ostream &stream, offs_t pc , uint16_t opcode); + void param_skip(std::ostream &stream, offs_t pc , uint16_t opcode); + void param_skip_sc(std::ostream &stream, offs_t pc , uint16_t opcode); + void param_ret(std::ostream &stream, offs_t pc , uint16_t opcode); + void param_n16(std::ostream &stream, offs_t pc , uint16_t opcode); + void param_reg_id(std::ostream &stream, offs_t pc , uint16_t opcode); - offs_t disassemble_table(uint16_t opcode , offs_t pc , const dis_entry_t *table , bool is_3001 , std::ostream &stream); + offs_t disassemble_table(uint16_t opcode , offs_t pc , const dis_entry_t *table , std::ostream &stream); }; class hp_5061_3001_disassembler : public hp_hybrid_disassembler { public: - hp_5061_3001_disassembler() = default; + hp_5061_3001_disassembler(bool relative_mode = true); virtual ~hp_5061_3001_disassembler() = default; +}; - virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; +class hp_5061_3011_disassembler : public hp_hybrid_disassembler +{ +public: + hp_5061_3011_disassembler(bool relative_mode = true); + virtual ~hp_5061_3011_disassembler() = default; +}; -protected: - static const dis_entry_t dis_table_emc[]; +class hp_09825_67907_disassembler : public hp_hybrid_disassembler +{ +public: + hp_09825_67907_disassembler(bool relative_mode = false); + virtual ~hp_09825_67907_disassembler() = default; }; #endif diff --git a/src/devices/cpu/hphybrid/hphybrid_defs.h b/src/devices/cpu/hphybrid/hphybrid_defs.h index 634a74b94a4..7b2c22a8661 100644 --- a/src/devices/cpu/hphybrid/hphybrid_defs.h +++ b/src/devices/cpu/hphybrid/hphybrid_defs.h @@ -2,37 +2,36 @@ #define MAME_CPU_HPHYBRID_HPHYBRID_DEFS_H // Addresses of memory mapped registers -#define HP_REG_A_ADDR 0x0000 -#define HP_REG_B_ADDR 0x0001 -#define HP_REG_P_ADDR 0x0002 -#define HP_REG_R_ADDR 0x0003 -#define HP_REG_R4_ADDR 0x0004 -#define HP_REG_R5_ADDR 0x0005 -#define HP_REG_R6_ADDR 0x0006 -#define HP_REG_R7_ADDR 0x0007 -#define HP_REG_IV_ADDR 0x0008 -#define HP_REG_PA_ADDR 0x0009 -#define HP_REG_W_ADDR 0x000A -#define HP_REG_DMAPA_ADDR 0x000B -#define HP_REG_DMAMA_ADDR 0x000C -#define HP_REG_DMAC_ADDR 0x000D -#define HP_REG_C_ADDR 0x000e -#define HP_REG_D_ADDR 0x000f -#define HP_REG_AR2_ADDR 0x0010 -#define HP_REG_SE_ADDR 0x0014 -#define HP_REG_R25_ADDR 0x0015 -#define HP_REG_R26_ADDR 0x0016 -#define HP_REG_R27_ADDR 0x0017 -#define HP_REG_R32_ADDR 0x001a -#define HP_REG_R33_ADDR 0x001b -#define HP_REG_R34_ADDR 0x001c -#define HP_REG_R35_ADDR 0x001d -#define HP_REG_R36_ADDR 0x001e -#define HP_REG_R37_ADDR 0x001f -#define HP_REG_LAST_ADDR 0x001f -#define HP_REG_AR1_ADDR 0xfff8 - -#define HP_REG_IV_MASK 0xfff0 -#define HP_REG_PA_MASK 0x000f +enum : uint16_t { + HP_REG_A_ADDR = 0x0000, + HP_REG_B_ADDR = 0x0001, + HP_REG_P_ADDR = 0x0002, + HP_REG_R_ADDR = 0x0003, + HP_REG_R4_ADDR = 0x0004, + HP_REG_R5_ADDR = 0x0005, + HP_REG_R6_ADDR = 0x0006, + HP_REG_R7_ADDR = 0x0007, + HP_REG_IV_ADDR = 0x0008, + HP_REG_PA_ADDR = 0x0009, + HP_REG_W_ADDR = 0x000A, + HP_REG_DMAPA_ADDR = 0x000B, + HP_REG_DMAMA_ADDR = 0x000C, + HP_REG_DMAC_ADDR = 0x000D, + HP_REG_C_ADDR = 0x000e, + HP_REG_D_ADDR = 0x000f, + HP_REG_AR2_ADDR = 0x0010, + HP_REG_SE_ADDR = 0x0014, + HP_REG_R25_ADDR = 0x0015, + HP_REG_R26_ADDR = 0x0016, + HP_REG_R27_ADDR = 0x0017, + HP_REG_R32_ADDR = 0x001a, + HP_REG_R33_ADDR = 0x001b, + HP_REG_R34_ADDR = 0x001c, + HP_REG_R35_ADDR = 0x001d, + HP_REG_R36_ADDR = 0x001e, + HP_REG_R37_ADDR = 0x001f, + HP_REG_LAST_ADDR = 0x001f, + HP_REG_AR1_ADDR = 0xfff8 +}; #endif // MAME_CPU_HPHYBRID_HPHYBRID_DEFS_H diff --git a/src/devices/cpu/m37710/m37710.cpp b/src/devices/cpu/m37710/m37710.cpp index e7640c92d20..86470acd453 100644 --- a/src/devices/cpu/m37710/m37710.cpp +++ b/src/devices/cpu/m37710/m37710.cpp @@ -171,7 +171,7 @@ const int m37710_cpu_device::m37710_irq_levels[M37710_LINE_MAX] = 0x77, // Timer A2 14 0x76, // Timer A1 15 0x75, // Timer A0 16 - 0x7f, // IRQ 2 13 + 0x7f, // IRQ 2 13 0x7e, // IRQ 1 18 0x7d, // IRQ 0 19 diff --git a/src/devices/cpu/m68000/m68000.h b/src/devices/cpu/m68000/m68000.h index a147a78bf64..5d67e2a713f 100644 --- a/src/devices/cpu/m68000/m68000.h +++ b/src/devices/cpu/m68000/m68000.h @@ -32,6 +32,10 @@ constexpr int M68K_IRQ_5 = 5; constexpr int M68K_IRQ_6 = 6; constexpr int M68K_IRQ_7 = 7; +constexpr int M68K_SZ_LONG = 0; +constexpr int M68K_SZ_BYTE = 1; +constexpr int M68K_SZ_WORD = 2; + // special input lines constexpr int M68K_LINE_BUSERROR = 16; @@ -278,10 +282,13 @@ protected: uint16_t m_mmu_tmp_sr; /* temporary hack: status code for ptest and to handle write protection */ uint16_t m_mmu_tmp_fc; /* temporary hack: function code for the mmu (moves) */ uint16_t m_mmu_tmp_rw; /* temporary hack: read/write (1/0) for the mmu */ + uint8_t m_mmu_tmp_sz; /* temporary hack: size for mmu */ + uint32_t m_mmu_tmp_buserror_address; /* temporary hack: (first) bus error address */ uint16_t m_mmu_tmp_buserror_occurred; /* temporary hack: flag that bus error has occurred from mmu */ uint16_t m_mmu_tmp_buserror_fc; /* temporary hack: (first) bus error fc */ uint16_t m_mmu_tmp_buserror_rw; /* temporary hack: (first) bus error rw */ + uint16_t m_mmu_tmp_buserror_sz; /* temporary hack: (first) bus error size` */ uint32_t m_ic_address[M68K_IC_SIZE]; /* instruction cache address data */ uint32_t m_ic_data[M68K_IC_SIZE]; /* instruction cache content data */ diff --git a/src/devices/cpu/m68000/m68k_in.cpp b/src/devices/cpu/m68000/m68k_in.cpp index 27b3fcd0b0e..ccfbfa01a5e 100644 --- a/src/devices/cpu/m68000/m68k_in.cpp +++ b/src/devices/cpu/m68000/m68k_in.cpp @@ -412,7 +412,7 @@ and 32 er . 1100...010...... A+-DXWLdxI U U U U U U U 6 6 and 8 re . 1100...100...... A+-DXWL... U U U U U U U 8 8 4 4 4 4 4 and 16 re . 1100...101...... A+-DXWL... U U U U U U U 8 8 4 4 4 4 4 and 32 re . 1100...110...... A+-DXWL... U U U U U U U 12 12 4 4 4 4 4 -andi 16 toc . 0000001000111100 .......... U U U U U U U 20 16 12 12 12 12 12 +andi 8 toc . 0000001000111100 .......... U U U U U U U 20 16 12 12 12 12 12 andi 16 tos . 0000001001111100 .......... S S S S S S S 20 16 12 12 12 12 12 andi 8 . d 0000001000000... .......... U U U U U U U 8 8 2 2 2 2 2 andi 8 . . 0000001000...... A+-DXWL... U U U U U U U 12 12 4 4 4 4 4 @@ -556,7 +556,7 @@ eor 16 . d 1011...101000... .......... U U U U U U U 4 4 eor 16 . . 1011...101...... A+-DXWL... U U U U U U U 8 8 4 4 4 4 4 eor 32 . d 1011...110000... .......... U U U U U U U 8 6 2 2 2 2 2 eor 32 . . 1011...110...... A+-DXWL... U U U U U U U 12 12 4 4 4 4 4 -eori 16 toc . 0000101000111100 .......... U U U U U U U 20 16 12 12 12 12 12 +eori 8 toc . 0000101000111100 .......... U U U U U U U 20 16 12 12 12 12 12 eori 16 tos . 0000101001111100 .......... S S S S S S S 20 16 12 12 12 12 12 eori 8 . d 0000101000000... .......... U U U U U U U 8 8 2 2 2 2 2 eori 8 . . 0000101000...... A+-DXWL... U U U U U U U 12 12 4 4 4 4 4 @@ -735,7 +735,7 @@ or 32 er . 1000...010...... A+-DXWLdxI U U U U U U U 6 6 or 8 re . 1000...100...... A+-DXWL... U U U U U U U 8 8 4 4 4 4 4 or 16 re . 1000...101...... A+-DXWL... U U U U U U U 8 8 4 4 4 4 4 or 32 re . 1000...110...... A+-DXWL... U U U U U U U 12 12 4 4 4 4 4 -ori 16 toc . 0000000000111100 .......... U U U U U U U 20 16 12 12 12 12 12 +ori 8 toc . 0000000000111100 .......... U U U U U U U 20 16 12 12 12 12 12 ori 16 tos . 0000000001111100 .......... S S S S S S S 20 16 12 12 12 12 12 ori 8 . d 0000000000000... .......... U U U U U U U 8 8 2 2 2 2 2 ori 8 . . 0000000000...... A+-DXWL... U U U U U U U 12 12 4 4 4 4 4 @@ -1827,9 +1827,9 @@ M68KMAKE_OP(andi, 32, ., .) } -M68KMAKE_OP(andi, 16, toc, .) +M68KMAKE_OP(andi, 8, toc, .) { - m68ki_set_ccr(m68ki_get_ccr() & OPER_I_16()); + m68ki_set_ccr(m68ki_get_ccr() & OPER_I_8()); } @@ -4950,9 +4950,9 @@ M68KMAKE_OP(eori, 32, ., .) } -M68KMAKE_OP(eori, 16, toc, .) +M68KMAKE_OP(eori, 8, toc, .) { - m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_16()); + m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_8()); } @@ -8126,9 +8126,9 @@ M68KMAKE_OP(ori, 32, ., .) } -M68KMAKE_OP(ori, 16, toc, .) +M68KMAKE_OP(ori, 8, toc, .) { - m68ki_set_ccr(m68ki_get_ccr() | OPER_I_16()); + m68ki_set_ccr(m68ki_get_ccr() | OPER_I_8()); } diff --git a/src/devices/cpu/m68000/m68kcpu.cpp b/src/devices/cpu/m68000/m68kcpu.cpp index f7a162ccde0..b0c26d00181 100644 --- a/src/devices/cpu/m68000/m68kcpu.cpp +++ b/src/devices/cpu/m68000/m68kcpu.cpp @@ -669,6 +669,10 @@ void m68000_base_device::postload() void m68000_base_device::m68k_cause_bus_error() { + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; + // Halt the cpu on berr when writing the stack frame. if (m_run_mode == RUN_MODE_BERR_AERR_RESET_WSF) { diff --git a/src/devices/cpu/m68000/m68kcpu.h b/src/devices/cpu/m68000/m68kcpu.h index adb45a04c78..28b56600a56 100644 --- a/src/devices/cpu/m68000/m68kcpu.h +++ b/src/devices/cpu/m68000/m68kcpu.h @@ -55,6 +55,7 @@ static constexpr int EXCEPTION_UNINITIALIZED_INTERRUPT = 15; static constexpr int EXCEPTION_SPURIOUS_INTERRUPT = 24; static constexpr int EXCEPTION_INTERRUPT_AUTOVECTOR = 24; static constexpr int EXCEPTION_TRAP_BASE = 32; +static constexpr int EXCEPTION_MMU_CONFIGURATION = 56; // only on 020/030 /* Function codes set by CPU during data/address bus activity */ static constexpr int FUNCTION_CODE_USER_DATA = 1; @@ -590,7 +591,7 @@ inline uint32_t m68ki_read_imm_16() m_mmu_tmp_fc = m_s_flag | FUNCTION_CODE_USER_PROGRAM; m_mmu_tmp_rw = 1; - + m_mmu_tmp_sz = M68K_SZ_WORD; m68ki_check_address_error(m_pc, MODE_READ, m_s_flag | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */ if (m_pc != m_pref_addr) @@ -617,7 +618,7 @@ inline uint32_t m68ki_read_imm_32() m_mmu_tmp_fc = m_s_flag | FUNCTION_CODE_USER_PROGRAM; m_mmu_tmp_rw = 1; - + m_mmu_tmp_sz = M68K_SZ_LONG; m68ki_check_address_error(m_pc, MODE_READ, m_s_flag | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */ if(m_pc != m_pref_addr) @@ -652,6 +653,7 @@ inline uint32_t m68ki_read_8_fc(uint32_t address, uint32_t fc) { m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 1; + m_mmu_tmp_sz = M68K_SZ_BYTE; return m_read8(address); } inline uint32_t m68ki_read_16_fc(uint32_t address, uint32_t fc) @@ -662,6 +664,7 @@ inline uint32_t m68ki_read_16_fc(uint32_t address, uint32_t fc) } m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 1; + m_mmu_tmp_sz = M68K_SZ_WORD; return m_read16(address); } inline uint32_t m68ki_read_32_fc(uint32_t address, uint32_t fc) @@ -672,6 +675,7 @@ inline uint32_t m68ki_read_32_fc(uint32_t address, uint32_t fc) } m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 1; + m_mmu_tmp_sz = M68K_SZ_LONG; return m_read32(address); } @@ -679,6 +683,7 @@ inline void m68ki_write_8_fc(uint32_t address, uint32_t fc, uint32_t value) { m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 0; + m_mmu_tmp_sz = M68K_SZ_BYTE; m_write8(address, value); } inline void m68ki_write_16_fc(uint32_t address, uint32_t fc, uint32_t value) @@ -689,6 +694,7 @@ inline void m68ki_write_16_fc(uint32_t address, uint32_t fc, uint32_t value) } m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 0; + m_mmu_tmp_sz = M68K_SZ_WORD; m_write16(address, value); } inline void m68ki_write_32_fc(uint32_t address, uint32_t fc, uint32_t value) @@ -699,6 +705,7 @@ inline void m68ki_write_32_fc(uint32_t address, uint32_t fc, uint32_t value) } m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 0; + m_mmu_tmp_sz = M68K_SZ_LONG; m_write32(address, value); } @@ -715,6 +722,7 @@ inline void m68ki_write_32_pd_fc(uint32_t address, uint32_t fc, uint32_t value) } m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 0; + m_mmu_tmp_sz = M68K_SZ_LONG; m_write16(address+2, value>>16); m_write16(address, value&0xffff); } @@ -1219,6 +1227,7 @@ inline void m68ki_stack_frame_1010(uint32_t sr, uint32_t vector, uint32_t pc, ui { int orig_rw = m_mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now int orig_fc = m_mmu_tmp_buserror_fc; + int orig_sz = m_mmu_tmp_buserror_sz; /* INTERNAL REGISTER */ m68ki_push_16(0); @@ -1247,7 +1256,7 @@ inline void m68ki_stack_frame_1010(uint32_t sr, uint32_t vector, uint32_t pc, ui /* SPECIAL STATUS REGISTER */ // set bit for: Rerun Faulted bus Cycle, or run pending prefetch // set FC - m68ki_push_16(0x0100 | orig_fc | orig_rw<<6); + m68ki_push_16(0x0100 | orig_fc | orig_rw<<6 | orig_sz<<4); /* INTERNAL REGISTER */ m68ki_push_16(0); @@ -1271,7 +1280,7 @@ inline void m68ki_stack_frame_1011(uint32_t sr, uint32_t vector, uint32_t pc, ui { int orig_rw = m_mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now int orig_fc = m_mmu_tmp_buserror_fc; - + int orig_sz = m_mmu_tmp_buserror_sz; /* INTERNAL REGISTERS (18 words) */ m68ki_push_32(0); m68ki_push_32(0); @@ -1322,7 +1331,7 @@ inline void m68ki_stack_frame_1011(uint32_t sr, uint32_t vector, uint32_t pc, ui m68ki_push_16(0); /* SPECIAL STATUS REGISTER */ - m68ki_push_16(0x0100 | orig_fc | orig_rw<<6); + m68ki_push_16(0x0100 | orig_fc | (orig_rw<<6) | (orig_sz<<4)); /* INTERNAL REGISTER */ m68ki_push_16(0); diff --git a/src/devices/cpu/m68000/m68kmmu.h b/src/devices/cpu/m68000/m68kmmu.h index 24601755e6d..2d9270d5615 100644 --- a/src/devices/cpu/m68000/m68kmmu.h +++ b/src/devices/cpu/m68000/m68kmmu.h @@ -489,6 +489,7 @@ uint32_t pmmu_translate_addr_with_fc(uint32_t addr_in, uint8_t fc, uint8_t ptest m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } } else if (m_mmu_tmp_sr & M68K_MMU_SR_SUPERVISOR_ONLY) @@ -498,6 +499,7 @@ uint32_t pmmu_translate_addr_with_fc(uint32_t addr_in, uint8_t fc, uint8_t ptest m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } } else if ((m_mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT) && !m_mmu_tmp_rw) @@ -507,6 +509,7 @@ uint32_t pmmu_translate_addr_with_fc(uint32_t addr_in, uint8_t fc, uint8_t ptest m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } } @@ -568,6 +571,7 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } } @@ -593,6 +597,7 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } } @@ -663,6 +668,7 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } return addr_in; @@ -677,6 +683,7 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } return addr_in; @@ -695,6 +702,7 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } } @@ -739,6 +747,7 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } return addr_in; @@ -755,6 +764,7 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } } @@ -1016,7 +1026,18 @@ void m68881_mmu_ops() if (m_mmu_tc & 0x80000000) { - m_pmmu_enabled = 1; + int bits = 0; + for(int shift = 20; shift >= 0; shift -= 4) { + bits += (m_mmu_tc >> shift) & 0x0f; + } + + if (bits != 32 || !((m_mmu_tc >> 23) & 1)) { + logerror("MMU: TC invalid!\n"); + m_mmu_tc &= ~0x80000000; + m68ki_exception_trap(EXCEPTION_MMU_CONFIGURATION); + } else { + m_pmmu_enabled = 1; + } // printf("PMMU enabled\n"); } else @@ -1036,6 +1057,12 @@ void m68881_mmu_ops() m_mmu_srp_limit = (temp64>>32) & 0xffffffff; m_mmu_srp_aptr = temp64 & 0xffffffff; // printf("PMMU: SRP limit = %08x aptr = %08x\n", m_mmu_srp_limit, m_mmu_srp_aptr); + // CRP type 0 is not allowed + if ((m_mmu_crp_limit & 3) == 0) { + m68ki_exception_trap(EXCEPTION_MMU_CONFIGURATION); + return; + } + if (!(modes & 0x100)) { pmmu_atc_flush(); @@ -1047,6 +1074,13 @@ void m68881_mmu_ops() m_mmu_crp_limit = (temp64>>32) & 0xffffffff; m_mmu_crp_aptr = temp64 & 0xffffffff; // printf("PMMU: CRP limit = %08x aptr = %08x\n", m_mmu_crp_limit, m_mmu_crp_aptr); + // CRP type 0 is not allowed + if ((m_mmu_crp_limit & 3) == 0) { + m68ki_exception_trap(EXCEPTION_MMU_CONFIGURATION); + return; + } + + if (!(modes & 0x100)) { pmmu_atc_flush(); diff --git a/src/devices/cpu/mcs48/mcs48.cpp b/src/devices/cpu/mcs48/mcs48.cpp index c720507205b..331e05d6456 100644 --- a/src/devices/cpu/mcs48/mcs48.cpp +++ b/src/devices/cpu/mcs48/mcs48.cpp @@ -531,19 +531,25 @@ uint8_t mcs48_cpu_device::p2_mask() void mcs48_cpu_device::expander_operation(expander_op operation, uint8_t port) { - /* put opcode/data on low 4 bits of P2 */ + // put opcode on low 4 bits of P2 (overwriting latch) port_w(2, m_p2 = (m_p2 & 0xf0) | (uint8_t(operation) << 2) | (port & 3)); - /* generate high-to-low transition on PROG line */ + // generate high-to-low transition on PROG line prog_w(0); - /* put data on low 4 bits of P2 */ + // transfer data on low 4 bits of P2 if (operation != EXPANDER_OP_READ) port_w(2, m_p2 = (m_p2 & 0xf0) | (m_a & 0x0f)); else - m_a = port_r(2) | 0x0f; + { + // place P20-P23 in input mode + port_w(2, m_p2 |= 0x0f); + + // input data to lower 4 bits of A (upper 4 bits are cleared) + m_a = port_r(2) & 0x0f; + } - /* generate low-to-high transition on PROG line */ + // generate low-to-high transition on PROG line prog_w(1); } @@ -1099,7 +1105,7 @@ void mcs48_cpu_device::device_start() state_add(STATE_GENPC, "GENPC", m_pc).mask(0xfff).noshow(); state_add(STATE_GENPCBASE, "CURPC", m_prevpc).mask(0xfff).noshow(); state_add(STATE_GENSP, "GENSP", m_psw).mask(0x7).noshow(); - state_add(STATE_GENFLAGS, "GENFLAGS", m_psw).noshow().formatstr("%10s"); + state_add(STATE_GENFLAGS, "GENFLAGS", m_psw).noshow().formatstr("%11s"); state_add(MCS48_A, "A", m_a); state_add(MCS48_TC, "TC", m_timer); state_add(MCS48_TPRE, "TPRE", m_prescaler).mask(0x1f); diff --git a/src/devices/cpu/mips/mips3.cpp b/src/devices/cpu/mips/mips3.cpp index 039d4259e02..6989e262492 100644 --- a/src/devices/cpu/mips/mips3.cpp +++ b/src/devices/cpu/mips/mips3.cpp @@ -288,7 +288,9 @@ void mips3_device::generate_exception(int exception, int backup) /* translate our fake fill exceptions into real exceptions */ if (exception == EXCEPTION_TLBLOAD_FILL || exception == EXCEPTION_TLBSTORE_FILL) { - offset = 0; + /* don't use the tlb exception offset if within another exception */ + if (!(SR & SR_EXL)) + offset = 0; exception = (exception - EXCEPTION_TLBLOAD_FILL) + EXCEPTION_TLBLOAD; } else if (exception == EXCEPTION_INTERRUPT && m_flavor == MIPS3_TYPE_R5900) @@ -296,9 +298,6 @@ void mips3_device::generate_exception(int exception, int backup) offset = 0x200; } - /* set the exception PC */ - m_core->cpr[0][COP0_EPC] = m_core->pc; - /* put the cause in the low 8 bits and clear the branch delay flag */ CAUSE = (CAUSE & ~0x800000ff) | (exception << 2); @@ -308,31 +307,26 @@ void mips3_device::generate_exception(int exception, int backup) CAUSE |= m_badcop_value << 28; } - /* if we were in a branch delay slot, adjust */ - if ((m_nextpc != ~0) || (m_delayslot)) + /* check if exception within another exception */ + if (!(SR & SR_EXL)) { - m_delayslot = false; - m_nextpc = ~0; - m_core->cpr[0][COP0_EPC] -= 4; - CAUSE |= 0x80000000; - } + /* if we were in a branch delay slot, adjust */ + if ((m_nextpc != ~0) || (m_delayslot)) + { + m_delayslot = false; + m_nextpc = ~0; + m_core->cpr[0][COP0_EPC] = m_core->pc - 4; + CAUSE |= 0x80000000; + } + else + m_core->cpr[0][COP0_EPC] = m_core->pc; - /* set the exception level */ - SR |= SR_EXL; + /* set the exception level */ + SR |= SR_EXL; + } /* based on the BEV bit, we either go to ROM or RAM */ - m_core->pc = (SR & SR_BEV) ? 0xbfc00200 : 0x80000000; - - /* most exceptions go to offset 0x180, except for TLB stuff */ - if (exception >= EXCEPTION_TLBMOD && exception <= EXCEPTION_TLBSTORE) - { - fprintf(stderr, "TLB miss @ %08X\n", (uint32_t)m_core->cpr[0][COP0_BadVAddr]); - machine().debug_break(); - } - else - { - m_core->pc += offset; - } + m_core->pc = ((SR & SR_BEV) ? 0xbfc00200 : 0x80000000) + offset; /* useful for tracking interrupts diff --git a/src/devices/cpu/psx/gte.cpp b/src/devices/cpu/psx/gte.cpp index cec3214cb47..d48b206e84f 100644 --- a/src/devices/cpu/psx/gte.cpp +++ b/src/devices/cpu/psx/gte.cpp @@ -145,24 +145,6 @@ static inline void ATTR_PRINTF(2,3) GTELOG( uint32_t pc, const char *a, ...) {} #define CV2( n ) ( n < 3 ? m_cp2cr[ ( n << 3 ) + 6 ].sd : 0 ) #define CV3( n ) ( n < 3 ? m_cp2cr[ ( n << 3 ) + 7 ].sd : 0 ) -static uint32_t gte_leadingzerocount( uint32_t lzcs ) -{ - uint32_t lzcr = 0; - - if( ( lzcs & 0x80000000 ) == 0 ) - { - lzcs = ~lzcs; - } - - while( ( lzcs & 0x80000000 ) != 0 ) - { - lzcr++; - lzcs <<= 1; - } - - return lzcr; -} - int32_t gte::LIM( int32_t value, int32_t max, int32_t min, uint32_t flag ) { if( value > max ) @@ -233,7 +215,7 @@ void gte::setcp2dr( uint32_t pc, int reg, uint32_t value ) break; case 30: - LZCR = gte_leadingzerocount( value ); + LZCR = (value & 0x80000000) == 0 ? count_leading_zeros(value) : count_leading_ones(value); break; case 31: @@ -332,7 +314,7 @@ static inline uint32_t gte_divide( uint16_t numerator, uint16_t denominator ) 0x00 }; - int shift = gte_leadingzerocount( denominator ) - 16; + int shift = count_leading_zeros( denominator ) - 16; int r1 = ( denominator << shift ) & 0x7fff; int r2 = table[ ( ( r1 + 0x40 ) >> 7 ) ] + 0x101; diff --git a/src/devices/cpu/sm8500/sm8500d.cpp b/src/devices/cpu/sm8500/sm8500d.cpp index 3d6139ef8ed..7a30af1dfbe 100644 --- a/src/devices/cpu/sm8500/sm8500d.cpp +++ b/src/devices/cpu/sm8500/sm8500d.cpp @@ -312,11 +312,11 @@ offs_t sm8500_disassembler::disassemble(std::ostream &stream, offs_t pc, const d break; case AM_cbr: offset = (int8_t) opcodes.r8(pos++); - util::stream_format(stream, "%s,$%04X", sm8500_cond[ op & 0x0F ], pc + pos + offset); + util::stream_format(stream, "%s,$%04X", sm8500_cond[ op & 0x0F ], pos + offset); break; case AM_rbr: offset = (int8_t) opcodes.r8(pos++); - util::stream_format(stream, "r%02Xh,$%04X", op & 0x07, pc + pos + offset); + util::stream_format(stream, "r%02Xh,$%04X", op & 0x07, pos + offset); break; case AM_cjp: ea = opcodes.r8(pos++) << 8; @@ -431,7 +431,7 @@ offs_t sm8500_disassembler::disassemble(std::ostream &stream, offs_t pc, const d case AM_Rbr: ea = opcodes.r8(pos++); offset = (int8_t) opcodes.r8(pos++); - util::stream_format(stream, "R%02Xh,#%d,$%04X", ea, op & 0x07, pc + pos + offset); + util::stream_format(stream, "R%02Xh,#%d,$%04X", ea, op & 0x07, pos + offset); break; case AM_Rb: ea = opcodes.r8(pos++); @@ -490,7 +490,7 @@ offs_t sm8500_disassembler::disassemble(std::ostream &stream, offs_t pc, const d } util::stream_format(stream, ",#%d,", ea & 0x07); offset = (int8_t) opcodes.r8(pos++); - util::stream_format(stream, "$%04X", pc + pos + offset); + util::stream_format(stream, "$%04X", pos + offset); break; case AM_1A: ea = opcodes.r8(pos++); diff --git a/src/devices/cpu/sparc/mb86901.cpp b/src/devices/cpu/sparc/mb86901.cpp index 8b0777d847d..2d40cb7ce97 100644 --- a/src/devices/cpu/sparc/mb86901.cpp +++ b/src/devices/cpu/sparc/mb86901.cpp @@ -343,8 +343,10 @@ void mb86901_device::device_start() save_item(NAME(m_bp_irl)); save_item(NAME(m_bp_fpu_present)); save_item(NAME(m_bp_cp_present)); + save_item(NAME(m_pb_error)); save_item(NAME(m_pb_block_ldst_byte)); save_item(NAME(m_pb_block_ldst_word)); + save_item(NAME(m_irq_state)); save_item(NAME(m_trap)); save_item(NAME(m_tt)); save_item(NAME(m_ticc_trap_type)); @@ -384,9 +386,27 @@ void mb86901_device::device_start() save_item(NAME(m_ps)); save_item(NAME(m_et)); save_item(NAME(m_cwp)); + save_item(NAME(m_alu_op3_assigned)); + save_item(NAME(m_ldst_op3_assigned)); + save_item(NAME(m_alu_setcc)); + save_item(NAME(m_privileged_asr)); + save_item(NAME(m_illegal_instruction_asr)); save_item(NAME(m_mae)); save_item(NAME(m_no_annul)); save_item(NAME(m_hold_bus)); + save_item(NAME(m_icount)); + save_item(NAME(m_stashed_icount)); + save_item(NAME(m_insn_space)); + save_item(NAME(m_data_space)); + +#if LOG_FCODES + save_item(NAME(m_ss1_next_pc)); + save_item(NAME(m_ss1_next_opcode)); + save_item(NAME(m_ss1_next_handler_base)); + save_item(NAME(m_ss1_next_entry_point)); + save_item(NAME(m_ss1_next_stack)); + save_item(NAME(m_log_fcodes)); +#endif // set our instruction counter set_icountptr(m_icount); @@ -463,6 +483,17 @@ void mb86901_device::device_reset() //------------------------------------------------- +// device_post_load - update register pointers +// after loading a savestate +//------------------------------------------------- + +void mb86901_device::device_post_load() +{ + update_gpr_pointers(); +} + + +//------------------------------------------------- // memory_space_config - return the configuration // of the specified address space, or nullptr if // the space doesn't exist diff --git a/src/devices/cpu/sparc/sparc.h b/src/devices/cpu/sparc/sparc.h index 1a3351c57fe..ff337da962c 100644 --- a/src/devices/cpu/sparc/sparc.h +++ b/src/devices/cpu/sparc/sparc.h @@ -34,6 +34,7 @@ public: virtual void device_start() override; virtual void device_reset() override; virtual void device_stop() override; + virtual void device_post_load() override; virtual void device_resolve_objects() override; // device_execute_interface overrides diff --git a/src/devices/cpu/unsp/unsp.cpp b/src/devices/cpu/unsp/unsp.cpp index c8a4025f5cd..966fc70fbc4 100644 --- a/src/devices/cpu/unsp/unsp.cpp +++ b/src/devices/cpu/unsp/unsp.cpp @@ -1,12 +1,12 @@ // license:BSD-3-Clause // copyright-holders:Ryan Holtz -/**************************\ -* -* SunPlus u'nSP core -* -* by Ryan Holtz -* -\**************************/ +/***************************************************************************** + + SunPlus micro'nSP core + + based primarily on Unununium, by segher + +*****************************************************************************/ #include "emu.h" #include "unsp.h" @@ -20,7 +20,16 @@ DEFINE_DEVICE_TYPE(UNSP, unsp_device, "unsp", "SunPlus u'nSP") unsp_device::unsp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : cpu_device(mconfig, UNSP, tag, owner, clock) , m_program_config("program", ENDIANNESS_BIG, 16, 23, -1) - , m_irq(0), m_fiq(0), m_curirq(0), m_sirq(0), m_sb(0), m_saved_sb(0), m_program(nullptr), m_icount(0), m_debugger_temp(0) + , m_enable_irq(false) + , m_enable_fiq(false) + , m_irq(false) + , m_fiq(false) + , m_curirq(0) + , m_sirq(0) + , m_sb(0) + , m_program(nullptr) + , m_icount(0) + , m_debugger_temp(0) { } @@ -57,54 +66,6 @@ std::unique_ptr<util::disasm_interface> unsp_device::create_disassembler() #define UNSP_S 0x0080 #define UNSP_C 0x0040 -#define STANDARD_ALU_CASES \ - case 0: \ - lres = r0 + r1; \ - unsp_update_nzsc(lres, r0, r1); \ - break; \ - case 1: \ - lres = r0 + r1; \ - if(UNSP_REG(SR) & UNSP_C) lres++; \ - unsp_update_nzsc(lres, r0, r1); \ - break; \ - case 3: \ - lres = r0 + (~r1 & 0x0000ffff); \ - if(UNSP_REG(SR) & UNSP_C) lres++; \ - unsp_update_nzsc(lres, r0, r1); \ - break; \ - case 2: \ - case 4: \ - lres = r0 + (~r1 & 0x0000ffff) + 1; \ - unsp_update_nzsc(lres, r0, r1); \ - break; \ - case 6: \ - lres = -r1; \ - unsp_update_nz(lres); \ - break; \ - case 8: \ - lres = r0 ^ r1; \ - unsp_update_nz(lres); \ - break; \ - case 9: \ - lres = r1; \ - unsp_update_nz(lres); \ - break; \ - case 10: \ - lres = r0 | r1; \ - unsp_update_nz(lres); \ - break; \ - case 11: \ - case 12: \ - lres = r0 & r1; \ - unsp_update_nz(lres); \ - break - -#define WRITEBACK_OPA \ - if(OP0 != 4 && OP0 < 12) \ - { \ - UNSP_REG_I(OPA) = (uint16_t)lres; \ - } - /*****************************************************************************/ void unsp_device::unimplemented_opcode(uint16_t op) @@ -114,12 +75,12 @@ void unsp_device::unimplemented_opcode(uint16_t op) /*****************************************************************************/ -uint16_t unsp_device::READ16(uint32_t address) +uint16_t unsp_device::read16(uint32_t address) { return m_program->read_word(address); } -void unsp_device::WRITE16(uint32_t address, uint16_t data) +void unsp_device::write16(uint32_t address, uint16_t data) { m_program->write_word(address, data); } @@ -129,32 +90,59 @@ void unsp_device::WRITE16(uint32_t address, uint16_t data) void unsp_device::device_start() { memset(m_r, 0, sizeof(uint16_t) * 16); - m_irq = 0; - m_fiq = 0; + m_enable_irq = false; + m_enable_fiq = false; + m_irq = false; + m_fiq = false; m_curirq = 0; m_sirq = 0; m_sb = 0; - m_saved_sb = 0; + memset(m_saved_sb, 0, sizeof(uint8_t) * 3); m_debugger_temp = 0; m_program = &space(AS_PROGRAM); - state_add( UNSP_SP, "SP", UNSP_REG(SP)).formatstr("%04X"); - state_add( UNSP_R1, "R1", UNSP_REG(R1)).formatstr("%04X"); - state_add( UNSP_R2, "R2", UNSP_REG(R2)).formatstr("%04X"); - state_add( UNSP_R3, "R3", UNSP_REG(R3)).formatstr("%04X"); - state_add( UNSP_R4, "R4", UNSP_REG(R4)).formatstr("%04X"); - state_add( UNSP_BP, "BP", UNSP_REG(BP)).formatstr("%04X"); - state_add( UNSP_SR, "SR", UNSP_REG(SR)).formatstr("%04X"); - state_add( UNSP_PC, "PC", m_debugger_temp).callimport().callexport().formatstr("%06X"); - state_add( UNSP_IRQ, "IRQ", m_irq).formatstr("%1u"); - state_add( UNSP_FIQ, "FIQ", m_fiq).formatstr("%1u"); - state_add( UNSP_SB, "SB", m_sb).formatstr("%1u"); + state_add(STATE_GENFLAGS, "GENFLAGS", UNSP_REG(SR)).callimport().callexport().formatstr("%4s").noshow(); + state_add(UNSP_SP, "SP", UNSP_REG(SP)).formatstr("%04X"); + state_add(UNSP_R1, "R1", UNSP_REG(R1)).formatstr("%04X"); + state_add(UNSP_R2, "R2", UNSP_REG(R2)).formatstr("%04X"); + state_add(UNSP_R3, "R3", UNSP_REG(R3)).formatstr("%04X"); + state_add(UNSP_R4, "R4", UNSP_REG(R4)).formatstr("%04X"); + state_add(UNSP_BP, "BP", UNSP_REG(BP)).formatstr("%04X"); + state_add(UNSP_SR, "SR", UNSP_REG(SR)).formatstr("%04X"); + state_add(UNSP_PC, "PC", m_debugger_temp).callimport().callexport().formatstr("%06X"); + state_add(UNSP_IRQ_EN, "IRQE", m_enable_irq).formatstr("%1u"); + state_add(UNSP_FIQ_EN, "FIQE", m_enable_fiq).formatstr("%1u"); + state_add(UNSP_IRQ, "IRQ", m_irq).formatstr("%1u"); + state_add(UNSP_FIQ, "FIQ", m_fiq).formatstr("%1u"); + state_add(UNSP_SB, "SB", m_sb).formatstr("%1u"); state_add(STATE_GENPC, "GENPC", m_debugger_temp).callexport().noshow(); state_add(STATE_GENPCBASE, "CURPC", m_debugger_temp).callexport().noshow(); set_icountptr(m_icount); + + save_item(NAME(m_r)); + save_item(NAME(m_enable_irq)); + save_item(NAME(m_enable_fiq)); + save_item(NAME(m_irq)); + save_item(NAME(m_fiq)); + save_item(NAME(m_curirq)); + save_item(NAME(m_sirq)); + save_item(NAME(m_sb)); + save_item(NAME(m_saved_sb)); +} + +void unsp_device::state_string_export(const device_state_entry &entry, std::string &str) const +{ + switch (entry.index()) + { + case STATE_GENFLAGS: + { + const uint16_t sr = UNSP_REG(SR); + str = string_format("%c%c%c%c", (sr & UNSP_N) ? 'N' : ' ', (sr & UNSP_Z) ? 'Z' : ' ', (sr & UNSP_S) ? 'S' : ' ', (sr & UNSP_C) ? 'C' : ' '); + } + } } void unsp_device::state_export(const device_state_entry &entry) @@ -184,14 +172,16 @@ void unsp_device::device_reset() { memset(m_r, 0, sizeof(uint16_t) * 16); - UNSP_REG(PC) = READ16(0xfff7); - m_irq = 0; - m_fiq = 0; + UNSP_REG(PC) = read16(0xfff7); + m_enable_irq = false; + m_enable_fiq = false; + m_irq = false; + m_fiq = false; } /*****************************************************************************/ -void unsp_device::unsp_update_nz(uint32_t value) +void unsp_device::update_nz(uint32_t value) { UNSP_REG(SR) &= ~(UNSP_N | UNSP_Z); if(value & 0x8000) @@ -204,10 +194,9 @@ void unsp_device::unsp_update_nz(uint32_t value) } } -void unsp_device::unsp_update_nzsc(uint32_t value, uint16_t r0, uint16_t r1) +void unsp_device::update_sc(uint32_t value, uint16_t r0, uint16_t r1) { UNSP_REG(SR) &= ~(UNSP_C | UNSP_S); - unsp_update_nz(value); if(value != (uint16_t)value) { UNSP_REG(SR) |= UNSP_C; @@ -219,30 +208,100 @@ void unsp_device::unsp_update_nzsc(uint32_t value, uint16_t r0, uint16_t r1) } } -void unsp_device::unsp_push(uint16_t value, uint16_t *reg) +void unsp_device::push(uint16_t value, uint16_t *reg) +{ + write16((*reg)--, value); +} + +uint16_t unsp_device::pop(uint16_t *reg) +{ + return read16(++(*reg)); +} + +void unsp_device::trigger_fiq() { - WRITE16((*reg)--, value); + if (!m_enable_fiq || m_fiq || m_irq) + { + logerror("FIQs are disabled or we're already in an FIQ/IRQ, bailing\n"); + return; + } + + m_fiq = true; + + m_saved_sb[m_irq ? 1 : 0] = m_sb; + m_sb = m_saved_sb[2]; + + push(UNSP_REG(PC), &UNSP_REG(SP)); + push(UNSP_REG(SR), &UNSP_REG(SP)); + UNSP_REG(PC) = read16(0xfff6); + UNSP_REG(SR) = 0; } -uint16_t unsp_device::unsp_pop(uint16_t *reg) +void unsp_device::trigger_irq(int line) { - return READ16(++(*reg)); + if (!m_enable_irq || m_irq || m_fiq) + { + logerror("IRQs are disabled or we're already in an FIQ/IRQ, bailing\n"); + return; + } + + m_irq = true; + + m_saved_sb[0] = m_sb; + m_sb = m_saved_sb[1]; + + push(UNSP_REG(PC), &UNSP_REG(SP)); + push(UNSP_REG(SR), &UNSP_REG(SP)); + UNSP_REG(PC) = read16(0xfff8 + line); + UNSP_REG(SR) = 0; +} + +void unsp_device::check_irqs() +{ + if (!m_sirq) + return; + + int highest_irq = -1; + for (int i = 0; i <= 8; i++) + { + if (BIT(m_sirq, i)) + { + highest_irq = i; + break; + } + } + + if (highest_irq < 0) + return; + + if (highest_irq == UNSP_FIQ_LINE) + { + trigger_fiq(); + } + else + { + trigger_irq(highest_irq - 1); + } } void unsp_device::execute_run() { - uint32_t op; - uint32_t lres; - uint16_t r0, r1; - lres = 0; + uint32_t lres = 0; + uint16_t r0 = 0; + uint16_t r1 = 0; + uint32_t r2 = 0; while (m_icount > 0) { + check_irqs(); + debugger_instruction_hook(UNSP_LPC); - op = READ16(UNSP_LPC); + const uint32_t op = read16(UNSP_LPC); UNSP_REG(PC)++; + const uint8_t lower_op = (OP1 << 4) | OP0; + if(OP0 < 0xf && OPA == 0x7 && OP1 < 2) { switch(OP0) @@ -250,560 +309,563 @@ void unsp_device::execute_run() case 0: // JB if(!(UNSP_REG(SR) & UNSP_C)) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 1: // JAE if(UNSP_REG(SR) & UNSP_C) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 2: // JGE if(!(UNSP_REG(SR) & UNSP_S)) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 3: // JL if(UNSP_REG(SR) & UNSP_S) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 4: // JNE if(!(UNSP_REG(SR) & UNSP_Z)) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 5: // JE if(UNSP_REG(SR) & UNSP_Z) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 6: // JPL if(!(UNSP_REG(SR) & UNSP_N)) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 7: // JMI if(UNSP_REG(SR) & UNSP_N) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 8: // JBE if((UNSP_REG(SR) & (UNSP_Z | UNSP_C)) != UNSP_C) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 9: // JA if((UNSP_REG(SR) & (UNSP_Z | UNSP_C)) == UNSP_C) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 10: // JLE if(UNSP_REG(SR) & (UNSP_Z | UNSP_S)) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 11: // JG if(!(UNSP_REG(SR) & (UNSP_Z | UNSP_S))) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 14: // JMP UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); - break; + m_icount -= 4; + continue; + default: + unimplemented_opcode(op); + continue; } } - else + else if (lower_op == 0x2d) // Push { - switch((OP1 << 4) | OP0) + r0 = OPN; + r1 = OPA; + m_icount -= 4 + 2 * r0; + + while (r0--) { - // r, [bp+imm6] - case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x06: case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: - r0 = UNSP_REG_I(OPA); - r1 = READ16(UNSP_REG(BP) + OPIMM); - switch(OP0) + push(UNSP_REG_I(r1--), &UNSP_REG_I(OPB)); + } + continue; + } + else if (lower_op == 0x29) // Pop + { + if (op == 0x9a98) // reti + { + m_icount -= 8; + UNSP_REG(SR) = pop(&UNSP_REG(SP)); + UNSP_REG(PC) = pop(&UNSP_REG(SP)); + + if(m_fiq) + { + m_fiq = false; + m_saved_sb[2] = m_sb; + m_sb = m_saved_sb[m_irq ? 1 : 0]; + } + else if(m_irq) + { + m_irq = false; + m_saved_sb[1] = m_sb; + m_sb = m_saved_sb[0]; + } + m_curirq = 0; + + check_irqs(); + continue; + } + else + { + r0 = OPN; + r1 = OPA; + m_icount -= 4 + 2 * r0; + + while (r0--) + { + UNSP_REG_I(++r1) = pop(&UNSP_REG_I(OPB)); + } + continue; + } + } + else if (OP0 == 0xf) + { + switch (OP1) + { + case 0x00: // Multiply, Unsigned * Signed + if(OPN == 1 && OPA != 7) { - STANDARD_ALU_CASES; - case 13: // store r, [bp+imm6] - WRITE16(UNSP_REG(BP) + OPIMM, UNSP_REG_I(OPA)); - break; - default: - unimplemented_opcode(op); - break; + m_icount -= 12; + lres = UNSP_REG_I(OPA) * UNSP_REG_I(OPB); + if(UNSP_REG_I(OPB) & 0x8000) + { + lres -= UNSP_REG_I(OPA) << 16; + } + UNSP_REG(R4) = lres >> 16; + UNSP_REG(R3) = (uint16_t)lres; } - WRITEBACK_OPA; - break; - - // r, imm6 - case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x16: case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: - r0 = UNSP_REG_I(OPA); - r1 = OPIMM; - switch(OP0) + else { - STANDARD_ALU_CASES; - default: - unimplemented_opcode(op); - break; + unimplemented_opcode(op); } - WRITEBACK_OPA; - break; + continue; - // Pop / Interrupt return - case 0x29: - if(op == 0x9a90) // retf + case 0x01: // Call + if(!(OPA & 1)) { - UNSP_REG(SR) = unsp_pop(&UNSP_REG(SP)); - UNSP_REG(PC) = unsp_pop(&UNSP_REG(SP)); - break; + m_icount -= 9; + r1 = read16(UNSP_LPC); + UNSP_REG(PC)++; + push(UNSP_REG(PC), &UNSP_REG(SP)); + push(UNSP_REG(SR), &UNSP_REG(SP)); + UNSP_REG(PC) = r1; + UNSP_REG(SR) &= 0xffc0; + UNSP_REG(SR) |= OPIMM; } - else if(op == 0x9a98) // reti + else { - int i; - UNSP_REG(SR) = unsp_pop(&UNSP_REG(SP)); - UNSP_REG(PC) = unsp_pop(&UNSP_REG(SP)); - if(m_fiq & 2) - { - m_fiq &= 1; - } - else if(m_irq & 2) - { - m_irq &= 1; - } - m_sirq &= ~(1 << m_curirq); - for(i = 0; i < 9; i++) + unimplemented_opcode(op); + } + continue; + + case 0x02: // Far Jump + if (OPA == 7) + { + m_icount -= 5; + UNSP_REG(PC) = read16(UNSP_LPC); + UNSP_REG(SR) &= 0xffc0; + UNSP_REG(SR) |= OPIMM; + } + else + { + unimplemented_opcode(op); + } + continue; + + case 0x04: // Multiply, Signed * Signed + if(OPN == 1 && OPA != 7) + { + m_icount -= 12; + lres = UNSP_REG_I(OPA) * UNSP_REG_I(OPB); + if(UNSP_REG_I(OPB) & 0x8000) { - if((m_sirq & (1 << i)) != 0 && i != m_curirq) - { - m_sirq &= ~(1 << i); - m_curirq = 0; - execute_set_input(UNSP_IRQ0_LINE + i, 1); - i = -1; - break; - } + lres -= UNSP_REG_I(OPA) << 16; } - if(i != -1) + if(UNSP_REG_I(OPA) & 0x8000) { - m_curirq = 0; + lres -= UNSP_REG_I(OPB) << 16; } - break; + UNSP_REG(R4) = lres >> 16; + UNSP_REG(R3) = (uint16_t)lres; } else { - r0 = OPN; - r1 = OPA; - while(r0--) - { - UNSP_REG_I(++r1) = unsp_pop(&UNSP_REG_I(OPB)); - } + unimplemented_opcode(op); } - break; + continue; - // Push - case 0x2d: - r0 = OPN; - r1 = OPA; - while(r0--) + case 0x05: // Interrupt flags + m_icount -= 2; + switch(OPIMM) { - unsp_push(UNSP_REG_I(r1--), &UNSP_REG_I(OPB)); + case 0: + m_enable_irq = false; + m_enable_fiq = false; + break; + case 1: + m_enable_irq = true; + m_enable_fiq = false; + break; + case 2: + m_enable_irq = false; + m_enable_fiq = true; + break; + case 3: + m_enable_irq = true; + m_enable_fiq = true; + break; + case 8: // irq off + m_enable_irq = false; + break; + case 9: // irq on + m_enable_irq = true; + break; + case 12: // fiq off + m_enable_fiq = false; + break; + case 14: // fiq on + m_enable_fiq = true; + break; + case 37: // nop + break; + default: + unimplemented_opcode(op); + break; } - break; + continue; + + default: + unimplemented_opcode(op); + continue; + } + } + + // At this point, we should be dealing solely with ALU ops. + + r0 = UNSP_REG_I(OPA); + + switch (OP1) + { + case 0x00: // r, [bp+imm6] + m_icount -= 6; + + r2 = UNSP_REG(BP) + OPIMM; + if (OP0 != 0x0d) + r1 = read16(r2); + break; + + case 0x01: // r, imm6 + m_icount -= 2; - // ALU, Indirect - case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x36: case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: - switch(OPN & 3) + r1 = OPIMM; + break; + + case 0x03: // Indirect + { + m_icount -= 6; + if (OPA == 7) + m_icount -= 1; + + const uint8_t lsbits = OPN & 3; + const uint8_t opb = OPB; + if (OPN & 4) + { + switch (lsbits) { case 0: // r, [r] - r0 = UNSP_REG_I(OPA); - r1 = READ16((OPN & 4) ? UNSP_LREG_I(OPB) : UNSP_REG_I(OPB)); - switch(OP0) - { - STANDARD_ALU_CASES; - case 13: // store r, [r] - WRITE16((OPN & 4) ? UNSP_LREG_I(OPB) : UNSP_REG_I(OPB), UNSP_REG_I(OPA)); - break; - default: - unimplemented_opcode(op); - break; - } - WRITEBACK_OPA; + r2 = UNSP_LREG_I(opb); + if (OP0 != 0x0d) + r1 = read16(r2); break; case 1: // r, [<ds:>r--] - r0 = UNSP_REG_I(OPA); - r1 = READ16((OPN & 4) ? UNSP_LREG_I(OPB) : UNSP_REG_I(OPB)); - switch(OP0) - { - STANDARD_ALU_CASES; - case 13: // store r, [<ds:>r--] - WRITE16((OPN & 4) ? UNSP_LREG_I(OPB) : UNSP_REG_I(OPB), UNSP_REG_I(OPA)); - break; - default: - unimplemented_opcode(op); - break; - } - UNSP_REG_I(OPB)--; - WRITEBACK_OPA; + r2 = UNSP_LREG_I(opb); + if (OP0 != 0x0d) + r1 = read16(r2); + UNSP_REG_I(opb)--; + if (UNSP_REG_I(opb) == 0xffff) + UNSP_REG(SR) -= 0x0400; break; case 2: // r, [<ds:>r++] - r0 = UNSP_REG_I(OPA); - r1 = READ16((OPN & 4) ? UNSP_LREG_I(OPB) : UNSP_REG_I(OPB)); - switch(OP0) - { - STANDARD_ALU_CASES; - case 13: // store r, [<ds:>r++] - WRITE16((OPN & 4) ? UNSP_LREG_I(OPB) : UNSP_REG_I(OPB), UNSP_REG_I(OPA)); - break; - default: - unimplemented_opcode(op); - break; - } - UNSP_REG_I(OPB)++; - WRITEBACK_OPA; + r2 = UNSP_LREG_I(opb); + if (OP0 != 0x0d) + r1 = read16(r2); + UNSP_REG_I(opb)++; + if (UNSP_REG_I(opb) == 0x0000) + UNSP_REG(SR) += 0x0400; break; case 3: // r, [<ds:>++r] - UNSP_REG_I(OPB)++; - r0 = UNSP_REG_I(OPA); - r1 = READ16((OPN & 4) ? UNSP_LREG_I(OPB) : UNSP_REG_I(OPB)); - switch(OP0) - { - STANDARD_ALU_CASES; - default: - unimplemented_opcode(op); - break; - } - WRITEBACK_OPA; + UNSP_REG_I(opb)++; + if (UNSP_REG_I(opb) == 0x0000) + UNSP_REG(SR) += 0x0400; + r2 = UNSP_LREG_I(opb); + if (OP0 != 0x0d) + r1 = read16(r2); + break; + default: break; } - break; - - // ALU, 16-bit ops - case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x46: case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: - switch(OPN) + } + else + { + switch (lsbits) { - // r, r - case 0: - r0 = UNSP_REG_I(OPA); - r1 = UNSP_REG_I(OPB); - switch(OP0) - { - STANDARD_ALU_CASES; - default: - unimplemented_opcode(op); - break; - } - WRITEBACK_OPA; + case 0: // r, [r] + r2 = UNSP_REG_I(opb); + if (OP0 != 0x0d) + r1 = read16(r2); break; - - // ALU, 16-bit Immediate - case 1: // r, r, imm16 - if(!((OP0 == 4 || OP0 == 6 || OP0 == 9 || OP0 == 12) && OPA != OPB)) - { - r0 = UNSP_REG_I(OPB); - r1 = READ16(UNSP_LPC); - UNSP_REG(PC)++; - switch(OP0) - { - STANDARD_ALU_CASES; - default: - unimplemented_opcode(op); - break; - } - WRITEBACK_OPA; - } - else - { - unimplemented_opcode(op); - } + case 1: // r, [<ds:>r--] + r2 = UNSP_REG_I(opb); + if (OP0 != 0x0d) + r1 = read16(r2); + UNSP_REG_I(opb)--; break; - - // ALU, Direct 16 - case 2: // r, [imm16] - r0 = UNSP_REG_I(OPB); - r1 = READ16(READ16(UNSP_LPC)); - UNSP_REG(PC)++; - switch(OP0) - { - STANDARD_ALU_CASES; - default: - unimplemented_opcode(op); - break; - } - WRITEBACK_OPA; + case 2: // r, [<ds:>r++] + r2 = UNSP_REG_I(opb); + if (OP0 != 0x0d) + r1 = read16(r2); + UNSP_REG_I(opb)++; break; - - // ALU, Direct 16 - case 3: // [imm16], r - r0 = UNSP_REG_I(OPB); - r1 = UNSP_REG_I(OPA); - switch(OP0) - { - STANDARD_ALU_CASES; - default: - unimplemented_opcode(op); - break; - } - if(OP0 != 4 && OP0 < 12) - { - WRITE16(READ16(UNSP_LPC), (uint16_t)lres); - } - UNSP_REG(PC)++; + case 3: // r, [<ds:>++r] + UNSP_REG_I(opb)++; + r2 = UNSP_REG_I(opb); + if (OP0 != 0x0d) + r1 = read16(r2); break; - - // ALU, Shifted default: - { - uint32_t shift = (UNSP_REG_I(OPB) << 4) | m_sb; - if(shift & 0x80000) - { - shift |= 0xf00000; - } - shift >>= (OPN - 3); - m_sb = shift & 0x0f; - r1 = (shift >> 4) & 0x0000ffff; - - switch(OP0) - { - case 9: // load r, r asr n - unsp_update_nz(r1); - UNSP_REG_I(OPA) = r1; - break; - default: - unimplemented_opcode(op); - break; - } break; - } } - break; - - case 0x4d: - if(OPN == 3) - { - if(OPA == OPB) - { - WRITE16(READ16(UNSP_LPC), UNSP_REG_I(OPB)); - UNSP_REG(PC)++; - } - else - { - unimplemented_opcode(op); - } - } - else - { - unimplemented_opcode(op); - } - break; + } + break; + } - // ALU, Shifted - case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x56: case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: - if(OPN & 4) - { - switch(OP0) - { - case 9: // load r, r >> imm2 - lres = ((UNSP_REG_I(OPB) << 4) | m_sb) >> (OPN - 3); - m_sb = lres & 0x0f; - unsp_update_nz((uint16_t)(lres >> 4)); - UNSP_REG_I(OPA) = (uint16_t)(lres >> 4); - break; - default: - unimplemented_opcode(op); - break; - } - } - else - { - uint32_t shift = ((m_sb << 16) | UNSP_REG_I(OPB)) << (OPN + 1); - m_sb = (shift >> 16) & 0x0f; - r0 = UNSP_REG_I(OPA); - r1 = shift & 0x0000ffff; + case 0x04: // 16-bit ops + switch (OPN) + { + case 0x00: // r + m_icount -= 3; + if (OPA == 7) + m_icount -= 2; - switch(OP0) - { - case 0: // add r, r << imm2 - lres = r0 + r1; - unsp_update_nzsc(lres, r0, r1); - UNSP_REG_I(OPA) = (uint16_t)lres; - break; - case 9: // load r, r << imm2 - lres = r1; - unsp_update_nz(lres); - UNSP_REG_I(OPA) = (uint16_t)lres; - break; - case 10: // or r, r << imm2 - lres = r0 | r1; - unsp_update_nz(lres); - UNSP_REG_I(OPA) = (uint16_t)lres; - break; - default: - unimplemented_opcode(op); - break; - } - } - break; + r1 = UNSP_REG_I(OPB); + break; - // ALU, Rotated - case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x66: case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: - if(OPN & 4) // ROR - { - lres = ((((m_sb << 16) | UNSP_REG_I(OPB)) << 4) | m_sb) >> (OPN - 3); - m_sb = lres & 0x0f; - r1 = (uint16_t)(lres >> 4); - } - else - { - lres = ((((m_sb << 16) | UNSP_REG_I(OPB)) << 4) | m_sb) << (OPN + 1); - m_sb = (lres >> 20) & 0x0f; - r1 = (uint16_t)(lres >> 4); - } + case 0x01: // imm16 + m_icount -= 4; + if (OPA == 7) + m_icount -= 1; - switch(OP0) - { - case 9: // load r, r ror imm2 - unsp_update_nz(r1); - UNSP_REG_I(OPA) = r1; - break; - default: - unimplemented_opcode(op); - break; - } - break; + r0 = UNSP_REG_I(OPB); + r1 = read16(UNSP_LPC); + UNSP_REG(PC)++; + break; - // ALU, Direct 8 - case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x76: case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: - //print("%s %s, [%02x]", alu[OP0], reg[OPA], OPIMM); - unimplemented_opcode(op); - break; + case 0x02: // [imm16] + m_icount -= 7; + if (OPA == 7) + m_icount -= 1; - // Call - case 0x1f: - if(OPA == 0) - { - r1 = READ16(UNSP_LPC); + r0 = UNSP_REG_I(OPB); + r2 = read16(UNSP_LPC); UNSP_REG(PC)++; - unsp_push(UNSP_REG(PC), &UNSP_REG(SP)); - unsp_push(UNSP_REG(SR), &UNSP_REG(SP)); - UNSP_REG(PC) = r1; - UNSP_REG(SR) &= 0xffc0; - UNSP_REG(SR) |= OPIMM; - } - else - { - unimplemented_opcode(op); - } - break; - - // Far Jump - case 0x2f: case 0x3f: case 0x6f: case 0x7f: - if (OPA == 7 && OP1 == 2) - { - UNSP_REG(PC) = READ16(UNSP_LPC); - UNSP_REG(SR) &= 0xffc0; - UNSP_REG(SR) |= OPIMM; - } - break; - // Multiply, Unsigned * Signed - case 0x0f: - if(OPN == 1 && OPA != 7) - { - lres = UNSP_REG_I(OPA) * UNSP_REG_I(OPB); - if(UNSP_REG_I(OPB) & 0x8000) + if (OP0 != 0x0d) { - lres -= UNSP_REG_I(OPA) << 16; + r1 = read16(r2); } - UNSP_REG(R4) = lres >> 16; - UNSP_REG(R3) = (uint16_t)lres; break; - } - else - { - unimplemented_opcode(op); - } - break; - // Multiply, Signed * Signed - case 0x4f: - if(OPN == 1 && OPA != 7) - { - lres = UNSP_REG_I(OPA) * UNSP_REG_I(OPB); - if(UNSP_REG_I(OPB) & 0x8000) - { - lres -= UNSP_REG_I(OPA) << 16; - } - if(UNSP_REG_I(OPA) & 0x8000) - { - lres -= UNSP_REG_I(OPB) << 16; - } - UNSP_REG(R4) = lres >> 16; - UNSP_REG(R3) = (uint16_t)lres; + case 0x03: // store [imm16], r + m_icount -= 7; + if (OPA == 7) + m_icount -= 1; + + r1 = r0; + r0 = UNSP_REG_I(OPB); + r2 = read16(UNSP_LPC); + UNSP_REG(PC)++; break; - } - else - { - unimplemented_opcode(op); - } - break; - // Interrupt flags - case 0x5f: - if(OPA == 0) - { - switch(OPIMM) - { - case 0: - m_irq &= ~1; - m_fiq &= ~1; - break; - case 1: - m_irq |= 1; - m_fiq &= ~1; - break; - case 2: - m_irq &= ~1; - m_fiq |= 1; - break; - case 3: - m_irq |= 1; - m_fiq |= 1; - break; - case 8: // irq off - m_irq &= ~1; - break; - case 9: // irq on - m_irq |= 1; - break; - case 12: // fiq off - m_fiq &= ~1; - break; - case 13: // fiq on - m_fiq |= 1; - break; - case 37: // nop - break; - } - } - else + default: // Shifted ops { - unimplemented_opcode(op); + m_icount -= 3; + if (OPA == 7) + m_icount -= 2; + + uint32_t shift = (UNSP_REG_I(OPB) << 4) | m_sb; + if (shift & 0x80000) + shift |= 0xf00000; + shift >>= (OPN - 3); + m_sb = shift & 0x0f; + r1 = (uint16_t)(shift >> 4); + break; } - break; + } + break; + + case 0x05: // More shifted ops + m_icount -= 3; + if (OPA == 7) + m_icount -= 2; + + if (OPN & 4) // Shift right + { + const uint32_t shift = ((UNSP_REG_I(OPB) << 4) | m_sb) >> (OPN - 3); + m_sb = shift & 0x0f; + r1 = (uint16_t)(shift >> 4); + } + else // Shift left + { + const uint32_t shift = ((m_sb << 16) | UNSP_REG_I(OPB)) << (OPN + 1); + m_sb = (shift >> 16) & 0x0f; + r1 = (uint16_t)shift; + } + break; + + case 0x06: // Rotated ops + { + m_icount -= 3; + if (OPA == 7) + m_icount -= 2; + + uint32_t shift = (((m_sb << 16) | UNSP_REG_I(OPB)) << 4) | m_sb; + if (OPN & 4) // Rotate right + { + shift >>= (OPN - 3); + m_sb = shift & 0x0f; + } + else + { + shift <<= (OPN + 1); + m_sb = (shift >> 20) & 0x0f; + } + r1 = (uint16_t)(shift >> 4); + break; } + + case 0x07: // Direct 8 + m_icount -= 5; + if (OPA == 7) + m_icount -= 1; + + r1 = read16(OPIMM); + break; + + default: + break; } - m_icount -= 5; - m_icount = std::max(m_icount, 0); + switch (OP0) + { + case 0x00: // Add + lres = r0 + r1; + break; + case 0x01: // Add w/ carry + lres = r0 + r1; + if(UNSP_REG(SR) & UNSP_C) + lres++; + break; + case 0x02: // Subtract + case 0x04: // Compare + lres = r0 + (uint16_t)(~r1) + 1; + break; + case 0x03: // Subtract w/ carry + lres = r0 + (uint16_t)(~r1); + if(UNSP_REG(SR) & UNSP_C) + lres++; + break; + case 0x06: // Negate + lres = -r1; + break; + case 0x08: // XOR + lres = r0 ^ r1; + break; + case 0x09: // Load + lres = r1; + break; + case 0x0a: // OR + lres = r0 | r1; + break; + case 0x0b: // AND + case 0x0c: // Test + lres = r0 & r1; + break; + case 0x0d: // Store + write16(r2, r0); + continue; + default: + unimplemented_opcode(op); + continue; + } + + if (OP0 != 0x0d && OPA != 0x07) // If not a store opcode and not updating the PC, update negative/zero flags. + update_nz(lres); + + if (OP0 < 0x05 && OPA != 0x07) // If Add, Add w/ Carry, Subtract, Subtract w/ Carry, Compare, and not updating the PC, update sign/carry flags. + update_sc(lres, r0, r1); + + if (OP0 == 0x04 || OP0 == 0x0c) // Compare and Test don't write back results. + continue; + + if (OP1 == 0x04 && OPN == 0x03) // store [imm16], r + write16(r2, lres); + else + UNSP_REG_I(OPA) = lres; } } @@ -812,8 +874,6 @@ void unsp_device::execute_run() void unsp_device::execute_set_input(int irqline, int state) { - uint16_t irq_vector = 0; - m_sirq &= ~(1 << irqline); if(!state) @@ -831,40 +891,10 @@ void unsp_device::execute_set_input(int irqline, int state) case UNSP_IRQ5_LINE: case UNSP_IRQ6_LINE: case UNSP_IRQ7_LINE: - if(m_fiq & 2) - { - // FIQ is being serviced, ignore this IRQ trigger. - m_sirq |= state << irqline; - return; - } - if(m_irq != 1) - { - // IRQ is disabled, ignore this IRQ trigger. - m_sirq |= state << irqline; - return; - } - m_irq |= 2; - m_curirq |= (1 << irqline); - irq_vector = 0xfff8 + (irqline - UNSP_IRQ0_LINE); - break; case UNSP_FIQ_LINE: - if(m_fiq != 1) - { - // FIQ is disabled, ignore this FIQ trigger. - m_sirq |= state << irqline; - return; - } - m_fiq |= 2; - m_curirq |= (1 << irqline); - irq_vector = 0xfff6; + m_sirq |= (1 << irqline); break; case UNSP_BRK_LINE: break; } - - m_saved_sb = m_sb; - unsp_push(UNSP_REG(PC), &UNSP_REG(SP)); - unsp_push(UNSP_REG(SR), &UNSP_REG(SP)); - UNSP_REG(PC) = READ16(irq_vector); - UNSP_REG(SR) = 0; } diff --git a/src/devices/cpu/unsp/unsp.h b/src/devices/cpu/unsp/unsp.h index 9131cf8b983..b7bada4045a 100644 --- a/src/devices/cpu/unsp/unsp.h +++ b/src/devices/cpu/unsp/unsp.h @@ -1,12 +1,12 @@ // license:BSD-3-Clause // copyright-holders:Ryan Holtz -/**************************\ -* -* SunPlus u'nSP emulator -* -* by Ryan Holtz -* -\**************************/ +/***************************************************************************** + + SunPlus micro'nSP core + + based primarily on Unununium, by segher + +*****************************************************************************/ #ifndef MAME_CPU_UNSP_UNSP_H #define MAME_CPU_UNSP_UNSP_H @@ -26,6 +26,8 @@ enum UNSP_GPR_COUNT = UNSP_PC, + UNSP_IRQ_EN, + UNSP_FIQ_EN, UNSP_IRQ, UNSP_FIQ, UNSP_SB @@ -34,7 +36,8 @@ enum enum { - UNSP_IRQ0_LINE = 0, + UNSP_FIQ_LINE = 0, + UNSP_IRQ0_LINE, UNSP_IRQ1_LINE, UNSP_IRQ2_LINE, UNSP_IRQ3_LINE, @@ -42,7 +45,6 @@ enum UNSP_IRQ5_LINE, UNSP_IRQ6_LINE, UNSP_IRQ7_LINE, - UNSP_FIQ_LINE, UNSP_BRK_LINE, UNSP_NUM_LINES @@ -73,6 +75,7 @@ protected: // device_state_interface overrides virtual void state_import(const device_state_entry &entry) override; virtual void state_export(const device_state_entry &entry) override; + virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; // device_disasm_interface overrides virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; @@ -81,12 +84,14 @@ private: address_space_config m_program_config; uint16_t m_r[16]; - uint8_t m_irq; - uint8_t m_fiq; + bool m_enable_irq; + bool m_enable_fiq; + bool m_irq; + bool m_fiq; uint16_t m_curirq; uint16_t m_sirq; uint8_t m_sb; - uint8_t m_saved_sb; + uint8_t m_saved_sb[3]; address_space *m_program; int m_icount; @@ -94,14 +99,15 @@ private: uint32_t m_debugger_temp; void unimplemented_opcode(uint16_t op); - inline uint16_t READ16(uint32_t address); - inline void WRITE16(uint32_t address, uint16_t data); - inline void unsp_update_nz(uint32_t value); - inline void unsp_update_nzsc(uint32_t value, uint16_t r0, uint16_t r1); - inline void unsp_push(uint16_t value, uint16_t *reg); - inline uint16_t unsp_pop(uint16_t *reg); - - + inline uint16_t read16(uint32_t address); + inline void write16(uint32_t address, uint16_t data); + inline void update_nz(uint32_t value); + inline void update_sc(uint32_t value, uint16_t r0, uint16_t r1); + inline void push(uint16_t value, uint16_t *reg); + inline uint16_t pop(uint16_t *reg); + inline void trigger_fiq(); + inline void trigger_irq(int line); + inline void check_irqs(); }; diff --git a/src/devices/cpu/unsp/unspdasm.cpp b/src/devices/cpu/unsp/unspdasm.cpp index b814c168853..861670fb889 100644 --- a/src/devices/cpu/unsp/unspdasm.cpp +++ b/src/devices/cpu/unsp/unspdasm.cpp @@ -1,18 +1,14 @@ // license:BSD-3-Clause // copyright-holders:Ryan Holtz -/**************************\ -* -* SunPlus u'nSP disassembler -* -* by Ryan Holtz -* -\**************************/ +/***************************************************************************** + + SunPlus micro'nSP disassembler + +*****************************************************************************/ #include "emu.h" #include "unspdasm.h" -/*****************************************************************************/ - char const *const unsp_disassembler::reg[] = { "sp", "r1", "r2", "r3", "r4", "bp", "sr", "pc" @@ -187,7 +183,7 @@ offs_t unsp_disassembler::disassemble(std::ostream &stream, offs_t pc, const dat // Call case 0x1f: if(OPA == 0) - util::stream_format(stream, "call %06x", ((OPIMM << 16) | imm16) << 1); + util::stream_format(stream, "call %06x", (OPIMM << 16) | imm16); else util::stream_format(stream, "<inv>"); return UNSP_DASM_OK; @@ -195,7 +191,7 @@ offs_t unsp_disassembler::disassemble(std::ostream &stream, offs_t pc, const dat // Far Jump case 0x2f: case 0x3f: case 0x6f: case 0x7f: if (OPA == 7 && OP1 == 2) - util::stream_format(stream, "goto %06x", ((OPIMM << 16) | imm16) << 1); + util::stream_format(stream, "goto %06x", (OPIMM << 16) | imm16); else util::stream_format(stream, "<inv>"); return UNSP_DASM_OK; diff --git a/src/devices/cpu/unsp/unspdasm.h b/src/devices/cpu/unsp/unspdasm.h index 303cc369a8f..3a88e525be7 100644 --- a/src/devices/cpu/unsp/unspdasm.h +++ b/src/devices/cpu/unsp/unspdasm.h @@ -1,13 +1,10 @@ // license:BSD-3-Clause // copyright-holders:Ryan Holtz -/**************************\ -* -* SunPlus u'nSP disassembler -* -* by Ryan Holtz -* -\**************************/ +/***************************************************************************** + SunPlus micro'nSP disassembler + +*****************************************************************************/ #ifndef MAME_CPU_UNSP_UNSPDASM_H #define MAME_CPU_UNSP_UNSPDASM_H diff --git a/src/devices/cpu/z8/z8dasm.cpp b/src/devices/cpu/z8/z8dasm.cpp index a832dab8fe9..35d18fab880 100644 --- a/src/devices/cpu/z8/z8dasm.cpp +++ b/src/devices/cpu/z8/z8dasm.cpp @@ -116,7 +116,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x07: mnemonic("ADD"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0x08: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x09: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x0a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x0a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x0b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x0c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x0d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -133,7 +133,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x17: mnemonic("ADC"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0x18: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x19: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x1a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x1a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x1b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x1c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x1d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -150,7 +150,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x27: mnemonic("SUB"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0x28: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x29: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x2a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x2a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x2b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x2c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x2d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -158,7 +158,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x2f: illegal; break; case 0x30: mnemonic("JP"); arg_IRR(B0); bytes(2); break; - case 0x31: mnemonic("SRP"); arg_IM(B0); bytes(2); break; + case 0x31: mnemonic("SRP"); arg_IM(B0); bytes(2); break; case 0x32: mnemonic("SBC"); arg_r(B0H); arg_r(B0L); bytes(2); break; case 0x33: mnemonic("SBC"); arg_r(B0H); arg_Ir(B0L); bytes(2); break; case 0x34: mnemonic("SBC"); arg_R(B1); arg_R(B0); bytes(3); break; @@ -167,7 +167,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x37: mnemonic("SBC"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0x38: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x39: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x3a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x3a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x3b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x3c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x3d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -184,7 +184,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x47: mnemonic("OR"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0x48: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x49: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x4a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x4a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x4b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x4c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x4d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -201,7 +201,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x57: mnemonic("AND"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0x58: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x59: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x5a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x5a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x5b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x5c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x5d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -218,7 +218,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x67: mnemonic("TCM"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0x68: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x69: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x6a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x6a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x6b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x6c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x6d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -235,7 +235,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x77: mnemonic("TM"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0x78: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x79: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x7a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x7a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x7b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x7c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x7d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -252,7 +252,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x87: illegal; break; case 0x88: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x89: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x8a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x8a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x8b: mnemonic("JR"); arg_RA; bytes(2); break; case 0x8c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x8d: mnemonic("JP"); arg_DA; bytes(3); break; @@ -269,7 +269,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x97: illegal; break; case 0x98: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x99: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x9a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x9a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x9b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x9c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x9d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -286,7 +286,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0xa7: mnemonic("CP"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0xa8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0xa9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0xaa: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0xaa: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0xab: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0xac: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0xad: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -303,7 +303,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0xb7: mnemonic("XOR"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0xb8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0xb9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0xba: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0xba: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0xbb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0xbc: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0xbd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -320,7 +320,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0xc7: mnemonic("LD"); arg_r(B0H); arg_X(B1, B0L); bytes(3); break; case 0xc8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0xc9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0xca: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0xca: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0xcb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0xcc: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0xcd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -337,7 +337,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0xd7: mnemonic("LD"); arg_r(B0L); arg_X(B1, B0H); bytes(3); break; case 0xd8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0xd9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0xda: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0xda: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0xdb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0xdc: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0xdd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -354,7 +354,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0xe7: mnemonic("LD"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0xe8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0xe9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0xea: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0xea: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0xeb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0xec: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0xed: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -371,7 +371,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0xf7: illegal; break; case 0xf8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0xf9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0xfa: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0xfa: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0xfb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0xfc: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0xfd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; diff --git a/src/devices/machine/6840ptm.cpp b/src/devices/machine/6840ptm.cpp index b98cad197af..bf1e6f4adb1 100644 --- a/src/devices/machine/6840ptm.cpp +++ b/src/devices/machine/6840ptm.cpp @@ -136,7 +136,10 @@ void ptm6840_device::device_reset() m_status_read_since_int = 0; m_irq = 0; m_t3_scaler = 0; - m_hightime = false; + m_hightime[0] = false; + m_hightime[1] = false; + m_hightime[2] = false; + for (int i = 0; i < 3; i++) { m_counter[i] = 0xffff; @@ -185,7 +188,7 @@ void ptm6840_device::subtract_from_counter(int counter, int count) msb--; // If MSB goes less than zero, we've expired - if ((msb == 0 && !m_hightime) || (msb < 0 && m_hightime)) + if ((msb == 0 && !m_hightime[counter]) || (msb < 0 && m_hightime[counter])) { timeout(counter); msb = (m_latch[counter] >> 8) + 1; @@ -224,7 +227,7 @@ void ptm6840_device::subtract_from_counter(int counter, int count) if (m_control_reg[counter] & COUNT_MODE_8BIT) { /* In dual 8 bit mode, let the counter fire when MSB == 0 */ - m_hightime = !(clks & 0xff00); + m_hightime[counter] = !(clks & 0xff00); clks &= 0xff00; } @@ -349,7 +352,7 @@ void ptm6840_device::reload_count(int idx) // Copy the latched value in m_counter[idx] = m_latch[idx]; - m_hightime = false; + // If reset is held, don't start counting if (m_control_reg[0] & RESET_TIMERS) return; @@ -370,10 +373,11 @@ void ptm6840_device::reload_count(int idx) int count = m_counter[idx]; if (m_control_reg[idx] & COUNT_MODE_8BIT) { - if (m_hightime) + if (m_hightime[idx]) count = 0xff; else count = ((count >> 8) + 1) * ((count & 0xff) + 1); + } else { @@ -521,7 +525,7 @@ WRITE8_MEMBER( ptm6840_device::write ) { m_timer[i]->enable(false); m_enabled[i] = 0; - m_hightime = false; + m_hightime[idx] = false; } } // Releasing reset @@ -529,6 +533,7 @@ WRITE8_MEMBER( ptm6840_device::write ) { for (int i = 0; i < 3; i++) { + m_hightime[idx] = false; reload_count(i); } } @@ -540,6 +545,7 @@ WRITE8_MEMBER( ptm6840_device::write ) // Changing the clock source? (e.g. Zwackery) if (diffs & INTERNAL_CLK_EN) { + m_hightime[idx] = false; reload_count(idx); } break; @@ -568,6 +574,7 @@ WRITE8_MEMBER( ptm6840_device::write ) // Reload the count if in an appropriate mode if (!(m_control_reg[idx] & 0x10) || (m_control_reg[0] & RESET_TIMERS)) { + m_hightime[idx] = false; reload_count(idx); } @@ -597,10 +604,11 @@ void ptm6840_device::timeout(int idx) { case 0: case 2: + if (m_control_reg[idx] & COUNT_MODE_8BIT) { - m_hightime = !m_hightime; - m_output[idx] = m_hightime; + m_hightime[idx] = !m_hightime[idx]; + m_output[idx] = m_hightime[idx]; m_out_cb[idx](m_output[idx]); } else @@ -645,6 +653,7 @@ void ptm6840_device::set_gate(int idx, int state) { if (state == 0 && m_gate[idx]) { + m_hightime[idx] = false; reload_count(idx); } } diff --git a/src/devices/machine/6840ptm.h b/src/devices/machine/6840ptm.h index 5cb6b2a9711..ad5859b771b 100644 --- a/src/devices/machine/6840ptm.h +++ b/src/devices/machine/6840ptm.h @@ -129,7 +129,7 @@ private: static const char *const opmode[]; // set in dual 8 bit mode to indicate Output high time cycle - bool m_hightime; + bool m_hightime[3]; }; diff --git a/src/devices/machine/at_keybc.cpp b/src/devices/machine/at_keybc.cpp index 1c98e8cd43b..aec9154a38f 100644 --- a/src/devices/machine/at_keybc.cpp +++ b/src/devices/machine/at_keybc.cpp @@ -1,214 +1,405 @@ // license:BSD-3-Clause -// copyright-holders:Wilbert Pol +// copyright-holders:Vas Crabb /*************************************************************************** - IBM PC AT compatibles 8042 keyboard controller + IBM PC/AT and PS/2 keyboard controllers + + IBM used Intel UPI-41 microcontrollers to implement bidirectional + keyboard communication from the PC/AT and PS/2. On the PS/2, the + microcontroller also handles mouse communication. The PS/2 host + interface to the keyboard/mouse controller is backwards-compatible + for documented commands. However a number of undocumented commands + are no longer implemented, the pin assignments are different, and + interrupt outputs are latched externally using a 74ALS74 at ZM87. + + PC/AT I/O pin assignments: + P10: NC no connection + P11: NC no connection + P12: NC no connection + P13: NC no connection + P14: -RAM SEL enable external RAM low disables + P15: manufacturing setting low disables + P16: SW1 CRT adapter switch low for CGA + P17: +KBD INH inhibit keyboard active low + P20: RC reset CPU active low + P21: A20 GATE enable A20 line active high + P22: NC no connection + P23: NC no connection + P24: +OPT BUF FULL output buffer full active high + P25: NC no connection + P26: open collector KBD CLK inverted + P27: open collector KBD DATA not inverted + TEST0: KBD CLK not inverted + TEST1: KBD DATA not inverted + + PS/2 I/O pin assignments + P10: KYBD DATA not inverted + P11: MOUSE DATA not inverted + P12: keyboard/mouse power fuse low if blown + P13: no connection + P14: no connection + P15: no connection + P16: no connection + P17: no connection + P20: +HOT RES reset CPU inverted + P21: A20 PASS enable A20 line not inverted + P22: open collector MOUSE DATA inverted + P23: open collector MOUSE CLK inverted + P24: latched as BIRQ1 rising trigger + P25: latched as IRQ12 rising trigger + P26: open collector KYBD CLK inverted + P27: open collector KYBD DATA inverted + TEST0: KYBD CLK not inverted + TEST1: MOUSE CLK not inverted + + Notes: + * PS/2 BIRQ1 and IRQ12 are cleard by reading data. + * PS/2 BIRQ1 and IRQ12 are active low, but we use ASSERT_LINE here. + * PS/2 IRQ12 is open collector for sharing with cards. + + TODO: + * Move display type and key lock controls to drivers. + * Expose power fuse failure. ***************************************************************************/ #include "emu.h" #include "at_keybc.h" +namespace { -//************************************************************************** -// GLOBAL VARIABLES -//************************************************************************** +ROM_START(at_kbc) + ROM_REGION(0x0800, "mcu", 0) + ROM_SYSTEM_BIOS(0, "ibm", "IBM 1983") // 1983 IBM controller BIOS + ROMX_LOAD("1503033.bin", 0x0000, 0x0800, CRC(5a81c0d2) SHA1(0100f8789fb4de74706ae7f9473a12ec2b9bd729), ROM_BIOS(0)) + ROM_SYSTEM_BIOS(1, "ptl", "PTL 1986") // unknown controller BIOS, (c) 1985, 1986 PTL + ROMX_LOAD("yan25d05.bin", 0x0000, 0x0800, CRC(70c798f1) SHA1(ae9a79c7184a17331b70a50035ff63c757df094c), ROM_BIOS(1)) +ROM_END -DEFINE_DEVICE_TYPE(AT_KEYBOARD_CONTROLLER, at_keyboard_controller_device, "at_keybc", "AT Keyboard Controller") +ROM_START(ps2_kbc) + ROM_REGION(0x0800, "mcu", 0) + ROM_LOAD("72x8455.zm82", 0x0000, 0x0800, CRC(7da223d3) SHA1(54c52ff6c6a2310f79b2c7e6d1259be9de868f0e)) +ROM_END -static INPUT_PORTS_START( at_keybc ) - PORT_START("DSW") - PORT_BIT( 0xbf, 0xbf, IPT_UNUSED ) - PORT_DIPNAME( 0x40, 0x00, "Display switch") - PORT_DIPSETTING( 0x40, "Monochrome adapter" ) - PORT_DIPSETTING( 0x00, "Color/Graphics adapter" ) +INPUT_PORTS_START(at_kbc) + PORT_START("P1") + PORT_BIT(0x3f, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_CONFNAME(0x40, 0x00, "CRT Adapter Switch") + PORT_CONFSETTING( 0x40, "Monochrome Display Adapter") + PORT_CONFSETTING( 0x00, "Color Graphics Adapter") + PORT_CONFNAME(0x80, 0x80, "Key Lock") + PORT_CONFSETTING( 0x80, DEF_STR(Off)) + PORT_CONFSETTING( 0x00, DEF_STR(On)) INPUT_PORTS_END -// rom definition for the 8042 internal rom -ROM_START( at_keybc ) - ROM_REGION(0x800, "at_keybc", 0) +} // anonymous namespace - // unknown controller bios, (c) 1985, 1986 PTL - ROM_LOAD("yan25d05.bin", 0x000, 0x800, CRC(70c798f1) SHA1(ae9a79c7184a17331b70a50035ff63c757df094c)) - // 1983 ibm controller bios - ROM_LOAD("1503033.bin", 0x000, 0x800, CRC(5a81c0d2) SHA1(0100f8789fb4de74706ae7f9473a12ec2b9bd729)) -ROM_END //************************************************************************** -// LIVE DEVICE +// DEVICE TYPES //************************************************************************** -//------------------------------------------------- -// at_keyboard_controller_device - constructor -//------------------------------------------------- +DEFINE_DEVICE_TYPE(AT_KEYBOARD_CONTROLLER, at_keyboard_controller_device, "at_keybc", "PC/AT Keyboard Controller") +DEFINE_DEVICE_TYPE(PS2_KEYBOARD_CONTROLLER, ps2_keyboard_controller_device, "ps2_keybc", "PS/2 Keyboard/Mouse Controller") + -at_keyboard_controller_device::at_keyboard_controller_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, AT_KEYBOARD_CONTROLLER, tag, owner, clock), - m_cpu(nullptr), - m_system_reset_cb(*this), - m_gate_a20_cb(*this), - m_input_buffer_full_cb(*this), - m_output_buffer_empty_cb(*this), - m_keyboard_clock_cb(*this), - m_keyboard_data_cb(*this) +//************************************************************************** +// KEYBOARD CONTROLLER DEVICE BASE +//************************************************************************** + +READ8_MEMBER(at_kbc_device_base::data_r) { + return m_mcu->upi41_master_r(space, 0U); } -//------------------------------------------------- -// rom_region - return a pointer to the device's -// internal ROM region -//------------------------------------------------- +READ8_MEMBER(at_kbc_device_base::status_r) +{ + return m_mcu->upi41_master_r(space, 1U); +} -const tiny_rom_entry *at_keyboard_controller_device::device_rom_region() const +WRITE8_MEMBER(at_kbc_device_base::data_w) { - return ROM_NAME(at_keybc); + machine().scheduler().synchronize(timer_expired_delegate(FUNC(at_kbc_device_base::write_data), this), unsigned(data)); } -//------------------------------------------------- -// input_ports - device-specific input ports -//------------------------------------------------- +WRITE8_MEMBER(at_kbc_device_base::command_w) +{ + machine().scheduler().synchronize(timer_expired_delegate(FUNC(at_kbc_device_base::write_command), this), unsigned(data)); +} -ioport_constructor at_keyboard_controller_device::device_input_ports() const +WRITE_LINE_MEMBER(at_kbc_device_base::kbd_clk_w) { - return INPUT_PORTS_NAME( at_keybc ); + machine().scheduler().synchronize(timer_expired_delegate(FUNC(at_kbc_device_base::set_kbd_clk_in), this), state); } -//------------------------------------------------- -// device_add_mconfig - add device configuration -//------------------------------------------------- +WRITE_LINE_MEMBER(at_kbc_device_base::kbd_data_w) +{ + machine().scheduler().synchronize(timer_expired_delegate(FUNC(at_kbc_device_base::set_kbd_data_in), this), state); +} -MACHINE_CONFIG_START(at_keyboard_controller_device::device_add_mconfig) - MCFG_DEVICE_ADD("at_keybc", I8042, DERIVED_CLOCK(1,1)) - MCFG_MCS48_PORT_T0_IN_CB(READLINE(*this, at_keyboard_controller_device, t0_r)) - MCFG_MCS48_PORT_T1_IN_CB(READLINE(*this, at_keyboard_controller_device, t1_r)) - MCFG_MCS48_PORT_P1_IN_CB(READ8(*this, at_keyboard_controller_device, p1_r)) - MCFG_MCS48_PORT_P2_IN_CB(READ8(*this, at_keyboard_controller_device, p2_r)) - MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(*this, at_keyboard_controller_device, p2_w)) -MACHINE_CONFIG_END +at_kbc_device_base::at_kbc_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock) + : device_t(mconfig, type, tag, owner, clock) + , m_mcu(*this, "mcu") + , m_hot_res_cb(*this), m_gate_a20_cb(*this), m_kbd_irq_cb(*this) + , m_kbd_clk_cb(*this), m_kbd_data_cb(*this) + , m_hot_res(0U), m_gate_a20(0U), m_kbd_irq(0U) + , m_kbd_clk_in(1U), m_kbd_clk_out(1U), m_kbd_data_in(1U), m_kbd_data_out(1U) +{ +} -/*------------------------------------------------- - device_start - device-specific startup --------------------------------------------------*/ +void at_kbc_device_base::device_resolve_objects() +{ + m_hot_res_cb.resolve_safe(); + m_gate_a20_cb.resolve_safe(); + m_kbd_irq_cb.resolve_safe(); + m_kbd_clk_cb.resolve_safe(); + m_kbd_data_cb.resolve_safe(); +} -void at_keyboard_controller_device::device_start() +void at_kbc_device_base::device_start() { - // find our cpu - m_cpu = downcast<upi41_cpu_device *>(subdevice("at_keybc")); + save_item(NAME(m_hot_res)); + save_item(NAME(m_gate_a20)); + save_item(NAME(m_kbd_irq)); + save_item(NAME(m_kbd_clk_in)); + save_item(NAME(m_kbd_clk_out)); + save_item(NAME(m_kbd_data_in)); + save_item(NAME(m_kbd_data_out)); + + m_hot_res = m_gate_a20 = m_kbd_irq = 0U; + m_kbd_clk_in = m_kbd_clk_out = 1U; + m_kbd_data_in = m_kbd_data_out = 1U; +} - // resolve callbacks - m_system_reset_cb.resolve_safe(); - m_gate_a20_cb.resolve_safe(); - m_input_buffer_full_cb.resolve_safe(); - m_output_buffer_empty_cb.resolve_safe(); - m_keyboard_clock_cb.resolve_safe(); - m_keyboard_data_cb.resolve_safe(); +inline void at_kbc_device_base::set_hot_res(u8 state) +{ + if (state != m_hot_res) + m_hot_res_cb((m_hot_res = state) ? ASSERT_LINE : CLEAR_LINE); +} - // register for save states - save_item(NAME(m_clock_signal)); - save_item(NAME(m_data_signal)); +inline void at_kbc_device_base::set_gate_a20(u8 state) +{ + if (state != m_gate_a20) + m_gate_a20_cb((m_gate_a20 = state) ? ASSERT_LINE : CLEAR_LINE); } -/*------------------------------------------------- - device_reset - device-specific reset --------------------------------------------------*/ +inline void at_kbc_device_base::set_kbd_irq(u8 state) +{ + if (state != m_kbd_irq) + m_kbd_irq_cb((m_kbd_irq = state) ? ASSERT_LINE : CLEAR_LINE); +} -void at_keyboard_controller_device::device_reset() +inline void at_kbc_device_base::set_kbd_clk_out(u8 state) { + if (state != m_kbd_clk_out) + m_kbd_clk_cb(m_kbd_clk_out = state); } +inline void at_kbc_device_base::set_kbd_data_out(u8 state) +{ + if (state != m_kbd_data_out) + m_kbd_data_cb(m_kbd_data_out = state); +} -//************************************************************************** -// INTERNAL 8042 READ/WRITE HANDLERS -//************************************************************************** +inline u8 at_kbc_device_base::kbd_clk_r() const +{ + return m_kbd_clk_in & m_kbd_clk_out; +} + +inline u8 at_kbc_device_base::kbd_data_r() const +{ + return m_kbd_data_in & m_kbd_data_out; +} + +TIMER_CALLBACK_MEMBER(at_kbc_device_base::write_data) +{ + m_mcu->upi41_master_w(machine().dummy_space(), 0U, u8(u32(param))); +} + +TIMER_CALLBACK_MEMBER(at_kbc_device_base::write_command) +{ + m_mcu->upi41_master_w(machine().dummy_space(), 1U, u8(u32(param))); +} -READ_LINE_MEMBER( at_keyboard_controller_device::t0_r ) +TIMER_CALLBACK_MEMBER(at_kbc_device_base::set_kbd_clk_in) { - return m_clock_signal; + m_kbd_clk_in = param ? 1U : 0U; } -READ_LINE_MEMBER( at_keyboard_controller_device::t1_r ) +TIMER_CALLBACK_MEMBER(at_kbc_device_base::set_kbd_data_in) { - return m_data_signal; + m_kbd_data_in = param ? 1U : 0U; } -/* - Port 1 (Input port) - 0 - P10 - Undefined - 1 - P11 - Undefined - 2 - P12 - Undefined - 3 - P13 - Undefined - 4 - P14 - External RAM (1 = Enable external RAM, 0 = Disable external RAM) - 5 - P15 - Manufacturing setting (1 = Setting enabled, 0 = Setting disabled) - 6 - P16 - Display type switch (1 = Monochrome display, 0 = Color display) - 7 - P17 - Keyboard inhibit switch (1 = Keyboard enabled, 0 = Keyboard inhibited) -*/ -READ8_MEMBER( at_keyboard_controller_device::p1_r ) + +//************************************************************************** +// PC/AT KEYBOARD CONTROLLER DEVICE +//************************************************************************** + +at_keyboard_controller_device::at_keyboard_controller_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) + : at_kbc_device_base(mconfig, AT_KEYBOARD_CONTROLLER, tag, owner, clock) { - return ioport("DSW")->read(); } -READ8_MEMBER( at_keyboard_controller_device::p2_r ) +tiny_rom_entry const *at_keyboard_controller_device::device_rom_region() const { - return 0xff; + return ROM_NAME(at_kbc); } -/* - Port 2 (Output port) - 0 - P20 - System Reset (1 = Normal, 0 = Reset computer) - 1 - P21 - Gate A20 - 2 - P22 - Undefined - 3 - P23 - Undefined - 4 - P24 - Input Buffer Full - 5 - P25 - Output Buffer Empty - 6 - P26 - Keyboard Clock (1 = Pull Clock low, 0 = High-Z) - 7 - P27 - Keyboard Data (1 = Pull Data low, 0 = High-Z) -*/ -WRITE8_MEMBER( at_keyboard_controller_device::p2_w ) +void at_keyboard_controller_device::device_add_mconfig(machine_config &config) { - m_system_reset_cb(BIT(data, 0) ? CLEAR_LINE : ASSERT_LINE); - m_gate_a20_cb(BIT(data, 1) ? ASSERT_LINE : CLEAR_LINE); - m_input_buffer_full_cb(BIT(data, 4) ? ASSERT_LINE : CLEAR_LINE); - m_output_buffer_empty_cb(BIT(data, 5) ? ASSERT_LINE : CLEAR_LINE); + I8042(config, m_mcu, DERIVED_CLOCK(1, 1)); + m_mcu->p1_in_cb().set_ioport("P1"); + m_mcu->p1_out_cb().set_nop(); + m_mcu->p2_in_cb().set_constant(0xffU); + m_mcu->p2_out_cb().set(FUNC(at_keyboard_controller_device::p2_w)); + m_mcu->t0_in_cb().set([this] () { return kbd_clk_r(); }); + m_mcu->t1_in_cb().set([this] () { return kbd_data_r(); }); +} - m_clock_signal = !BIT(data, 6); - m_data_signal = BIT(data, 7); +ioport_constructor at_keyboard_controller_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(at_kbc); +} - m_keyboard_data_cb(m_data_signal); - m_keyboard_clock_cb(m_clock_signal); +WRITE8_MEMBER(at_keyboard_controller_device::p2_w) +{ + set_hot_res(BIT(~data, 0)); + set_gate_a20(BIT(data, 1)); + set_kbd_irq(BIT(data, 4)); + set_kbd_clk_out(BIT(~data, 6)); + set_kbd_data_out(BIT(data, 7)); } //************************************************************************** -// READ/WRITE HANDLERS +// PS/2 KEYBOARD/MOUSE CONTROLLER DEVICE //************************************************************************** -READ8_MEMBER( at_keyboard_controller_device::data_r ) +READ8_MEMBER(ps2_keyboard_controller_device::data_r) +{ + set_kbd_irq(0U); + set_mouse_irq(0U); + return m_mcu->upi41_master_r(space, 0U); +} + +WRITE_LINE_MEMBER(ps2_keyboard_controller_device::mouse_clk_w) +{ + machine().scheduler().synchronize(timer_expired_delegate(FUNC(ps2_keyboard_controller_device::set_mouse_clk_in), this), state); +} + +WRITE_LINE_MEMBER(ps2_keyboard_controller_device::mouse_data_w) +{ + machine().scheduler().synchronize(timer_expired_delegate(FUNC(ps2_keyboard_controller_device::set_mouse_data_in), this), state); +} + +ps2_keyboard_controller_device::ps2_keyboard_controller_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) + : at_kbc_device_base(mconfig, PS2_KEYBOARD_CONTROLLER, tag, owner, clock) + , m_mouse_irq_cb(*this) + , m_mouse_clk_cb(*this), m_mouse_data_cb(*this) + , m_mouse_irq(0U) + , m_mouse_clk_in(1U), m_mouse_clk_out(1U), m_mouse_data_in(1U), m_mouse_data_out(1U) + , m_p2_data(0xffU) +{ +} + +tiny_rom_entry const *ps2_keyboard_controller_device::device_rom_region() const +{ + return ROM_NAME(ps2_kbc); +} + +void ps2_keyboard_controller_device::device_add_mconfig(machine_config &config) +{ + I8042(config, m_mcu, DERIVED_CLOCK(1, 1)); + m_mcu->p1_in_cb().set(FUNC(ps2_keyboard_controller_device::p1_r)); + m_mcu->p1_out_cb().set_nop(); + m_mcu->p2_in_cb().set_constant(0xffU); + m_mcu->p2_out_cb().set(FUNC(ps2_keyboard_controller_device::p2_w)); + m_mcu->t0_in_cb().set([this] () { return kbd_clk_r(); }); + m_mcu->t1_in_cb().set([this] () { return mouse_clk_r(); }); +} + +void ps2_keyboard_controller_device::device_resolve_objects() +{ + at_kbc_device_base::device_resolve_objects(); + + m_mouse_clk_cb.resolve_safe(); + m_mouse_data_cb.resolve_safe(); +} + +void ps2_keyboard_controller_device::device_start() +{ + at_kbc_device_base::device_start(); + + save_item(NAME(m_mouse_irq)); + save_item(NAME(m_mouse_clk_in)); + save_item(NAME(m_mouse_clk_out)); + save_item(NAME(m_mouse_data_in)); + save_item(NAME(m_mouse_data_out)); + save_item(NAME(m_p2_data)); + + m_mouse_irq = 0U; + m_mouse_clk_in = m_mouse_clk_out = 1U; + m_mouse_data_in = m_mouse_data_out = 1U; + m_p2_data = 0xffU; +} + +inline void ps2_keyboard_controller_device::set_mouse_irq(u8 state) +{ + if (state != m_mouse_irq) + m_mouse_irq_cb((m_mouse_irq = state) ? ASSERT_LINE : CLEAR_LINE); +} + +inline void ps2_keyboard_controller_device::set_mouse_clk_out(u8 state) +{ + if (state != m_mouse_clk_out) + m_mouse_clk_cb(m_mouse_clk_out = state); +} + +inline void ps2_keyboard_controller_device::set_mouse_data_out(u8 state) +{ + if (state != m_mouse_data_out) + m_mouse_data_cb(m_mouse_data_out = state); +} + +inline u8 ps2_keyboard_controller_device::mouse_clk_r() const { - return m_cpu->upi41_master_r(space, 0); + return m_mouse_clk_in & m_mouse_clk_out; } -WRITE8_MEMBER( at_keyboard_controller_device::data_w ) +inline u8 ps2_keyboard_controller_device::mouse_data_r() const { - m_cpu->upi41_master_w(space, 0, data); + return m_mouse_data_in & m_mouse_data_out; } -READ8_MEMBER( at_keyboard_controller_device::status_r ) +TIMER_CALLBACK_MEMBER(ps2_keyboard_controller_device::set_mouse_clk_in) { - return m_cpu->upi41_master_r(space, 1); + m_mouse_clk_in = param ? 1U : 0U; } -WRITE8_MEMBER( at_keyboard_controller_device::command_w ) +TIMER_CALLBACK_MEMBER(ps2_keyboard_controller_device::set_mouse_data_in) { - m_cpu->upi41_master_w(space, 1, data); + m_mouse_data_in = param ? 1U : 0U; } -WRITE_LINE_MEMBER( at_keyboard_controller_device::keyboard_clock_w ) +READ8_MEMBER(ps2_keyboard_controller_device::p1_r) { - m_clock_signal = state; + return kbd_data_r() | (mouse_data_r() << 1) | 0xfcU; } -WRITE_LINE_MEMBER( at_keyboard_controller_device::keyboard_data_w ) +WRITE8_MEMBER(ps2_keyboard_controller_device::p2_w) { - m_data_signal = state; + set_hot_res(BIT(~data, 0)); + set_gate_a20(BIT(data, 1)); + set_mouse_data_out(BIT(~data, 2)); + set_mouse_clk_out(BIT(~data, 3)); + set_kbd_clk_out(BIT(~data, 6)); + set_kbd_data_out(BIT(~data, 7)); + + if (BIT(data & ~m_p2_data, 4)) + set_kbd_irq(1U); + if (BIT(data & ~m_p2_data, 5)) + set_mouse_irq(1U); + m_p2_data = data; } diff --git a/src/devices/machine/at_keybc.h b/src/devices/machine/at_keybc.h index b47336dacf4..77bf039a7a1 100644 --- a/src/devices/machine/at_keybc.h +++ b/src/devices/machine/at_keybc.h @@ -1,11 +1,10 @@ // license:BSD-3-Clause -// copyright-holders:Wilbert Pol +// copyright-holders:Vas Crabb /*************************************************************************** - IBM PC AT compatibles 8042 keyboard controller + IBM PC/AT and PS/2 keyboard controllers ***************************************************************************/ - #ifndef MAME_MACHINE_AT_KEYBC_H #define MAME_MACHINE_AT_KEYBC_H @@ -15,70 +14,152 @@ //************************************************************************** -// TYPE DEFINITIONS +// KEYBOARD CONTROLLER DEVICE BASE //************************************************************************** -// ======================> at_keyboard_controller_device - -class at_keyboard_controller_device : public device_t +class at_kbc_device_base : public device_t { public: - // construction/destruction - at_keyboard_controller_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - auto system_reset_cb() { return m_system_reset_cb.bind(); } - auto gate_a20_cb() { return m_gate_a20_cb.bind(); } - auto input_buffer_full_cb() { return m_input_buffer_full_cb.bind(); } - auto output_buffer_empty_cb() { return m_output_buffer_empty_cb.bind(); } - auto keyboard_clock_cb() { return m_keyboard_clock_cb.bind(); } - auto keyboard_data_cb() { return m_keyboard_data_cb.bind(); } - - // interface to the host pc - DECLARE_READ8_MEMBER( data_r ); - DECLARE_WRITE8_MEMBER( data_w ); - DECLARE_READ8_MEMBER( status_r ); - DECLARE_WRITE8_MEMBER( command_w ); - - // interface to the keyboard - DECLARE_WRITE_LINE_MEMBER( keyboard_clock_w ); - DECLARE_WRITE_LINE_MEMBER( keyboard_data_w ); + // outputs to host + auto hot_res() { return m_hot_res_cb.bind(); } + auto gate_a20() { return m_gate_a20_cb.bind(); } + auto kbd_irq() { return m_kbd_irq_cb.bind(); } + + // outputs to keyboard + auto kbd_clk() { return m_kbd_clk_cb.bind(); } // open collector with 10kΩ pull-up + auto kbd_data() { return m_kbd_data_cb.bind(); } // open collector with 10kΩ pull-up + + // host interface + virtual DECLARE_READ8_MEMBER(data_r); + virtual DECLARE_READ8_MEMBER(status_r); + DECLARE_WRITE8_MEMBER(data_w); + DECLARE_WRITE8_MEMBER(command_w); + + // inputs from keyboard + DECLARE_WRITE_LINE_MEMBER(kbd_clk_w); + DECLARE_WRITE_LINE_MEMBER(kbd_data_w); protected: - // device-level overrides + // trampoline constructor + at_kbc_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock); + + // device_t implementation + virtual void device_resolve_objects() override; virtual void device_start() override; - virtual void device_reset() override; - virtual const tiny_rom_entry *device_rom_region() const override; + // host outputs - use 1 = asserted, 0 = deasserted + void set_hot_res(u8 state); + void set_gate_a20(u8 state); + void set_kbd_irq(u8 state); + + // keyboard line drive - use 1 = pulled up, 0 = driven low + void set_kbd_clk_out(u8 state); + void set_kbd_data_out(u8 state); + u8 kbd_clk_r() const; + u8 kbd_data_r() const; + + required_device<upi41_cpu_device> m_mcu; + +private: + // internal sync helpers + TIMER_CALLBACK_MEMBER(write_data); + TIMER_CALLBACK_MEMBER(write_command); + TIMER_CALLBACK_MEMBER(set_kbd_clk_in); + TIMER_CALLBACK_MEMBER(set_kbd_data_in); + + devcb_write_line m_hot_res_cb, m_gate_a20_cb, m_kbd_irq_cb; + devcb_write_line m_kbd_clk_cb, m_kbd_data_cb; + + u8 m_hot_res, m_gate_a20, m_kbd_irq; + u8 m_kbd_clk_in, m_kbd_clk_out, m_kbd_data_in, m_kbd_data_out; +}; + + +//************************************************************************** +// PC/AT KEYBOARD CONTROLLER DEVICE +//************************************************************************** + +class at_keyboard_controller_device : public at_kbc_device_base +{ +public: + // standard constructor + at_keyboard_controller_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock); + +protected: + // device_t implementation + virtual tiny_rom_entry const *device_rom_region() const override; + virtual void device_add_mconfig(machine_config &config) override; virtual ioport_constructor device_input_ports() const override; + +private: + // MCU I/O handlers + DECLARE_WRITE8_MEMBER(p2_w); +}; + + +//************************************************************************** +// PS/2 KEYBOARD/MOUSE CONTROLLER DEVICE +//************************************************************************** + +class ps2_keyboard_controller_device : public at_kbc_device_base +{ +public: + // outputs to host + auto mouse_irq() { return m_mouse_irq_cb.bind(); } + + // outputs to mouse + auto mouse_clk() { return m_mouse_clk_cb.bind(); } // open collector with 10kΩ pull-up + auto mouse_data() { return m_mouse_data_cb.bind(); } // open collector with 10kΩ pull-up + + // host interface + virtual DECLARE_READ8_MEMBER(data_r) override; + + // inputs from mouse + DECLARE_WRITE_LINE_MEMBER(mouse_clk_w); + DECLARE_WRITE_LINE_MEMBER(mouse_data_w); + + // standard constructor + ps2_keyboard_controller_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock); + +protected: + // device_t implementation + virtual tiny_rom_entry const *device_rom_region() const override; virtual void device_add_mconfig(machine_config &config) override; + virtual void device_resolve_objects() override; + virtual void device_start() override; private: - // internal 8042 interface - DECLARE_READ_LINE_MEMBER( t0_r ); - DECLARE_READ_LINE_MEMBER( t1_r ); - DECLARE_READ8_MEMBER( p1_r ); - DECLARE_READ8_MEMBER( p2_r ); - DECLARE_WRITE8_MEMBER( p2_w ); - - // internal state - upi41_cpu_device *m_cpu; - - // interface to the host pc - devcb_write_line m_system_reset_cb; - devcb_write_line m_gate_a20_cb; - devcb_write_line m_input_buffer_full_cb; - devcb_write_line m_output_buffer_empty_cb; - - // interface to the keyboard - devcb_write_line m_keyboard_clock_cb; - devcb_write_line m_keyboard_data_cb; - - uint8_t m_clock_signal; - uint8_t m_data_signal; + // host outputs - use 1 = asserted, 0 = deasserted + void set_mouse_irq(u8 state); + + // mouse line drive - use 1 = pulled up, 0 = driven low + void set_mouse_clk_out(u8 state); + void set_mouse_data_out(u8 state); + u8 mouse_clk_r() const; + u8 mouse_data_r() const; + + // internal sync helpers + TIMER_CALLBACK_MEMBER(set_mouse_clk_in); + TIMER_CALLBACK_MEMBER(set_mouse_data_in); + + // MCU I/O handlers + DECLARE_READ8_MEMBER(p1_r); + DECLARE_WRITE8_MEMBER(p2_w); + + devcb_write_line m_mouse_irq_cb; + devcb_write_line m_mouse_clk_cb, m_mouse_data_cb; + + u8 m_mouse_irq; + u8 m_mouse_clk_in, m_mouse_clk_out, m_mouse_data_in, m_mouse_data_out; + u8 m_p2_data; }; -// device type definition +//************************************************************************** +// DEVICE TYPES +//************************************************************************** + DECLARE_DEVICE_TYPE(AT_KEYBOARD_CONTROLLER, at_keyboard_controller_device) +DECLARE_DEVICE_TYPE(PS2_KEYBOARD_CONTROLLER, ps2_keyboard_controller_device) #endif // MAME_MACHINE_AT_KEYBC_H diff --git a/src/devices/machine/clock.cpp b/src/devices/machine/clock.cpp index 927a0aecbf5..374dc8a16a8 100644 --- a/src/devices/machine/clock.cpp +++ b/src/devices/machine/clock.cpp @@ -22,48 +22,25 @@ void clock_device::device_start() void clock_device::device_clock_changed() { - update_timer(); -} - -attotime clock_device::period() -{ - if (m_clock > 0) - return attotime::from_hz(m_clock * 2); - - return attotime::never; -} - -void clock_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) -{ - m_signal = !m_signal; - m_signal_handler(m_signal); - - m_timer->adjust(period()); -} - -void clock_device::update_timer() -{ if (!m_signal_handler.isnull() && m_clock > 0) { if (m_timer == nullptr) - { m_timer = timer_alloc(0); - m_timer->adjust(period()); - } - else - { - attotime next = period() - m_timer->elapsed(); - if (next < attotime::zero) - { - next = attotime::zero; - } + const attotime period(attotime::from_hz(m_clock * 2)); + + attotime next = period - m_timer->elapsed(); + if (next < attotime::zero) + next = attotime::zero; - m_timer->adjust(next); - } + m_timer->adjust(next, 0, period); } else if (m_timer != nullptr) - { m_timer->adjust(attotime::never); - } +} + +void clock_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ + m_signal = !m_signal; + m_signal_handler(m_signal); } diff --git a/src/devices/machine/clock.h b/src/devices/machine/clock.h index dbe6cd00bd9..32989a15149 100644 --- a/src/devices/machine/clock.h +++ b/src/devices/machine/clock.h @@ -26,9 +26,6 @@ protected: virtual void device_clock_changed() override; private: - void update_timer(); - attotime period(); - int m_signal; emu_timer *m_timer; diff --git a/src/devices/machine/com8116.cpp b/src/devices/machine/com8116.cpp index 3a804d764d0..0a3da24042e 100644 --- a/src/devices/machine/com8116.cpp +++ b/src/devices/machine/com8116.cpp @@ -37,7 +37,7 @@ DEFINE_DEVICE_TYPE(COM5016_013, com5016_013_device, "com5016_013", "COM5016-013 const int com8116_device::divisors_16X_5_0688MHz[16] = { 6336, 4224, 2880, 2355, 2112, 1056, 528, 264, 176, 158, 132, 88, 66, 44, 33, 16 }; -// SMC/COM8116-003 +// SMC/COM8116-003 and WD WD-1943-03 // from http://www.vintagecomputer.net/fjkraan/comp/divcomp/doc/SMC_BaudGen.pdf page 283 (pdf page 20) // baud rates are 50, 75, 110, 134.5, 150, 200, 300, 600, 1200, 1800, 2000, 2400, 3600, 4800, 9600, 19200 // SMC/COM8116T-020 should have similar output rates, but clock is unknown and probably different @@ -54,11 +54,11 @@ const int com8116_device::divisors_16X_4_9152MHz[16] = // SMC/COM5016(T)-6 and WD WD-1943-06 // baud rates are 50, 75, 110, 134.5, 150, 200, 300, 600, 1200, 1800, 2400, 3600, 4800, 7200, 9600, 19200 const int com8116_device::divisors_32X_5_0688MHz[16] = - { 3168, 2112, 1440, 1177, 1056, 792, 528, 264, 132, 88, 66, 44, 33, 22, 16, 8 }; + { 3168, 2112, 1440, 1177, 1056, 792, 528, 264, 132, 88, 66, 44, 33, 22, 17, 8 }; -// SMC/COM5016(T)-013 (from http://bitsavers.informatik.uni-stuttgart.de/pdf/dec/terminal/vt100/EK-VT100-TM-003_VT100_Technical_Manual_Jul82.pdf page 4-27 (pdf page 78)) +// SMC/COM5016(T)-013 and WD WD-1943-02 (from http://bitsavers.informatik.uni-stuttgart.de/pdf/dec/terminal/vt100/EK-VT100-TM-003_VT100_Technical_Manual_Jul82.pdf page 4-27 (pdf page 78)) // and from http://www.vintagecomputer.net/fjkraan/comp/divcomp/doc/SMC_BaudGen.pdf page 283 (pdf page 20) -// SMC/COM5106-013A is the same chip clocked twice as fast, but with 32x clocks per baud instead of 16x +// SMC/COM5106-013A and WD WD-1943-04 are the same chip clocked twice as fast, but with 32x clocks per baud instead of 16x // baud rates are 50, 75, 110, 134.5, 150, 200, 300, 600, 1200, 1800, 2000, 2400, 3600, 4800, 9600, 19200 const int com8116_device::divisors_16X_2_7648MHz[16] = { 3456, 2304, 1571, 1285, 1152, 864, 576, 288, 144, 96, 86, 72, 48, 36, 18, 9 }; diff --git a/src/devices/machine/cs4031.cpp b/src/devices/machine/cs4031.cpp index 9938750b816..fb1ac37b698 100644 --- a/src/devices/machine/cs4031.cpp +++ b/src/devices/machine/cs4031.cpp @@ -173,6 +173,13 @@ cs4031_device::cs4031_device(const machine_config &mconfig, const char *tag, dev m_write_cpureset(*this), m_write_a20m(*this), m_write_spkr(*this), + m_cpu(*this, finder_base::DUMMY_TAG), + m_keybc(*this, finder_base::DUMMY_TAG), + m_isa(*this, finder_base::DUMMY_TAG), + m_bios(*this, finder_base::DUMMY_TAG), + m_space(nullptr), + m_space_io(nullptr), + m_ram(nullptr), m_dma1(*this, "dma1"), m_dma2(*this, "dma2"), m_intc1(*this, "intc1"), @@ -239,13 +246,8 @@ void cs4031_device::device_start() save_item(NAME(m_address_valid)); save_item(NAME(m_registers)); - device_t *cpu = machine().device(m_cputag); - m_space = &cpu->memory().space(AS_PROGRAM); - m_space_io = &cpu->memory().space(AS_IO); - - m_isa = machine().root_device().memregion(m_isatag)->base(); - m_bios = machine().root_device().memregion(m_biostag)->base(); - m_keybc = downcast<at_keyboard_controller_device *>(machine().device(m_keybctag)); + m_space = &m_cpu->memory().space(AS_PROGRAM); + m_space_io = &m_cpu->memory().space(AS_IO); m_ram = ram_dev->pointer(); uint32_t ram_size = ram_dev->size(); diff --git a/src/devices/machine/cs4031.h b/src/devices/machine/cs4031.h index 5ffe8562628..4ea5829e3aa 100644 --- a/src/devices/machine/cs4031.h +++ b/src/devices/machine/cs4031.h @@ -35,13 +35,14 @@ class cs4031_device : public device_t { public: // construction/destruction - cs4031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const char *cputag, const char *isatag, const char *biostag, const char *keybctag) + template <typename T, typename U, typename V, typename W> + cs4031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cputag, U &&isatag, V &&biostag, W &&keybctag) : cs4031_device(mconfig, tag, owner, clock) { - set_cputag(cputag); - set_isatag(isatag); - set_biostag(biostag); - set_keybctag(keybctag); + set_cputag(std::forward<T>(cputag)); + set_isatag(std::forward<U>(isatag)); + set_biostag(std::forward<V>(biostag)); + set_keybctag(std::forward<W>(keybctag)); } cs4031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -114,10 +115,10 @@ public: IRQ_CALLBACK_MEMBER(int_ack_r) { return m_intc1->acknowledge(); } // inline configuration - void set_cputag(const char *tag) { m_cputag = tag; } - void set_isatag(const char *tag) { m_isatag = tag; } - void set_biostag(const char *tag) { m_biostag = tag; } - void set_keybctag(const char *tag) { m_keybctag = tag; } + template <typename T> void set_cputag(T &&tag) { m_cpu.set_tag(std::forward<T>(tag)); } + template <typename T> void set_isatag(T &&tag) { m_isa.set_tag(std::forward<T>(tag)); } + template <typename T> void set_biostag(T &&tag) { m_bios.set_tag(std::forward<T>(tag)); } + template <typename T> void set_keybctag(T &&tag) { m_keybc.set_tag(std::forward<T>(tag)); } protected: // device-level overrides @@ -156,15 +157,13 @@ private: void update_write_regions(); // internal state - const char *m_cputag; - const char *m_isatag; - const char *m_biostag; - const char *m_keybctag; + required_device<device_memory_interface> m_cpu; + required_device<at_kbc_device_base> m_keybc; + required_region_ptr<uint8_t> m_isa; + required_region_ptr<uint8_t> m_bios; address_space *m_space; address_space *m_space_io; - uint8_t *m_isa; - uint8_t *m_bios; uint8_t *m_ram; // ipc core devices @@ -186,7 +185,6 @@ private: int m_nmi_mask; // keyboard - at_keyboard_controller_device *m_keybc; int m_cpureset; int m_kbrst; int m_ext_gatea20; diff --git a/src/devices/machine/fdc37c93x.cpp b/src/devices/machine/fdc37c93x.cpp index ce18f033dea..d285bac1ee9 100644 --- a/src/devices/machine/fdc37c93x.cpp +++ b/src/devices/machine/fdc37c93x.cpp @@ -240,16 +240,17 @@ FLOPPY_FORMATS_MEMBER(fdc37c93x_device::floppy_formats) FLOPPY_NASLITE_FORMAT FLOPPY_FORMATS_END -MACHINE_CONFIG_START(fdc37c93x_device::device_add_mconfig) +void fdc37c93x_device::device_add_mconfig(machine_config &config) +{ // floppy disc controller - MCFG_SMC37C78_ADD("fdc") - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, fdc37c93x_device, irq_floppy_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, fdc37c93x_device, drq_floppy_w)) - MCFG_FLOPPY_DRIVE_ADD("fdc:0", pc_hd_floppies, "35hd", fdc37c93x_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:1", pc_hd_floppies, "35hd", fdc37c93x_device::floppy_formats) + smc37c78_device &fdcdev(SMC37C78(config, floppy_controller_fdcdev)); + fdcdev.intrq_wr_callback().set(FUNC(fdc37c93x_device::irq_floppy_w)); + fdcdev.drq_wr_callback().set(FUNC(fdc37c93x_device::drq_floppy_w)); + FLOPPY_CONNECTOR(config, "fdc:0", pc_hd_floppies, "35hd", fdc37c93x_device::floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:1", pc_hd_floppies, "35hd", fdc37c93x_device::floppy_formats); // parallel port - MCFG_DEVICE_ADD("lpt", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE(*this, fdc37c93x_device, irq_parallel_w)) + PC_LPT(config, pc_lpt_lptdev); + pc_lpt_lptdev->irq_handler().set(FUNC(fdc37c93x_device::irq_parallel_w)); // serial ports NS16450(config, pc_serial1_comdev, XTAL(1'843'200)); // or NS16550 ? @@ -275,7 +276,7 @@ MACHINE_CONFIG_START(fdc37c93x_device::device_add_mconfig) m_kbdc->input_buffer_full_callback().set(FUNC(fdc37c93x_device::irq_keyboard_w)); m_kbdc->system_reset_callback().set(FUNC(fdc37c93x_device::kbdp20_gp20_reset_w)); m_kbdc->gate_a20_callback().set(FUNC(fdc37c93x_device::kbdp21_gp25_gatea20_w)); -MACHINE_CONFIG_END +} WRITE_LINE_MEMBER(fdc37c93x_device::irq_floppy_w) { diff --git a/src/devices/machine/genpc.cpp b/src/devices/machine/genpc.cpp index 7f49ee888b3..d16f32c50a3 100644 --- a/src/devices/machine/genpc.cpp +++ b/src/devices/machine/genpc.cpp @@ -194,6 +194,11 @@ WRITE_LINE_MEMBER( ibm5160_mb_device::pc_pit8253_out2_changed ) m_speaker->level_w(m_pc_spkrdata & m_pit_out2); } +WRITE_LINE_MEMBER( ibm5150_mb_device::pc_pit8253_out2_changed ) +{ + ibm5160_mb_device::pc_pit8253_out2_changed(state); + m_cassette->output(m_pit_out2 ? 1.0 : -1.0); +} /********************************************************** * diff --git a/src/devices/machine/genpc.h b/src/devices/machine/genpc.h index 9408b1bde9c..4c412a9a720 100644 --- a/src/devices/machine/genpc.h +++ b/src/devices/machine/genpc.h @@ -48,7 +48,7 @@ public: DECLARE_WRITE_LINE_MEMBER( pc_speaker_set_spkrdata ); DECLARE_WRITE_LINE_MEMBER( pc_pit8253_out1_changed ); - DECLARE_WRITE_LINE_MEMBER( pc_pit8253_out2_changed ); + virtual DECLARE_WRITE_LINE_MEMBER( pc_pit8253_out2_changed ); DECLARE_WRITE_LINE_MEMBER( pic_int_w ); @@ -142,6 +142,8 @@ public: DECLARE_WRITE_LINE_MEMBER( keyboard_clock_w ); + virtual DECLARE_WRITE_LINE_MEMBER( pc_pit8253_out2_changed ) override; + protected: ibm5150_mb_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/machine/i8243.cpp b/src/devices/machine/i8243.cpp index 5a387b55705..4bfbc81ac11 100644 --- a/src/devices/machine/i8243.cpp +++ b/src/devices/machine/i8243.cpp @@ -4,7 +4,7 @@ i8243.c - Intel 8243 Port Expander (for MCS-48) + Intel 8243 Input/Output Expander (for MCS-48) ***************************************************************************/ @@ -25,9 +25,10 @@ DEFINE_DEVICE_TYPE(I8243, i8243_device, "i8243", "Intel 8243 I/O Expander") i8243_device::i8243_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, I8243, tag, owner, clock) - , m_p2out(0), m_p2(0), m_opcode(0), m_prog(0) - , m_readhandler(*this) - , m_writehandler(*this) + , m_p{0, 0, 0, 0} + , m_p2out(0x0f), m_p2(0x0f), m_opcode(0), m_prog(1), m_cs(0) + , m_readhandler{{*this}, {*this}, {*this}, {*this}} + , m_writehandler{{*this}, {*this}, {*this}, {*this}} { } @@ -37,87 +38,101 @@ i8243_device::i8243_device(const machine_config &mconfig, const char *tag, devic void i8243_device::device_start() { - m_readhandler.resolve_safe(0); - m_writehandler.resolve_safe(); + for (auto &cb : m_readhandler) + cb.resolve(); + for (auto &cb : m_writehandler) + cb.resolve(); + + save_item(NAME(m_p)); + save_item(NAME(m_p2out)); + save_item(NAME(m_p2)); + save_item(NAME(m_opcode)); + save_item(NAME(m_prog)); + save_item(NAME(m_cs)); } //------------------------------------------------- -// device_reset - device-specific reset +// p2_r - handle a read from the MCU port //------------------------------------------------- -void i8243_device::device_reset() +uint8_t i8243_device::p2_r() { - m_p2 = 0x0f; - m_p2out = 0x0f; - m_prog = 1; + return m_p2out; } -/*------------------------------------------------- - i8243_p2_r - handle a read from port 2 --------------------------------------------------*/ +//------------------------------------------------- +// p2_w - handle a write to the MCU port +//------------------------------------------------- -READ8_MEMBER(i8243_device::p2_r) +void i8243_device::p2_w(uint8_t data) { - return m_p2out; + m_p2 = data & 0x0f; } -/*------------------------------------------------- - i8243_p2_r - handle a write to port 2 --------------------------------------------------*/ +//------------------------------------------------- +// output_update - helper for port writes +//------------------------------------------------- -WRITE8_MEMBER(i8243_device::p2_w) +void i8243_device::output_update(int which) { - m_p2 = data & 0x0f; + if (m_writehandler[which].isnull()) + logerror("%s: Unconfigured write to P%d (%01X)\n", machine().describe_context(), which + 4, m_p[which]); + else + m_writehandler[which](m_p[which]); } -/*------------------------------------------------- - i8243_prog_w - handle a change in the PROG - line state --------------------------------------------------*/ +//------------------------------------------------- +// prog_w - handle a change in the PROG line +// state +//------------------------------------------------- WRITE_LINE_MEMBER(i8243_device::prog_w) { /* on high->low transition state, latch opcode/port */ - if (m_prog && !state) + if (m_prog && !state && !m_cs) { m_opcode = m_p2; /* if this is a read opcode, copy result to p2out */ if ((m_opcode >> 2) == mcs48_cpu_device::EXPANDER_OP_READ) { - if (m_readhandler.isnull()) - { - m_p[m_opcode & 3] = m_readhandler(m_opcode & 3); - } - m_p2out = m_p[m_opcode & 3] & 0x0f; + int which = m_opcode & 3; + if (m_readhandler[which].isnull()) + logerror("%s: Unconfigured read from P%d\n", machine().describe_context(), which + 4); + else + m_p[which] = m_readhandler[which](); + m_p2out = m_p[which] & 0x0f; } + else + m_p2out = 0x0f; } /* on low->high transition state, act on opcode */ - else if (!m_prog && state) + else if (!m_prog && state && !m_cs) { switch (m_opcode >> 2) { case mcs48_cpu_device::EXPANDER_OP_READ: - break; // handled above + m_p2out = 0x0f; // release expander bus + break; case mcs48_cpu_device::EXPANDER_OP_WRITE: m_p[m_opcode & 3] = m_p2 & 0x0f; - m_writehandler((offs_t)(m_opcode & 3), m_p[m_opcode & 3]); + output_update(m_opcode & 3); break; case mcs48_cpu_device::EXPANDER_OP_OR: m_p[m_opcode & 3] |= m_p2 & 0x0f; - m_writehandler((offs_t)(m_opcode & 3), m_p[m_opcode & 3]); + output_update(m_opcode & 3); break; case mcs48_cpu_device::EXPANDER_OP_AND: m_p[m_opcode & 3] &= m_p2 & 0x0f; - m_writehandler((offs_t)(m_opcode & 3), m_p[m_opcode & 3]); + output_update(m_opcode & 3); break; } } @@ -125,3 +140,15 @@ WRITE_LINE_MEMBER(i8243_device::prog_w) /* remember the state */ m_prog = state; } + + +//------------------------------------------------- +// cs_w - handle chip select line (active low) +//------------------------------------------------- + +WRITE_LINE_MEMBER(i8243_device::cs_w) +{ + m_cs = state; + if (m_cs) + m_p2out = 0x0f; +} diff --git a/src/devices/machine/i8243.h b/src/devices/machine/i8243.h index cea6fe4f468..d6f7d72a0e2 100644 --- a/src/devices/machine/i8243.h +++ b/src/devices/machine/i8243.h @@ -4,7 +4,22 @@ i8243.h - Intel 8243 Port Expander + Intel 8243 Input/Output Expander + +**************************************************************************** + _____ _____ + P50 1 |* \_/ | 24 VCC + P40 2 | | 23 P51 + P41 3 | | 22 P52 + P42 4 | | 21 P53 + P43 5 | | 20 P60 + _CS 6 | | 19 P61 + PROG 7 | 8243 | 18 P62 + P23 8 | | 17 P63 + P22 9 | | 16 P73 + P21 10 | | 15 P72 + P20 11 | | 14 P71 + GND 12 |_____________| 13 P70 ***************************************************************************/ @@ -20,31 +35,37 @@ public: i8243_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); // configuration helpers - auto read_handler() { return m_readhandler.bind(); } - auto write_handler() { return m_writehandler.bind(); } - - DECLARE_READ8_MEMBER(p2_r); - DECLARE_WRITE8_MEMBER(p2_w); + auto p4_in_cb() { return m_readhandler[0].bind(); } + auto p4_out_cb() { return m_writehandler[0].bind(); } + auto p5_in_cb() { return m_readhandler[1].bind(); } + auto p5_out_cb() { return m_writehandler[1].bind(); } + auto p6_in_cb() { return m_readhandler[2].bind(); } + auto p6_out_cb() { return m_writehandler[2].bind(); } + auto p7_in_cb() { return m_readhandler[3].bind(); } + auto p7_out_cb() { return m_writehandler[3].bind(); } + + uint8_t p2_r(); + void p2_w(uint8_t data); DECLARE_WRITE_LINE_MEMBER(prog_w); + DECLARE_WRITE_LINE_MEMBER(cs_w); protected: // device-level overrides virtual void device_start() override; - virtual void device_reset() override; - virtual void device_post_load() override { } - virtual void device_clock_changed() override { } private: + void output_update(int which); - uint8_t m_p[4]; /* 4 ports' worth of data */ - uint8_t m_p2out; /* port 2 bits that will be returned */ - uint8_t m_p2; /* most recent port 2 value */ - uint8_t m_opcode; /* latched opcode */ - uint8_t m_prog; /* previous PROG state */ + uint8_t m_p[4]; // 4 ports' worth of data + uint8_t m_p2out; // port 2 bits that will be returned + uint8_t m_p2; // most recent port 2 value + uint8_t m_opcode; // latched opcode + bool m_prog; // previous PROG state + bool m_cs; // chip select - devcb_read8 m_readhandler; - devcb_write8 m_writehandler; + devcb_read8 m_readhandler[4]; + devcb_write8 m_writehandler[4]; }; diff --git a/src/devices/machine/ins8250.cpp b/src/devices/machine/ins8250.cpp index 07259c60a43..e6f44db4c59 100644 --- a/src/devices/machine/ins8250.cpp +++ b/src/devices/machine/ins8250.cpp @@ -97,6 +97,9 @@ History: #include "emu.h" #include "machine/ins8250.h" +//#define VERBOSE 1 +#include "logmacro.h" + DEFINE_DEVICE_TYPE(INS8250, ins8250_device, "ins8250", "National Semiconductor INS8250 UART") DEFINE_DEVICE_TYPE(NS16450, ns16450_device, "ns16450", "National Semiconductor NS16450 UART") DEFINE_DEVICE_TYPE(NS16550, ns16550_device, "ns16550", "National Semiconductor NS16550 UART") @@ -243,6 +246,7 @@ READ_LINE_MEMBER(ins8250_uart_device::intrpt_r) // Baud rate generator is reset after writing to either byte of divisor latch void ins8250_uart_device::update_baud_rate() { + LOG("%.1f baud selected (divisor = %d)\n", double(clock()) / (m_regs.dl * 16), m_regs.dl); set_rate(clock(), m_regs.dl * 16); // FIXME: Baud rate generator should not affect transmitter or receiver, but device_serial_interface resets them regardless. diff --git a/src/devices/machine/mb87030.cpp b/src/devices/machine/mb87030.cpp new file mode 100644 index 00000000000..39e306866a6 --- /dev/null +++ b/src/devices/machine/mb87030.cpp @@ -0,0 +1,797 @@ +// license:BSD-3-Clause +// copyright-holders:Sven Schnelle + +#include "emu.h" +#define VERBOSE 0 +#include "logmacro.h" +#include "mb87030.h" + +DEFINE_DEVICE_TYPE(MB87030, mb87030_device, "MB87030", "Fujitsu MB87030 SCSI controller") + +mb87030_device::mb87030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + mb87030_device(mconfig, MB87030, tag, owner, clock) +{ + +} + +mb87030_device::mb87030_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : + nscsi_device(mconfig, type, tag, owner, clock), + m_irq_handler(*this), + m_dreq_handler(*this) +{ + +} + +void mb87030_device::map(address_map &map) +{ + map(0x00, 0x00).rw(FUNC(mb87030_device::bdid_r), FUNC(mb87030_device::bdid_w)); + map(0x01, 0x01).rw(FUNC(mb87030_device::sctl_r), FUNC(mb87030_device::sctl_w)); + map(0x02, 0x02).rw(FUNC(mb87030_device::scmd_r), FUNC(mb87030_device::scmd_w)); + map(0x03, 0x03).rw(FUNC(mb87030_device::tmod_r), FUNC(mb87030_device::tmod_w)); + map(0x04, 0x04).rw(FUNC(mb87030_device::ints_r), FUNC(mb87030_device::ints_w)); + map(0x05, 0x05).rw(FUNC(mb87030_device::psns_r), FUNC(mb87030_device::sdgc_w)); + map(0x06, 0x06).r(FUNC(mb87030_device::ssts_r)); + map(0x07, 0x07).r(FUNC(mb87030_device::serr_r)); + map(0x08, 0x08).rw(FUNC(mb87030_device::pctl_r), FUNC(mb87030_device::pctl_w)); + map(0x09, 0x09).r(FUNC(mb87030_device::mbc_r)); + map(0x0a, 0x0a).rw(FUNC(mb87030_device::dreg_r), FUNC(mb87030_device::dreg_w)); + map(0x0b, 0x0b).rw(FUNC(mb87030_device::temp_r), FUNC(mb87030_device::temp_w)); + map(0x0c, 0x0c).rw(FUNC(mb87030_device::tch_r), FUNC(mb87030_device::tch_w)); + map(0x0d, 0x0d).rw(FUNC(mb87030_device::tcm_r), FUNC(mb87030_device::tcm_w)); + map(0x0e, 0x0e).rw(FUNC(mb87030_device::tcl_r), FUNC(mb87030_device::tcl_w)); + map(0x0f, 0x0f).rw(FUNC(mb87030_device::exbf_r), FUNC(mb87030_device::exbf_w)); +} + +void mb87030_device::device_reset() +{ + m_bdid = 0; + m_sctl = SCTL_RESET_AND_DISABLE; + m_scmd = 0; + m_tmod = 0; + m_ints = 0; + m_sdgc = 0; + m_ssts = 0; + m_serr = 0; + m_pctl = 0; + m_mbc = 0; + m_dreg = 0; + m_temp = 0; + m_tch = 0; + m_tcm = 0; + m_tc = 0; + m_exbf = 0; + m_fifo.clear(); + scsi_bus->ctrl_wait(scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); + update_state(State::Idle, 0); + scsi_set_ctrl(0, S_ALL); + scsi_bus->data_w(scsi_refid, 0); + update_ssts(); + update_ints(); +} + +auto mb87030_device::get_state_name(State state) const +{ + switch(state) { + case State::Idle: + return "Idle"; + case State::ArbitrationWaitBusFree: + return "ArbitrationWaitBusFree"; + case State::ArbitrationAssertBSY: + return "ArbitrationAssertBSY"; + case State::ArbitrationWait: + return "ArbitrationWait"; + case State::ArbitrationAssertSEL: + return "ArbitrationAssertSEL"; + case State::ArbitrationDeAssertBSY: + return "ArbitrationDeAssertBSY"; + case State::SelectionWaitBusFree: + return "SelectionWaitBusFree"; + case State::SelectionWaitBSY: + return "SelectionWaitBSY"; + case State::SelectionAssertSEL: + return "SelectionAssertSEL"; + case State::Selection: + return "Selection"; + case State::TransferWaitReq: + return "TransferWaitReq"; + case State::TransferSendAck: + return "TransferSendAck"; + case State::TransferSendData: + return "TransferSendData"; + case State::TransferSendDataDMAReq: + return "TransferSendDataDMAReq"; + case State::TransferSendDataDMAResp: + return "TransferSendDataDMAResp"; + case State::TransferRecvData: + return "TransferRecvData"; + case State::TransferRecvDataDMAReq: + return "TransferRecvDataDMAReq"; + case State::TransferRecvDataDMAResp: + return "TransferRecvDataDMAResp"; + + case State::TransferWaitDeassertREQ: + return "TransferWaitDeassertREQ"; + case State::TransferDeassertACK: + return "TransferDeassertACK"; + } + return "Unknown state"; +} + +void mb87030_device::update_state(mb87030_device::State new_state, int delay, int timeout) +{ + LOG("new state: %s -> %s (delay %d, timeout %d)\n", get_state_name(m_state), + get_state_name(new_state), delay, timeout); + m_state = new_state; + if (delay) + m_delay_timer->adjust(clocks_to_attotime(delay)); + else + m_delay_timer->reset(); + if (timeout) + m_timer->adjust(clocks_to_attotime(timeout)); + else + m_timer->reset(); +} + +void mb87030_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ + switch(id) { + case TimerId::Delay: + m_delay_timer->reset(); + step(false); + break; + case TimerId::Timeout: + m_timer->reset(); + step(true); + break; + } +} + +void mb87030_device::scsi_command_complete() +{ + m_ints |= INTS_COMMAND_COMPLETE; + m_ssts &= ~(SSTS_SPC_BUSY|SSTS_XFER_IN_PROGRESS); + update_ints(); + update_state(State::Idle); +} + +void mb87030_device::scsi_disconnect_timeout() +{ + scsi_set_ctrl(0, S_ALL); + scsi_bus->data_w(scsi_refid, 0); + m_ints = INTS_SPC_TIMEOUT; + update_ints(); + update_state(State::Idle); +} + +void mb87030_device::scsi_disconnect() +{ + LOG("%s: m_tc %d\n", __FUNCTION__, m_tc); + m_ssts &= ~(SSTS_INIT_CONNECTED|SSTS_TARG_CONNECTED|SSTS_SPC_BUSY|SSTS_XFER_IN_PROGRESS); + m_ints = INTS_DISCONNECTED; + if (m_pctl & PCTL_BUS_FREE_IE) { + LOG("disconnect IE\n"); + m_ints |= INTS_DISCONNECTED; + } + update_ints(); + update_state(State::Idle); +} + +void mb87030_device::scsi_set_ctrl(uint32_t value, uint32_t mask) +{ + if (m_sctl & SCTL_DIAG_MODE) { + m_scsi_ctrl &= ~mask; + m_scsi_ctrl |= value; + logerror("update m_scsi_ctrl: %02X%s%s%s%s%s%s\n", m_scsi_ctrl, + (m_scsi_ctrl & S_REQ) ? " REQ" : "", + (m_scsi_ctrl & S_ACK) ? " ACK" : "", + (m_scsi_ctrl & S_BSY) ? " BSY" : "", + (m_scsi_ctrl & S_MSG) ? " MSG" : "", + (m_scsi_ctrl & S_CTL) ? " CTL" : "", + (m_scsi_ctrl & S_INP) ? " INP" : ""); + } else { + scsi_bus->ctrl_w(scsi_refid, value, mask); + } +} + +uint32_t mb87030_device::scsi_get_ctrl(void) +{ + if (m_sctl & SCTL_DIAG_MODE) { + uint32_t ret = 0; + if ((m_sdgc & SDGC_DIAG_IO) || (m_scsi_ctrl & S_INP)) + ret |= S_INP; + if ((m_sdgc & SDGC_DIAG_CD) || (m_scsi_ctrl & S_CTL)) + ret |= S_CTL; + if ((m_sdgc & SDGC_DIAG_MSG) || (m_scsi_ctrl & S_MSG)) + ret |= S_MSG; + if ((m_sdgc & SDGC_DIAG_BSY) || (m_scsi_ctrl & S_BSY)) + ret |= S_BSY; + if ((m_sdgc & SDGC_DIAG_ACK) || (m_scsi_ctrl & S_ACK)) + ret |= S_ACK; + if ((m_sdgc & SDGC_DIAG_REQ) || (m_scsi_ctrl & S_REQ)) + ret |= S_REQ; + if (m_scsi_ctrl & S_SEL) + ret |= S_SEL; + if (m_scsi_ctrl & S_ATN) + ret |= S_ATN; + + return ret; + } else { + return scsi_bus->ctrl_r(); + } +} + +void mb87030_device::step(bool timeout) +{ + uint32_t ctrl = scsi_get_ctrl(); + uint32_t data = scsi_bus->data_r(); + + LOG("%s: %d %s,%s data %02X ctrl %02X TC %d\n", __FUNCTION__, + scsi_refid, get_state_name(m_state), + timeout ? " timeout" : "", data, + ctrl, m_tc); + + if (m_sctl & SCTL_RESET_AND_DISABLE && m_state != State::Idle) { + scsi_set_ctrl(0, S_ALL); + update_state(State::Idle); + return; + } + + + if ((m_ssts & SSTS_INIT_CONNECTED) && !(ctrl & S_BSY)) { + LOG("SCSI disconnect\n"); + scsi_disconnect(); + scsi_set_ctrl(0, S_ALL); + } + + + switch(m_state) { + case State::Idle: + + if (ctrl == 0 && (m_pctl & PCTL_BUS_FREE_IE)) { + m_ints |= INTS_DISCONNECTED; + update_ints(); + } + break; + case State::ArbitrationWaitBusFree: + if (!(ctrl & (S_BSY|S_SEL))) + update_state(State::ArbitrationAssertBSY, 1); + + break; + case State::ArbitrationAssertBSY: + scsi_set_ctrl(S_BSY, S_BSY); + scsi_bus->data_w(scsi_refid, (1 << m_bdid)); + update_state(State::ArbitrationWait, 1); + break; + + case State::ArbitrationWait: + + for (int id = (2 << m_bdid); id <= 0x80; id <<= 1) { + LOG("check %d\n", id); + if (data & id) { + LOG("arbitration lost, winner %d\n", id); + scsi_disconnect_timeout(); + break; + } + } + LOG("Arbitration won\n"); + update_state(State::ArbitrationAssertSEL, 1); + break; + + case State::ArbitrationAssertSEL: + scsi_set_ctrl(S_SEL, S_SEL); + update_state(State::ArbitrationDeAssertBSY, 1); + break; + + case State::ArbitrationDeAssertBSY: + scsi_set_ctrl(0, S_BSY); + update_state(State::SelectionAssertSEL, 1); + break; + + case State::SelectionWaitBusFree: + if (!(ctrl & (S_BSY|S_SEL))) + update_state(State::SelectionAssertSEL, 10); + break; + + case State::SelectionAssertSEL: + scsi_bus->data_w(scsi_refid, m_temp); + scsi_set_ctrl(0, S_SEL); //XXX: needed? + scsi_set_ctrl(S_SEL | (m_send_atn_during_selection ? S_ATN : 0), S_ATN|S_SEL|S_BSY); + scsi_bus->ctrl_wait(scsi_refid, S_BSY, S_BSY); + update_state(State::SelectionWaitBSY, 0, m_tc / 8); + break; + + case State::SelectionWaitBSY: + if (timeout) { + LOG("select timeout\n"); + scsi_disconnect_timeout(); + break; + } + m_timer->reset(); + if ((ctrl & (S_REQ|S_BSY|S_MSG|S_CTL|S_INP)) == S_BSY) + update_state(State::Selection, 1); + + break; + + case State::Selection: + LOG("selection success\n"); + scsi_set_ctrl(0, S_SEL); + m_ssts |= SSTS_INIT_CONNECTED|SSTS_XFER_IN_PROGRESS; + m_ssts &= ~(SSTS_TARG_CONNECTED|SSTS_SPC_BUSY); + update_ssts(); + scsi_command_complete(); + break; + + case State::TransferWaitReq: + + + if (!m_tc && (m_fifo.empty() || m_dma_transfer)) { + LOG("TransferWaitReq: tc == 0\n"); + scsi_bus->data_w(scsi_refid, 0); + scsi_command_complete(); + break; + } + + if (m_tc < 0) + break; + + if (m_scsi_phase != (ctrl & S_PHASE_MASK)) { + LOG("SCSI phase change during transfer\n"); + m_ints |= INTS_SERVICE_REQUIRED; + m_ssts &= ~SSTS_SPC_BUSY; + update_ints(); + break; + } + + if (!(ctrl & S_REQ)) { + scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); + break; + } + + if (!m_dma_transfer) { + update_state((ctrl & S_INP) ? State::TransferRecvData : State::TransferSendData, 1); + } else { + update_state((ctrl & S_INP) ? State::TransferRecvDataDMAReq : State::TransferSendDataDMAReq, 1); + } + break; + + case State::TransferRecvData: + if (!m_tc || m_fifo.full()) + break; + + LOG("pushing read data: %02X\n", data); + m_fifo.enqueue(data); + m_tc--; + + update_state(State::TransferSendAck, 10); + break; + + case State::TransferRecvDataDMAReq: + m_hdb = data; + m_hdb_loaded = true; + update_state(State::TransferRecvDataDMAResp, 10); + m_tc--; + m_dreq_handler(true); + break; + + case State::TransferRecvDataDMAResp: + if (m_hdb_loaded) + break; + update_state(State::TransferSendAck, 10); + m_dreq_handler(false); + break; + + case State::TransferSendData: + + if (m_tc < 0 || m_fifo.empty()) { + LOG("fifo empty or m_tc(%d) zero\n", m_tc); + break; + } + + scsi_bus->data_w(scsi_refid, m_fifo.dequeue()); + m_tc--; + update_state(State::TransferSendAck, 10); + break; + + case State::TransferSendDataDMAReq: + m_hdb_loaded = false; + update_state(State::TransferSendDataDMAResp, 10); + m_dreq_handler(true); + break; + + case State::TransferSendDataDMAResp: + if (!m_hdb_loaded) + break; + m_hdb_loaded = false; + m_dreq_handler(false); + scsi_bus->data_w(scsi_refid, m_hdb); + m_tc--; + update_state(State::TransferSendAck, 10); + break; + + case State::TransferSendAck: + + scsi_set_ctrl(S_ACK, S_ACK); + scsi_bus->ctrl_wait(scsi_refid, 0, S_REQ); + + update_state(State::TransferWaitDeassertREQ, 10); + break; + + case State::TransferWaitDeassertREQ: + if (!(ctrl & S_REQ)) + update_state(State::TransferDeassertACK, 10); + break; + + case State::TransferDeassertACK: + scsi_set_ctrl(0, S_ACK); + scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); + update_state(State::TransferWaitReq, 10); + break; + + } +} + +void mb87030_device::device_start() +{ + m_timer = timer_alloc(TimerId::Timeout); + m_delay_timer = timer_alloc(TimerId::Delay); + m_irq_handler.resolve_safe(); + m_dreq_handler.resolve_safe(); + + save_item(NAME(m_bdid)); + save_item(NAME(m_sctl)); + save_item(NAME(m_scmd)); + save_item(NAME(m_tmod)); + save_item(NAME(m_ints)); + save_item(NAME(m_sdgc)); + save_item(NAME(m_ssts)); + save_item(NAME(m_serr)); + save_item(NAME(m_pctl)); + save_item(NAME(m_mbc)); + save_item(NAME(m_dreg)); + save_item(NAME(m_temp)); + save_item(NAME(m_tch)); + save_item(NAME(m_tcm)); + save_item(NAME(m_tc)); + save_item(NAME(m_exbf)); + save_item(NAME(m_hdb)); + save_item(NAME(m_hdb_loaded)); + save_item(NAME(m_send_atn_during_selection)); +// save_item(NAME(m_fifo)); + save_item(NAME(m_scsi_phase)); + save_item(NAME(m_scsi_ctrl)); + save_item(NAME(m_dma_transfer)); +// save_item(NAME(m_state)); +} + +void mb87030_device::scsi_ctrl_changed() +{ + if (m_delay_timer->remaining() == attotime::never) + step(false); +} + +WRITE_LINE_MEMBER(mb87030_device::reset_w) +{ + LOG("%s: %s\n", __FUNCTION__, state); + if (state) + device_reset(); +} + +void mb87030_device::update_ssts() +{ + if (!m_tc) + m_ssts |= SSTS_TC_ZERO; + else + m_ssts &= ~SSTS_TC_ZERO; + + if (m_fifo.empty()) + m_ssts |= SSTS_DREQ_EMPTY; + else + m_ssts &= ~SSTS_DREQ_EMPTY; + + if (m_fifo.full()) + m_ssts |= SSTS_DREQ_FULL; + else + m_ssts &= ~SSTS_DREQ_FULL; +} + +void mb87030_device::update_ints() +{ + LOG("%s: %s\n", __FUNCTION__, (m_ints && (m_sctl & 1)) ? "true" : "false"); + m_irq_handler(m_ints && (m_sctl & 1));// || (m_ints & INTS_DISCONNECTED)); +} + +READ8_MEMBER(mb87030_device::bdid_r) +{ + LOG("%s %02X\n", __FUNCTION__, (1 << m_bdid)); + return (1 << m_bdid); +} + +WRITE8_MEMBER(mb87030_device::bdid_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_bdid = data & 0x7; +} + +READ8_MEMBER(mb87030_device::sctl_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_sctl); + return m_sctl; +} + +WRITE8_MEMBER(mb87030_device::sctl_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_sctl = data; + update_ints(); +} + +READ8_MEMBER(mb87030_device::scmd_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_scmd); + return m_scmd; +} + +WRITE8_MEMBER(mb87030_device::scmd_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_scmd = data; + + switch(m_scmd & SCMD_CMD_MASK) { + case SCMD_CMD_BUS_RELEASE: + LOG("%s: Bus release\n", __FUNCTION__); + break; + case SCMD_CMD_SELECT: + LOG("%s: Select\n", __FUNCTION__); + if (m_sctl & SCTL_ARBITRATION_ENABLE) + update_state(State::ArbitrationWaitBusFree, 10); + else + update_state(State::SelectionWaitBusFree, 10); + step(false); + break; + case SCMD_CMD_RESET_ATN: + LOG("%s: Reset ATN\n", __FUNCTION__); +// if (m_state == State::Idle) + m_send_atn_during_selection = false; +// else + scsi_set_ctrl(0, S_ATN); + break; + case SCMD_CMD_SET_ATN: + LOG("%s: Set ATN\n", __FUNCTION__); + if (m_state == State::Idle) + m_send_atn_during_selection = true; + else + scsi_set_ctrl(S_ATN, S_ATN); + break; + case SCMD_CMD_TRANSFER: + if (!(m_ssts & (SSTS_INIT_CONNECTED|SSTS_TARG_CONNECTED))) + break; + + m_dma_transfer = !(data & 0x04); + LOG("%s Transfer\n", m_dma_transfer ? "DMA" : "Program"); + m_ssts |= SSTS_SPC_BUSY|SSTS_XFER_IN_PROGRESS; + update_state(State::TransferWaitReq, 5); + break; + case SCMD_CMD_TRANSFER_PAUSE: + LOG("%s: Transfer Pause\n", __FUNCTION__); + break; + case SCMD_CMD_RESET_ACK_REQ: + LOG("%s: Reset ACK/REQ\n", __FUNCTION__); + if (m_ssts & SSTS_INIT_CONNECTED) + scsi_set_ctrl(0, S_ACK); + if (m_ssts & SSTS_TARG_CONNECTED) + scsi_set_ctrl(0, S_REQ); + break; + case SCMD_CMD_SET_ACK_REQ: + LOG("%s: Set ACK/REQ\n", __FUNCTION__); + if (m_ssts & SSTS_INIT_CONNECTED) { + if (m_pctl & 1) { + m_temp = scsi_bus->data_r(); + } else { + scsi_bus->data_w(scsi_refid, m_temp); + } + LOG("set ACK\n"); + scsi_set_ctrl(S_ACK, S_ACK); + } else { + logerror("not connected\n"); + } + if (m_ssts & SSTS_TARG_CONNECTED) + scsi_set_ctrl(S_REQ, S_REQ); + break; + } +} + +READ8_MEMBER(mb87030_device::tmod_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_tmod); + return m_tmod; +} + +WRITE8_MEMBER(mb87030_device::tmod_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_tmod = data; +} + +READ8_MEMBER(mb87030_device::ints_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_ints); + return m_ints; +} + +WRITE8_MEMBER(mb87030_device::ints_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_ints &= ~(data); + update_ints(); +} + +READ8_MEMBER(mb87030_device::psns_r) +{ + uint32_t ctrl = scsi_get_ctrl(); + uint8_t ret = (!!(ctrl & S_REQ) << 7) | + (!!(ctrl & S_ACK) << 6) | + (!!(ctrl & S_ATN) << 5) | + (!!(ctrl & S_SEL) << 4) | + (!!(ctrl & S_BSY) << 3) | + (!!(ctrl & S_MSG) << 2) | + (!!(ctrl & S_CTL) << 1) | + (!!(ctrl & S_INP)); + LOG("%s: %02X\n", __FUNCTION__, ret); + return ret; +} + +WRITE8_MEMBER(mb87030_device::sdgc_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_sdgc = data; + scsi_ctrl_changed(); +} + +READ8_MEMBER(mb87030_device::ssts_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_ssts); + update_ssts(); + return m_ssts; +} + +READ8_MEMBER(mb87030_device::serr_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_serr); + return m_serr; +} + +READ8_MEMBER(mb87030_device::pctl_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_pctl); + return m_pctl; +} + +WRITE8_MEMBER(mb87030_device::pctl_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_pctl = data; + m_scsi_phase = m_pctl & 7; + if (m_pctl & PCTL_BUS_FREE_IE) + step(false); + +} + +READ8_MEMBER(mb87030_device::mbc_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_mbc); + return m_mbc; +} + +READ8_MEMBER(mb87030_device::dreg_r) +{ + + step(false); + if (!m_fifo.empty()) + m_dreg = m_fifo.dequeue(); + LOG("%s: %02X\n", __FUNCTION__, m_dreg); + return m_dreg; +} + +WRITE8_MEMBER(mb87030_device::dreg_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_dreg = data; + if (!m_fifo.full()) + m_fifo.enqueue(data); + step(false); +} + +READ8_MEMBER(mb87030_device::temp_r) +{ + m_temp = scsi_bus->data_r(); + LOG("%s: %02X\n", __FUNCTION__, m_temp); + return m_temp; + +} + +WRITE8_MEMBER(mb87030_device::temp_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_temp = data; + step(false); +} + +READ8_MEMBER(mb87030_device::tch_r) +{ + uint8_t ret = (m_tc >> 16) & 0xff; + LOG("%s: %02X\n", __FUNCTION__, ret); + return ret; +} + +READ8_MEMBER(mb87030_device::tcm_r) +{ + uint8_t ret = (m_tc >> 8) & 0xff; + LOG("%s: %02X\n", __FUNCTION__, ret); + return ret; +} + +READ8_MEMBER(mb87030_device::tcl_r) +{ + uint8_t ret = m_tc & 0xff; + LOG("%s: %02X\n", __FUNCTION__, ret); + return ret; +} + + +WRITE8_MEMBER(mb87030_device::tch_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_tc &= 0x00ffff; + m_tc |= data << 16; + update_ssts(); +} + +WRITE8_MEMBER(mb87030_device::tcm_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_tc &= 0xff00ff; + m_tc |= data << 8; + update_ssts(); +} + +WRITE8_MEMBER(mb87030_device::tcl_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_tc &= 0xffff00; + m_tc |= data; + update_ssts(); +} + +READ8_MEMBER(mb87030_device::exbf_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_exbf); + return m_exbf; +} + +WRITE8_MEMBER(mb87030_device::exbf_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_exbf = data; +} + +void mb87030_device::dma_w(uint8_t data) +{ + if (machine().side_effects_disabled()) + return; + LOG("dma_w: %02X\n", data); + m_hdb = data; + m_hdb_loaded = true; + step(false); +} + +uint8_t mb87030_device::dma_r(void) +{ + uint8_t val = m_hdb; + + if (machine().side_effects_disabled()) + return 0; + LOG("dma_r: %02X\n", val); + m_hdb_loaded = false; + step(false); + return val; +} diff --git a/src/devices/machine/mb87030.h b/src/devices/machine/mb87030.h new file mode 100644 index 00000000000..3b5945434a1 --- /dev/null +++ b/src/devices/machine/mb87030.h @@ -0,0 +1,220 @@ +// license:BSD-3-Clause +// copyright-holders:Sven Schnelle +#ifndef MAME_MACHINE_MB87030_H +#define MAME_MACHINE_MB87030_H + +#pragma once + +#include "machine/nscsi_bus.h" +#include <queue> + +class mb87030_device : public nscsi_device +{ +public: + mb87030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual void map(address_map &map); + + auto out_irq_callback() { return m_irq_handler.bind(); } + auto out_dreq_callback() { return m_dreq_handler.bind(); } + + DECLARE_READ8_MEMBER(bdid_r); + DECLARE_READ8_MEMBER(sctl_r); + DECLARE_READ8_MEMBER(scmd_r); + DECLARE_READ8_MEMBER(tmod_r); + DECLARE_READ8_MEMBER(ints_r); + DECLARE_READ8_MEMBER(psns_r); + DECLARE_READ8_MEMBER(ssts_r); + DECLARE_READ8_MEMBER(serr_r); + DECLARE_READ8_MEMBER(pctl_r); + DECLARE_READ8_MEMBER(mbc_r); + DECLARE_READ8_MEMBER(dreg_r); + DECLARE_READ8_MEMBER(temp_r); + DECLARE_READ8_MEMBER(tch_r); + DECLARE_READ8_MEMBER(tcm_r); + DECLARE_READ8_MEMBER(tcl_r); + DECLARE_READ8_MEMBER(exbf_r); + + DECLARE_WRITE8_MEMBER(bdid_w); + DECLARE_WRITE8_MEMBER(sctl_w); + DECLARE_WRITE8_MEMBER(scmd_w); + DECLARE_WRITE8_MEMBER(tmod_w); + DECLARE_WRITE8_MEMBER(ints_w); + DECLARE_WRITE8_MEMBER(sdgc_w); + DECLARE_WRITE8_MEMBER(pctl_w); + DECLARE_WRITE8_MEMBER(dreg_w); + DECLARE_WRITE8_MEMBER(temp_w); + DECLARE_WRITE8_MEMBER(tch_w); + DECLARE_WRITE8_MEMBER(tcm_w); + DECLARE_WRITE8_MEMBER(tcl_w); + DECLARE_WRITE8_MEMBER(exbf_w); + + DECLARE_WRITE_LINE_MEMBER(reset_w); + virtual void scsi_ctrl_changed() override; + + uint8_t dma_r(); + void dma_w(uint8_t val); + + void ctrl_write(uint32_t value, uint32_t mask) { scsi_bus->ctrl_w(scsi_refid, value, mask); scsi_ctrl_changed(); } + uint32_t data_read() { return scsi_bus->data_r(); }; +protected: + mb87030_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + virtual void device_start() override; + virtual void device_reset() override; +private: + + constexpr static uint8_t SCTL_INT_ENABLE = 0x01; + constexpr static uint8_t SCTL_RESELECT_ENABLE = 0x02; + constexpr static uint8_t SCTL_SELECT_ENABLE = 0x04; + constexpr static uint8_t SCTL_PARITY_ENABLE = 0x08; + constexpr static uint8_t SCTL_ARBITRATION_ENABLE = 0x10; + constexpr static uint8_t SCTL_DIAG_MODE = 0x20; + constexpr static uint8_t SCTL_CONTROL_RESET = 0x40; + constexpr static uint8_t SCTL_RESET_AND_DISABLE = 0x80; + + constexpr static uint8_t SCMD_TERM_MODE = 0x01; + constexpr static uint8_t SCMD_PRG_XFER = 0x02; + constexpr static uint8_t SCMD_INTERCEPT_XFER = 0x04; + constexpr static uint8_t SCMD_RST_OUT = 0x08; + constexpr static uint8_t SCMD_CMD_BUS_RELEASE = 0x00; + constexpr static uint8_t SCMD_CMD_SELECT = 0x20; + constexpr static uint8_t SCMD_CMD_RESET_ATN = 0x40; + constexpr static uint8_t SCMD_CMD_SET_ATN = 0x60; + constexpr static uint8_t SCMD_CMD_TRANSFER = 0x80; + constexpr static uint8_t SCMD_CMD_TRANSFER_PAUSE = 0xa0; + constexpr static uint8_t SCMD_CMD_RESET_ACK_REQ = 0xc0; + constexpr static uint8_t SCMD_CMD_SET_ACK_REQ = 0xe0; + constexpr static uint8_t SCMD_CMD_MASK = 0xe0; + + constexpr static uint8_t TMOD_MIN_TRANSFER_PERIOD_SHIFT = 0x02; + constexpr static uint8_t TMOD_MIN_TRANSFER_PERIOD_MASK = 0x0c; + constexpr static uint8_t TMOD_MAX_TRANSFER_OFFSET_SHIFT = 0x04; + constexpr static uint8_t TMOD_MIN_TRANSFER_OFFSET_MASK = 0x70; + constexpr static uint8_t TMOD_SYNC_XFER = 0x80; + + constexpr static uint8_t PCTL_PHASE_SHIFT = 0x00; + constexpr static uint8_t PCTL_PHASE_MASK = 0x07; + constexpr static uint8_t PCTL_BUS_FREE_IE = 0x80; + + constexpr static uint8_t PSNS_IO = 0x01; + constexpr static uint8_t PSNS_CD = 0x02; + constexpr static uint8_t PSNS_MSG = 0x04; + constexpr static uint8_t PSNS_BSY = 0x08; + constexpr static uint8_t PSNS_SEL = 0x10; + constexpr static uint8_t PSNS_ATN = 0x20; + constexpr static uint8_t PSNS_ACK = 0x40; + constexpr static uint8_t PSNS_REQ = 0x80; + + constexpr static uint8_t INTS_RESET_CONDITION = 0x01; + constexpr static uint8_t INTS_SPC_HARD_ERR = 0x02; + constexpr static uint8_t INTS_SPC_TIMEOUT = 0x04; + constexpr static uint8_t INTS_SERVICE_REQUIRED = 0x08; + constexpr static uint8_t INTS_COMMAND_COMPLETE = 0x10; + constexpr static uint8_t INTS_DISCONNECTED = 0x20; + constexpr static uint8_t INTS_RESELECTED = 0x40; + constexpr static uint8_t INTS_SELECTED = 0x80; + + constexpr static uint8_t SSTS_DREQ_EMPTY = 0x01; + constexpr static uint8_t SSTS_DREQ_FULL = 0x02; + constexpr static uint8_t SSTS_TC_ZERO = 0x04; + constexpr static uint8_t SSTS_SCSI_RST = 0x08; + constexpr static uint8_t SSTS_XFER_IN_PROGRESS = 0x10; + constexpr static uint8_t SSTS_SPC_BUSY = 0x20; + constexpr static uint8_t SSTS_TARG_CONNECTED = 0x40; + constexpr static uint8_t SSTS_INIT_CONNECTED = 0x80; + + constexpr static uint8_t SERR_OFFSET_ERROR = 0x01; + constexpr static uint8_t SERR_SHORT_PERIOD = 0x02; + constexpr static uint8_t SERR_PHASE_ERROR = 0x04; + constexpr static uint8_t SERR_TC_P_ERROR = 0x08; + constexpr static uint8_t SERR_DATA_ERROR_SPC = 0x40; + constexpr static uint8_t SERR_DATA_ERROR_SCSI = 0x80; + + constexpr static uint8_t SDGC_DIAG_IO = 0x01; + constexpr static uint8_t SDGC_DIAG_CD = 0x02; + constexpr static uint8_t SDGC_DIAG_MSG = 0x04; + constexpr static uint8_t SDGC_DIAG_BSY = 0x08; + constexpr static uint8_t SDGC_DIAG_ACK = 0x40; + constexpr static uint8_t SDGC_DIAG_REQ = 0x80; + + emu_timer *m_timer; + emu_timer *m_delay_timer; + + enum TimerId { + Delay, + Timeout, + }; + enum class State: uint8_t { + Idle, + ArbitrationWaitBusFree, + ArbitrationAssertBSY, + ArbitrationWait, + ArbitrationAssertSEL, + ArbitrationDeAssertBSY, + SelectionWaitBusFree, + SelectionAssertSEL, + SelectionWaitBSY, + Selection, + TransferWaitReq, + TransferSendData, + TransferSendDataDMAReq, + TransferSendDataDMAResp, + TransferRecvData, + TransferRecvDataDMAReq, + TransferRecvDataDMAResp, + TransferSendAck, + TransferWaitDeassertREQ, + TransferDeassertACK + //TransferCommand, + } m_state; + + void update_ssts(void); + void update_ints(void); + + void scsi_disconnect_timeout(void); + void scsi_command_complete(void); + void scsi_disconnect(void); + void update_state(mb87030_device::State new_state, int delay = 0, int timeout = 0); + auto get_state_name(State state) const; + void scsi_set_ctrl(uint32_t val, uint32_t mask); + uint32_t scsi_get_ctrl(); + void step(bool timeout); + + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + devcb_write_line m_irq_handler; + devcb_write_line m_dreq_handler; + + // registers + uint8_t m_bdid; + uint8_t m_sctl; + uint8_t m_scmd; + uint8_t m_tmod; + uint8_t m_ints; + uint8_t m_sdgc; + uint8_t m_ssts; + uint8_t m_serr; + uint8_t m_pctl; + uint8_t m_mbc; + uint8_t m_dreg; + uint8_t m_temp; + uint8_t m_tch; + uint8_t m_tcm; + uint32_t m_tc; + uint8_t m_exbf; + + uint8_t m_hdb; + bool m_hdb_loaded; + bool m_send_atn_during_selection; + util::fifo <uint8_t, 8> m_fifo; + + uint8_t m_scsi_phase; + uint32_t m_scsi_ctrl; + + bool m_dma_transfer; +}; + + +DECLARE_DEVICE_TYPE(MB87030, mb87030_device) + +#endif // MAME_MACHINE_MB87030_H diff --git a/src/devices/machine/ncr5390.cpp b/src/devices/machine/ncr5390.cpp index 135bcdb9705..62c62a038b6 100644 --- a/src/devices/machine/ncr5390.cpp +++ b/src/devices/machine/ncr5390.cpp @@ -407,10 +407,15 @@ void ncr5390_device::step(bool timeout) case DISC_SEL_ARBITRATION_INIT: // wait until a command is in the fifo - if (!fifo_pos && dma_command && !(status & S_TC0)) + if (!fifo_pos && dma_command && !(status & S_TC0)) { + // dma starts after bus arbitration/selection is complete + dma_set(DMA_OUT); + step(false); break; + } - command_length = derive_msg_size(fifo[0]); + // "with atn" variants have a message byte before the command descriptor + command_length = (c == CD_SELECT) ? derive_msg_size(fifo[0]) : 1; state = DISC_SEL_ARBITRATION; step(false); break; @@ -850,6 +855,12 @@ void ncr5390_device::start_command() case CM_RESET_BUS: LOGMASKED(LOG_COMMAND, "Reset SCSI bus\n"); reset_soft(); + // FIXME: this interrupt should be generated when the reset is reflected + // back into the device, and not when the device starts the scsi reset + if (!(config & 0x40)) { + istatus = I_SCSI_RESET; + check_irq(); + } break; case CD_RESELECT: @@ -867,7 +878,6 @@ void ncr5390_device::start_command() "Select with ATN and stop sequence\n"); seq = 0; state = DISC_SEL_ARBITRATION_INIT; - dma_set(dma_command ? DMA_OUT : DMA_NONE); arbitrate(); break; diff --git a/src/devices/machine/ncr5390.h b/src/devices/machine/ncr5390.h index d39b352ddb7..bf301bed266 100644 --- a/src/devices/machine/ncr5390.h +++ b/src/devices/machine/ncr5390.h @@ -35,7 +35,7 @@ public: DECLARE_WRITE8_MEMBER(fifo_w); DECLARE_READ8_MEMBER(command_r); DECLARE_WRITE8_MEMBER(command_w); - DECLARE_READ8_MEMBER(status_r); + virtual DECLARE_READ8_MEMBER(status_r); DECLARE_WRITE8_MEMBER(bus_id_w); DECLARE_READ8_MEMBER(istatus_r); DECLARE_WRITE8_MEMBER(timeout_w); @@ -236,7 +236,7 @@ protected: void check_irq(); protected: - void reset_soft(); + virtual void reset_soft(); private: void reset_disconnect(); @@ -262,19 +262,19 @@ public: virtual void map(address_map &map) override; - DECLARE_READ8_MEMBER(status_r); + virtual DECLARE_READ8_MEMBER(status_r) override; DECLARE_READ8_MEMBER(conf2_r) { return config2; }; DECLARE_WRITE8_MEMBER(conf2_w) { config2 = data; }; - DECLARE_READ8_MEMBER(read) override; - DECLARE_WRITE8_MEMBER(write) override; + virtual DECLARE_READ8_MEMBER(read) override; + virtual DECLARE_WRITE8_MEMBER(write) override; protected: ncr53c90a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); virtual void device_start() override; - void reset_soft(); + virtual void reset_soft() override; virtual bool check_valid_command(uint8_t cmd) override; @@ -298,12 +298,12 @@ public: DECLARE_WRITE8_MEMBER(conf3_w) { config3 = data; }; DECLARE_WRITE8_MEMBER(fifo_align_w) { fifo_align = data; }; - DECLARE_READ8_MEMBER(read) override; - DECLARE_WRITE8_MEMBER(write) override; + virtual DECLARE_READ8_MEMBER(read) override; + virtual DECLARE_WRITE8_MEMBER(write) override; protected: virtual void device_start() override; - void reset_soft(); + virtual void reset_soft() override; private: u8 config3; diff --git a/src/devices/machine/nscsi_cd.cpp b/src/devices/machine/nscsi_cd.cpp index 4a6a6712c14..32989426b68 100644 --- a/src/devices/machine/nscsi_cd.cpp +++ b/src/devices/machine/nscsi_cd.cpp @@ -37,7 +37,6 @@ MACHINE_CONFIG_END void nscsi_cdrom_device::set_block_size(u32 block_size) { - assert_always(!started(), "block size should not be set after device start"); assert_always(bytes_per_sector % block_size == 0, "block size must be a factor of sector size"); bytes_per_block = block_size; @@ -60,6 +59,25 @@ uint8_t nscsi_cdrom_device::scsi_get_data(int id, int pos) return sector_buffer[(pos + extra_pos) & (bytes_per_sector - 1)]; } +void nscsi_cdrom_device::scsi_put_data(int id, int pos, uint8_t data) +{ + if(id != 2) { + nscsi_full_device::scsi_put_data(id, pos, data); + return; + } + + // process mode parameter header and one block descriptor + if(pos < sizeof(mode_data)) { + mode_data[pos] = data; + + // is this the last byte of the mode parameter block descriptor? + if(pos == sizeof(mode_data) - 1) + // is there exactly one block descriptor? + if(mode_data[3] == 8) + set_block_size((mode_data[9] << 16) | (mode_data[10] << 8) | (mode_data[11] << 0)); + } +} + void nscsi_cdrom_device::return_no_cd() { sense(false, 3); @@ -162,6 +180,16 @@ void nscsi_cdrom_device::scsi_command() break; } + case SC_MODE_SELECT_6: + LOG("command MODE SELECT 6 length %d\n", scsi_cmdbuf[4]); + + // accept mode select parameter data + if(scsi_cmdbuf[4]) + scsi_data_out(2, scsi_cmdbuf[4]); + + scsi_status_complete(SS_GOOD); + break; + case SC_START_STOP_UNIT: LOG("command %s UNIT%s\n", (scsi_cmdbuf[4] & 0x1) ? "START" : "STOP", (scsi_cmdbuf[4] & 0x2) ? (scsi_cmdbuf[4] & 0x1) ? " (LOAD)" : " (EJECT)" : ""); diff --git a/src/devices/machine/nscsi_cd.h b/src/devices/machine/nscsi_cd.h index 45e470b4c32..2f7c111c2d6 100644 --- a/src/devices/machine/nscsi_cd.h +++ b/src/devices/machine/nscsi_cd.h @@ -23,6 +23,7 @@ protected: virtual void scsi_command() override; virtual uint8_t scsi_get_data(int id, int pos) override; + virtual void scsi_put_data(int buf, int offset, uint8_t data) override; private: static constexpr uint32_t bytes_per_sector = 2048; @@ -32,6 +33,7 @@ private: uint32_t bytes_per_block; int lba, cur_sector; required_device<cdrom_image_device> image; + uint8_t mode_data[12]; void return_no_cd(); }; diff --git a/src/devices/machine/pc_fdc.cpp b/src/devices/machine/pc_fdc.cpp index bc760e832b4..d49450e1318 100644 --- a/src/devices/machine/pc_fdc.cpp +++ b/src/devices/machine/pc_fdc.cpp @@ -34,11 +34,11 @@ void pc_fdc_family_device::map(address_map &map) // The schematics show address decoding is minimal void pc_fdc_xt_device::map(address_map &map) { - map(0x0, 0x0).r("upd765", FUNC(upd765a_device::msr_r)).w(FUNC(pc_fdc_xt_device::dor_w)); - map(0x1, 0x1).r("upd765", FUNC(upd765a_device::fifo_r)).w(FUNC(pc_fdc_xt_device::dor_fifo_w)); + map(0x0, 0x0).r(fdc, FUNC(upd765a_device::msr_r)).w(FUNC(pc_fdc_xt_device::dor_w)); + map(0x1, 0x1).r(fdc, FUNC(upd765a_device::fifo_r)).w(FUNC(pc_fdc_xt_device::dor_fifo_w)); map(0x2, 0x2).w(FUNC(pc_fdc_xt_device::dor_w)); map(0x3, 0x3).w(FUNC(pc_fdc_xt_device::dor_w)); - map(0x4, 0x5).m("upd765", FUNC(upd765a_device::map)); + map(0x4, 0x5).m(fdc, FUNC(upd765a_device::map)); } @@ -46,7 +46,7 @@ void pc_fdc_xt_device::map(address_map &map) void pc_fdc_at_device::map(address_map &map) { map(0x2, 0x2).rw(FUNC(pc_fdc_at_device::dor_r), FUNC(pc_fdc_at_device::dor_w)); - map(0x4, 0x5).m("upd765", FUNC(upd765a_device::map)); + map(0x4, 0x5).m(fdc, FUNC(upd765a_device::map)); map(0x7, 0x7).rw(FUNC(pc_fdc_at_device::dir_r), FUNC(pc_fdc_at_device::ccr_w)); } @@ -72,11 +72,12 @@ void pc_fdc_family_device::dma_w(uint8_t data) fdc->dma_w(data); } -MACHINE_CONFIG_START(pc_fdc_family_device::device_add_mconfig) - MCFG_UPD765A_ADD("upd765", false, false) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, pc_fdc_family_device, irq_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, pc_fdc_family_device, drq_w)) -MACHINE_CONFIG_END +void pc_fdc_family_device::device_add_mconfig(machine_config &config) +{ + UPD765A(config, fdc, false, false); + fdc->intrq_wr_callback().set(FUNC(pc_fdc_family_device::irq_w)); + fdc->drq_wr_callback().set(FUNC(pc_fdc_family_device::drq_w)); +} void pc_fdc_family_device::device_start() { diff --git a/src/devices/machine/pc_lpt.h b/src/devices/machine/pc_lpt.h index d85768bb5d4..72677832926 100644 --- a/src/devices/machine/pc_lpt.h +++ b/src/devices/machine/pc_lpt.h @@ -13,8 +13,6 @@ #include "bus/centronics/ctronics.h" -#define MCFG_PC_LPT_IRQ_HANDLER(_devcb) \ - downcast<pc_lpt_device &>(*device).set_irq_handler(DEVCB_##_devcb); /*************************************************************************** DEVICE CONFIGURATION MACROS @@ -23,10 +21,10 @@ class pc_lpt_device : public device_t { public: - pc_lpt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + pc_lpt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); // configuration helpers - template <class Object> devcb_base &set_irq_handler(Object &&cb) { return m_irq_handler.set_callback(std::forward<Object>(cb)); } + auto irq_handler() { return m_irq_handler.bind(); } DECLARE_READ8_MEMBER( read ); DECLARE_WRITE8_MEMBER( write ); diff --git a/src/devices/machine/pdc.cpp b/src/devices/machine/pdc.cpp index deccddb7869..10dc9fd0619 100644 --- a/src/devices/machine/pdc.cpp +++ b/src/devices/machine/pdc.cpp @@ -157,9 +157,9 @@ void pdc_device::pdc_io(address_map &map) map(0x3c, 0x3c).portr("SW2").mirror(0xFF00); /* FDC Dipswitch */ map(0x3d, 0x3d).portr("SW1").mirror(0xFF00); /* HDC Dipswitch */ map(0x40, 0x41).rw(HDC_TAG, FUNC(hdc9224_device::read), FUNC(hdc9224_device::write)).mirror(0xFF00); - map(0x42, 0x43).m(FDC_TAG, FUNC(upd765a_device::map)).mirror(0xFF00); + map(0x42, 0x43).m(m_fdc, FUNC(upd765a_device::map)).mirror(0xFF00); map(0x50, 0x5f).w(FUNC(pdc_device::p50_5f_w)).mirror(0xFF00); - map(0x60, 0x6f).rw(FDCDMA_TAG, FUNC(am9517a_device::read), FUNC(am9517a_device::write)).mirror(0xFF00); + map(0x60, 0x6f).rw(m_dma8237, FUNC(am9517a_device::read), FUNC(am9517a_device::write)).mirror(0xFF00); } //------------------------------------------------- @@ -255,20 +255,21 @@ FLOPPY_FORMATS_END // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(pdc_device::device_add_mconfig) +void pdc_device::device_add_mconfig(machine_config &config) +{ /* CPU - Zilog Z0840006PSC */ - MCFG_DEVICE_ADD(Z80_TAG, Z80, XTAL(10'000'000) / 2) - MCFG_DEVICE_PROGRAM_MAP(pdc_mem) - MCFG_DEVICE_IO_MAP(pdc_io) + Z80(config, m_pdccpu, XTAL(10'000'000) / 2); + m_pdccpu->set_addrmap(AS_PROGRAM, &pdc_device::pdc_mem); + m_pdccpu->set_addrmap(AS_IO, &pdc_device::pdc_io); //MCFG_QUANTUM_PERFECT_CPU(M6502_TAG) /* Floppy Disk Controller - uPD765a - NEC D765AC-2 */ - MCFG_UPD765A_ADD(FDC_TAG, true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, pdc_device, fdc_irq)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(FDCDMA_TAG, am9517a_device, dreq0_w)) //MCFG_DEVCB_INVERT + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set(FUNC(pdc_device::fdc_irq)); + m_fdc->drq_wr_callback().set(m_dma8237, FUNC(am9517a_device::dreq0_w)); //.invert(); // Floppy disk drive - MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":0", pdc_floppies, "35hd", pdc_device::floppy_formats) + FLOPPY_CONNECTOR(config, FDC_TAG":0", pdc_floppies, "35hd", pdc_device::floppy_formats); /* DMA Controller - Intel P8237A-5 */ /* Channel 0: uPD765a Floppy Disk Controller */ @@ -288,7 +289,7 @@ MACHINE_CONFIG_START(pdc_device::device_add_mconfig) HDC9224(config, HDC_TAG, 0); MFM_HD_CONNECTOR(config, "h1", pdc_harddisks, nullptr, MFM_BYTE, 3000, 20, MFMHD_GEN_FORMAT); -MACHINE_CONFIG_END +} ioport_constructor pdc_device::device_input_ports() const { diff --git a/src/devices/machine/sis85c496.cpp b/src/devices/machine/sis85c496.cpp index f4e9f426fc1..186c4894b8d 100644 --- a/src/devices/machine/sis85c496.cpp +++ b/src/devices/machine/sis85c496.cpp @@ -97,15 +97,15 @@ MACHINE_CONFIG_START(sis85c496_host_device::device_add_mconfig) m_pic8259_slave->in_sp_callback().set_constant(0); AT_KEYBOARD_CONTROLLER(config, m_keybc, XTAL(12'000'000)); - m_keybc->system_reset_cb().set(FUNC(sis85c496_host_device::cpu_reset_w)); - m_keybc->gate_a20_cb().set(FUNC(sis85c496_host_device::cpu_a20_w)); - m_keybc->input_buffer_full_cb().set("pic8259_master", FUNC(pic8259_device::ir1_w)); - m_keybc->keyboard_clock_cb().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); - m_keybc->keyboard_data_cb().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); + m_keybc->hot_res().set(FUNC(sis85c496_host_device::cpu_reset_w)); + m_keybc->gate_a20().set(FUNC(sis85c496_host_device::cpu_a20_w)); + m_keybc->kbd_irq().set("pic8259_master", FUNC(pic8259_device::ir1_w)); + m_keybc->kbd_clk().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); + m_keybc->kbd_data().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); MCFG_DEVICE_ADD("pc_kbdc", PC_KBDC, 0) - MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_clock_w)) - MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_data_w)) + MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_clk_w)) + MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_data_w)) MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL) DS12885(config, m_ds12885); diff --git a/src/devices/machine/spg2xx.cpp b/src/devices/machine/spg2xx.cpp new file mode 100644 index 00000000000..d14d28a3d18 --- /dev/null +++ b/src/devices/machine/spg2xx.cpp @@ -0,0 +1,959 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz +/***************************************************************************** + + SunPlus SPG2xx-series SoC peripheral emulation + + TODO: + - Serial UART + - I2C + - SPI + +**********************************************************************/ + +#include "spg2xx.h" + +DEFINE_DEVICE_TYPE(SPG24X, spg24x_device, "spg24x", "SPG240-series System-on-a-Chip") +DEFINE_DEVICE_TYPE(SPG28X, spg28x_device, "spg28x", "SPG280-series System-on-a-Chip") + +#define VERBOSE_LEVEL (4) + +#define ENABLE_VERBOSE_LOG (1) + +inline void spg2xx_device::verboselog(int n_level, const char *s_fmt, ...) +{ +#if ENABLE_VERBOSE_LOG + if (VERBOSE_LEVEL >= n_level) + { + va_list v; + char buf[32768]; + va_start(v, s_fmt); + vsprintf(buf, s_fmt, v); + logerror("%s: %s", machine().describe_context(), buf); + va_end(v); + } +#endif +} + +#define SPG_DEBUG_VIDEO (0) + +#define IO_IRQ_ENABLE m_io_regs[0x21] +#define IO_IRQ_STATUS m_io_regs[0x22] +#define VIDEO_IRQ_ENABLE m_video_regs[0x62] +#define VIDEO_IRQ_STATUS m_video_regs[0x63] + +spg2xx_device::spg2xx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) + , m_porta_out(*this) + , m_portb_out(*this) + , m_portc_out(*this) + , m_porta_in(*this) + , m_portb_in(*this) + , m_portc_in(*this) + , m_eeprom_w(*this) + , m_eeprom_r(*this) + , m_uart_tx(*this) + , m_uart_rx(*this) + , m_cpu(*this, finder_base::DUMMY_TAG) + , m_screen(*this, finder_base::DUMMY_TAG) + , m_scrollram(*this, "scrollram") + , m_paletteram(*this, "paletteram") + , m_spriteram(*this, "spriteram") +{ +} + +spg24x_device::spg24x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : spg2xx_device(mconfig, SPG24X, tag, owner, clock, 256) +{ +} + +spg28x_device::spg28x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : spg2xx_device(mconfig, SPG28X, tag, owner, clock, 64) +{ +} + +void spg2xx_device::map(address_map &map) +{ + map(0x000000, 0x0027ff).ram(); + map(0x002800, 0x0028ff).rw(FUNC(spg2xx_device::video_r), FUNC(spg2xx_device::video_w)); + map(0x002900, 0x002aff).ram().share("scrollram"); + map(0x002b00, 0x002bff).ram().share("paletteram"); + map(0x002c00, 0x002fff).ram().share("spriteram"); + map(0x003000, 0x0037ff).rw(FUNC(spg2xx_device::audio_r), FUNC(spg2xx_device::audio_w)); + map(0x003d00, 0x003eff).rw(FUNC(spg2xx_device::io_r), FUNC(spg2xx_device::io_w)); +} + +void spg2xx_device::device_start() +{ + m_porta_out.resolve_safe(); + m_portb_out.resolve_safe(); + m_portc_out.resolve_safe(); + m_porta_in.resolve_safe(0); + m_portb_in.resolve_safe(0); + m_portc_in.resolve_safe(0); + m_eeprom_w.resolve_safe(); + m_eeprom_r.resolve_safe(0); + m_uart_tx.resolve_safe(); + m_uart_rx.resolve_safe(0); + + m_tmb1 = timer_alloc(TIMER_TMB1); + m_tmb2 = timer_alloc(TIMER_TMB2); + m_tmb1->adjust(attotime::never); + m_tmb2->adjust(attotime::never); + + m_screenpos_timer = timer_alloc(TIMER_SCREENPOS); + m_screenpos_timer->adjust(attotime::never); +} + +void spg2xx_device::device_reset() +{ + memset(m_video_regs, 0, 0x100 * sizeof(m_video_regs[0])); + memset(m_io_regs, 0, 0x200 * sizeof(m_io_regs[0])); + + m_video_regs[0x36] = 0xffff; + m_video_regs[0x37] = 0xffff; + + m_hide_page0 = false; + m_hide_page1 = false; + m_hide_sprites = false; + m_debug_sprites = false; + m_debug_blit = false; + m_sprite_index_to_debug = 0; +} + + +/************************* +* Video Hardware * +*************************/ + +inline uint8_t spg2xx_device::expand_rgb5_to_rgb8(uint8_t val) +{ + uint8_t temp = val & 0x1f; + return (temp << 3) | (temp >> 2); +} + +// Perform a lerp between a and b +inline uint8_t spg2xx_device::mix_channel(uint8_t a, uint8_t b) +{ + uint8_t alpha = (m_video_regs[0x2a] & 3) << 6; + return ((255 - alpha) * a + alpha * b) / 255; +} + +void spg2xx_device::mix_pixel(uint32_t offset, uint16_t rgb) +{ + m_screenbuf[offset].r = mix_channel(m_screenbuf[offset].r, expand_rgb5_to_rgb8(rgb >> 10)); + m_screenbuf[offset].g = mix_channel(m_screenbuf[offset].g, expand_rgb5_to_rgb8(rgb >> 5)); + m_screenbuf[offset].b = mix_channel(m_screenbuf[offset].b, expand_rgb5_to_rgb8(rgb)); +} + +void spg2xx_device::set_pixel(uint32_t offset, uint16_t rgb) +{ + m_screenbuf[offset].r = expand_rgb5_to_rgb8(rgb >> 10); + m_screenbuf[offset].g = expand_rgb5_to_rgb8(rgb >> 5); + m_screenbuf[offset].b = expand_rgb5_to_rgb8(rgb); +} + +void spg2xx_device::blit(bitmap_rgb32 &bitmap, const rectangle &cliprect, uint32_t xoff, uint32_t yoff, uint32_t attr, uint32_t ctrl, uint32_t bitmap_addr, uint16_t tile) +{ + address_space &space = m_cpu->space(AS_PROGRAM); + + uint32_t h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT); + uint32_t w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT); + + uint32_t yflipmask = attr & TILE_Y_FLIP ? h - 1 : 0; + uint32_t xflipmask = attr & TILE_X_FLIP ? w - 1 : 0; + + uint32_t nc = ((attr & 0x0003) + 1) << 1; + + uint32_t palette_offset = (attr & 0x0f00) >> 4; + if (m_debug_blit && SPG_DEBUG_VIDEO) + { + printf("xy:%08x,%08x attr:%08x ctrl:%08x bitmap_addr:%08x tile:%04x\n", xoff, yoff, attr, ctrl, bitmap_addr, tile); + printf("hw:%d,%d f:%d,%d fm:%d,%d ncols:%d pobs:%02x ", w, h, (attr & TILE_X_FLIP) ? 1 : 0, (attr & TILE_Y_FLIP) ? 1 : 0, xflipmask, yflipmask, nc, palette_offset); + } + palette_offset >>= nc; + palette_offset <<= nc; + if (m_debug_blit && SPG_DEBUG_VIDEO) + { + printf("poas:%02x\n", palette_offset); + } + + uint32_t m = bitmap_addr + nc * w*h / 16 * tile; + uint32_t bits = 0; + uint32_t nbits = 0; + + for (uint32_t y = 0; y < h; y++) + { + int yy = (yoff + (y ^ yflipmask)) & 0x1ff; + if (yy >= 0x01c0) + yy -= 0x0200; + + if (m_debug_blit && SPG_DEBUG_VIDEO) + printf("%3d:\n", yy); + + for (uint32_t x = 0; x < w; x++) + { + int xx = xoff + (x ^ xflipmask); + + bits <<= nc; + if (m_debug_blit && SPG_DEBUG_VIDEO) + printf(" %08x:%d ", bits, nbits); + if (nbits < nc) + { + uint16_t b = space.read_word(m++ & 0x3fffff); + b = (b << 8) | (b >> 8); + bits |= b << (nc - nbits); + nbits += 16; + if (m_debug_blit && SPG_DEBUG_VIDEO) + printf("(%04x:%08x:%d) ", b, bits, nbits); + } + nbits -= nc; + + uint32_t pal = palette_offset + (bits >> 16); + if (m_debug_blit && SPG_DEBUG_VIDEO) + printf("%02x:%02x:%04x ", bits >> 16, pal, bits & 0xffff); + bits &= 0xffff; + + if ((ctrl & 0x0010) && yy < 240) + xx -= (int16_t)m_scrollram[yy + 15]; + + xx &= 0x01ff; + if (xx >= 0x01c0) + xx -= 0x0200; + + if (xx >= 0 && xx < 320 && yy >= 0 && yy < 240) + { + uint16_t rgb = m_paletteram[pal]; + if (m_debug_blit && SPG_DEBUG_VIDEO) + printf("rgb:%04x ", rgb); + if (!(rgb & 0x8000)) + { + if (attr & 0x4000 || ctrl & 0x0100) + { + if (m_debug_blit && SPG_DEBUG_VIDEO) + printf("M\n"); + mix_pixel(xx + 320 * yy, rgb); + } + else + { + if (m_debug_blit && SPG_DEBUG_VIDEO) + printf("S\n"); + set_pixel(xx + 320 * yy, rgb); + } + } + else if (m_debug_blit && SPG_DEBUG_VIDEO) + { + printf("X\n"); + } + } + } + } +} + +void spg2xx_device::blit_page(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth, uint32_t bitmap_addr, uint16_t *regs) +{ + uint32_t xscroll = regs[0]; + uint32_t yscroll = regs[1]; + uint32_t attr = regs[2]; + uint32_t ctrl = regs[3]; + uint32_t tilemap = regs[4]; + uint32_t palette_map = regs[5]; + address_space &space = m_cpu->space(AS_PROGRAM); + + if (!(ctrl & PAGE_ENABLE_MASK)) + { + return; + } + + if (((attr & PAGE_DEPTH_FLAG_MASK) >> PAGE_DEPTH_FLAG_SHIFT) != depth) + { + return; + } + + uint32_t h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT); + uint32_t w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT); + + uint32_t hn = 256 / h; + uint32_t wn = 512 / w; + + for (uint32_t y0 = 0; y0 < hn; y0++) + { + for (uint32_t x0 = 0; x0 < wn; x0++) + { + uint16_t tile = (ctrl & PAGE_BLANK_MASK) ? 0 : space.read_word(tilemap + x0 + wn * y0); + uint16_t palette = 0; + uint32_t xx, yy; + + if (!tile) + { + continue; + } + + palette = space.read_word(palette_map + (x0 + wn * y0) / 2); + if (x0 & 1) + { + palette >>= 8; + } + + uint32_t tileattr = attr; + uint32_t tilectrl = ctrl; + if ((ctrl & 2) == 0) + { // -(1) bld(1) flip(2) pal(4) + tileattr &= ~0x000c; + tileattr |= (palette >> 2) & 0x000c; // flip + + tileattr &= ~0x0f00; + tileattr |= (palette << 8) & 0x0f00; // palette + + tilectrl &= ~0x0100; + tilectrl |= (palette << 2) & 0x0100; // blend + } + + yy = ((h*y0 - yscroll + 0x10) & 0xff) - 0x10; + xx = (w*x0 - xscroll) & 0x1ff; + + blit(bitmap, cliprect, xx, yy, tileattr, tilectrl, bitmap_addr, tile); + } + } +} + +void spg2xx_device::blit_sprite(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth, uint32_t base_addr) +{ + address_space &space = m_cpu->space(AS_PROGRAM); + uint32_t bitmap_addr = 0x40 * m_video_regs[0x22]; + + uint16_t tile = space.read_word(base_addr + 0); + int16_t x = space.read_word(base_addr + 1); + int16_t y = space.read_word(base_addr + 2); + uint16_t attr = space.read_word(base_addr + 3); + + if (!tile) + { + return; + } + + if (((attr & PAGE_DEPTH_FLAG_MASK) >> PAGE_DEPTH_FLAG_SHIFT) != depth) + { + return; + } + + if (!(m_video_regs[0x42] & SPRITE_COORD_TL_MASK)) + { + x = 160 + x; + y = 120 - y; + + uint32_t h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT); + uint32_t w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT); + + x -= (w / 2); + y -= (h / 2) - 8; + } + + x &= 0x01ff; + y &= 0x01ff; + +#if SPG_DEBUG_VIDEO + if (m_debug_sprites && machine().input().code_pressed(KEYCODE_MINUS)) + m_debug_blit = true; + blit(bitmap, cliprect, x, y, attr, 0, bitmap_addr, tile); + m_debug_blit = false; +#else + blit(bitmap, cliprect, x, y, attr, 0, bitmap_addr, tile); +#endif +} + +void spg2xx_device::blit_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth) +{ + if (!(m_video_regs[0x42] & SPRITE_ENABLE_MASK)) + { + return; + } + +#if SPG_DEBUG_VIDEO + if (!m_debug_sprites) + { +#endif + for (uint32_t n = 0; n < m_sprite_limit; n++) + { + blit_sprite(bitmap, cliprect, depth, 0x2c00 + 4 * n); + } +#if SPG_DEBUG_VIDEO + } + else + { + blit_sprite(bitmap, cliprect, depth, 0x2c00 + 4 * m_sprite_index_to_debug); + } +#endif +} + +uint32_t spg2xx_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + memset(&m_screenbuf[320 * cliprect.min_y], 0, 3 * 320 * ((cliprect.max_y - cliprect.min_y) + 1)); + + for (int i = 0; i < 4; i++) + { + if (!m_hide_page0) + blit_page(bitmap, cliprect, i, 0x40 * m_video_regs[0x20], m_video_regs + 0x10); + if (!m_hide_page1) + blit_page(bitmap, cliprect, i, 0x40 * m_video_regs[0x21], m_video_regs + 0x16); + if (!m_hide_sprites) + blit_sprites(bitmap, cliprect, i); + } + + bitmap.fill(0, cliprect); + for (int y = cliprect.min_y; y <= cliprect.max_y; y++) + { + for (int x = cliprect.min_x; x <= cliprect.max_x; x++) + { + bitmap.pix32(y, x) = (m_screenbuf[x + 320 * y].r << 16) | (m_screenbuf[x + 320 * y].g << 8) | m_screenbuf[x + 320 * y].b; + } + } + + return 0; +} + +void spg2xx_device::do_video_dma(uint32_t len) +{ + address_space &mem = m_cpu->space(AS_PROGRAM); + + uint32_t src = m_video_regs[0x70] & 0x3fff; + uint32_t dst = (m_video_regs[0x71] & 0x3ff) + 0x2c00; + + for (uint32_t j = 0; j < len; j++) + { + mem.write_word(dst + j, mem.read_word(src + j)); + } + + m_video_regs[0x72] = 0; + VIDEO_IRQ_STATUS |= 4; +} + +READ16_MEMBER(spg2xx_device::video_r) +{ + switch (offset) + { + case 0x38: // Current Line + verboselog(3, "video_r: Current Line: %04x\n", m_screen->vpos()); + return m_screen->vpos(); + + case 0x62: // Video IRQ Enable + verboselog(0, "video_r: Video IRQ Enable: %04x\n", VIDEO_IRQ_ENABLE); + return VIDEO_IRQ_ENABLE; + + case 0x63: // Video IRQ Status + verboselog(0, "video_r: Video IRQ Status: %04x\n", VIDEO_IRQ_STATUS); + return VIDEO_IRQ_STATUS; + + default: + verboselog(0, "video_r: Unknown register %04x = %04x\n", 0x2800 + offset, m_video_regs[offset]); + break; + } + return m_video_regs[offset]; +} + +WRITE16_MEMBER(spg2xx_device::video_w) +{ + switch (offset) + { + case 0x10: // Page 1 X scroll + verboselog(4, "video_w: Page 1 X Scroll: %04x = %04x\n", 0x2800 | offset, data & 0x01ff); + m_video_regs[offset] = data & 0x01ff; + break; + + case 0x16: // Page 2 X scroll + verboselog(4, "video_w: Page 2 X Scroll: %04x = %04x\n", 0x2800 | offset, data & 0x01ff); + m_video_regs[offset] = data & 0x01ff; + break; + + case 0x11: // Page 1 Y scroll + verboselog(4, "video_w: Page 1 Y Scroll: %04x = %04x\n", 0x2800 | offset, data & 0x00ff); + m_video_regs[offset] = data & 0x00ff; + break; + + case 0x17: // Page 2 Y scroll + verboselog(4, "video_w: Page 2 Y Scroll: %04x = %04x\n", 0x2800 | offset, data & 0x00ff); + m_video_regs[offset] = data & 0x00ff; + break; + + case 0x36: // IRQ pos V + case 0x37: // IRQ pos H + m_video_regs[offset] = data & 0x01ff; + verboselog(0, "video_w: Video IRQ Position: %04x,%04x (%04x)\n", m_video_regs[0x37], m_video_regs[0x36], 0x2800 | offset); + if (m_video_regs[0x37] < 160 && m_video_regs[0x36] < 240) + m_screenpos_timer->adjust(m_screen->time_until_pos(m_video_regs[0x36], m_video_regs[0x37] << 1)); + else + m_screenpos_timer->adjust(attotime::never); + break; + + case 0x62: // Video IRQ Enable + { + verboselog(0, "video_w: Video IRQ Enable = %04x (%04x)\n", data, mem_mask); + const uint16_t old = VIDEO_IRQ_ENABLE & VIDEO_IRQ_STATUS; + COMBINE_DATA(&VIDEO_IRQ_ENABLE); + const uint16_t changed = old ^ (VIDEO_IRQ_ENABLE & VIDEO_IRQ_STATUS); + if (changed) + check_video_irq(); + break; + } + + case 0x63: // Video IRQ Acknowledge + { + verboselog(0, "video_w: Video IRQ Acknowledge = %04x (%04x)\n", data, mem_mask); + const uint16_t old = VIDEO_IRQ_ENABLE & VIDEO_IRQ_STATUS; + VIDEO_IRQ_STATUS &= ~data; + verboselog(4, "Setting video IRQ status to %04x\n", VIDEO_IRQ_STATUS); + const uint16_t changed = old ^ (VIDEO_IRQ_ENABLE & VIDEO_IRQ_STATUS); + if (changed) + check_video_irq(); + break; + } + + case 0x70: // Video DMA Source + verboselog(0, "video_w: Video DMA Source = %04x (%04x)\n", data, mem_mask); + COMBINE_DATA(&m_video_regs[offset]); + break; + + case 0x71: // Video DMA Dest + verboselog(0, "video_w: Video DMA Dest = %04x (%04x)\n", data, mem_mask); + COMBINE_DATA(&m_video_regs[offset]); + break; + + case 0x72: // Video DMA Length + verboselog(0, "video_w: Video DMA Length = %04x (%04x)\n", data, mem_mask); + do_video_dma(data & 0x3ff); + break; + + default: + verboselog(0, "video_w: Unknown register %04x = %04x (%04x)\n", 0x2800 + offset, data, mem_mask); + COMBINE_DATA(&m_video_regs[offset]); + break; + } +} + +WRITE_LINE_MEMBER(spg2xx_device::vblank) +{ + if (!state) + return; + +#if SPG_DEBUG_VIDEO + if (machine().input().code_pressed_once(KEYCODE_5)) + m_hide_page0 = !m_hide_page0; + if (machine().input().code_pressed_once(KEYCODE_6)) + m_hide_page1 = !m_hide_page1; + if (machine().input().code_pressed_once(KEYCODE_7)) + m_hide_sprites = !m_hide_sprites; + if (machine().input().code_pressed_once(KEYCODE_8)) + m_debug_sprites = !m_debug_sprites; + if (machine().input().code_pressed_once(KEYCODE_9)) + m_sprite_index_to_debug--; + if (machine().input().code_pressed_once(KEYCODE_0)) + m_sprite_index_to_debug++; +#endif + + const uint16_t old = VIDEO_IRQ_ENABLE & VIDEO_IRQ_STATUS; + VIDEO_IRQ_STATUS |= 1; + verboselog(4, "Setting video IRQ status to %04x\n", VIDEO_IRQ_STATUS); + const uint16_t changed = old ^ (VIDEO_IRQ_ENABLE & VIDEO_IRQ_STATUS); + if (changed) + check_video_irq(); + + // For now, manually trigger controller IRQs + if (IO_IRQ_ENABLE & 0x2100) + { + IO_IRQ_STATUS |= 0x0100; + m_cpu->set_input_line(UNSP_IRQ3_LINE, ASSERT_LINE); + } +} + +void spg2xx_device::check_video_irq() +{ + m_cpu->set_input_line(UNSP_IRQ0_LINE, (VIDEO_IRQ_STATUS & VIDEO_IRQ_ENABLE) ? ASSERT_LINE : CLEAR_LINE); +} + + +/************************* +* Machine Hardware * +*************************/ + +READ16_MEMBER(spg2xx_device::audio_r) +{ + switch (offset) + { + default: + verboselog(4, "audio_r: Unknown register %04x\n", 0x3000 + offset); + break; + } + return 0; +} + +WRITE16_MEMBER(spg2xx_device::audio_w) +{ + switch (offset) + { + default: + verboselog(5, "audio_w: Unknown register %04x = %04x (%04x)\n", 0x3000 + offset, data, mem_mask); + break; + } +} + +READ16_MEMBER(spg2xx_device::io_r) +{ + static const char *const gpioregs[] = { "GPIO Data Port", "GPIO Buffer Port", "GPIO Direction Port", "GPIO Attribute Port", "GPIO IRQ/Latch Port" }; + static const char gpioports[] = { 'A', 'B', 'C' }; + + uint16_t val = m_io_regs[offset]; + + switch (offset) + { + case 0x01: case 0x06: case 0x0b: // GPIO Data Port A/B/C + do_gpio(offset); + verboselog(3, "io_r: %s %c = %04x (%04x)\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], m_io_regs[offset], mem_mask); + val = m_io_regs[offset]; + break; + + case 0x02: case 0x03: case 0x04: case 0x05: + case 0x07: case 0x08: case 0x09: case 0x0a: + case 0x0c: case 0x0d: case 0x0e: case 0x0f: // Other GPIO regs + verboselog(3, "io_r: %s %c = %04x (%04x)\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], m_io_regs[offset], mem_mask); + break; + + case 0x1c: // Video line counter + val = m_screen->vpos(); + verboselog(3, "io_r: Video Line = %04x (%04x)\n", val, mem_mask); + break; + + case 0x21: // IRQ Control + verboselog(3, "io_r: Controller IRQ Control = %04x (%04x)\n", val, mem_mask); + break; + + case 0x22: // IRQ Status + verboselog(3, "io_r: Controller IRQ Status = %04x (%04x)\n", val, mem_mask); + break; + + case 0x2b: + return 0x0000; + + case 0x2c: case 0x2d: // PRNG 0/1 + val = machine().rand() & 0x0000ffff; + verboselog(3, "io_r: PRNG %d = %04x (%04x)\n", offset - 0x2c, val, mem_mask); + break; + + case 0x2f: // Data Segment + val = m_cpu->state_int(UNSP_SR) >> 10; + verboselog(3, "io_r: Data Segment = %04x (%04x)\n", val, mem_mask); + break; + + case 0x31: // UART Status + verboselog(3, "io_r: UART Status = %04x (%04x)\n", 3, mem_mask); + val = 3; // HACK + break; + + case 0x36: // UART RX Data + val = m_uart_rx(); + verboselog(3, "io_r: UART RX Data = %04x (%04x)\n", val, mem_mask); + break; + + case 0x59: // I2C Status + verboselog(3, "io_r: I2C Status = %04x (%04x)\n", val, mem_mask); + break; + + case 0x5e: // I2C Data In + verboselog(3, "io_r: I2C Data In = %04x (%04x)\n", val, mem_mask); + break; + + default: + verboselog(3, "io_r: Unknown register %04x\n", 0x3d00 + offset); + break; + } + + return val; +} + +WRITE16_MEMBER(spg2xx_device::io_w) +{ + static const char *const gpioregs[] = { "GPIO Data Port", "GPIO Buffer Port", "GPIO Direction Port", "GPIO Attribute Port", "GPIO IRQ/Latch Port" }; + static const char gpioports[3] = { 'A', 'B', 'C' }; + + uint16_t temp = 0; + + switch (offset) + { + case 0x00: // GPIO special function select + verboselog(3, "io_w: GPIO Function Select = %04x (%04x)\n", data, mem_mask); + COMBINE_DATA(&m_io_regs[offset]); + break; + + case 0x01: case 0x06: case 0x0b: // GPIO data, port A/B/C + offset++; + // Intentional fallthrough - we redirect data register writes to the buffer register. + + case 0x02: case 0x03: case 0x04: case 0x05: // Port A + case 0x07: case 0x08: case 0x09: case 0x0a: // Port B + case 0x0c: case 0x0d: case 0x0e: case 0x0f: // Port C + verboselog(3, "io_w: %s %c = %04x (%04x)\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], data, mem_mask); + COMBINE_DATA(&m_io_regs[offset]); + do_gpio(offset); + break; + + case 0x10: // timebase control + if ((m_io_regs[offset] & 0x0003) != (data & 0x0003)) + { + uint16_t hz = 8 << (data & 0x0003); + verboselog(3, "*** TMB1 FREQ set to %dHz\n", hz); + m_tmb1->adjust(attotime::from_hz(hz), 0, attotime::from_hz(hz)); + } + if ((m_io_regs[offset] & 0x000c) != (data & 0x000c)) + { + uint16_t hz = 128 << ((data & 0x000c) >> 2); + verboselog(3, "*** TMB2 FREQ set to %dHz\n", hz); + m_tmb2->adjust(attotime::from_hz(hz), 0, attotime::from_hz(hz)); + } + COMBINE_DATA(&m_io_regs[offset]); + break; + + case 0x21: // IRQ Enable + { + verboselog(3, "io_w: IRQ Control = %04x (%04x)\n", data, mem_mask); + const uint16_t old = IO_IRQ_ENABLE & IO_IRQ_STATUS; + COMBINE_DATA(&IO_IRQ_ENABLE); + const uint16_t changed = old ^ (IO_IRQ_ENABLE & IO_IRQ_STATUS); + if (changed) + check_irqs(changed); + break; + } + + case 0x22: // IRQ Acknowledge + { + verboselog(3, "io_w: IRQ Acknowledge = %04x (%04x)\n", data, mem_mask); + const uint16_t old = IO_IRQ_STATUS; + IO_IRQ_STATUS &= ~data; + const uint16_t changed = old ^ (IO_IRQ_ENABLE & IO_IRQ_STATUS); + if (changed) + check_irqs(changed); + break; + } + + case 0x2f: // Data Segment + temp = m_cpu->state_int(UNSP_SR); + m_cpu->set_state_int(UNSP_SR, (temp & 0x03ff) | ((data & 0x3f) << 10)); + verboselog(3, "io_w: Data Segment = %04x (%04x)\n", data, mem_mask); + break; + + case 0x31: // Unknown UART + verboselog(3, "io_w: Unknown UART = %04x (%04x)\n", data, mem_mask); + COMBINE_DATA(&m_io_regs[offset]); + break; + + case 0x32: // UART Reset + verboselog(3, "io_w: UART Reset\n"); + break; + + case 0x33: // UART Baud Rate + verboselog(3, "io_w: UART Baud Rate = %u\n", 27000000 / 16 / (0x10000 - (m_io_regs[0x34] << 8) - data)); + COMBINE_DATA(&m_io_regs[offset]); + break; + + case 0x35: // UART TX Data + verboselog(3, "io_w: UART Baud Rate = %u\n", 27000000 / 16 / (0x10000 - (data << 8) - m_io_regs[0x33])); + COMBINE_DATA(&m_io_regs[offset]); + break; + + case 0x58: // I2C Command + verboselog(3, "io_w: I2C Command = %04x (%04x)\n", data, mem_mask); + COMBINE_DATA(&m_io_regs[offset]); + do_i2c(); + break; + + case 0x59: // I2C Status / Acknowledge + verboselog(3, "io_w: I2C Acknowledge = %04x (%04x)\n", data, mem_mask); + m_io_regs[offset] &= ~data; + break; + + case 0x5a: // I2C Access Mode + verboselog(3, "io_w: I2C Access Mode = %04x (%04x)\n", data, mem_mask); + COMBINE_DATA(&m_io_regs[offset]); + break; + + case 0x5b: // I2C Device Address + verboselog(3, "io_w: I2C Device Address = %04x (%04x)\n", data, mem_mask); + COMBINE_DATA(&m_io_regs[offset]); + break; + + case 0x5c: // I2C Sub-Address + verboselog(3, "io_w: I2C Sub-Address = %04x (%04x)\n", data, mem_mask); + COMBINE_DATA(&m_io_regs[offset]); + break; + + case 0x5d: // I2C Data Out + verboselog(3, "io_w: I2C Data Out = %04x (%04x)\n", data, mem_mask); + COMBINE_DATA(&m_io_regs[offset]); + break; + + case 0x5e: // I2C Data In + verboselog(3, "io_w: I2C Data In = %04x (%04x)\n", data, mem_mask); + COMBINE_DATA(&m_io_regs[offset]); + break; + + case 0x5f: // I2C Controller Mode + verboselog(3, "io_w: I2C Controller Mode = %04x (%04x)\n", data, mem_mask); + COMBINE_DATA(&m_io_regs[offset]); + break; + + case 0x100: // DMA Source (L) + verboselog(3, "io_w: DMA Source (L) 3e00 = %04x (%04x)\n", data, mem_mask); + COMBINE_DATA(&m_io_regs[offset]); + break; + + case 0x101: // DMA Source (H) + verboselog(3, "io_w: DMA Source (H) 3e01 = %04x (%04x)\n", data, mem_mask); + COMBINE_DATA(&m_io_regs[offset]); + break; + + case 0x103: // DMA Destination + verboselog(3, "io_w: DMA Dest 3e03 = %04x (%04x)\n", data, mem_mask); + COMBINE_DATA(&m_io_regs[offset]); + break; + + case 0x102: // DMA Length + verboselog(3, "io_w: DMA Length 3e02 = %04x (%04x)\n", data, mem_mask); + do_cpu_dma(data); + break; + + default: + verboselog(3, "io_w: Unknown register %04x = %04x (%04x)\n", 0x3d00 + offset, data, mem_mask); + COMBINE_DATA(&m_io_regs[offset]); + break; + } +} + +void spg2xx_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ + switch (id) + { + case TIMER_TMB1: + { + const uint16_t old = (IO_IRQ_ENABLE & IO_IRQ_STATUS); + IO_IRQ_STATUS |= 1; + const uint16_t changed = old ^ (IO_IRQ_ENABLE & IO_IRQ_STATUS); + if (changed) + check_irqs(changed); + break; + } + case TIMER_TMB2: + { + const uint16_t old = m_io_regs[0x22] & m_io_regs[0x21]; + IO_IRQ_STATUS |= 2; + const uint16_t changed = old ^ (IO_IRQ_ENABLE & IO_IRQ_STATUS); + if (changed) + check_irqs(changed); + break; + } + case TIMER_SCREENPOS: + { + const uint16_t old = VIDEO_IRQ_ENABLE & VIDEO_IRQ_STATUS; + VIDEO_IRQ_STATUS |= 2; + const uint16_t changed = old ^ (VIDEO_IRQ_ENABLE & VIDEO_IRQ_STATUS); + if (changed) + { + check_video_irq(); + } + m_screen->update_partial(m_screen->vpos()); + break; + } + } +} + +void spg2xx_device::check_irqs(const uint16_t changed) +{ + // { + // verboselog(0, "audio 1 IRQ\n"); + // m_cpu->set_input_line(UNSP_IRQ1_LINE, ASSERT_LINE); + // } + if (changed & 0x0c00) // Timer A, Timer B IRQ + { + m_cpu->set_input_line(UNSP_IRQ2_LINE, (IO_IRQ_ENABLE & IO_IRQ_STATUS & 0x0c00) ? ASSERT_LINE : CLEAR_LINE); + } + + if (changed & 0x2100) // UART, ADC IRQ + m_cpu->set_input_line(UNSP_IRQ3_LINE, (IO_IRQ_ENABLE & IO_IRQ_STATUS & 0x2100) ? ASSERT_LINE : CLEAR_LINE); + + // { + // verboselog(0, "audio 4 IRQ\n"); + // m_cpu->set_input_line(UNSP_IRQ4_LINE, ASSERT_LINE); + // } + + if (changed & 0x1200) // External IRQ + { + m_cpu->set_input_line(UNSP_IRQ5_LINE, (IO_IRQ_ENABLE & IO_IRQ_STATUS & 0x1200) ? ASSERT_LINE : CLEAR_LINE); + } + + if (changed & 0x0070) // 1024Hz, 2048Hz, 4096Hz IRQ + { + m_cpu->set_input_line(UNSP_IRQ6_LINE, (IO_IRQ_ENABLE & IO_IRQ_STATUS & 0x0070) ? ASSERT_LINE : CLEAR_LINE); + } + + if (changed & 0x008b) // TMB1, TMB2, 4Hz, key change IRQ + { + m_cpu->set_input_line(UNSP_IRQ7_LINE, (IO_IRQ_ENABLE & IO_IRQ_STATUS & 0x008b) ? ASSERT_LINE : CLEAR_LINE); + } +} + +void spg2xx_device::do_gpio(uint32_t offset) +{ + uint32_t index = (offset - 1) / 5; + uint16_t buffer = m_io_regs[5 * index + 2]; + uint16_t dir = m_io_regs[5 * index + 3]; + uint16_t attr = m_io_regs[5 * index + 4]; + uint16_t special = m_io_regs[5 * index + 5]; + + uint16_t push = dir; + uint16_t pull = (~dir) & (~attr); + uint16_t what = (buffer & (push | pull)); + what ^= (dir & ~attr); + what &= ~special; + + switch (index) + { + case 0: + m_porta_out(what); + what = (what & ~pull) | (m_porta_in() & pull); + break; + case 1: + m_portb_out(what); + what = (what & ~pull) | (m_portb_in() & pull); + break; + case 2: + m_portc_out(what); + what = (what & ~pull) | (m_portc_in() & pull); + break; + } + + m_io_regs[5 * index + 1] = what; +} + +void spg2xx_device::do_i2c() +{ + const uint16_t addr = ((m_io_regs[0x5b] & 0x06) << 7) | (uint8_t)m_io_regs[0x5c]; + + if (m_io_regs[0x58] & 0x40) // Serial EEPROM read + m_io_regs[0x5e] = m_eeprom_r(addr); + else + m_eeprom_w(addr, m_io_regs[0x5d]); + + m_io_regs[0x59] |= 1; +} + +void spg2xx_device::do_cpu_dma(uint32_t len) +{ + address_space &mem = m_cpu->space(AS_PROGRAM); + + uint32_t src = ((m_io_regs[0x101] & 0x3f) << 16) | m_io_regs[0x100]; + uint32_t dst = m_io_regs[0x103] & 0x3fff; + + for (uint32_t j = 0; j < len; j++) + { + mem.write_word(dst + j, mem.read_word(src + j)); + } + + m_io_regs[0x102] = 0; +} diff --git a/src/devices/machine/spg2xx.h b/src/devices/machine/spg2xx.h new file mode 100644 index 00000000000..61b564df2fb --- /dev/null +++ b/src/devices/machine/spg2xx.h @@ -0,0 +1,179 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz +/***************************************************************************** + + SunPlus SPG2xx-series SoC peripheral emulation + + TODO: + - Serial UART + - I2C + - SPI + +**********************************************************************/ + +#ifndef DEVICES_MACHINE_SPG2XX_H +#define DEVICES_MACHINE_SPG2XX_H + +#pragma once + +#include "emu.h" +#include "cpu/unsp/unsp.h" +#include "screen.h" + +class spg2xx_device : public device_t +{ +public: + spg2xx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + void map(address_map &map); + + auto porta_out() { return m_porta_out.bind(); } + auto portb_out() { return m_portb_out.bind(); } + auto portc_out() { return m_portc_out.bind(); } + auto porta_in() { return m_porta_in.bind(); } + auto portb_in() { return m_portb_in.bind(); } + auto portc_in() { return m_portc_in.bind(); } + + auto eeprom_w() { return m_eeprom_w.bind(); } + auto eeprom_r() { return m_eeprom_r.bind(); } + + auto uart_tx() { return m_uart_tx.bind(); } + auto uart_rx() { return m_uart_rx.bind(); } + + uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + DECLARE_WRITE_LINE_MEMBER(vblank); + +protected: + spg2xx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const size_t sprite_limit) + : spg2xx_device(mconfig, type, tag, owner, clock) + { + m_sprite_limit = sprite_limit; + } + + enum + { + PAGE_ENABLE_MASK = 0x0008, + PAGE_BLANK_MASK = 0x0004, + + SPRITE_ENABLE_MASK = 0x0001, + SPRITE_COORD_TL_MASK = 0x0002, + + PAGE_DEPTH_FLAG_MASK = 0x3000, + PAGE_DEPTH_FLAG_SHIFT = 12, + PAGE_TILE_HEIGHT_MASK = 0x00c0, + PAGE_TILE_HEIGHT_SHIFT = 6, + PAGE_TILE_WIDTH_MASK = 0x0030, + PAGE_TILE_WIDTH_SHIFT = 4, + TILE_X_FLIP = 0x0004, + TILE_Y_FLIP = 0x0008 + }; + + DECLARE_READ16_MEMBER(video_r); + DECLARE_WRITE16_MEMBER(video_w); + DECLARE_READ16_MEMBER(audio_r); + DECLARE_WRITE16_MEMBER(audio_w); + DECLARE_READ16_MEMBER(io_r); + DECLARE_WRITE16_MEMBER(io_w); + + void check_irqs(const uint16_t changed); + inline void check_video_irq(); + + void spg2xx_map(address_map &map); + + static const device_timer_id TIMER_TMB1 = 0; + static const device_timer_id TIMER_TMB2 = 1; + static const device_timer_id TIMER_SCREENPOS = 2; + + virtual void device_start() override; + virtual void device_reset() override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + + void do_gpio(uint32_t offset); + void do_i2c(); + void do_video_dma(uint32_t len); + void do_cpu_dma(uint32_t len); + + void blit(bitmap_rgb32 &bitmap, const rectangle &cliprect, uint32_t xoff, uint32_t yoff, uint32_t attr, uint32_t ctrl, uint32_t bitmap_addr, uint16_t tile); + void blit_page(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth, uint32_t bitmap_addr, uint16_t *regs); + void blit_sprite(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth, uint32_t base_addr); + void blit_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth); + inline uint8_t expand_rgb5_to_rgb8(uint8_t val); + inline uint8_t mix_channel(uint8_t a, uint8_t b); + void mix_pixel(uint32_t offset, uint16_t rgb); + void set_pixel(uint32_t offset, uint16_t rgb); + + inline void verboselog(int n_level, const char *s_fmt, ...) ATTR_PRINTF(3, 4); + + struct + { + uint8_t r, g, b; + } + m_screenbuf[320 * 240]; + + bool m_hide_page0; + bool m_hide_page1; + bool m_hide_sprites; + bool m_debug_sprites; + bool m_debug_blit; + uint8_t m_sprite_index_to_debug; + + uint16_t m_video_regs[0x100]; + uint16_t m_io_regs[0x200]; + size_t m_sprite_limit; + + devcb_write16 m_porta_out; + devcb_write16 m_portb_out; + devcb_write16 m_portc_out; + devcb_read16 m_porta_in; + devcb_read16 m_portb_in; + devcb_read16 m_portc_in; + + devcb_write8 m_eeprom_w; + devcb_read8 m_eeprom_r; + + devcb_write8 m_uart_tx; + devcb_read8 m_uart_rx; + + emu_timer *m_tmb1; + emu_timer *m_tmb2; + emu_timer *m_screenpos_timer; + + required_device<cpu_device> m_cpu; + required_device<screen_device> m_screen; + required_shared_ptr<uint16_t> m_scrollram; + required_shared_ptr<uint16_t> m_paletteram; + required_shared_ptr<uint16_t> m_spriteram; +}; + +class spg24x_device : public spg2xx_device +{ +public: + template <typename T, typename U> + spg24x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag, U &&screen_tag) + : spg24x_device(mconfig, tag, owner, clock) + { + m_cpu.set_tag(std::forward<T>(cpu_tag)); + m_screen.set_tag(std::forward<U>(screen_tag)); + } + + spg24x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + +class spg28x_device : public spg2xx_device +{ +public: + template <typename T, typename U> + spg28x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag, U &&screen_tag) + : spg28x_device(mconfig, tag, owner, clock) + { + m_cpu.set_tag(std::forward<T>(cpu_tag)); + m_screen.set_tag(std::forward<U>(screen_tag)); + } + + spg28x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + +DECLARE_DEVICE_TYPE(SPG24X, spg24x_device) +DECLARE_DEVICE_TYPE(SPG28X, spg28x_device) + +#endif // DEVICES_MACHINE_SPG2XX_H diff --git a/src/devices/machine/sun4c_mmu.cpp b/src/devices/machine/sun4c_mmu.cpp index eabc5c073b4..0f5272a1c43 100644 --- a/src/devices/machine/sun4c_mmu.cpp +++ b/src/devices/machine/sun4c_mmu.cpp @@ -12,6 +12,25 @@ DEFINE_DEVICE_TYPE(SUN4C_MMU, sun4c_mmu_device, "sun4c_mmu", "Sun 4C MMU") +#define LOG_PAGE_MAP (1U << 0) +#define LOG_SEGMENT_MAP (1U << 1) +#define LOG_INVALID_PTE (1U << 2) +#define LOG_SYSTEM (1U << 3) +#define LOG_CONTEXT (1U << 4) +#define LOG_SYSTEM_ENABLE (1U << 5) +#define LOG_BUSERROR (1U << 6) +#define LOG_CACHE_TAGS (1U << 7) +#define LOG_CACHE_DATA (1U << 8) +#define LOG_UNKNOWN_SYSTEM (1U << 9) +#define LOG_UNKNOWN_SEGMENT (1U << 10) +#define LOG_TYPE0_TIMEOUT (1U << 11) +#define LOG_UNKNOWN_SPACE (1U << 12) +#define LOG_WRITE_PROTECT (1U << 13) +#define LOG_ALL_ASI (1U << 14) // WARNING: Heavy! + +#define VERBOSE (0) +#include "logmacro.h" + sun4c_mmu_device::sun4c_mmu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, SUN4C_MMU, tag, owner, clock) , m_cpu(*this, finder_base::DUMMY_TAG) @@ -42,6 +61,40 @@ void sun4c_mmu_device::device_start() // allocate timer for system reset m_reset_timer = timer_alloc(TIMER_RESET); m_reset_timer->adjust(attotime::never); + + for (int i = 0; i < 16; i++) + { + save_item(NAME(m_segmap[i]), i); + save_item(NAME(m_segmap_masked[i]), i); + } + + for (int i = 0; i < 16384; i++) + { + save_item(NAME(m_pagemap[i].valid), i); + save_item(NAME(m_pagemap[i].writable), i); + save_item(NAME(m_pagemap[i].supervisor), i); + save_item(NAME(m_pagemap[i].uncached), i); + save_item(NAME(m_pagemap[i].accessed), i); + save_item(NAME(m_pagemap[i].modified), i); + save_item(NAME(m_pagemap[i].page), i); + save_item(NAME(m_pagemap[i].type), i); + } + + save_item(NAME(m_cachetags)); + save_item(NAME(m_cachedata)); + save_item(NAME(m_ram_size)); + save_item(NAME(m_ram_size_words)); + save_item(NAME(m_context)); + save_item(NAME(m_context_masked)); + save_item(NAME(m_system_enable)); + save_item(NAME(m_fetch_bootrom)); + save_item(NAME(m_buserr)); + save_item(NAME(m_page_valid)); + save_item(NAME(m_ctx_mask)); + save_item(NAME(m_pmeg_mask)); + save_item(NAME(m_ram_set_mask)); + save_item(NAME(m_ram_set_base)); + save_item(NAME(m_populated_ram_words)); } void sun4c_mmu_device::device_reset() @@ -50,6 +103,29 @@ void sun4c_mmu_device::device_reset() m_ram_ptr = (uint32_t *)m_ram->pointer(); m_ram_size = m_ram->size(); m_ram_size_words = m_ram_size >> 2; + const uint32_t num_16meg_sets = m_ram_size / 0x1000000; + const uint32_t leftover_4meg_size = m_ram_size % 0x1000000; + const uint32_t num_4meg_sets = leftover_4meg_size / 0x400000; + uint32_t base = 0; + uint32_t set = 0; + for (; set < num_16meg_sets; set++) + { + m_ram_set_base[set] = base; + m_ram_set_mask[set] = 0x003fffff; + base += 0x1000000 >> 2; + } + for (; set < num_16meg_sets+num_4meg_sets; set++) + { + m_ram_set_base[set] = base; + m_ram_set_mask[set] = 0x000fffff; + base += 0x400000 >> 2; + } + for (; set < 4; set++) + { + m_ram_set_mask[set] = 0; + m_ram_set_base[set] = 0; + } + m_populated_ram_words = (num_16meg_sets + num_4meg_sets) * (0x1000000 >> 2); m_context = 0; m_context_masked = 0; @@ -71,7 +147,6 @@ void sun4c_mmu_device::device_timer(emu_timer &timer, device_timer_id id, int pa { m_reset_timer->adjust(attotime::never); m_cpu->set_input_line(SPARC_RESET, CLEAR_LINE); - //printf("Clearing reset line\n"); } } @@ -85,7 +160,7 @@ uint32_t sun4c_mmu_device::fetch_insn(const bool supervisor, const uint32_t offs uint32_t sun4c_mmu_device::read_asi(uint8_t asi, uint32_t offset, uint32_t mem_mask) { - //logerror("read_asi %d: %08x & %08x\n", asi, offset << 2, mem_mask); + LOGMASKED(LOG_ALL_ASI, "read_asi %d: %08x & %08x\n", asi, offset << 2, mem_mask); switch (asi) { case 2: @@ -114,7 +189,7 @@ uint32_t sun4c_mmu_device::read_asi(uint8_t asi, uint32_t offset, uint32_t mem_m void sun4c_mmu_device::write_asi(uint8_t asi, uint32_t offset, uint32_t data, uint32_t mem_mask) { - //logerror("write_asi %d: %08x = %08x & %08x\n", asi, offset << 2, data, mem_mask); + LOGMASKED(LOG_ALL_ASI, "write_asi %d: %08x = %08x & %08x\n", asi, offset << 2, data, mem_mask); switch (asi) { case 2: @@ -161,34 +236,41 @@ void sun4c_mmu_device::cache_flush_w() uint32_t sun4c_mmu_device::system_r(const uint32_t offset, const uint32_t mem_mask) { - //logerror("%s: system_r: %08x & %08x\n", machine().describe_context(), offset << 2, mem_mask); + LOGMASKED(LOG_SYSTEM, "%s: system_r: %08x & %08x\n", machine().describe_context(), offset << 2, mem_mask); switch (offset >> 26) { case 3: // context reg - if (mem_mask == 0x00ff0000) return m_context<<16; + { + if (mem_mask == 0x00ff0000) + { + LOGMASKED(LOG_CONTEXT, "sun4c_mmu: read context %08x & %08x = %08x\n", offset << 2, mem_mask, m_context<<16); + return m_context<<16; + } + LOGMASKED(LOG_CONTEXT, "sun4c_mmu: read context %08x & %08x = %08x\n", offset << 2, mem_mask, m_context<<24); return m_context<<24; + } case 4: // system enable reg + LOGMASKED(LOG_SYSTEM_ENABLE, "sun4c_mmu: read system enable %08x & %08x = %08x\n", offset << 2, mem_mask, m_system_enable<<24); return m_system_enable<<24; case 6: // bus error register { - //printf("sun4c_mmu: read buserror %08x, PC=%x (mask %08x)\n", 0x60000000 | (offset << 2), m_cpu->pc(), mem_mask); - const uint32_t retval = m_buserr[offset & 0xf]; + const uint32_t ret = m_buserr[offset & 0xf]; + LOGMASKED(LOG_BUSERROR, "sun4c_mmu: read buserror %08x & %08x = %08x, PC=%x\n", 0x60000000 | (offset << 2), mem_mask, ret, m_cpu->pc()); m_buserr[offset & 0xf] = 0; // clear on reading - return retval; + return ret; } case 8: // (d-)cache tags - //logerror("sun4_mmu: read dcache tags @ %x, PC = %x\n", offset, m_cpu->pc()); - return m_cachetags[(offset >> 3) & 0x3fff]; + LOGMASKED(LOG_CACHE_TAGS, "sun4_mmu: read dcache tags @ %x, PC = %x\n", offset, m_cpu->pc()); + return m_cachetags[offset & 0x3fff]; case 9: // (d-)cache data - //logerror("sun4c_mmu: read dcache data @ %x, PC = %x\n", offset, m_cpu->pc()); + LOGMASKED(LOG_CACHE_DATA, "sun4c_mmu: read dcache data @ %x, PC = %x\n", offset, m_cpu->pc()); return m_cachedata[offset & 0x3fff]; case 0xf: // UART bypass - //printf("sun4c_mmu: read UART bypass @ %x mask %08x\n", offset<<2, mem_mask); switch (offset & 3) { case 0: if (mem_mask == 0xff000000) return m_scc->cb_r(0)<<24; else return m_scc->db_r(0)<<8; break; @@ -198,26 +280,28 @@ uint32_t sun4c_mmu_device::system_r(const uint32_t offset, const uint32_t mem_ma case 0: // IDPROM - SPARCstation-1 does not have an ID prom and a timeout should occur. default: - logerror("%s: sun4c_mmu: ASI 2 space unhandled read @ %x\n", machine().describe_context(), offset<<2); + LOGMASKED(LOG_UNKNOWN_SYSTEM, "read unhandled ASI 2 space %08x & %08x\n", offset << 2, mem_mask); return 0; } } void sun4c_mmu_device::system_w(const uint32_t offset, const uint32_t data, const uint32_t mem_mask) { - //logerror("%s: system_w: %08x = %08x & %08x\n", machine().describe_context(), offset << 2, data, mem_mask); + LOGMASKED(LOG_SYSTEM, "system_w: %08x = %08x & %08x\n", offset << 2, data, mem_mask); switch (offset >> 26) { case 3: // context reg - //printf("%08x to context, mask %08x, offset %x\n", data, mem_mask, offset); + LOGMASKED(LOG_CONTEXT, "write context = %08x & %08x\n", data, mem_mask); m_context = data >> 24; m_context_masked = m_context & m_ctx_mask; + m_cache_context = m_context & m_ctx_mask; m_curr_segmap = m_segmap[m_context_masked]; m_curr_segmap_masked = m_segmap_masked[m_context_masked]; return; case 4: // system enable reg { + LOGMASKED(LOG_SYSTEM_ENABLE, "write system enable = %08x & %08x\n", data, mem_mask); m_system_enable = data >> 24; m_fetch_bootrom = !(m_system_enable & ENA_NOTBOOT); @@ -225,9 +309,7 @@ void sun4c_mmu_device::system_w(const uint32_t offset, const uint32_t data, cons { m_reset_timer->adjust(attotime::from_usec(1)); m_cpu->set_input_line(SPARC_RESET, ASSERT_LINE); - //logerror("%s: Asserting reset line\n", machine().describe_context()); } - //printf("%08x to system enable, mask %08x\n", data, mem_mask); if (m_system_enable & ENA_RESET) { m_system_enable = 0; @@ -238,22 +320,31 @@ void sun4c_mmu_device::system_w(const uint32_t offset, const uint32_t data, cons } case 6: // bus error - //logerror("%08x to bus error @ %x, mask %08x\n", data, offset, mem_mask); - m_buserr[offset & 0xf] = data; + { + const uint32_t masked_offset = offset & 0xf; + LOGMASKED(LOG_BUSERROR, "write bus error %08x = %08x & %08x\n", offset << 2, data, mem_mask); + if (masked_offset == 0) + m_buserr[0] = (data & 0x000000ff) | 0x00008000; + else if (masked_offset == 1) + m_buserr[1] = data; + else if (masked_offset == 2) + m_buserr[2] = data & 0x000000b0; + else if (masked_offset == 3) + m_buserr[3] = (data & 0x3fffffff) | ((data & 0x20000000) << 1) | ((data & 0x20000000) << 2); return; + } case 8: // cache tags - //logerror("sun4: %08x to cache tags @ %x, PC = %x\n", data, offset, m_cpu->pc()); - m_cachetags[(offset>>3)&0x3fff] = data & 0x03f8fffc; + LOGMASKED(LOG_CACHE_TAGS, "write cache tags %08x = %08x & %08x\n", offset << 2, data, mem_mask); + m_cachetags[offset&0x3fff] = data & 0x03f8fffc; return; case 9: // cache data - //logerror("sun4c: %08x to cache data @ %x, PC = %x\n", data, offset, m_cpu->pc()); - m_cachedata[offset&0x3fff] = data; + LOGMASKED(LOG_CACHE_DATA, "write cache data %08x = %08x & %08x\n", offset << 2, data, mem_mask); + m_cachedata[offset&0x3fff] = data | (1 << 19); return; case 0xf: // UART bypass - //printf("%08x to UART bypass @ %x, mask %08x\n", data, offset<<2, mem_mask); switch (offset & 3) { case 0: if (mem_mask == 0xff000000) m_scc->cb_w(0, data>>24); else m_scc->db_w(0, data>>8); break; @@ -263,31 +354,35 @@ void sun4c_mmu_device::system_w(const uint32_t offset, const uint32_t data, cons case 0: // IDPROM default: - logerror("sun4c: ASI 2 space unhandled write %x @ %x (mask %08x, PC=%x, shift %x)\n", data, offset<<2, mem_mask, m_cpu->pc(), offset>>26); + LOGMASKED(LOG_UNKNOWN_SYSTEM, "write unhandled ASI 2 space %08x = %08x & %08x, PC=%08x\n", offset << 2, data, mem_mask, m_cpu->pc()); return; } } uint32_t sun4c_mmu_device::segment_map_r(const uint32_t offset, const uint32_t mem_mask) { - //logerror("%s: segment_map_r: %08x & %08x\n", machine().describe_context(), offset << 2, mem_mask); + uint32_t ret = 0; if (mem_mask == 0xffff0000) - return m_curr_segmap[(offset>>16) & 0xfff]<<16; + ret = m_curr_segmap[(offset>>16) & 0xfff]<<16; else if (mem_mask == 0xff000000) - return m_curr_segmap[(offset>>16) & 0xfff]<<24; + ret = m_curr_segmap[(offset>>16) & 0xfff]<<24; + else if (mem_mask == 0xffffffff) + ret = m_curr_segmap[(offset>>16) & 0xfff]; else - logerror("sun4: read segment map w/ unknown mask %08x\n", mem_mask); - return 0; + LOGMASKED(LOG_UNKNOWN_SEGMENT, "read segment map w/ unknown mask %08x & %08x\n", offset << 2, mem_mask); + LOGMASKED(LOG_SEGMENT_MAP, "read segment map %08x & %08x = %08x\n", offset << 2, mem_mask, ret); + return ret; } void sun4c_mmu_device::segment_map_w(const uint32_t offset, const uint32_t data, const uint32_t mem_mask) { - //logerror("segment_map_w: %08x = %08x & %08x\n", machine().describe_context(), offset << 2, data, mem_mask); + LOGMASKED(LOG_SEGMENT_MAP, "write segment map %08x = %08x & %08x\n", offset << 2, data, mem_mask); uint8_t segdata = 0; if (mem_mask == 0xffff0000) segdata = (data >> 16) & 0xff; else if (mem_mask == 0xff000000) segdata = (data >> 24) & 0xff; - else logerror("sun4c: writing segment map with unknown mask %08x, PC=%x\n", mem_mask, m_cpu->pc()); + else if (mem_mask == 0xffffffff) segdata = data & 0xff; + else LOGMASKED(LOG_UNKNOWN_SEGMENT, "write segment map w/ unknown mask %08x = %08x & %08x, PC=%08x\n", offset << 2, data, mem_mask, m_cpu->pc()); const uint32_t seg = (offset>>16) & 0xfff; m_curr_segmap[seg] = segdata; @@ -296,21 +391,23 @@ void sun4c_mmu_device::segment_map_w(const uint32_t offset, const uint32_t data, uint32_t sun4c_mmu_device::page_map_r(const uint32_t offset, const uint32_t mem_mask) { - //logerror("%s: page_map_r: %08x & %08x\n", machine().describe_context(), offset << 2, mem_mask); const uint32_t page = m_curr_segmap_masked[(offset >> 16) & 0xfff] | ((offset >> 10) & 0x3f); - return m_pagemap[page].to_uint(); + const uint32_t ret = m_pagemap[page].to_uint(); + LOGMASKED(LOG_PAGE_MAP, "read page map %08x & %08x (%x) = %08x\n", offset << 2, mem_mask, page, ret); + return ret; } void sun4c_mmu_device::page_map_w(const uint32_t offset, const uint32_t data, const uint32_t mem_mask) { - //logerror("%s: page_map_w: %08x = %08x & %08x\n", machine().describe_context(), offset << 2, data, mem_mask); - const uint32_t page = m_curr_segmap_masked[(offset >> 16) & 0xfff] | ((offset >> 10) & 0x3f); + uint32_t page = m_curr_segmap_masked[(offset >> 16) & 0xfff] | ((offset >> 10) & 0x3f); + LOGMASKED(LOG_PAGE_MAP, "write page map %08x (%x) = %08x & %08x\n", offset << 2, page, data, mem_mask); m_pagemap[page].merge_uint(data, mem_mask); m_page_valid[page] = m_pagemap[page].valid; } void sun4c_mmu_device::type0_timeout_r(const uint32_t offset) { + LOGMASKED(LOG_TYPE0_TIMEOUT, "type 0 read timeout %08x, PC=%08x\n", offset << 2, m_cpu->pc()); m_buserr[0] = 0x20; // read timeout m_buserr[1] = 0x04000000 + (offset << 2); m_host->set_mae(); @@ -318,6 +415,7 @@ void sun4c_mmu_device::type0_timeout_r(const uint32_t offset) void sun4c_mmu_device::type0_timeout_w(const uint32_t offset) { + LOGMASKED(LOG_TYPE0_TIMEOUT, "type 0 write timeout %08x, PC=%08x\n", offset << 2, m_cpu->pc()); m_buserr[0] = 0x8020; // write timeout m_buserr[1] = 0x04000000 + (offset << 2); m_host->set_mae(); @@ -356,7 +454,7 @@ uint32_t sun4c_mmu_device::insn_data_r(const uint32_t offset, const uint32_t mem } // it's translation time - const uint32_t pmeg = m_curr_segmap_masked[(offset >> 16) & 0xfff]; + const uint32_t pmeg = m_curr_segmap_masked[(offset >> 16) & 0xfff];// & m_pmeg_mask; const uint32_t entry_index = pmeg | ((offset >> 10) & 0x3f); if (m_page_valid[entry_index]) @@ -366,15 +464,15 @@ uint32_t sun4c_mmu_device::insn_data_r(const uint32_t offset, const uint32_t mem const uint32_t tmp = entry.page | (offset & 0x3ff); - //printf("sun4c: read translated vaddr %08x to phys %08x type %d, PTE %08x, PC=%x\n", offset<<2, tmp<<2, entry.type, entry.to_uint(), m_cpu->pc()); - switch (entry.type) { case 0: // type 0 space - //return m_type0space->read32(space, tmp, mem_mask); - if (tmp < 0x1000000 >> 2) + if (tmp < m_populated_ram_words) { - return m_ram_ptr[tmp]; + const uint32_t set = (tmp >> 22) & 3; + const uint32_t addr_mask = m_ram_set_mask[set]; + const uint32_t masked_addr = m_ram_set_base[set] + (tmp & addr_mask); + return m_ram_ptr[masked_addr]; } else if (tmp >= 0x4000000 >> 2 && tmp < 0x10000000 >> 2) { @@ -386,7 +484,7 @@ uint32_t sun4c_mmu_device::insn_data_r(const uint32_t offset, const uint32_t mem return m_type1_r(tmp, mem_mask); default: - //logerror("sun4c_mmu: access to memory type not defined in sun4c\n"); + LOGMASKED(LOG_UNKNOWN_SPACE, "read unknown space type %d, %08x & %08x, PC=%08x\n", entry.type, tmp << 2, mem_mask, m_cpu->pc()); m_host->set_mae(); m_buserr[0] = 0x20; m_buserr[1] = offset << 2; @@ -397,7 +495,7 @@ uint32_t sun4c_mmu_device::insn_data_r(const uint32_t offset, const uint32_t mem { if (!machine().side_effects_disabled()) { - //logerror("sun4c: INVALID PTE entry %d %08x accessed! vaddr=%x PC=%x\n", entry_index, m_pagemap[entry_index].to_uint(), offset <<2, m_cpu->pc()); + LOGMASKED(LOG_INVALID_PTE, "read invalid PTE %d (%08x), %08x & %08x, PC=%08x\n", entry_index, m_pagemap[entry_index].to_uint(), offset << 2, mem_mask, m_cpu->pc()); m_host->set_mae(); m_buserr[0] |= 0x80; // invalid PTE m_buserr[0] &= ~0x8000; // read @@ -431,7 +529,7 @@ template <sun4c_mmu_device::insn_data_mode MODE> void sun4c_mmu_device::insn_data_w(const uint32_t offset, const uint32_t data, const uint32_t mem_mask) { // it's translation time - const uint32_t pmeg = m_curr_segmap_masked[(offset >> 16) & 0xfff]; + const uint32_t pmeg = m_curr_segmap_masked[(offset >> 16) & 0xfff];// & m_pmeg_mask; const uint32_t entry_index = pmeg | ((offset >> 10) & 0x3f); if (m_page_valid[entry_index]) @@ -439,7 +537,7 @@ void sun4c_mmu_device::insn_data_w(const uint32_t offset, const uint32_t data, c page_entry_t &entry = m_pagemap[entry_index]; if ((!entry.writable) || (entry.supervisor && MODE != SUPER_DATA && MODE != SUPER_INSN)) { - //logerror("sun4c: write protect MMU error (PC=%x)\n", m_cpu->pc()); + LOGMASKED(LOG_WRITE_PROTECT, "write protect error with PTE %d (%08x), %08x = %08x & %08x, PC=%08x\n", entry_index, m_pagemap[entry_index].to_uint(), offset << 2, data, mem_mask, m_cpu->pc()); m_buserr[0] |= 0x8040; // write, protection error m_buserr[1] = offset << 2; m_host->set_mae(); @@ -451,14 +549,15 @@ void sun4c_mmu_device::insn_data_w(const uint32_t offset, const uint32_t data, c const uint32_t tmp = entry.page | (offset & 0x3ff); - //printf("sun4: write translated vaddr %08x to phys %08x type %d, PTE %08x, ASI %d, PC=%x\n", offset<<2, tmp<<2, entry.type, entry.to_uint(), asi, m_cpu->pc()); - switch (entry.type) { case 0: // type 0 - if (tmp < 0x1000000 >> 2) + if (tmp < m_populated_ram_words) { - COMBINE_DATA((m_ram_ptr + tmp)); + const uint32_t set = (tmp >> 22) & 3; + const uint32_t addr_mask = m_ram_set_mask[set]; + const uint32_t masked_addr = m_ram_set_base[set] + (tmp & addr_mask); + COMBINE_DATA((m_ram_ptr + masked_addr)); } else if (tmp >= 0x4000000 >> 2 && tmp < 0x10000000 >> 2) { @@ -467,12 +566,11 @@ void sun4c_mmu_device::insn_data_w(const uint32_t offset, const uint32_t data, c return; case 1: // type 1 - //printf("write device space @ %x = %08x\n", tmp << 2, data); m_type1_w(tmp, data, mem_mask); return; default: - //logerror("sun4c_mmu: access to memory type not defined\n"); + LOGMASKED(LOG_UNKNOWN_SPACE, "write unknown space type %d, %08x = %08x & %08x, PC=%08x\n", entry.type, tmp << 2, data, mem_mask, m_cpu->pc()); m_host->set_mae(); m_buserr[0] = 0x8020; m_buserr[1] = offset << 2; @@ -481,7 +579,7 @@ void sun4c_mmu_device::insn_data_w(const uint32_t offset, const uint32_t data, c } else { - //logerror("sun4c: INVALID PTE entry %d %08x accessed! data=%08x vaddr=%x PC=%x\n", entry_index, m_pagemap[entry_index].to_uint(), data, offset <<2, m_cpu->pc()); + LOGMASKED(LOG_INVALID_PTE, "write invalid PTE %d (%08x), %08x = %08x & %08x, PC=%08x\n", entry_index, m_pagemap[entry_index].to_uint(), offset << 2, data, mem_mask, m_cpu->pc()); m_host->set_mae(); m_buserr[0] |= 0x8080; // write cycle, invalid PTE m_buserr[1] = offset << 2; diff --git a/src/devices/machine/sun4c_mmu.h b/src/devices/machine/sun4c_mmu.h index b31d7fcc56c..9852013504d 100644 --- a/src/devices/machine/sun4c_mmu.h +++ b/src/devices/machine/sun4c_mmu.h @@ -21,8 +21,8 @@ public: sun4c_mmu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint8_t ctx_mask, uint8_t pmeg_mask) : sun4c_mmu_device(mconfig, tag, owner, clock) { - m_ctx_mask = ctx_mask; - m_pmeg_mask = pmeg_mask; + set_ctx_mask(ctx_mask); + set_pmeg_mask(pmeg_mask); } sun4c_mmu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -35,6 +35,9 @@ public: auto type1_r() { return m_type1_r.bind(); } auto type1_w() { return m_type1_w.bind(); } + void set_ctx_mask(uint8_t ctx_mask) { m_ctx_mask = ctx_mask; } + void set_pmeg_mask(uint8_t pmeg_mask) { m_pmeg_mask = pmeg_mask; } + enum insn_data_mode { USER_INSN, @@ -128,6 +131,7 @@ protected: uint32_t m_ram_size_words; uint32_t m_context; uint32_t m_context_masked; + uint32_t m_cache_context; uint8_t m_system_enable; bool m_fetch_bootrom; uint32_t m_buserr[4]; @@ -139,8 +143,11 @@ protected: bool m_page_valid[16384]; // Internal MAME device state - uint8_t m_ctx_mask; // SS2 is sun4c but has 16 contexts; most have 8 - uint8_t m_pmeg_mask; // SS2 is sun4c but has 16384 PTEs; most have 8192 + uint8_t m_ctx_mask; // SS2 is sun4c but has 16 contexts; most have 8 + uint8_t m_pmeg_mask; // SS2 is sun4c but has 16384 PTEs; most have 8192 + uint32_t m_ram_set_mask[4]; // Used for mirroring within 4 megabyte sets + uint32_t m_ram_set_base[4]; + uint32_t m_populated_ram_words; emu_timer *m_reset_timer; }; diff --git a/src/devices/machine/upd1990a.h b/src/devices/machine/upd1990a.h index a9438b836e9..fbd26e6dfb4 100644 --- a/src/devices/machine/upd1990a.h +++ b/src/devices/machine/upd1990a.h @@ -24,23 +24,6 @@ #include "dirtc.h" - -//************************************************************************** -// INTERFACE CONFIGURATION MACROS -//************************************************************************** - -#define MCFG_UPD1990A_ADD(_tag, _clock, _data, _tp) \ - MCFG_DEVICE_ADD((_tag), UPD1990A, _clock) \ - downcast<upd1990a_device *>(device)->set_data_callback(DEVCB_##_data); \ - downcast<upd1990a_device *>(device)->set_tp_callback(DEVCB_##_tp); - -#define MCFG_UPD4990A_ADD(_tag, _clock, _data, _tp) \ - MCFG_DEVICE_ADD((_tag), UPD4990A, _clock) \ - downcast<upd1990a_device *>(device)->set_data_callback(DEVCB_##_data); \ - downcast<upd1990a_device *>(device)->set_tp_callback(DEVCB_##_tp); - - - //************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -51,10 +34,10 @@ class upd1990a_device : public device_t, public device_rtc_interface { public: // construction/destruction - upd1990a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + upd1990a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 32'768); - template <class Object> void set_data_callback(Object &&data) { m_write_data.set_callback(std::forward<Object>(data)); } - template <class Object> void set_tp_callback(Object &&tp) { m_write_tp.set_callback(std::forward<Object>(tp)); } + auto data_callback() { return m_write_data.bind(); } + auto tp_callback() { return m_write_tp.bind(); } DECLARE_WRITE_LINE_MEMBER( oe_w ); DECLARE_WRITE_LINE_MEMBER( cs_w ); @@ -148,7 +131,7 @@ private: class upd4990a_device : public upd1990a_device { public: - upd4990a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + upd4990a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 32'768); }; diff --git a/src/devices/machine/upd4701.h b/src/devices/machine/upd4701.h index 9fab9024f2c..dcf389ff1c1 100644 --- a/src/devices/machine/upd4701.h +++ b/src/devices/machine/upd4701.h @@ -27,29 +27,16 @@ #pragma once -/*************************************************************************** - MACROS / CONSTANTS -***************************************************************************/ - -#define MCFG_UPD4701_PORTX(_tag) \ - downcast<upd4701_device &>(*device).set_portx_tag(_tag); -#define MCFG_UPD4701_PORTY(_tag) \ - downcast<upd4701_device &>(*device).set_porty_tag(_tag); -#define MCFG_UPD4701_CF_CALLBACK(_devcb) \ - devcb = downcast<upd4701_device &>(*device).set_cf_cb(DEVCB_##_devcb); -#define MCFG_UPD4701_SF_CALLBACK(_devcb) \ - devcb = downcast<upd4701_device &>(*device).set_sf_cb(DEVCB_##_devcb); - class upd4701_device : public device_t { public: - upd4701_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + upd4701_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); // configuration - void set_portx_tag(const char *tag) { m_portx.set_tag(tag); } - void set_porty_tag(const char *tag) { m_porty.set_tag(tag); } - template<class Object> devcb_base &set_cf_cb(Object &&cb) { return m_cf_cb.set_callback(std::forward<Object>(cb)); } - template<class Object> devcb_base &set_sf_cb(Object &&cb) { return m_sf_cb.set_callback(std::forward<Object>(cb)); } + template <typename T> void set_portx_tag(T &&tag) { m_portx.set_tag(std::forward<T>(tag)); } + template <typename T> void set_porty_tag(T &&tag) { m_porty.set_tag(std::forward<T>(tag)); } + auto cf_cb() { return m_cf_cb.bind(); } + auto sf_cb() { return m_sf_cb.bind(); } void x_add(s16 data); void y_add(s16 data); diff --git a/src/devices/machine/upd4992.h b/src/devices/machine/upd4992.h index 6e023bd118d..02627094cf2 100644 --- a/src/devices/machine/upd4992.h +++ b/src/devices/machine/upd4992.h @@ -15,13 +15,6 @@ //************************************************************************** -// INTERFACE CONFIGURATION MACROS -//************************************************************************** - -#define MCFG_UPD4992_ADD(tag) \ - MCFG_DEVICE_ADD((tag), UPD4992, XTAL(32'768)) - -//************************************************************************** // TYPE DEFINITIONS //************************************************************************** diff --git a/src/devices/machine/upd7002.h b/src/devices/machine/upd7002.h index 2dda4bc8e18..5b62d13dc34 100644 --- a/src/devices/machine/upd7002.h +++ b/src/devices/machine/upd7002.h @@ -16,15 +16,6 @@ #pragma once /*************************************************************************** - TYPE DEFINITIONS -***************************************************************************/ - -#define UPD7002_GET_ANALOGUE(name) int name(int channel_number) - -#define UPD7002_EOC(name) void name(int data) - - -/*************************************************************************** MACROS ***************************************************************************/ @@ -36,8 +27,8 @@ public: upd7002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - template <typename Object> void set_get_analogue_callback(Object &&cb) { m_get_analogue_cb = std::forward<Object>(cb); } - template <typename Object> void set_eoc_callback(Object &&cb) { m_eoc_cb = std::forward<Object>(cb); } + template <typename... T> void set_get_analogue_callback(T &&... args) { m_get_analogue_cb = get_analogue_delegate(std::forward<T>(args)...); } + template <typename... T> void set_eoc_callback(T &&... args) { m_eoc_cb = eoc_delegate(std::forward<T>(args)...); } DECLARE_READ8_MEMBER(eoc_r); DECLARE_READ8_MEMBER(read); @@ -94,15 +85,4 @@ private: DECLARE_DEVICE_TYPE(UPD7002, upd7002_device) - -/*************************************************************************** - DEVICE CONFIGURATION MACROS -***************************************************************************/ - -#define MCFG_UPD7002_GET_ANALOGUE_CB(_class, _method) \ - downcast<upd7002_device &>(*device).set_get_analogue_callback(upd7002_device::get_analogue_delegate(&_class::_method, #_class "::" #_method, this)); - -#define MCFG_UPD7002_EOC_CB(_class, _method) \ - downcast<upd7002_device &>(*device).set_eoc_callback(upd7002_device::eoc_delegate(&_class::_method, #_class "::" #_method, this)); - #endif // MAME_MACHINE_UPD7002_H diff --git a/src/devices/machine/upd765.h b/src/devices/machine/upd765.h index ee7dd91b1da..ffe2577fddf 100644 --- a/src/devices/machine/upd765.h +++ b/src/devices/machine/upd765.h @@ -14,66 +14,6 @@ * mode = MODE_AT, MODE_PS2 or MODE_M30 for the fdcs that have reset-time selection */ -#define MCFG_UPD765A_ADD(_tag, _ready, _select) \ - MCFG_DEVICE_ADD(_tag, UPD765A, 0) \ - downcast<upd765a_device *>(device)->set_ready_line_connected(_ready); \ - downcast<upd765a_device *>(device)->set_select_lines_connected(_select); - -#define MCFG_UPD765B_ADD(_tag, _ready, _select) \ - MCFG_DEVICE_ADD(_tag, UPD765B, 0) \ - downcast<upd765b_device *>(device)->set_ready_line_connected(_ready); \ - downcast<upd765b_device *>(device)->set_select_lines_connected(_select); - -#define MCFG_I8272A_ADD(_tag, _ready) \ - MCFG_DEVICE_ADD(_tag, I8272A, 0) \ - downcast<i8272a_device *>(device)->set_ready_line_connected(_ready); - -#define MCFG_UPD72065_ADD(_tag, _ready, _select) \ - MCFG_DEVICE_ADD(_tag, UPD72065, 0) \ - downcast<upd72065_device *>(device)->set_ready_line_connected(_ready); \ - downcast<upd72065_device *>(device)->set_select_lines_connected(_select); - -#define MCFG_I82072_ADD(_tag, _ready) \ - MCFG_DEVICE_ADD(_tag, I82072, 24_MHz_XTAL) \ - downcast<i82072_device *>(device)->set_ready_line_connected(_ready); - -#define MCFG_SMC37C78_ADD(_tag) \ - MCFG_DEVICE_ADD(_tag, SMC37C78, 0) - -#define MCFG_N82077AA_ADD(_tag, _mode) \ - MCFG_DEVICE_ADD(_tag, N82077AA, 0) \ - downcast<n82077aa_device *>(device)->set_mode(_mode); - -#define MCFG_PC_FDC_SUPERIO_ADD(_tag) \ - MCFG_DEVICE_ADD(_tag, PC_FDC_SUPERIO, 0) - -#define MCFG_DP8473_ADD(_tag) \ - MCFG_DEVICE_ADD(_tag, DP8473, 0) - -#define MCFG_PC8477A_ADD(_tag) \ - MCFG_DEVICE_ADD(_tag, PC8477A, 0) - -#define MCFG_WD37C65C_ADD(_tag) \ - MCFG_DEVICE_ADD(_tag, WD37C65C, 0) - -#define MCFG_MCS3201_ADD(_tag) \ - MCFG_DEVICE_ADD(_tag, MCS3201, 0) - -#define MCFG_TC8566AF_ADD(_tag) \ - MCFG_DEVICE_ADD(_tag, TC8566AF, 0) - -#define MCFG_MCS3201_INPUT_HANDLER(_devcb) \ - downcast<mcs3201_device &>(*device).set_input_handler(DEVCB_##_devcb); - -#define MCFG_UPD765_INTRQ_CALLBACK(_write) \ - downcast<upd765_family_device &>(*device).set_intrq_wr_callback(DEVCB_##_write); - -#define MCFG_UPD765_DRQ_CALLBACK(_write) \ - downcast<upd765_family_device &>(*device).set_drq_wr_callback(DEVCB_##_write); - -#define MCFG_UPD765_HDL_CALLBACK(_write) \ - downcast<upd765_family_device &>(*device).set_hdl_wr_callback(DEVCB_##_write); - /* Interface required for PC ISA wrapping */ class pc_fdc_interface : public device_t { protected: @@ -101,9 +41,6 @@ class upd765_family_device : public pc_fdc_interface { public: enum { MODE_AT, MODE_PS2, MODE_M30 }; - template <class Object> devcb_base &set_intrq_wr_callback(Object &&cb) { return intrq_cb.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_drq_wr_callback(Object &&cb) { return drq_cb.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_hdl_wr_callback(Object &&cb) { return hdl_cb.set_callback(std::forward<Object>(cb)); } auto intrq_wr_callback() { return intrq_cb.bind(); } auto drq_wr_callback() { return drq_cb.bind(); } auto hdl_wr_callback() { return hdl_cb.bind(); } @@ -454,6 +391,12 @@ public: class upd765b_device : public upd765_family_device { public: + upd765b_device(const machine_config &mconfig, const char *tag, device_t *owner, bool ready, bool select) + : upd765b_device(mconfig, tag, owner, 0U) + { + set_ready_line_connected(ready); + set_select_lines_connected(select); + } upd765b_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual void map(address_map &map) override; @@ -461,6 +404,11 @@ public: class i8272a_device : public upd765_family_device { public: + i8272a_device(const machine_config &mconfig, const char *tag, device_t *owner, bool ready) + : i8272a_device(mconfig, tag, owner, 0U) + { + set_ready_line_connected(ready); + } i8272a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual void map(address_map &map) override; @@ -468,7 +416,12 @@ public: class i82072_device : public upd765_family_device { public: - i82072_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + i82072_device(const machine_config &mconfig, const char *tag, device_t *owner, bool ready) + : i82072_device(mconfig, tag, owner) + { + set_ready_line_connected(ready); + } + i82072_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 24'000'000); virtual void map(address_map &map) override; @@ -502,7 +455,7 @@ private: class smc37c78_device : public upd765_family_device { public: - smc37c78_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + smc37c78_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual void map(address_map &map) override; }; @@ -524,6 +477,11 @@ public: class n82077aa_device : public upd765_family_device { public: + n82077aa_device(const machine_config &mconfig, const char *tag, device_t *owner, int mode) + : n82077aa_device(mconfig, tag, owner, 0U) + { + set_mode(mode); + } n82077aa_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual void map(address_map &map) override; @@ -531,38 +489,38 @@ public: class pc_fdc_superio_device : public upd765_family_device { public: - pc_fdc_superio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + pc_fdc_superio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual void map(address_map &map) override; }; class dp8473_device : public upd765_family_device { public: - dp8473_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + dp8473_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual void map(address_map &map) override; }; class pc8477a_device : public upd765_family_device { public: - pc8477a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + pc8477a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual void map(address_map &map) override; }; class wd37c65c_device : public upd765_family_device { public: - wd37c65c_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + wd37c65c_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual void map(address_map &map) override; }; class mcs3201_device : public upd765_family_device { public: - mcs3201_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + mcs3201_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); // configuration helpers - template <class Object> devcb_base &set_input_handler(Object &&cb) { return m_input_handler.set_callback(std::forward<Object>(cb)); } + auto input_handler() { return m_input_handler.bind(); } virtual void map(address_map &map) override; DECLARE_READ8_MEMBER( input_r ); @@ -576,7 +534,7 @@ private: class tc8566af_device : public upd765_family_device { public: - tc8566af_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + tc8566af_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual void map(address_map &map) override; diff --git a/src/devices/sound/iremga20.cpp b/src/devices/sound/iremga20.cpp index 5b9d5f050bb..e3c18cbf700 100644 --- a/src/devices/sound/iremga20.cpp +++ b/src/devices/sound/iremga20.cpp @@ -1,10 +1,19 @@ // license:BSD-3-Clause -// copyright-holders:Acho A. Tang,R. Belmont +// copyright-holders:Acho A. Tang,R. Belmont, Valley Bell /********************************************************* Irem GA20 PCM Sound Chip +80 pin QFP, label NANAO GA20 (Nanao Corporation was Irem's parent company) -It's not currently known whether this chip is stereo. +TODO: +- It's not currently known whether this chip is stereo. +- Is sample position base(regs 0,1) used while sample is playing, or + latched at key on? We've always emulated it the latter way. + gunforc2 seems to be the only game updating the address regs sometimes + while a sample is playing, but it doesn't seem intentional. +- What is the 2nd sample address for? Is it end(cut-off) address, or + loop start address? Every game writes a value that's past sample end. +- All games write either 0 or 2 to reg #6, do other bits have any function? Revisions: @@ -26,6 +35,9 @@ Revisions: 02-03-2007 R. Belmont - Cleaned up faux x86 assembly. +09-25-2018 Valley Bell & co +- rewrote channel update to make data 0 act as sample terminator + *********************************************************/ #include "emu.h" @@ -33,8 +45,6 @@ Revisions: #include <algorithm> -#define MAX_VOL 256 - // device type definition DEFINE_DEVICE_TYPE(IREMGA20, iremga20_device, "iremga20", "Irem GA20") @@ -63,26 +73,16 @@ iremga20_device::iremga20_device(const machine_config &mconfig, const char *tag, void iremga20_device::device_start() { - int i; - - iremga20_reset(); - - std::fill(std::begin(m_regs), std::end(m_regs), 0); - m_stream = stream_alloc(0, 2, clock()/4); save_item(NAME(m_regs)); - for (i = 0; i < 4; i++) + for (int i = 0; i < 4; i++) { save_item(NAME(m_channel[i].rate), i); - save_item(NAME(m_channel[i].size), i); - save_item(NAME(m_channel[i].start), i); save_item(NAME(m_channel[i].pos), i); - save_item(NAME(m_channel[i].frac), i); + save_item(NAME(m_channel[i].counter), i); save_item(NAME(m_channel[i].end), i); save_item(NAME(m_channel[i].volume), i); - save_item(NAME(m_channel[i].pan), i); - save_item(NAME(m_channel[i].effect), i); save_item(NAME(m_channel[i].play), i); } } @@ -94,7 +94,16 @@ void iremga20_device::device_start() void iremga20_device::device_reset() { - iremga20_reset(); + std::fill(std::begin(m_regs), std::end(m_regs), 0); + for (int i = 0; i < 4; i++) + { + m_channel[i].rate = 0; + m_channel[i].pos = 0; + m_channel[i].counter = 0; + m_channel[i].end = 0; + m_channel[i].volume = 0; + m_channel[i].play = 0; + } } //------------------------------------------------- @@ -122,159 +131,101 @@ void iremga20_device::rom_bank_updated() void iremga20_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) { - uint32_t rate[4], pos[4], frac[4], end[4], vol[4], play[4]; stream_sample_t *outL, *outR; - int i, sampleout; - - /* precache some values */ - for (i=0; i < 4; i++) - { - rate[i] = m_channel[i].rate; - pos[i] = m_channel[i].pos; - frac[i] = m_channel[i].frac; - end[i] = m_channel[i].end - 0x20; - vol[i] = m_channel[i].volume; - play[i] = m_channel[i].play; - } - i = samples; outL = outputs[0]; outR = outputs[1]; - for (i = 0; i < samples; i++) + for (int i = 0; i < samples; i++) { - sampleout = 0; + stream_sample_t sampleout = 0; - // update the 4 channels inline - if (play[0]) - { - sampleout += (read_byte(pos[0]) - 0x80) * vol[0]; - frac[0] += rate[0]; - pos[0] += frac[0] >> 24; - frac[0] &= 0xffffff; - play[0] = (pos[0] < end[0]); - } - if (play[1]) - { - sampleout += (read_byte(pos[1]) - 0x80) * vol[1]; - frac[1] += rate[1]; - pos[1] += frac[1] >> 24; - frac[1] &= 0xffffff; - play[1] = (pos[1] < end[1]); - } - if (play[2]) - { - sampleout += (read_byte(pos[2]) - 0x80) * vol[2]; - frac[2] += rate[2]; - pos[2] += frac[2] >> 24; - frac[2] &= 0xffffff; - play[2] = (pos[2] < end[2]); - } - if (play[3]) + for (auto & ch : m_channel) { - sampleout += (read_byte(pos[3]) - 0x80) * vol[3]; - frac[3] += rate[3]; - pos[3] += frac[3] >> 24; - frac[3] &= 0xffffff; - play[3] = (pos[3] < end[3]); + if (ch.play) + { + int sample = read_byte(ch.pos); + if (sample == 0x00) // check for sample end marker + ch.play = 0; + else + { + sampleout += (sample - 0x80) * (int32_t)ch.volume; + ch.counter--; + if (ch.counter <= ch.rate) + { + ch.pos++; + ch.counter = 0x100; + } + } + } } sampleout >>= 2; outL[i] = sampleout; outR[i] = sampleout; } - - /* update the regs now */ - for (i=0; i < 4; i++) - { - m_channel[i].pos = pos[i]; - m_channel[i].frac = frac[i]; - m_channel[i].play = play[i]; - } } WRITE8_MEMBER( iremga20_device::irem_ga20_w ) { - int channel; - - //logerror("GA20: Offset %02x, data %04x\n",offset,data); - m_stream->update(); - channel = offset >> 3; - + offset &= 0x1f; m_regs[offset] = data; + int ch = offset >> 3; + + // channel regs: + // 0,1: start address + // 2,3: end? address + // 4: rate + // 5: volume + // 6: control + // 7: voice status (read-only) switch (offset & 0x7) { - case 0: /* start address low */ - m_channel[channel].start = ((m_channel[channel].start)&0xff000) | (data<<4); - break; - - case 1: /* start address high */ - m_channel[channel].start = ((m_channel[channel].start)&0x00ff0) | (data<<12); - break; - - case 2: /* end address low */ - m_channel[channel].end = ((m_channel[channel].end)&0xff000) | (data<<4); - break; - - case 3: /* end address high */ - m_channel[channel].end = ((m_channel[channel].end)&0x00ff0) | (data<<12); - break; - case 4: - m_channel[channel].rate = 0x1000000 / (256 - data); + m_channel[ch].rate = data; break; - case 5: //AT: gain control - m_channel[channel].volume = (data * MAX_VOL) / (data + 10); + case 5: + m_channel[ch].volume = (data * 256) / (data + 10); break; - case 6: //AT: this is always written 2(enabling both channels?) - m_channel[channel].play = data; - m_channel[channel].pos = m_channel[channel].start; - m_channel[channel].frac = 0; + case 6: + // d1: key on/off + if (data & 2) + { + m_channel[ch].play = 1; + m_channel[ch].pos = (m_regs[ch << 3 | 0] | m_regs[ch << 3 | 1] << 8) << 4; + m_channel[ch].end = (m_regs[ch << 3 | 2] | m_regs[ch << 3 | 3] << 8) << 4; + m_channel[ch].counter = 0x100; + } + else + m_channel[ch].play = 0; + + // other: unknown/unused + // possibilities are: loop flag, left/right speaker(stereo) break; } } READ8_MEMBER( iremga20_device::irem_ga20_r ) { - int channel; - m_stream->update(); - channel = offset >> 3; + offset &= 0x1f; + int ch = offset >> 3; switch (offset & 0x7) { - case 7: // voice status. bit 0 is 1 if active. (routine around 0xccc in rtypeleo) - return m_channel[channel].play ? 1 : 0; + case 7: // voice status. bit 0 is 1 if active. (routine around 0xccc in rtypeleo) + return m_channel[ch].play; default: - logerror("GA20: read unk. register %d, channel %d\n", offset & 0xf, channel); + logerror("GA20: read unk. register %d, channel %d\n", offset & 0x7, ch); break; } return 0; } - - -void iremga20_device::iremga20_reset() -{ - int i; - - for( i = 0; i < 4; i++ ) { - m_channel[i].rate = 0; - m_channel[i].size = 0; - m_channel[i].start = 0; - m_channel[i].pos = 0; - m_channel[i].frac = 0; - m_channel[i].end = 0; - m_channel[i].volume = 0; - m_channel[i].pan = 0; - m_channel[i].effect = 0; - m_channel[i].play = 0; - } -} diff --git a/src/devices/sound/iremga20.h b/src/devices/sound/iremga20.h index bf673714eaf..e5b250a8f0a 100644 --- a/src/devices/sound/iremga20.h +++ b/src/devices/sound/iremga20.h @@ -44,21 +44,15 @@ private: struct channel_def { uint32_t rate; - uint32_t size; - uint32_t start; uint32_t pos; - uint32_t frac; + uint32_t counter; uint32_t end; uint32_t volume; - uint32_t pan; - uint32_t effect; uint32_t play; }; - void iremga20_reset(); - sound_stream *m_stream; - uint8_t m_regs[0x40/2]; + uint8_t m_regs[0x20]; channel_def m_channel[4]; }; diff --git a/src/devices/video/bt459.cpp b/src/devices/video/bt459.cpp index da7d2ac8899..6e1ba2294d1 100644 --- a/src/devices/video/bt459.cpp +++ b/src/devices/video/bt459.cpp @@ -548,8 +548,8 @@ void bt459_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, co { u8 data = *pixel_data++; - bitmap.pix(y, x + 1) = get_rgb(data & 0x7, pixel_mask); data >>= 4; - bitmap.pix(y, x + 0) = get_rgb(data & 0x7, pixel_mask); + bitmap.pix(y, x + 1) = get_rgb(data & 0xf, pixel_mask); data >>= 4; + bitmap.pix(y, x + 0) = get_rgb(data & 0xf, pixel_mask); } break; diff --git a/src/devices/video/dp8350.cpp b/src/devices/video/dp8350.cpp new file mode 100644 index 00000000000..6d240c68793 --- /dev/null +++ b/src/devices/video/dp8350.cpp @@ -0,0 +1,524 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + National Semiconductor DP8350 Series CRT Controllers + + These dedicated CRTC devices are “programmable” by specifying a + long list of mask parameters. Since the dot clock is generated + internally, these parameters determine the character field size + (16 x 16 maximum) as well as the number of characters displayed + on screen and the timing, width and polarity of the sync pulses + (though two different vertical timings are incorporated so the + refresh rate can be switched between 60 Hz and 50 Hz). + + The number of parameters adjustable through software control is + relatively small, there being no dedicated microprocessor data bus. + In practice, however, the CPU's D0 and D1 are usually tied to the + Register Select lines, due to shared use of the address bus for + DMA purposes. A per-row interrupt can be derived in various ways + from the timing outputs; this can be used to reload the Row Start + Register to point to display memory at nonconsecutive addresses. + + National released the DP8350 and a few other standard versions. + DP8367 appears to have originally been a custom mask variant + ordered by Hewlett-Packard, though it is listed as option “I” in + later datasheets; its parameters have been derived from the + information presented in Manual Part No. 13220-91087. (The 8367 + designation also comes from there, since the actual IC is merely + marked with its HP part number, 1820-2373.) DP8369 is another + variant ordered by General Terminal Corp. for their SW10 terminal; + option “K” is its National designation. + + Variant Dot rate Monitor type + ------- -------- ------------ + DP8350 10.92 MHz Ball Brothers TV-12, TV-120, etc. + DP8352 7.02 MHz RS-170 compatible + DP8353 17.6256 MHz Motorola M3003 + DP8367 25.7715 MHz HP 13220 + DP8369 12.2472 MHz GTC SW10 + +**********************************************************************/ + +#include "emu.h" +#include "video/dp8350.h" +#include "screen.h" + +//#define VERBOSE 1 +#include "logmacro.h" + + +//************************************************************************** +// GLOBAL VARIABLES +//************************************************************************** + +// device type definitions +DEFINE_DEVICE_TYPE(DP8350, dp8350_device, "dp8350", "DP8350 CRTC") +DEFINE_DEVICE_TYPE(DP8367, dp8367_device, "dp8367", "DP8367 CRTC") + + +//************************************************************************** +// DEVICE IMPLEMENTATION +//************************************************************************** + +//------------------------------------------------- +// dp835x_device - constructor +//------------------------------------------------- + +dp835x_device::dp835x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, + int char_width, int char_height, int chars_per_row, int rows_per_frame, + int vsync_delay_f1, int vsync_width_f1, int vblank_interval_f1, + int vsync_delay_f0, int vsync_width_f0, int vblank_interval_f0, + int chars_per_line, int hsync_delay, int hsync_width, int vblank_stop, + bool cursor_on_all_lines, int lbc_0_width, int hsync_serration, + bool hsync_active, bool vsync_active, bool vblank_active) + : device_t(mconfig, type, tag, owner, clock) + , device_video_interface(mconfig, *this) + , m_char_width(char_width) + , m_char_height(char_height) + , m_chars_per_row(chars_per_row) + , m_rows_per_frame(rows_per_frame) + , m_vsync_delay{vsync_delay_f0, vsync_delay_f1} + , m_vsync_width{vsync_width_f0, vsync_width_f1} + , m_vblank_interval{vblank_interval_f0, vblank_interval_f1} + , m_chars_per_line(chars_per_line) + , m_hsync_delay(hsync_delay) + , m_hsync_width(hsync_width) + , m_vblank_stop(vblank_stop) + , m_cursor_on_all_lines(cursor_on_all_lines) + , m_lbc_0_width(lbc_0_width) + , m_hsync_serration(hsync_serration) + , m_hsync_active(hsync_active) + , m_vsync_active(vsync_active) + , m_vblank_active(vblank_active) + , m_dots_per_line(char_width * chars_per_line) + , m_dots_per_row(char_width * chars_per_row) + , m_video_scan_lines(char_height * rows_per_frame) + , m_lrc_callback(*this) + , m_clc_callback(*this) + , m_lc_callback(*this) + , m_lbre_callback(*this) + , m_hsync_callback(*this) + , m_vsync_callback(*this) + , m_vblank_callback(*this) + , m_60hz_refresh(true) + , m_cgpi(false) + , m_topr(0) + , m_rsr(0) + , m_cr(0) + , m_row_start(0) + , m_lc(0) +{ + // some parameters are not used (at least not directly) + (void)m_rows_per_frame; + (void)m_chars_per_line; + (void)m_cursor_on_all_lines; + (void)m_lbc_0_width; + (void)m_hsync_serration; +} + + +//------------------------------------------------- +// dp8350_device - constructor +//------------------------------------------------- + +dp8350_device::dp8350_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : dp835x_device(mconfig, DP8350, tag, owner, clock, + 7, 10, 80, 24, + 4, 10, 20, + 30, 10, 72, + 100, 0, 43, 1, // yes, the horizontal sync pulse is more than twice as long as the blanking period + true, 4, 0, + true, false, true) +{ +} + + +//------------------------------------------------- +// dp8367_device - constructor +//------------------------------------------------- + +dp8367_device::dp8367_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : dp835x_device(mconfig, DP8367, tag, owner, clock, + 9, 15, 80, 26, + 0, 19, 25, + 38, 64, 108, + 115, -16, 7, 1, // value of vblank_stop assumed + true, 5, 0, // values assumed + true, true, true) +{ +} + + +//------------------------------------------------- +// device_config_complete - finalise device +// configuration +//------------------------------------------------- + +void dp835x_device::device_config_complete() +{ + if (has_screen() && screen().refresh_attoseconds() == 0) + { + int lines_per_frame = m_video_scan_lines + m_vblank_interval[m_60hz_refresh ? 1 : 0]; + if (m_half_shift) + screen().set_raw(clock() * 2, m_dots_per_line * 2, 0, m_dots_per_row * 2, lines_per_frame, 0, m_video_scan_lines); + else + screen().set_raw(clock(), m_dots_per_line, 0, m_dots_per_row, lines_per_frame, 0, m_video_scan_lines); + } +} + + +//------------------------------------------------- +// device_resolve_objects - resolve objects that +// may be needed for other devices to set +// initial conditions at start time +//------------------------------------------------- + +void dp835x_device::device_resolve_objects() +{ + m_lrc_callback.resolve_safe(); + m_clc_callback.resolve_safe(); + m_lc_callback.resolve_safe(); + m_lbre_callback.resolve_safe(); + m_hsync_callback.resolve_safe(); + m_vsync_callback.resolve_safe(); + m_vblank_callback.resolve_safe(); +} + + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void dp835x_device::device_start() +{ + // create timers + m_hblank_start_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(dp835x_device::hblank_start), this)); + m_hblank_near_end_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(dp835x_device::hblank_near_end), this)); + m_hsync_on_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(dp835x_device::hsync_update), this)); + m_hsync_off_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(dp835x_device::hsync_update), this)); + + // save state + save_item(NAME(m_60hz_refresh)); + save_item(NAME(m_cgpi)); + save_item(NAME(m_lc)); + save_item(NAME(m_topr)); + save_item(NAME(m_rsr)); + save_item(NAME(m_cr)); + save_item(NAME(m_row_start)); +} + + +//------------------------------------------------- +// device_reset - device-specific reset +//------------------------------------------------- + +void dp835x_device::device_reset() +{ + m_topr = 0; + m_rsr = 0; + m_cr = 0; + m_row_start = 0; +} + + +//------------------------------------------------- +// device_clock_changed - called when the +// device clock is altered in any way +//------------------------------------------------- + +void dp835x_device::device_clock_changed() +{ + reconfigure_screen(); +} + + +//------------------------------------------------- +// reconfigure_screen - update screen parameters +//------------------------------------------------- + +void dp835x_device::reconfigure_screen() +{ + int lines_per_frame = m_video_scan_lines + m_vblank_interval[m_60hz_refresh ? 1 : 0]; + attotime scan_period = clocks_to_attotime(m_dots_per_line); + attotime refresh = clocks_to_attotime(lines_per_frame * m_dots_per_line); + + if (m_half_shift) + screen().configure(2 * m_dots_per_line, lines_per_frame, screen().visible_area(), refresh.as_attoseconds()); + else + screen().configure(m_dots_per_line, lines_per_frame, screen().visible_area(), refresh.as_attoseconds()); + + logerror("Frame rate refresh: %.2f Hz (f%d); horizontal rate scan: %.4f kHz; character rate: %.4f MHz; dot rate: %.5f MHz\n", + ATTOSECONDS_TO_HZ(refresh.as_attoseconds()), + m_60hz_refresh ? 1 : 0, + clock() / (m_dots_per_line * 1000.0), + clock() / (m_char_width * 1000000.0), + clock() / 1000000.0); + + // get current screen position (note that this method is more accurate than calling hpos and vpos separately) + u32 dpos = attotime_to_clocks(refresh - screen().time_until_pos(lines_per_frame - 1, m_dots_per_row * (m_half_shift ? 2 : 1))); + int hpos = (dpos + m_dots_per_row) % m_dots_per_line; + int vpos = dpos / m_dots_per_line; + + // set line rate clock timers + int hblank_begin = m_dots_per_row; + int hblank_near_end = m_dots_per_line - m_char_width * 5; + if (hpos >= hblank_begin) + hblank_begin += m_dots_per_line; + m_hblank_start_timer->adjust(clocks_to_attotime(hblank_begin - hpos), 0, scan_period); + if (hpos >= hblank_near_end) + hblank_near_end += m_dots_per_line; + m_hblank_near_end_timer->adjust(clocks_to_attotime(hblank_near_end - hpos), 0, scan_period); + + // set horizontal sync timers (note that HSYNC may precede horizontal blanking or even outlast it, as on the DP8350) + int hsync_begin = m_dots_per_row + m_char_width * m_hsync_delay; + int hsync_end = hsync_begin + m_char_width * m_hsync_width; + if (hpos >= hsync_begin) + hsync_begin += m_dots_per_line; + m_hsync_on_timer->adjust(clocks_to_attotime(hsync_begin - hpos), m_hsync_active, scan_period); + if (hpos >= hsync_end) + hsync_end += m_dots_per_line; + else if (hpos < hsync_end - m_dots_per_line) + hsync_end -= m_dots_per_line; + m_hsync_off_timer->adjust(clocks_to_attotime(hsync_end - hpos), !m_hsync_active, scan_period); + logerror("hblank_begin: %d; hsync_begin: %d; hsync_end: %d; hpos: %d\n", hblank_begin, hsync_begin, hsync_end, hpos); + + // calculate vertical sync and blanking parameters + int vsync_begin = m_video_scan_lines + m_vsync_delay[m_60hz_refresh ? 1 : 0]; + int vsync_end = vsync_begin + m_vsync_width[m_60hz_refresh ? 1 : 0]; + int vblank_end = lines_per_frame - m_vblank_stop; + logerror("vblank_begin: %d; vsync_begin: %d; vsync_end: %d; vblank_end: %d; vpos: %d\n", m_video_scan_lines, vsync_begin, vsync_end, vblank_end, vpos); + + // set counters + m_line = vpos; + if (m_line >= lines_per_frame - m_char_height) + m_lc = m_line - (lines_per_frame - m_char_height); + else + m_lc = m_line % m_char_height; +} + + +//------------------------------------------------- +// refresh_control - set or configure one of two +// field refresh rates (f1 = 60 Hz, f0 = 50 Hz) +//------------------------------------------------- + +WRITE_LINE_MEMBER(dp835x_device::refresh_control) +{ + if (m_60hz_refresh != bool(state)) + { + m_60hz_refresh = state; + if (started()) + reconfigure_screen(); + } +} + + +//------------------------------------------------- +// character_generator_program - set or configure +// the character generator program input (CGPI): +// 0 = video begins on scan line 0; new addresses +// loaded on last scan line of previous character +// 1 = video begins on scan line 1; new addresses +// loaded on scan line 0 +//------------------------------------------------- + +WRITE_LINE_MEMBER(dp835x_device::character_generator_program) +{ + m_cgpi = bool(state); +} + + +//------------------------------------------------- +// register_load - write to one of three CRTC +// address registers +//------------------------------------------------- + +void dp835x_device::register_load(u8 rs, u16 addr) +{ + addr &= 0xfff; + + switch (rs & 3) + { + case 0: + default: + // A = 0, B = 0: No Select + break; + + case 1: + // A = 0, B = 1: Top-of-Page + LOG("Top-of-Page Register = %03X\n", addr); + m_topr = addr; + break; + + case 2: + // A = 1, B = 0: Row Start (also Top-of-Page during vertical blanking) + if (m_line >= m_video_scan_lines) + { + LOG("Row Start Register = %03X (redirected to Top-of-Page)\n", addr); + m_topr = addr; + } + else + { + LOG("Row Start Register = %03X\n", addr); + m_rsr = addr; + } + break; + + case 3: + // A = 1, B = 1: Cursor + LOG("Cursor Register = %03X\n", addr); + m_cr = addr; + break; + } +} + + +//------------------------------------------------- +// lrc_r - poll line rate clock state +//------------------------------------------------- + +READ_LINE_MEMBER(dp835x_device::lrc_r) +{ + if (m_hblank_start_timer->remaining() > m_hblank_near_end_timer->remaining()) + return 0; + else + return 1; +} + + +//------------------------------------------------- +// lbre_r - poll line buffer recirculate enable +// state +//------------------------------------------------- + +READ_LINE_MEMBER(dp835x_device::lbre_r) +{ + if (m_lc == (m_cgpi ? 0 : m_char_height - 1)) + return 0; + else + return 1; +} + + + +//------------------------------------------------- +// hsync_r - poll horizontal sync state +//------------------------------------------------- + +READ_LINE_MEMBER(dp835x_device::hsync_r) +{ + if (m_hsync_on_timer->remaining() > m_hsync_off_timer->remaining()) + return m_hsync_active; + else + return !m_hsync_active; +} + + +//------------------------------------------------- +// vsync_r - poll vertical sync state +//------------------------------------------------- + +READ_LINE_MEMBER(dp835x_device::vsync_r) +{ + int vsync_begin = m_video_scan_lines + m_vsync_delay[m_60hz_refresh ? 1 : 0]; + int vsync_end = vsync_begin + m_vsync_width[m_60hz_refresh ? 1 : 0]; + return (m_line >= vsync_begin && m_line < vsync_end) ? m_vsync_active : !m_vsync_active; +} + + +//------------------------------------------------- +// vblank_r - poll vertical blanking state +//------------------------------------------------- + +READ_LINE_MEMBER(dp835x_device::vblank_r) +{ + int vblank_end = m_video_scan_lines + m_vblank_interval[m_60hz_refresh ? 1 : 0] - m_vblank_stop; + return (m_line >= m_video_scan_lines && m_line < vblank_end) ? m_vblank_active : !m_vblank_active; +} + + +//------------------------------------------------- +// hblank_start - update timing outputs at the +// start of horizontal blanking +//------------------------------------------------- + +TIMER_CALLBACK_MEMBER(dp835x_device::hblank_start) +{ + int lines_per_frame = m_video_scan_lines + m_vblank_interval[m_60hz_refresh ? 1 : 0]; + int vsync_begin = m_video_scan_lines + m_vsync_delay[m_60hz_refresh ? 1 : 0]; + int vsync_end = vsync_begin + m_vsync_width[m_60hz_refresh ? 1 : 0]; + int vblank_end = lines_per_frame - m_vblank_stop; + + // falling edge of line rate clock + m_lrc_callback(0); + + // increment line counter or reset it + if (m_lc < m_char_height - 1 && m_line != lines_per_frame - m_char_height) + m_lc++; + else + { + m_lc = 0; + m_clc_callback(0); + } + m_lc_callback(m_lc); + + // increment internal 9-bit scan counter + m_line++; + //assert(m_line == screen().vpos() + 1); + + // update line buffer recirculate enable output based on address mode + bool lbre = m_lc != (m_cgpi ? 0 : m_char_height - 1); + m_lbre_callback(lbre ? 1 : 0); + + if (m_line >= lines_per_frame - m_char_height && m_line < lines_per_frame) + { + m_row_start = m_rsr = m_topr; + } + else if (!lbre || m_line >= m_video_scan_lines) + { + // calculate starting address of next row (address counter runs continuously during VBLANK) + m_row_start = m_rsr; + m_rsr = (m_row_start + m_chars_per_row) & 0xfff; + } + + // update vertical blanking output + if (m_line == m_video_scan_lines) + m_vblank_callback(m_vblank_active); + else if (m_line == vblank_end) + m_vblank_callback(!m_vblank_active); + + // update vertical sync output + if (m_line == vsync_begin) + m_vsync_callback(m_vsync_active); + else if (m_line == vsync_end) + m_vsync_callback(!m_vsync_active); + + if (m_line == lines_per_frame) + m_line = 0; +} + + +//------------------------------------------------- +// hblank_near_end - update line rate outputs +// five chars before horizontal blanking ends +//------------------------------------------------- + +TIMER_CALLBACK_MEMBER(dp835x_device::hblank_near_end) +{ + // rising edge of line rate clock + m_lrc_callback(1); + if (m_lc == 0) + m_clc_callback(1); +} + + +//------------------------------------------------- +// hsync_update - update state of horizontal +// sync output +//------------------------------------------------- + +TIMER_CALLBACK_MEMBER(dp835x_device::hsync_update) +{ + m_hsync_callback(param); +} diff --git a/src/devices/video/dp8350.h b/src/devices/video/dp8350.h new file mode 100644 index 00000000000..f202bc730e9 --- /dev/null +++ b/src/devices/video/dp8350.h @@ -0,0 +1,177 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + National Semiconductor DP8350 Series CRT Controllers + +*********************************************************************** + _____ _____ + RSB 1 |* \__/ | 40 Vcc + VBLANK 2 | | 39 RSA + 50/60 HZ 3 | | 38 RL + VSYNC 4 | | 37 RAE + FULL/HALF 5 | | 36 A0 + LC3 6 | | 35 A1 + LC2 7 | | 34 A2 + LC1 8 | | 33 A3 + LC0 9 | | 32 A4 + CLC 10 | | 31 A5 + CGP 11 | DP835X | 30 A6 + LBRE 12 | | 29 A7 + LRC 13 | | 28 A8 + HSYNC 14 | | 27 A9 + RESET 15 | | 26 A10 + LBC 16 | | 25 A11 + ECLC 17 | | 24 LCGA + LVSR 18 | | 23 DRC + CUR 19 | | 22 X2 + GND 20 |______________| 21 X1 + +**********************************************************************/ + +#ifndef MAME_VIDEO_DP8350_H +#define MAME_VIDEO_DP8350_H + +#pragma once + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> dp835x_device + +class dp835x_device : public device_t, public device_video_interface +{ +public: + // device configuration + auto lrc_callback() { return m_lrc_callback.bind(); } + auto clc_callback() { return m_clc_callback.bind(); } + auto lc_callback() { return m_lc_callback.bind(); } + auto lbre_callback() { return m_lbre_callback.bind(); } + auto hsync_callback() { return m_hsync_callback.bind(); } + auto vsync_callback() { return m_vsync_callback.bind(); } + auto vblank_callback() { return m_vblank_callback.bind(); } + void set_half_shift(bool half_shift) { m_half_shift = half_shift; } + + // write handlers + DECLARE_WRITE_LINE_MEMBER(refresh_control); + DECLARE_WRITE_LINE_MEMBER(character_generator_program); + void register_load(u8 rs, u16 addr); + + // read handlers + DECLARE_READ_LINE_MEMBER(lrc_r); + u8 lc_r() { return m_lc; } + DECLARE_READ_LINE_MEMBER(lbre_r); + DECLARE_READ_LINE_MEMBER(hsync_r); + DECLARE_READ_LINE_MEMBER(vsync_r); + DECLARE_READ_LINE_MEMBER(vblank_r); + + // address getters (TODO: accurate character-by-character emulation) + u16 top_of_page() const { return m_topr; } + u16 row_start() const { return m_row_start; } + u16 cursor_address() const { return m_cr; } + +protected: + // base type constructor + dp835x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, + int char_width, int char_height, int chars_per_row, int rows_per_frame, + int vsync_delay_f1, int vsync_width_f1, int vblank_interval_f1, + int vsync_delay_f0, int vsync_width_f0, int vblank_interval_f0, + int chars_per_line, int hsync_delay, int hsync_width, int vblank_stop, + bool cursor_on_all_lines, int lbc_0_width, int hsync_serration, + bool hsync_active, bool vsync_active, bool vblank_active); + + // device-specific overrides + virtual void device_config_complete() override; + virtual void device_resolve_objects() override; + virtual void device_start() override; + virtual void device_clock_changed() override; + virtual void device_reset() override; + +private: + // internal helpers + void reconfigure_screen(); + + // timer callbacks + TIMER_CALLBACK_MEMBER(hblank_start); + TIMER_CALLBACK_MEMBER(hblank_near_end); + TIMER_CALLBACK_MEMBER(hsync_update); + + // mask parameters + const int m_char_width; // character field cell size (width in dots) + const int m_char_height; // character field cell size (height in scan lines) + const int m_chars_per_row; // video characters per row + const int m_rows_per_frame; // video characters per frame + const int m_vsync_delay[2]; // delay from VBLANK start to VSYNC in scan lines + const int m_vsync_width[2]; // vertical sync width in scan lines + const int m_vblank_interval[2]; // scan lines of vertical blanking + const int m_chars_per_line; // character times per scan line + const int m_hsync_delay; // delay from HBLANK start to HSYNC in character times + const int m_hsync_width; // horizontal sync width in character times + const int m_vblank_stop; // VBLANK stop before video start in scan lines + const bool m_cursor_on_all_lines; // true if cursor active on all scan lines of row + const int m_lbc_0_width; // width of LBC 0 output within character time + const int m_hsync_serration; // width of HSYNC pulse serrations within VSYNC (0 if unused) + const bool m_hsync_active; // active level of horizontal sync pulse + const bool m_vsync_active; // active level of vertical sync pulse + const bool m_vblank_active; // active level of vertical blanking pulse + + // derived parameters + const int m_dots_per_line; // number of dots per scan line + const int m_dots_per_row; // number of dots displayed in each scan line + const int m_video_scan_lines; // number of active scan lines between VBLANK periods + + // misc. configuration + bool m_half_shift; // adjust screen parameters to allow half-dot shifting + + // device callbacks + devcb_write_line m_lrc_callback; // line rate clock output (active high) + devcb_write_line m_clc_callback; // clear line counter output (active low during blanking) + devcb_write8 m_lc_callback; // line counter output + devcb_write_line m_lbre_callback; // line buffer recirculate enable output (active high) + devcb_write_line m_hsync_callback; // horizontal sync output (polarity may vary by type) + devcb_write_line m_vsync_callback; // vertical sync output (polarity may vary by type) + devcb_write_line m_vblank_callback; // vertical blanking output (polarity may vary by type) + + // internal registers and control parameters + bool m_60hz_refresh; // refresh rate selector (true = f1, false = f0) + bool m_cgpi; // character generator program/address mode input + u16 m_topr; // top-of-page register + u16 m_rsr; // row start register (to be loaded during next row) + u16 m_cr; // cursor register + u16 m_row_start; // start of current row + u16 m_line; // current scan line (starting at HBLANK) + + // output state + u8 m_lc; // 4-bit line counter + + // timers + emu_timer *m_hblank_start_timer; + emu_timer *m_hblank_near_end_timer; + emu_timer *m_hsync_on_timer; + emu_timer *m_hsync_off_timer; +}; + +// ======================> dp8350_device + +class dp8350_device : public dp835x_device +{ +public: + // device constructor + dp8350_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); +}; + +// ======================> dp8367_device + +class dp8367_device : public dp835x_device +{ +public: + // device constructor + dp8367_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); +}; + +// device type declarations +DECLARE_DEVICE_TYPE(DP8350, dp8350_device) +DECLARE_DEVICE_TYPE(DP8367, dp8367_device) + +#endif // MAME_VIDEO_DP8350_H diff --git a/src/devices/video/poly.h b/src/devices/video/poly.h index 1b8130ceca0..c619c50c2a1 100644 --- a/src/devices/video/poly.h +++ b/src/devices/video/poly.h @@ -323,6 +323,8 @@ poly_manager<_BaseType, _ObjectData, _MaxParams, _MaxPolys>::poly_manager(runnin if (!(flags & FLAG_NO_WORK_QUEUE)) m_queue = osd_work_queue_alloc(WORK_QUEUE_FLAG_MULTI | WORK_QUEUE_FLAG_HIGH_FREQ); + memset(m_unit_bucket, 0xff, sizeof(m_unit_bucket)); + // request a pre-save callback for synchronization machine.save().register_presave(save_prepost_delegate(FUNC(poly_manager::presave), this)); } diff --git a/src/devices/video/psx.cpp b/src/devices/video/psx.cpp index 262277dcdf3..5713a5aa1f0 100644 --- a/src/devices/video/psx.cpp +++ b/src/devices/video/psx.cpp @@ -1045,7 +1045,8 @@ void psxgpu_device::decode_tpage( uint32_t tpage ) WRITE_PIXEL( \ p_n_redshade[ p_n_redlevel[ n_bgr ] | n_r.w.h ] | \ p_n_greenshade[ p_n_greenlevel[ n_bgr ] | n_g.w.h ] | \ - p_n_blueshade[ p_n_bluelevel[ n_bgr ] | n_b.w.h ] ) \ + p_n_blueshade[ p_n_bluelevel[ n_bgr ] | n_b.w.h ] | \ + ( n_bgr & 0x8000 ) ) \ } \ p_vram++; \ PIXELUPDATE \ @@ -1060,7 +1061,8 @@ void psxgpu_device::decode_tpage( uint32_t tpage ) WRITE_PIXEL( \ p_n_redtrans[ p_n_f[ p_n_redlevel[ n_bgr ] | n_r.w.h ] | p_n_redb[ *( p_vram ) ] ] | \ p_n_greentrans[ p_n_f[ p_n_greenlevel[ n_bgr ] | n_g.w.h ] | p_n_greenb[ *( p_vram ) ] ] | \ - p_n_bluetrans[ p_n_f[ p_n_bluelevel[ n_bgr ] | n_b.w.h ] | p_n_blueb[ *( p_vram ) ] ] ) \ + p_n_bluetrans[ p_n_f[ p_n_bluelevel[ n_bgr ] | n_b.w.h ] | p_n_blueb[ *( p_vram ) ] ] | \ + 0x8000 ) \ } \ else \ { \ diff --git a/src/emu/debug/debugcpu.cpp b/src/emu/debug/debugcpu.cpp index c546cc66ffd..3ebd9951a8a 100644 --- a/src/emu/debug/debugcpu.cpp +++ b/src/emu/debug/debugcpu.cpp @@ -2747,7 +2747,7 @@ device_debug::watchpoint::watchpoint(device_debug* debugInterface, std::fill(std::begin(m_end_address), std::end(m_end_address), 0); std::fill(std::begin(m_masks), std::end(m_masks), 0); - offs_t ashift = m_space.addr_shift(); + int ashift = m_space.addr_shift(); endianness_t endian = m_space.endianness(); offs_t subamask = m_space.alignment() - 1; offs_t unit_size = ashift <= 0 ? 8 << -ashift : 8 >> ashift; @@ -2939,7 +2939,7 @@ void device_debug::watchpoint::triggered(read_or_write type, offs_t address, u64 // adjust address, size & value_to_write based on mem_mask. offs_t size = 0; - offs_t ashift = m_space.addr_shift(); + int ashift = m_space.addr_shift(); offs_t unit_size = ashift <= 0 ? 8 << -ashift : 8 >> ashift; u64 unit_mask = make_bitmask<u64>(unit_size); diff --git a/src/emu/debug/dvmemory.cpp b/src/emu/debug/dvmemory.cpp index 63c2f445b30..fd27ca40abd 100644 --- a/src/emu/debug/dvmemory.cpp +++ b/src/emu/debug/dvmemory.cpp @@ -464,14 +464,16 @@ void debug_view_memory::view_char(int chval) if (hexchar == nullptr) break; + const debug_view_memory_source &source = downcast<const debug_view_memory_source &>(*m_source); + offs_t address = (source.m_space != nullptr) ? source.m_space->byte_to_address(pos.m_address) : pos.m_address; u64 data; - bool ismapped = read(m_bytes_per_chunk, pos.m_address, data); + bool ismapped = read(m_bytes_per_chunk, address, data); if (!ismapped) break; data &= ~(u64(0x0f) << pos.m_shift); data |= u64(hexchar - hexvals) << pos.m_shift; - write(m_bytes_per_chunk, pos.m_address, data); + write(m_bytes_per_chunk, address, data); // fall through to the right-arrow press } diff --git a/src/emu/diserial.cpp b/src/emu/diserial.cpp index 8c1abb494fc..01bb07bf8c7 100644 --- a/src/emu/diserial.cpp +++ b/src/emu/diserial.cpp @@ -157,6 +157,8 @@ WRITE_LINE_MEMBER(device_serial_interface::clock_w) void device_serial_interface::set_data_frame(int start_bit_count, int data_bit_count, parity_t parity, stop_bits_t stop_bits) { + //device().logerror("Start bits: %d; Data bits: %d; Parity: %s; Stop bits: %s\n", start_bit_count, data_bit_count, parity_tostring(parity), stop_bits_tostring(stop_bits)); + m_df_word_length = data_bit_count; switch (stop_bits) diff --git a/src/emu/speaker.h b/src/emu/speaker.h index ce4034ade0f..47ad0f6b7d2 100644 --- a/src/emu/speaker.h +++ b/src/emu/speaker.h @@ -19,6 +19,7 @@ magnitude), and completely ignores the y and z coordinates. ***************************************************************************/ + #ifndef MAME_EMU_SPEAKER_H #define MAME_EMU_SPEAKER_H @@ -57,6 +58,7 @@ public: speaker_device &front_center() { set_position(0.0, 0.0, 1.0); return *this; } speaker_device &front_left() { set_position(-0.2, 0.0, 1.0); return *this; } speaker_device &front_right() { set_position(0.2, 0.0, 1.0); return *this; } + speaker_device &rear_center() { set_position(0.0, 0.0, -0.5); return *this; } speaker_device &rear_left() { set_position(-0.2, 0.0, -0.5); return *this; } speaker_device &rear_right() { set_position(0.2, 0.0, -0.5); return *this; } speaker_device &subwoofer() { set_position(0.0, 0.0, 0.0); return *this; } diff --git a/src/emu/xtal.cpp b/src/emu/xtal.cpp index 52314b57da7..ee2c0c1733b 100644 --- a/src/emu/xtal.cpp +++ b/src/emu/xtal.cpp @@ -319,6 +319,7 @@ const double XTAL::known_xtals[] = { 34'846'000, /* 34.846_MHz_XTAL Visual 550 */ 35'904'000, /* 35.904_MHz_XTAL Used on HP98543 graphics board */ 36'000'000, /* 36_MHz_XTAL Sega Model 1 video board */ + 37'980'000, /* 37.98_MHz_XTAL Falco 5220 */ 38'769'220, /* 38.76922_MHz_XTAL Namco System 21 video board */ 38'863'630, /* 38.86363_MHz_XTAL Sharp X68000 15.98kHz video */ 39'321'600, /* 39.3216_MHz_XTAL Sun 2/120 */ @@ -347,6 +348,7 @@ const double XTAL::known_xtals[] = { 50'000'000, /* 50_MHz_XTAL Williams/Midway T/W/V-unit system */ 50'113'000, /* 50.113_MHz_XTAL Namco NA-1 (14x NTSC subcarrier)*/ 50'349'000, /* 50.349_MHz_XTAL Sega System 18 (~3200x NTSC line rate) */ + 51'200'000, /* 51.2_MHz_XTAL Namco Super System 22 video clock */ 52'000'000, /* 52_MHz_XTAL Cojag */ 52'832'000, /* 52.832_MHz_XTAL Wang PC TIG video controller */ 53'203'400, /* 53.2034_MHz_XTAL Master System, Mega Drive PAL (~12x PAL subcarrier) */ diff --git a/src/frontend/mame/luaengine.cpp b/src/frontend/mame/luaengine.cpp index ddae8e8aeb6..44c4fc94b3a 100644 --- a/src/frontend/mame/luaengine.cpp +++ b/src/frontend/mame/luaengine.cpp @@ -24,6 +24,7 @@ #include "natkeyboard.h" #include "uiinput.h" #include "pluginopts.h" +#include "softlist.h" #ifdef __clang__ #pragma clang diagnostic ignored "-Wshift-count-overflow" @@ -1986,6 +1987,7 @@ void lua_engine::initialize() "manufacturer", &device_image_interface::manufacturer, "year", &device_image_interface::year, "software_list_name", &device_image_interface::software_list_name, + "software_parent", sol::property([](device_image_interface &di) { const software_info *si = di.software_entry(); return si ? si->parentname() : ""; }), "image_type_name", &device_image_interface::image_type_name, "load", &device_image_interface::load, "unload", &device_image_interface::unload, diff --git a/src/frontend/mame/mame.cpp b/src/frontend/mame/mame.cpp index 63c765abc24..528a1717a4a 100644 --- a/src/frontend/mame/mame.cpp +++ b/src/frontend/mame/mame.cpp @@ -211,6 +211,9 @@ int mame_machine_manager::execute() // parse any INI files as the first thing if (m_options.read_config()) { + // but first, revert out any potential game-specific INI settings from previous runs via the internal UI + m_options.revert(OPTION_PRIORITY_INI); + std::ostringstream errors; mame_options::parse_standard_inis(m_options, errors); } diff --git a/src/frontend/mame/ui/filesel.cpp b/src/frontend/mame/ui/filesel.cpp index 348ed3207f4..3907f007517 100644 --- a/src/frontend/mame/ui/filesel.cpp +++ b/src/frontend/mame/ui/filesel.cpp @@ -284,6 +284,105 @@ void menu_file_selector::append_entry_menu_item(const file_selector_entry *entry //------------------------------------------------- +// select_item +//------------------------------------------------- + +void menu_file_selector::select_item(const file_selector_entry &entry) +{ + switch (entry.type) + { + case SELECTOR_ENTRY_TYPE_EMPTY: + // empty slot - unload + m_result = result::EMPTY; + stack_pop(); + break; + + case SELECTOR_ENTRY_TYPE_CREATE: + // create + m_result = result::CREATE; + stack_pop(); + break; + + case SELECTOR_ENTRY_TYPE_SOFTWARE_LIST: + m_result = result::SOFTLIST; + stack_pop(); + break; + + case SELECTOR_ENTRY_TYPE_DRIVE: + case SELECTOR_ENTRY_TYPE_DIRECTORY: + // drive/directory - first check the path + { + util::zippath_directory::ptr dir; + osd_file::error const err = util::zippath_directory::open(entry.fullpath, dir); + if (err != osd_file::error::NONE) + { + // this path is problematic; present the user with an error and bail + ui().popup_time(1, _("Error accessing %s"), entry.fullpath); + break; + } + } + m_current_directory.assign(entry.fullpath); + reset(reset_options::SELECT_FIRST); + break; + + case SELECTOR_ENTRY_TYPE_FILE: + // file + m_current_file.assign(entry.fullpath); + m_result = result::FILE; + stack_pop(); + break; + } +} + + +//------------------------------------------------- +// type_search_char +//------------------------------------------------- + +void menu_file_selector::type_search_char(char32_t ch) +{ + std::string const current(m_filename); + if (input_character(m_filename, ch, uchar_is_printable)) + { + ui().popup_time(ERROR_MESSAGE_TIME, "%s", m_filename.c_str()); + + file_selector_entry const *const cur_selected(reinterpret_cast<file_selector_entry const *>(get_selection_ref())); + + // if it's a perfect match for the current selection, don't move it + if (!cur_selected || core_strnicmp(cur_selected->basename.c_str(), m_filename.c_str(), m_filename.size())) + { + std::string::size_type bestmatch(0); + file_selector_entry const *selected_entry(cur_selected); + for (auto &entry : m_entrylist) + { + // TODO: more efficient "common prefix" code + std::string::size_type match(0); + for (std::string::size_type i = 1; m_filename.size() >= i; ++i) + { + if (!core_strnicmp(entry.basename.c_str(), m_filename.c_str(), i)) + match = i; + else + break; + } + + if (match > bestmatch) + { + bestmatch = match; + selected_entry = &entry; + } + } + + if (selected_entry && (selected_entry != cur_selected)) + { + set_selection((void *)selected_entry); + centre_selection(); + } + } + } +} + + +//------------------------------------------------- // populate //------------------------------------------------- @@ -375,61 +474,14 @@ void menu_file_selector::populate(float &customtop, float &custombottom) void menu_file_selector::handle() { - osd_file::error err; - const file_selector_entry *selected_entry = nullptr; - int bestmatch = 0; - // process the menu - const event *event = process(0); - if (event != nullptr && event->itemref != nullptr) + event const *const event = process(0); + if (event && event->itemref) { // handle selections if (event->iptkey == IPT_UI_SELECT) { - auto entry = (const file_selector_entry *) event->itemref; - switch (entry->type) - { - case SELECTOR_ENTRY_TYPE_EMPTY: - // empty slot - unload - m_result = result::EMPTY; - stack_pop(); - break; - - case SELECTOR_ENTRY_TYPE_CREATE: - // create - m_result = result::CREATE; - stack_pop(); - break; - - case SELECTOR_ENTRY_TYPE_SOFTWARE_LIST: - m_result = result::SOFTLIST; - stack_pop(); - break; - - case SELECTOR_ENTRY_TYPE_DRIVE: - case SELECTOR_ENTRY_TYPE_DIRECTORY: - // drive/directory - first check the path - { - util::zippath_directory::ptr dir; - err = util::zippath_directory::open(entry->fullpath, dir); - } - if (err != osd_file::error::NONE) - { - // this path is problematic; present the user with an error and bail - ui().popup_time(1, _("Error accessing %s"), entry->fullpath); - break; - } - m_current_directory.assign(entry->fullpath); - reset(reset_options::SELECT_FIRST); - break; - - case SELECTOR_ENTRY_TYPE_FILE: - // file - m_current_file.assign(entry->fullpath); - m_result = result::FILE; - stack_pop(); - break; - } + select_item(*reinterpret_cast<file_selector_entry const *>(event->itemref)); // reset the char buffer when pressing IPT_UI_SELECT m_filename.clear(); @@ -437,38 +489,7 @@ void menu_file_selector::handle() else if (event->iptkey == IPT_SPECIAL) { // if it's any other key and we're not maxed out, update - if (input_character(m_filename, event->unichar, uchar_is_printable)) - { - ui().popup_time(ERROR_MESSAGE_TIME, "%s", m_filename.c_str()); - - file_selector_entry const *const cur_selected(reinterpret_cast<file_selector_entry const *>(get_selection_ref())); - - // check for entries which matches our m_filename_buffer: - for (auto &entry : m_entrylist) - { - if (cur_selected != &entry) - { - int match = 0; - for (int i = 0; i < m_filename.size() + 1; i++) - { - if (core_strnicmp(entry.basename.c_str(), m_filename.c_str(), i) == 0) - match = i; - } - - if (match > bestmatch) - { - bestmatch = match; - selected_entry = &entry; - } - } - } - - if (selected_entry != nullptr && selected_entry != cur_selected) - { - set_selection((void *)selected_entry); - centre_selection(); - } - } + type_search_char(event->unichar); } else if (event->iptkey == IPT_UI_CANCEL) { diff --git a/src/frontend/mame/ui/filesel.h b/src/frontend/mame/ui/filesel.h index 2aec3a77da1..768cf1ba55e 100644 --- a/src/frontend/mame/ui/filesel.h +++ b/src/frontend/mame/ui/filesel.h @@ -89,6 +89,8 @@ private: file_selector_entry &append_entry(file_selector_entry_type entry_type, std::string &&entry_basename, std::string &&entry_fullpath); file_selector_entry *append_dirent_entry(const osd::directory::entry *dirent); void append_entry_menu_item(const file_selector_entry *entry); + void select_item(const file_selector_entry &entry); + void type_search_char(char32_t ch); }; diff --git a/src/lib/util/options.cpp b/src/lib/util/options.cpp index d323ef11ffe..cffb7493fe3 100644 --- a/src/lib/util/options.cpp +++ b/src/lib/util/options.cpp @@ -1025,3 +1025,30 @@ bool core_options::header_exists(const char *description) const return iter != m_entries.end(); } + +//------------------------------------------------- +// revert - revert options at or below a certain +// priority back to their defaults +//------------------------------------------------- + +void core_options::revert(int priority_hi, int priority_lo) +{ + for (entry::shared_ptr &curentry : m_entries) + if (curentry->type() != option_type::HEADER) + curentry->revert(priority_hi, priority_lo); +} + +//------------------------------------------------- +// revert - revert back to our default if we are +// within the given priority range +//------------------------------------------------- + +void core_options::simple_entry::revert(int priority_hi, int priority_lo) +{ + // if our priority is within the range, revert to the default + if (priority() <= priority_hi && priority() >= priority_lo) + { + set_value(std::string(default_value()), priority(), true); + set_priority(OPTION_PRIORITY_DEFAULT); + } +} diff --git a/src/lib/util/options.h b/src/lib/util/options.h index d0cb6e5c29f..74fec7b0a90 100644 --- a/src/lib/util/options.h +++ b/src/lib/util/options.h @@ -130,6 +130,7 @@ public: virtual void set_default_value(std::string &&newvalue); void set_description(const char *description) { m_description = description; } void set_value_changed_handler(std::function<void(const char *)> &&handler) { m_value_changed_handler = std::move(handler); } + virtual void revert(int priority_hi, int priority_lo) { } protected: virtual void internal_set_value(std::string &&newvalue) = 0; @@ -171,6 +172,7 @@ public: void set_description(const char *name, const char *description); void remove_entry(entry &delentry); void set_value_changed_handler(const std::string &name, std::function<void(const char *)> &&handler); + void revert(int priority_hi = OPTION_PRIORITY_MAXIMUM, int priority_lo = OPTION_PRIORITY_DEFAULT); // parsing/input void parse_command_line(const std::vector<std::string> &args, int priority, bool ignore_unknown_options = false); @@ -217,6 +219,7 @@ private: virtual const char *minimum() const override; virtual const char *maximum() const override; virtual const std::string &default_value() const override; + virtual void revert(int priority_hi, int priority_lo) override; virtual void set_default_value(std::string &&newvalue) override; diff --git a/src/mame/audio/segag80r.cpp b/src/mame/audio/segag80r.cpp index 50704c5a648..27e5f47a68f 100644 --- a/src/mame/audio/segag80r.cpp +++ b/src/mame/audio/segag80r.cpp @@ -687,43 +687,6 @@ void monsterb_sound_device::device_start() save_item(NAME(m_sound_addr)); } -/************************************* - * - * Machine driver - * - *************************************/ - -MACHINE_CONFIG_START(monsterb_sound_device::device_add_mconfig) - /* basic machine hardware */ - MCFG_DEVICE_ADD(m_audiocpu, N7751, 6000000) - MCFG_MCS48_PORT_T1_IN_CB(CONSTANT(0)) // labelled as "TEST", connected to ground - MCFG_MCS48_PORT_P2_IN_CB(READ8(*this, monsterb_sound_device, n7751_command_r)) - MCFG_MCS48_PORT_BUS_IN_CB(READ8(*this, monsterb_sound_device, n7751_rom_r)) - MCFG_MCS48_PORT_P1_OUT_CB(WRITE8("dac", dac_byte_interface, data_w)) - MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(*this, monsterb_sound_device, n7751_p2_w)) - MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(m_i8243, i8243_device, prog_w)) - - I8243(config, m_i8243); - m_i8243->read_handler().set_constant(0); - m_i8243->write_handler().set(FUNC(monsterb_sound_device::n7751_rom_control_w)); - - MCFG_DEVICE_ADD(m_samples, SAMPLES) - MCFG_SAMPLES_CHANNELS(2) - MCFG_SAMPLES_NAMES(monsterb_sample_names) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.25) - - MCFG_TMS36XX_ADD(m_music, 247) - MCFG_TMS36XX_TYPE(TMS3617) - MCFG_TMS36XX_DECAY_TIMES(0.5, 0.5, 0.5, 0.5, 0.5, 0.5) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5) - - MCFG_DEVICE_ADD("dac", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5) // 50K (R91-97)/100K (R98-106) ladder network - MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0) - MCFG_SOUND_ROUTE(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "dac", -1.0, DAC_VREF_NEG_INPUT) - - SPEAKER(config, "speaker").front_center(); -MACHINE_CONFIG_END - /************************************* * @@ -791,37 +754,26 @@ WRITE8_MEMBER(monsterb_sound_device::n7751_command_w) } -WRITE8_MEMBER(monsterb_sound_device::n7751_rom_control_w) +template<int Shift> +void monsterb_sound_device::n7751_rom_addr_w(uint8_t data) { - /* P4 - address lines 0-3 */ - /* P5 - address lines 4-7 */ - /* P6 - address lines 8-11 */ - /* P7 - ROM selects */ - switch (offset) - { - case 0: - m_sound_addr = (m_sound_addr & ~0x00f) | ((data & 0x0f) << 0); - break; - - case 1: - m_sound_addr = (m_sound_addr & ~0x0f0) | ((data & 0x0f) << 4); - break; + // P4 - address lines 0-3 + // P5 - address lines 4-7 + // P5 - address lines 8-11 + m_sound_addr = (m_sound_addr & ~(0x00f << Shift)) | ((data & 0x0f) << Shift); +} - case 2: - m_sound_addr = (m_sound_addr & ~0xf00) | ((data & 0x0f) << 8); - break; - case 3: - m_sound_addr &= 0xfff; - { - int numroms = m_audiocpu_region->bytes() / 0x1000; - if (!(data & 0x01) && numroms >= 1) m_sound_addr |= 0x0000; - if (!(data & 0x02) && numroms >= 2) m_sound_addr |= 0x1000; - if (!(data & 0x04) && numroms >= 3) m_sound_addr |= 0x2000; - if (!(data & 0x08) && numroms >= 4) m_sound_addr |= 0x3000; - } - break; - } +void monsterb_sound_device::n7751_rom_select_w(uint8_t data) +{ + // P7 - ROM selects + m_sound_addr &= 0xfff; + + int numroms = m_audiocpu_region->bytes() / 0x1000; + if (!(data & 0x01) && numroms >= 1) m_sound_addr |= 0x0000; + if (!(data & 0x02) && numroms >= 2) m_sound_addr |= 0x1000; + if (!(data & 0x04) && numroms >= 3) m_sound_addr |= 0x2000; + if (!(data & 0x08) && numroms >= 4) m_sound_addr |= 0x3000; } @@ -843,9 +795,50 @@ READ8_MEMBER(monsterb_sound_device::n7751_command_r) WRITE8_MEMBER(monsterb_sound_device::n7751_p2_w) { /* write to P2; low 4 bits go to 8243 */ - m_i8243->p2_w(space, offset, data & 0x0f); + m_i8243->p2_w(data & 0x0f); /* output of bit $80 indicates we are ready (1) or busy (0) */ /* no other outputs are used */ m_n7751_busy = data >> 7; } + + + +/************************************* + * + * Machine driver + * + *************************************/ + +MACHINE_CONFIG_START(monsterb_sound_device::device_add_mconfig) + /* basic machine hardware */ + MCFG_DEVICE_ADD(m_audiocpu, N7751, 6000000) + MCFG_MCS48_PORT_T1_IN_CB(CONSTANT(0)) // labelled as "TEST", connected to ground + MCFG_MCS48_PORT_P2_IN_CB(READ8(*this, monsterb_sound_device, n7751_command_r)) + MCFG_MCS48_PORT_BUS_IN_CB(READ8(*this, monsterb_sound_device, n7751_rom_r)) + MCFG_MCS48_PORT_P1_OUT_CB(WRITE8("dac", dac_byte_interface, data_w)) + MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(*this, monsterb_sound_device, n7751_p2_w)) + MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(m_i8243, i8243_device, prog_w)) + + I8243(config, m_i8243); + m_i8243->p4_out_cb().set(FUNC(monsterb_sound_device::n7751_rom_addr_w<0>)); + m_i8243->p5_out_cb().set(FUNC(monsterb_sound_device::n7751_rom_addr_w<4>)); + m_i8243->p6_out_cb().set(FUNC(monsterb_sound_device::n7751_rom_addr_w<8>)); + m_i8243->p7_out_cb().set(FUNC(monsterb_sound_device::n7751_rom_select_w)); + + MCFG_DEVICE_ADD(m_samples, SAMPLES) + MCFG_SAMPLES_CHANNELS(2) + MCFG_SAMPLES_NAMES(monsterb_sample_names) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.25) + + MCFG_TMS36XX_ADD(m_music, 247) + MCFG_TMS36XX_TYPE(TMS3617) + MCFG_TMS36XX_DECAY_TIMES(0.5, 0.5, 0.5, 0.5, 0.5, 0.5) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5) + + MCFG_DEVICE_ADD("dac", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5) // 50K (R91-97)/100K (R98-106) ladder network + MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0) + MCFG_SOUND_ROUTE(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "dac", -1.0, DAC_VREF_NEG_INPUT) + + SPEAKER(config, "speaker").front_center(); +MACHINE_CONFIG_END diff --git a/src/mame/audio/segag80r.h b/src/mame/audio/segag80r.h index 6338984dadc..833a5d94f74 100644 --- a/src/mame/audio/segag80r.h +++ b/src/mame/audio/segag80r.h @@ -47,7 +47,8 @@ protected: DECLARE_WRITE8_MEMBER(n7751_p2_w); DECLARE_READ8_MEMBER(n7751_rom_r); - DECLARE_WRITE8_MEMBER(n7751_rom_control_w); + template<int Shift> void n7751_rom_addr_w(uint8_t data); + void n7751_rom_select_w(uint8_t data); required_device<n7751_device> m_audiocpu; required_memory_region m_audiocpu_region; diff --git a/src/mame/audio/segam1audio.cpp b/src/mame/audio/segam1audio.cpp index 1dd071940b1..f3f5ea7273b 100644 --- a/src/mame/audio/segam1audio.cpp +++ b/src/mame/audio/segam1audio.cpp @@ -14,38 +14,30 @@ #include "machine/clock.h" #include "speaker.h" -#define M68000_TAG "sndcpu" -#define MULTIPCM_1_TAG "pcm1" -#define MULTIPCM_2_TAG "pcm2" -#define YM3438_TAG "ymsnd" -#define UART_TAG "uart" -#define MPCMBANK1_TAG "m1pcm1_bank" -#define MPCMBANK2_TAG "m1pcm2_bank" - void segam1audio_device::segam1audio_map(address_map &map) { map(0x000000, 0x03ffff).rom(); - map(0x080000, 0x09ffff).rom().region(M68000_TAG, 0x20000); // mirror of upper ROM socket - map(0xc20000, 0xc20003).rw(UART_TAG, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); - map(0xc40000, 0xc40007).rw(MULTIPCM_1_TAG, FUNC(multipcm_device::read), FUNC(multipcm_device::write)).umask16(0x00ff); + map(0x080000, 0x09ffff).rom().region("sndcpu", 0x20000); // mirror of upper ROM socket + map(0xc20000, 0xc20003).rw(m_uart, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); + map(0xc40000, 0xc40007).rw(m_multipcm_1, FUNC(multipcm_device::read), FUNC(multipcm_device::write)).umask16(0x00ff); map(0xc40012, 0xc40013).nopw(); map(0xc50000, 0xc50001).w(FUNC(segam1audio_device::m1_snd_mpcm_bnk1_w)); - map(0xc60000, 0xc60007).rw(MULTIPCM_2_TAG, FUNC(multipcm_device::read), FUNC(multipcm_device::write)).umask16(0x00ff); + map(0xc60000, 0xc60007).rw(m_multipcm_2, FUNC(multipcm_device::read), FUNC(multipcm_device::write)).umask16(0x00ff); map(0xc70000, 0xc70001).w(FUNC(segam1audio_device::m1_snd_mpcm_bnk2_w)); - map(0xd00000, 0xd00007).rw(YM3438_TAG, FUNC(ym3438_device::read), FUNC(ym3438_device::write)).umask16(0x00ff); + map(0xd00000, 0xd00007).rw(m_ym, FUNC(ym3438_device::read), FUNC(ym3438_device::write)).umask16(0x00ff); map(0xf00000, 0xf0ffff).ram(); } void segam1audio_device::mpcm1_map(address_map &map) { map(0x000000, 0x0fffff).rom(); - map(0x100000, 0x1fffff).bankr(MPCMBANK1_TAG); + map(0x100000, 0x1fffff).bankr(m_mpcmbank1); } void segam1audio_device::mpcm2_map(address_map &map) { map(0x000000, 0x0fffff).rom(); - map(0x100000, 0x1fffff).bankr(MPCMBANK2_TAG); + map(0x100000, 0x1fffff).bankr(m_mpcmbank2); } //************************************************************************** @@ -58,26 +50,27 @@ DEFINE_DEVICE_TYPE(SEGAM1AUDIO, segam1audio_device, "segam1audio", "Sega Model 1 // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(segam1audio_device::device_add_mconfig) - MCFG_DEVICE_ADD(M68000_TAG, M68000, 10000000) // verified on real h/w - MCFG_DEVICE_PROGRAM_MAP(segam1audio_map) +void segam1audio_device::device_add_mconfig(machine_config &config) +{ + M68000(config, m_audiocpu, 10000000); // verified on real h/w + m_audiocpu->set_addrmap(AS_PROGRAM, &segam1audio_device::segam1audio_map); SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); - MCFG_DEVICE_ADD(YM3438_TAG, YM3438, 8000000) - MCFG_SOUND_ROUTE(0, "lspeaker", 0.60) - MCFG_SOUND_ROUTE(1, "rspeaker", 0.60) + YM3438(config, m_ym, 8000000); + m_ym->add_route(0, "lspeaker", 0.60); + m_ym->add_route(1, "rspeaker", 0.60); - MCFG_DEVICE_ADD(MULTIPCM_1_TAG, MULTIPCM, 8000000) - MCFG_DEVICE_ADDRESS_MAP(0, mpcm1_map) - MCFG_SOUND_ROUTE(0, "lspeaker", 1.0) - MCFG_SOUND_ROUTE(1, "rspeaker", 1.0) + MULTIPCM(config, m_multipcm_1, 8000000); + m_multipcm_1->set_addrmap(0, &segam1audio_device::mpcm1_map); + m_multipcm_1->add_route(0, "lspeaker", 1.0); + m_multipcm_1->add_route(1, "rspeaker", 1.0); - MCFG_DEVICE_ADD(MULTIPCM_2_TAG, MULTIPCM, 8000000) - MCFG_DEVICE_ADDRESS_MAP(0, mpcm2_map) - MCFG_SOUND_ROUTE(0, "lspeaker", 1.0) - MCFG_SOUND_ROUTE(1, "rspeaker", 1.0) + MULTIPCM(config, m_multipcm_2, 8000000); + m_multipcm_2->set_addrmap(0, &segam1audio_device::mpcm2_map); + m_multipcm_2->add_route(0, "lspeaker", 1.0); + m_multipcm_2->add_route(1, "rspeaker", 1.0); I8251(config, m_uart, 8000000); // T82C51, clock unknown m_uart->rxrdy_handler().set_inputline(m_audiocpu, M68K_IRQ_2); @@ -86,7 +79,7 @@ MACHINE_CONFIG_START(segam1audio_device::device_add_mconfig) clock_device &uart_clock(CLOCK(config, "uart_clock", 500000)); // 16 times 31.25MHz (standard Sega/MIDI sound data rate) uart_clock.signal_handler().set(m_uart, FUNC(i8251_device::write_txc)); uart_clock.signal_handler().append(m_uart, FUNC(i8251_device::write_rxc)); -MACHINE_CONFIG_END +} //************************************************************************** // LIVE DEVICE @@ -98,15 +91,15 @@ MACHINE_CONFIG_END segam1audio_device::segam1audio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, SEGAM1AUDIO, tag, owner, clock), - m_audiocpu(*this, M68000_TAG), - m_multipcm_1(*this, MULTIPCM_1_TAG), - m_multipcm_2(*this, MULTIPCM_2_TAG), - m_ym(*this, YM3438_TAG), - m_uart(*this, UART_TAG), - m_multipcm1_region(*this, MULTIPCM_1_TAG), - m_multipcm2_region(*this, MULTIPCM_2_TAG), - m_mpcmbank1(*this, MPCMBANK1_TAG), - m_mpcmbank2(*this, MPCMBANK2_TAG), + m_audiocpu(*this, "sndcpu"), + m_multipcm_1(*this, "pcm1"), + m_multipcm_2(*this, "pcm2"), + m_ym(*this, "ymsnd"), + m_uart(*this, "uart"), + m_multipcm1_region(*this, "pcm1"), + m_multipcm2_region(*this, "pcm2"), + m_mpcmbank1(*this, "m1pcm1_bank"), + m_mpcmbank2(*this, "m1pcm2_bank"), m_rxd_handler(*this) { } diff --git a/src/mame/drivers/3do.cpp b/src/mame/drivers/3do.cpp index fca1b451d1f..9e6af48c6cf 100644 --- a/src/mame/drivers/3do.cpp +++ b/src/mame/drivers/3do.cpp @@ -288,7 +288,7 @@ CONS( 1993, 3do_pal, 3do, 0, _3do_pal, 3do, _3do_state, empty_init, // Misc 3do Arcade games GAME( 1993, 3dobios, 0, _3do, 3do, _3do_state, empty_init, ROT0, "The 3DO Company", "3DO Bios", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IS_BIOS_ROOT ) -GAME( 199?, orbatak, 3dobios, _3do, 3do, _3do_state, empty_init, ROT0, "<unknown>", "Orbatak (prototype)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 1995, orbatak, 3dobios, _3do, 3do, _3do_state, empty_init, ROT0, "American Laser Games", "Orbatak (prototype)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // Beavis and Butthead (prototype) diff --git a/src/mame/drivers/a5105.cpp b/src/mame/drivers/a5105.cpp index 93b6b34d7dc..152d3ec1688 100644 --- a/src/mame/drivers/a5105.cpp +++ b/src/mame/drivers/a5105.cpp @@ -608,7 +608,7 @@ MACHINE_CONFIG_START(a5105_state::a5105) MCFG_CASSETTE_ADD( "cassette" ) - MCFG_UPD765A_ADD("upd765a", true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD("upd765a:0", a5105_floppies, "525qd", a5105_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765a:1", a5105_floppies, "525qd", a5105_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765a:2", a5105_floppies, "525qd", a5105_state::floppy_formats) diff --git a/src/mame/drivers/alphatro.cpp b/src/mame/drivers/alphatro.cpp index 09b1e263844..9a4cd32ae99 100644 --- a/src/mame/drivers/alphatro.cpp +++ b/src/mame/drivers/alphatro.cpp @@ -722,9 +722,9 @@ MACHINE_CONFIG_START(alphatro_state::alphatro) WAVE(config, "wave", "cassette").add_route(ALL_OUTPUTS, "mono", 0.25); /* Devices */ - MCFG_UPD765A_ADD("fdc", true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, alphatro_state, fdc_irq_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(m_dmac, i8257_device, dreq2_w)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set(FUNC(alphatro_state::fdc_irq_w)); + m_fdc->drq_wr_callback().set(m_dmac, FUNC(i8257_device::dreq2_w)); MCFG_FLOPPY_DRIVE_ADD("fdc:0", alphatro_floppies, "525dd", alphatro_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("fdc:1", alphatro_floppies, "525dd", alphatro_state::floppy_formats) MCFG_SOFTWARE_LIST_ADD("flop_list", "alphatro_flop") diff --git a/src/mame/drivers/altos486.cpp b/src/mame/drivers/altos486.cpp index 19267323754..bdca3416812 100644 --- a/src/mame/drivers/altos486.cpp +++ b/src/mame/drivers/altos486.cpp @@ -148,7 +148,7 @@ MACHINE_CONFIG_START(altos486_state::altos486) MCFG_DEVICE_ADD("ppi8255", I8255, 0) - MCFG_UPD765A_ADD("fdc", false, false) + UPD765A(config, "fdc", false, false); MCFG_FLOPPY_DRIVE_ADD("fdc:0", altos486_floppies, "525qd", altos486_state::floppy_formats) MCFG_SLOT_FIXED(true) diff --git a/src/mame/drivers/amstr_pc.cpp b/src/mame/drivers/amstr_pc.cpp index 4df7b158d05..6788af70430 100644 --- a/src/mame/drivers/amstr_pc.cpp +++ b/src/mame/drivers/amstr_pc.cpp @@ -510,14 +510,14 @@ MACHINE_CONFIG_START(amstrad_pc_state::pc200) MCFG_DEVICE_ADD("isa2", ISA8_SLOT, 0, "mb:isa", pc_isa8_cards, nullptr, false) /* printer */ - MCFG_DEVICE_ADD("lpt_0", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE("mb:pic8259", pic8259_device, ir7_w)) + pc_lpt_device &lpt0(PC_LPT(config, "lpt_0")); + lpt0.irq_handler().set("mb:pic8259", FUNC(pic8259_device::ir7_w)); - MCFG_DEVICE_ADD("lpt_1", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE("mb:pic8259", pic8259_device, ir7_w)) + PC_LPT(config, m_lpt1); + m_lpt1->irq_handler().set("mb:pic8259", FUNC(pic8259_device::ir7_w)); - MCFG_DEVICE_ADD("lpt_2", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE("mb:pic8259", pic8259_device, ir5_w)) + PC_LPT(config, m_lpt2); + m_lpt2->irq_handler().set("mb:pic8259", FUNC(pic8259_device::ir5_w)); MCFG_PC_JOY_ADD("pc_joy") diff --git a/src/mame/drivers/amstrad.cpp b/src/mame/drivers/amstrad.cpp index f1531b47de5..d099a99b872 100644 --- a/src/mame/drivers/amstrad.cpp +++ b/src/mame/drivers/amstrad.cpp @@ -984,7 +984,7 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(amstrad_state::cpc664) amstrad_base(config); - MCFG_UPD765A_ADD("upd765", true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD("upd765:0", amstrad_floppies, "3ssdd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765:1", amstrad_floppies, "35ssdd", floppy_image_device::default_floppy_formats) MCFG_SOFTWARE_LIST_ADD("flop_list","cpc_flop") @@ -1002,7 +1002,7 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(amstrad_state::cpc6128) amstrad_base(config); - MCFG_UPD765A_ADD("upd765", true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD("upd765:0", amstrad_floppies, "3ssdd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765:1", amstrad_floppies, "35ssdd", floppy_image_device::default_floppy_formats) MCFG_SOFTWARE_LIST_ADD("flop_list","cpc_flop") @@ -1087,7 +1087,7 @@ MACHINE_CONFIG_START(amstrad_state::cpcplus) MCFG_CASSETTE_INTERFACE("cpc_cass") MCFG_SOFTWARE_LIST_ADD("cass_list","cpc_cass") - MCFG_UPD765A_ADD("upd765", true, true) + UPD765A(config, m_fdc, true, true); cpcplus_cartslot(config); @@ -1173,8 +1173,7 @@ MACHINE_CONFIG_START(amstrad_state::aleste) MCFG_DEVICE_ADD("rtc", MC146818, 4.194304_MHz_XTAL) - MCFG_DEVICE_REMOVE("upd765") - MCFG_I8272A_ADD("upd765", true) + I8272A(config.replace(), m_fdc, true); MCFG_DEVICE_REMOVE("exp") MCFG_DEVICE_ADD("exp", CPC_EXPANSION_SLOT, 0) diff --git a/src/mame/drivers/apc.cpp b/src/mame/drivers/apc.cpp index dcb07ab2cdc..db93be349aa 100644 --- a/src/mame/drivers/apc.cpp +++ b/src/mame/drivers/apc.cpp @@ -971,11 +971,11 @@ MACHINE_CONFIG_START(apc_state::apc) m_dmac->out_dack_callback<3>().set(FUNC(apc_state::apc_dack3_w)); NVRAM(config, m_cmos, nvram_device::DEFAULT_ALL_1); - MCFG_UPD1990A_ADD(m_rtc, XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); - MCFG_UPD765A_ADD(m_fdc, true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(m_i8259_s, pic8259_device, ir4_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(m_dmac, am9517a_device, dreq1_w)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set(m_i8259_s, FUNC(pic8259_device::ir4_w)); + m_fdc->drq_wr_callback().set(m_dmac, FUNC(am9517a_device::dreq1_w)); MCFG_FLOPPY_DRIVE_ADD(m_fdc_connector[0], apc_floppies, "8", apc_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(m_fdc_connector[1], apc_floppies, "8", apc_floppy_formats) MCFG_SOFTWARE_LIST_ADD("disk_list","apc") diff --git a/src/mame/drivers/at.cpp b/src/mame/drivers/at.cpp index 635a04b03f1..fed18dbd2e7 100644 --- a/src/mame/drivers/at.cpp +++ b/src/mame/drivers/at.cpp @@ -684,15 +684,15 @@ MACHINE_CONFIG_START(megapc_state::megapc) MCFG_DEVICE_ADD("isa1", ISA16_SLOT, 0, "isabus", pc_isa16_cards, nullptr, false) at_keyboard_controller_device &keybc(AT_KEYBOARD_CONTROLLER(config, "keybc", 12_MHz_XTAL)); - keybc.system_reset_cb().set("wd7600", FUNC(wd7600_device::kbrst_w)); - keybc.gate_a20_cb().set("wd7600", FUNC(wd7600_device::gatea20_w)); - keybc.input_buffer_full_cb().set("wd7600", FUNC(wd7600_device::irq01_w)); - keybc.keyboard_clock_cb().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); - keybc.keyboard_data_cb().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); + keybc.hot_res().set("wd7600", FUNC(wd7600_device::kbrst_w)); + keybc.gate_a20().set("wd7600", FUNC(wd7600_device::gatea20_w)); + keybc.kbd_irq().set("wd7600", FUNC(wd7600_device::irq01_w)); + keybc.kbd_clk().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); + keybc.kbd_data().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); MCFG_DEVICE_ADD("pc_kbdc", PC_KBDC, 0) - MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_clock_w)) - MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_data_w)) + MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_clk_w)) + MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_data_w)) MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL) /* internal ram */ diff --git a/src/mame/drivers/atetris.cpp b/src/mame/drivers/atetris.cpp index df815c4295e..172a0bf8b4b 100644 --- a/src/mame/drivers/atetris.cpp +++ b/src/mame/drivers/atetris.cpp @@ -468,22 +468,26 @@ ROM_END ROM_START( atetrisb2 ) - ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD( "k1-01", 0x10000, 0x8000, CRC(fa056809) SHA1(e4ccccdf9b04b68127c7b03ae263519cf00f94cb) ) + ROM_REGION( 0x18000, "maincpu", 0 ) // Some bootleg PCBs uses unmodified Atari ROMs + ROM_LOAD( "k1-01", 0x10000, 0x8000, CRC(fa056809) SHA1(e4ccccdf9b04b68127c7b03ae263519cf00f94cb) ) // 27512 ROM_CONTINUE( 0x08000, 0x8000 ) - ROM_REGION( 0x10000, "gfx1", 0 ) - ROM_LOAD( "136066-1101.35a", 0x0000, 0x10000, CRC(84a1939f) SHA1(d8577985fc8ed4e74f74c68b7c00c4855b7c3270) ) + ROM_REGION( 0x10000, "gfx1", 0 ) // Some bootleg PCBs uses unmodified Atari ROMs + ROM_LOAD( "136066-1101.35a", 0x0000, 0x10000, CRC(84a1939f) SHA1(d8577985fc8ed4e74f74c68b7c00c4855b7c3270) ) // 27512 ROM_REGION( 0x0020, "proms", 0 ) // currently unused - ROM_LOAD( "m3-7603-5.prom1", 0x00000, 0x0020, CRC(79656af3) SHA1(bf55f100806520b291157c03999606367dd14ecc) ) - - ROM_REGION( 0xa00, "plds", 0 ) // all protected - ROM_LOAD( "tibpal16r4-25cn.pal1", 0x000, 0x104, NO_DUMP ) // sub PCB - ROM_LOAD( "tibpal16r4-25cn.pal3", 0x200, 0x104, NO_DUMP ) // sub PCB - ROM_LOAD( "tibpal16l8-25cn.pal2", 0x400, 0x104, NO_DUMP ) // sub PCB - ROM_LOAD( "tibpal16l8-25cn.pal4", 0x600, 0x104, NO_DUMP ) // main PCB - ROM_LOAD( "tibpal16l8-25cn.pal5", 0x800, 0x104, NO_DUMP ) // main PCB + ROM_LOAD( "m3-7603-5.prom1", 0x00000, 0x0020, CRC(79656af3) SHA1(bf55f100806520b291157c03999606367dd14ecc) ) // 82s123 or TBP18S030 + + /* Unused. It's usual to find PLDs with different hashes, but defining equivalent equations */ + ROM_REGION( 0x859, "plds", 0 ) + ROM_LOAD( "a-gal16v8-b.bin", 0x000, 0x117, CRC(b1dfab0f) SHA1(e9e4db5459617a35a13df4b7a4586dd1b7be04ac) ) // sub PCB - Same content as "b" + ROM_LOAD( "b-gal16v8-b.bin", 0x117, 0x117, CRC(b1dfab0f) SHA1(e9e4db5459617a35a13df4b7a4586dd1b7be04ac) ) // sub PCB - Same content as "a" + ROM_LOAD( "c-gal16v8-b.bin", 0x22e, 0x117, CRC(e1a9db0b) SHA1(5bbac24e37a4d9b8a1387054722fa35478ca7941) ) // sub PCB + ROM_LOAD( "1-pal16l8-a.3g" , 0x345, 0x104, CRC(dcf0d2fe) SHA1(0496acaa605ec5008b110c387136bbc714441384) ) // main PCB - Found also as GAL16v8 on some PCBs + ROM_LOAD( "2-pal16r4-a.3r" , 0x449, 0x104, CRC(d71bdf27) SHA1(cc3503cb037de344fc353886f3492601638c9d45) ) // main PCB + ROM_LOAD( "3-pal16r4-a.8p" , 0x54D, 0x104, CRC(e007edf2) SHA1(4f1bc31abd64e402edb4c900ddb21f258d6782c8) ) // main PCB - Found also as GAL16v8 on some PCBs + ROM_LOAD( "4-pal16l8-a.9n" , 0x651, 0x104, CRC(3630e734) SHA1(a29dc202ffc75ac48815115b85e984fc0c9d5b59) ) // main PCB - Found also as GAL16v8 on some PCBs + ROM_LOAD( "5-pal16l8-a.9m" , 0x755, 0x104, CRC(53b64be1) SHA1(2bf712b766541c90c38c0810ee16848e448c5205) ) // main PCB - Found also as GAL16v8 on some PCBs ROM_END diff --git a/src/mame/drivers/ax20.cpp b/src/mame/drivers/ax20.cpp index bcee6d7cd3e..4047d3ff3e1 100644 --- a/src/mame/drivers/ax20.cpp +++ b/src/mame/drivers/ax20.cpp @@ -149,7 +149,7 @@ MACHINE_CONFIG_START(ax20_state::ax20) MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_ax20) MCFG_PALETTE_ADD_MONOCHROME("palette") - MCFG_I8272A_ADD("fdc", true) + I8272A(config, m_fdc, true); /* Devices */ MCFG_FLOPPY_DRIVE_ADD("fdc:0", ax20_floppies, "525dd", isa8_fdc_device::floppy_formats) diff --git a/src/mame/drivers/bbc.cpp b/src/mame/drivers/bbc.cpp index f9647cb0c2a..0312b0a224c 100644 --- a/src/mame/drivers/bbc.cpp +++ b/src/mame/drivers/bbc.cpp @@ -935,9 +935,9 @@ MACHINE_CONFIG_START(bbc_state::bbcb) m_via6522_1->irq_handler().set("irqs", FUNC(input_merger_device::in_w<2>)); /* adc */ - MCFG_DEVICE_ADD("upd7002", UPD7002, 0) - MCFG_UPD7002_GET_ANALOGUE_CB(bbc_state, BBC_get_analogue_input) - MCFG_UPD7002_EOC_CB(bbc_state, BBC_uPD7002_EOC) + UPD7002(config, m_upd7002, 0); + m_upd7002->set_get_analogue_callback(FUNC(bbc_state::BBC_get_analogue_input), this); + m_upd7002->set_eoc_callback(FUNC(bbc_state::BBC_uPD7002_EOC), this); /* printer */ centronics_device ¢ronics(CENTRONICS(config, "centronics", centronics_devices, "printer")); @@ -1368,9 +1368,9 @@ MACHINE_CONFIG_START(bbc_state::bbcm) m_acia_clock->signal_handler().set(FUNC(bbc_state::write_acia_clock)); /* adc */ - MCFG_DEVICE_ADD("upd7002", UPD7002, 0) - MCFG_UPD7002_GET_ANALOGUE_CB(bbc_state, BBC_get_analogue_input) - MCFG_UPD7002_EOC_CB(bbc_state, BBC_uPD7002_EOC) + UPD7002(config, m_upd7002, 0); + m_upd7002->set_get_analogue_callback(FUNC(bbc_state::BBC_get_analogue_input), this); + m_upd7002->set_eoc_callback(FUNC(bbc_state::BBC_uPD7002_EOC), this); /* system via */ VIA6522(config, m_via6522_0, 16_MHz_XTAL / 16); diff --git a/src/mame/drivers/bfm_sc2.cpp b/src/mame/drivers/bfm_sc2.cpp index 804698c183b..cbdaf1301dc 100644 --- a/src/mame/drivers/bfm_sc2.cpp +++ b/src/mame/drivers/bfm_sc2.cpp @@ -3,7 +3,7 @@ // thanks-to: 'Re-Animator' /**************************************************************************************** - bfm_sc2.c + bfm_sc2.cpp Bellfruit scorpion2/3 driver, (under heavy construction !!!) @@ -7110,8 +7110,6 @@ ROM_START( sc2scshxgman ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "scxgm10.bin", 0x0000, 0x010000, CRC(f8c5bac8) SHA1(7858b2c8442b80b69598244870620d45042b7abb) ) ROM_REGION( 0x200000, "altrevs", ROMREGION_ERASE00 ) - ROM_LOAD( "scxgm10a.bin", 0x0000, 0x010000, CRC(deab7e4e) SHA1(472a55b0ba289b0f4e538bb4c8b826dede3a40bb) ) -//scxgm10b.bin identical ROM_LOAD( "scxhiv1.gmn", 0x0000, 0x010000, CRC(c43c2f43) SHA1(8bd8b2a71f19d6fd1f96d6032d1b60bb75dcaeb8) ) ROM_LOAD( "scxhiv2.gmn", 0x0000, 0x010000, CRC(83a1ecc9) SHA1(b0176b25c97739442f3743136833d0e5fe51c03f) ) ROM_LOAD( "scxlov1.gm", 0x0000, 0x010000, CRC(e305ff5a) SHA1(0bbc1cfaf7c7aaf324c65fd22148437e2bd4ca1e) ) diff --git a/src/mame/drivers/bw12.cpp b/src/mame/drivers/bw12.cpp index 6285c6d1825..1a26bd62754 100644 --- a/src/mame/drivers/bw12.cpp +++ b/src/mame/drivers/bw12.cpp @@ -579,7 +579,7 @@ MACHINE_CONFIG_START(bw12_state::common) /* devices */ MCFG_TIMER_DRIVER_ADD(FLOPPY_TIMER_TAG, bw12_state, floppy_motor_off_tick) - MCFG_UPD765A_ADD(UPD765_TAG, false, true) + UPD765A(config, m_fdc, false, true); PIA6821(config, m_pia, 0); m_pia->readpa_handler().set(FUNC(bw12_state::pia_pa_r)); diff --git a/src/mame/drivers/bzone.cpp b/src/mame/drivers/bzone.cpp index f35d0a23888..e101e5182c1 100644 --- a/src/mame/drivers/bzone.cpp +++ b/src/mame/drivers/bzone.cpp @@ -669,7 +669,7 @@ ROM_START( bzone ) /* Analog Vec Gen A035742-02 */ ROM_LOAD( "036409-01.n1", 0x7800, 0x0800, CRC(1e14e919) SHA1(448fab30535e6fad7e0ab4427bc06bbbe075e797) ) /* Vector Generator ROMs */ ROM_LOAD( "036422-01.bc3", 0x3000, 0x0800, CRC(7414177b) SHA1(147d97a3b475e738ce00b1a7909bbd787ad06eda) ) - ROM_LOAD( "036421-01.a3", 0x3800, 0x0800, CRC(8ea8f939) SHA1(b71e0ab0e220c3e64dc2b094c701fb1a960b64e4) ) + ROM_LOAD( "036421-01.a3", 0x3800, 0x0800, CRC(8ea8f939) SHA1(b71e0ab0e220c3e64dc2b094c701fb1a960b64e4) ) // 036421-01e.a3 same contents /* AVG PROM */ ROM_REGION( 0x100, "user1", 0 ) @@ -699,7 +699,7 @@ ROM_START( bzonea ) /* Analog Vec Gen A035742-02 */ ROM_LOAD( "036409-01.n1", 0x7800, 0x0800, CRC(1e14e919) SHA1(448fab30535e6fad7e0ab4427bc06bbbe075e797) ) /* Vector Generator ROMs */ ROM_LOAD( "036422-01.bc3", 0x3000, 0x0800, CRC(7414177b) SHA1(147d97a3b475e738ce00b1a7909bbd787ad06eda) ) - ROM_LOAD( "036421-01.a3", 0x3800, 0x0800, CRC(8ea8f939) SHA1(b71e0ab0e220c3e64dc2b094c701fb1a960b64e4) ) + ROM_LOAD( "036421-01.a3", 0x3800, 0x0800, CRC(8ea8f939) SHA1(b71e0ab0e220c3e64dc2b094c701fb1a960b64e4) ) // 036421-01e.a3 same contents /* AVG PROM */ ROM_REGION( 0x100, "user1", 0 ) diff --git a/src/mame/drivers/cabal.cpp b/src/mame/drivers/cabal.cpp index 8a24021bba1..a32ce364351 100644 --- a/src/mame/drivers/cabal.cpp +++ b/src/mame/drivers/cabal.cpp @@ -553,13 +553,13 @@ MACHINE_CONFIG_START(cabal_state::cabalt) MCFG_DEVICE_MODIFY("maincpu") MCFG_DEVICE_PROGRAM_MAP(trackball_main_map) - MCFG_DEVICE_ADD("upd4701l", UPD4701A, 0) - MCFG_UPD4701_PORTX("IN0") - MCFG_UPD4701_PORTY("IN1") + upd4701_device &upd4701l(UPD4701A(config, "upd4701l")); + upd4701l.set_portx_tag("IN0"); + upd4701l.set_porty_tag("IN1"); - MCFG_DEVICE_ADD("upd4701h", UPD4701A, 0) - MCFG_UPD4701_PORTX("IN2") - MCFG_UPD4701_PORTY("IN3") + upd4701_device &upd4701h(UPD4701A(config, "upd4701h")); + upd4701h.set_portx_tag("IN2"); + upd4701h.set_porty_tag("IN3"); MACHINE_CONFIG_END MACHINE_CONFIG_START(cabal_state::cabalbl2) diff --git a/src/mame/drivers/chihiro.cpp b/src/mame/drivers/chihiro.cpp index fc410064974..32beb7c23ae 100644 --- a/src/mame/drivers/chihiro.cpp +++ b/src/mame/drivers/chihiro.cpp @@ -374,8 +374,9 @@ Thanks to Alex, Mr Mudkips, and Philip Burke for this info. */ #include "emu.h" -#include "includes/xbox.h" +#include "machine/pci.h" #include "includes/xbox_pci.h" +#include "includes/xbox.h" #include "cpu/i386/i386.h" #include "machine/idehd.h" diff --git a/src/mame/drivers/combatsc.cpp b/src/mame/drivers/combatsc.cpp index 4a32f1b3f69..28712bec092 100644 --- a/src/mame/drivers/combatsc.cpp +++ b/src/mame/drivers/combatsc.cpp @@ -663,6 +663,10 @@ MACHINE_START_MEMBER(combatsc_state,combatsc) save_item(NAME(m_prot)); save_item(NAME(m_pos)); save_item(NAME(m_sign)); + save_pointer(NAME(m_page[0]),0x2000); + save_pointer(NAME(m_page[1]),0x2000); + save_pointer(NAME(m_scrollram0), 0x40); + save_pointer(NAME(m_scrollram1), 0x40); } MACHINE_START_MEMBER(combatsc_state,combatscb) diff --git a/src/mame/drivers/contra.cpp b/src/mame/drivers/contra.cpp index 3af801f7f68..797c7ded4c1 100644 --- a/src/mame/drivers/contra.cpp +++ b/src/mame/drivers/contra.cpp @@ -86,11 +86,11 @@ void contra_state::contra_map(address_map &map) map(0x2400, 0x27ff).w(FUNC(contra_state::contra_fg_vram_w)).share("fg_vram"); map(0x2800, 0x2bff).w(FUNC(contra_state::contra_text_cram_w)).share("tx_cram"); map(0x2c00, 0x2fff).w(FUNC(contra_state::contra_text_vram_w)).share("tx_vram"); - map(0x3000, 0x37ff).writeonly().share("spriteram");/* 2nd bank is at 0x5000 */ - map(0x3800, 0x3fff).writeonly(); // second sprite buffer + map(0x3000, 0x3fff).ram().share("spriteram"); map(0x4000, 0x43ff).w(FUNC(contra_state::contra_bg_cram_w)).share("bg_cram"); map(0x4400, 0x47ff).w(FUNC(contra_state::contra_bg_vram_w)).share("bg_vram"); - map(0x4800, 0x5fff).writeonly(); + map(0x4800, 0x4fff).ram(); + map(0x5000, 0x5fff).ram().share("spriteram_2"); map(0x6000, 0x7fff).bankr("bank1"); map(0x7000, 0x7000).w(FUNC(contra_state::contra_bankswitch_w)); diff --git a/src/mame/drivers/cps1.cpp b/src/mame/drivers/cps1.cpp index 1da56494129..2d949bac9ee 100644 --- a/src/mame/drivers/cps1.cpp +++ b/src/mame/drivers/cps1.cpp @@ -3427,9 +3427,9 @@ MACHINE_CONFIG_START(cps_state::forgottn) MCFG_DEVICE_MODIFY("maincpu") MCFG_DEVICE_PROGRAM_MAP(forgottn_map) - MCFG_DEVICE_ADD("upd4701", UPD4701A, 0) - MCFG_UPD4701_PORTX("DIAL0") - MCFG_UPD4701_PORTY("DIAL1") + upd4701_device &upd4701(UPD4701A(config, "upd4701")); + upd4701.set_portx_tag("DIAL0"); + upd4701.set_porty_tag("DIAL1"); MACHINE_CONFIG_END MACHINE_CONFIG_START(cps_state::cps1_12MHz) diff --git a/src/mame/drivers/cps3.cpp b/src/mame/drivers/cps3.cpp index 8cd672a6c4f..fb7118533be 100644 --- a/src/mame/drivers/cps3.cpp +++ b/src/mame/drivers/cps3.cpp @@ -859,13 +859,11 @@ static const gfx_layout cps3_tiles8x8_layout = void cps3_state::cps3_set_mame_colours(int colournum, uint16_t data, uint32_t fadeval) { - int r,g,b; uint16_t* dst = (uint16_t*)m_colourram.target(); - - r = (data >> 0) & 0x1f; - g = (data >> 5) & 0x1f; - b = (data >> 10) & 0x1f; + int r = (data >> 0) & 0x1f; + int g = (data >> 5) & 0x1f; + int b = (data >> 10) & 0x1f; /* is this 100% correct? */ if (fadeval!=0) @@ -929,137 +927,162 @@ void cps3_state::video_start() m_renderbuffer_clip.set(0, m_screenwidth-1, 0, 224-1); m_renderbuffer_bitmap.fill(0x3f, m_renderbuffer_clip); - } // the 0x400 bit in the tilemap regs is "draw it upside-down" (bios tilemap during flashing, otherwise capcom logo is flipped) -void cps3_state::cps3_draw_tilemapsprite_line(int tmnum, int drawline, bitmap_rgb32 &bitmap, const rectangle &cliprect ) +void cps3_state::cps3_draw_tilemapsprite_line(int tmnum, int drawline, bitmap_rgb32 &bitmap, const rectangle &cliprect) { uint32_t* tmapregs[4] = { m_tilemap20_regs_base, m_tilemap30_regs_base, m_tilemap40_regs_base, m_tilemap50_regs_base }; - uint32_t* regs; - int line; - int scrolly; - if (tmnum>3) + if (tmnum > 3) { - printf("cps3_draw_tilemapsprite_line Illegal tilemap number %d\n",tmnum); + printf("cps3_draw_tilemapsprite_line Illegal tilemap number %d\n", tmnum); return; } - regs = tmapregs[tmnum]; + uint32_t* regs = tmapregs[tmnum]; + + int scrolly = ((regs[0] & 0x0000ffff) >> 0) + 4; + int line = drawline + scrolly; + line &= 0x3ff; - scrolly = ((regs[0]&0x0000ffff)>>0)+4; - line = drawline+scrolly; - line&=0x3ff; + if (!(regs[1] & 0x00008000)) return; + uint32_t mapbase = (regs[2] & 0x007f0000) >> 16; + uint32_t linebase = (regs[2] & 0x7f000000) >> 24; + int linescroll_enable = (regs[1] & 0x00004000); - if (!(regs[1]&0x00008000)) return; + int scrollx; + int x; + int tileline = (line / 16) + 1; + int tilesubline = line % 16; + rectangle clip; + mapbase = mapbase << 10; + linebase = linebase << 10; + + if (!linescroll_enable) + { + scrollx = (regs[0] & 0xffff0000) >> 16; + } + else { - uint32_t mapbase = (regs[2]&0x007f0000)>>16; - uint32_t linebase= (regs[2]&0x7f000000)>>24; - int linescroll_enable = (regs[1]&0x00004000); + //printf("linebase %08x\n", linebase); - int scrollx; - int x; - int tileline = (line/16)+1; - int tilesubline = line % 16; - rectangle clip; + scrollx = (regs[0] & 0xffff0000) >> 16; + scrollx += (m_spriteram[linebase + ((line + 16 - 4) & 0x3ff)] >> 16) & 0x3ff; - mapbase = mapbase << 10; - linebase = linebase << 10; + } - if (!linescroll_enable) - { - scrollx = (regs[0]&0xffff0000)>>16; - } - else - { - // printf("linebase %08x\n", linebase); + //zoombase = (layerregs[1]&0xffff0000)>>16; - scrollx = (regs[0]&0xffff0000)>>16; - scrollx+= (m_spriteram[linebase+((line+16-4)&0x3ff)]>>16)&0x3ff; + drawline &= 0x3ff; - } + if (drawline > cliprect.bottom() + 4) return; + + clip.set(cliprect.left(), cliprect.right(), drawline, drawline); + + for (x = 0; x < (cliprect.right() / 16) + 2; x++) + { + uint32_t dat; + int tileno; + int colour; + int bpp; + int xflip, yflip; + + dat = m_spriteram[mapbase + ((tileline & 63) * 64) + ((x + scrollx / 16) & 63)]; + tileno = (dat & 0xffff0000) >> 17; + colour = (dat & 0x000001ff) >> 0; + bpp = (dat & 0x0000200) >> 9; + yflip = (dat & 0x00000800) >> 11; + xflip = (dat & 0x00001000) >> 12; -// zoombase = (layerregs[1]&0xffff0000)>>16; + if (!bpp) m_gfxdecode->gfx(1)->set_granularity(256); + else m_gfxdecode->gfx(1)->set_granularity(64); - drawline&=0x3ff; + cps3_drawgfxzoom(bitmap, clip, m_gfxdecode->gfx(1), tileno, colour, xflip, yflip, (x * 16) - scrollx % 16, drawline - tilesubline, CPS3_TRANSPARENCY_PEN_INDEX, 0, 0x10000, 0x10000, nullptr, 0); + } +} + +// fg layer (TODO: this could be handled with an actual tilemap) +void cps3_state::draw_fg_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + // bank select? (sfiii2 intro) (could also be a scroll bit if the tilemap is just double height) + int bank = 0x800; + if (m_ss_bank_base & 0x01000000) bank = 0x000; + + for (int line = cliprect.top(); line <= cliprect.bottom(); line++) + { + rectangle clip = cliprect; + clip.min_y = clip.max_y = line; - if (drawline>cliprect.bottom()+4) return; + int y = line / 8; + int count = (y * 64) + bank; - clip.set(cliprect.left(), cliprect.right(), drawline, drawline); + // 'combo meter' in JoJo games uses rowscroll + int rowscroll = m_ss_ram[((line - 1) & 0x1ff) + 0x4000 / 4] >> 16; - for (x=0;x<(cliprect.right()/16)+2;x++) + for (int x = 0; x < 64; x++) { - uint32_t dat; - int tileno; - int colour; - int bpp; - int xflip,yflip; - - dat = m_spriteram[mapbase+((tileline&63)*64)+((x+scrollx/16)&63)]; - tileno = (dat & 0xffff0000)>>17; - colour = (dat & 0x000001ff)>>0; - bpp = (dat & 0x0000200)>>9; - yflip = (dat & 0x00000800)>>11; - xflip = (dat & 0x00001000)>>12; - - if (!bpp) m_gfxdecode->gfx(1)->set_granularity(256); - else m_gfxdecode->gfx(1)->set_granularity(64); - - cps3_drawgfxzoom(bitmap,clip,m_gfxdecode->gfx(1),tileno,colour,xflip,yflip,(x*16)-scrollx%16,drawline-tilesubline,CPS3_TRANSPARENCY_PEN_INDEX,0, 0x10000, 0x10000, nullptr, 0); + uint32_t data = m_ss_ram[count]; // +0x800 = 2nd bank, used on sfiii2 intro.. + uint32_t tile = (data >> 16) & 0x1ff; + int pal = (data & 0x003f) >> 1; + int flipx = (data & 0x0080) >> 7; + int flipy = (data & 0x0040) >> 6; + pal += m_ss_pal_base << 5; + tile += 0x200; + + cps3_drawgfxzoom(bitmap, clip, m_gfxdecode->gfx(0), tile, pal, flipx, flipy, (x * 8) - rowscroll, y * 8, CPS3_TRANSPARENCY_PEN, 0, 0x10000, 0x10000, nullptr, 0); + cps3_drawgfxzoom(bitmap, clip, m_gfxdecode->gfx(0), tile, pal, flipx, flipy, 512 + (x * 8) - rowscroll, y * 8, CPS3_TRANSPARENCY_PEN, 0, 0x10000, 0x10000, nullptr, 0); + + count++; } } } uint32_t cps3_state::screen_update_cps3(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { - int y,x, count; attoseconds_t period = screen.frame_period().attoseconds(); rectangle visarea = screen.visible_area(); int bg_drawn[4] = { 0, 0, 0, 0 }; - uint32_t fullscreenzoomx, fullscreenzoomy; - uint32_t fszx, fszy; - -// decode_ssram(); -// decode_charram(); + // decode_ssram(); + // decode_charram(); /* registers are normally 002a006f 01ef01c6 - widescreen mode = 00230076 026501c6 - only SFIII2 uses widescreen, I don't know exactly which register controls it */ - if (((m_fullscreenzoom[1]&0xffff0000)>>16)==0x0265) + widescreen mode = 00230076 026501c6 + only SFIII2 uses widescreen, I don't know exactly which register controls it */ + if (((m_fullscreenzoom[1] & 0xffff0000) >> 16) == 0x0265) { - if (m_screenwidth!=496) + if (m_screenwidth != 496) { m_screenwidth = 496; - visarea.set(0, 496-1, 0, 224-1); + visarea.set(0, 496 - 1, 0, 224 - 1); screen.configure(496, 224, visarea, period); } } else { - if (m_screenwidth!=384) + if (m_screenwidth != 384) { m_screenwidth = 384; - visarea.set(0, 384-1, 0, 224-1); + visarea.set(0, 384 - 1, 0, 224 - 1); screen.configure(384, 224, visarea, period); } } - fullscreenzoomx = m_fullscreenzoom[3] & 0x000000ff; - fullscreenzoomy = m_fullscreenzoom[3] & 0x000000ff; + uint32_t fullscreenzoomx = m_fullscreenzoom[3] & 0x000000ff; + uint32_t fullscreenzoomy = m_fullscreenzoom[3] & 0x000000ff; /* clamp at 0x80, I don't know if this is accurate */ - if (fullscreenzoomx>0x80) fullscreenzoomx = 0x80; - if (fullscreenzoomy>0x80) fullscreenzoomy = 0x80; + if (fullscreenzoomx > 0x80) fullscreenzoomx = 0x80; + if (fullscreenzoomy > 0x80) fullscreenzoomy = 0x80; - fszx = (fullscreenzoomx<<16)/0x40; - fszy = (fullscreenzoomy<<16)/0x40; + uint32_t fszx = (fullscreenzoomx << 16) / 0x40; + uint32_t fszy = (fullscreenzoomy << 16) / 0x40; m_renderbuffer_clip.set( - 0, ((m_screenwidth*fszx)>>16)-1, - 0, ((224*fszx)>>16)-1); + 0, ((m_screenwidth*fszx) >> 16) - 1, + 0, ((224 * fszx) >> 16) - 1); m_renderbuffer_bitmap.fill(0, m_renderbuffer_clip); @@ -1068,98 +1091,76 @@ uint32_t cps3_state::screen_update_cps3(screen_device &screen, bitmap_rgb32 &bit int i; //printf("Spritelist start:\n"); - for (i=0x00000/4;i<0x2000/4;i+=4) + for (i = 0x00000 / 4; i < 0x2000 / 4; i += 4) { - int xpos = (m_spriteram[i+1]&0x03ff0000)>>16; - int ypos = m_spriteram[i+1]&0x000003ff; - int j; - int gscroll = (m_spriteram[i+0]&0x70000000)>>28; - int length = (m_spriteram[i+0]&0x01ff0000)>>16; // how many entries in the sprite table - uint32_t start = (m_spriteram[i+0]&0x00007ff0)>>4; - - int whichbpp = (m_spriteram[i+2]&0x40000000)>>30; // not 100% sure if this is right, jojo title / characters - int whichpal = (m_spriteram[i+2]&0x20000000)>>29; - int global_xflip = (m_spriteram[i+2]&0x10000000)>>28; - int global_yflip = (m_spriteram[i+2]&0x08000000)>>27; - int global_alpha = (m_spriteram[i+2]&0x04000000)>>26; // alpha / shadow? set on sfiii2 shadows, and big black image in jojo intro - int global_bpp = (m_spriteram[i+2]&0x02000000)>>25; - int global_pal = (m_spriteram[i+2]&0x01ff0000)>>16; - - int gscrollx = (m_unk_vidregs[gscroll]&0x03ff0000)>>16; - int gscrolly = (m_unk_vidregs[gscroll]&0x000003ff)>>0; + int xpos = (m_spriteram[i + 1] & 0x03ff0000) >> 16; + int ypos = m_spriteram[i + 1] & 0x000003ff; + int gscroll = (m_spriteram[i + 0] & 0x70000000) >> 28; + int length = (m_spriteram[i + 0] & 0x01ff0000) >> 16; // how many entries in the sprite table + uint32_t start = (m_spriteram[i + 0] & 0x00007ff0) >> 4; + + int whichbpp = (m_spriteram[i + 2] & 0x40000000) >> 30; // not 100% sure if this is right, jojo title / characters + int whichpal = (m_spriteram[i + 2] & 0x20000000) >> 29; + int global_xflip = (m_spriteram[i + 2] & 0x10000000) >> 28; + int global_yflip = (m_spriteram[i + 2] & 0x08000000) >> 27; + int global_alpha = (m_spriteram[i + 2] & 0x04000000) >> 26; // alpha / shadow? set on sfiii2 shadows, and big black image in jojo intro + int global_bpp = (m_spriteram[i + 2] & 0x02000000) >> 25; + int global_pal = (m_spriteram[i + 2] & 0x01ff0000) >> 16; + + int gscrollx = (m_unk_vidregs[gscroll] & 0x03ff0000) >> 16; + int gscrolly = (m_unk_vidregs[gscroll] & 0x000003ff) >> 0; start = (start * 0x100) >> 2; - if ((m_spriteram[i+0]&0xf0000000) == 0x80000000) + if ((m_spriteram[i + 0] & 0xf0000000) == 0x80000000) break; - for (j=0;j<(length)*4;j+=4) + for (int j = 0; j < (length) * 4; j += 4) { - uint32_t value1 = (m_spriteram[start+j+0]); - uint32_t value2 = (m_spriteram[start+j+1]); - uint32_t value3 = (m_spriteram[start+j+2]); - + uint32_t value1 = (m_spriteram[start + j + 0]); + uint32_t value2 = (m_spriteram[start + j + 1]); + uint32_t value3 = (m_spriteram[start + j + 2]); //uint8_t* srcdata = (uint8_t*)m_char_ram; //uint32_t sourceoffset = (value1 >>14)&0x7fffff; - int count; - - uint32_t tileno = (value1&0xfffe0000)>>17; - int xpos2 = (value2 & 0x03ff0000)>>16; - int ypos2 = (value2 & 0x000003ff)>>0; - int flipx = (value1 & 0x00001000)>>12; - int flipy = (value1 & 0x00000800)>>11; - int alpha = (value1 & 0x00000400)>>10; //? this one is used for alpha effects on warzard - int bpp = (value1 & 0x00000200)>>9; - int pal = (value1 & 0x000001ff); + uint32_t tileno = (value1 & 0xfffe0000) >> 17; + int xpos2 = (value2 & 0x03ff0000) >> 16; + int ypos2 = (value2 & 0x000003ff) >> 0; + int flipx = (value1 & 0x00001000) >> 12; + int flipy = (value1 & 0x00000800) >> 11; + int alpha = (value1 & 0x00000400) >> 10; //? this one is used for alpha effects on warzard + int bpp = (value1 & 0x00000200) >> 9; + int pal = (value1 & 0x000001ff); /* these are the sizes to actually draw */ - int ysizedraw2 = ((value3 & 0x7f000000)>>24); - int xsizedraw2 = ((value3 & 0x007f0000)>>16); - int xx,yy; + int ysizedraw2 = ((value3 & 0x7f000000) >> 24); + int xsizedraw2 = ((value3 & 0x007f0000) >> 16); + int xx, yy; static const int tilestable[4] = { 8,1,2,4 }; - int ysize2 = ((value3 & 0x0000000c)>>2); - int xsize2 = ((value3 & 0x00000003)>>0); - uint32_t xinc,yinc; + int ysize2 = ((value3 & 0x0000000c) >> 2); + int xsize2 = ((value3 & 0x00000003) >> 0); + uint32_t xinc, yinc; - if (ysize2==0) + if (ysize2 == 0) { - // printf("invalid sprite ysize of 0 tiles\n"); + // printf("invalid sprite ysize of 0 tiles\n"); continue; } - if (xsize2==0) // xsize of 0 tiles seems to be a special command to draw tilemaps + if (xsize2 == 0) // xsize of 0 tiles seems to be a special command to draw tilemaps { - int tilemapnum = ((value3 & 0x00000030)>>4); - //int startline;// = value2 & 0x3ff; - //int endline; - //int height = (value3 & 0x7f000000)>>24; - int uu; -// uint32_t* tmapregs[4] = { m_tilemap20_regs_base, m_tilemap30_regs_base, m_tilemap40_regs_base, m_tilemap50_regs_base }; -// uint32_t* regs; -// regs = tmapregs[tilemapnum]; - //endline = value2; - //startline = endline - height; - - //startline &=0x3ff; - //endline &=0x3ff; - - //printf("tilemap draw %01x %02x %02x %02x\n",tilemapnum, value2, height, regs[0]&0x000003ff ); - - //printf("tilemap draw %01x %d %d\n",tilemapnum, startline, endline ); - + int tilemapnum = ((value3 & 0x00000030) >> 4); /* Urgh, the startline / endline seem to be direct screen co-ordinates regardless of fullscreen zoom - which probably means the fullscreen zoom is applied when rendering everything, not aftewards */ - //for (uu=startline;uu<endline+1;uu++) + which probably means the fullscreen zoom is applied when rendering everything, not aftewards */ - if (bg_drawn[tilemapnum]==0) + if (bg_drawn[tilemapnum] == 0) { - for (uu=0;uu<1023;uu++) + for (int uu = 0; uu < 1023; uu++) { - cps3_draw_tilemapsprite_line(tilemapnum, uu, m_renderbuffer_bitmap, m_renderbuffer_clip ); + cps3_draw_tilemapsprite_line(tilemapnum, uu, m_renderbuffer_bitmap, m_renderbuffer_clip); } } bg_drawn[tilemapnum] = 1; @@ -1169,53 +1170,53 @@ uint32_t cps3_state::screen_update_cps3(screen_device &screen, bitmap_rgb32 &bit ysize2 = tilestable[ysize2]; xsize2 = tilestable[xsize2]; - xinc = ((xsizedraw2+1)<<16) / ((xsize2*0x10)); - yinc = ((ysizedraw2+1)<<16) / ((ysize2*0x10)); + xinc = ((xsizedraw2 + 1) << 16) / ((xsize2 * 0x10)); + yinc = ((ysizedraw2 + 1) << 16) / ((ysize2 * 0x10)); - xsize2-=1; - ysize2-=1; + xsize2 -= 1; + ysize2 -= 1; flipx ^= global_xflip; flipy ^= global_yflip; - if (!flipx) xpos2+=((xsizedraw2+1)/2); - else xpos2-=((xsizedraw2+1)/2); + if (!flipx) xpos2 += ((xsizedraw2 + 1) / 2); + else xpos2 -= ((xsizedraw2 + 1) / 2); - ypos2+=((ysizedraw2+1)/2); + ypos2 += ((ysizedraw2 + 1) / 2); - if (!flipx) xpos2-= ((xsize2+1)*16*xinc)>>16; - else xpos2+= (xsize2*16*xinc)>>16; + if (!flipx) xpos2 -= ((xsize2 + 1) * 16 * xinc) >> 16; + else xpos2 += (xsize2 * 16 * xinc) >> 16; - if (flipy) ypos2-= (ysize2*16*yinc)>>16; + if (flipy) ypos2 -= (ysize2 * 16 * yinc) >> 16; { - count = 0; - for (xx=0;xx<xsize2+1;xx++) + int count = 0; + for (xx = 0; xx < xsize2 + 1; xx++) { int current_xpos; - if (!flipx) current_xpos = (xpos+xpos2+((xx*16*xinc)>>16)); - else current_xpos = (xpos+xpos2-((xx*16*xinc)>>16)); + if (!flipx) current_xpos = (xpos + xpos2 + ((xx * 16 * xinc) >> 16)); + else current_xpos = (xpos + xpos2 - ((xx * 16 * xinc) >> 16)); //current_xpos += machine().rand()&0x3ff; current_xpos += gscrollx; current_xpos += 1; - current_xpos &=0x3ff; - if (current_xpos&0x200) current_xpos-=0x400; + current_xpos &= 0x3ff; + if (current_xpos & 0x200) current_xpos -= 0x400; - for (yy=0;yy<ysize2+1;yy++) + for (yy = 0; yy < ysize2 + 1; yy++) { int current_ypos; int actualpal; - if (flipy) current_ypos = (ypos+ypos2+((yy*16*yinc)>>16)); - else current_ypos = (ypos+ypos2-((yy*16*yinc)>>16)); + if (flipy) current_ypos = (ypos + ypos2 + ((yy * 16 * yinc) >> 16)); + else current_ypos = (ypos + ypos2 - ((yy * 16 * yinc) >> 16)); current_ypos += gscrolly; - current_ypos = 0x3ff-current_ypos; + current_ypos = 0x3ff - current_ypos; current_ypos -= 17; - current_ypos &=0x3ff; + current_ypos &= 0x3ff; - if (current_ypos&0x200) current_ypos-=0x400; + if (current_ypos & 0x200) current_ypos -= 0x400; //if ( (whichbpp) && (m_screen->frame_number() & 1)) continue; @@ -1242,24 +1243,21 @@ uint32_t cps3_state::screen_update_cps3(screen_device &screen, bitmap_rgb32 &bit } { - int realtileno = tileno+count; + int realtileno = tileno + count; if (global_alpha || alpha) { - cps3_drawgfxzoom(m_renderbuffer_bitmap,m_renderbuffer_clip,m_gfxdecode->gfx(1),realtileno,actualpal,0^flipx,0^flipy,current_xpos,current_ypos,CPS3_TRANSPARENCY_PEN_INDEX_BLEND,0,xinc,yinc, nullptr, 0); + cps3_drawgfxzoom(m_renderbuffer_bitmap, m_renderbuffer_clip, m_gfxdecode->gfx(1), realtileno, actualpal, 0 ^ flipx, 0 ^ flipy, current_xpos, current_ypos, CPS3_TRANSPARENCY_PEN_INDEX_BLEND, 0, xinc, yinc, nullptr, 0); } else { - cps3_drawgfxzoom(m_renderbuffer_bitmap,m_renderbuffer_clip,m_gfxdecode->gfx(1),realtileno,actualpal,0^flipx,0^flipy,current_xpos,current_ypos,CPS3_TRANSPARENCY_PEN_INDEX,0,xinc,yinc, nullptr, 0); + cps3_drawgfxzoom(m_renderbuffer_bitmap, m_renderbuffer_clip, m_gfxdecode->gfx(1), realtileno, actualpal, 0 ^ flipx, 0 ^ flipy, current_xpos, current_ypos, CPS3_TRANSPARENCY_PEN_INDEX, 0, xinc, yinc, nullptr, 0); } count++; } } } } - // */ - - // printf("cell %08x %08x %08x\n",value1, value2, value3); } } } @@ -1267,22 +1265,16 @@ uint32_t cps3_state::screen_update_cps3(screen_device &screen, bitmap_rgb32 &bit /* copy render bitmap with zoom */ { - uint32_t renderx,rendery; - uint32_t srcx, srcy; - uint32_t* srcbitmap; - uint32_t* dstbitmap; - - - srcy=0; - for (rendery=0;rendery<224;rendery++) + uint32_t srcy = 0; + for (uint32_t rendery = 0; rendery < 224; rendery++) { - dstbitmap = &bitmap.pix32(rendery); - srcbitmap = &m_renderbuffer_bitmap.pix32(srcy>>16); - srcx=0; + uint32_t* dstbitmap = &bitmap.pix32(rendery); + uint32_t* srcbitmap = &m_renderbuffer_bitmap.pix32(srcy >> 16); + uint32_t srcx = 0; - for (renderx=0;renderx<m_screenwidth;renderx++) + for (uint32_t renderx = 0; renderx < m_screenwidth; renderx++) { - dstbitmap[renderx] = m_mame_colours[srcbitmap[srcx>>16]&0x1ffff]; + dstbitmap[renderx] = m_mame_colours[srcbitmap[srcx >> 16] & 0x1ffff]; srcx += fszx; } @@ -1290,43 +1282,22 @@ uint32_t cps3_state::screen_update_cps3(screen_device &screen, bitmap_rgb32 &bit } } - /* Draw the text layer */ - /* Copy the first 0x800 colours to be used for fg layer rendering */ -// for (offset=0;offset<0x200;offset++) -// { -// int palreadbase = (m_ss_pal_base << 9); -// m_palette->set_pen_color(offset,m_mame_colours[palreadbase+offset]); -// } + draw_fg_layer(screen, bitmap, cliprect); - // fg layer - { - // bank select? (sfiii2 intro) - if (m_ss_bank_base & 0x01000000) count = 0x000; - else count = 0x800; - - for (y=0;y<32;y++) - { - for (x=0;x<64;x++) - { - uint32_t data = m_ss_ram[count]; // +0x800 = 2nd bank, used on sfiii2 intro.. - uint32_t tile = (data >> 16) & 0x1ff; - int pal = (data&0x003f) >> 1; - int flipx = (data & 0x0080) >> 7; - int flipy = (data & 0x0040) >> 6; - pal += m_ss_pal_base << 5; - tile+=0x200; - - cps3_drawgfxzoom(bitmap, cliprect, m_gfxdecode->gfx(0),tile,pal,flipx,flipy,x*8,y*8,CPS3_TRANSPARENCY_PEN,0,0x10000,0x10000,nullptr,0); - count++; - } - } - } return 0; } +/* + SSRAM 0x0000 - 0x1fff tilemap layout bank 0 + 0x2000 - 0x3fff tilemap layout bank 1 + 0x4000 - 0x7fff rowscroll (banked?) + 0x8000 - 0xffff tile character definitions + +*/ + READ32_MEMBER(cps3_state::cps3_ssram_r) { - if (offset>0x8000/4) + if (offset>=0x8000/4) return little_endianize_int32(m_ss_ram[offset]); else return m_ss_ram[offset]; @@ -1334,7 +1305,7 @@ READ32_MEMBER(cps3_state::cps3_ssram_r) WRITE32_MEMBER(cps3_state::cps3_ssram_w) { - if (offset>0x8000/4) + if (offset>=0x8000/4) { // we only want to endian-flip the character data, the tilemap info is fine data = little_endianize_int32(data); diff --git a/src/mame/drivers/ct486.cpp b/src/mame/drivers/ct486.cpp index 2f42882ff79..fddaafe2d65 100644 --- a/src/mame/drivers/ct486.cpp +++ b/src/mame/drivers/ct486.cpp @@ -132,15 +132,16 @@ MACHINE_CONFIG_START(ct486_state::ct486) RAM(config, RAM_TAG).set_default_size("4M").set_extra_options("1M,2M,8M,16M,32M,64M"); - at_keyboard_controller_device &keybc(AT_KEYBOARD_CONTROLLER(config, "keybc", XTAL(12'000'000))); - keybc.system_reset_cb().set("cs4031", FUNC(cs4031_device::kbrst_w)); - keybc.gate_a20_cb().set("cs4031", FUNC(cs4031_device::gatea20_w)); - keybc.input_buffer_full_cb().set("cs4031", FUNC(cs4031_device::irq01_w)); - keybc.keyboard_clock_cb().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); - keybc.keyboard_data_cb().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); + at_kbc_device_base &keybc(AT_KEYBOARD_CONTROLLER(config, "keybc", XTAL(12'000'000))); + keybc.hot_res().set("cs4031", FUNC(cs4031_device::kbrst_w)); + keybc.gate_a20().set("cs4031", FUNC(cs4031_device::gatea20_w)); + keybc.kbd_irq().set("cs4031", FUNC(cs4031_device::irq01_w)); + keybc.kbd_clk().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); + keybc.kbd_data().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); + MCFG_DEVICE_ADD("pc_kbdc", PC_KBDC, 0) - MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_clock_w)) - MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_data_w)) + MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_kbc_device_base, kbd_clk_w)) + MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_kbc_device_base, kbd_data_w)) MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL) MCFG_DEVICE_ADD("isabus", ISA16, 0) diff --git a/src/mame/drivers/czk80.cpp b/src/mame/drivers/czk80.cpp index fcedf34fb1a..e9c165ce16a 100644 --- a/src/mame/drivers/czk80.cpp +++ b/src/mame/drivers/czk80.cpp @@ -195,7 +195,7 @@ MACHINE_CONFIG_START(czk80_state::czk80) MCFG_DEVICE_ADD(m_terminal, GENERIC_TERMINAL, 0) MCFG_GENERIC_TERMINAL_KEYBOARD_CB(PUT(czk80_state, kbd_put)) - MCFG_UPD765A_ADD("fdc", true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD("fdc:0", czk80_floppies, "525dd", floppy_image_device::default_floppy_formats) z80ctc_device& ctc(Z80CTC(config, "ctc", XTAL(16'000'000) / 4)); diff --git a/src/mame/drivers/dec0.cpp b/src/mame/drivers/dec0.cpp index 445892464e9..f28fd4e6719 100644 --- a/src/mame/drivers/dec0.cpp +++ b/src/mame/drivers/dec0.cpp @@ -2363,7 +2363,7 @@ ROM_START( drgninjab2 ) ROM_LOAD( "a15.7b", 0x8000, 0x8000, CRC(82007af2) SHA1(f0db1b1dab199df402a7590e56d4d5ab4baca803) ) // 99.612427% ROM_REGION( 0x1000, "mcu", 0 ) /* 68705 microcontroller */ - ROM_LOAD( "mc68705r3p", 0x0000, 0x1000, NO_DUMP ) + ROM_LOAD( "68705r3.0m", 0x0000, 0x1000, CRC(34bc5e7f) SHA1(7231dd7eb9b5152a287e1bcceb3c3a0b35f441af) ) ROM_REGION( 0x10000, "gfx1", 0 ) /* chars */ ROM_LOAD( "a22.9m", 0x00000, 0x08000, CRC(6791bc20) SHA1(7240b2688cda04ee9ea331472a84fbffc85b8e90) ) // 99.996948% @@ -3797,7 +3797,7 @@ GAME( 1988, drgninjab, baddudes, drgninjab, drgninja, dec0_state, init_drgni GAME( 1989, midresb, midres, midresb, midresb, dec0_state, init_midresb, ROT0, "bootleg", "Midnight Resistance (bootleg with 68705)", MACHINE_SUPPORTS_SAVE ) // need to hook up 68705? (probably unused) GAME( 1989, midresbj, midres, midresbj, midresb, dec0_state, init_midresb, ROT0, "bootleg", "Midnight Resistance (Joystick bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1989, ffantasybl, hippodrm, ffantasybl, ffantasybl, dec0_state, init_ffantasybl, ROT0, "bootleg", "Fighting Fantasy (bootleg with 68705)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) // 68705 not dumped, might be the same as midresb -GAME( 1988, drgninjab2, baddudes, drgninjab, drgninja, dec0_state, init_drgninja, ROT0, "bootleg", "Dragonninja (bootleg with 68705)", MACHINE_SUPPORTS_SAVE ) // is this the same board as above? (region warning hacked to World, but still shows Japanese text) +GAME( 1988, drgninjab2, baddudes, drgninjab, drgninja, dec0_state, init_drgninja, ROT0, "bootleg", "Dragonninja (bootleg with 68705)", MACHINE_SUPPORTS_SAVE ) // is this the same board as above? (region warning hacked to World, but still shows Japanese text), 68705 dumped but not hooked up // these are different to the above but quite similar to each other GAME( 1988, automat, robocop, automat, robocop, dec0_automat_state, empty_init, ROT0, "bootleg", "Automat (bootleg of Robocop)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) // sound rom / music from section z with mods for ADPCM? diff --git a/src/mame/drivers/dim68k.cpp b/src/mame/drivers/dim68k.cpp index 77e7952dac6..f68c5eb3ccc 100644 --- a/src/mame/drivers/dim68k.cpp +++ b/src/mame/drivers/dim68k.cpp @@ -331,7 +331,7 @@ MACHINE_CONFIG_START(dim68k_state::dim68k) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50) /* Devices */ - MCFG_UPD765A_ADD("fdc", true, true) // these options unknown + UPD765A(config, "fdc", true, true); // these options unknown MCFG_FLOPPY_DRIVE_ADD("fdc:0", dim68k_floppies, "525hd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("fdc:1", dim68k_floppies, "525hd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/dmv.cpp b/src/mame/drivers/dmv.cpp index 5232bdda4f7..23a5c3ead87 100644 --- a/src/mame/drivers/dmv.cpp +++ b/src/mame/drivers/dmv.cpp @@ -821,9 +821,9 @@ MACHINE_CONFIG_START(dmv_state::dmv) m_dmac->out_iow_callback<3>().set(m_fdc, FUNC(i8272a_device::mdma_w)); m_dmac->out_dack_callback<3>().set(FUNC(dmv_state::dmac_dack3)); - MCFG_I8272A_ADD( "i8272", true ) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, dmv_state, fdc_irq)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE("dma8237", am9517a_device, dreq3_w)) + I8272A(config, m_fdc, true); + m_fdc->intrq_wr_callback().set(FUNC(dmv_state::fdc_irq)); + m_fdc->drq_wr_callback().set(m_dmac, FUNC(am9517a_device::dreq3_w)); MCFG_FLOPPY_DRIVE_ADD("i8272:0", dmv_floppies, "525dd", dmv_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("i8272:1", dmv_floppies, "525dd", dmv_state::floppy_formats) diff --git a/src/mame/drivers/dps1.cpp b/src/mame/drivers/dps1.cpp index 8d104b1fdc0..ecc3c5c7931 100644 --- a/src/mame/drivers/dps1.cpp +++ b/src/mame/drivers/dps1.cpp @@ -218,9 +218,9 @@ MACHINE_CONFIG_START(dps1_state::dps1) AM9519(config, "am9519b", 0); // floppy - MCFG_UPD765A_ADD("fdc", false, true) - //MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, dps1_state, fdc_int_w)) // doesn't appear to be used - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, dps1_state, fdc_drq_w)) + UPD765A(config, m_fdc, false, true); + //m_fdc->intrq_wr_callback().set(FUNC(dps1_state::fdc_int_w)); // doesn't appear to be used + m_fdc->drq_wr_callback().set(FUNC(dps1_state::fdc_drq_w)); MCFG_FLOPPY_DRIVE_ADD("fdc:0", floppies, "floppy0", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_SOUND(true) //MCFG_FLOPPY_DRIVE_ADD("fdc:1", floppies, "floppy1", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/duet16.cpp b/src/mame/drivers/duet16.cpp index 6d6a5a3c3f2..3b37314e0c3 100644 --- a/src/mame/drivers/duet16.cpp +++ b/src/mame/drivers/duet16.cpp @@ -161,7 +161,7 @@ void duet16_state::duet16_mem(address_map &map) map(0xf80c0, 0xf80c0).rw("crtc", FUNC(h46505_device::status_r), FUNC(h46505_device::address_w)); map(0xf80c2, 0xf80c2).rw("crtc", FUNC(h46505_device::register_r), FUNC(h46505_device::register_w)); map(0xf80e0, 0xf80e3).rw("i8741", FUNC(upi41_cpu_device::upi41_master_r), FUNC(upi41_cpu_device::upi41_master_w)).umask16(0x00ff); - map(0xf8100, 0xf8103).m("fdc", FUNC(upd765a_device::map)).umask16(0x00ff); + map(0xf8100, 0xf8103).m(m_fdc, FUNC(upd765a_device::map)).umask16(0x00ff); map(0xf8120, 0xf8120).rw(FUNC(duet16_state::rtc_r), FUNC(duet16_state::rtc_w)); map(0xf8160, 0xf819f).w(FUNC(duet16_state::pal_w)); map(0xf8200, 0xf8201).r(FUNC(duet16_state::sysstat_r)); @@ -406,9 +406,9 @@ MACHINE_CONFIG_START(duet16_state::duet16) MCFG_INPUT_MERGER_ANY_HIGH("tmint") MCFG_INPUT_MERGER_OUTPUT_HANDLER(WRITELINE("pic", pic8259_device, ir0_w)) // INT6 - MCFG_UPD765A_ADD("fdc", true, false) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE("dmac", am9517a_device, dreq0_w)) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE("pic", pic8259_device, ir3_w)) // INT4 + UPD765A(config, m_fdc, true, false); + m_fdc->drq_wr_callback().set(m_dmac, FUNC(am9517a_device::dreq0_w)); + m_fdc->intrq_wr_callback().set(m_pic, FUNC(pic8259_device::ir3_w)); // INT4 MCFG_FLOPPY_DRIVE_ADD("fdc:0", duet16_floppies, "525qd", floppy_image_device::default_floppy_formats) MCFG_SLOT_FIXED(true) MCFG_FLOPPY_DRIVE_ADD("fdc:1", duet16_floppies, "525qd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/falco5220.cpp b/src/mame/drivers/falco5220.cpp new file mode 100644 index 00000000000..68a36c6b733 --- /dev/null +++ b/src/mame/drivers/falco5220.cpp @@ -0,0 +1,126 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/**************************************************************************** + + Skeleton driver for Falco 5220 terminal. + + Three variations of this terminal were introduced in 1986. Falco 5220 + primarily emulates the DEC VT220; Falco 542 primarily emulates the LSI + ADM 42; and Falco 5550 primarily emulates the Wyse WY-50. + + All three of these terminals have the same video characteristics, with + 9x12 characters rendered in a 10x16 cell, displayed in up to 2 screen + windows on 24 or 44 lines (not counting the status line). They also + likely share the gate array which is thus labeled on the Falco 5220 + PCB: + + LIA3417 + 041500-001 + FALCO + TAE8379Δ + + The Falco 500 is also supposed to be part of the series, though it was + introduced earlier and has definitely different video capabilities. + +****************************************************************************/ + +#include "emu.h" +//#include "bus/rs232/rs232.h" +#include "cpu/z80/z80.h" +#include "machine/clock.h" +#include "machine/nvram.h" +#include "machine/z80ctc.h" +#include "machine/z80sio.h" +#include "screen.h" + +class falco5220_state : public driver_device +{ +public: + falco5220_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_screen(*this, "screen") + { + } + + void falco5220(machine_config &config); + +protected: + virtual void machine_start() override; + +private: + u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + + void mem_map(address_map &map); + void io_map(address_map &map); + + required_device<z80_device> m_maincpu; + required_device<screen_device> m_screen; + + //required_shared_ptr<u8> m_cram; // 1x or 2x NEC D43256C-10L + //required_shared_ptr<u8> m_aram; // 1x or 2x NEC D43256C-10L +}; + +u32 falco5220_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + return 0; +} + +void falco5220_state::mem_map(address_map &map) +{ + map(0x0000, 0xbfff).rom().region("roms", 0); + map(0xc000, 0xdfff).ram().share("nvram"); + map(0xe000, 0xffff).ram(); +} + +void falco5220_state::io_map(address_map &map) +{ + map.global_mask(0xff); + map(0x60, 0x63).rw("sio", FUNC(z80sio_device::ba_cd_r), FUNC(z80sio_device::ba_cd_w)); + map(0x70, 0x73).rw("ctc", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write)); +} + +void falco5220_state::machine_start() +{ +} + +static INPUT_PORTS_START(falco5220) +INPUT_PORTS_END + +static const z80_daisy_config daisy_chain[] = +{ + { "ctc" }, + { "sio" }, + { nullptr } +}; + +void falco5220_state::falco5220(machine_config &config) +{ + Z80(config, m_maincpu, 37.98_MHz_XTAL / 8); // Z0840006PSC; clock unverified + m_maincpu->set_addrmap(AS_PROGRAM, &falco5220_state::mem_map); + m_maincpu->set_addrmap(AS_IO, &falco5220_state::io_map); + m_maincpu->set_daisy_config(daisy_chain); + + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // CXK5864AP-10L + battery + + z80ctc_device &ctc(Z80CTC(config, "ctc", 37.98_MHz_XTAL / 8)); // Z0843006PSC + ctc.intr_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); + + clock_device &baudclk(CLOCK(config, "baudclk", 12.288_MHz_XTAL / 5)); + (void)baudclk; + + z80sio_device &sio(Z80SIO(config, "sio", 37.98_MHz_XTAL / 8)); // Z0844006PSC + sio.out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); + + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_raw(37.98_MHz_XTAL, 1500, 0, 1320, 422, 0, 400); // parameters guessed + screen.set_screen_update(FUNC(falco5220_state::screen_update)); +} + +ROM_START(falco5220) + ROM_REGION(0x10000, "roms", 0 ) + ROM_LOAD("152321-000.bin", 0x0000, 0x8000, CRC(45ef4a68) SHA1(71e12dce710f9b66290618e299b2382834845057)) + ROM_LOAD("152321-001.bin", 0x8000, 0x8000, CRC(91056626) SHA1(217ca3de76d5e9861284f5b64f8eff8e541fad3d)) +ROM_END + +COMP(1987, falco5220, 0, 0, falco5220, falco5220, falco5220_state, empty_init, "Falco Data Products", "Falco 5220", MACHINE_IS_SKELETON) diff --git a/src/mame/drivers/fanucspmg.cpp b/src/mame/drivers/fanucspmg.cpp index a444ee32f8b..9733705191d 100644 --- a/src/mame/drivers/fanucspmg.cpp +++ b/src/mame/drivers/fanucspmg.cpp @@ -1011,9 +1011,9 @@ MACHINE_CONFIG_START(fanucspmg_state::fanucspmg) MCFG_PIC8259_OUT_INT_CB(WRITELINE(PIC0_TAG, pic8259_device, ir7_w)) MCFG_PIC8259_IN_SP_CB(CONSTANT(0)) - MCFG_UPD765A_ADD(FDC_TAG, true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(PIC0_TAG, pic8259_device, ir3_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(DMAC_TAG, i8257_device, dreq0_w)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set(m_pic0, FUNC(pic8259_device::ir3_w)); + m_fdc->drq_wr_callback().set(m_dmac, FUNC(i8257_device::dreq0_w)); MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":0", fanuc_floppies, "525dd", fanucspmg_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":1", fanuc_floppies, "525dd", fanucspmg_state::floppy_formats) diff --git a/src/mame/drivers/fidelz80.cpp b/src/mame/drivers/fidelz80.cpp index 78ca19684db..5cbfcbef38f 100644 --- a/src/mame/drivers/fidelz80.cpp +++ b/src/mame/drivers/fidelz80.cpp @@ -597,7 +597,7 @@ private: DECLARE_READ_LINE_MEMBER(vbrc_mcu_t0_r); DECLARE_READ_LINE_MEMBER(vbrc_mcu_t1_r); DECLARE_READ8_MEMBER(vbrc_mcu_p2_r); - DECLARE_WRITE8_MEMBER(vbrc_ioexp_port_w); + template<int P> void vbrc_ioexp_port_w(uint8_t data); void vbrc_main_io(address_map &map); void vbrc_main_map(address_map &map); @@ -1050,10 +1050,11 @@ WRITE8_MEMBER(fidelz80_state::vbrc_speech_w) // I8243 I/O expander -WRITE8_MEMBER(fidelz80_state::vbrc_ioexp_port_w) +template<int P> +void fidelz80_state::vbrc_ioexp_port_w(uint8_t data) { // P4-P7: digit segment data - m_7seg_data = (m_7seg_data & ~(0xf << (4*offset))) | ((data & 0xf) << (4*offset)); + m_7seg_data = (m_7seg_data & ~(0xf << (4*P))) | ((data & 0xf) << (4*P)); vbrc_prepare_display(); } @@ -1071,7 +1072,7 @@ READ8_MEMBER(fidelz80_state::vbrc_mcu_p2_r) { // P20-P23: I8243 P2 // P24-P27: multiplexed inputs (active low) - return (m_i8243->p2_r(space, offset) & 0x0f) | (read_inputs(8) << 4 ^ 0xf0); + return (m_i8243->p2_r() & 0x0f) | (read_inputs(8) << 4 ^ 0xf0); } READ_LINE_MEMBER(fidelz80_state::vbrc_mcu_t0_r) @@ -1792,8 +1793,10 @@ MACHINE_CONFIG_START(fidelz80_state::vbrc) MCFG_MCS48_PORT_T1_IN_CB(READLINE(*this, fidelz80_state, vbrc_mcu_t1_r)) I8243(config, m_i8243); - m_i8243->read_handler().set_constant(0); - m_i8243->write_handler().set(FUNC(fidelz80_state::vbrc_ioexp_port_w)); + m_i8243->p4_out_cb().set(FUNC(fidelz80_state::vbrc_ioexp_port_w<0>)); + m_i8243->p5_out_cb().set(FUNC(fidelz80_state::vbrc_ioexp_port_w<1>)); + m_i8243->p6_out_cb().set(FUNC(fidelz80_state::vbrc_ioexp_port_w<2>)); + m_i8243->p7_out_cb().set(FUNC(fidelz80_state::vbrc_ioexp_port_w<3>)); MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", fidelbase_state, display_decay_tick, attotime::from_msec(1)) config.set_default_layout(layout_fidel_vbrc); diff --git a/src/mame/drivers/flkatck.cpp b/src/mame/drivers/flkatck.cpp index c967926f624..0d111f7a17d 100644 --- a/src/mame/drivers/flkatck.cpp +++ b/src/mame/drivers/flkatck.cpp @@ -98,8 +98,9 @@ void flkatck_state::flkatck_map(address_map &map) map(0x0008, 0x03ff).ram(); /* RAM */ map(0x0400, 0x041f).rw(FUNC(flkatck_state::flkatck_ls138_r), FUNC(flkatck_state::flkatck_ls138_w)); /* inputs, DIPS, bankswitch, counters, sound command */ map(0x0800, 0x0bff).ram().w("palette", FUNC(palette_device::write8)).share("palette"); /* palette */ - map(0x1000, 0x1fff).ram(); /* RAM */ - map(0x2000, 0x3fff).ram().w(FUNC(flkatck_state::flkatck_k007121_w)).share("k007121_ram"); /* Video RAM (007121) */ + map(0x1000, 0x1fff).ram().share("spriteram"); /* RAM */ + map(0x2000, 0x2fff).ram().w(FUNC(flkatck_state::vram_w)).share("vram"); /* Video RAM (007121) */ + map(0x3000, 0x3fff).ram(); map(0x4000, 0x5fff).bankr("bank1"); /* banked ROM */ map(0x6000, 0xffff).rom(); /* ROM */ } diff --git a/src/mame/drivers/galaxian.cpp b/src/mame/drivers/galaxian.cpp index e06113d030a..878d1a5b614 100644 --- a/src/mame/drivers/galaxian.cpp +++ b/src/mame/drivers/galaxian.cpp @@ -8063,6 +8063,24 @@ ROM_START( zerotimed ) ROM_LOAD( "6l.bpr", 0x0000, 0x0020, CRC(c3ac9467) SHA1(f382ad5a34d282056c78a5ec00c30ec43772bae2) ) ROM_END +/* Marti Colls (Falgas) bootleg */ +ROM_START( zerotimemc ) + ROM_REGION( 0x4000, "maincpu", 0 ) + ROM_LOAD( "4_7k.bin", 0x0000, 0x0800, CRC(ac64aabe) SHA1(1cd834bf8b387428639dffd5e4b0ee72fa8aafdf) ) + ROM_LOAD( "5_7j.bin", 0x0800, 0x0800, CRC(a433067e) SHA1(1aed1a2153c4a32a9996fc709e544f2063885599) ) + ROM_LOAD( "6_7h.bin", 0x1000, 0x0800, CRC(7c86fc8a) SHA1(ea7e16cfd765fb992bd476796e2e3a5f87e8360c) ) + ROM_LOAD( "7_7f.bin", 0x1800, 0x0800, CRC(786d690a) SHA1(50c5c07941006e3b71afbf057d27daa2f2274925) ) + ROM_LOAD( "3_7l.bin", 0x2000, 0x0800, CRC(af9260d7) SHA1(955e466a8989993351dc69d73ca322c1c9af7b63) ) + + ROM_REGION( 0x1000, "gfx1", 0 ) + ROM_LOAD( "2_1hj.bin", 0x0000, 0x0800, CRC(bc7d0985) SHA1(550a44c9ddc8da66a29405591a590f91d2675cdf) ) + ROM_LOAD( "1_1kl.bin", 0x0800, 0x0800, CRC(c48b88d0) SHA1(dc79f596395af0f3137eb932fe224ab8307d8771) ) + + /* Not dumped on the Marti Colls PCB, taken from the parent set */ + ROM_REGION( 0x0020, "proms", 0 ) + ROM_LOAD( "6l.bpr", 0x0000, 0x0020, CRC(c3ac9467) SHA1(f382ad5a34d282056c78a5ec00c30ec43772bae2) ) +ROM_END + ROM_START( starfght ) ROM_REGION( 0x4000, "maincpu", 0 ) @@ -10740,7 +10758,7 @@ ROM_START( froggrs ) ROM_LOAD( "pr-91.6l", 0x0000, 0x0020, CRC(413703bf) SHA1(66648b2b28d3dcbda5bdb2605d1977428939dd3c) ) ROM_END -/* Video Dens Frogger */ +/* Hermatic Frogger, found on a Video Dens PCB */ ROM_START( froggervd ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "frogvd_r1-libro-s1.ac9", 0x0000, 0x0800, CRC(81c2020e) SHA1(8c9292b399a408795e78b7dc5c706d3b526d3751) ) // 2716 @@ -12382,8 +12400,9 @@ GAME( 1979, supergs, galaxian, galaxian, superg, galaxian_state, init_ GAME( 1979, galturbo, galaxian, galaxian, superg, galaxian_state, init_galaxian, ROT90, "hack", "Galaxian Turbo (superg hack)", MACHINE_SUPPORTS_SAVE ) GAME( 1979, galap1, galaxian, galaxian, superg, galaxian_state, init_galaxian, ROT90, "hack", "Space Invaders Galactica (galaxiana hack)", MACHINE_SUPPORTS_SAVE ) GAME( 1979, galap4, galaxian, galaxian, superg, galaxian_state, init_galaxian, ROT90, "hack (G.G.I)", "Galaxian Part 4 (hack)", MACHINE_SUPPORTS_SAVE ) -GAME( 1979, zerotime, galaxian, galaxian, zerotime, galaxian_state, init_galaxian, ROT90, "bootleg? (Petaco S.A.)", "Zero Time", MACHINE_SUPPORTS_SAVE ) +GAME( 1979, zerotime, galaxian, galaxian, zerotime, galaxian_state, init_galaxian, ROT90, "bootleg? (Petaco S.A.)", "Zero Time (Petaco S.A.)", MACHINE_SUPPORTS_SAVE ) GAME( 1979, zerotimed, galaxian, galaxian, zerotime, galaxian_state, init_galaxian, ROT90, "bootleg (Datamat)", "Zero Time (Datamat)", MACHINE_SUPPORTS_SAVE ) // a 1994 bootleg of the Petaco bootleg +GAME( 1979, zerotimemc, galaxian, galaxian, zerotime, galaxian_state, init_galaxian, ROT90, "bootleg (Marti Colls)", "Zero Time (Marti Colls)", MACHINE_SUPPORTS_SAVE ) GAME( 1979, starfght, galaxian, galaxian, swarm, galaxian_state, init_galaxian, ROT90, "bootleg (Jeutel)", "Star Fighter", MACHINE_SUPPORTS_SAVE ) GAME( 1979, galaxbsf, galaxian, galaxian, galaxian, galaxian_state, init_galaxian, ROT90, "bootleg", "Galaxian (bootleg, set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1979, galaxianbl, galaxian, galaxian, galaxianbl, galaxian_state, init_galaxian, ROT90, "bootleg", "Galaxian (bootleg, set 2)", MACHINE_SUPPORTS_SAVE ) @@ -12582,7 +12601,7 @@ GAME( 1981, froggers, frogger, froggers, frogger, galaxian_state, init_ GAME( 1981, frogf, frogger, frogf, frogger, galaxian_state, init_froggers, ROT90, "bootleg (Falcon)", "Frog (Falcon bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, frogg, frogger, frogg, frogg, galaxian_state, init_frogg, ROT90, "bootleg", "Frog (Galaxian hardware)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, froggrs, frogger, froggers, frogger, galaxian_state, init_froggrs, ROT90, "bootleg (Coin Music)", "Frogger (Coin Music, bootleg on Scramble hardware)", MACHINE_SUPPORTS_SAVE ) -GAME( 1981, froggervd, frogger, froggervd, frogger, galaxian_state, init_quaak, ROT90, "bootleg (Video Dens)", "Frogger (Video Dens, bootleg on Scramble hardware)", MACHINE_SUPPORTS_SAVE ) +GAME( 1981, froggervd, frogger, froggervd, frogger, galaxian_state, init_quaak, ROT90, "bootleg (Hermatic)", "Frogger (Hermatic, bootleg on Scramble hardware from Video Dens)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, quaak, frogger, quaak, frogger, galaxian_state, init_quaak, ROT90, "bootleg", "Quaak (bootleg of Frogger)", MACHINE_SUPPORTS_SAVE ) // closest to Super Cobra hardware, presumably a bootleg from Germany (Quaak is the German frog sound) GAME( 1981, froggeram, frogger, froggeram, froggeram, galaxian_state, init_quaak, ROT90, "bootleg", "Frogger (bootleg on Amigo? hardware)", MACHINE_SUPPORTS_SAVE ) // meant to be Amigo hardware, but maybe a different bootleg than the one we have? diff --git a/src/mame/drivers/hazl1420.cpp b/src/mame/drivers/hazl1420.cpp index 6c9c56efb7e..85400ec2347 100644 --- a/src/mame/drivers/hazl1420.cpp +++ b/src/mame/drivers/hazl1420.cpp @@ -7,13 +7,16 @@ ****************************************************************************/ #include "emu.h" -//#include "bus/rs232/rs232.h" +#include "bus/rs232/rs232.h" #include "cpu/mcs48/mcs48.h" #include "machine/bankdev.h" -//#include "machine/i8243.h" +#include "machine/i8243.h" +#include "machine/input_merger.h" #include "machine/ins8250.h" -//#include "video/dp8350.h" +#include "sound/beep.h" +#include "video/dp8350.h" #include "screen.h" +#include "speaker.h" class hazl1420_state : public driver_device { @@ -22,6 +25,12 @@ public: : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") , m_bankdev(*this, "bankdev") + , m_ioexp(*this, "ioexp%u", 0U) + , m_mainint(*this, "mainint") + , m_crtc(*this, "crtc") + , m_beeper(*this, "beep") + , m_videoram(*this, "videoram") + , m_keys(*this, "KEY%u", 0U) { } @@ -31,7 +40,18 @@ protected: virtual void machine_start() override; private: + void p1_w(u8 data); + u8 p2_r(); void p2_w(u8 data); + void videoram_w(offs_t offset, u8 data); + void crtc_w(offs_t offset, u8 data); + void p6_w(u8 data); + void p7_w(u8 data); + + u8 key_r(); + + DECLARE_WRITE_LINE_MEMBER(crtc_lbre_w); + DECLARE_WRITE_LINE_MEMBER(crtc_vblank_w); void prog_map(address_map &map); void io_map(address_map &map); @@ -41,12 +61,62 @@ private: required_device<mcs48_cpu_device> m_maincpu; required_device<address_map_bank_device> m_bankdev; - //required_device_array<i8243_device, 2> m_ioexp; + required_device_array<i8243_device, 2> m_ioexp; + required_device<input_merger_device> m_mainint; + required_device<dp8350_device> m_crtc; + required_device<beep_device> m_beeper; + required_shared_ptr<u8> m_videoram; + required_ioport_array<10> m_keys; }; +void hazl1420_state::p1_w(u8 data) +{ + m_ioexp[0]->cs_w((data & 0xc0) == 0x80 ? 0 : 1); + m_ioexp[1]->cs_w((data & 0xc0) == 0xc0 ? 0 : 1); + + // acknowledge CRTC interrupts + if (BIT(data, 4)) + m_mainint->in_w<0>(0); +} + +u8 hazl1420_state::p2_r() +{ + u8 result = 0xe0 | (!m_crtc->lbre_r() << 4); + result |= m_ioexp[0]->p2_r() & m_ioexp[1]->p2_r(); + return result; +} + void hazl1420_state::p2_w(u8 data) { - m_bankdev->set_bank(data & 0x0f); + m_bankdev->set_bank((data & 0xe0) >> 1 | (data & 0x0f)); +} + +void hazl1420_state::videoram_w(offs_t offset, u8 data) +{ + m_videoram[offset] = data; + if (BIT(m_maincpu->p1_r(), 5)) + m_videoram[offset ^ 1] = data; +} + +void hazl1420_state::crtc_w(offs_t offset, u8 data) +{ + // CRTC registers are loaded only during vertical blanking period + m_crtc->register_load(bitswap<2>(offset >> 12, 0, 1), offset & 0xfff); +} + +void hazl1420_state::p6_w(u8 data) +{ + m_beeper->set_state(!BIT(data, 1)); +} + +void hazl1420_state::p7_w(u8 data) +{ +} + +u8 hazl1420_state::key_r() +{ + u8 row = m_maincpu->p1_r() & 0x0f; + return (row < 10) ? m_keys[row]->read() : 0xff; } void hazl1420_state::prog_map(address_map &map) @@ -61,73 +131,197 @@ void hazl1420_state::io_map(address_map &map) void hazl1420_state::bank_map(address_map &map) { - map(0x800, 0x807).mirror(0x10).rw("ace", FUNC(ins8250_device::ins8250_r), FUNC(ins8250_device::ins8250_w)); - map(0xc48, 0xc48).ram(); + map(0x0000, 0x07ff).ram().share("videoram").w(FUNC(hazl1420_state::videoram_w)); + map(0x0800, 0x0807).mirror(0x10).rw("ace", FUNC(ins8250_device::ins8250_r), FUNC(ins8250_device::ins8250_w)); + map(0x0c00, 0x0cff).ram(); // optional input buffer? + map(0x4000, 0x7fff).w(FUNC(hazl1420_state::crtc_w)); } void hazl1420_state::machine_start() { } +WRITE_LINE_MEMBER(hazl1420_state::crtc_lbre_w) +{ + if (!state && !m_crtc->vblank_r() && !BIT(m_maincpu->p1_r(), 4)) + m_mainint->in_w<0>(1); +} + +WRITE_LINE_MEMBER(hazl1420_state::crtc_vblank_w) +{ + if (state && !BIT(m_maincpu->p1_r(), 4)) + m_mainint->in_w<0>(1); +} + u32 hazl1420_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { return 0; } static INPUT_PORTS_START(hazl1420) + PORT_START("KEY0") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD)) PORT_CODE(KEYCODE_0_PAD) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD)) PORT_CODE(KEYCODE_1_PAD) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(2_PAD)) PORT_CODE(KEYCODE_2_PAD) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(3_PAD)) PORT_CODE(KEYCODE_3_PAD) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD)) PORT_CODE(KEYCODE_4_PAD) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(5_PAD)) PORT_CODE(KEYCODE_5_PAD) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD)) PORT_CODE(KEYCODE_MINUS_PAD) + + PORT_START("KEY1") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) PORT_CODE(KEYCODE_6_PAD) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) PORT_CODE(KEYCODE_7_PAD) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD)) PORT_CODE(KEYCODE_8_PAD) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD)) PORT_CODE(KEYCODE_9_PAD) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(COMMA_PAD)) PORT_CODE(KEYCODE_COMMA_PAD) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD)) PORT_CODE(KEYCODE_DEL_PAD) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(ENTER_PAD)) PORT_CODE(KEYCODE_ENTER_PAD) + + PORT_START("KEY2") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('1') PORT_CHAR('!') PORT_CODE(KEYCODE_1) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('2') PORT_CHAR('@') PORT_CODE(KEYCODE_2) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('3') PORT_CHAR('#') PORT_CODE(KEYCODE_3) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('4') PORT_CHAR('$') PORT_CODE(KEYCODE_4) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('5') PORT_CHAR('%') PORT_CODE(KEYCODE_5) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('6') PORT_CHAR('^') PORT_CODE(KEYCODE_6) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('7') PORT_CHAR('&') PORT_CODE(KEYCODE_7) + + PORT_START("KEY3") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('q') PORT_CHAR('Q') PORT_CODE(KEYCODE_Q) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('w') PORT_CHAR('W') PORT_CODE(KEYCODE_W) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('e') PORT_CHAR('E') PORT_CODE(KEYCODE_E) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('r') PORT_CHAR('R') PORT_CODE(KEYCODE_R) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('t') PORT_CHAR('T') PORT_CODE(KEYCODE_T) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('y') PORT_CHAR('Y') PORT_CODE(KEYCODE_Y) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('u') PORT_CHAR('U') PORT_CODE(KEYCODE_U) + + PORT_START("KEY4") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('a') PORT_CHAR('A') PORT_CODE(KEYCODE_A) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('s') PORT_CHAR('S') PORT_CODE(KEYCODE_S) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('d') PORT_CHAR('D') PORT_CODE(KEYCODE_D) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('f') PORT_CHAR('F') PORT_CODE(KEYCODE_F) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('g') PORT_CHAR('G') PORT_CODE(KEYCODE_G) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('h') PORT_CHAR('H') PORT_CODE(KEYCODE_H) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('j') PORT_CHAR('J') PORT_CODE(KEYCODE_J) + + PORT_START("KEY5") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('z') PORT_CHAR('Z') PORT_CODE(KEYCODE_Z) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('x') PORT_CHAR('X') PORT_CODE(KEYCODE_X) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('c') PORT_CHAR('C') PORT_CODE(KEYCODE_C) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('v') PORT_CHAR('V') PORT_CODE(KEYCODE_V) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('b') PORT_CHAR('B') PORT_CODE(KEYCODE_B) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('n') PORT_CHAR('N') PORT_CODE(KEYCODE_N) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('m') PORT_CHAR('M') PORT_CODE(KEYCODE_M) + + PORT_START("KEY6") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('=') PORT_CHAR('+') PORT_CODE(KEYCODE_EQUALS) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('8') PORT_CHAR('*') PORT_CODE(KEYCODE_8) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('9') PORT_CHAR('(') PORT_CODE(KEYCODE_9) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('0') PORT_CHAR(')') PORT_CODE(KEYCODE_0) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('-') PORT_CHAR('_') PORT_CODE(KEYCODE_MINUS) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(0x08) PORT_CODE(KEYCODE_BACKSPACE) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('`') PORT_CHAR('~') PORT_CODE(KEYCODE_TILDE) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KEY7") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(']') PORT_CHAR('}') PORT_CODE(KEYCODE_CLOSEBRACE) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('i') PORT_CHAR('I') PORT_CODE(KEYCODE_I) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('o') PORT_CHAR('O') PORT_CODE(KEYCODE_O) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('p') PORT_CHAR('P') PORT_CODE(KEYCODE_P) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('[') PORT_CHAR('{') PORT_CODE(KEYCODE_OPENBRACE) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('\\') PORT_CHAR('|') PORT_CODE(KEYCODE_BACKSLASH) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY8") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Return") PORT_CHAR(0x0d) PORT_CODE(KEYCODE_ENTER) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('k') PORT_CHAR('K') PORT_CODE(KEYCODE_K) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('l') PORT_CHAR('L') PORT_CODE(KEYCODE_L) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(';') PORT_CHAR(':') PORT_CODE(KEYCODE_COLON) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('\'') PORT_CHAR('"') PORT_CODE(KEYCODE_QUOTE) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(' ') PORT_CODE(KEYCODE_SPACE) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(0x1b) PORT_CODE(KEYCODE_RALT) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY9") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("LF") PORT_CHAR(0x0a) PORT_CODE(KEYCODE_INSERT) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(',') PORT_CHAR('<') PORT_CODE(KEYCODE_COMMA) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('.') PORT_CHAR('>') PORT_CODE(KEYCODE_STOP) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('/') PORT_CHAR('/') PORT_CODE(KEYCODE_SLASH) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Del") PORT_CHAR(0x7f) PORT_CODE(KEYCODE_DEL) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) + // DIP switches are on access panel above keyboard // "SW1" and "SW2" are not actual names - PORT_START("SW1") - PORT_DIPNAME(0x01, 0x00, DEF_STR(Unused)) PORT_DIPLOCATION("SW1:1") - PORT_DIPSETTING(0x01, DEF_STR(Off)) - PORT_DIPSETTING(0x00, DEF_STR(On)) - PORT_DIPNAME(0x02, 0x00, DEF_STR(Unused)) PORT_DIPLOCATION("SW1:2") - PORT_DIPSETTING(0x02, DEF_STR(Off)) - PORT_DIPSETTING(0x00, DEF_STR(On)) - PORT_DIPNAME(0x1c, 0x18, "Baud Rate") PORT_DIPLOCATION("SW1:3,4,5") - PORT_DIPSETTING(0x00, "110") - PORT_DIPSETTING(0x04, "300") - PORT_DIPSETTING(0x08, "600") - PORT_DIPSETTING(0x0c, "1200") - PORT_DIPSETTING(0x10, "1800") - PORT_DIPSETTING(0x14, "2400") - PORT_DIPSETTING(0x18, "4800") - PORT_DIPSETTING(0x1c, "9600") - PORT_DIPNAME(0x20, 0x00, "Lead-In") PORT_DIPLOCATION("SW1:6") - PORT_DIPSETTING(0x00, "ESC") - PORT_DIPSETTING(0x20, "~") - PORT_DIPNAME(0xc0, 0xc0, "Parity") PORT_DIPLOCATION("SW1:7,8") - PORT_DIPSETTING(0x00, "Odd") - PORT_DIPSETTING(0x40, "Even") - PORT_DIPSETTING(0x80, "1") - PORT_DIPSETTING(0xc0, "0") - - PORT_START("SW2") - PORT_DIPNAME(0x01, 0x00, DEF_STR(Unused)) PORT_DIPLOCATION("SW2:1") - PORT_DIPSETTING(0x01, DEF_STR(Off)) - PORT_DIPSETTING(0x00, DEF_STR(On)) - PORT_DIPNAME(0x02, 0x00, "Cursor") PORT_DIPLOCATION("SW2:2") - PORT_DIPSETTING(0x00, "Wraparound") - PORT_DIPSETTING(0x02, "No Wrap") - PORT_DIPNAME(0x04, 0x00, DEF_STR(Unused)) PORT_DIPLOCATION("SW2:3") - PORT_DIPSETTING(0x04, DEF_STR(Off)) - PORT_DIPSETTING(0x00, DEF_STR(On)) - PORT_DIPNAME(0x08, 0x08, "Font") PORT_DIPLOCATION("SW2:4") - PORT_DIPSETTING(0x08, "Upper/Lower Case") - PORT_DIPSETTING(0x00, "Upper Case Only") - PORT_DIPNAME(0x10, 0x10, "Communication Mode") PORT_DIPLOCATION("SW2:5") - PORT_DIPSETTING(0x00, "Half Duplex") - PORT_DIPSETTING(0x10, "Full Duplex") - PORT_DIPNAME(0x20, 0x20, "Automatic LF/CR") PORT_DIPLOCATION("SW2:6") - PORT_DIPSETTING(0x20, "Auto LF") - PORT_DIPSETTING(0x00, "Carriage Return") - PORT_DIPNAME(0x40, 0x40, "On Line") PORT_DIPLOCATION("SW2:7") - PORT_DIPSETTING(0x40, DEF_STR(Off)) - PORT_DIPSETTING(0x00, DEF_STR(On)) - PORT_DIPNAME(0x80, 0x00, DEF_STR(Unused)) PORT_DIPLOCATION("SW2:8") - PORT_DIPSETTING(0x80, DEF_STR(Off)) - PORT_DIPSETTING(0x00, DEF_STR(On)) + PORT_START("INP4") + PORT_DIPNAME(0x7, 0x6, "Baud Rate") PORT_DIPLOCATION("SW1:3,4,5") + PORT_DIPSETTING(0x0, "110") + PORT_DIPSETTING(0x1, "300") + PORT_DIPSETTING(0x2, "600") + PORT_DIPSETTING(0x3, "1200") + PORT_DIPSETTING(0x4, "1800") + PORT_DIPSETTING(0x5, "2400") + PORT_DIPSETTING(0x6, "4800") + PORT_DIPSETTING(0x7, "9600") + PORT_DIPNAME(0x8, 0x0, "Lead-In") PORT_DIPLOCATION("SW1:6") // not verified + PORT_DIPSETTING(0x0, "ESC") + PORT_DIPSETTING(0x8, "~") + + PORT_START("INP5") + PORT_DIPNAME(0x3, 0x3, "Parity") PORT_DIPLOCATION("SW1:7,8") + PORT_DIPSETTING(0x0, "Odd") + PORT_DIPSETTING(0x1, "Even") + PORT_DIPSETTING(0x2, "1") + PORT_DIPSETTING(0x3, "0") + PORT_DIPNAME(0x4, 0x0, DEF_STR(Unused)) PORT_DIPLOCATION("SW2:1") + PORT_DIPSETTING(0x4, DEF_STR(Off)) + PORT_DIPSETTING(0x0, DEF_STR(On)) + PORT_BIT(0x8, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("INP6") + PORT_DIPNAME(0x1, 0x0, "Cursor") PORT_DIPLOCATION("SW2:2") + PORT_DIPSETTING(0x0, "Wraparound") + PORT_DIPSETTING(0x1, "No Wrap") + PORT_DIPNAME(0x2, 0x2, "On Line") PORT_DIPLOCATION("SW2:7") + PORT_DIPSETTING(0x2, DEF_STR(Off)) + PORT_DIPSETTING(0x0, DEF_STR(On)) + PORT_DIPNAME(0x4, 0x4, "Automatic LF/CR") PORT_DIPLOCATION("SW2:6") + PORT_DIPSETTING(0x4, "Auto LF") + PORT_DIPSETTING(0x0, "Carriage Return") + PORT_DIPNAME(0x8, 0x8, "Communication Mode") PORT_DIPLOCATION("SW2:5") + PORT_DIPSETTING(0x0, "Half Duplex") + PORT_DIPSETTING(0x8, "Full Duplex") + + PORT_START("INP7") + PORT_DIPNAME(0x1, 0x1, "Font") PORT_DIPLOCATION("SW2:4") + PORT_DIPSETTING(0x1, "Upper/Lower Case") + PORT_DIPSETTING(0x0, "Upper Case Only") + PORT_BIT(0x2, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("All Caps") PORT_CODE(KEYCODE_CAPSLOCK) PORT_TOGGLE + PORT_BIT(0x4, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) + PORT_BIT(0x8, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_LCONTROL) + + PORT_START("UNUSED") + PORT_DIPNAME(0x1, 0x0, DEF_STR(Unused)) PORT_DIPLOCATION("SW1:1") + PORT_DIPSETTING(0x1, DEF_STR(Off)) + PORT_DIPSETTING(0x0, DEF_STR(On)) + PORT_DIPNAME(0x2, 0x0, DEF_STR(Unused)) PORT_DIPLOCATION("SW1:2") + PORT_DIPSETTING(0x2, DEF_STR(Off)) + PORT_DIPSETTING(0x0, DEF_STR(On)) + PORT_DIPNAME(0x4, 0x0, DEF_STR(Unused)) PORT_DIPLOCATION("SW2:3") + PORT_DIPSETTING(0x4, DEF_STR(Off)) + PORT_DIPSETTING(0x0, DEF_STR(On)) + PORT_DIPNAME(0x8, 0x0, DEF_STR(Unused)) PORT_DIPLOCATION("SW2:8") + PORT_DIPSETTING(0x8, DEF_STR(Off)) + PORT_DIPSETTING(0x0, DEF_STR(On)) INPUT_PORTS_END void hazl1420_state::hazl1420(machine_config &config) @@ -135,24 +329,59 @@ void hazl1420_state::hazl1420(machine_config &config) I8049(config, m_maincpu, 11_MHz_XTAL); m_maincpu->set_addrmap(AS_PROGRAM, &hazl1420_state::prog_map); m_maincpu->set_addrmap(AS_IO, &hazl1420_state::io_map); + m_maincpu->p1_out_cb().set(FUNC(hazl1420_state::p1_w)); + m_maincpu->p2_in_cb().set(FUNC(hazl1420_state::p2_r)); m_maincpu->p2_out_cb().set(FUNC(hazl1420_state::p2_w)); + m_maincpu->p2_out_cb().append(m_ioexp[0], FUNC(i8243_device::p2_w)); + m_maincpu->p2_out_cb().append(m_ioexp[1], FUNC(i8243_device::p2_w)); + m_maincpu->prog_out_cb().set(m_ioexp[0], FUNC(i8243_device::prog_w)); + m_maincpu->prog_out_cb().append(m_ioexp[1], FUNC(i8243_device::prog_w)); + m_maincpu->t0_in_cb().set(m_crtc, FUNC(dp8350_device::vblank_r)); + m_maincpu->t1_in_cb().set("ace", FUNC(ins8250_device::intrpt_r)); + + INPUT_MERGER_ANY_HIGH(config, m_mainint); + m_mainint->output_handler().set_inputline(m_maincpu, MCS48_INPUT_IRQ); ADDRESS_MAP_BANK(config, m_bankdev); m_bankdev->set_addrmap(0, &hazl1420_state::bank_map); m_bankdev->set_data_width(8); - m_bankdev->set_addr_width(12); + m_bankdev->set_addr_width(15); m_bankdev->set_stride(0x100); - //I8243(config, m_ioexp[0]); - //I8243(config, m_ioexp[1]); + I8243(config, m_ioexp[0]); + m_ioexp[0]->p4_in_cb().set_ioport("INP4"); + m_ioexp[0]->p5_in_cb().set_ioport("INP5"); + m_ioexp[0]->p6_out_cb().set(FUNC(hazl1420_state::p6_w)); + m_ioexp[0]->p7_out_cb().set(FUNC(hazl1420_state::p7_w)); - INS8250(config, "ace", 2'764'800); + I8243(config, m_ioexp[1]); + m_ioexp[1]->p4_in_cb().set(FUNC(hazl1420_state::key_r)); + m_ioexp[1]->p5_in_cb().set(FUNC(hazl1420_state::key_r)).rshift(4); + m_ioexp[1]->p6_in_cb().set_ioport("INP6"); + m_ioexp[1]->p7_in_cb().set_ioport("INP7"); - //DP8350(config, "crtc", 10.92_MHz_XTAL); + ins8250_device &ace(INS8250(config, "ace", 2'764'800)); + ace.out_int_callback().set(m_mainint, FUNC(input_merger_device::in_w<1>)); + ace.out_tx_callback().set("eia", FUNC(rs232_port_device::write_txd)); + ace.out_rts_callback().set("eia", FUNC(rs232_port_device::write_rts)); + ace.out_dtr_callback().set("eia", FUNC(rs232_port_device::write_dtr)); + //ace.baudout_callback().set("eia", FUNC(rs232_port_device::write_etc)); // 16x rate output (unemulated) + + DP8350(config, m_crtc, 10.92_MHz_XTAL).set_screen("screen"); + m_crtc->lbre_callback().set(FUNC(hazl1420_state::crtc_lbre_w)); + m_crtc->vblank_callback().set(FUNC(hazl1420_state::crtc_vblank_w)); screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_raw(10.92_MHz_XTAL, 700, 0, 560, 260, 0, 240); screen.set_screen_update(FUNC(hazl1420_state::screen_update)); + + SPEAKER(config, "mono").front_center(); + BEEP(config, m_beeper, 1000).add_route(ALL_OUTPUTS, "mono", 1.00); + + rs232_port_device &eia(RS232_PORT(config, "eia", default_rs232_devices, nullptr)); + eia.rxd_handler().set("ace", FUNC(ins8250_device::rx_w)); + eia.cts_handler().set("ace", FUNC(ins8250_device::cts_w)); + eia.dsr_handler().set("ace", FUNC(ins8250_device::dsr_w)); + eia.dcd_handler().set("ace", FUNC(ins8250_device::dcd_w)); } ROM_START(hazl1420) @@ -168,4 +397,4 @@ ROM_START(hazl1420) ROM_LOAD("8316.u23", 0x0000, 0x0800, NO_DUMP) ROM_END -COMP(1979, hazl1420, 0, 0, hazl1420, hazl1420, hazl1420_state, empty_init, "Hazeltine", "1420 Video Display Terminal", MACHINE_IS_SKELETON) +COMP(1979, hazl1420, 0, 0, hazl1420, hazl1420, hazl1420_state, empty_init, "Hazeltine", "1420 Video Display Terminal", MACHINE_NOT_WORKING) diff --git a/src/mame/drivers/hec2hrp.cpp b/src/mame/drivers/hec2hrp.cpp index 76a09123b7a..9b5cd732fea 100644 --- a/src/mame/drivers/hec2hrp.cpp +++ b/src/mame/drivers/hec2hrp.cpp @@ -464,9 +464,9 @@ MACHINE_CONFIG_START(hec2hrp_state::hec2mx40) MCFG_DEVICE_ADD("disc2cpu", Z80, 4_MHz_XTAL) MCFG_DEVICE_PROGRAM_MAP(hecdisc2_mem) MCFG_DEVICE_IO_MAP(hecdisc2_io) - MCFG_UPD765A_ADD(m_upd_fdc, false, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, hec2hrp_state, disc2_fdc_interrupt)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, hec2hrp_state, disc2_fdc_dma_irq)) + UPD765A(config, m_upd_fdc, false, true); + m_upd_fdc->intrq_wr_callback().set(FUNC(hec2hrp_state::disc2_fdc_interrupt)); + m_upd_fdc->drq_wr_callback().set(FUNC(hec2hrp_state::disc2_fdc_dma_irq)); MCFG_FLOPPY_DRIVE_ADD(m_upd_connector[0], hector_floppies, "525hd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(m_upd_connector[1], hector_floppies, "525hd", floppy_image_device::default_floppy_formats) MCFG_MACHINE_RESET_OVERRIDE(hec2hrp_state,hec2hrx) @@ -504,9 +504,9 @@ MACHINE_CONFIG_START(hec2hrp_state::hec2hrx) MCFG_DEVICE_ADD("disc2cpu", Z80, 4_MHz_XTAL) MCFG_DEVICE_PROGRAM_MAP(hecdisc2_mem) MCFG_DEVICE_IO_MAP(hecdisc2_io) - MCFG_UPD765A_ADD(m_upd_fdc, false, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, hec2hrp_state, disc2_fdc_interrupt)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, hec2hrp_state, disc2_fdc_dma_irq)) + UPD765A(config, m_upd_fdc, false, true); + m_upd_fdc->intrq_wr_callback().set(FUNC(hec2hrp_state::disc2_fdc_interrupt)); + m_upd_fdc->drq_wr_callback().set(FUNC(hec2hrp_state::disc2_fdc_dma_irq)); MCFG_FLOPPY_DRIVE_ADD(m_upd_connector[0], hector_floppies, "525hd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(m_upd_connector[1], hector_floppies, "525hd", floppy_image_device::default_floppy_formats) @@ -575,9 +575,9 @@ MACHINE_CONFIG_START(hec2hrp_state::hec2mx80) MCFG_DEVICE_ADD("disc2cpu", Z80, 4_MHz_XTAL) MCFG_DEVICE_PROGRAM_MAP(hecdisc2_mem) MCFG_DEVICE_IO_MAP(hecdisc2_io) - MCFG_UPD765A_ADD(m_upd_fdc, false, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, hec2hrp_state, disc2_fdc_interrupt)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, hec2hrp_state, disc2_fdc_dma_irq)) + UPD765A(config, m_upd_fdc, false, true); + m_upd_fdc->intrq_wr_callback().set(FUNC(hec2hrp_state::disc2_fdc_interrupt)); + m_upd_fdc->drq_wr_callback().set(FUNC(hec2hrp_state::disc2_fdc_dma_irq)); MCFG_FLOPPY_DRIVE_ADD(m_upd_connector[0], hector_floppies, "525hd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(m_upd_connector[1], hector_floppies, "525hd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/holeland.cpp b/src/mame/drivers/holeland.cpp index a627865c8c2..17ad2762bf2 100644 --- a/src/mame/drivers/holeland.cpp +++ b/src/mame/drivers/holeland.cpp @@ -554,9 +554,44 @@ ROM_START( crzrallyg ) ROM_LOAD( "pal16r8a.1d", 0x0600, 0x0104, NO_DUMP ) /* PAL is read protected */ ROM_END +/* Recreativos Franco */ +ROM_START( crzrallyrf ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "crzrallyrf_1.7g", 0x0000, 0x4000, CRC(c49ec48e) SHA1(8ec87ced3c42158be735fa7c81c271e51b114986) ) + ROM_LOAD( "crzrallyrf_2.7f", 0x4000, 0x4000, CRC(8a594a0e) SHA1(8da7099ae7a272dd10bb58b114ca98a58f1df4bb) ) + ROM_LOAD( "crzrallyrf_3.7d", 0x8000, 0x4000, CRC(01ed44dc) SHA1(6078f21f281e3de54f4a2f9869da2728f184bea7) ) + + ROM_REGION( 0x4000, "gfx1", ROMREGION_INVERT ) + ROM_LOAD( "crzrallyrf_4.5h", 0x0000, 0x2000, CRC(68ec2811) SHA1(6a30544d905e373440740877cdbae4a9c4e361cb) ) + ROM_LOAD( "crzrallyrf_5.5g", 0x2000, 0x2000, CRC(81e9b043) SHA1(effc082a025ce36ab6ba8603a82be1469eee6276) ) + + ROM_REGION( 0x8000, "gfx2", 0 ) + ROM_LOAD( "crzrallyrf_6.1n", 0x0000, 0x2000, CRC(985ed5c8) SHA1(ee91a6701a8b8bb24d6fa08596deff95816e759e) ) + ROM_LOAD( "crzrallyrf_7.1l", 0x2000, 0x2000, CRC(c02ddda2) SHA1(262e33cada0e7935d03014583117c2bc6278865b) ) + ROM_LOAD( "crzrallyrf_8.1k", 0x4000, 0x2000, CRC(2a0d5bca) SHA1(8d7aedd63ea374a5809c24f957b0afa3cad437d0) ) + ROM_LOAD( "crzrallyrf_9.1i", 0x6000, 0x2000, CRC(49c0c2b8) SHA1(30c4fe1dc2df499927f8fd4a041a707b81a04e1d) ) + + /* Not dumped on the Refreativos Franco PCB, taken from the parent set */ + ROM_REGION( 0x0300, "proms", 0 ) + ROM_LOAD( "82s129.9n", 0x0000, 0x0100, CRC(98ff725a) SHA1(553f033212a7c4785c0beb8156400cabcd53cf25) ) /* Red component */ + ROM_LOAD( "82s129.9m", 0x0100, 0x0100, CRC(d41f5800) SHA1(446046f5694357da876e1307f49584d79c8d9a1a) ) /* Green component */ + ROM_LOAD( "82s129.9l", 0x0200, 0x0100, CRC(9ed49cb4) SHA1(f54e66e2211d5fb0da9a81e11670367ee4d9b49a) ) /* Blue component */ + + /* Not dumped on the Refreativos Franco PCB, taken from the parent set */ + ROM_REGION( 0x0200, "user1", 0 ) // unknown + ROM_LOAD( "82s147.1f", 0x0000, 0x0200, CRC(5261bc11) SHA1(1cc7a9a7376e65f4587b75ef9382049458656372) ) + + /* Not dumped on the Refreativos Franco PCB, taken from the parent set */ + ROM_REGION( 0x0800, "plds", 0 ) + ROM_LOAD( "pal16r6a.5k", 0x0000, 0x0104, CRC(3d12afba) SHA1(60245089947e4a4f7bfa94a8cc96d4d8eebe4afc) ) + ROM_LOAD( "pal16r4a.5l", 0x0200, 0x0104, NO_DUMP ) /* PAL is read protected */ + ROM_LOAD( "pal16r4a.5m", 0x0400, 0x0104, NO_DUMP ) /* PAL is read protected */ + ROM_LOAD( "pal16r8a.1d", 0x0600, 0x0104, NO_DUMP ) /* PAL is read protected */ +ROM_END -GAME( 1984, holeland, 0, holeland, holeland, holeland_state, empty_init, ROT0, "Tecfri", "Hole Land (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) -GAME( 1984, holeland2, holeland, holeland, holeland2, holeland_state, empty_init, ROT0, "Tecfri", "Hole Land (Spain)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) //attract is different -GAME( 1985, crzrally, 0, crzrally, crzrally, holeland_state, empty_init, ROT270, "Tecfri", "Crazy Rally (set 1)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) -GAME( 1985, crzrallya, crzrally, crzrally, crzrally, holeland_state, empty_init, ROT270, "Tecfri", "Crazy Rally (set 2)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) -GAME( 1985, crzrallyg, crzrally, crzrally, crzrally, holeland_state, empty_init, ROT270, "Tecfri (Gecas license)", "Crazy Rally (Gecas license)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1984, holeland, 0, holeland, holeland, holeland_state, empty_init, ROT0, "Tecfri", "Hole Land (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1984, holeland2, holeland, holeland, holeland2, holeland_state, empty_init, ROT0, "Tecfri", "Hole Land (Spain)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) //attract is different +GAME( 1985, crzrally, 0, crzrally, crzrally, holeland_state, empty_init, ROT270, "Tecfri", "Crazy Rally (set 1)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1985, crzrallya, crzrally, crzrally, crzrally, holeland_state, empty_init, ROT270, "Tecfri", "Crazy Rally (set 2)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1985, crzrallyg, crzrally, crzrally, crzrally, holeland_state, empty_init, ROT270, "Tecfri (Gecas license)", "Crazy Rally (Gecas license)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1985, crzrallyrf, crzrally, crzrally, crzrally, holeland_state, empty_init, ROT270, "Tecfri (Recreativos Franco license)", "Crazy Rally (Recreativos Franco license)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/hp2620.cpp b/src/mame/drivers/hp2620.cpp index 0bf3e11c1c1..3c82cd8a414 100644 --- a/src/mame/drivers/hp2620.cpp +++ b/src/mame/drivers/hp2620.cpp @@ -7,11 +7,16 @@ Skeleton driver for HP-2620 series display terminals. ************************************************************************************************************************************/ #include "emu.h" +#include "bus/rs232/rs232.h" #include "cpu/z80/z80.h" +#include "machine/input_merger.h" #include "machine/mos6551.h" #include "machine/nvram.h" -//#include "video/dp8350.h" +#include "machine/ripple_counter.h" +#include "sound/spkrdev.h" +#include "video/dp8350.h" #include "screen.h" +#include "speaker.h" class hp2620_state : public driver_device { @@ -19,28 +24,50 @@ public: hp2620_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") + , m_nmigate(*this, "nmigate") + , m_crtc(*this, "crtc") + , m_datacomm(*this, "datacomm") + , m_bell(*this, "bell") + , m_bellctr(*this, "bellctr") , m_p_chargen(*this, "chargen") , m_nvram(*this, "nvram") { } void hp2622(machine_config &config); +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + private: - DECLARE_READ8_MEMBER(nvram_r); - DECLARE_WRITE8_MEMBER(nvram_w); - DECLARE_READ8_MEMBER(keystat_r); - DECLARE_WRITE8_MEMBER(keydisp_w); - DECLARE_READ8_MEMBER(sysstat_r); - DECLARE_WRITE8_MEMBER(modem_w); + u8 nvram_r(offs_t offset); + void nvram_w(offs_t offset, u8 data); + u8 keystat_r(); + void keydisp_w(u8 data); + u8 sysstat_r(); + void modem_w(u8 data); + void crtc_w(offs_t offset, u8 data); + void ennmi_w(offs_t offset, u8 data); u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + DECLARE_WRITE_LINE_MEMBER(nlrc_w); + DECLARE_WRITE_LINE_MEMBER(bell_w); + void io_map(address_map &map); void mem_map(address_map &map); required_device<cpu_device> m_maincpu; + required_device<input_merger_device> m_nmigate; + required_device<dp8367_device> m_crtc; + required_device<rs232_port_device> m_datacomm; + required_device<speaker_sound_device> m_bell; + required_device<ripple_counter_device> m_bellctr; required_region_ptr<u8> m_p_chargen; required_shared_ptr<u8> m_nvram; + + u16 m_display_page; + u8 m_key_status; }; @@ -49,37 +76,84 @@ u32 hp2620_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, con return 0; } -READ8_MEMBER(hp2620_state::nvram_r) +u8 hp2620_state::nvram_r(offs_t offset) { + // TODO: wait states return 0xf0 | m_nvram[offset]; } -WRITE8_MEMBER(hp2620_state::nvram_w) +void hp2620_state::nvram_w(offs_t offset, u8 data) { + // TODO: wait states m_nvram[offset] = data & 0x0f; } -READ8_MEMBER(hp2620_state::keystat_r) +u8 hp2620_state::keystat_r() { - return 0xff; + // LS299 at U25 + return m_key_status; } -WRITE8_MEMBER(hp2620_state::keydisp_w) +void hp2620_state::keydisp_w(u8 data) { + // LS374 at U26 + + // TODO: D0-D3 = KEY3-KEY6 + m_bellctr->reset_w(BIT(data, 4)); + // TODO: D6 = BLINK RATE + // TODO: D7 = ENHOFF } -READ8_MEMBER(hp2620_state::sysstat_r) +u8 hp2620_state::sysstat_r() { - return 0xff; + // LS244 at U36 + u8 status = 0xe0; + + status |= m_crtc->vblank_r() << 0; + // TODO: D1 = PINT + status |= m_datacomm->dsr_r() << 2; // DM (J6-12) + status |= m_datacomm->cts_r() << 3; // CS (J6-11) + status |= m_datacomm->ri_r() << 4; // OCR1 (J6-18) + + return status; } -WRITE8_MEMBER(hp2620_state::modem_w) +void hp2620_state::modem_w(u8 data) { + // LS174 at U35 (TODO: D0 = DISPOFF) + m_datacomm->write_spds(BIT(data, 1)); // OCD1 (J6-7) + m_crtc->refresh_control(BIT(data, 5)); +} + +void hp2620_state::crtc_w(offs_t offset, u8 data) +{ + m_crtc->register_load(data & 3, offset & 0xfff); + m_display_page = offset & 0x3000; +} + +void hp2620_state::ennmi_w(offs_t offset, u8 data) +{ + m_nmigate->in_w<0>(BIT(offset, 0)); +} + +WRITE_LINE_MEMBER(hp2620_state::nlrc_w) +{ + // clock input for LS175 at U59 + if (state) + m_nmigate->in_w<1>((m_crtc->lc_r() & 7) == 3); + + // TODO: shift keyboard response into m_key_status +} + +WRITE_LINE_MEMBER(hp2620_state::bell_w) +{ + m_bell->level_w(state); } void hp2620_state::mem_map(address_map &map) { map(0x0000, 0xbfff).rom().region("maincpu", 0); + map(0x8000, 0xbfff).w(FUNC(hp2620_state::crtc_w)); map(0xc000, 0xffff).ram(); } @@ -88,11 +162,26 @@ void hp2620_state::io_map(address_map &map) map.global_mask(0xff); map(0x00, 0x7f).rw(FUNC(hp2620_state::nvram_r), FUNC(hp2620_state::nvram_w)).share("nvram"); map(0x80, 0x80).r(FUNC(hp2620_state::keystat_r)); + map(0x88, 0x89).w(FUNC(hp2620_state::ennmi_w)); map(0x90, 0x90).r(FUNC(hp2620_state::sysstat_r)); map(0xa0, 0xa3).w("acia", FUNC(mos6551_device::write)); map(0xa4, 0xa7).r("acia", FUNC(mos6551_device::read)); map(0xa8, 0xa8).w(FUNC(hp2620_state::modem_w)); map(0xb8, 0xb8).w(FUNC(hp2620_state::keydisp_w)); + map(0xe1, 0xe1).nopw(); // program bug, undocumented expansion or ??? +} + +void hp2620_state::machine_start() +{ + save_item(NAME(m_display_page)); + save_item(NAME(m_key_status)); +} + +void hp2620_state::machine_reset() +{ + m_nmigate->in_w<1>(0); + m_display_page = 0; + m_key_status = 0; } static INPUT_PORTS_START( hp2622 ) @@ -106,15 +195,32 @@ void hp2620_state::hp2622(machine_config &config) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // 5101 (A7 tied to GND) + battery (+ wait states) + INPUT_MERGER_ALL_HIGH(config, m_nmigate).output_handler().set_inputline(m_maincpu, INPUT_LINE_NMI); + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_raw(25.7715_MHz_XTAL, 1035, 0, 720, 415, 0, 390); // 498 total lines in 50 Hz mode screen.set_screen_update(FUNC(hp2620_state::screen_update)); - //DP8367(config, "crtc", 25.7715_MHz_XTAL).set_screen("screen"); + DP8367(config, m_crtc, 25.7715_MHz_XTAL).set_screen("screen"); + m_crtc->set_half_shift(true); + m_crtc->hsync_callback().set(m_bellctr, FUNC(ripple_counter_device::clock_w)).invert(); + m_crtc->lrc_callback().set(FUNC(hp2620_state::nlrc_w)).invert(); mos6551_device &acia(MOS6551(config, "acia", 0)); // SY6551 acia.set_xtal(25.7715_MHz_XTAL / 14); // 1.84 MHz acia.irq_handler().set_inputline("maincpu", INPUT_LINE_IRQ0); + acia.rts_handler().set(m_datacomm, FUNC(rs232_port_device::write_rts)); // RS (J6-22) + acia.dtr_handler().set(m_datacomm, FUNC(rs232_port_device::write_dtr)); // TR (J6-23) + acia.txd_handler().set(m_datacomm, FUNC(rs232_port_device::write_txd)); // SD (J6-21) + + RS232_PORT(config, m_datacomm, default_rs232_devices, nullptr); + m_datacomm->rxd_handler().set("acia", FUNC(mos6551_device::write_rxd)); // RD (J6-9) + + RIPPLE_COUNTER(config, m_bellctr); // LS393 at U114 + m_bellctr->set_stages(8); + m_bellctr->count_out_cb().set(FUNC(hp2620_state::bell_w)).bit(4); + + SPEAKER(config, "mono").front_center(); // on keyboard + SPEAKER_SOUND(config, m_bell).add_route(ALL_OUTPUTS, "mono", 0.50); } /************************************************************************************************************** @@ -130,10 +236,10 @@ ROM_START( hp2622a ) ROM_LOAD( "1818-1685.xu63", 0x0000, 0x2000, CRC(a57ffe5e) SHA1(4d7844320deba916d9ec289927af987fea025b02) ) ROM_LOAD( "1818-1686.xu64", 0x2000, 0x2000, CRC(bee9274c) SHA1(20796c559031a91cb2666776fcf7ffdb52a0a318) ) ROM_LOAD( "1818-1687.xu65", 0x4000, 0x2000, CRC(e9ecd489) SHA1(9b249b8d066d256069ccdb8809bb808c414f106a) ) - // XU66-XU68 are empty + // XU66-XU68 are empty sockets ROM_REGION(0x2000, "chargen", 0) ROM_LOAD( "1818-1489.xu311", 0x0000, 0x2000, CRC(9879b153) SHA1(fc1705d6de38eb6d3a67f1ae439e359e5124d028) ) ROM_END -COMP( 1982, hp2622a, 0, 0, hp2622, hp2622, hp2620_state, empty_init, "HP", "HP-2622A", MACHINE_IS_SKELETON ) +COMP(1982, hp2622a, 0, 0, hp2622, hp2622, hp2620_state, empty_init, "HP", "HP-2622A", MACHINE_NOT_WORKING) diff --git a/src/mame/drivers/hp64k.cpp b/src/mame/drivers/hp64k.cpp index 2034176ae86..23139325f1d 100644 --- a/src/mame/drivers/hp64k.cpp +++ b/src/mame/drivers/hp64k.cpp @@ -1375,11 +1375,12 @@ static void hp64k_floppies(device_slot_interface &device) } MACHINE_CONFIG_START(hp64k_state::hp64k) - MCFG_DEVICE_ADD("cpu" , HP_5061_3011 , 6250000) - MCFG_DEVICE_PROGRAM_MAP(cpu_mem_map) - MCFG_DEVICE_IO_MAP(cpu_io_map) - MCFG_DEVICE_IRQ_ACKNOWLEDGE_DRIVER(hp64k_state , hp64k_irq_callback) - MCFG_QUANTUM_TIME(attotime::from_hz(100)) + HP_5061_3011(config , m_cpu , 6250000); + m_cpu->set_rw_cycles(6 , 6); + m_cpu->set_relative_mode(true); + m_cpu->set_addrmap(AS_PROGRAM , &hp64k_state::cpu_mem_map); + m_cpu->set_addrmap(AS_IO , &hp64k_state::cpu_io_map); + m_cpu->set_irq_acknowledge_callback(FUNC(hp64k_state::hp64k_irq_callback)); // Actual keyboard refresh rate should be between 1 and 2 kHz MCFG_TIMER_DRIVER_ADD_PERIODIC("kb_timer", hp64k_state, hp64k_kb_scan, attotime::from_hz(100)) diff --git a/src/mame/drivers/hp9825.cpp b/src/mame/drivers/hp9825.cpp new file mode 100644 index 00000000000..251b256c9bf --- /dev/null +++ b/src/mame/drivers/hp9825.cpp @@ -0,0 +1,668 @@ +// license:BSD-3-Clause +// copyright-holders:F. Ulivi + +// ************************** +// Driver for HP 9825 systems +// ************************** +// +// **** Temporary header, will hopefully evolve into proper doc **** +// +// What's in: +// - Emulation of 9825B system +// - 12 kw of RAMs +// - 12 kw of system ROM +// - Keyboard (SHIFT LOCK & RESET not implemented) +// - Display & run light +// What's not yet in: +// - Internal & external expansion ROMs +// - Configurable RAM size +// - Printer +// - DC100 tape drive +// - I/O expansion slots: 98034 & 98035 modules from hp9845 emulation can be used here, too +// - Beeper +// +// 9825A & 9825T can also be emulated. At the moment I haven't all the necessary +// ROM dumps, though. + +#include "emu.h" +#include "cpu/hphybrid/hphybrid.h" +#include "machine/timer.h" +#include "hp9825.lh" + +// CPU clock (generated by a trimmered RC oscillator) +constexpr unsigned MAIN_CLOCK = 6000000; + +// KDP chip clock +constexpr unsigned KDP_CLOCK = MAIN_CLOCK / 4; + +// Bit manipulation +namespace { + template<typename T> constexpr T BIT_MASK(unsigned n) + { + return (T)1U << n; + } + + template<typename T> void BIT_CLR(T& w , unsigned n) + { + w &= ~BIT_MASK<T>(n); + } + + template<typename T> void BIT_SET(T& w , unsigned n) + { + w |= BIT_MASK<T>(n); + } +} + +class hp9825_state : public driver_device +{ +public: + hp9825_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_cpu(*this , "cpu") + , m_cursor_timer(*this , "cursor_timer") + , m_io_key(*this , "KEY%u" , 0) + , m_shift_key(*this , "KEY_SHIFT") + , m_display(*this , "char_%u_%u" , 0U , 0U) + , m_run_light(*this , "run_light") + { + } + + void hp9825b(machine_config &config); + +private: + required_device<hp_09825_67907_cpu_device> m_cpu; + required_device<timer_device> m_cursor_timer; + required_ioport_array<4> m_io_key; + required_ioport m_shift_key; + output_finder<32 , 7> m_display; + output_finder<> m_run_light; + + bool m_display_on; + uint8_t m_display_mem[ 32 ]; + uint8_t m_display_idx; + bool m_rpl_cursor; + bool m_cursor_blink; + bool m_any_cursor; + uint8_t m_scancode; + bool m_key_pressed; + bool m_autorepeating; + unsigned m_autorepeat_cnt; + uint8_t m_irl_pending; + uint8_t m_irh_pending; + + virtual void machine_start() override; + virtual void machine_reset() override; + + void cpu_io_map(address_map &map); + void cpu_mem_map(address_map &map); + + DECLARE_READ16_MEMBER(kb_scancode_r); + DECLARE_WRITE16_MEMBER(disp_w); + DECLARE_READ16_MEMBER(kdp_status_r); + DECLARE_WRITE16_MEMBER(kdp_control_w); + + void update_display(); + TIMER_DEVICE_CALLBACK_MEMBER(cursor_blink); + void kb_scan_ioport(ioport_value pressed , ioport_port &port , unsigned idx_base , int& max_seq_len , unsigned& max_seq_idx); + TIMER_DEVICE_CALLBACK_MEMBER(kb_scan); + + IRQ_CALLBACK_MEMBER(irq_callback); + void update_irq(); + void set_irq(uint8_t sc , int state); +}; + +void hp9825_state::machine_start() +{ + m_display.resolve(); + m_run_light.resolve(); + + save_item(NAME(m_display_on)); + save_item(NAME(m_display_mem)); + save_item(NAME(m_display_idx)); + save_item(NAME(m_scancode)); + save_item(NAME(m_irl_pending)); + save_item(NAME(m_irh_pending)); +} + +void hp9825_state::machine_reset() +{ + m_display_on = false; + m_display_idx = 0; + m_rpl_cursor = false; + m_cursor_timer->reset(); + m_cursor_blink = true; + update_display(); + m_scancode = 0; + m_key_pressed = false; + m_autorepeating = false; + m_autorepeat_cnt = 0; + m_irl_pending = 0; + m_irh_pending = 0; + update_irq(); +} + +void hp9825_state::cpu_io_map(address_map &map) +{ + map.unmap_value_low(); + map(HP_MAKE_IOADDR(0 , 0) , HP_MAKE_IOADDR(0 , 0)).rw(FUNC(hp9825_state::kb_scancode_r) , FUNC(hp9825_state::disp_w)); + map(HP_MAKE_IOADDR(0 , 1) , HP_MAKE_IOADDR(0 , 1)).rw(FUNC(hp9825_state::kdp_status_r) , FUNC(hp9825_state::kdp_control_w)); + // TODO: +} + +void hp9825_state::cpu_mem_map(address_map &map) +{ + map.unmap_value_low(); + map(0x0000 , 0x2fff).rom(); + map(0x5000 , 0x7fff).ram(); +} + +READ16_MEMBER(hp9825_state::kb_scancode_r) +{ + // TODO: + uint8_t res = m_scancode; + if (m_shift_key->read()) { + BIT_SET(res , 7); + } + set_irq(0 , false); + return res; +} + +WRITE16_MEMBER(hp9825_state::disp_w) +{ + // TODO: + if (m_display_on) { + m_display_on = false; + m_cursor_timer->reset(); + m_cursor_blink = true; + m_display_idx = 0; + update_display(); + } + m_display_mem[ m_display_idx++ ] = uint8_t(data); +} + +READ16_MEMBER(hp9825_state::kdp_status_r) +{ + // TODO: + return 8; +} + +WRITE16_MEMBER(hp9825_state::kdp_control_w) +{ + // TODO: + bool regen_display = false; + if (BIT(data , 1) && !m_display_on) { + m_display_on = true; + // Cursor should blink at 2^-19 the KDP clock + attotime cursor_half_period{ attotime::from_ticks(262144 , KDP_CLOCK) }; + m_cursor_timer->adjust(cursor_half_period , 0 , cursor_half_period); + regen_display = true; + } + if (BIT(data , 6) && !m_rpl_cursor) { + m_rpl_cursor = true; + regen_display = true; + } + if (BIT(data , 5) && m_rpl_cursor) { + m_rpl_cursor = false; + regen_display = true; + } + if (BIT(data , 4)) { + if (BIT(data , 3)) { + m_run_light = !m_run_light; + } else { + m_run_light = false; + } + } else if (BIT(data , 3)) { + m_run_light = true; + } + if (regen_display) { + update_display(); + } +} + +// The character generator was reverse engineered from images of printer & display test patterns. +// It is not guaranteed to be pixel-accurate though it looks quite close to the original. +static const uint8_t chargen[ 128 ][ 5 ] = { + { 0x08,0x1c,0x3e,0x7f,0x00 }, // 00 + { 0x30,0x48,0x45,0x40,0x30 }, // 01 + { 0x45,0x29,0x11,0x29,0x45 }, // 02 + { 0x7d,0x09,0x11,0x21,0x7d }, // 03 + { 0x38,0x44,0x44,0x38,0x44 }, // 04 + { 0x7c,0x2a,0x4a,0x4a,0x34 }, // 05 + { 0x7f,0x01,0x01,0x01,0x03 }, // 06 + { 0x7d,0x09,0x05,0x05,0x79 }, // 07 + { 0x60,0x58,0x46,0x58,0x60 }, // 08 + { 0x38,0x44,0x44,0x3c,0x04 }, // 09 + { 0x10,0x20,0x7f,0x20,0x10 }, // 0a + { 0x62,0x14,0x08,0x10,0x60 }, // 0b + { 0x40,0x3c,0x20,0x20,0x1c }, // 0c + { 0x08,0x1c,0x2a,0x08,0x08 }, // 0d + { 0x10,0x08,0x78,0x08,0x04 }, // 0e + { 0x08,0x55,0x7f,0x55,0x08 }, // 0f + { 0x3e,0x49,0x49,0x49,0x3e }, // 10 + { 0x5e,0x61,0x01,0x61,0x5e }, // 11 + { 0x30,0x4a,0x4d,0x49,0x30 }, // 12 + { 0x78,0x14,0x15,0x14,0x78 }, // 13 + { 0x38,0x44,0x45,0x3c,0x40 }, // 14 + { 0x78,0x15,0x14,0x15,0x78 }, // 15 + { 0x38,0x45,0x44,0x3d,0x40 }, // 16 + { 0x3c,0x43,0x42,0x43,0x3c }, // 17 + { 0x38,0x45,0x44,0x45,0x38 }, // 18 + { 0x3e,0x41,0x40,0x41,0x3e }, // 19 + { 0x3c,0x41,0x40,0x41,0x3c }, // 1a + { 0x7e,0x09,0x7f,0x49,0x49 }, // 1b + { 0x38,0x44,0x38,0x54,0x58 }, // 1c + { 0x12,0x19,0x15,0x12,0x00 }, // 1d + { 0x48,0x7e,0x49,0x41,0x42 }, // 1e + { 0x55,0x2a,0x55,0x2a,0x55 }, // 1f + { 0x00,0x00,0x00,0x00,0x00 }, // 20 + { 0x00,0x5f,0x00,0x00,0x00 }, // 21 + { 0x00,0x03,0x00,0x03,0x00 }, // 22 + { 0x14,0x7f,0x14,0x7f,0x14 }, // 23 + { 0x24,0x2a,0x7f,0x2a,0x12 }, // 24 + { 0x23,0x13,0x08,0x64,0x62 }, // 25 + { 0x36,0x49,0x56,0x20,0x50 }, // 26 + { 0x00,0x0b,0x07,0x00,0x00 }, // 27 + { 0x00,0x00,0x3e,0x41,0x00 }, // 28 + { 0x00,0x41,0x3e,0x00,0x00 }, // 29 + { 0x08,0x2a,0x1c,0x2a,0x08 }, // 2a + { 0x08,0x08,0x3e,0x08,0x08 }, // 2b + { 0x00,0x58,0x38,0x00,0x00 }, // 2c + { 0x08,0x08,0x08,0x08,0x08 }, // 2d + { 0x00,0x60,0x60,0x00,0x00 }, // 2e + { 0x20,0x10,0x08,0x04,0x02 }, // 2f + { 0x3e,0x51,0x49,0x45,0x3e }, // 30 + { 0x00,0x42,0x7f,0x40,0x00 }, // 31 + { 0x62,0x51,0x49,0x49,0x46 }, // 32 + { 0x22,0x41,0x49,0x49,0x36 }, // 33 + { 0x18,0x14,0x12,0x7f,0x10 }, // 34 + { 0x27,0x45,0x45,0x45,0x39 }, // 35 + { 0x3c,0x4a,0x49,0x49,0x30 }, // 36 + { 0x01,0x71,0x09,0x05,0x03 }, // 37 + { 0x36,0x49,0x49,0x49,0x36 }, // 38 + { 0x06,0x49,0x49,0x29,0x1e }, // 39 + { 0x00,0x36,0x36,0x00,0x00 }, // 3a + { 0x00,0x5b,0x3b,0x00,0x00 }, // 3b + { 0x00,0x08,0x14,0x22,0x41 }, // 3c + { 0x14,0x14,0x14,0x14,0x14 }, // 3d + { 0x41,0x22,0x14,0x08,0x00 }, // 3e + { 0x06,0x01,0x51,0x09,0x06 }, // 3f + { 0x3e,0x41,0x5d,0x55,0x1e }, // 40 + { 0x7e,0x09,0x09,0x09,0x7e }, // 41 + { 0x7f,0x49,0x49,0x49,0x36 }, // 42 + { 0x3e,0x41,0x41,0x41,0x22 }, // 43 + { 0x7f,0x41,0x41,0x41,0x3e }, // 44 + { 0x7f,0x49,0x49,0x49,0x41 }, // 45 + { 0x7f,0x09,0x09,0x09,0x01 }, // 46 + { 0x3e,0x41,0x41,0x51,0x72 }, // 47 + { 0x7f,0x08,0x08,0x08,0x7f }, // 48 + { 0x00,0x41,0x7f,0x41,0x00 }, // 49 + { 0x20,0x40,0x40,0x40,0x3f }, // 4a + { 0x7f,0x08,0x14,0x22,0x41 }, // 4b + { 0x7f,0x40,0x40,0x40,0x40 }, // 4c + { 0x7f,0x02,0x0c,0x02,0x7f }, // 4d + { 0x7f,0x04,0x08,0x10,0x7f }, // 4e + { 0x3e,0x41,0x41,0x41,0x3e }, // 4f + { 0x7f,0x09,0x09,0x09,0x06 }, // 50 + { 0x3e,0x41,0x51,0x21,0x5e }, // 51 + { 0x7f,0x09,0x19,0x29,0x46 }, // 52 + { 0x26,0x49,0x49,0x49,0x32 }, // 53 + { 0x01,0x01,0x7f,0x01,0x01 }, // 54 + { 0x3f,0x40,0x40,0x40,0x3f }, // 55 + { 0x07,0x18,0x60,0x18,0x07 }, // 56 + { 0x7f,0x20,0x10,0x20,0x7f }, // 57 + { 0x63,0x14,0x08,0x14,0x63 }, // 58 + { 0x03,0x04,0x78,0x04,0x03 }, // 59 + { 0x61,0x51,0x49,0x45,0x43 }, // 5a + { 0x00,0x00,0x7f,0x41,0x41 }, // 5b + { 0x20,0x7f,0x01,0x01,0x01 }, // 5c + { 0x41,0x41,0x7f,0x00,0x00 }, // 5d + { 0x04,0x02,0x7f,0x02,0x04 }, // 5e + { 0x40,0x40,0x40,0x40,0x40 }, // 5f + { 0x00,0x07,0x0b,0x00,0x00 }, // 60 + { 0x38,0x44,0x44,0x3c,0x40 }, // 61 + { 0x7f,0x48,0x44,0x44,0x38 }, // 62 + { 0x38,0x44,0x44,0x44,0x20 }, // 63 + { 0x38,0x44,0x44,0x48,0x7f }, // 64 + { 0x38,0x54,0x54,0x54,0x08 }, // 65 + { 0x08,0x7e,0x09,0x02,0x00 }, // 66 + { 0x08,0x14,0x54,0x54,0x3c }, // 67 + { 0x7f,0x08,0x04,0x04,0x78 }, // 68 + { 0x00,0x44,0x7d,0x40,0x00 }, // 69 + { 0x20,0x40,0x44,0x3d,0x00 }, // 6a + { 0x7f,0x10,0x28,0x44,0x00 }, // 6b + { 0x00,0x41,0x7f,0x40,0x00 }, // 6c + { 0x78,0x04,0x18,0x04,0x78 }, // 6d + { 0x7c,0x08,0x04,0x04,0x78 }, // 6e + { 0x38,0x44,0x44,0x44,0x38 }, // 6f + { 0x7c,0x14,0x24,0x24,0x18 }, // 70 + { 0x18,0x24,0x14,0x7c,0x40 }, // 71 + { 0x7c,0x08,0x04,0x04,0x00 }, // 72 + { 0x48,0x54,0x54,0x54,0x20 }, // 73 + { 0x04,0x3e,0x44,0x20,0x00 }, // 74 + { 0x3c,0x40,0x40,0x20,0x7c }, // 75 + { 0x1c,0x20,0x40,0x20,0x1c }, // 76 + { 0x3c,0x40,0x30,0x40,0x3c }, // 77 + { 0x44,0x28,0x10,0x28,0x44 }, // 78 + { 0x04,0x48,0x30,0x08,0x04 }, // 79 + { 0x44,0x64,0x54,0x4c,0x44 }, // 7a + { 0x08,0x7c,0x04,0x7c,0x02 }, // 7b + { 0x00,0x00,0x7f,0x00,0x00 }, // 7c + { 0x08,0x08,0x2a,0x1c,0x08 }, // 7d + { 0x41,0x63,0x55,0x49,0x63 }, // 7e + { 0x7f,0x08,0x08,0x08,0x08 } // 7f +}; + +void hp9825_state::update_display() +{ + m_any_cursor = false; + for (unsigned i = 0; i < 32; ++i) { + bool cursor_here = BIT(m_display_mem[ i ] , 7); + if (cursor_here) { + m_any_cursor = true; + } + bool show_cursor = m_cursor_blink && cursor_here; + uint8_t char_code = m_display_mem[ i ] & 0x7f; + for (unsigned j = 0; j < 7; ++j) { + uint8_t five_dots = 0; + if (m_display_on) { + for (unsigned col = 0; col < 5; col++) { + uint8_t char_col; + if (show_cursor) { + if (m_rpl_cursor) { + // Replace cursor: all pixels lit + char_col = ~0; + } else { + // Insert cursor: character code 0 + char_col = chargen[ 0 ][ col ]; + } + } else { + char_col = chargen[ char_code ][ col ]; + } + if (BIT(char_col , j)) { + BIT_SET(five_dots , col); + } + } + } + m_display[ i ][ j ] = five_dots; + } + } +} + +TIMER_DEVICE_CALLBACK_MEMBER(hp9825_state::cursor_blink) +{ + m_cursor_blink = !m_cursor_blink; + if (m_any_cursor) { + update_display(); + } +} + +TIMER_DEVICE_CALLBACK_MEMBER(hp9825_state::kb_scan) +{ + ioport_value input[ 4 ] + { m_io_key[ 0 ]->read(), + m_io_key[ 1 ]->read(), + m_io_key[ 2 ]->read(), + m_io_key[ 3 ]->read() + }; + + if (m_key_pressed) { + // Still pressed ? + m_key_pressed = BIT(input[ m_scancode / 32 ] , m_scancode % 32); + } else { + int max_seq_len = 0; + unsigned max_seq_idx = 0; + for (unsigned i = 0; i < 4; i++) { + kb_scan_ioport(input[ i ] , *m_io_key[ i ] , i << 5 , max_seq_len , max_seq_idx); + } + if (max_seq_len) { + m_scancode = max_seq_idx; + m_key_pressed = true; + set_irq(0 , true); + } + } + + if (m_key_pressed) { + auto prev_cnt = m_autorepeat_cnt; + m_autorepeat_cnt++; + // Auto-repeat initial delay & frequency are entirely guessed.. + if (BIT(m_autorepeat_cnt , 5)) { + // Initial delay passed + m_autorepeating = true; + } + if (m_autorepeating && BIT(~prev_cnt & m_autorepeat_cnt , 3)) { + // Repeat key every time bit 3 of autorepeat counter goes 0->1 + set_irq(0 , true); + } + } else { + m_autorepeating = false; + m_autorepeat_cnt = 0; + } +} + +void hp9825_state::kb_scan_ioport(ioport_value pressed , ioport_port &port , unsigned idx_base , int& max_seq_len , unsigned& max_seq_idx) +{ + while (pressed) { + unsigned bit_no = 31 - count_leading_zeros(pressed); + ioport_value mask = BIT_MASK<ioport_value>(bit_no); + int seq_len = port.field(mask)->seq().length(); + if (seq_len > max_seq_len) { + max_seq_len = seq_len; + max_seq_idx = bit_no + idx_base; + } + pressed &= ~mask; + } +} + +IRQ_CALLBACK_MEMBER(hp9825_state::irq_callback) +{ + if (irqline == HPHYBRID_IRL) { + return m_irl_pending; + } else { + return m_irh_pending; + } +} + +void hp9825_state::update_irq() +{ + m_cpu->set_input_line(HPHYBRID_IRL , m_irl_pending != 0); + m_cpu->set_input_line(HPHYBRID_IRH , m_irh_pending != 0); +} + +void hp9825_state::set_irq(uint8_t sc , int state) +{ + unsigned bit_n = sc % 8; + + if (sc < 8) { + if (state) { + BIT_SET(m_irl_pending, bit_n); + } else { + BIT_CLR(m_irl_pending, bit_n); + } + } else { + if (state) { + BIT_SET(m_irh_pending, bit_n); + } else { + BIT_CLR(m_irh_pending, bit_n); + } + } + update_irq(); +} + +MACHINE_CONFIG_START(hp9825_state::hp9825b) + HP_09825_67907(config , m_cpu , MAIN_CLOCK); + // Just guessing... settings borrowed from hp9845 + m_cpu->set_rw_cycles(6 , 6); + m_cpu->set_relative_mode(false); + m_cpu->set_addrmap(AS_PROGRAM , &hp9825_state::cpu_mem_map); + m_cpu->set_addrmap(AS_IO , &hp9825_state::cpu_io_map); + m_cpu->set_irq_acknowledge_callback(FUNC(hp9825_state::irq_callback)); + + TIMER(config , m_cursor_timer , 0).configure_generic(timer_device::expired_delegate(FUNC(hp9825_state::cursor_blink) , this)); + + // Keyboard scan timer. A scan of the whole keyboard should take 2^14 KDP clocks. + TIMER(config , "kb_timer" , 0).configure_periodic(timer_device::expired_delegate(FUNC(hp9825_state::kb_scan) , this) , attotime::from_ticks(16384 , KDP_CLOCK)); + + config.set_default_layout(layout_hp9825); +MACHINE_CONFIG_END + +#define IOP_MASK(x) BIT_MASK<ioport_value>((x)) + +static INPUT_PORTS_START(hp9825) + // Keyboard is arranged in a 8 x 16 matrix. Of the 128 possible positions, 102 are used. + // Keys are mapped on bit b of KEYn + // where b = (row & 1) << 4 + column, n = row >> 1 + // column = [0..15] + // row = [0..7] + // 4 more keys are not in the matrix: 2 SHIFTs, 1 SHIFT LOCK and RESET key. + // Fun fact: alphanumeric keys are arranged in the matrix so that their scancode (row/column number) + // equals the lower case ASCII code. The person in charge of routing the keyboard PCB + // must have loved this arrangement... + PORT_START("KEY0") + PORT_BIT(IOP_MASK(0) , IP_ACTIVE_HIGH , IPT_UNUSED) // 0,0: N/U + PORT_BIT(IOP_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC)) PORT_NAME("Stop") // 0,1: Stop + PORT_BIT(IOP_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Rewind") // 0,2: Rewind + PORT_BIT(IOP_MASK(3) , IP_ACTIVE_HIGH , IPT_UNUSED) // 0,3: N/U + PORT_BIT(IOP_MASK(4) , IP_ACTIVE_HIGH , IPT_UNUSED) // 0,4: N/U + PORT_BIT(IOP_MASK(5) , IP_ACTIVE_HIGH , IPT_UNUSED) // 0,5: N/U + PORT_BIT(IOP_MASK(6) , IP_ACTIVE_HIGH , IPT_UNUSED) // 0,6: N/U + PORT_BIT(IOP_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Result") // 0,7: Result + PORT_BIT(IOP_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Line insert") // 0,8: Line insert + PORT_BIT(IOP_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Line delete") // 0,9: Line delete + PORT_BIT(IOP_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER_PAD) PORT_CHAR(UCHAR_MAMEKEY(ENTER_PAD)) PORT_NAME("Execute") // 0,10: Execute + PORT_BIT(IOP_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Line recall") // 0,11: Line recall + PORT_BIT(IOP_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Run") // 0,12: Run + PORT_BIT(IOP_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Store") // 0,13: Store + PORT_BIT(IOP_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Display left") // 0,14: Display left + PORT_BIT(IOP_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Display right") // 0,15: Display right + PORT_BIT(IOP_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) PORT_NAME("Display down") // 1,0: Display down + PORT_BIT(IOP_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) PORT_NAME("Display up") // 1,1: Display up + PORT_BIT(IOP_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_HOME) PORT_NAME("Clear") // 1,2: Clear + PORT_BIT(IOP_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Print all") // 1,3: Print all + PORT_BIT(IOP_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LEFT) PORT_NAME("Char back") // 1,4: Char back + PORT_BIT(IOP_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_NAME("Char forward") // 1,5: Char forward + PORT_BIT(IOP_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_INSERT) PORT_NAME("Char ins/rpl") // 1,6: Char ins/rpl + PORT_BIT(IOP_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL) PORT_NAME("Char delete") // 1,7: Char delete + PORT_BIT(IOP_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Step") // 1,8: Step + PORT_BIT(IOP_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_NAME("Continue") PORT_CHAR(13) // 1,9: Continue + PORT_BIT(IOP_MASK(26) , IP_ACTIVE_HIGH , IPT_UNUSED) // 1,10: N/U + PORT_BIT(IOP_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("List") // 1,11: List + PORT_BIT(IOP_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Line fetch") // 1,12: Line fetch + PORT_BIT(IOP_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Erase") // 1,13: Erase + PORT_BIT(IOP_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Record") // 1,14: Record + PORT_BIT(IOP_MASK(31) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Load") // 1,15: Load + + PORT_START("KEY1") + PORT_BIT(IOP_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') // 2,0: Space + PORT_BIT(IOP_MASK(1) , IP_ACTIVE_HIGH , IPT_UNUSED) // 2,1: N/U + PORT_BIT(IOP_MASK(2) , IP_ACTIVE_HIGH , IPT_UNUSED) // 2,2: N/U + PORT_BIT(IOP_MASK(3) , IP_ACTIVE_HIGH , IPT_UNUSED) // 2,3: N/U + PORT_BIT(IOP_MASK(4) , IP_ACTIVE_HIGH , IPT_UNUSED) // 2,4: N/U + PORT_BIT(IOP_MASK(5) , IP_ACTIVE_HIGH , IPT_UNUSED) // 2,5: N/U + PORT_BIT(IOP_MASK(6) , IP_ACTIVE_HIGH , IPT_UNUSED) // 2,6: N/U + PORT_BIT(IOP_MASK(7) , IP_ACTIVE_HIGH , IPT_UNUSED) // 2,7: N/U + PORT_BIT(IOP_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('(') PORT_NAME("Keypad (") // 2,8: KP ( + PORT_BIT(IOP_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(')') PORT_NAME("Keypad )") // 2,9: KP ) + PORT_BIT(IOP_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR(UCHAR_MAMEKEY(ASTERISK)) // 2,10: KP * + PORT_BIT(IOP_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_PLUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(PLUS_PAD)) // 2,11: KP + + PORT_BIT(IOP_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') // 2,12: , + PORT_BIT(IOP_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD)) // 2,13: KP - + PORT_BIT(IOP_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') // 2,14: . + PORT_BIT(IOP_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH_PAD) PORT_CHAR(UCHAR_MAMEKEY(SLASH_PAD)) // 2,15: KP / + PORT_BIT(IOP_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR('\'') // 3,0: 0 + PORT_BIT(IOP_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') // 3,1: 1 + PORT_BIT(IOP_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') // 3,2: 2 + PORT_BIT(IOP_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') // 3,3: 3 + PORT_BIT(IOP_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') // 3,4: 4 + PORT_BIT(IOP_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') // 3,5: 5 + PORT_BIT(IOP_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') // 3,6: 6 + PORT_BIT(IOP_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('@') // 3,7: 7 + PORT_BIT(IOP_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('[') // 3,8: 8 + PORT_BIT(IOP_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(']') // 3,9: 9 + PORT_BIT(IOP_MASK(26) , IP_ACTIVE_HIGH , IPT_UNUSED) // 3,10: N/U + PORT_BIT(IOP_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') // 3,11: ; + PORT_BIT(IOP_MASK(28) , IP_ACTIVE_HIGH , IPT_UNUSED) // 3,12: N/U + PORT_BIT(IOP_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS_PAD) PORT_CHAR(UCHAR_MAMEKEY(EQUALS_PAD)) // 3,13: = + PORT_BIT(IOP_MASK(30) , IP_ACTIVE_HIGH , IPT_UNUSED) // 3,14: N/U + PORT_BIT(IOP_MASK(31) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('?') PORT_CHAR(':') // 3,15: ? + + PORT_START("KEY2") + PORT_BIT(IOP_MASK(0) , IP_ACTIVE_HIGH , IPT_UNUSED) // 4,0: N/U + PORT_BIT(IOP_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("f0") // 4,1: f0 + PORT_BIT(IOP_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1)) PORT_NAME("f1") // 4,2: f1 + PORT_BIT(IOP_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2)) PORT_NAME("f2") // 4,3: f2 + PORT_BIT(IOP_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3)) PORT_NAME("f3") // 4,4: f3 + PORT_BIT(IOP_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4)) PORT_NAME("f4") // 4,5: f4 + PORT_BIT(IOP_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5)) PORT_NAME("f5") // 4,6: f5 + PORT_BIT(IOP_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6)) PORT_NAME("f6") // 4,7: f6 + PORT_BIT(IOP_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7)) PORT_NAME("f7") // 4,8: f7 + PORT_BIT(IOP_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8)) PORT_NAME("f8") // 4,9: f8 + PORT_BIT(IOP_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F9) PORT_CHAR(UCHAR_MAMEKEY(F9)) PORT_NAME("f9") // 4,10: f9 + PORT_BIT(IOP_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F10) PORT_CHAR(UCHAR_MAMEKEY(F10)) PORT_NAME("f10") // 4,11: f10 + PORT_BIT(IOP_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F11) PORT_CHAR(UCHAR_MAMEKEY(F11)) PORT_NAME("f11") // 4,12: f11 + PORT_BIT(IOP_MASK(13) , IP_ACTIVE_HIGH , IPT_UNUSED) // 4,13: N/U + PORT_BIT(IOP_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_0_PAD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD)) // 4,14: KP 0 + PORT_BIT(IOP_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_1_PAD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD)) // 4,15: KP 1 + PORT_BIT(IOP_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_2_PAD) PORT_CHAR(UCHAR_MAMEKEY(2_PAD)) // 5,0: KP 2 + PORT_BIT(IOP_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_3_PAD) PORT_CHAR(UCHAR_MAMEKEY(3_PAD)) // 5,1: KP 3 + PORT_BIT(IOP_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_4_PAD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD)) // 5,2: KP 4 + PORT_BIT(IOP_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_5_PAD) PORT_CHAR(UCHAR_MAMEKEY(5_PAD)) // 5,3: KP 5 + PORT_BIT(IOP_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) // 5,4: KP 6 + PORT_BIT(IOP_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) // 5,5: KP 7 + PORT_BIT(IOP_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_8_PAD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD)) // 5,6: KP 8 + PORT_BIT(IOP_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_9_PAD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD)) // 5,7: KP 9 + PORT_BIT(IOP_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD)) // 5,8: KP . + PORT_BIT(IOP_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA_PAD) PORT_CHAR(UCHAR_MAMEKEY(COMMA_PAD)) // 5,9: KP , + PORT_BIT(IOP_MASK(26) , IP_ACTIVE_HIGH , IPT_UNUSED) // 5,10: N/U + PORT_BIT(IOP_MASK(27) , IP_ACTIVE_HIGH , IPT_UNUSED) // 5,11: N/U + PORT_BIT(IOP_MASK(28) , IP_ACTIVE_HIGH , IPT_UNUSED) // 5,12: N/U + PORT_BIT(IOP_MASK(29) , IP_ACTIVE_HIGH , IPT_UNUSED) // 5,13: N/U + PORT_BIT(IOP_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_NAME("↑ √") // 5,14: ^ + PORT_BIT(IOP_MASK(31) , IP_ACTIVE_HIGH , IPT_UNUSED) // 5,15: N/U + + PORT_START("KEY3") + PORT_BIT(IOP_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Enter exp _") // 6,0: Enter exp + PORT_BIT(IOP_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') // 6,1: A + PORT_BIT(IOP_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') // 6,2: B + PORT_BIT(IOP_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') // 6,3: C + PORT_BIT(IOP_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') // 6,4: D + PORT_BIT(IOP_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') // 6,5: E + PORT_BIT(IOP_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') // 6,6: F + PORT_BIT(IOP_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') // 6,7: G + PORT_BIT(IOP_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') // 6,8: H + PORT_BIT(IOP_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') // 6,9: I + PORT_BIT(IOP_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') // 6,10: J + PORT_BIT(IOP_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') // 6,11: K + PORT_BIT(IOP_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') // 6,12: L + PORT_BIT(IOP_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') // 6,13: M + PORT_BIT(IOP_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') // 6,14: N + PORT_BIT(IOP_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') // 6,15: O + PORT_BIT(IOP_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') // 7,0: P + PORT_BIT(IOP_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') // 7,1: Q + PORT_BIT(IOP_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') // 7,2: R + PORT_BIT(IOP_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') // 7,3: S + PORT_BIT(IOP_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') // 7,4: T + PORT_BIT(IOP_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') // 7,5: U + PORT_BIT(IOP_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') // 7,6: V + PORT_BIT(IOP_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') // 7,7: W + PORT_BIT(IOP_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') // 7,8: X + PORT_BIT(IOP_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') // 7,9: Y + PORT_BIT(IOP_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') // 7,10: Z + PORT_BIT(IOP_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("π |") // 7,11: Pi + PORT_BIT(IOP_MASK(28) , IP_ACTIVE_HIGH , IPT_UNUSED) // 7,12: N/U + PORT_BIT(IOP_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_END) PORT_NAME("→") // 7,13: Gazinta + PORT_BIT(IOP_MASK(30) , IP_ACTIVE_HIGH , IPT_UNUSED) // 7,14: N/U + PORT_BIT(IOP_MASK(31) , IP_ACTIVE_HIGH , IPT_UNUSED) // 7,15: N/U + + PORT_START("KEY_SHIFT") + PORT_BIT(IOP_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) // Shift +INPUT_PORTS_END + +ROM_START(hp9825b) + ROM_REGION(0x6000 , "cpu" , ROMREGION_16BIT | ROMREGION_BE) + ROM_LOAD("sysrom1.bin" , 0x0000 , 0x2000 , CRC(fe429268) SHA1(f2fe7c5abca92bd13f81b4385fc4fce0cafb0da0)) + ROM_LOAD("sysrom2.bin" , 0x2000 , 0x2000 , CRC(96093b5d) SHA1(c6ec4cafd019887df0fa849b3c7070bb74faee54)) + ROM_LOAD("sysrom3.bin" , 0x4000 , 0x2000 , CRC(f9470f67) SHA1(b80cb4a366d93bd7acc3508ce987bb11c5986b2a)) +ROM_END + +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS +COMP(1980, hp9825b, 0, 0, hp9825b, hp9825, hp9825_state, empty_init, "Hewlett-Packard", "HP 9825B", MACHINE_NO_SOUND) diff --git a/src/mame/drivers/hp9845.cpp b/src/mame/drivers/hp9845.cpp index f6e2e3fbf68..01c2caf375e 100644 --- a/src/mame/drivers/hp9845.cpp +++ b/src/mame/drivers/hp9845.cpp @@ -3737,15 +3737,19 @@ void hp9845_base_state::ppu_io_map(address_map &map) } MACHINE_CONFIG_START(hp9845_base_state::hp9845_base) - MCFG_DEVICE_ADD("lpu", HP_5061_3001, 5700000) - MCFG_DEVICE_PROGRAM_MAP(global_mem_map) - MCFG_HPHYBRID_SET_9845_BOOT(true) - MCFG_DEVICE_ADD("ppu", HP_5061_3001, 5700000) - MCFG_DEVICE_PROGRAM_MAP(global_mem_map) - MCFG_DEVICE_IO_MAP(ppu_io_map) - MCFG_HPHYBRID_SET_9845_BOOT(true) - MCFG_DEVICE_IRQ_ACKNOWLEDGE_DRIVER(hp9845_base_state , irq_callback) - MCFG_HPHYBRID_PA_CHANGED(WRITE8(*this, hp9845_base_state , pa_w)) + HP_5061_3001(config , m_lpu , 5700000); + m_lpu->set_addrmap(AS_PROGRAM , &hp9845_base_state::global_mem_map); + m_lpu->set_9845_boot_mode(true); + m_lpu->set_rw_cycles(6 , 6); + m_lpu->set_relative_mode(true); + HP_5061_3001(config , m_ppu , 5700000); + m_ppu->set_addrmap(AS_PROGRAM , &hp9845_base_state::global_mem_map); + m_ppu->set_addrmap(AS_IO , &hp9845_base_state::ppu_io_map); + m_ppu->set_9845_boot_mode(true); + m_ppu->set_rw_cycles(6 , 6); + m_ppu->set_relative_mode(true); + m_ppu->set_irq_acknowledge_callback(FUNC(hp9845_base_state::irq_callback)); + m_ppu->pa_changed_cb().set(FUNC(hp9845_base_state::pa_w)); // video hardware MCFG_SCREEN_ADD("screen", RASTER) diff --git a/src/mame/drivers/ibm6580.cpp b/src/mame/drivers/ibm6580.cpp index 9512ff266da..092c062daca 100644 --- a/src/mame/drivers/ibm6580.cpp +++ b/src/mame/drivers/ibm6580.cpp @@ -918,16 +918,16 @@ MACHINE_CONFIG_START(ibm6580_state::ibm6580) I8257(config, m_dma8257, XTAL(14'745'600)/3); m_dma8257->out_hrq_cb().set(FUNC(ibm6580_state::hrq_w)); - m_dma8257->out_tc_cb().set(UPD765_TAG, FUNC(upd765a_device::tc_line_w)); + m_dma8257->out_tc_cb().set(m_fdc, FUNC(upd765a_device::tc_line_w)); m_dma8257->in_memr_cb().set(FUNC(ibm6580_state::memory_read_byte)); m_dma8257->out_memw_cb().set(FUNC(ibm6580_state::memory_write_byte)); - m_dma8257->in_ior_cb<0>().set(UPD765_TAG, FUNC(upd765a_device::mdma_r)); - m_dma8257->out_iow_cb<0>().set(UPD765_TAG, FUNC(upd765a_device::mdma_w)); + m_dma8257->in_ior_cb<0>().set(m_fdc, FUNC(upd765a_device::mdma_r)); + m_dma8257->out_iow_cb<0>().set(m_fdc, FUNC(upd765a_device::mdma_w)); - MCFG_UPD765A_ADD(UPD765_TAG, false, false) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, ibm6580_state, floppy_intrq)) -// MCFG_DEVCB_CHAIN_OUTPUT(WRITELINE("pic8259", pic8259_device, ir4_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE("dma8257", i8257_device, dreq0_w)) + UPD765A(config, m_fdc, false, false); + m_fdc->intrq_wr_callback().set(FUNC(ibm6580_state::floppy_intrq)); +// m_fdc->intrq_wr_callback().append("pic8259", FUNC(pic8259_device::ir4_w)); + m_fdc->drq_wr_callback().set(m_dma8257, FUNC(i8257_device::dreq0_w)); MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", dw_floppies, "8sssd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", dw_floppies, "8sssd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/ibmpcjr.cpp b/src/mame/drivers/ibmpcjr.cpp index 1e6ef97f708..eb24d034596 100644 --- a/src/mame/drivers/ibmpcjr.cpp +++ b/src/mame/drivers/ibmpcjr.cpp @@ -22,6 +22,8 @@ #include "bus/pc_joy/pc_joy.h" #include "bus/rs232/hlemouse.h" #include "bus/rs232/rs232.h" +#include "bus/rs232/null_modem.h" +#include "bus/rs232/terminal.h" #include "screen.h" #include "softlist.h" @@ -517,6 +519,8 @@ static void pcjr_com(device_slot_interface &device) device.option_add("wheel_mouse", WHEEL_HLE_SERIAL_MOUSE); device.option_add("msystems_mouse", MSYSTEMS_HLE_SERIAL_MOUSE); device.option_add("rotatable_mouse", ROTATABLE_HLE_SERIAL_MOUSE); + device.option_add("terminal",SERIAL_TERMINAL); + device.option_add("null_modem",NULL_MODEM); } static const gfx_layout pc_8_charlayout = @@ -607,12 +611,12 @@ MACHINE_CONFIG_START(pcjr_state::ibmpcjr) */ MCFG_DEVICE_ADD("pit8253", PIT8253, 0) MCFG_PIT8253_CLK0(XTAL(14'318'181)/12) - MCFG_PIT8253_OUT0_HANDLER(WRITELINE("pic8259", pic8259_device, ir0_w)) + MCFG_PIT8253_OUT0_HANDLER(WRITELINE(m_pic8259, pic8259_device, ir0_w)) MCFG_PIT8253_CLK1(XTAL(14'318'181)/12) MCFG_PIT8253_CLK2(XTAL(14'318'181)/12) MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, pcjr_state, out2_changed)) - MCFG_DEVICE_ADD("pic8259", PIC8259, 0) + MCFG_DEVICE_ADD(m_pic8259, PIC8259, 0) MCFG_PIC8259_OUT_INT_CB(WRITELINE(*this, pcjr_state, pic8259_set_int_line)) i8255_device &ppi(I8255(config, "ppi8255")); @@ -624,7 +628,7 @@ MACHINE_CONFIG_START(pcjr_state::ibmpcjr) uart.out_tx_callback().set("serport", FUNC(rs232_port_device::write_txd)); uart.out_dtr_callback().set("serport", FUNC(rs232_port_device::write_dtr)); uart.out_rts_callback().set("serport", FUNC(rs232_port_device::write_rts)); - uart.out_int_callback().set("pic8259", FUNC(pic8259_device::ir3_w)); + uart.out_int_callback().set(m_pic8259, FUNC(pic8259_device::ir3_w)); MCFG_DEVICE_ADD( "serport", RS232_PORT, pcjr_com, nullptr ) MCFG_RS232_RXD_HANDLER(WRITELINE("ins8250", ins8250_uart_device, rx_w)) @@ -647,8 +651,8 @@ MACHINE_CONFIG_START(pcjr_state::ibmpcjr) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80) /* printer */ - MCFG_DEVICE_ADD("lpt_0", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE("pic8259", pic8259_device, ir7_w)) + pc_lpt_device &lpt0(PC_LPT(config, "lpt_0")); + lpt0.irq_handler().set(m_pic8259, FUNC(pic8259_device::ir7_w)); MCFG_PC_JOY_ADD("pc_joy") @@ -656,7 +660,7 @@ MACHINE_CONFIG_START(pcjr_state::ibmpcjr) MCFG_CASSETTE_ADD( "cassette") MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED | CASSETTE_SPEAKER_ENABLED) - MCFG_UPD765A_ADD("fdc", false, false) + UPD765A(config, m_fdc, false, false); MCFG_FLOPPY_DRIVE_ADD("fdc:0", pcjr_floppies, "525dd", isa8_fdc_device::floppy_formats) MCFG_SLOT_FIXED(true) diff --git a/src/mame/drivers/itech8.cpp b/src/mame/drivers/itech8.cpp index b36a38432ef..88d4fb7ba71 100644 --- a/src/mame/drivers/itech8.cpp +++ b/src/mame/drivers/itech8.cpp @@ -614,18 +614,33 @@ MACHINE_START_MEMBER(itech8_state,sstrike) void itech8_state::machine_start() { - if (membank("bank1")) - membank("bank1")->configure_entries(0, 2, memregion("maincpu")->base() + 0x4000, 0xc000); + if (m_mainbank) + { + if (memregion("maincpu")->bytes() > 0x10000) + { + // rimrockn uses different banking address and more banks + m_mainbank->configure_entries(0, 4, memregion("maincpu")->base() + 0x0000, 0x4000); + } + else + { + m_mainbank->configure_entries(0, 2, memregion("maincpu")->base() + 0x0000, 0x4000); + } + } + + if (m_fixed) + { + uint8_t* fixedstart = memregion("maincpu")->base() + memregion("maincpu")->bytes() - 0x8000; // last 0x8000 bytes of the ROM + m_fixed->configure_entry(0, fixedstart); + m_fixed->set_entry(0); + } m_irq_off_timer = timer_alloc(TIMER_IRQ_OFF); - m_delayed_sound_data_timer = timer_alloc(TIMER_DELAYED_SOUND_DATA); m_blitter_done_timer = timer_alloc(TIMER_BLITTER_DONE); save_item(NAME(m_grom_bank)); save_item(NAME(m_blitter_int)); save_item(NAME(m_tms34061_int)); save_item(NAME(m_periodic_int)); - save_item(NAME(m_sound_data)); save_item(NAME(m_pia_porta_data)); save_item(NAME(m_pia_portb_data)); } @@ -639,12 +654,10 @@ void grmatch_state::machine_start() void itech8_state::machine_reset() { - device_type main_cpu_type = m_maincpu->type(); - /* make sure bank 0 is selected */ - if (main_cpu_type == MC6809 || main_cpu_type == HD6309) + if (m_mainbank) { - membank("bank1")->set_entry(0); + m_mainbank->set_entry(0 ^ m_bankxor); m_maincpu->reset(); } @@ -672,9 +685,6 @@ void itech8_state::device_timer(emu_timer &timer, device_timer_id id, int param, case TIMER_BEHIND_BEAM_UPDATE: behind_the_beam_update(ptr, param); break; - case TIMER_DELAYED_SOUND_DATA: - delayed_sound_data_w(ptr, param); - break; case TIMER_BLITTER_DONE: blitter_done(ptr, param); break; @@ -721,7 +731,7 @@ WRITE8_MEMBER(itech8_state::blitter_bank_w) { /* bit 0x20 on address 7 controls CPU banking */ if (offset / 2 == 7) - membank("bank1")->set_entry((data >> 5) & 1); + m_mainbank->set_entry(((data >> 5) & 1) ^ m_bankxor); /* the rest is handled by the video hardware */ blitter_w(space, offset, data); @@ -731,7 +741,7 @@ WRITE8_MEMBER(itech8_state::blitter_bank_w) WRITE8_MEMBER(itech8_state::rimrockn_bank_w) { /* banking is controlled here instead of by the blitter output */ - membank("bank1")->set_entry(data & 3); + m_mainbank->set_entry(data & 3); } @@ -796,18 +806,6 @@ WRITE8_MEMBER(itech8_state::ym2203_portb_out) * *************************************/ -TIMER_CALLBACK_MEMBER(itech8_state::delayed_sound_data_w) -{ - m_sound_data = param; - m_soundcpu->set_input_line(M6809_IRQ_LINE, ASSERT_LINE); -} - - -WRITE8_MEMBER(itech8_state::sound_data_w) -{ - synchronize(TIMER_DELAYED_SOUND_DATA, data); -} - WRITE8_MEMBER(itech8_state::gtg2_sound_data_w) { @@ -816,14 +814,7 @@ WRITE8_MEMBER(itech8_state::gtg2_sound_data_w) ((data & 0x5d) << 1) | ((data & 0x20) >> 3) | ((data & 0x02) << 5); - synchronize(TIMER_DELAYED_SOUND_DATA, data); -} - - -READ8_MEMBER(itech8_state::sound_data_r) -{ - m_soundcpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE); - return m_sound_data; + m_soundlatch->write(space, offset, data); } @@ -840,19 +831,6 @@ WRITE8_MEMBER(itech8_state::grom_bank_w) * *************************************/ -WRITE16_MEMBER(itech8_state::grom_bank16_w) -{ - if (ACCESSING_BITS_8_15) - m_grom_bank = data >> 8; -} - - -WRITE16_MEMBER(itech8_state::display_page16_w) -{ - if (ACCESSING_BITS_8_15) - page_w(space, 0, ~data >> 8); -} - READ16_MEMBER(itech8_state::rom_constant_r) { // Ninja Clowns reads this area for program ROM checksum @@ -879,36 +857,80 @@ WRITE8_MEMBER(itech8_state::ninclown_palette_w) *************************************/ /*------ common layout with TMS34061 at 0000 ------*/ -void itech8_state::tmslo_map(address_map &map) +void itech8_state::common_lo_map(address_map &map) { map(0x0000, 0x0fff).rw(FUNC(itech8_state::tms34061_r), FUNC(itech8_state::tms34061_w)); map(0x1100, 0x1100).nopw(); - map(0x1120, 0x1120).w(FUNC(itech8_state::sound_data_w)); + map(0x1120, 0x1120).w(m_soundlatch, FUNC(generic_latch_8_device::write)); map(0x1140, 0x1140).portr("40").w(FUNC(itech8_state::grom_bank_w)); map(0x1160, 0x1160).portr("60").w(FUNC(itech8_state::page_w)); map(0x1180, 0x1180).portr("80").w(m_tms34061, FUNC(tms34061_device::latch_w)); map(0x11a0, 0x11a0).w(FUNC(itech8_state::nmi_ack_w)); - map(0x11c0, 0x11df).r(FUNC(itech8_state::blitter_r)).w(FUNC(itech8_state::blitter_bank_w)); + map(0x11c0, 0x11df).rw(FUNC(itech8_state::blitter_r), FUNC(itech8_state::blitter_bank_w)); map(0x11e0, 0x11ff).w(FUNC(itech8_state::palette_w)); map(0x2000, 0x3fff).ram().share("nvram"); - map(0x4000, 0xffff).bankr("bank1"); + map(0x4000, 0x7fff).bankr("mainbank"); + map(0x8000, 0xffff).bankr("fixed"); // non-banked area } /*------ common layout with TMS34061 at 1000 ------*/ -void itech8_state::tmshi_map(address_map &map) +void itech8_state::common_hi_map(address_map &map) { - map(0x1000, 0x1fff).rw(FUNC(itech8_state::tms34061_r), FUNC(itech8_state::tms34061_w)); map(0x0100, 0x0100).nopw(); - map(0x0120, 0x0120).w(FUNC(itech8_state::sound_data_w)); + map(0x0120, 0x0120).w(m_soundlatch, FUNC(generic_latch_8_device::write)); map(0x0140, 0x0140).portr("40").w(FUNC(itech8_state::grom_bank_w)); map(0x0160, 0x0160).portr("60").w(FUNC(itech8_state::page_w)); map(0x0180, 0x0180).portr("80").w(m_tms34061, FUNC(tms34061_device::latch_w)); map(0x01a0, 0x01a0).w(FUNC(itech8_state::nmi_ack_w)); - map(0x01c0, 0x01df).r(FUNC(itech8_state::blitter_r)).w(FUNC(itech8_state::blitter_bank_w)); + map(0x01c0, 0x01df).rw(FUNC(itech8_state::blitter_r), FUNC(itech8_state::blitter_bank_w)); map(0x01e0, 0x01ff).w(FUNC(itech8_state::palette_w)); + map(0x1000, 0x1fff).rw(FUNC(itech8_state::tms34061_r), FUNC(itech8_state::tms34061_w)); map(0x2000, 0x3fff).ram().share("nvram"); - map(0x4000, 0xffff).bankr("bank1"); + map(0x4000, 0x7fff).bankr("mainbank"); + map(0x8000, 0xffff).bankr("fixed"); // non-banked area +} + + +/*------ Grudge Match layout ------*/ +void grmatch_state::grmatch_map(address_map &map) +{ + itech8_state::common_hi_map(map); + map(0x0160, 0x0160).w(FUNC(grmatch_state::palette_w)); + map(0x0180, 0x0180).w(FUNC(grmatch_state::xscroll_w)); + map(0x01e0, 0x01ff).nopw(); +} + + +/*------ Slick Shot layout ------*/ +void itech8_state::slikshot_map(address_map &map) +{ + common_hi_map(map); + map(0x0180, 0x0180).r(FUNC(itech8_state::slikshot_z80_r)); + map(0x01cf, 0x01cf).rw(FUNC(itech8_state::slikshot_z80_control_r), FUNC(itech8_state::slikshot_z80_control_w)); +} + + +/*------ Super Strike Bowling layout ------*/ +void itech8_state::sstrike_map(address_map &map) +{ + common_lo_map(map); + map(0x1180, 0x1180).r(FUNC(itech8_state::slikshot_z80_r)); + map(0x11cf, 0x11cf).rw(FUNC(itech8_state::slikshot_z80_control_r), FUNC(itech8_state::slikshot_z80_control_w)); +} + + +/*------ Rim Rockin' Basketball layout ------*/ +void itech8_state::rimrockn_map(address_map &map) +{ + common_hi_map(map); + map(0x0161, 0x0161).portr("161"); + map(0x0162, 0x0162).portr("162"); + map(0x0163, 0x0163).portr("163"); + map(0x0164, 0x0164).portr("164"); + map(0x0165, 0x0165).portr("165"); + map(0x01a0, 0x01a0).w(FUNC(itech8_state::rimrockn_bank_w)); + map(0x01c0, 0x01df).w(FUNC(itech8_state::blitter_w)); } @@ -920,12 +942,13 @@ void itech8_state::gtg2_map(address_map &map) map(0x0140, 0x015f).w(FUNC(itech8_state::palette_w)); map(0x0140, 0x0140).portr("80"); map(0x0160, 0x0160).w(FUNC(itech8_state::grom_bank_w)); - map(0x0180, 0x019f).r(FUNC(itech8_state::blitter_r)).w(FUNC(itech8_state::blitter_bank_w)); + map(0x0180, 0x019f).rw(FUNC(itech8_state::blitter_r), FUNC(itech8_state::blitter_bank_w)); map(0x01c0, 0x01c0).w(FUNC(itech8_state::gtg2_sound_data_w)); map(0x01e0, 0x01e0).w(m_tms34061, FUNC(tms34061_device::latch_w)); map(0x1000, 0x1fff).rw(FUNC(itech8_state::tms34061_r), FUNC(itech8_state::tms34061_w)); map(0x2000, 0x3fff).ram().share("nvram"); - map(0x4000, 0xffff).bankr("bank1"); + map(0x4000, 0x7fff).bankr("mainbank"); + map(0x8000, 0xffff).bankr("fixed"); // non-banked area } /*------ Ninja Clowns layout ------*/ @@ -935,9 +958,11 @@ void itech8_state::ninclown_map(address_map &map) map(0x000080, 0x003fff).ram().share("nvram"); map(0x004000, 0x03ffff).rom(); map(0x040000, 0x07ffff).r(FUNC(itech8_state::rom_constant_r)); - map(0x100080, 0x100080).w(FUNC(itech8_state::sound_data_w)); - map(0x100100, 0x100101).portr("40").w(FUNC(itech8_state::grom_bank16_w)); - map(0x100180, 0x100181).portr("60").w(FUNC(itech8_state::display_page16_w)); + map(0x100080, 0x100080).w(m_soundlatch, FUNC(generic_latch_8_device::write)); + map(0x100100, 0x100100).w(FUNC(itech8_state::grom_bank_w)); + map(0x100100, 0x100101).portr("40"); + map(0x100180, 0x100180).lw8("page_inv_w", [this](u8 data){ page_w(~data); } ); + map(0x100180, 0x100181).portr("60"); map(0x100240, 0x100240).w(m_tms34061, FUNC(tms34061_device::latch_w)); map(0x100280, 0x100281).portr("80").nopw(); map(0x100300, 0x10031f).rw(FUNC(itech8_state::blitter_r), FUNC(itech8_state::blitter_w)); @@ -957,7 +982,7 @@ void itech8_state::ninclown_map(address_map &map) void itech8_state::sound2203_map(address_map &map) { map(0x0000, 0x0000).nopw(); - map(0x1000, 0x1000).r(FUNC(itech8_state::sound_data_r)); + map(0x1000, 0x1000).r(m_soundlatch, FUNC(generic_latch_8_device::read)); map(0x2000, 0x2001).mirror(0x0002).rw("ymsnd", FUNC(ym2203_device::read), FUNC(ym2203_device::write)); map(0x3000, 0x37ff).ram(); map(0x4000, 0x4000).rw("oki", FUNC(okim6295_device::read), FUNC(okim6295_device::write)); @@ -969,7 +994,7 @@ void itech8_state::sound2203_map(address_map &map) void itech8_state::sound2608b_map(address_map &map) { map(0x1000, 0x1000).nopw(); - map(0x2000, 0x2000).r(FUNC(itech8_state::sound_data_r)); + map(0x2000, 0x2000).r(m_soundlatch, FUNC(generic_latch_8_device::read)); map(0x4000, 0x4003).rw("ymsnd", FUNC(ym2608_device::read), FUNC(ym2608_device::write)); map(0x6000, 0x67ff).ram(); map(0x8000, 0xffff).rom(); @@ -980,7 +1005,7 @@ void itech8_state::sound2608b_map(address_map &map) void itech8_state::sound3812_map(address_map &map) { map(0x0000, 0x0000).nopw(); - map(0x1000, 0x1000).r(FUNC(itech8_state::sound_data_r)); + map(0x1000, 0x1000).r(m_soundlatch, FUNC(generic_latch_8_device::read)); map(0x2000, 0x2001).rw("ymsnd", FUNC(ym3812_device::read), FUNC(ym3812_device::write)); map(0x3000, 0x37ff).ram(); map(0x4000, 0x4000).rw("oki", FUNC(okim6295_device::read), FUNC(okim6295_device::write)); @@ -993,7 +1018,7 @@ void itech8_state::sound3812_map(address_map &map) void itech8_state::sound3812_external_map(address_map &map) { map(0x0000, 0x0000).nopw(); - map(0x1000, 0x1000).r(FUNC(itech8_state::sound_data_r)); + map(0x1000, 0x1000).r(m_soundlatch, FUNC(generic_latch_8_device::read)); map(0x2000, 0x2001).rw("ymsnd", FUNC(ym3812_device::read), FUNC(ym3812_device::write)); map(0x3000, 0x37ff).ram(); map(0x4000, 0x4000).rw("oki", FUNC(okim6295_device::read), FUNC(okim6295_device::write)); @@ -1718,6 +1743,9 @@ void itech8_state::itech8_core_devices(machine_config &config) SPEAKER(config, "mono").front_center(); + GENERIC_LATCH_8(config, m_soundlatch, 0); + m_soundlatch->data_pending_callback().set_inputline(m_soundcpu, M6809_IRQ_LINE); + via6522_device &via(VIA6522(config, "via6522_0", CLOCK_8MHz/4)); via.writepb_handler().set(FUNC(itech8_state::pia_portb_out)); via.irq_handler().set_inputline(m_soundcpu, M6809_FIRQ_LINE); @@ -1726,7 +1754,7 @@ void itech8_state::itech8_core_devices(machine_config &config) void itech8_state::itech8_core_lo(machine_config &config) { MC6809(config, m_maincpu, CLOCK_8MHz); - m_maincpu->set_addrmap(AS_PROGRAM, &itech8_state::tmslo_map); + m_maincpu->set_addrmap(AS_PROGRAM, &itech8_state::common_lo_map); itech8_core_devices(config); } @@ -1734,7 +1762,7 @@ void itech8_state::itech8_core_lo(machine_config &config) void itech8_state::itech8_core_hi(machine_config &config) { itech8_core_lo(config); - m_maincpu->set_addrmap(AS_PROGRAM, &itech8_state::tmshi_map); + m_maincpu->set_addrmap(AS_PROGRAM, &itech8_state::common_hi_map); } void itech8_state::itech8_sound_ym2203(machine_config &config) @@ -1821,6 +1849,8 @@ void grmatch_state::grmatch(machine_config &config) itech8_core_hi(config); itech8_sound_ym2608b(config); + m_maincpu->set_addrmap(AS_PROGRAM, &grmatch_state::grmatch_map); + m_screen->set_visarea(0, 399, 0, 239); m_screen->set_screen_update(FUNC(grmatch_state::screen_update)); } @@ -1848,6 +1878,8 @@ void itech8_state::slikshot_hi(machine_config &config) itech8_core_hi(config); itech8_sound_ym2203(config); + m_maincpu->set_addrmap(AS_PROGRAM, &itech8_state::slikshot_map); + Z80(config, m_subcpu, CLOCK_8MHz/2); m_subcpu->set_addrmap(AS_PROGRAM, &itech8_state::slikz80_mem_map); m_subcpu->set_addrmap(AS_IO, &itech8_state::slikz80_io_map); @@ -1862,6 +1894,8 @@ void itech8_state::slikshot_lo(machine_config &config) itech8_core_lo(config); itech8_sound_ym2203(config); + m_maincpu->set_addrmap(AS_PROGRAM, &itech8_state::sstrike_map); + Z80(config, m_subcpu, CLOCK_8MHz/2); m_subcpu->set_addrmap(AS_PROGRAM, &itech8_state::slikz80_mem_map); m_subcpu->set_addrmap(AS_IO, &itech8_state::slikz80_io_map); @@ -1910,7 +1944,7 @@ void itech8_state::rimrockn(machine_config &config) itech8_sound_ym3812_external(config); HD6309(config, m_maincpu, CLOCK_12MHz); - m_maincpu->set_addrmap(AS_PROGRAM, &itech8_state::tmshi_map); + m_maincpu->set_addrmap(AS_PROGRAM, &itech8_state::rimrockn_map); m_screen->set_visarea(24, 375, 0, 239); m_screen->set_screen_update(FUNC(itech8_state::screen_update_2page_large)); @@ -1948,10 +1982,8 @@ void itech8_state::gtg2(machine_config &config) *************************************/ ROM_START( wfortune ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "wofpgm", 0x04000, 0x4000, CRC(bd984654) SHA1(8e16d2feb26e9a6f86c4a36bf0f03db80ded03f6) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "wofpgm", 0x00000, 0x10000, CRC(bd984654) SHA1(8e16d2feb26e9a6f86c4a36bf0f03db80ded03f6) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "wofsnd", 0x08000, 0x8000, CRC(0a6aa5dc) SHA1(42eef40a4300d6d16d9e2af678432a02be05f104) ) @@ -1968,10 +2000,8 @@ ROM_END ROM_START( wfortunea ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "wofpgmr1.bin", 0x04000, 0x4000, CRC(c3d3eb21) SHA1(21137663afd19fba875e188640f0347fc8c5dcf0) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "wofpgmr1.bin", 0x00000, 0x10000, CRC(c3d3eb21) SHA1(21137663afd19fba875e188640f0347fc8c5dcf0) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "wofsnd", 0x08000, 0x8000, CRC(0a6aa5dc) SHA1(42eef40a4300d6d16d9e2af678432a02be05f104) ) @@ -1988,10 +2018,8 @@ ROM_END ROM_START( grmatch ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "grudgematch.u5", 0x04000, 0x4000, CRC(11cadec9) SHA1(e21df623d1311ea63bafa2d6d0d94eb7d13232da) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "grudgematch.u5", 0x00000, 0x10000, CRC(11cadec9) SHA1(e21df623d1311ea63bafa2d6d0d94eb7d13232da) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "grudgematch.u27", 0x08000, 0x8000, CRC(59c18e63) SHA1(0d00c9cc683ff17e3213ba343ae65d533b57a243) ) @@ -2011,9 +2039,8 @@ ROM_END ROM_START( stratab ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "sb_prog_v3_u5.u5", 0x08000, 0x8000, CRC(a5ae728f) SHA1(85098eef1614d5148e8082df4c936883662292ee) ) /* Labeled as SB PROG V3 (U5) */ - ROM_COPY( "maincpu", 0x8000, 0x14000, 0x8000 ) + ROM_REGION( 0x8000, "maincpu", 0 ) + ROM_LOAD( "sb_prog_v3_u5.u5", 0x00000, 0x8000, CRC(a5ae728f) SHA1(85098eef1614d5148e8082df4c936883662292ee) ) /* Labeled as SB PROG V3 (U5) */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "sb_snds_u27.u27", 0x08000, 0x8000, CRC(b36c8f0a) SHA1(c4c3edf3352d95561f76705087338c1946137447) ) /* Labeled as SB SNDS (U27) */ @@ -2029,9 +2056,8 @@ ROM_END ROM_START( stratab1 ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "sb_prog_v1_u5.u5", 0x08000, 0x8000, CRC(46d51604) SHA1(de7b6306fdcee4907b07667baf874bd195822e6a) ) /* Labeled as SB PROG V1 (U5) */ - ROM_COPY( "maincpu", 0x8000, 0x14000, 0x8000 ) + ROM_REGION( 0x8000, "maincpu", 0 ) + ROM_LOAD( "sb_prog_v1_u5.u5", 0x00000, 0x8000, CRC(46d51604) SHA1(de7b6306fdcee4907b07667baf874bd195822e6a) ) /* Labeled as SB PROG V1 (U5) */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "sb_snds_u27.u27", 0x08000, 0x8000, CRC(b36c8f0a) SHA1(c4c3edf3352d95561f76705087338c1946137447) ) /* Labeled as SB SNDS (U27) */ @@ -2047,10 +2073,8 @@ ROM_END ROM_START( gtg ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "gtg_joy_3.3_u5.u5", 0x04000, 0x4000, CRC(983a5c0c) SHA1(245fd6b86e96ef57ea9a85c7a501d846e135cfc6) ) /* Joystick version - Labeled GTG JOY V3.3 (U5) */ - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x08000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "gtg_joy_3.3_u5.u5", 0x00000, 0x10000, CRC(983a5c0c) SHA1(245fd6b86e96ef57ea9a85c7a501d846e135cfc6) ) /* Joystick version - Labeled GTG JOY V3.3 (U5) */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "u27.bin", 0x08000, 0x8000, CRC(358d2440) SHA1(7b09350c89f9d2c86dc187d8812bbf26b576a38f) ) @@ -2069,10 +2093,8 @@ ROM_END ROM_START( gtgj31 ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "gtg_joy_3.1_u5.u5", 0x04000, 0x4000, CRC(61984272) SHA1(be735f8576fb2cccc0e9e6ea6f2fd54b6c0b3bb3) ) /* Joystick version - Labeled GTG JOY V3.1 (U5) */ - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x08000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "gtg_joy_3.1_u5.u5", 0x00000, 0x10000, CRC(61984272) SHA1(be735f8576fb2cccc0e9e6ea6f2fd54b6c0b3bb3) ) /* Joystick version - Labeled GTG JOY V3.1 (U5) */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "u27.bin", 0x08000, 0x8000, CRC(358d2440) SHA1(7b09350c89f9d2c86dc187d8812bbf26b576a38f) ) @@ -2091,10 +2113,8 @@ ROM_END ROM_START( gtgt ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "gtg.bin_2.0.u5", 0x4000, 0x4000, CRC(4c907166) SHA1(338a599645fa49c9fcbfbe5ba3431dafffddacc7) ) /* Trackball version */ - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "gtg.bin_2.0.u5", 0x0000, 0x10000, CRC(4c907166) SHA1(338a599645fa49c9fcbfbe5ba3431dafffddacc7) ) /* Trackball version */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "golf-snd.u27", 0x08000, 0x8000, CRC(f6a7429b) SHA1(0fb378606c12c3543aa1ff603101e262acb9c692) ) @@ -2113,10 +2133,8 @@ ROM_END ROM_START( gtgt1 ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "gtg.bin_1.0.u5", 0x04000, 0x4000, CRC(ec70b510) SHA1(318984d77eb1df6258b855781ae1c9a09aa74f15) ) /* Trackball version */ - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "gtg.bin_1.0.u5", 0x00000, 0x10000, CRC(ec70b510) SHA1(318984d77eb1df6258b855781ae1c9a09aa74f15) ) /* Trackball version */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "snd-u27.256", 0x08000, 0x8000, CRC(471da557) SHA1(32bfe450a42d9eb6c14edcfa2b4e33f65a11126e) ) @@ -2135,11 +2153,8 @@ ROM_END ROM_START( gtg2t ) - /* banks are loaded in the opposite order from the others, */ - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "gtgii_tb_v1.1.u5", 0x10000, 0x4000, CRC(c7b3a9f3) SHA1(5edaca6fd6ee58bd1676dc9b2c86da4dd2f51687) ) /* Trackball version - labeled GTGII TB V1.1 (U5) */ - ROM_CONTINUE( 0x04000, 0xc000 ) - ROM_COPY( "maincpu", 0x8000, 0x14000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "gtgii_tb_v1.1.u5", 0x00000, 0x10000, CRC(c7b3a9f3) SHA1(5edaca6fd6ee58bd1676dc9b2c86da4dd2f51687) ) /* Trackball version - labeled GTGII TB V1.1 (U5) */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "gtgii_snd_v1_u27.u27", 0x08000, 0x8000, CRC(dd2a5905) SHA1(dc93f13de3953852a6757361eb9683a57d3ed326) ) /* labeled GTGII SND V1 (U27) */ @@ -2161,10 +2176,8 @@ ROM_END ROM_START( gtg2j ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "gtg2.bin_1.0.u5", 0x04000, 0x4000, CRC(9c95ceaa) SHA1(d9fd2b2419c026822a07d2ba51d6ab40b7cd0d49) ) /* Joystick version */ - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "gtg2.bin_1.0.u5", 0x00000, 0x10000, CRC(9c95ceaa) SHA1(d9fd2b2419c026822a07d2ba51d6ab40b7cd0d49) ) /* Joystick version */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "gtgii_snd_v1_u27.u27", 0x08000, 0x8000, CRC(dd2a5905) SHA1(dc93f13de3953852a6757361eb9683a57d3ed326) ) /* labeled GTGII SND V1 (U27) */ @@ -2186,10 +2199,8 @@ ROM_END ROM_START( slikshot ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "poolpgm-20.u5", 0x04000, 0x4000, CRC(370a00eb) SHA1(b2878f161f4931d9fc3979a84b29660941e2608f) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "poolpgm-20.u5", 0x00000, 0x10000, CRC(370a00eb) SHA1(b2878f161f4931d9fc3979a84b29660941e2608f) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "u27.bin", 0x08000, 0x8000, CRC(a96ce0f7) SHA1(c1fec3aeef97c846fd1a20b91af54f6bf9723a71) ) @@ -2210,10 +2221,8 @@ ROM_END ROM_START( slikshot17 ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "poolpgm-17.u5", 0x04000, 0x4000, CRC(09d70554) SHA1(a009cd3b22261c60f1028694baef51f61713154f) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "poolpgm-17.u5", 0x00000, 0x10000, CRC(09d70554) SHA1(a009cd3b22261c60f1028694baef51f61713154f) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "u27.bin", 0x08000, 0x8000, CRC(a96ce0f7) SHA1(c1fec3aeef97c846fd1a20b91af54f6bf9723a71) ) @@ -2234,10 +2243,8 @@ ROM_END ROM_START( slikshot16 ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "poolpgm-16.u5", 0x04000, 0x4000, CRC(c0f17012) SHA1(5d466e058daf91b4f52e634498df9d2a03627aaa) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "poolpgm-16.u5", 0x00000, 0x10000, CRC(c0f17012) SHA1(5d466e058daf91b4f52e634498df9d2a03627aaa) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "u27.bin", 0x08000, 0x8000, CRC(a96ce0f7) SHA1(c1fec3aeef97c846fd1a20b91af54f6bf9723a71) ) @@ -2260,10 +2267,8 @@ ROM_END ROM_START( dynobop ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "dyno_pgm_1.1_u5.u5", 0x04000, 0x4000, CRC(98452c40) SHA1(9b9316fc258792e0d825f16e0fadf8e0c35a864e) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x08000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "dyno_pgm_1.1_u5.u5", 0x00000, 0x10000, CRC(98452c40) SHA1(9b9316fc258792e0d825f16e0fadf8e0c35a864e) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "dyno_snd-u27.u27", 0x08000, 0x8000, CRC(a37d862b) SHA1(922eeae184df2c5c28040da27699dd55744f8dca) ) @@ -2284,9 +2289,8 @@ ROM_END ROM_START( sstrike ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "sstrik_prg-v1_u5.u5", 0x08000, 0x8000, CRC(af00cddf) SHA1(b866e8dfce1449f7462a79efa385ea6b55cdc6e7) ) /* labeled SSTRIKE PRG-V1(U5) */ - ROM_COPY( "maincpu", 0x8000, 0x14000, 0x8000 ) + ROM_REGION( 0x8000, "maincpu", 0 ) + ROM_LOAD( "sstrik_prg-v1_u5.u5", 0x00000, 0x8000, CRC(af00cddf) SHA1(b866e8dfce1449f7462a79efa385ea6b55cdc6e7) ) /* labeled SSTRIKE PRG-V1(U5) */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "sstrik_snd1.4_u27.u27", 0x08000, 0x8000, CRC(efab7252) SHA1(eb3b2002531e551e3d67958ea3cc56a69fa660e2) ) /* labeled SSTRIKE SND1.4(U27) */ @@ -2308,9 +2312,8 @@ ROM_END ROM_START( stratabs ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "sb_prog-v4t.u5", 0x08000, 0x8000, CRC(38ddae75) SHA1(71a9cbd36cf7b180a88bab3ab92a4dff93ce365f) ) - ROM_COPY( "maincpu", 0x8000, 0x14000, 0x8000 ) + ROM_REGION( 0x8000, "maincpu", 0 ) + ROM_LOAD( "sb_prog-v4t.u5", 0x00000, 0x8000, CRC(38ddae75) SHA1(71a9cbd36cf7b180a88bab3ab92a4dff93ce365f) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "sb_snds_1.4.u27", 0x08000, 0x8000, CRC(526ef093) SHA1(884f9149b3d5eb33e47258e466ad9cd9ce5ffddb) ) @@ -2332,10 +2335,8 @@ ROM_END ROM_START( pokrdice ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "pd-v17.u5", 0x04000, 0x4000, CRC(5e24be82) SHA1(97e50cc023ff651fb09cc5e85a1bef1bc234ccb9) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "pd-v17.u5", 0x00000, 0x10000, CRC(5e24be82) SHA1(97e50cc023ff651fb09cc5e85a1bef1bc234ccb9) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "pd-snd.bin", 0x08000, 0x8000, CRC(4925401c) SHA1(e35983bec4a0dd4cb1d942fd909790b1adeb415d) ) @@ -2350,10 +2351,8 @@ ROM_END ROM_START( hstennis ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "tenbim.v11", 0x04000, 0x4000, CRC(faffab5c) SHA1(4de525f6adb16205c47788b78aecdebd57008295) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "tenbim.v11", 0x00000, 0x10000, CRC(faffab5c) SHA1(4de525f6adb16205c47788b78aecdebd57008295) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "tensnd.v1", 0x08000, 0x8000, CRC(f034a694) SHA1(3540e2edff2ce47504260ec856bab9b638d9260d) ) @@ -2374,10 +2373,8 @@ ROM_END ROM_START( hstennis10 ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "tenbim.v10", 0x04000, 0x4000, CRC(d108a6e0) SHA1(1041e1d95b10245fc50f6484e710803db2706f9a) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "tenbim.v10", 0x00000, 0x10000, CRC(d108a6e0) SHA1(1041e1d95b10245fc50f6484e710803db2706f9a) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "tensnd.v1", 0x08000, 0x8000, CRC(f034a694) SHA1(3540e2edff2ce47504260ec856bab9b638d9260d) ) @@ -2398,10 +2395,8 @@ ROM_END ROM_START( arlingtn ) /* PCB p/n 1030 rev. 1A */ - ROM_REGION( 0x1c000, "maincpu", 0 ) /* banks are loaded in the opposite order from the others, */ - ROM_LOAD( "ahr-d_v_1.21.u5", 0x10000, 0x4000, CRC(00aae02e) SHA1(3bcfbd256c34ae222dde24ba9544f19da70b698e) ) /* Service menu reports version as 1.21-D */ - ROM_CONTINUE( 0x04000, 0xc000 ) - ROM_COPY( "maincpu", 0x8000, 0x14000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "ahr-d_v_1.21.u5", 0x00000, 0x10000, CRC(00aae02e) SHA1(3bcfbd256c34ae222dde24ba9544f19da70b698e) ) /* Service menu reports version as 1.21-D */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "ahr_snd_v1.1.u27", 0x08000, 0x8000, CRC(dec57dca) SHA1(21a8ead10b0434629f41f6b067c49b6622569a6c) ) @@ -2418,10 +2413,8 @@ ROM_END ROM_START( peggle ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "j-stick.u5", 0x04000, 0x4000, CRC(140d5a9c) SHA1(841e5f45c6f306d9bd286e7d3e3c75b169c932e1) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "j-stick.u5", 0x00000, 0x10000, CRC(140d5a9c) SHA1(841e5f45c6f306d9bd286e7d3e3c75b169c932e1) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "sound.u27", 0x08000, 0x8000, CRC(b99beb70) SHA1(8d82c3b081a1afb236afa658abb3aa605c6c2264) ) @@ -2437,10 +2430,8 @@ ROM_END ROM_START( pegglet ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "trakball.u5", 0x04000, 0x4000, CRC(d2694868) SHA1(9945a308550c9d89a647d80257e3ab14f793ac6f) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "trakball.u5", 0x00000, 0x10000, CRC(d2694868) SHA1(9945a308550c9d89a647d80257e3ab14f793ac6f) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "sound.u27", 0x08000, 0x8000, CRC(b99beb70) SHA1(8d82c3b081a1afb236afa658abb3aa605c6c2264) ) @@ -2456,11 +2447,8 @@ ROM_END ROM_START( neckneck ) - /* banks are loaded in the opposite order from the others, */ - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "nn_prg12.u5", 0x04000, 0x4000, CRC(8e51734a) SHA1(c184af73670235a9245bfdeec2b58acfe93170e3) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "nn_prg12.u5", 0x00000, 0x10000, CRC(8e51734a) SHA1(c184af73670235a9245bfdeec2b58acfe93170e3) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "nn_snd10.u27", 0x08000, 0x8000, CRC(74771b2f) SHA1(0a963d2962699bb1b4d08bd486979151d0a228da) ) @@ -2477,15 +2465,8 @@ ROM_END ROM_START( rimrockn ) - ROM_REGION( 0x34000, "maincpu", 0 ) - ROM_LOAD( "rrb.bin_2.2.u5", 0x04000, 0x4000, CRC(97777683) SHA1(0998dde26daaa2d2b78e83647e03ba01b0ef31f2) ) - ROM_CONTINUE( 0x10000, 0x4000 ) - ROM_CONTINUE( 0x1c000, 0x4000 ) - ROM_CONTINUE( 0x28000, 0xc000 ) - ROM_CONTINUE( 0x2c000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x08000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x14000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x20000, 0x8000 ) + ROM_REGION( 0x20000, "maincpu", 0 ) + ROM_LOAD( "rrb.bin_2.2.u5", 0x00000, 0x20000, CRC(97777683) SHA1(0998dde26daaa2d2b78e83647e03ba01b0ef31f2) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "rrbsndv11.u27", 0x08000, 0x8000, CRC(59f87f0e) SHA1(46f38aca35a7c2faee227b4c950d20a6076c6fa7) ) /* Labeled as RRBSND V1.1 U27 */ @@ -2507,15 +2488,8 @@ ROM_END ROM_START( rimrockn20 ) - ROM_REGION( 0x34000, "maincpu", 0 ) - ROM_LOAD( "rrb.bin_2.0.u5", 0x04000, 0x4000, CRC(7e9d5545) SHA1(2aa028b3f5d05bec4ee289e7d39eaad30b3d4d5f) ) - ROM_CONTINUE( 0x10000, 0x4000 ) - ROM_CONTINUE( 0x1c000, 0x4000 ) - ROM_CONTINUE( 0x28000, 0xc000 ) - ROM_CONTINUE( 0x2c000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x08000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x14000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x20000, 0x8000 ) + ROM_REGION( 0x20000, "maincpu", 0 ) + ROM_LOAD( "rrb.bin_2.0.u5", 0x00000, 0x20000, CRC(7e9d5545) SHA1(2aa028b3f5d05bec4ee289e7d39eaad30b3d4d5f) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "rrbsndv11.u27", 0x08000, 0x8000, CRC(59f87f0e) SHA1(46f38aca35a7c2faee227b4c950d20a6076c6fa7) ) /* Labeled as RRBSND V1.1 U27 */ @@ -2532,15 +2506,8 @@ ROM_END ROM_START( rimrockn16 ) - ROM_REGION( 0x34000, "maincpu", 0 ) - ROM_LOAD( "rrb.bin_1.6.u5",0x04000, 0x4000, CRC(999cd502) SHA1(8ad0d641a9f853eff27be1d4de04ab86b9275d57) ) - ROM_CONTINUE( 0x10000, 0x4000 ) - ROM_CONTINUE( 0x1c000, 0x4000 ) - ROM_CONTINUE( 0x28000, 0xc000 ) - ROM_CONTINUE( 0x2c000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x08000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x14000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x20000, 0x8000 ) + ROM_REGION( 0x20000, "maincpu", 0 ) + ROM_LOAD( "rrb.bin_1.6.u5",0x00000, 0x20000, CRC(999cd502) SHA1(8ad0d641a9f853eff27be1d4de04ab86b9275d57) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "rrbsndv11.u27", 0x08000, 0x8000, CRC(59f87f0e) SHA1(46f38aca35a7c2faee227b4c950d20a6076c6fa7) ) /* Labeled as RRBSND V1.1 U27 */ @@ -2557,15 +2524,8 @@ ROM_END ROM_START( rimrockn12 ) - ROM_REGION( 0x34000, "maincpu", 0 ) - ROM_LOAD( "rrb.bin_1.2.u5",0x04000, 0x4000, CRC(661761a6) SHA1(7224b1eac2fd0969d70657448ab241a433143df4) ) - ROM_CONTINUE( 0x10000, 0x4000 ) - ROM_CONTINUE( 0x1c000, 0x4000 ) - ROM_CONTINUE( 0x28000, 0xc000 ) - ROM_CONTINUE( 0x2c000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x08000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x14000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x20000, 0x8000 ) + ROM_REGION( 0x20000, "maincpu", 0 ) + ROM_LOAD( "rrb.bin_1.2.u5",0x00000, 0x20000, CRC(661761a6) SHA1(7224b1eac2fd0969d70657448ab241a433143df4) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "rrbsndv1.u27", 0x08000, 0x8000, CRC(8eda5f53) SHA1(f256544a8c87125587719460ed0fef14efef9015) ) @@ -2581,6 +2541,34 @@ ROM_START( rimrockn12 ) ROM_END +ROM_START( rimrockn12b ) + ROM_REGION( 0x20000, "maincpu", 0 ) + ROM_LOAD( "rbba-1.u5", 0x00000, 0x20000, CRC(f99561a8) SHA1(ee59b934839ef5599bb393e0860d54c95f6df1b0) ) // ZX2880JL + + ROM_REGION( 0x10000, "soundcpu", 0 ) + ROM_LOAD( "rrbsndv1.u27", 0x08000, 0x8000, CRC(8eda5f53) SHA1(f256544a8c87125587719460ed0fef14efef9015) ) // Found on a double-sized ROM (27C512) with its first half empty + + ROM_REGION( 0x100000, "grom", 0 ) + ROM_LOAD( "rbb-grom00", 0x00000, 0x40000, CRC(3eacbad9) SHA1(bff1ec6a24ccf983434e4e9453c30f36fa397534) ) + ROM_LOAD( "rbb-grom01", 0x40000, 0x40000, CRC(864cc269) SHA1(06f92889cd20881faeb59ec06ca1578ead2294f4) ) + ROM_LOAD( "rbb-grom02", 0x80000, 0x40000, CRC(34e567d5) SHA1(d0eb6fd0da8b9c3bfe7d4ecfb4bd903e4926b63a) ) + ROM_LOAD( "rbb-grom03", 0xc0000, 0x40000, CRC(fd18045d) SHA1(a1b98e4a2aa6f3cd33a3e2f5744160e05cc9f8d1) ) + + ROM_REGION( 0x40000, "oki", 0 ) + ROM_LOAD( "rbb-srom0", 0x00000, 0x40000, CRC(7ad42be0) SHA1(c9b519bad3c5c9a3315d1bf3292cc30ee0771db7) ) + + /* Unused */ + ROM_REGION( 0x0096b, "plds", 0 ) + ROM_LOAD( "a-palce16v8h.u53", 0x00000, 0x00117, NO_DUMP ) // Undumped (solderded) + ROM_LOAD( "a-palce16v8q.u45", 0x00117, 0x00117, NO_DUMP ) // Undumped (solderded) + ROM_LOAD( "a-palce16v8h.u14", 0x0022e, 0x00117, NO_DUMP ) // Undumped (solderded) + ROM_LOAD( "a-gal22v10.u55", 0x00345, 0x002e1, NO_DUMP ) // Undumped (solderded) + ROM_LOAD( "a-palce16v8h.u65", 0x00626, 0x00117, NO_DUMP ) // Undumped (solderded) + ROM_LOAD( "a-palce16v8h.u50", 0x0073d, 0x00117, NO_DUMP ) // Undumped (solderded) + ROM_LOAD( "b-palce16v8h.u29", 0x00854, 0x00117, NO_DUMP ) // Undumped (solderded) +ROM_END + + ROM_START( ninclown ) ROM_REGION( 0x40000, "maincpu", 0 ) ROM_LOAD16_BYTE( "prog1", 0x00000, 0x20000, CRC(fabfdcd2) SHA1(7a9852838cf7772d8f8f956b03823c4222520a5a) ) @@ -2603,10 +2591,8 @@ ROM_END ROM_START( gpgolf ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "gpgv1_1.bin", 0x04000, 0x4000, CRC(631e77e0) SHA1(847ba1e00d31441620a2a1f45a9aa58df84bde8b) ) /* Joystick version */ - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "gpgv1_1.bin", 0x00000, 0x10000, CRC(631e77e0) SHA1(847ba1e00d31441620a2a1f45a9aa58df84bde8b) ) /* Joystick version */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "sndv1.u27", 0x08000, 0x8000, CRC(55734876) SHA1(eb5ef816acbc6e35642749e38a2908b7ba359b9d) ) @@ -2622,11 +2608,8 @@ ROM_END ROM_START( gtg2 ) - /* banks are loaded in the opposite order from the others, */ - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "gtg2_v2_2.u5", 0x10000, 0x4000, CRC(4a61580f) SHA1(7c64648d47418fbcc0f9b5bd91f88856209bc0f5) ) /* Trackball version */ - ROM_CONTINUE( 0x04000, 0xc000 ) - ROM_COPY( "maincpu", 0x8000, 0x14000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "gtg2_v2_2.u5", 0x00000, 0x10000, CRC(4a61580f) SHA1(7c64648d47418fbcc0f9b5bd91f88856209bc0f5) ) /* Trackball version */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "sndv1.u27", 0x08000, 0x8000, CRC(55734876) SHA1(eb5ef816acbc6e35642749e38a2908b7ba359b9d) ) @@ -2654,12 +2637,13 @@ ROM_END * *************************************/ -void grmatch_state::driver_init() +void itech8_state::init_invbank() { - m_maincpu->space(AS_PROGRAM).install_write_handler(0x0160, 0x0160, write8_delegate(FUNC(grmatch_state::palette_w),this)); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x0180, 0x0180, write8_delegate(FUNC(grmatch_state::xscroll_w),this)); - m_maincpu->space(AS_PROGRAM).unmap_write(0x01e0, 0x01ff); + m_bankxor = 1; +} +void grmatch_state::driver_init() +{ save_item(NAME(m_palcontrol)); save_item(NAME(m_xscroll)); save_item(NAME(m_palette)); @@ -2668,10 +2652,6 @@ void grmatch_state::driver_init() void itech8_state::init_slikshot() { - m_maincpu->space(AS_PROGRAM).install_read_handler (0x0180, 0x0180, read8_delegate(FUNC(itech8_state::slikshot_z80_r),this)); - m_maincpu->space(AS_PROGRAM).install_read_handler (0x01cf, 0x01cf, read8_delegate(FUNC(itech8_state::slikshot_z80_control_r),this)); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x01cf, 0x01cf, write8_delegate(FUNC(itech8_state::slikshot_z80_control_w),this)); - m_delayed_z80_control_timer = timer_alloc(TIMER_DELAYED_Z80_CONTROL); save_item(NAME(m_z80_ctrl)); @@ -2693,14 +2673,6 @@ void itech8_state::init_slikshot() } -void itech8_state::init_sstrike() -{ - m_maincpu->space(AS_PROGRAM).install_read_handler (0x1180, 0x1180, read8_delegate(FUNC(itech8_state::slikshot_z80_r),this)); - m_maincpu->space(AS_PROGRAM).install_read_handler (0x11cf, 0x11cf, read8_delegate(FUNC(itech8_state::slikshot_z80_control_r),this)); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x11cf, 0x11cf, write8_delegate(FUNC(itech8_state::slikshot_z80_control_w),this)); -} - - void itech8_state::init_hstennis() { m_visarea.set(0, 375, 0, 239); @@ -2709,6 +2681,7 @@ void itech8_state::init_hstennis() void itech8_state::init_arligntn() { + init_invbank(); m_visarea.set(16, 389, 0, 239); } @@ -2724,24 +2697,6 @@ void itech8_state::init_neckneck() m_visarea.set(8, 375, 0, 239); } - -void itech8_state::init_rimrockn() -{ - /* additional input ports */ - m_maincpu->space(AS_PROGRAM).install_read_port (0x0161, 0x0161, "161"); - m_maincpu->space(AS_PROGRAM).install_read_port (0x0162, 0x0162, "162"); - m_maincpu->space(AS_PROGRAM).install_read_port (0x0163, 0x0163, "163"); - m_maincpu->space(AS_PROGRAM).install_read_port (0x0164, 0x0164, "164"); - m_maincpu->space(AS_PROGRAM).install_read_port (0x0165, 0x0165, "165"); - - /* different banking mechanism (disable the old one) */ - membank("bank1")->configure_entries(0, 4, memregion("maincpu")->base() + 0x4000, 0xc000); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x01a0, 0x01a0, write8_delegate(FUNC(itech8_state::rimrockn_bank_w),this)); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x01c0, 0x01df, write8_delegate(FUNC(itech8_state::blitter_w),this)); -} - - - /************************************* * * Game drivers @@ -2749,48 +2704,49 @@ void itech8_state::init_rimrockn() *************************************/ /* Wheel of Fortune-style PCB */ -GAME( 1989, wfortune, 0, wfortune, wfortune, itech8_state, empty_init, ROT0, "GameTek", "Wheel Of Fortune (set 1)", 0 ) -GAME( 1989, wfortunea, wfortune, wfortune, wfortune, itech8_state, empty_init, ROT0, "GameTek", "Wheel Of Fortune (set 2)", 0 ) +GAME( 1989, wfortune, 0, wfortune, wfortune, itech8_state, empty_init, ROT0, "GameTek", "Wheel Of Fortune (set 1)", 0 ) +GAME( 1989, wfortunea, wfortune, wfortune, wfortune, itech8_state, empty_init, ROT0, "GameTek", "Wheel Of Fortune (set 2)", 0 ) /* Grudge Match-style PCB */ -GAME( 1989, grmatch, 0, grmatch, grmatch, grmatch_state, empty_init, ROT0, "Yankee Game Technology", "Grudge Match (Yankee Game Technology)", 0 ) +GAME( 1989, grmatch, 0, grmatch, grmatch, grmatch_state, empty_init, ROT0, "Yankee Game Technology", "Grudge Match (Yankee Game Technology)", 0 ) /* Strata Bowling-style PCB */ -GAME( 1990, stratab, 0, stratab_hi, stratab, itech8_state, empty_init, ROT270, "Strata/Incredible Technologies", "Strata Bowling (V3)", 0 ) // still says V1 in service mode? -GAME( 1990, stratab1, stratab, stratab_hi, stratab, itech8_state, empty_init, ROT270, "Strata/Incredible Technologies", "Strata Bowling (V1)", 0 ) -GAME( 1990, gtg, 0, stratab_hi, gtg, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf (Joystick, v3.3)", 0 ) -GAME( 1990, gtgj31, gtg, stratab_hi, gtg, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf (Joystick, v3.1)", 0 ) -GAME( 1989, gtgt, gtg, stratab_hi, gtgt, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf (Trackball, v2.0)", 0 ) -GAME( 1989, gtgt1, gtg, stratab_hi, gtgt, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf (Trackball, v1.0)", 0 ) -GAME( 1989, gtg2t, gtg2, stratab_hi, gtg2t, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf II (Trackball, V1.1)", 0 ) -GAME( 1991, gtg2j, gtg2, stratab_lo, gtg, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf II (Joystick, V1.0)", 0 ) +GAME( 1990, stratab, 0, stratab_hi, stratab, itech8_state, empty_init, ROT270, "Strata/Incredible Technologies", "Strata Bowling (V3)", 0 ) // still says V1 in service mode? +GAME( 1990, stratab1, stratab, stratab_hi, stratab, itech8_state, empty_init, ROT270, "Strata/Incredible Technologies", "Strata Bowling (V1)", 0 ) +GAME( 1990, gtg, 0, stratab_hi, gtg, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf (Joystick, v3.3)", 0 ) +GAME( 1990, gtgj31, gtg, stratab_hi, gtg, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf (Joystick, v3.1)", 0 ) +GAME( 1989, gtgt, gtg, stratab_hi, gtgt, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf (Trackball, v2.0)", 0 ) +GAME( 1989, gtgt1, gtg, stratab_hi, gtgt, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf (Trackball, v1.0)", 0 ) +GAME( 1989, gtg2t, gtg2, stratab_hi, gtg2t, itech8_state, init_invbank, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf II (Trackball, V1.1)", 0 ) +GAME( 1991, gtg2j, gtg2, stratab_lo, gtg, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf II (Joystick, V1.0)", 0 ) /* Slick Shot-style PCB */ -GAME( 1990, slikshot, 0, slikshot_hi, slikshot, itech8_state, init_slikshot, ROT90, "Grand Products/Incredible Technologies", "Slick Shot (V2.2)", MACHINE_MECHANICAL ) -GAME( 1990, slikshot17, slikshot, slikshot_hi, slikshot, itech8_state, init_slikshot, ROT90, "Grand Products/Incredible Technologies", "Slick Shot (V1.7)", MACHINE_MECHANICAL ) -GAME( 1990, slikshot16, slikshot, slikshot_hi, slikshot, itech8_state, init_slikshot, ROT90, "Grand Products/Incredible Technologies", "Slick Shot (V1.6)", MACHINE_MECHANICAL ) -GAME( 1990, dynobop, 0, slikshot_hi, dynobop, itech8_state, init_slikshot, ROT90, "Grand Products/Incredible Technologies", "Dyno Bop (V1.1)", MACHINE_MECHANICAL ) -GAME( 1990, sstrike, 0, sstrike, sstrike, itech8_state, init_sstrike, ROT270, "Strata/Incredible Technologies", "Super Strike Bowling (V1)", MACHINE_MECHANICAL ) -GAME( 1990, stratabs, stratab, sstrike, stratabs, itech8_state, init_sstrike, ROT270, "Strata/Incredible Technologies", "Strata Bowling (V1 4T, Super Strike Bowling type PCB)", MACHINE_NOT_WORKING ) // need to figure out the control hookup for this set, service mode indicates it's still a trackball like stratab -GAME( 1991, pokrdice, 0, slikshot_lo_noz80, pokrdice, itech8_state, empty_init, ROT90, "Strata/Incredible Technologies", "Poker Dice", 0 ) +GAME( 1990, slikshot, 0, slikshot_hi, slikshot, itech8_state, init_slikshot, ROT90, "Grand Products/Incredible Technologies", "Slick Shot (V2.2)", MACHINE_MECHANICAL ) +GAME( 1990, slikshot17, slikshot, slikshot_hi, slikshot, itech8_state, init_slikshot, ROT90, "Grand Products/Incredible Technologies", "Slick Shot (V1.7)", MACHINE_MECHANICAL ) +GAME( 1990, slikshot16, slikshot, slikshot_hi, slikshot, itech8_state, init_slikshot, ROT90, "Grand Products/Incredible Technologies", "Slick Shot (V1.6)", MACHINE_MECHANICAL ) +GAME( 1990, dynobop, 0, slikshot_hi, dynobop, itech8_state, init_slikshot, ROT90, "Grand Products/Incredible Technologies", "Dyno Bop (V1.1)", MACHINE_MECHANICAL ) +GAME( 1990, sstrike, 0, sstrike, sstrike, itech8_state, empty_init, ROT270, "Strata/Incredible Technologies", "Super Strike Bowling (V1)", MACHINE_MECHANICAL ) +GAME( 1990, stratabs, stratab, sstrike, stratabs, itech8_state, empty_init, ROT270, "Strata/Incredible Technologies", "Strata Bowling (V1 4T, Super Strike Bowling type PCB)", MACHINE_NOT_WORKING ) // need to figure out the control hookup for this set, service mode indicates it's still a trackball like stratab +GAME( 1991, pokrdice, 0, slikshot_lo_noz80, pokrdice, itech8_state, empty_init, ROT90, "Strata/Incredible Technologies", "Poker Dice", 0 ) /* Hot Shots Tennis-style PCB */ -GAME( 1990, hstennis, 0, hstennis_hi, hstennis, itech8_state, init_hstennis, ROT90, "Strata/Incredible Technologies", "Hot Shots Tennis (V1.1)", 0 ) -GAME( 1990, hstennis10, hstennis, hstennis_hi, hstennis, itech8_state, init_hstennis, ROT90, "Strata/Incredible Technologies", "Hot Shots Tennis (V1.0)", 0 ) -GAME( 1991, arlingtn, 0, hstennis_hi, arlingtn, itech8_state, init_arligntn, ROT0, "Strata/Incredible Technologies", "Arlington Horse Racing (v1.21-D)", 0 ) -GAME( 1991, peggle, 0, hstennis_lo, peggle, itech8_state, init_peggle, ROT90, "Strata/Incredible Technologies", "Peggle (Joystick, v1.0)", 0 ) -GAME( 1991, pegglet, peggle, hstennis_lo, pegglet, itech8_state, init_peggle, ROT90, "Strata/Incredible Technologies", "Peggle (Trackball, v1.0)", 0 ) -GAME( 1992, neckneck, 0, hstennis_lo, neckneck, itech8_state, init_neckneck, ROT0, "Bundra Games/Incredible Technologies", "Neck-n-Neck (v1.2)", 0 ) +GAME( 1990, hstennis, 0, hstennis_hi, hstennis, itech8_state, init_hstennis, ROT90, "Strata/Incredible Technologies", "Hot Shots Tennis (V1.1)", 0 ) +GAME( 1990, hstennis10, hstennis, hstennis_hi, hstennis, itech8_state, init_hstennis, ROT90, "Strata/Incredible Technologies", "Hot Shots Tennis (V1.0)", 0 ) +GAME( 1991, arlingtn, 0, hstennis_hi, arlingtn, itech8_state, init_arligntn, ROT0, "Strata/Incredible Technologies", "Arlington Horse Racing (v1.21-D)", 0 ) +GAME( 1991, peggle, 0, hstennis_lo, peggle, itech8_state, init_peggle, ROT90, "Strata/Incredible Technologies", "Peggle (Joystick, v1.0)", 0 ) +GAME( 1991, pegglet, peggle, hstennis_lo, pegglet, itech8_state, init_peggle, ROT90, "Strata/Incredible Technologies", "Peggle (Trackball, v1.0)", 0 ) +GAME( 1992, neckneck, 0, hstennis_lo, neckneck, itech8_state, init_neckneck, ROT0, "Bundra Games/Incredible Technologies", "Neck-n-Neck (v1.2)", 0 ) /* Rim Rockin' Basketball-style PCB */ -GAME( 1991, rimrockn, 0, rimrockn, rimrockn, itech8_state, init_rimrockn, ROT0, "Strata/Incredible Technologies", "Rim Rockin' Basketball (V2.2)", 0 ) -GAME( 1991, rimrockn20, rimrockn, rimrockn, rimrockn, itech8_state, init_rimrockn, ROT0, "Strata/Incredible Technologies", "Rim Rockin' Basketball (V2.0)", 0 ) -GAME( 1991, rimrockn16, rimrockn, rimrockn, rimrockn, itech8_state, init_rimrockn, ROT0, "Strata/Incredible Technologies", "Rim Rockin' Basketball (V1.6)", 0 ) -GAME( 1991, rimrockn12, rimrockn, rimrockn, rimrockn, itech8_state, init_rimrockn, ROT0, "Strata/Incredible Technologies", "Rim Rockin' Basketball (V1.2)", 0 ) +GAME( 1991, rimrockn, 0, rimrockn, rimrockn, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Rim Rockin' Basketball (V2.2)", 0 ) +GAME( 1991, rimrockn20, rimrockn, rimrockn, rimrockn, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Rim Rockin' Basketball (V2.0)", 0 ) +GAME( 1991, rimrockn16, rimrockn, rimrockn, rimrockn, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Rim Rockin' Basketball (V1.6)", 0 ) +GAME( 1991, rimrockn12, rimrockn, rimrockn, rimrockn, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Rim Rockin' Basketball (V1.2)", 0 ) +GAME( 1991, rimrockn12b, rimrockn, rimrockn, rimrockn, itech8_state, empty_init, ROT0, "bootleg", "Rim Rockin' Basketball (V1.2, bootleg)", 0 ) /* Ninja Clowns-style PCB */ -GAME( 1991, ninclown, 0, ninclown, ninclown, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Ninja Clowns (27 oct 91)", 0 ) +GAME( 1991, ninclown, 0, ninclown, ninclown, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Ninja Clowns (27 oct 91)", 0 ) /* Golden Tee Golf II-style PCB */ -GAME( 1992, gpgolf, 0, gtg2, gpgolf, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Par Golf (Joystick, V1.1)", 0 ) -GAME( 1992, gtg2, 0, gtg2, gtg2, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf II (Trackball, V2.2)", 0 ) +GAME( 1992, gpgolf, 0, gtg2, gpgolf, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Par Golf (Joystick, V1.1)", 0 ) +GAME( 1992, gtg2, 0, gtg2, gtg2, itech8_state, init_invbank, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf II (Trackball, V2.2)", 0 ) diff --git a/src/mame/drivers/itgamble.cpp b/src/mame/drivers/itgamble.cpp index 12b225a8237..2c078d4342b 100644 --- a/src/mame/drivers/itgamble.cpp +++ b/src/mame/drivers/itgamble.cpp @@ -16,33 +16,68 @@ --- Hardware Notes --- - The hardware is normally composed by: - - - CPU: 1x H8/3048 (HD64F3048F16). - (128KB ROM; 4KB RAM) - - Sound: 1x AD-65 (OKI 6295) - 1x TDA2003 (audio amplifier). - - PLDs: 1x ispLSI2064-80LJ. - - Clock: 1x Xtal 30.000 MHz. - 1x Resonator ZTB1000J (1000 kHz) or similar. - - ROMs: 1x (up to) 27C2001 or similar (sound). - 2x or more 27C4001 or similar (graphics). - - Timekeeping: 1x Dallas DS1302 Trickle Charge Timekeeping Chip (optional). - - Connectors: 1x 28x2 edge connector. - 1x 12 legs connector. - 1x 24 legs female connector. - 1x 50 legs flat cable connector. - - Other: 1x battery. - 2x 12 DIP switches. - 2x trimmer. +There are at least 3 viariants for this hardware. + +--------- +The oldest revision (green) is marked H83048 with the following hardware: +(note that @IC2 is unpopulated) + CPU: + 1x H8/3048 (HD64F3048F16) @IC1 + (128KB ROM; 4KB RAM) + Sound: + 1x OKI 6295 or clones @IC24 + 1x LM358N dual operational amplifier @IC27 + 1x TDA2003 audio amplifier @IC26 + PLDs: + 1x ispLSI2064-80LJ @IC12 + Clock: + 1x Xtal 30.000 MHz @OSC1 + 1x Resonator ZTB1000J (1000 kHz) @X1 + ROMs: + 1x 27C010 or 27C020 (sound) @IC25 + 2x or 4x 27C040 (graphics) @IC17,18,19,20 + RAMs: + 2x SRAM 32k x 8 @IC13,14 + Connectors: + 1x 28x2 edge connector + 1x 12 legs connector @CN1 + 1x 50 legs flat cable connector @CN4 + Other: + 1x battery @BAT1 + 1x 12 DIP switches bank @CN2,3 + 2x trimmer (VOLUME, SPARK) @P1,2 + +Known games on this hardware revision are: +200x Book Theatre (ver 1.2) +2000.04.12 Capitan Uncino (Ver 1.2) +2001.02 Capitani Coraggiosi (Ver 1.3) + +--------- +A slightly newer revision (green) is marked H83048 and adds a very small piggyback @IC2 with: + + Timekeeping: 1x Dallas DS1302 Trickle Charge Timekeeping Chip + Clock: 1x Xtal 32.768 + A jumper cable connects the piggyback with ICL7673 pin2 @IC31 Automatic battery back-up switch + +Known games on this hardware revision are: +2001 Europa 2002 (Ver 2.0, set 1) +2001 Europa 2002 (Ver 2.0, set 2) +2002.01 La Perla Nera (Ver 2.0) +2001.11 La Perla Nera Gold (Ver 2.0) +2001.06 Labyrinth (Versione 1.5) +200x Pin Ups (Ver 1.0 Rev.A) +2001.12 World Cup (Ver 1.4) - note ICs location are differently numbered +2001 World Cup (Ver 1.5) - note RAMS are smaller SRAM 8k x 8 + + +--------- +A more recent revision (red) is marked H83048 Rev 1.1 and removes the piggyback putting Timekeeping and Clock (X2) directly on the board. + A jumper cable on the solder side connects Timekeeping pin5 to unpopulated IC2 pin11 + +Known games on this hardware revision are: +2001.08.24 Abacus (Ver 1.0) +2002 Europa 2002 Space (Ver 3.0) +2002.12 UFO Robot (Ver. 1.0 Rev.A) *******************************************************************/ @@ -266,36 +301,30 @@ MACHINE_CONFIG_END * Rom Load * *************************/ -/* Capitan Uncino (Ver 1.2) - -CPU: - -1x HD64F3048F16 (main)(ic1) -1x ispLSI2064-80LJ (ic12) -1x AD-65 (equivalent to M6295) (ic24)(sound) -1x oscillator 30.00MHz (close to main) -1x blu resonator 1000J (close to sound) - -ROMs: - -1x M27C2001 (1) -2x M27C4001 (2,3) - -Note: +/* Book Theatre (ver 1.2) +PCB is marked: "CE H83048" on component side +PCB is marked: "H83048 bottom" on solder side +PCB is labeled: "BOOK THEATER Vers. 1.2" on component side +*/ +ROM_START( bookthr ) + ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ + ROM_LOAD( "bookthr_ver1.2_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) -1x 28x2 edge connector -1x 12 legs connector -1x 50 legs flat cable connector -1x 12x2 jumpers -1x trimmer (volume) -1x trimmer (spark) + ROM_REGION( 0x100000, "gfx1", 0 ) //bigger than 8bpps? + ROM_LOAD( "2.ic18", 0x000000, 0x80000, CRC(39433a74) SHA1(088944bfb43b4f239f22d0d2213efd19cea7db30) ) + ROM_LOAD( "3.ic17", 0x080000, 0x80000, CRC(893abdcc) SHA1(4dd28fd46bec8be5549d679d31c771888fcb1286) ) --------------------- + ROM_REGION( 0x40000, "oki", 0 ) /* M6295 samples */ + ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(4fe79e43) SHA1(7c154cb00e9b64fbdcc218280f2183b816cef20b) ) //same as Abacus +ROM_END +/* Capitan Uncino (Ver 1.2) +PCB is marked: "CE H83048" on component side +PCB is marked: "ET5" and "H83048 bottom" on solder side +PCB is labeled: "Capitan Uncino Vers. 1.3" and " PASSED 12/04/00" on component side +-- PCB is labeled Ver 1.3, while EPROMs are labeled Ver 1.2 - */ - ROM_START( capunc ) ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ ROM_LOAD( "capunc.ver1.2.mcu", 0x00000, 0x4000, NO_DUMP ) @@ -308,42 +337,11 @@ ROM_START( capunc ) ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(4fe79e43) SHA1(7c154cb00e9b64fbdcc218280f2183b816cef20b) ) ROM_END - /* Capitani Coraggiosi (Ver 1.3) - -CPU: - -1x HD64F3048F16 (main)(ic1) -1x ispLSI2064-80LJ (ic12) -1x AD-65 (equivalent to M6295) (ic24)(sound) -1x oscillator 30MHz (close to main) -1x orange resonator ZTB1000J (close to sound) - -ROMs: - -1x M27C2001 (1) -2x M27C4001 (2,3) - -Note: - -1x 28x2 edge connector -1x 12 legs connector -1x 50 legs flat cable connector -1x 12x2 switches dip -1x trimmer (volume) -1x trimmer (spark) - - -The differences between this set and the alternate one, are only 4 bytes -in the samples ROM header. Replaced the sound ROM with the clean one. - -3 and 3 files -2.ic18 2.ic18 IDENTICAL -3.ic17 3.ic17 IDENTICAL -1.ic25 1.ic25 99.998474% - +PCB is marked: "CE H83048" on component side +PCB is marked: "H83048 bottom" on solder side +PCB is labeled: "Capitani Coraggiosi Vers. 1.3" and "PASSED 02/2001" on component side */ - ROM_START( capcor ) ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ ROM_LOAD( "capcor.ver1.3.mcu", 0x00000, 0x4000, NO_DUMP ) @@ -356,120 +354,11 @@ ROM_START( capcor ) ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(4fe79e43) SHA1(7c154cb00e9b64fbdcc218280f2183b816cef20b) ) ROM_END - -/* La Perla Nera (Ver 2.0) - -CPU: - -1x HD64F3048F16 (main)(ic1) -1x ispLSI2064-80LJ (ic12) -1x AD-65 (equivalent to M6295) (ic24)(sound) -1x oscillator 30.00MHz (close to main) -1x red resonator ZTB1000J (close to sound) - -ROMs: - -1x M27C2001 (1) -2x M27C4001 (2,3) - -Note: - -1x 28x2 edge connector -1x 12 legs connector -1x 50 legs flat cable connector -1x 12x2 jumper -1x trimmer (volume) -1x trimmer (spark) - -*/ - -ROM_START( laperla ) - ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ - ROM_LOAD( "laperla_ver2.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) - - ROM_REGION( 0x100000, "gfx1", 0 ) - ROM_LOAD( "2jolly.ic18", 0x000000, 0x80000, CRC(7bf3d5f2) SHA1(f3a51dd642358a20f6324f28fdf458e8ceaca7a1) ) - ROM_LOAD( "3jolly.ic17", 0x080000, 0x80000, CRC(c3a8d9a0) SHA1(cc95c56ebc6137e11c82ed17be7c9f83ed7b6cfc) ) - - ROM_REGION( 0x40000, "oki", 0 ) /* M6295 samples */ - ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(4fe79e43) SHA1(7c154cb00e9b64fbdcc218280f2183b816cef20b) ) -ROM_END - - -/* La Perla Nera Gold (Ver 2.0) - -CPU: - -1x HD64F3048F16 (main)(ic1) -1x ispLSI2064-80LJ (ic12) -1x AD-65 (equivalent to M6295) (ic24)(sound) -1x oscillator 30.00MHz (close to main) -1x red resonator ZTB1000J (close to sound) - -ROMs: - -1x M27C2001 (1) -2x M27C4001 (2,3) - -Note: - -1x 28x2 edge connector -1x 12 legs connector -1x 50 legs flat cable connector -1x 12x2 jumper -1x trimmer (volume) -1x trimmer (spark) - ---------------------------------------------- - -laperla vs. laperlag - -3 and 3 files -3jolly.ic17 ic17-laperlanera 11.018181% -2jolly.ic18 ic18-laperlanera 10.766602% -1.ic25 NO MATCH - ic25-uno.bin NO MATCH -*/ - -ROM_START( laperlag ) - ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ - ROM_LOAD( "laperlag_ver2.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) - - ROM_REGION( 0x100000, "gfx1", 0 ) - ROM_LOAD( "ic18-laperlaneragold2.bin", 0x000000, 0x80000, CRC(ae37de44) SHA1(089f97678fa39aee1885d7c63c4bc7c88e7fe553) ) - ROM_LOAD( "ic17-laperlaneragold3.bin", 0x080000, 0x80000, CRC(86da6d11) SHA1(e6b7f9ccbf2e91a60fdf38067ec7ac7e73dea8cd) ) - - ROM_REGION( 0x40000, "oki", 0 ) /* M6295 samples */ - ROM_LOAD( "ic25-uno.bin", 0x00000, 0x20000, CRC(e6a0854b) SHA1(394e01bb24abd1e0d2c447b4d620fc5d02257d8a) ) -ROM_END - - /* Europa 2002 (Ver 2.0, set 1) - -CPU: - -1x HD64F3048F16 (main)(ic1) -1x ispLSI2064-80LJ (ic12) -1x AD-65 (equivalent to M6295) (ic24)(sound) -1x oscillator 30MHz (close to main) -1x blu resonator 1000J (close to sound) - -ROMs: - -3x M27C2001 (1,2,3) -2x M27C4001 (4,5) - -Note: - -1x 28x2 edge connector -1x 12 legs connector -1x 50 legs flat cable connector -1x 12x2 switches dip -1x trimmer (volume) -1x trimmer (spark) - +PCB is marked: "CE H83048" on component side +PCB is marked: "H83048 bottom" on solder side +PCB is labeled: "EUROPA 2002 Versione 2_0" and "Non rimuovere PASSED 11/2001 Garanzia 6 MESI" on component side */ - ROM_START( euro2k2 ) ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ ROM_LOAD( "euro2k2_ver2.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) @@ -484,47 +373,11 @@ ROM_START( euro2k2 ) ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(b9b1aff0) SHA1(35622d7d099a10e5c6bcae152fded1f50692f740) ) ROM_END - /* Europa 2002 (Ver 2.0, set 2) - -CPU: - -1x HD64F3048F16 (main)(ic1) -1x ispLSI2064-80LJ (ic12) -1x U6295 (equivalent to M6295) (ic24)(sound) -1x oscillator 30.00MHz (close to main) -1x orange resonator ZTB1000J (close to sound) - -ROMs: - -2x M27C2001 (1,2) -3x M27C4001 (3,4,5) - -Note: - -1x 28x2 edge connector -1x 12 legs connector -1x 50 legs flat cable connector -1x 12x2 switches dip -1x trimmer (volume) -1x trimmer (spark) - ---------------------------------------- - -euro2k2 vs. euro2k2a - -5 and 5 files -4a.ic18 FIXED BITS (xxxxxxx0) - 3a.ic19 1ST AND 2ND HALF IDENTICAL - 4a.ic18 FIXED BITS (xxxxxxx0) -2a.ic20 2a.ic20 IDENTICAL -4a.ic18 4a.ic18 IDENTICAL -5a.ic17 5a.ic17 IDENTICAL -1.ic25 1.ic25 99.998474% -3a.ic19 NO MATCH - 3a.ic19 NO MATCH +PCB is marked: "CE H83048" on component side +PCB is marked: "H83048 bottom" on solder side +PCB is labeled: "EUROPA 2002 Versione 2_0" and "PASSED 10/2001" on component side */ - ROM_START( euro2k2a ) ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ ROM_LOAD( "euro2k2a_ver2.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) @@ -539,80 +392,85 @@ ROM_START( euro2k2a ) ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(4fe79e43) SHA1(7c154cb00e9b64fbdcc218280f2183b816cef20b) ) // sldh ROM_END +/* La Perla Nera (Ver 2.0) +PCB is marked: "CE H83048" on component side +PCB is marked: "H83048 bottom" on solder side +PCB is labeled: "LA PERLA NERA Versione 2.0" and "Non Rimuovere PASSED 01/2002 garanzia 6 MESI" on component side +*/ +ROM_START( laperla ) + ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ + ROM_LOAD( "laperla_ver2.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) -/* Europa 2002 Space (Ver 3.0) + ROM_REGION( 0x100000, "gfx1", 0 ) + ROM_LOAD( "2jolly.ic18", 0x000000, 0x80000, CRC(7bf3d5f2) SHA1(f3a51dd642358a20f6324f28fdf458e8ceaca7a1) ) + ROM_LOAD( "3jolly.ic17", 0x080000, 0x80000, CRC(c3a8d9a0) SHA1(cc95c56ebc6137e11c82ed17be7c9f83ed7b6cfc) ) -Year: 2002 -Company: Nazionale Elettronica + ROM_REGION( 0x40000, "oki", 0 ) /* M6295 samples */ + ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(4fe79e43) SHA1(7c154cb00e9b64fbdcc218280f2183b816cef20b) ) +ROM_END -CPU: -1x HD64F3048F16 (main)(ic1) -1x ispLSI2064-80LJ (ic12) -1x U6295 (equivalent to M6295) (ic24)(sound) -1x TDA2003 (sound)(ic26) -1x LM358N (sound)(ic27) -1x oscillator 30MHz (close to main)(osc1) -1x blue resonator (close to sound) (x1) +/* La Perla Nera Gold (Ver 2.0) +PCB is marked: "CE H83048" on component side +PCB is marked: "H83048 bottom" on solder side +PCB is labeled: "LA PERLA NERA GOLD Versione 2.0" and "Non Rimuovere PASSED 11/2001 garanzia 6 MESI" on component side +*/ +ROM_START( laperlag ) + ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ + ROM_LOAD( "laperlag_ver2.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) -ROMs: + ROM_REGION( 0x100000, "gfx1", 0 ) + ROM_LOAD( "ic18-laperlaneragold2.bin", 0x000000, 0x80000, CRC(ae37de44) SHA1(089f97678fa39aee1885d7c63c4bc7c88e7fe553) ) + ROM_LOAD( "ic17-laperlaneragold3.bin", 0x080000, 0x80000, CRC(86da6d11) SHA1(e6b7f9ccbf2e91a60fdf38067ec7ac7e73dea8cd) ) -1x MX27C1000 (1) -2x M27C2001 (2,3) -2x M27C4001 (4,5) + ROM_REGION( 0x40000, "oki", 0 ) /* M6295 samples */ + ROM_LOAD( "ic25-uno.bin", 0x00000, 0x20000, CRC(e6a0854b) SHA1(394e01bb24abd1e0d2c447b4d620fc5d02257d8a) ) +ROM_END -Note: +/* World Cup (Ver 1.5) +PCB is marked: "CE H83048" on component side +PCB is marked: "H83048 bottom" on solder side +PCB is labeled: "WORLD CUP Versione 1.5" on component side +--- +It is the same game as World Cup (Ver 1.4) but with less RAM +*/ +ROM_START( wcup ) + ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ + ROM_LOAD( "wcup_ver1.5_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) -1x 28x2 edge connector -1x 12 legs connector -1x 50 legs flat cable connector -1x trimmer (volume) -1x trimmer (spark) + ROM_REGION( 0x100000, "gfx1", 0 ) //bigger than 8bpps? + ROM_LOAD( "world cup 2.ic18", 0x000000, 0x80000, CRC(4524445b) SHA1(50ec31ac9e4cd807fd4bf3d667644ed662681782) ) + ROM_LOAD( "world cup 3.ic17", 0x080000, 0x80000, CRC(0df1af40) SHA1(f5050533e5a9cf2113e5aeffaeca23c7572cafae) ) + ROM_REGION( 0x40000, "oki", 0 ) /* M6295 samples */ + ROM_LOAD( "1.ic25", 0x00000, 0x20000, CRC(e6a0854b) SHA1(394e01bb24abd1e0d2c447b4d620fc5d02257d8a) ) // same as laperlag +ROM_END + +/* World Cup (Ver 1.4) +PCB is marked: "CE ND2001" on component side +PCB is marked: "ND2001 Rev. 1.0" and "bottom" on solder side +PCB is labeled: "WORLD CUP Versione 1.4" and "Non Rimuovere PASSED 12/2001 Garanzia 6 MESI" on component side +--- +It is the same game as World Cup (Ver 1.5) but ICs location are numbered differently due to a different PCB layout */ -ROM_START( euro2k2s ) +ROM_START( wcup14 ) ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ - ROM_LOAD( "euro2k2s_ver3.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) + ROM_LOAD( "wcup_ver1.4_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) - ROM_REGION( 0x180000, "gfx1", 0 ) - ROM_LOAD( "europa2002space4.ic18", 0x000000, 0x80000, CRC(cf4db4f1) SHA1(6c03e54e30eb83778d1cad5ade17c26a370ea8a3) ) - ROM_LOAD( "europa2002space5.ic17", 0x080000, 0x80000, CRC(1070b4ac) SHA1(3492de52cd0c784479d2774f6050b24cf4591484) ) - ROM_LOAD( "europa2002_2-a.ic20", 0x100000, 0x40000, CRC(971bc33b) SHA1(c385e5bef57cdb52a86c1e38fca471ef5ab3da7c) ) - ROM_LOAD( "europa2002space3.ic19", 0x140000, 0x40000, CRC(d82dba04) SHA1(63d407dd036d3c7f190ad7b6d694288e9a9e56d0) ) /* identical halves */ + ROM_REGION( 0x100000, "gfx1", 0 ) //bigger than 8bpps? + ROM_LOAD( "world cup 2.ic18", 0x000000, 0x80000, CRC(4524445b) SHA1(50ec31ac9e4cd807fd4bf3d667644ed662681782) ) + ROM_LOAD( "world cup 3.ic17", 0x080000, 0x80000, CRC(0df1af40) SHA1(f5050533e5a9cf2113e5aeffaeca23c7572cafae) ) ROM_REGION( 0x40000, "oki", 0 ) /* M6295 samples */ - ROM_LOAD( "1-a.ic25", 0x00000, 0x20000, CRC(8fcb283d) SHA1(9e95c72967da13606eed6d16f84145273b9ffddf) ) + ROM_LOAD( "1.ic25", 0x00000, 0x20000, CRC(e6a0854b) SHA1(394e01bb24abd1e0d2c447b4d620fc5d02257d8a) ) // same as laperlag ROM_END -/* - -CPUs -1x H8/3048 ic1 16-bit Single-Chip Microcomputer - main (internal ROM not dumped) -1x AD-65 ic24 4-Channel Mixing ADCPM Voice Synthesis LSI - sound -1x LM358N ic27 Dual Operational Amplifier - sound -1x TDA2003 ic26 Audio Amplifier - sound -1x oscillator 30.000MHz osc1 -1x blu resonator 1000J x1 -1x oscillator KDS0D x2 -ROMs -1x W27C020 1 dumped -2x M27C4001 2,3 dumped -RAMs -2x LST62832I-70LL-10L ic13,ic14 -PLDs -1x ispLSI2064-80LJ ic12 not dumped - -Others -1x 28x2 edge connector -1x 50 pins flat cable connector (CN4) -1x 12 legs connector (CN1) -2x trimmer (volume,spark) -1x 12x2 switches DIP -1x battery 3.6V - +/* Abacus (Ver 1.0) +PCB is marked: "CE H83048" on component side +PCB is marked: "bottom" and "H83048 Rev. 1.1" on solder side +PCB is labeled: "ABACUS Vers. 1.0" and "FR 24.08.01" on component side */ - ROM_START( abacus ) ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ ROM_LOAD( "abacus_ver1.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) @@ -625,43 +483,24 @@ ROM_START( abacus ) ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(4fe79e43) SHA1(7c154cb00e9b64fbdcc218280f2183b816cef20b) ) ROM_END -/* - -CPUs -1x H8/3048 ic1 16-bit Single-Chip Microcomputer - main (internal ROM not dumped) -1x AD-65 ic24 4-Channel Mixing ADCPM Voice Synthesis LSI - sound -1x LM358N ic27 Dual Operational Amplifier - sound -1x TDA2003 ic26 Audio Amplifier - sound -1x oscillator 30.000MHz osc1 -1x red resonator ZTB1000J x1 -ROMs -1x W27C020 1 dumped -2x M27C4001 2,3 dumped -RAMs -2x MB8464C-10L ic13,ic14 -PLDs -1x ispLSI2064-80LJ ic12 not dumped - -Others -1x 28x2 edge connector -1x 50 pins flat cable connector (CN4) -1x 12 legs connector (CN1) -2x trimmer (volume,spark) -1x 12x2 switches DIP -1x battery 3V +/* Europa 2002 Space (Ver 3.0) +PCB is marked: "CE H83048" on component side +PCB is marked: "bottom" and "H83048 Rev. 1.1" on solder side +PCB is labeled: "EUROPA 2002 SPACE Ver. 3.0" and "Non rimuovere PASSED 04/2002 Garanzia 6 MESI" on component side */ - -ROM_START( bookthr ) +ROM_START( euro2k2s ) ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ - ROM_LOAD( "bookthr_ver1.2_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) + ROM_LOAD( "euro2k2s_ver3.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) - ROM_REGION( 0x100000, "gfx1", 0 ) //bigger than 8bpps? - ROM_LOAD( "2.ic18", 0x000000, 0x80000, CRC(39433a74) SHA1(088944bfb43b4f239f22d0d2213efd19cea7db30) ) - ROM_LOAD( "3.ic17", 0x080000, 0x80000, CRC(893abdcc) SHA1(4dd28fd46bec8be5549d679d31c771888fcb1286) ) + ROM_REGION( 0x180000, "gfx1", 0 ) + ROM_LOAD( "europa2002space4.ic18", 0x000000, 0x80000, CRC(cf4db4f1) SHA1(6c03e54e30eb83778d1cad5ade17c26a370ea8a3) ) + ROM_LOAD( "europa2002space5.ic17", 0x080000, 0x80000, CRC(1070b4ac) SHA1(3492de52cd0c784479d2774f6050b24cf4591484) ) + ROM_LOAD( "europa2002_2-a.ic20", 0x100000, 0x40000, CRC(971bc33b) SHA1(c385e5bef57cdb52a86c1e38fca471ef5ab3da7c) ) + ROM_LOAD( "europa2002space3.ic19", 0x140000, 0x40000, CRC(d82dba04) SHA1(63d407dd036d3c7f190ad7b6d694288e9a9e56d0) ) /* identical halves */ ROM_REGION( 0x40000, "oki", 0 ) /* M6295 samples */ - ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(4fe79e43) SHA1(7c154cb00e9b64fbdcc218280f2183b816cef20b) ) //same as Abacus + ROM_LOAD( "1-a.ic25", 0x00000, 0x20000, CRC(8fcb283d) SHA1(9e95c72967da13606eed6d16f84145273b9ffddf) ) ROM_END /********** DIFFERENT HARDWARE **********/ @@ -712,15 +551,22 @@ ROM_END *************************/ // YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS +/* hardware green H83048*/ +GAME( 200?, bookthr, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "Book Theatre (Ver 1.2)", MACHINE_IS_SKELETON ) GAME( 2000, capunc, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "Capitan Uncino (Ver 1.2)", MACHINE_IS_SKELETON ) GAME( 2001, capcor, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "Capitani Coraggiosi (Ver 1.3)", MACHINE_IS_SKELETON ) -GAME( 2002, laperla, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "La Perla Nera (Ver 2.0)", MACHINE_IS_SKELETON ) -GAME( 2001, laperlag, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "La Perla Nera Gold (Ver 2.0)", MACHINE_IS_SKELETON ) + +/* hardware green H83048 + piggyback for timekeeping*/ GAME( 2001, euro2k2, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "Europa 2002 (Ver 2.0, set 1)", MACHINE_IS_SKELETON ) GAME( 2001, euro2k2a, euro2k2, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "Europa 2002 (Ver 2.0, set 2)", MACHINE_IS_SKELETON ) +GAME( 2002, laperla, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "La Perla Nera (Ver 2.0)", MACHINE_IS_SKELETON ) +GAME( 2001, laperlag, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "La Perla Nera Gold (Ver 2.0)", MACHINE_IS_SKELETON ) +GAME( 2001, wcup, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "World Cup (Ver 1.5)", MACHINE_IS_SKELETON ) +GAME( 2001, wcup14, wcup, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "World Cup (Ver 1.4)", MACHINE_IS_SKELETON ) + +/* hardware red H83048 Rev 1.1 + timekeeping on board*/ +GAME( 2001, abacus, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "Abacus (Ver 1.0)", MACHINE_IS_SKELETON ) GAME( 2002, euro2k2s, euro2k2, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "Europa 2002 Space (Ver 3.0)", MACHINE_IS_SKELETON ) -GAME( 200?, abacus, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "<unknown>", "Abacus (Ver 1.0)", MACHINE_IS_SKELETON ) -GAME( 200?, bookthr, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "<unknown>", "Book Theatre (Ver 1.2)", MACHINE_IS_SKELETON ) /* different hardware */ GAME( 2000, mnumber, 0, mnumber, itgamble, itgamble_state, empty_init, ROT0, "MM / BRL Bologna", "Mystery Number", MACHINE_IS_SKELETON ) diff --git a/src/mame/drivers/jazz.cpp b/src/mame/drivers/jazz.cpp index 14b9d0876dc..fbf1669a576 100644 --- a/src/mame/drivers/jazz.cpp +++ b/src/mame/drivers/jazz.cpp @@ -153,8 +153,8 @@ void jazz_state::jazz(machine_config &config) // pc keyboard controller? pc_kbdc_device &kbdc(PC_KBDC(config, "pc_kbdc", 0)); - kbdc.out_clock_cb().set(m_kbdc, FUNC(at_keyboard_controller_device::keyboard_clock_w)); - kbdc.out_data_cb().set(m_kbdc, FUNC(at_keyboard_controller_device::keyboard_data_w)); + kbdc.out_clock_cb().set(m_kbdc, FUNC(at_keyboard_controller_device::kbd_clk_w)); + kbdc.out_data_cb().set(m_kbdc, FUNC(at_keyboard_controller_device::kbd_data_w)); // keyboard port pc_kbdc_slot_device &kbd(PC_KBDC_SLOT(config, "kbd", 0)); @@ -164,9 +164,9 @@ void jazz_state::jazz(machine_config &config) // at keyboard controller AT_KEYBOARD_CONTROLLER(config, m_kbdc, 12_MHz_XTAL); - m_kbdc->system_reset_cb().set_inputline(m_maincpu, INPUT_LINE_RESET); - m_kbdc->keyboard_clock_cb().set(kbdc, FUNC(pc_kbdc_device::clock_write_from_mb)); - m_kbdc->keyboard_data_cb().set(kbdc, FUNC(pc_kbdc_device::data_write_from_mb)); + m_kbdc->hot_res().set_inputline(m_maincpu, INPUT_LINE_RESET); + m_kbdc->kbd_clk().set(kbdc, FUNC(pc_kbdc_device::clock_write_from_mb)); + m_kbdc->kbd_data().set(kbdc, FUNC(pc_kbdc_device::data_write_from_mb)); G364(config, m_ramdac, 0); } diff --git a/src/mame/drivers/kdt6.cpp b/src/mame/drivers/kdt6.cpp index dcd91a68ccb..0d60a88380c 100644 --- a/src/mame/drivers/kdt6.cpp +++ b/src/mame/drivers/kdt6.cpp @@ -705,11 +705,11 @@ MACHINE_CONFIG_START(kdt6_state::psi98) INPUT_BUFFER(config, "cent_data_in"); MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics") - MCFG_UPD1990A_ADD("rtc", XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); - MCFG_UPD765A_ADD("fdc", true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE("ctc1", z80ctc_device, trg0)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, kdt6_state, fdc_drq_w)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set("ctc1", FUNC(z80ctc_device::trg0)); + m_fdc->drq_wr_callback().set(FUNC(kdt6_state::fdc_drq_w)); MCFG_FLOPPY_DRIVE_ADD("fdc:0", kdt6_floppies, "fd55f", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("fdc:1", kdt6_floppies, "fd55f", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/konamigv.cpp b/src/mame/drivers/konamigv.cpp index 1d126a06536..858e6becf38 100644 --- a/src/mame/drivers/konamigv.cpp +++ b/src/mame/drivers/konamigv.cpp @@ -229,8 +229,8 @@ void konamigv_state::btchamp_map(address_map &map) konamigv_map(map); map(0x1f380000, 0x1f3fffff).rw("flash", FUNC(intelfsh16_device::read), FUNC(intelfsh16_device::write)); - map(0x1f680080, 0x1f680087).r("upd1", FUNC(upd4701_device::read_xy)).umask32(0xff00ff00); - map(0x1f680080, 0x1f680087).r("upd2", FUNC(upd4701_device::read_xy)).umask32(0x00ff00ff); + map(0x1f680080, 0x1f680087).r(m_btc_trackball[0], FUNC(upd4701_device::read_xy)).umask32(0xff00ff00); + map(0x1f680080, 0x1f680087).r(m_btc_trackball[1], FUNC(upd4701_device::read_xy)).umask32(0x00ff00ff); map(0x1f680088, 0x1f680089).w(FUNC(konamigv_state::btc_trackball_w)); map(0x1f6800e0, 0x1f6800e3).nopw(); } @@ -518,9 +518,9 @@ MACHINE_CONFIG_START(simpbowl_state::simpbowl) FUJITSU_29F016A(config, "flash2"); FUJITSU_29F016A(config, "flash3"); - MCFG_DEVICE_ADD("upd", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACK0_X") - MCFG_UPD4701_PORTY("TRACK0_Y") + upd4701_device &upd(UPD4701A(config, "upd")); + upd.set_portx_tag("TRACK0_X"); + upd.set_porty_tag("TRACK0_Y"); MACHINE_CONFIG_END static INPUT_PORTS_START( simpbowl ) @@ -555,13 +555,13 @@ MACHINE_CONFIG_START(konamigv_state::btchamp) SHARP_LH28F400(config, "flash"); - MCFG_DEVICE_ADD("upd1", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACK0_X") - MCFG_UPD4701_PORTY("TRACK0_Y") + UPD4701A(config, m_btc_trackball[0]); + m_btc_trackball[0]->set_portx_tag("TRACK0_X"); + m_btc_trackball[0]->set_porty_tag("TRACK0_Y"); - MCFG_DEVICE_ADD("upd2", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACK1_X") - MCFG_UPD4701_PORTY("TRACK1_Y") + UPD4701A(config, m_btc_trackball[1]); + m_btc_trackball[1]->set_portx_tag("TRACK1_X"); + m_btc_trackball[1]->set_porty_tag("TRACK1_Y"); MACHINE_CONFIG_END static INPUT_PORTS_START( btchamp ) diff --git a/src/mame/drivers/ksys573.cpp b/src/mame/drivers/ksys573.cpp index b937fcd8a44..f033f6ff45f 100644 --- a/src/mame/drivers/ksys573.cpp +++ b/src/mame/drivers/ksys573.cpp @@ -2240,10 +2240,11 @@ MACHINE_CONFIG_END // Dance Dance Revolution -MACHINE_CONFIG_START(ksys573_state::ddr) +void ksys573_state::ddr(machine_config &config) +{ k573a(config); cassx(config); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(ksys573_state::ddr2ml) k573a(config); @@ -2290,16 +2291,18 @@ MACHINE_CONFIG_END // Dancing Stage -MACHINE_CONFIG_START(ksys573_state::dsfdcta) +void ksys573_state::dsfdcta(machine_config &config) +{ k573a(config); pccard2_32mb(config); cassyyi(config); -MACHINE_CONFIG_END +} -MACHINE_CONFIG_START(ksys573_state::dsftkd) +void ksys573_state::dsftkd(machine_config &config) +{ k573a(config); cassyi(config); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(ksys573_state::dsfdr) k573d(config); @@ -2346,10 +2349,11 @@ MACHINE_CONFIG_END // DrumMania -MACHINE_CONFIG_START(ksys573_state::drmn) +void ksys573_state::drmn(machine_config &config) +{ k573a(config); cassx(config); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(ksys573_state::drmn2m) k573d(config); @@ -2371,34 +2375,39 @@ MACHINE_CONFIG_END // Guitar Freaks -MACHINE_CONFIG_START(ksys573_state::gtrfrks) +void ksys573_state::gtrfrks(machine_config &config) +{ k573a(config); cassx(config); -MACHINE_CONFIG_END +} -MACHINE_CONFIG_START(ksys573_state::gtrfrk2m) +void ksys573_state::gtrfrk2m(machine_config &config) +{ k573a(config); cassyi(config); pccard1_32mb(config); // HACK: The installation tries to check and erase 32mb but only flashes 16mb. -MACHINE_CONFIG_END +} -MACHINE_CONFIG_START(ksys573_state::gtrfrk3m) +void ksys573_state::gtrfrk3m(machine_config &config) +{ k573d(config); cassxzi(config); pccard1_16mb(config); -MACHINE_CONFIG_END +} -MACHINE_CONFIG_START(ksys573_state::gtrfrk5m) +void ksys573_state::gtrfrk5m(machine_config &config) +{ k573d(config); casszi(config); pccard1_32mb(config); -MACHINE_CONFIG_END +} -MACHINE_CONFIG_START(ksys573_state::gtrfrk7m) +void ksys573_state::gtrfrk7m(machine_config &config) +{ k573d(config); casszi(config); pccard1_32mb(config); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(ksys573_state::gtfrk10mb) gtrfrk7m(config); @@ -2407,20 +2416,22 @@ MACHINE_CONFIG_END // Miscellaneous -MACHINE_CONFIG_START(ksys573_state::konami573x) +void ksys573_state::konami573x(machine_config &config) +{ konami573(config); cassx(config); -MACHINE_CONFIG_END +} -MACHINE_CONFIG_START(ksys573_state::fbaitbc) +void ksys573_state::fbaitbc(machine_config & config) +{ konami573(config); m_maincpu->set_addrmap(AS_PROGRAM, &ksys573_state::fbaitbc_map); - MCFG_DEVICE_ADD(m_upd4701, UPD4701A, 0) - MCFG_UPD4701_PORTY("uPD4701_y") + UPD4701A(config, m_upd4701); + m_upd4701->set_porty_tag("uPD4701_y"); cassx(config); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(ksys573_state::hyperbbc) konami573(config); @@ -2446,11 +2457,12 @@ MACHINE_CONFIG_START(ksys573_state::salarymc) MCFG_SLOT_OPTION_MACHINE_CONFIG( "game", [this] (device_t *device) { salarymc_cassette_install(device); } ) MACHINE_CONFIG_END -MACHINE_CONFIG_START(ksys573_state::gchgchmp) +void ksys573_state::gchgchmp(machine_config &config) +{ konami573(config); pccard1_16mb(config); cassx(config); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(ksys573_state::pnchmn) konami573(config); @@ -2463,18 +2475,20 @@ MACHINE_CONFIG_START(ksys573_state::pnchmn) MCFG_SLOT_OPTION_MACHINE_CONFIG( "game", [this] (device_t *device) { punchmania_cassette_install(device); } ) MACHINE_CONFIG_END -MACHINE_CONFIG_START(ksys573_state::pnchmn2) +void ksys573_state::pnchmn2(machine_config &config) +{ pnchmn(config); pccard2_64mb(config); -MACHINE_CONFIG_END +} -MACHINE_CONFIG_START(ksys573_state::gunmania) +void ksys573_state::gunmania(machine_config &config) +{ konami573(config); m_maincpu->set_addrmap(AS_PROGRAM, &ksys573_state::gunmania_map); DS2401( config, "gunmania_id" ); pccard2_32mb(config); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(ksys573_state::dmx) k573d(config); diff --git a/src/mame/drivers/kyocera.cpp b/src/mame/drivers/kyocera.cpp index 6f1838c37fb..c8ad6c26c48 100644 --- a/src/mame/drivers/kyocera.cpp +++ b/src/mame/drivers/kyocera.cpp @@ -1347,7 +1347,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(tandy200_state::tandy200_tp_tick) MACHINE_CONFIG_START(kc85_state::kc85) /* basic machine hardware */ - MCFG_DEVICE_ADD(I8085_TAG, I8085A, XTAL(4'915'200)) + MCFG_DEVICE_ADD(m_maincpu, I8085A, XTAL(4'915'200)) MCFG_DEVICE_PROGRAM_MAP(kc85_mem) MCFG_DEVICE_IO_MAP(kc85_io) MCFG_I8085A_SID(READLINE(*this, kc85_state,kc85_sid_r)) @@ -1368,7 +1368,8 @@ MACHINE_CONFIG_START(kc85_state::kc85) i8155.in_pc_callback().set(FUNC(kc85_state::i8155_pc_r)); i8155.out_to_callback().set(FUNC(kc85_state::i8155_to_w)); - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, INPUTLINE(I8085_TAG, I8085_RST75_LINE)) + UPD1990A(config, m_rtc); + m_rtc->tp_callback().set_inputline(m_maincpu, I8085_RST75_LINE); IM6402(config, m_uart, 0, 0); m_uart->tro_callback().set(RS232_TAG, FUNC(rs232_port_device::write_txd)); @@ -1396,7 +1397,7 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(pc8201_state::pc8201) /* basic machine hardware */ - MCFG_DEVICE_ADD(I8085_TAG, I8085A, XTAL(4'915'200)) + MCFG_DEVICE_ADD(m_maincpu, I8085A, XTAL(4'915'200)) MCFG_DEVICE_PROGRAM_MAP(pc8201_mem) MCFG_DEVICE_IO_MAP(pc8201_io) MCFG_I8085A_SID(READLINE(*this, kc85_state,kc85_sid_r)) @@ -1417,7 +1418,8 @@ MACHINE_CONFIG_START(pc8201_state::pc8201) i8155.in_pc_callback().set(FUNC(kc85_state::i8155_pc_r)); i8155.out_to_callback().set(FUNC(kc85_state::i8155_to_w)); - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, INPUTLINE(I8085_TAG, I8085_RST75_LINE)) + UPD1990A(config, m_rtc); + m_rtc->tp_callback().set_inputline(m_maincpu, I8085_RST75_LINE); IM6402(config, m_uart, 0, 0); m_uart->tro_callback().set(RS232_TAG, FUNC(rs232_port_device::write_txd)); @@ -1455,7 +1457,7 @@ void pc8201_state::pc8300(machine_config &config) MACHINE_CONFIG_START(trsm100_state::trsm100) /* basic machine hardware */ - MCFG_DEVICE_ADD(I8085_TAG, I8085A, XTAL(4'915'200)) + MCFG_DEVICE_ADD(m_maincpu, I8085A, XTAL(4'915'200)) MCFG_DEVICE_PROGRAM_MAP(kc85_mem) MCFG_DEVICE_IO_MAP(trsm100_io) MCFG_I8085A_SID(READLINE(*this, kc85_state,kc85_sid_r)) @@ -1476,7 +1478,8 @@ MACHINE_CONFIG_START(trsm100_state::trsm100) i8155.in_pc_callback().set(FUNC(kc85_state::i8155_pc_r)); i8155.out_to_callback().set(FUNC(kc85_state::i8155_to_w)); - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, INPUTLINE(I8085_TAG, I8085_RST75_LINE)) + UPD1990A(config, m_rtc); + m_rtc->tp_callback().set_inputline(m_maincpu, I8085_RST75_LINE); IM6402(config, m_uart, 0, 0); m_uart->tro_callback().set(RS232_TAG, FUNC(rs232_port_device::write_txd)); @@ -1509,7 +1512,7 @@ void trsm100_state::tandy102(machine_config &config) MACHINE_CONFIG_START(tandy200_state::tandy200) /* basic machine hardware */ - MCFG_DEVICE_ADD(I8085_TAG, I8085A, XTAL(4'915'200)) + MCFG_DEVICE_ADD(m_maincpu, I8085A, XTAL(4'915'200)) MCFG_DEVICE_PROGRAM_MAP(tandy200_mem) MCFG_DEVICE_IO_MAP(tandy200_io) MCFG_I8085A_SID(READLINE(*this, tandy200_state,kc85_sid_r)) diff --git a/src/mame/drivers/legionna.cpp b/src/mame/drivers/legionna.cpp index eca38245abe..34d45eb65ed 100644 --- a/src/mame/drivers/legionna.cpp +++ b/src/mame/drivers/legionna.cpp @@ -54,7 +54,7 @@ Denjin Makai Godzilla -------- -The COP-MCU appears to write to the work ram area,otherwise it resets in mid-animation +The COP-MCU appears to write to the work ram area, otherwise it resets in mid-animation of the title screen. @@ -146,7 +146,7 @@ void legionna_state::legionna_cop_map(address_map &map) map(0x10045c, 0x10045d).w(m_raiden2cop, FUNC(raiden2cop_device::cop_pal_brightness_mode_w)); //palette DMA brightness mode, used by X Se Dae / Zero Team (sets to 5) // map(0x100470, 0x100471).rw(FUNC(legionna_state::cop_tile_bank_2_r), FUNC(legionna_state::cop_tile_bank_2_w)); -// map(0x100474, 0x100475).w(m_raiden2cop, FUNC(raiden2cop_device::...)); // this gets set to a pointer to spriteram (relative to start of ram) on all games excecpt raiden 2, where it isn't set +// map(0x100474, 0x100475).w(m_raiden2cop, FUNC(raiden2cop_device::...)); // this gets set to a pointer to spriteram (relative to start of ram) on all games except raiden 2, where it isn't set map(0x100476, 0x100477).w(m_raiden2cop, FUNC(raiden2cop_device::cop_dma_adr_rel_w)); map(0x100478, 0x100479).w(m_raiden2cop, FUNC(raiden2cop_device::cop_dma_src_w)); map(0x10047a, 0x10047b).w(m_raiden2cop, FUNC(raiden2cop_device::cop_dma_size_w)); @@ -1774,6 +1774,48 @@ ROM_START( heatbrl2 ) ROM_LOAD( "copx-d2.u0339", 0x000000, 0x080000, CRC(7c52581b) SHA1(7e668476f886806b0c06fa0bcf4bbc955878c87c) ) /* not dumped from this PCB assumed to be the same */ ROM_END +ROM_START( heatbrl3 ) // only the maincpu and audiocpu ROMs were provided for this set. This is the only known set with a different audiocpu ROM, though it's quite similar. + ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */ + ROM_LOAD32_BYTE( "barrel_1.u025.9k", 0x00000, 0x20000, CRC(b360c9cd) SHA1(3722c7220f99c28ac47ef5abac027ac62f838caa) ) + ROM_LOAD32_BYTE( "barrel_2.u024.9m", 0x00001, 0x20000, CRC(06730aac) SHA1(451ebe6fdc9f983b05cfd20c5b6e89f2c1e7d17a) ) + ROM_LOAD32_BYTE( "barrel_3.u026.9f", 0x00002, 0x20000, CRC(63fff651) SHA1(4bf060e3338fce8d0eecdcb7418d353ca3616382) ) + ROM_LOAD32_BYTE( "barrel_4.u023.9h", 0x00003, 0x20000, CRC(7a119fd5) SHA1(ffccb7cec9b6f420edb658705a7434041854e77e) ) + + ROM_REGION( 0x20000, "audiocpu", 0 ) /* Z80 code, banked data */ + ROM_LOAD( "u1110.a6", 0x00000, 0x08000, CRC(790bdba4) SHA1(9030ddcf06b632a53ec49cbb7c94d1a5195e0316) ) // no label + ROM_CONTINUE( 0x10000, 0x08000 ) /* banked stuff */ + ROM_COPY( "audiocpu", 0x000000, 0x18000, 0x08000 ) + + ROM_REGION( 0x020000, "char", 0 ) /* chars */ + ROM_LOAD16_BYTE( "barrel_6.u077.5t", 0x000000, 0x10000, CRC(bea3c581) SHA1(7f7f0a74bf106acaf57c182d47f0c707da2011bd) ) + ROM_LOAD16_BYTE( "barrel_5.u072.5v", 0x000001, 0x10000, CRC(5604d155) SHA1(afc30347b1e1316ec25056c0c1576f78be5f1a72) ) + + ROM_REGION( 0x200000, "sprite", 0 ) /* sprites */ + ROM_LOAD( "heated-barrel_obj1.u085", 0x000000, 0x100000, CRC(f7a7c31c) SHA1(683e5c7a0732ff5fd56167dd82035ca050de0507) ) + ROM_LOAD( "heated-barrel_obj2.u0814", 0x100000, 0x100000, CRC(24236116) SHA1(b27bd771cacd1587d4927e3f489c4f54b5dec110) ) + + ROM_REGION( 0x100000, "gfx3", 0 ) /* MBK tiles */ + ROM_LOAD( "heated-barrel_bg-1.u075", 0x000000, 0x100000, CRC(2f5d8baa) SHA1(0bf687c46c603150eadb304adcd78d53a338e615) ) + + ROM_REGION( 0x020000, "gfx4", 0 ) /* not used? */ + ROM_COPY( "char", 0x010000, 0x000000, 0x010000 ) // this is just corrupt tiles if we decode it + + ROM_REGION( 0x080000, "gfx5", 0 ) /* BK3 tiles */ + ROM_LOAD( "heated-barrel_bg-3.u076", 0x000000, 0x080000, CRC(83850e2d) SHA1(cdc2df8e3bc58319c50768ea2a05b9c7ddc2a652) ) + + ROM_REGION( 0x080000, "gfx6", 0 ) /* LBK tiles */ + ROM_LOAD( "heated-barrel_bg-2.u074", 0x000000, 0x080000, CRC(77ee4c6f) SHA1(a0072331bc970ba448ac5bb1ae5caa0332c82a99) ) + + ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */ + ROM_LOAD( "barrel_8.u106", 0x00000, 0x20000, CRC(489e5b1d) SHA1(ecd69d87ed354d1d08dbe6c2890af5f05d9d67d0) ) + + ROM_REGION( 0x200, "proms", 0 ) /* Priority */ + ROM_LOAD( "heat07.u0910", 0x000000, 0x000200, CRC(265eccc8) SHA1(cf650c69f97b887251b5079e5518497721692af3) ) /* N82S147N type BPROM */ + + ROM_REGION( 0x080000, "user1", 0 ) /* SEI300 data rom */ + ROM_LOAD( "copx-d2.u0339", 0x000000, 0x080000, CRC(7c52581b) SHA1(7e668476f886806b0c06fa0bcf4bbc955878c87c) ) /* not dumped from this PCB assumed to be the same */ +ROM_END + ROM_START( heatbrlo ) ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */ ROM_LOAD32_BYTE( "barrel.1h", 0x00000, 0x20000, CRC(d5a85c36) SHA1(421a42863faa940057ed5637748f791152a15502) ) @@ -1907,12 +1949,13 @@ ROM_START( heatbrle ) ROM_LOAD( "copx-d2.u0339", 0x000000, 0x080000, CRC(7c52581b) SHA1(7e668476f886806b0c06fa0bcf4bbc955878c87c) ) /* not dumped from this PCB assumed to be the same */ ROM_END + /* Godzilla Banpresto 1993 -This game runs on Seibu hardware, similar to Legionairre. +This game runs on Seibu hardware, similar to Legionnaire. PCB Layout |----------------------------------------------------| @@ -2006,7 +2049,7 @@ Denjin Makai Banpresto, 1994 This game runs on early 90's Seibu hardware. -(i.e. Raiden II, Godzilla, Seibu Cup Soccer, Legionairre, Heated Barrel etc). +(i.e. Raiden II, Godzilla, Seibu Cup Soccer, Legionnaire, Heated Barrel etc). The PCB looks to have been converted from some other game (a lot of flux traces are left on the PCB). The game might be a simple ROM swap for some other Seibu-based game. @@ -2580,7 +2623,7 @@ ROM_END In Seibu Cup Soccer Selection the only way I've found to not display debug text is by changing this area, and for Olympic Soccer '92 it appears to be the only way to get the Olympic Soccer '92 titles - to be used instead of the reagular Seibu Cup Soccer one (and AFAIK both dumps are confirmed to show + to be used instead of the regular Seibu Cup Soccer one (and AFAIK both dumps are confirmed to show that on hardware, as are all early versions with the advertising boards of dubious legality) You can also enable other debug menus by patching this area of ROM, but some initial tests appear to @@ -2634,7 +2677,7 @@ void legionna_state::init_legiongfx() void legionna_state::init_godzilla() { uint16_t *ROM = (uint16_t *)memregion("maincpu")->base(); - // TODO: some game elements doesn't collide properly, @see seibucop.cpp + // TODO: some game elements don't collide properly, @see seibucop.cpp ROM[(0xbe0e + 0x0a)/2] = 0xb000; ROM[(0xbe0e + 0x1a)/2] = 0xb800; ROM[(0xbb0a + 0x0a)/2] = 0xb000; @@ -2649,6 +2692,7 @@ GAME( 1992, legionnaj, legionna, legionna, legionna, legionna_state, init_legion GAME( 1992, heatbrl, 0, heatbrl, heatbrl, legionna_state, empty_init, ROT0, "TAD Corporation", "Heated Barrel (World version 3)", 0 ) GAME( 1992, heatbrl2, heatbrl, heatbrl, heatbrl, legionna_state, empty_init, ROT0, "TAD Corporation", "Heated Barrel (World version 2)", 0 ) +GAME( 1992, heatbrl3, heatbrl, heatbrl, heatbrl, legionna_state, empty_init, ROT0, "TAD Corporation", "Heated Barrel (World version ?)", 0 ) GAME( 1992, heatbrlo, heatbrl, heatbrl, heatbrl, legionna_state, empty_init, ROT0, "TAD Corporation", "Heated Barrel (World old version)", 0 ) GAME( 1992, heatbrlu, heatbrl, heatbrl, heatbrl, legionna_state, empty_init, ROT0, "TAD Corporation", "Heated Barrel (US)", 0 ) GAME( 1992, heatbrle, heatbrl, heatbrl, heatbrl, legionna_state, empty_init, ROT0, "TAD Corporation (Electronic Devices license)", "Heated Barrel (Electronic Devices license)", 0 ) diff --git a/src/mame/drivers/m5.cpp b/src/mame/drivers/m5.cpp index a6b289916f4..3d9ee11c460 100644 --- a/src/mame/drivers/m5.cpp +++ b/src/mame/drivers/m5.cpp @@ -1411,7 +1411,7 @@ MACHINE_CONFIG_START(m5_state::m5) m_maincpu->set_addrmap(AS_IO, &m5_state::m5_io); m_maincpu->set_daisy_config(m5_daisy_chain); - MCFG_DEVICE_ADD(Z80_FD5_TAG, Z80, 14.318181_MHz_XTAL / 4) + MCFG_DEVICE_ADD(m_fd5cpu, Z80, 14.318181_MHz_XTAL / 4) MCFG_DEVICE_PROGRAM_MAP(fd5_mem) MCFG_DEVICE_IO_MAP(fd5_io) @@ -1443,8 +1443,8 @@ MACHINE_CONFIG_START(m5_state::m5) m_ppi->in_pc_callback().set(FUNC(m5_state::ppi_pc_r)); m_ppi->out_pc_callback().set(FUNC(m5_state::ppi_pc_w)); - MCFG_UPD765A_ADD(UPD765_TAG, true, true) - MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE(Z80_FD5_TAG, INPUT_LINE_IRQ0)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set_inputline(m_fd5cpu, INPUT_LINE_IRQ0); MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", m5_floppies, "525dd", m5_state::floppy_formats) // cartridge @@ -1507,9 +1507,9 @@ MACHINE_CONFIG_START(brno_state::brno) //remove devices used for fd5 floppy - MCFG_DEVICE_REMOVE(Z80_FD5_TAG) - MCFG_DEVICE_REMOVE(I8255A_TAG) - MCFG_DEVICE_REMOVE(UPD765_TAG) + config.device_remove(Z80_FD5_TAG); + config.device_remove(I8255A_TAG); + config.device_remove(UPD765_TAG); // video hardware tms9929a_device &vdp(TMS9929A(config, "tms9928a", 10.738635_MHz_XTAL)); diff --git a/src/mame/drivers/m72.cpp b/src/mame/drivers/m72.cpp index c07d37bd5c6..ef60eed7877 100644 --- a/src/mame/drivers/m72.cpp +++ b/src/mame/drivers/m72.cpp @@ -2111,13 +2111,13 @@ MACHINE_CONFIG_START(m72_state::poundfor) MCFG_DEVICE_ADD("upd71059c", PIC8259, 0) MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0)) - MCFG_DEVICE_ADD("upd4701l", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACK0_X") - MCFG_UPD4701_PORTY("TRACK0_Y") + UPD4701A(config, m_upd4701[0]); + m_upd4701[0]->set_portx_tag("TRACK0_X"); + m_upd4701[0]->set_porty_tag("TRACK0_Y"); - MCFG_DEVICE_ADD("upd4701h", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACK1_X") - MCFG_UPD4701_PORTY("TRACK1_Y") + UPD4701A(config, m_upd4701[1]); + m_upd4701[1]->set_portx_tag("TRACK1_X"); + m_upd4701[1]->set_porty_tag("TRACK1_Y"); /* video hardware */ MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_rtype2) diff --git a/src/mame/drivers/metro.cpp b/src/mame/drivers/metro.cpp index 0ae0ebbea43..4ec8f31ea33 100644 --- a/src/mame/drivers/metro.cpp +++ b/src/mame/drivers/metro.cpp @@ -1142,12 +1142,6 @@ void metro_state::mouja_okimap(address_map &map) Puzzlet ***************************************************************************/ -#define MCFG_PUZZLET_IO_ADD(_tag) \ - MCFG_DEVICE_ADD(_tag, PUZZLET_IO, 0) - -#define MCFG_PUZZLET_IO_DATA_CALLBACK(_devcb) \ - puzzlet_io_device::set_data_cb(*device, DEVCB_##_devcb); - class puzzlet_io_device : public device_t { public: puzzlet_io_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -1155,7 +1149,7 @@ public: DECLARE_WRITE_LINE_MEMBER( ce_w ); DECLARE_WRITE_LINE_MEMBER( clk_w ); - template <class Object> static devcb_base &set_data_cb(device_t &device, Object &&cb) { return downcast<puzzlet_io_device &>(device).data_cb.set_callback(std::forward<Object>(cb)); } + auto data_callback() { return data_cb.bind(); } protected: virtual void device_start() override; @@ -3805,8 +3799,8 @@ MACHINE_CONFIG_START(metro_state::puzzlet) MCFG_DEVICE_IO_MAP(puzzlet_io_map) /* Coins/service */ - MCFG_PUZZLET_IO_ADD("coins") - MCFG_PUZZLET_IO_DATA_CALLBACK(WRITELINE("maincpu:sci1", h8_sci_device, rx_w)) + puzzlet_io_device &coins(PUZZLET_IO(config, "coins", 0)); + coins.data_callback().set("maincpu:sci1", FUNC(h8_sci_device::rx_w)); MCFG_DEVICE_MODIFY("maincpu:sci1") MCFG_H8_SCI_TX_CALLBACK(WRITELINE("coins", puzzlet_io_device, ce_w)) MCFG_H8_SCI_CLK_CALLBACK(WRITELINE("coins", puzzlet_io_device, clk_w)) diff --git a/src/mame/drivers/mikromik.cpp b/src/mame/drivers/mikromik.cpp index 708944db362..96d9a72381c 100644 --- a/src/mame/drivers/mikromik.cpp +++ b/src/mame/drivers/mikromik.cpp @@ -490,9 +490,9 @@ MACHINE_CONFIG_START(mm1_state::mm1) m_pit->set_clk<2>(6.144_MHz_XTAL/2/2); m_pit->out_handler<2>().set(FUNC(mm1_state::auxc_w)); - MCFG_UPD765A_ADD(UPD765_TAG, /* 16_MHz_XTAL/2/2 */ true, true) - MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE(I8085A_TAG, I8085_RST55_LINE)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(I8237_TAG, am9517a_device, dreq3_w)) + UPD765A(config, m_fdc, /* 16_MHz_XTAL/2/2, */ true, true); + m_fdc->intrq_wr_callback().set_inputline(m_maincpu, I8085_RST55_LINE); + m_fdc->drq_wr_callback().set(m_dmac, FUNC(am9517a_device::dreq3_w)); MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", mm1_floppies, "525qd", mm1_state::floppy_formats) MCFG_FLOPPY_DRIVE_SOUND(true) MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", mm1_floppies, "525qd", mm1_state::floppy_formats) diff --git a/src/mame/drivers/mitchell.cpp b/src/mame/drivers/mitchell.cpp index c869081a6e8..89035778207 100644 --- a/src/mame/drivers/mitchell.cpp +++ b/src/mame/drivers/mitchell.cpp @@ -2073,6 +2073,60 @@ ROM_START( spangbl ) ROM_LOAD( "ic125.14", 0x030000, 0x10000, CRC(bd5c2f4b) SHA1(3c71d63637633a98ab513e4336e2954af3f964f4) ) ROM_END +ROM_START( spangbl2 ) + ROM_REGION( 0x50000*2, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD( "ic2.1", 0x00000, 0x08000, CRC(4403f652) SHA1(62a232985a334ea8af840c2c3e766f316cc9e3da) ) // 1ST AND 2ND HALF IDENTICAL, but found as is on two different boards + ROM_CONTINUE(0x50000,0x8000) + ROM_LOAD( "ic18.2", 0x60000, 0x04000, CRC(6f377832) SHA1(25755ed77a797f50fdfbb4c42a04f51d3d08f87c) ) + ROM_CONTINUE(0x10000,0x4000) + ROM_CONTINUE(0x64000,0x4000) + ROM_CONTINUE(0x14000,0x4000) + ROM_CONTINUE(0x68000,0x4000) + ROM_CONTINUE(0x18000,0x4000) + ROM_CONTINUE(0x6c000,0x4000) + ROM_CONTINUE(0x1c000,0x4000) + ROM_CONTINUE(0x70000,0x4000) + ROM_CONTINUE(0x20000,0x4000) + ROM_CONTINUE(0x74000,0x4000) + ROM_CONTINUE(0x24000,0x4000) + ROM_CONTINUE(0x78000,0x4000) + ROM_CONTINUE(0x28000,0x4000) + ROM_CONTINUE(0x7c000,0x4000) + ROM_CONTINUE(0x2c000,0x4000) + ROM_LOAD( "ic19.3", 0x40000, 0x04000, CRC(7c776309) SHA1(8861ed11484ca0727dfbc3003888a9de32ed8ecc) ) + ROM_CONTINUE(0x48000,0x4000) + ROM_CONTINUE(0x44000,0x4000) + ROM_CONTINUE(0x4c000,0x4000) + + ROM_REGION( 0x20000, "audiocpu", 0 ) /* Sound Z80 + M5205 samples */ + ROM_LOAD( "ic28.4", 0x00000, 0x10000, CRC(02b07d0a) SHA1(77cb9bf1b0d93ebad1bd8cdbedb7fdbad23697be) ) + ROM_LOAD( "ic45.5", 0x10000, 0x10000, CRC(95c32824) SHA1(02de90a7bfbe89feb7708fda8dfac4ed32bc0773) ) + + ROM_REGION( 0x100000, "gfx1", ROMREGION_INVERT| ROMREGION_ERASE00 ) + ROM_LOAD16_BYTE( "ic79.11", 0x000001, 0x10000, CRC(10839ddd) SHA1(bfb56aa5d6ee1d3aa19e346264bee90d64545e51) ) + ROM_LOAD16_BYTE( "ic78.7", 0x000000, 0x10000, CRC(c1d5df89) SHA1(a86e641af1b41c8f642fe3a14ebcbe6c27f80c79) ) + ROM_LOAD16_BYTE( "ic49.10", 0x020001, 0x10000, CRC(113c2753) SHA1(37b480b5d9c581d3c807c81924b4bbbc21d0698d) ) + ROM_LOAD16_BYTE( "ic48.6", 0x020000, 0x10000, CRC(4ffae6c9) SHA1(71df3c374a24d6a90e78d33929cb91d05bd10b78) ) + ROM_LOAD16_BYTE( "ic81.13", 0x080001, 0x10000, CRC(ebe9c63a) SHA1(1aeeea5051086405ceb803ca7a5bfd82a07ade0f) ) + ROM_LOAD16_BYTE( "ic80.9", 0x080000, 0x10000, CRC(f680051d) SHA1(b6e09e14baf839961f46e0986d2c17f7edfaf13d) ) + ROM_LOAD16_BYTE( "ic51.12", 0x0a0001, 0x10000, CRC(beb49dc9) SHA1(c93f65b0f4ce0a0f400202f2998b89abad1f6942) ) + ROM_LOAD16_BYTE( "ic50.8", 0x0a0000, 0x10000, CRC(3f91014c) SHA1(b3947caa0c667d871c19d7dda6536d043ad296f2) ) + + ROM_REGION( 0x040000, "gfx2", ROMREGION_INVERT ) + ROM_LOAD( "ic94.17", 0x000000, 0x10000, CRC(a56f3c20) SHA1(cb440e0e612da8b8a50fe25a6336869b62ab4cfd) ) + ROM_LOAD( "ic95.16", 0x020000, 0x10000, CRC(14df4659) SHA1(d73fab0a8c1e56a26cc15333a294e876f1552bc9) ) + ROM_LOAD( "ic124.15", 0x010000, 0x10000, CRC(4702c768) SHA1(ff996f1355f32451fa57836c2255027a8108eb40) ) + ROM_LOAD( "ic125.14", 0x030000, 0x10000, CRC(bd5c2f4b) SHA1(3c71d63637633a98ab513e4336e2954af3f964f4) ) + + /* Unused */ + ROM_REGION( 0x008000, "key", 0) + ROM_LOAD( "extra-27c256.bin", 0x00000, 0x08000, CRC(100dda13) SHA1(9a0b6d4439127abc4995c9df3839bfe1f13d8bc2) ) + + /* Unsused */ + ROM_REGION( 0x000104, "plds", 0) + ROM_LOAD( "1-pal16l8.ic32", 0x0000, 0x0104, CRC(b78ee715) SHA1(df9ed2bef394b4e26ac87bd39d81f4df2b5cefe5) ) +ROM_END + /* seems to be the same basic hardware, but the memory map and io map are different at least.. */ ROM_START( mstworld ) ROM_REGION( 0x50000*2, "maincpu", 0 ) /* CPU1 code */ @@ -2485,7 +2539,8 @@ GAME( 1990, hatena, 0, pang, qtono1, mitchell_state, init_ha GAME( 1990, spang, 0, pangnv, pang, mitchell_state, init_spang, ROT0, "Mitchell", "Super Pang (World 900914)", MACHINE_SUPPORTS_SAVE ) GAME( 1990, sbbros, spang, pangnv, pang, mitchell_state, init_sbbros, ROT0, "Mitchell (Capcom license)", "Super Buster Bros. (USA 901001)", MACHINE_SUPPORTS_SAVE ) GAME( 1990, spangj, spang, pangnv, pang, mitchell_state, init_spangj, ROT0, "Mitchell", "Super Pang (Japan 901023)", MACHINE_SUPPORTS_SAVE ) -GAME( 1990, spangbl, spang, spangbl, spangbl, mitchell_state, init_spangbl, ROT0, "bootleg", "Super Pang (World 900914, bootleg)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // different sound hardware +GAME( 1990, spangbl, spang, spangbl, spangbl, mitchell_state, init_spangbl, ROT0, "bootleg", "Super Pang (World 900914, bootleg, set 1)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // different sound hardware +GAME( 1990, spangbl2, spang, spangbl, spangbl, mitchell_state, init_spangbl, ROT0, "bootleg", "Super Pang (World 900914, bootleg, set 2)", MACHINE_NOT_WORKING ) GAME( 1994, mstworld, 0, mstworld, mstworld, mitchell_state, init_mstworld, ROT0, "bootleg (TCH)", "Monsters World (bootleg of Super Pang)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) GAME( 1990, marukin, 0, marukin, marukin, mitchell_state, init_marukin, ROT0, "Yuga", "Super Marukin-Ban (Japan 901017)", MACHINE_SUPPORTS_SAVE ) GAME( 1991, qtono1, 0, pang, qtono1, mitchell_state, init_qtono1, ROT0, "Capcom", "Quiz Tonosama no Yabou (Japan)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/monzagp.cpp b/src/mame/drivers/monzagp.cpp index b105b0da967..cd455f2faf1 100644 --- a/src/mame/drivers/monzagp.cpp +++ b/src/mame/drivers/monzagp.cpp @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Phil Stroffolino +// copyright-holders:Tomasz Slanina /*************************************************************************** Monza GP - Olympia @@ -33,7 +33,7 @@ Lower board (MGP_01): #include "cpu/mcs48/mcs48.h" #include "machine/nvram.h" #include "machine/timer.h" -//#include "video/dp8350.h" +#include "video/dp8350.h" #include "video/resnet.h" #include "emupal.h" #include "screen.h" @@ -46,6 +46,7 @@ public: monzagp_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), + m_crtc(*this, "crtc"), m_gfxdecode(*this, "gfxdecode"), m_palette(*this, "palette"), m_nvram(*this, "nvram"), @@ -72,8 +73,9 @@ private: virtual void machine_start() override; TIMER_DEVICE_CALLBACK_MEMBER(time_tick_timer); DECLARE_PALETTE_INIT(monzagp); - uint32_t screen_update_monzagp(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); required_device<cpu_device> m_maincpu; + required_device<dp8350_device> m_crtc; required_device<gfxdecode_device> m_gfxdecode; required_device<palette_device> m_palette; required_device<nvram_device> m_nvram; @@ -166,7 +168,7 @@ void monzagp_state::machine_start() m_digits.resolve(); } -uint32_t monzagp_state::screen_update_monzagp(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +uint32_t monzagp_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { /* for(int i=0;i<8;i++) @@ -188,7 +190,7 @@ uint32_t monzagp_state::screen_update_monzagp(screen_device &screen, bitmap_ind1 uint8_t mycar_y = m_mycar_pos; bool inv = false; - for(int y=0; y<=256; y++, start_tile += inv ? -1 : +1) + for (int y = 0; y < 240; y++, start_tile += inv ? -1 : +1) { if (inv_counter++ == 0xff) inv = true; @@ -196,7 +198,7 @@ uint32_t monzagp_state::screen_update_monzagp(screen_device &screen, bitmap_ind1 uint16_t start_x = (((m_video_ctrl[0][3] << 8) | m_video_ctrl[0][2]) ^ 0xffff); uint8_t mycar_x = m_video_ctrl[1][2]; - for(int x=0; x<=256; x++, start_x++) + for (int x = 0; x < 280; x++, start_x++) { uint8_t tile_attr = m_tile_attr->base()[((start_x >> 5) & 0x1ff) | ((m_video_ctrl[0][3] & 0x80) ? 0 : 0x200)]; @@ -241,8 +243,10 @@ uint32_t monzagp_state::screen_update_monzagp(screen_device &screen, bitmap_ind1 } } - if (cliprect.contains(x, y)) - bitmap.pix16(y, x) = color; + if (cliprect.contains(x * 2, y)) + bitmap.pix16(y, x * 2) = color; + if (cliprect.contains(x * 2 + 1, y)) + bitmap.pix16(y, x * 2 + 1) = color; // collisions uint8_t coll_prom_addr = bitswap<8>(tile_idx, 7, 6, 5, 4, 2, 0, 1, 3); @@ -253,15 +257,16 @@ uint32_t monzagp_state::screen_update_monzagp(screen_device &screen, bitmap_ind1 } // characters - for(int y=0;y<26;y++) + for (int y = 0; y < 24; y++) { - for(int x=0;x<40;x++) + for (int x = 0; x < 40; x++) { - m_gfxdecode->gfx(0)->transpen(bitmap,cliprect, + m_gfxdecode->gfx(0)->zoom_transpen(bitmap,cliprect, m_vram[y*40+x], 0, 0, 0, - x*7,y*10, + x*14,y*10, + 0x20000, 0x10000, 1); } } @@ -505,21 +510,19 @@ MACHINE_CONFIG_START(monzagp_state::monzagp) MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(*this, monzagp_state, port2_w)) /* video hardware */ - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */) - MCFG_SCREEN_SIZE(32*8, 32*8) - MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 0*8, 32*8-1) - MCFG_SCREEN_UPDATE_DRIVER(monzagp_state, screen_update_monzagp) - MCFG_SCREEN_PALETTE("palette") - MCFG_SCREEN_VBLANK_CALLBACK(INPUTLINE("maincpu", MCS48_INPUT_IRQ)) // inversion of DP8350 pin 2 + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_raw(10920000, 700, 0, 560, 312, 11, 240); // 11-line offset makes attract mode look symmetric + screen.set_screen_update(FUNC(monzagp_state::screen_update)); + screen.set_palette(m_palette); - //MCFG_DEVICE_ADD("crtc", DP8350, 10920000) // pins 21/22 connected to XTAL, 3 to GND, 5 to +5 + DP8350(config, m_crtc, 10920000); // pins 21/22 connected to XTAL, 3 to GND, 5 to +5 + m_crtc->set_screen("screen"); + m_crtc->refresh_control(0); + m_crtc->vsync_callback().set_inputline(m_maincpu, MCS48_INPUT_IRQ).invert(); // active low; no inverter should be needed - MCFG_PALETTE_ADD("palette", 0x200) - MCFG_PALETTE_INIT_OWNER(monzagp_state, monzagp) + PALETTE(config, m_palette, 0x200).set_init(FUNC(monzagp_state::palette_init_monzagp)); - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_monzagp) + GFXDECODE(config, "gfxdecode", "palette", gfx_monzagp); MCFG_TIMER_DRIVER_ADD_PERIODIC("time_tick_timer", monzagp_state, time_tick_timer, attotime::from_hz(4)) @@ -600,5 +603,5 @@ ROM_START( monzagpb ) ROM_END -GAMEL( 1981, monzagp, 0, monzagp, monzagp, monzagp_state, empty_init, ROT270, "Olympia", "Monza GP", MACHINE_NOT_WORKING|MACHINE_NO_SOUND, layout_monzagp ) -GAMEL( 1981, monzagpb, monzagp, monzagp, monzagp, monzagp_state, empty_init, ROT270, "bootleg", "Monza GP (bootleg)", MACHINE_NOT_WORKING|MACHINE_NO_SOUND, layout_monzagp ) +GAMEL( 1981, monzagp, 0, monzagp, monzagp, monzagp_state, empty_init, ROT270, "Olympia", "Monza GP", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_COLORS | MACHINE_NO_SOUND, layout_monzagp ) +GAMEL( 1981, monzagpb, monzagp, monzagp, monzagp, monzagp_state, empty_init, ROT270, "bootleg", "Monza GP (bootleg)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_COLORS | MACHINE_NO_SOUND, layout_monzagp ) diff --git a/src/mame/drivers/mpc3000.cpp b/src/mame/drivers/mpc3000.cpp index 42e2197e230..fee0ca9f1aa 100644 --- a/src/mame/drivers/mpc3000.cpp +++ b/src/mame/drivers/mpc3000.cpp @@ -213,9 +213,9 @@ void mpc3000_state::mpc3000(machine_config &config) MCFG_PALETTE_ADD("palette", 2) MCFG_PALETTE_INIT_OWNER(mpc3000_state, mpc3000) - MCFG_UPD72065_ADD("upd72068", true, true) // TODO: upd72068 supports motor control - //MCFG_UPD765_INTRQ_CALLBACK(WRITELINE("maincpu", v53a_device, ir?_w)) - //MCFG_UPD765_DRQ_CALLBACK(WRITELINE("maincpu", v53a_device, drq?_w)) + UPD72065(config, m_fdc, 0, true, true); // TODO: upd72068 supports motor control + //m_fdc->intrq_wr_callback().set(m_maincpu, FUNC(v53a_device::ir?_w)); + //m_fdc->drq_wr_callback().set(m_maincpu, FUNC(v53a_device::drq?_w)); pit8254_device &pit(PIT8254(config, "synctmr", 0)); // MB89254 pit.set_clk<0>(16_MHz_XTAL / 4); diff --git a/src/mame/drivers/msx.cpp b/src/mame/drivers/msx.cpp index d9b2a5f5fdb..1d8a8d61348 100644 --- a/src/mame/drivers/msx.cpp +++ b/src/mame/drivers/msx.cpp @@ -1317,9 +1317,10 @@ void msx_state::msx_mb8877a(machine_config & config) fdc.set_force_ready(true); } -MACHINE_CONFIG_START(msx_state::msx_tc8566af) - MCFG_TC8566AF_ADD("fdc") -MACHINE_CONFIG_END +void msx_state::msx_tc8566af(machine_config &config) +{ + TC8566AF(config, "fdc"); +} void msx_state::msx_microsol(machine_config &config) { diff --git a/src/mame/drivers/multi8.cpp b/src/mame/drivers/multi8.cpp index 84bcf4220a2..5d78a6e795e 100644 --- a/src/mame/drivers/multi8.cpp +++ b/src/mame/drivers/multi8.cpp @@ -612,7 +612,7 @@ MACHINE_CONFIG_START(multi8_state::multi8) MCFG_DEVICE_ADD("pit", PIT8253, 0) MCFG_DEVICE_ADD("pic", PIC8259, 0) - //MCFG_UPD765A_ADD("fdc", false, true) + //UPD765A(config, "fdc", false, true); //MCFG_FLOPPY_DRIVE_ADD("fdc:0", multi8_floppies, "525hd", floppy_image_device::default_floppy_formats) MACHINE_CONFIG_END diff --git a/src/mame/drivers/mz3500.cpp b/src/mame/drivers/mz3500.cpp index 083ca202a13..595773cf421 100644 --- a/src/mame/drivers/mz3500.cpp +++ b/src/mame/drivers/mz3500.cpp @@ -826,8 +826,8 @@ MACHINE_CONFIG_START(mz3500_state::mz3500) ppi.out_pb_callback().set(FUNC(mz3500_state::mz3500_pb_w)); ppi.out_pc_callback().set(FUNC(mz3500_state::mz3500_pc_w)); - MCFG_UPD765A_ADD("upd765a", true, true) - MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE("master", INPUT_LINE_IRQ0)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set_inputline(m_master, INPUT_LINE_IRQ0); MCFG_FLOPPY_DRIVE_ADD("upd765a:0", mz3500_floppies, "525ssdd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765a:1", mz3500_floppies, "525ssdd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765a:2", mz3500_floppies, "525ssdd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/mz6500.cpp b/src/mame/drivers/mz6500.cpp index 814a19fcb4a..831472fe85f 100644 --- a/src/mame/drivers/mz6500.cpp +++ b/src/mame/drivers/mz6500.cpp @@ -169,7 +169,7 @@ MACHINE_CONFIG_START(mz6500_state::mz6500) MCFG_DEVICE_ADDRESS_MAP(0, upd7220_map) MCFG_UPD7220_DISPLAY_PIXELS_CALLBACK_OWNER(mz6500_state, hgdc_display_pixels) - MCFG_UPD765A_ADD("upd765", true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD("upd765:0", mz6500_floppies, "525hd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765:1", mz6500_floppies, "525hd", floppy_image_device::default_floppy_formats) MACHINE_CONFIG_END diff --git a/src/mame/drivers/namcos22.cpp b/src/mame/drivers/namcos22.cpp index 086571cdda7..28382747eab 100644 --- a/src/mame/drivers/namcos22.cpp +++ b/src/mame/drivers/namcos22.cpp @@ -10,6 +10,15 @@ * - trackmaster@gmx.net (Bjorn Sunder) * - team vivanonno * + * TODO: (for video related issues, see video source file) + * - finish slave DSP emulation + * - emulate System 22 I/O board C74 + * - tokyowar tanks are not shootable, same for timecris helicopter, there's still a very small hitbox but almost impossible to hit. + * - alpinesa doesn't work, protection related? + * - C139 for linked cabinets, as well as in RR fullscale + * - confirm DSP and MCU clocks and their IRQ timing + * + ********************************************************************************************************** * Input * - input ports require manual calibration through built-in diagnostics (or canned EEPROM) * @@ -18,12 +27,6 @@ * - lamps/LEDs on some cabinets * - time crisis has force feedback for the guns * - * Link - * - SCI (link) feature is not yet hooked up - * - * CPU Emulation issues - * - slave DSP is not yet used in-game - * * Notes: * The "dipswitch" settings are ignored in many games - this isn't a bug. For example, Prop Cycle software * explicitly clears the chunk of work RAM used to cache the 8 bit dipswitch value immediately after @@ -1165,24 +1168,24 @@ #include "sound/c352.h" #include "speaker.h" +// 51.2MHz XTAL on video board, pixel clock of 12.8MHz (doubled in MAME because of unemulated interlacing) +// HSync - 15.7248 kHz -> htotal = 814.001 +// VSync - 59.9042 Hz -> vtotal = 524.998 (262+263) +#define PIXEL_CLOCK (51.2_MHz_XTAL/4*2) -#define SS22_MASTER_CLOCK (XTAL(49'152'000)) /* info from Guru */ - -#define PIXEL_CLOCK (SS22_MASTER_CLOCK/2) - -// VSync - 59.9042 Hz -// HSync - 15.7248 kHz (may be inaccurate) -#define HTOTAL (800) +#define HTOTAL (814) #define HBEND (0) #define HBSTART (640) -#define VTOTAL (512) +#define VTOTAL (525) #define VBEND (0) #define VBSTART (480) -#define MCU_SPEEDUP 1 /* mcu idle skipping */ - +#define MCU_SPEEDUP 1 /* mcu idle skipping */ +#define SERIAL_IO_PERIOD (100) /* lower DSP serial I/O period */ +// actual dsp serial freq is unknown, should be much higher than 100Hz of course +// serial comms doesn't work yet anyway /*********************************************************************************************/ @@ -1201,10 +1204,8 @@ READ32_MEMBER(namcos22_state::namcos22_sci_r) } } -#if 0 WRITE32_MEMBER(namcos22_state::namcos22_sci_w) { - COMBINE_DATA(&m_sci_regs[offset]); /* 20020000 2 R/W RX Status 0x01 : Frame Error @@ -1232,7 +1233,6 @@ WRITE32_MEMBER(namcos22_state::namcos22_sci_w) 2002000e 2 W TX FIFO Pointer (0x0000 - 0x1fff) */ } -#endif /* system controller (super system22) @@ -1317,6 +1317,10 @@ WRITE8_MEMBER(namcos22_state::namcos22s_system_controller_w) // reset mcu case 0x16: m_mcu->set_input_line(INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE); + + // timecris POST "SUBCPU START WAIT" needs high interleave + if (data && m_gametype == NAMCOS22_TIME_CRISIS) + machine().scheduler().boost_interleave(attotime::zero, attotime::from_msec(150)); break; // dsp control @@ -1326,22 +1330,21 @@ WRITE8_MEMBER(namcos22_state::namcos22s_system_controller_w) if (data == 0) { /* disable DSPs */ - m_master->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); - m_slave->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); - enable_slave_simulation(false); + master_enable(false); + slave_enable(false); m_dsp_irq_enabled = false; } else if (data == 1) { /* enable dsp and rendering subsystem */ - m_master->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); - enable_slave_simulation(true); + master_enable(true); + slave_enable(true); m_dsp_irq_enabled = true; } else if (data == 0xff) { /* used to upload game-specific code to master/slave dsps */ - m_master->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); + master_enable(true); m_dsp_irq_enabled = false; } } @@ -1471,22 +1474,21 @@ WRITE8_MEMBER(namcos22_state::namcos22_system_controller_w) if (data == 0) { /* disable DSPs */ - m_master->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); - m_slave->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); - enable_slave_simulation(false); + master_enable(false); + slave_enable(false); m_dsp_irq_enabled = false; } else if (data == 1) { /* enable dsp and rendering subsystem */ - m_master->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); - enable_slave_simulation(true); + master_enable(true); + slave_enable(true); m_dsp_irq_enabled = true; } else if (data == 0xff) { /* used to upload game-specific code to master/slave dsps */ - m_master->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); + master_enable(true); m_dsp_irq_enabled = false; } } @@ -1578,6 +1580,17 @@ READ8_MEMBER(namcos22_state::namcos22_system_controller_r) } +READ16_MEMBER(namcos22_state::namcos22_shared_r) +{ + return m_shareram[offset]; +} + +WRITE16_MEMBER(namcos22_state::namcos22_shared_w) +{ + COMBINE_DATA(&m_shareram[offset]); +} + + READ32_MEMBER(namcos22_state::namcos22_dspram_r) { return m_polygonram[offset] | 0xff000000; // only d0-23 are connected @@ -1792,7 +1805,7 @@ void namcos22_state::namcos22_am(address_map &map) * 2002000c 2 R/W RX FIFO Pointer (0x0000 - 0x0fff) * 2002000e 2 W TX FIFO Pointer (0x0000 - 0x1fff) */ - map(0x20020000, 0x2002000f).r(FUNC(namcos22_state::namcos22_sci_r)).writeonly(); + map(0x20020000, 0x2002000f).rw(FUNC(namcos22_state::namcos22_sci_r), FUNC(namcos22_state::namcos22_sci_w)); /** * System Controller: Interrupt Control, Peripheral Control @@ -1863,7 +1876,7 @@ void namcos22_state::namcos22_am(address_map &map) * +0x0300 - 0x03ff? Song Title (put messages here from Sound CPU) */ map(0x60000000, 0x60003fff).nopw(); - map(0x60004000, 0x6000bfff).ram().share("shareram"); + map(0x60004000, 0x6000bfff).rw(FUNC(namcos22_state::namcos22_shared_r), FUNC(namcos22_state::namcos22_shared_w)); /** * C71 (TI TMS320C25 DSP) Shared RAM (0x70000000 - 0x70020000) @@ -1932,16 +1945,17 @@ void namcos22_state::namcos22s_am(address_map &map) { map(0x000000, 0x3fffff).rom(); map(0x400000, 0x40001f).rw(FUNC(namcos22_state::namcos22_keycus_r), FUNC(namcos22_state::namcos22_keycus_w)); - map(0x410000, 0x413fff).ram(); /* C139 SCI buffer */ - map(0x420000, 0x42000f).r(FUNC(namcos22_state::namcos22_sci_r)).writeonly(); /* C139 SCI registers */ - map(0x440000, 0x440003).rw(FUNC(namcos22_state::namcos22_dipswitch_r), FUNC(namcos22_state::namcos22_cpuleds_w)); + map(0x410000, 0x413fff).ram(); // C139 SCI buffer + map(0x420000, 0x42000f).rw(FUNC(namcos22_state::namcos22_sci_r), FUNC(namcos22_state::namcos22_sci_w)); // C139 SCI registers + map(0x430000, 0x430003).w(FUNC(namcos22_state::namcos22_cpuleds_w)); + map(0x440000, 0x440003).r(FUNC(namcos22_state::namcos22_dipswitch_r)); map(0x450008, 0x45000b).rw(FUNC(namcos22_state::namcos22_portbit_r), FUNC(namcos22_state::namcos22_portbit_w)); map(0x460000, 0x463fff).rw(m_eeprom, FUNC(eeprom_parallel_28xx_device::read), FUNC(eeprom_parallel_28xx_device::write)).umask32(0xff00ff00); map(0x700000, 0x70001f).rw(FUNC(namcos22_state::namcos22_system_controller_r), FUNC(namcos22_state::namcos22s_system_controller_w)); map(0x800000, 0x800003).w(FUNC(namcos22_state::namcos22s_chipselect_w)); map(0x810000, 0x81000f).ram().share("czattr"); map(0x810200, 0x8103ff).rw(FUNC(namcos22_state::namcos22s_czram_r), FUNC(namcos22_state::namcos22s_czram_w)); - map(0x820000, 0x8202ff).nopw(); /* leftover of old (non-super) video mixer device */ + map(0x820000, 0x8202ff).nopw(); // leftover of old (non-super) video mixer device map(0x824000, 0x8243ff).ram().share("video_mixer"); map(0x828000, 0x83ffff).ram().w(FUNC(namcos22_state::namcos22_paletteram_w)).share("paletteram"); map(0x860000, 0x860007).rw(FUNC(namcos22_state::namcos22s_spotram_r), FUNC(namcos22_state::namcos22s_spotram_w)); @@ -1950,10 +1964,10 @@ void namcos22_state::namcos22s_am(address_map &map) map(0x8a0000, 0x8a000f).rw(FUNC(namcos22_state::namcos22_tilemapattr_r), FUNC(namcos22_state::namcos22_tilemapattr_w)).share("tilemapattr"); map(0x900000, 0x90ffff).ram().share("vics_data"); map(0x940000, 0x94007f).rw(FUNC(namcos22_state::namcos22s_vics_control_r), FUNC(namcos22_state::namcos22s_vics_control_w)).share("vics_control"); - map(0x980000, 0x9affff).ram().share("spriteram"); /* C374 */ - map(0xa04000, 0xa0bfff).ram().share("shareram"); /* COM RAM */ + map(0x980000, 0x9affff).ram().share("spriteram"); // C374 + map(0xa04000, 0xa0bfff).rw(FUNC(namcos22_state::namcos22_shared_r), FUNC(namcos22_state::namcos22_shared_w)); // COM RAM map(0xc00000, 0xc1ffff).rw(FUNC(namcos22_state::namcos22_dspram_r), FUNC(namcos22_state::namcos22_dspram_w)).share("polygonram"); - map(0xe00000, 0xe3ffff).ram(); /* workram */ + map(0xe00000, 0xe3ffff).ram(); // workram } @@ -1963,6 +1977,7 @@ READ32_MEMBER(namcos22_state::namcos22_gun_r) uint16_t xpos = ioport("LIGHTX")->read(); uint16_t ypos = ioport("LIGHTY")->read(); // ypos is not completely understood yet, there should be a difference between case 1 and 2 + // game determines real y = 430004 + 430008 switch (offset) { @@ -2025,21 +2040,15 @@ void namcos22_state::alpinesa_am(address_map &map) // DSPs -void namcos22_state::enable_slave_simulation(bool enable) -{ - m_slave_simulation_active = enable; -} - -void namcos22_state::slave_halt() +void namcos22_state::master_enable(bool enable) { - m_slave->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); - enable_slave_simulation(false); + m_master->set_input_line(INPUT_LINE_RESET, enable ? CLEAR_LINE : ASSERT_LINE); } -void namcos22_state::slave_enable() +void namcos22_state::slave_enable(bool enable) { -// m_slave->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); - enable_slave_simulation(true); + m_slave->set_input_line(INPUT_LINE_RESET, enable ? CLEAR_LINE : ASSERT_LINE); + m_slave_simulation_active = enable; } @@ -2118,27 +2127,20 @@ void namcos22_state::point_write(offs_t offs, uint32_t data) } } -int32_t namcos22_state::point_read(int32_t addr) +int32_t namcos22_state::pointram_read(offs_t offs) // called from point_read { - if (addr < 0) - return -1; - - // point rom - else if (addr < m_pointrom_size) - return m_pointrom[addr]; - // point ram, only used in ram test? int32_t result = 0; if (m_is_ss22) { - if (addr >= 0xf80000 && addr < 0xfa0000) - result = m_pointram[addr - 0xf80000]; + if (offs >= 0xf80000 && offs < 0xfa0000) + result = m_pointram[offs - 0xf80000]; else return -1; } else { - if (addr >= 0xf00000 && addr < 0xf20000) - result = m_pointram[addr - 0xf00000]; + if (offs >= 0xf00000 && offs < 0xf20000) + result = m_pointram[offs - 0xf00000]; else return -1; } @@ -2166,12 +2168,12 @@ WRITE16_MEMBER(namcos22_state::point_hiword_w) READ16_MEMBER(namcos22_state::point_loword_r) { - return point_read(m_point_address & 0x00ffffff) & 0xffff; + return point_read(m_point_address) & 0xffff; } READ16_MEMBER(namcos22_state::point_hiword_ir) { - return point_read(m_point_address++ & 0x00ffffff) >> 16 & 0xffff; + return point_read(m_point_address++) >> 16 & 0xffff; } @@ -2180,145 +2182,133 @@ READ16_MEMBER(namcos22_state::pdp_status_r) return m_dsp_master_bioz; } -uint32_t namcos22_state::pdp_polygonram_read(offs_t offs) +READ16_MEMBER(namcos22_state::pdp_begin_r) { - return m_polygonram[offs & 0x7fff]; -} + /** + * This presumably kickstarts the PDP(polygon display parser/processor?) + * It parses through the displaylist and sends commands to the 3D render device. + * In MAME, this main task is done in simulate_slavedsp instead. Ideally, we'd make the PDP a device with execute_run + * Super System 22 supports more than just "goto" and render commands, they are handled here. + */ + m_dsp_master_bioz = 1; + uint16_t offs = (m_is_ss22) ? pdp_polygonram_read(0x7fff) : m_pdp_base; -void namcos22_state::pdp_polygonram_write(offs_t offs, uint32_t data) -{ - m_polygonram[offs & 0x7fff] = data; -} + if (!m_is_ss22) + return 0; -READ16_MEMBER(namcos22_state::pdp_begin_r) -{ - /* this feature appears to be only used on Super System22 hardware */ - if (m_is_ss22) + for (;;) { - uint16_t offs = pdp_polygonram_read(0x7fff); - m_dsp_master_bioz = 1; - for (;;) + offs &= 0x7fff; + uint16_t start = offs; + uint16_t cmd = pdp_polygonram_read(offs++); + uint32_t srcAddr; + uint32_t dstAddr; + uint32_t numWords; + uint32_t data; + switch (cmd) { - uint16_t start = offs; - uint16_t cmd = pdp_polygonram_read(offs++); - uint32_t srcAddr; - uint32_t dstAddr; - uint32_t numWords; - uint32_t data; - switch (cmd) - { - case 0xfff0: - /* NOP? used in 'PDP LOOP TEST' */ - break; - - case 0xfff5: - /* write to point ram */ - dstAddr = pdp_polygonram_read(offs++); /* 32 bit PointRAM address */ - data = pdp_polygonram_read(offs++); /* 24 bit data */ - point_write(dstAddr, data); - break; + case 0xfff0: + // NOP? used in 'PDP LOOP TEST' + break; - case 0xfff6: - /* read word from point ram */ - srcAddr = pdp_polygonram_read(offs++); /* 32 bit PointRAM address */ - dstAddr = pdp_polygonram_read(offs++); /* CommRAM address; receives 24 bit PointRAM data */ - data = point_read(srcAddr & 0x00ffffff); - pdp_polygonram_write(dstAddr, data); - break; + case 0xfff5: + // write to point ram + dstAddr = pdp_polygonram_read(offs++); // 32 bit PointRAM address + data = pdp_polygonram_read(offs++); // 24 bit data + point_write(dstAddr, data); + break; - case 0xfff7: - /* block move (CommRAM to CommRAM) */ - srcAddr = pdp_polygonram_read(offs++); - dstAddr = pdp_polygonram_read(offs++); - numWords = pdp_polygonram_read(offs++); - while (numWords--) - { - data = pdp_polygonram_read(srcAddr++); - pdp_polygonram_write(dstAddr++, data); - } - break; + case 0xfff6: + /* read word from point ram */ + srcAddr = pdp_polygonram_read(offs++); // 32 bit PointRAM address + dstAddr = pdp_polygonram_read(offs++); // CommRAM address; receives 24 bit PointRAM data + data = point_read(srcAddr); + pdp_polygonram_write(dstAddr, data); + break; - case 0xfffa: - /* read block from point ram */ - srcAddr = pdp_polygonram_read(offs++); /* 32 bit PointRAM address */ - dstAddr = pdp_polygonram_read(offs++); /* CommRAM address; receives data */ - numWords = pdp_polygonram_read(offs++); /* block size */ - while (numWords--) - { - data = point_read(srcAddr++ & 0x00ffffff); - pdp_polygonram_write(dstAddr++, data); - } - break; + case 0xfff7: + // block move (CommRAM to CommRAM) + srcAddr = pdp_polygonram_read(offs++); + dstAddr = pdp_polygonram_read(offs++); + numWords = pdp_polygonram_read(offs++); + while (numWords--) + { + data = pdp_polygonram_read(srcAddr++); + pdp_polygonram_write(dstAddr++, data); + } + break; - case 0xfffb: - /* write block to point ram */ - dstAddr = pdp_polygonram_read(offs++); /* 32 bit PointRAM address */ - numWords = pdp_polygonram_read(offs++); /* block size */ - while (numWords--) - { - data = pdp_polygonram_read(offs++); /* 24 bit source data */ - point_write(dstAddr++, data); - } - break; + case 0xfffa: + // read block from point ram + srcAddr = pdp_polygonram_read(offs++); // 32 bit PointRAM address + dstAddr = pdp_polygonram_read(offs++); // CommRAM address; receives data + numWords = pdp_polygonram_read(offs++); // block size + while (numWords--) + { + data = point_read(srcAddr++); + pdp_polygonram_write(dstAddr++, data); + } + break; - case 0xfffc: - /* point ram to point ram */ - srcAddr = pdp_polygonram_read(offs++); - dstAddr = pdp_polygonram_read(offs++); - numWords = pdp_polygonram_read(offs++); - while (numWords--) - { - data = point_read(srcAddr++ & 0x00ffffff); - point_write(dstAddr++, data); - } - break; + case 0xfffb: + // write block to point ram + dstAddr = pdp_polygonram_read(offs++); // 32 bit PointRAM address + numWords = pdp_polygonram_read(offs++); // block size + while (numWords--) + { + data = pdp_polygonram_read(offs++); // 24 bit source data + point_write(dstAddr++, data); + } + break; - case 0xfffd: - /* direct command to render device */ - // len -> command (eg. BB0003) -> data - numWords = pdp_polygonram_read(offs++); - while (numWords--) - { - data = pdp_polygonram_read(offs++); - //namcos22_WriteDataToRenderDevice(data); - } - break; + case 0xfffc: + // point ram to point ram + srcAddr = pdp_polygonram_read(offs++); + dstAddr = pdp_polygonram_read(offs++); + numWords = pdp_polygonram_read(offs++); + while (numWords--) + { + data = point_read(srcAddr++); + point_write(dstAddr++, data); + } + break; - case 0xfffe: - /* unknown */ - data = pdp_polygonram_read(offs++); /* ??? (usually 0x400 or 0) */ - break; + case 0xfffd: + // direct command to render device + // len -> command (eg. BB0003) -> data + numWords = pdp_polygonram_read(offs++); + while (numWords--) + { + data = pdp_polygonram_read(offs++); + //namcos22_WriteDataToRenderDevice(data); + } + break; - case 0xffff: - /* "goto" command */ - offs = pdp_polygonram_read(offs); - if (offs == start) - { - /* most commands end with a "goto self" */ - return 0; - } - break; + case 0xfffe: + // unknown + data = pdp_polygonram_read(offs++); // ??? (usually 0x400 or 0) + break; - default: - logerror("unknown PDP cmd = 0x%04x!\n", cmd); + case 0xffff: + // "goto" command + offs = pdp_polygonram_read(offs) & 0x7fff; + if (offs == start) + { + // MAME will get stuck with a "goto self", so bail out + // in reality, the cpu can overwrite this address or retrigger pdp_begin return 0; - } + } + break; + + default: + logerror("unknown PDP cmd = 0x%04x!\n", cmd); + return 0; } } return 0; } -READ16_MEMBER(namcos22_state::slave_external_ram_r) -{ - return m_pSlaveExternalRAM[offset]; -} - -WRITE16_MEMBER(namcos22_state::slave_external_ram_w) -{ - COMBINE_DATA(&m_pSlaveExternalRAM[offset]); -} - READ16_MEMBER(namcos22_state::dsp_hold_signal_r) { /* STUB */ @@ -2344,6 +2334,7 @@ WRITE16_MEMBER(namcos22_state::dsp_unk2_w) * Prop Cycle doesn't use this; instead it writes this * addr to the uppermost word of CommRAM. */ + m_pdp_base = data; } READ16_MEMBER(namcos22_state::dsp_unk_port3_r) @@ -2363,7 +2354,7 @@ WRITE16_MEMBER(namcos22_state::upload_code_to_slave_dsp_w) switch (data) { case 0x00: - slave_halt(); + slave_enable(false); break; case 0x01: @@ -2375,7 +2366,7 @@ WRITE16_MEMBER(namcos22_state::upload_code_to_slave_dsp_w) break; case 0x03: - slave_enable(); + slave_enable(true); break; case 0x04: @@ -2383,7 +2374,7 @@ WRITE16_MEMBER(namcos22_state::upload_code_to_slave_dsp_w) case 0x10: /* serial i/o related? */ - slave_enable(); + slave_enable(true); break; default: @@ -2398,7 +2389,7 @@ WRITE16_MEMBER(namcos22_state::upload_code_to_slave_dsp_w) break; case NAMCOS22_DSP_UPLOAD_DATA: - m_pSlaveExternalRAM[m_UploadDestIdx & 0x1fff] = data; + m_slave_extram[m_UploadDestIdx & 0x1fff] = data; m_UploadDestIdx++; break; @@ -2425,16 +2416,6 @@ READ16_MEMBER(namcos22_state::dsp_upload_status_r) return 0x0000; } -READ16_MEMBER(namcos22_state::master_external_ram_r) -{ - return m_pMasterExternalRAM[offset]; -} - -WRITE16_MEMBER(namcos22_state::master_external_ram_w) -{ - COMBINE_DATA(&m_pMasterExternalRAM[offset]); -} - WRITE16_MEMBER(namcos22_state::slave_serial_io_w) { m_SerialDataSlaveToMasterNext = data; @@ -2447,37 +2428,22 @@ READ16_MEMBER(namcos22_state::master_serial_io_r) return m_SerialDataSlaveToMasterCurrent; } -TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::dsp_master_serial_irq) +INTERRUPT_GEN_MEMBER(namcos22_state::dsp_vblank_irq) { - int scanline = param; - if (m_dsp_irq_enabled) - { - m_SerialDataSlaveToMasterCurrent = m_SerialDataSlaveToMasterNext; - - if (scanline == 480) - { - m_master->set_input_line(TMS32025_INT0, HOLD_LINE); - } - else if ((scanline % 2) == 0) - { - m_master->set_input_line(TMS32025_RINT, HOLD_LINE); - m_master->set_input_line(TMS32025_XINT, HOLD_LINE); - } - } + device.execute().set_input_line(TMS32025_INT0, HOLD_LINE); } -TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::dsp_slave_serial_irq) +TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::dsp_serial_pulse) { - int scanline = param; - if (m_dsp_irq_enabled) { - if ((scanline % 2) == 0) - { - m_slave->set_input_line(TMS32025_RINT, HOLD_LINE); - m_slave->set_input_line(TMS32025_XINT, HOLD_LINE); - } + m_SerialDataSlaveToMasterCurrent = m_SerialDataSlaveToMasterNext; + + m_master->set_input_line(TMS32025_RINT, HOLD_LINE); + m_master->set_input_line(TMS32025_XINT, HOLD_LINE); + m_slave->set_input_line(TMS32025_RINT, HOLD_LINE); + m_slave->set_input_line(TMS32025_XINT, HOLD_LINE); } } @@ -2552,7 +2518,7 @@ void namcos22_state::master_dsp_program(address_map &map) void namcos22_state::master_dsp_data(address_map &map) { map(0x1000, 0x3fff).ram(); - map(0x4000, 0x7fff).r(FUNC(namcos22_state::master_external_ram_r)).w(FUNC(namcos22_state::master_external_ram_w)); + map(0x4000, 0x7fff).ram().share("masterextram"); map(0x8000, 0xffff).r(FUNC(namcos22_state::namcos22_dspram16_r)).w(FUNC(namcos22_state::namcos22_dspram16_w)); } @@ -2575,7 +2541,7 @@ void namcos22_state::master_dsp_io(address_map &map) } -READ16_MEMBER(namcos22_state::dsp_bioz_r) +READ16_MEMBER(namcos22_state::dsp_slave_bioz_r) { /* STUB */ return 1; @@ -2640,7 +2606,7 @@ void namcos22_state::slave_dsp_program(address_map &map) void namcos22_state::slave_dsp_data(address_map &map) { - map(0x8000, 0x9fff).rw(FUNC(namcos22_state::slave_external_ram_r), FUNC(namcos22_state::slave_external_ram_w)); + map(0x8000, 0x9fff).ram().share("slaveextram"); } void namcos22_state::slave_dsp_io(address_map &map) @@ -2691,18 +2657,6 @@ void namcos22_state::slave_dsp_io(address_map &map) // System 22 37702 -READ16_MEMBER(namcos22_state::s22mcu_shared_r) -{ - uint16_t *share16 = (uint16_t *)m_shareram.target(); - return share16[BYTE_XOR_BE(offset)]; -} - -WRITE16_MEMBER(namcos22_state::s22mcu_shared_w) -{ - uint16_t *share16 = (uint16_t *)m_shareram.target(); - COMBINE_DATA(&share16[BYTE_XOR_BE(offset)]); -} - READ8_MEMBER(namcos22_state::mcu_port4_s22_r) { // for C74, 0x10 selects sound MCU role, 0x00 selects control-reading role @@ -2718,7 +2672,7 @@ READ8_MEMBER(namcos22_state::iomcu_port4_s22_r) void namcos22_state::mcu_s22_program(address_map &map) { map(0x002000, 0x002fff).rw("c352", FUNC(c352_device::read), FUNC(c352_device::write)); - map(0x004000, 0x00bfff).rw(FUNC(namcos22_state::s22mcu_shared_r), FUNC(namcos22_state::s22mcu_shared_w)); + map(0x004000, 0x00bfff).ram().share("shareram"); map(0x080000, 0x0fffff).rom().region("mcu", 0); map(0x200000, 0x27ffff).rom().region("mcu", 0); map(0x280000, 0x2fffff).rom().region("mcu", 0); @@ -2750,12 +2704,12 @@ TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::mcu_irq) int scanline = param; /* TODO: real sources of these */ - if (scanline == 480) - m_mcu->set_input_line(M37710_LINE_IRQ0, HOLD_LINE); - else if (scanline == 500) + if (scanline == 0) m_mcu->set_input_line(M37710_LINE_ADC, HOLD_LINE); - else if (scanline == 0) + else if (scanline == 240) m_mcu->set_input_line(M37710_LINE_IRQ2, HOLD_LINE); + else if (scanline == 480) + m_mcu->set_input_line(M37710_LINE_IRQ0, HOLD_LINE); } @@ -2811,7 +2765,7 @@ READ8_MEMBER(namcos22_state::namcos22s_mcu_adc_r) void namcos22_state::mcu_program(address_map &map) { map(0x002000, 0x002fff).rw("c352", FUNC(c352_device::read), FUNC(c352_device::write)); - map(0x004000, 0x00bfff).rw(FUNC(namcos22_state::s22mcu_shared_r), FUNC(namcos22_state::s22mcu_shared_w)); + map(0x004000, 0x00bfff).ram().share("shareram"); map(0x00c000, 0x00ffff).rom().region("mcu", 0xc000); map(0x080000, 0x0fffff).rom().region("mcu", 0); map(0x200000, 0x27ffff).rom().region("mcu", 0); @@ -2834,30 +2788,22 @@ void namcos22_state::mcu_io(address_map &map) // custom input handling /* TODO: REMOVE (THIS IS HANDLED BY "IOMCU") */ -void namcos22_state::handle_coinage(int slots, int address_is_odd) +void namcos22_state::handle_coinage(uint16_t flags) { - uint16_t *share16 = (uint16_t *)m_shareram.target(); + int coin_state = (flags & 0x1000) >> 12 | (flags & 0x0200) >> 8; - uint32_t coin_state = ioport("INPUTS")->read() & 0x1200; - - if (!(coin_state & 0x1000) && (m_old_coin_state & 0x1000)) + if (!(coin_state & 1) && (m_old_coin_state & 1)) { m_credits1++; } - if (!(coin_state & 0x0200) && (m_old_coin_state & 0x0200)) + if (!(coin_state & 2) && (m_old_coin_state & 2)) { m_credits2++; } m_old_coin_state = coin_state; - - share16[BYTE_XOR_LE(0x38/2)] = m_credits1 << (address_is_odd*8); - - if (slots == 2) - { - share16[BYTE_XOR_LE(0x3e/2)] = m_credits2 << (address_is_odd*8); - } + m_shareram[0x3a/2] = m_credits1 << 8 | m_credits2; } /* TODO: REMOVE (THIS IS HANDLED BY "IOMCU") */ @@ -2866,8 +2812,6 @@ void namcos22_state::handle_driving_io() if (m_syscontrol[0x18] != 0) { uint16_t flags = ioport("INPUTS")->read(); - uint16_t coinram_address_is_odd = 0; - uint16_t gas = ioport("GAS")->read(); uint16_t brake = ioport("BRAKE")->read(); uint16_t steer = ioport("STEER")->read(); @@ -2894,8 +2838,6 @@ void namcos22_state::handle_driving_io() break; case NAMCOS22_VICTORY_LAP: - coinram_address_is_odd = 1; - // (fall through) case NAMCOS22_ACE_DRIVER: gas <<= 3; gas += 992; @@ -2912,10 +2854,11 @@ void namcos22_state::handle_driving_io() break; } - handle_coinage(2, coinram_address_is_odd); - m_shareram[0x000/4] = 0x10 << 16; /* SUB CPU ready */ - m_shareram[0x030/4] = (flags << 16) | steer; - m_shareram[0x034/4] = (gas << 16) | brake; + m_shareram[0x030/2] = flags; + m_shareram[0x032/2] = steer; + m_shareram[0x034/2] = gas; + m_shareram[0x036/2] = brake; + handle_coinage(flags); } } @@ -2925,17 +2868,17 @@ void namcos22_state::handle_cybrcomm_io() if (m_syscontrol[0x18] != 0) { uint16_t flags = ioport("INPUTS")->read(); - uint16_t volume0 = ioport("STICKY1")->read() * 0x10; uint16_t volume1 = ioport("STICKY2")->read() * 0x10; uint16_t volume2 = ioport("STICKX1")->read() * 0x10; uint16_t volume3 = ioport("STICKX2")->read() * 0x10; - m_shareram[0x030/4] = (flags << 16) | volume0; - m_shareram[0x034/4] = (volume1 << 16) | volume2; - m_shareram[0x038/4] = volume3 << 16; - - handle_coinage(1, 0); + m_shareram[0x030/2] = flags; + m_shareram[0x032/2] = volume0; + m_shareram[0x034/2] = volume1; + m_shareram[0x036/2] = volume2; + m_shareram[0x038/2] = volume3; + handle_coinage(flags); } } @@ -3197,7 +3140,6 @@ static INPUT_PORTS_START( raveracw ) PORT_MODIFY("INPUTS") PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("View Change") - PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no coin2 PORT_CONFNAME( 0x2100, 0x2000, DEF_STR( Cabinet ) ) // @ JAMMA pins PORT_CONFSETTING( 0x0000, "50 Inch" ) @@ -3232,13 +3174,13 @@ static INPUT_PORTS_START( cybrcomm ) end up needing to change again too Default key arrangement is based on dual-joystick 'Tank' arrangement found in Assault and CyberSled */ - PORT_START("STICKY1") /* VOLUME 0 */ + PORT_START("STICKY1") /* VOLUME 1 */ PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x47,0xb7) /* range based on test mode */ PORT_CODE_DEC(KEYCODE_I) PORT_CODE_INC(KEYCODE_K) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2) /* right joystick: vertical */ - PORT_START("STICKY2") /* VOLUME 0 */ - PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x47,0xb7) /* range based on test mode */ PORT_CODE_DEC(KEYCODE_E) PORT_CODE_INC(KEYCODE_D) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: vertical */ - PORT_START("STICKX1") /* VOLUME 0 */ + PORT_START("STICKX1") /* VOLUME 2 */ PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(0x47,0xb7) /* range based on test mode */ PORT_CODE_DEC(KEYCODE_J) PORT_CODE_INC(KEYCODE_L) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2) /* right joystick: horizontal */ - PORT_START("STICKX2") /* VOLUME 0 */ + PORT_START("STICKY2") /* VOLUME 3 */ + PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x47,0xb7) /* range based on test mode */ PORT_CODE_DEC(KEYCODE_E) PORT_CODE_INC(KEYCODE_D) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: vertical */ + PORT_START("STICKX2") /* VOLUME 4 */ PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(0x47,0xb7) /* range based on test mode */ PORT_CODE_DEC(KEYCODE_S) PORT_CODE_INC(KEYCODE_F) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: horizontal */ PORT_START("DSW0") @@ -3364,7 +3306,7 @@ static INPUT_PORTS_START( alpiner ) PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) PORT_NAME("Steps Swing") PORT_START("ADC.1") - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) PORT_NAME("Steps Edge") + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) PORT_PLAYER(2) PORT_NAME("Steps Edge") INPUT_PORTS_END static INPUT_PORTS_START( airco22 ) @@ -3384,22 +3326,22 @@ static INPUT_PORTS_START( airco22 ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_SERVICE( 0x08, IP_ACTIVE_LOW ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) /* Missile */ - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) /* Gun */ - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Missile Button") + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Gun Trigger") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 ) // also view-change function PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("MCUP5B") PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("ADC.0") - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x40, 0xc0) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x40, 0xc0) PORT_SENSITIVITY(100) PORT_KEYDELTA(3) PORT_START("ADC.1") - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x40, 0xc0) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x40, 0xc0) PORT_SENSITIVITY(100) PORT_KEYDELTA(3) - PORT_START("ADC.2") - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Z ) PORT_MINMAX(0x40, 0xc0) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) + PORT_START("ADC.2") // throttle stick auto-centers + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Z ) PORT_MINMAX(0x40, 0xc0) PORT_SENSITIVITY(100) PORT_KEYDELTA(3) PORT_NAME("Throttle Stick") INPUT_PORTS_END static INPUT_PORTS_START( cybrcycc ) @@ -3722,12 +3664,12 @@ static const gfx_layout namcos22_cg_layout = #undef XOR static GFXDECODE_START( gfx_namcos22 ) - GFXDECODE_ENTRY( nullptr, 0, namcos22_cg_layout, 0, 0x800 ) + GFXDECODE_ENTRY( nullptr, 0, namcos22_cg_layout, 0, 0x800 ) GFXDECODE_ENTRY( "textile", 0, texture_tile_layout, 0, 0x80 ) GFXDECODE_END static GFXDECODE_START( gfx_super ) - GFXDECODE_ENTRY( nullptr, 0, namcos22_cg_layout, 0, 0x800 ) + GFXDECODE_ENTRY( nullptr, 0, namcos22_cg_layout, 0, 0x800 ) GFXDECODE_ENTRY( "textile", 0, texture_tile_layout, 0, 0x80 ) GFXDECODE_ENTRY( "sprite", 0, sprite_layout, 0, 0x80 ) GFXDECODE_END @@ -3735,8 +3677,10 @@ GFXDECODE_END void namcos22_state::machine_reset() { - m_master->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); - m_slave->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); + master_enable(false); + slave_enable(false); + m_dsp_irq_enabled = false; + if (!m_is_ss22) m_iomcu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); m_mcu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); m_poly->reset(); @@ -3746,7 +3690,6 @@ void namcos22_state::machine_start() { m_led.resolve(); m_cpuled.resolve(); - m_slave_simulation_active = false; m_portbits[0] = 0xffff; m_portbits[1] = 0xffff; } @@ -3755,11 +3698,11 @@ void namcos22_state::machine_start() MACHINE_CONFIG_START(namcos22_state::namcos22) /* basic machine hardware */ - MCFG_DEVICE_ADD("maincpu", M68020,SS22_MASTER_CLOCK/2) /* 25 MHz? */ + MCFG_DEVICE_ADD("maincpu", M68020, 49.152_MHz_XTAL/2) // MC68020RP25E MCFG_DEVICE_PROGRAM_MAP(namcos22_am) MCFG_DEVICE_VBLANK_INT_DRIVER("screen", namcos22_state, namcos22_interrupt) - tms32025_device& master(TMS32025(config, m_master, SS22_MASTER_CLOCK)); /* ? */ + tms32025_device& master(TMS32025(config, m_master, 40_MHz_XTAL)); master.set_addrmap(AS_PROGRAM, &namcos22_state::master_dsp_program); master.set_addrmap(AS_DATA, &namcos22_state::master_dsp_data); master.set_addrmap(AS_IO, &namcos22_state::master_dsp_io); @@ -3768,26 +3711,24 @@ MACHINE_CONFIG_START(namcos22_state::namcos22) master.hold_ack_out_cb().set(FUNC(namcos22_state::dsp_hold_ack_w)); master.xf_out_cb().set(FUNC(namcos22_state::dsp_xf_output_w)); master.dr_in_cb().set(FUNC(namcos22_state::master_serial_io_r)); + master.set_vblank_int("screen", FUNC(namcos22_state::dsp_vblank_irq)); + MCFG_TIMER_DRIVER_ADD_PERIODIC("dsp_serial", namcos22_state, dsp_serial_pulse, attotime::from_hz(SERIAL_IO_PERIOD)) - MCFG_TIMER_DRIVER_ADD_SCANLINE("master_st", namcos22_state, dsp_master_serial_irq, "screen", 0, 1) - - tms32025_device& slave(TMS32025(config, m_slave, SS22_MASTER_CLOCK)); /* ? */ + tms32025_device& slave(TMS32025(config, m_slave, 40_MHz_XTAL)); slave.set_addrmap(AS_PROGRAM, &namcos22_state::slave_dsp_program); slave.set_addrmap(AS_DATA, &namcos22_state::slave_dsp_data); slave.set_addrmap(AS_IO, &namcos22_state::slave_dsp_io); - slave.bio_in_cb().set(FUNC(namcos22_state::dsp_bioz_r)); + slave.bio_in_cb().set(FUNC(namcos22_state::dsp_slave_bioz_r)); slave.hold_in_cb().set(FUNC(namcos22_state::dsp_hold_signal_r)); slave.hold_ack_out_cb().set(FUNC(namcos22_state::dsp_hold_ack_w)); slave.xf_out_cb().set(FUNC(namcos22_state::dsp_xf_output_w)); slave.dx_out_cb().set(FUNC(namcos22_state::slave_serial_io_w)); - MCFG_TIMER_DRIVER_ADD_SCANLINE("slave_st", namcos22_state, dsp_slave_serial_irq, "screen", 0, 1) - - MCFG_DEVICE_ADD("mcu", NAMCO_C74, SS22_MASTER_CLOCK/3) // C74 on the CPU board has no periodic interrupts, it runs entirely off Timer A0 + MCFG_DEVICE_ADD("mcu", NAMCO_C74, 49.152_MHz_XTAL/3) // C74 on the CPU board has no periodic interrupts, it runs entirely off Timer A0 MCFG_DEVICE_PROGRAM_MAP( mcu_s22_program) MCFG_DEVICE_IO_MAP( mcu_s22_io) - MCFG_DEVICE_ADD("iomcu", NAMCO_C74, XTAL(6'144'000)) // 6.144MHz XTAL on I/O board, not sure if it has a divider + MCFG_DEVICE_ADD("iomcu", NAMCO_C74, 6.144_MHz_XTAL) MCFG_DEVICE_PROGRAM_MAP( iomcu_s22_program) MCFG_DEVICE_IO_MAP( iomcu_s22_io) @@ -3795,7 +3736,7 @@ MACHINE_CONFIG_START(namcos22_state::namcos22) /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) -// MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE) + //MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE) MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, HTOTAL, HBEND, HBSTART, VTOTAL, VBEND, VBSTART) MCFG_SCREEN_UPDATE_DRIVER(namcos22_state, screen_update_namcos22) @@ -3806,7 +3747,7 @@ MACHINE_CONFIG_START(namcos22_state::namcos22) SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); - MCFG_DEVICE_ADD("c352", C352, SS22_MASTER_CLOCK/2, 288) + MCFG_DEVICE_ADD("c352", C352, 49.152_MHz_XTAL/2, 288) MCFG_SOUND_ROUTE(0, "lspeaker", 1.00) MCFG_SOUND_ROUTE(1, "rspeaker", 1.00) MACHINE_CONFIG_END @@ -3814,8 +3755,8 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::cybrcomm) namcos22(config); - SPEAKER(config, "rear_left", -0.2, 0.0, -0.5); - SPEAKER(config, "rear_right", 0.2, 0.0, -0.5); + SPEAKER(config, "rear_left").rear_left(); + SPEAKER(config, "rear_right").rear_right(); MCFG_DEVICE_MODIFY("c352") MCFG_SOUND_ROUTE(2, "rear_left", 1.00) @@ -3826,11 +3767,11 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::namcos22s) /* basic machine hardware */ - MCFG_DEVICE_ADD("maincpu", M68EC020,SS22_MASTER_CLOCK/2) + MCFG_DEVICE_ADD("maincpu", M68EC020, 49.152_MHz_XTAL/2) // MC68EC020FG25 MCFG_DEVICE_PROGRAM_MAP(namcos22s_am) MCFG_DEVICE_VBLANK_INT_DRIVER("screen", namcos22_state, namcos22s_interrupt) - tms32025_device& master(TMS32025(config, m_master, SS22_MASTER_CLOCK)); + tms32025_device& master(TMS32025(config, m_master, 40_MHz_XTAL)); master.set_addrmap(AS_PROGRAM, &namcos22_state::master_dsp_program); master.set_addrmap(AS_DATA, &namcos22_state::master_dsp_data); master.set_addrmap(AS_IO, &namcos22_state::master_dsp_io); @@ -3839,33 +3780,29 @@ MACHINE_CONFIG_START(namcos22_state::namcos22s) master.hold_ack_out_cb().set(FUNC(namcos22_state::dsp_hold_ack_w)); master.xf_out_cb().set(FUNC(namcos22_state::dsp_xf_output_w)); master.dr_in_cb().set(FUNC(namcos22_state::master_serial_io_r)); + master.set_vblank_int("screen", FUNC(namcos22_state::dsp_vblank_irq)); + MCFG_TIMER_DRIVER_ADD_PERIODIC("dsp_serial", namcos22_state, dsp_serial_pulse, attotime::from_hz(SERIAL_IO_PERIOD)) - MCFG_TIMER_DRIVER_ADD_SCANLINE("master_st", namcos22_state, dsp_master_serial_irq, "screen", 0, 1) - - tms32025_device& slave(TMS32025(config, m_slave, SS22_MASTER_CLOCK)); + tms32025_device& slave(TMS32025(config, m_slave, 40_MHz_XTAL)); slave.set_addrmap(AS_PROGRAM, &namcos22_state::slave_dsp_program); slave.set_addrmap(AS_DATA, &namcos22_state::slave_dsp_data); slave.set_addrmap(AS_IO, &namcos22_state::slave_dsp_io); - slave.bio_in_cb().set(FUNC(namcos22_state::dsp_bioz_r)); + slave.bio_in_cb().set(FUNC(namcos22_state::dsp_slave_bioz_r)); slave.hold_in_cb().set(FUNC(namcos22_state::dsp_hold_signal_r)); slave.hold_ack_out_cb().set(FUNC(namcos22_state::dsp_hold_ack_w)); slave.xf_out_cb().set(FUNC(namcos22_state::dsp_xf_output_w)); slave.dx_out_cb().set(FUNC(namcos22_state::slave_serial_io_w)); - MCFG_TIMER_DRIVER_ADD_SCANLINE("slave_st", namcos22_state, dsp_slave_serial_irq, "screen", 0, 1) - - MCFG_DEVICE_ADD("mcu", M37710S4, SS22_MASTER_CLOCK/3) + MCFG_DEVICE_ADD("mcu", M37710S4, 49.152_MHz_XTAL/3) MCFG_DEVICE_PROGRAM_MAP(mcu_program) MCFG_DEVICE_IO_MAP(mcu_io) - MCFG_TIMER_DRIVER_ADD_SCANLINE("mcu_st", namcos22_state, mcu_irq, "screen", 0, 1) + MCFG_TIMER_DRIVER_ADD_SCANLINE("mcu_irq", namcos22_state, mcu_irq, "screen", 0, 240) - MCFG_QUANTUM_TIME(attotime::from_hz(6000)) -// MCFG_QUANTUM_PERFECT_CPU("maincpu") EEPROM_2864(config, "eeprom"); /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) -// MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE) + //MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE) MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, HTOTAL, HBEND, HBSTART, VTOTAL, VBEND, VBSTART) MCFG_SCREEN_UPDATE_DRIVER(namcos22_state, screen_update_namcos22s) @@ -3876,7 +3813,7 @@ MACHINE_CONFIG_START(namcos22_state::namcos22s) SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); - MCFG_DEVICE_ADD("c352", C352, SS22_MASTER_CLOCK/2, 288) + MCFG_DEVICE_ADD("c352", C352, 49.152_MHz_XTAL/2, 288) MCFG_SOUND_ROUTE(0, "lspeaker", 1.00) MCFG_SOUND_ROUTE(1, "rspeaker", 1.00) MACHINE_CONFIG_END @@ -3884,10 +3821,10 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::airco22b) namcos22s(config); - SPEAKER(config, "bodysonic").front_center(); + SPEAKER(config, "bodysonic").subwoofer(); MCFG_DEVICE_MODIFY("c352") - MCFG_SOUND_ROUTE(2, "bodysonic", 0.50) + MCFG_SOUND_ROUTE(2, "bodysonic", 0.50) // to subwoofer MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::alpine) @@ -3911,7 +3848,7 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::cybrcycc) namcos22s(config); - SPEAKER(config, "tank").front_center(); + SPEAKER(config, "tank", 0.0, 0.0, 0.0); MCFG_DEVICE_MODIFY("c352") MCFG_SOUND_ROUTE(2, "tank", 1.00) @@ -3920,12 +3857,10 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::dirtdash) namcos22s(config); - SPEAKER(config, "road").front_center(); - SPEAKER(config, "under").front_center(); + SPEAKER(config, "road", 0.0, 0.0, 0.0); MCFG_DEVICE_MODIFY("c352") - MCFG_SOUND_ROUTE(2, "road", 1.00) - MCFG_SOUND_ROUTE(3, "under", 0.50) // from sound test + MCFG_SOUND_ROUTE(3, "road", 1.00) MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::timecris) @@ -3939,12 +3874,12 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::tokyowar) namcos22s(config); - SPEAKER(config, "seat", 0.0, 0.0, 0.0); - SPEAKER(config, "vibration", 0.0, 0.0, 0.0); + SPEAKER(config, "vibration").subwoofer(); + SPEAKER(config, "seat").rear_center(); MCFG_DEVICE_MODIFY("c352") + MCFG_SOUND_ROUTE(2, "vibration", 0.50) // to "bass shaker" MCFG_SOUND_ROUTE(3, "seat", 1.00) - MCFG_SOUND_ROUTE(2, "vibration", 0.50) MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::propcycl) @@ -3996,14 +3931,14 @@ ROM_START( ridgerac ) ROM_LOAD( "rr1data.6r", 0, 0x080000, CRC(18f5f748) SHA1(e0d149a66de36156edd9b55f604c9a9801aaefa8) ) ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) )//,CRC(d1b0eec6) SHA1(f66922c324dfc3ff408db7556c587ef90ca64c3b) ) - ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) )//,CRC(bb695d89) SHA1(557bac9d2718519c1f69e374d0ef9a86a43fe86c) ) - ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) )//,CRC(8f374c0a) SHA1(94ff8581de11a03ef86525155f8433bf5858b980) ) - ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) )//,CRC(072a5c47) SHA1(86b8e973ae6b78197d685fe6d14722d8e2d0dfec) ) + ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) + ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) + ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) + ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) )//,CRC(c15cb257) SHA1(0cb8f231c62ea37955be5d452a436a6e815af8e8) ) - ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) )//,CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) + ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) + ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ ROM_LOAD( "rr1potl0.5b", 0x80000*0, 0x80000,CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) @@ -4042,14 +3977,14 @@ ROM_START( ridgeracb ) ROM_LOAD( "rr1data.6r", 0, 0x080000, CRC(18f5f748) SHA1(e0d149a66de36156edd9b55f604c9a9801aaefa8) ) ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) )//,CRC(d1b0eec6) SHA1(f66922c324dfc3ff408db7556c587ef90ca64c3b) ) - ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) )//,CRC(bb695d89) SHA1(557bac9d2718519c1f69e374d0ef9a86a43fe86c) ) - ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) )//,CRC(8f374c0a) SHA1(94ff8581de11a03ef86525155f8433bf5858b980) ) - ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) )//,CRC(072a5c47) SHA1(86b8e973ae6b78197d685fe6d14722d8e2d0dfec) ) + ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) + ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) + ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) + ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) )//,CRC(c15cb257) SHA1(0cb8f231c62ea37955be5d452a436a6e815af8e8) ) - ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) )//,CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) + ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) + ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ ROM_LOAD( "rr1potl0.5b", 0x80000*0, 0x80000,CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) @@ -4088,14 +4023,14 @@ ROM_START( ridgeracj ) ROM_LOAD( "rr1data.6r", 0, 0x080000, CRC(18f5f748) SHA1(e0d149a66de36156edd9b55f604c9a9801aaefa8) ) ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) )//,CRC(d1b0eec6) SHA1(f66922c324dfc3ff408db7556c587ef90ca64c3b) ) - ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) )//,CRC(bb695d89) SHA1(557bac9d2718519c1f69e374d0ef9a86a43fe86c) ) - ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) )//,CRC(8f374c0a) SHA1(94ff8581de11a03ef86525155f8433bf5858b980) ) - ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) )//,CRC(072a5c47) SHA1(86b8e973ae6b78197d685fe6d14722d8e2d0dfec) ) + ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) + ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) + ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) + ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) )//,CRC(c15cb257) SHA1(0cb8f231c62ea37955be5d452a436a6e815af8e8) ) - ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) )//,CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) + ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) + ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ ROM_LOAD( "rr1potl0.5b", 0x80000*0, 0x80000,CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) @@ -4134,14 +4069,14 @@ ROM_START( ridgerac3 ) ROM_LOAD( "rr1data.6r", 0, 0x080000, CRC(18f5f748) SHA1(e0d149a66de36156edd9b55f604c9a9801aaefa8) ) ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) )//,CRC(d1b0eec6) SHA1(f66922c324dfc3ff408db7556c587ef90ca64c3b) ) - ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) )//,CRC(bb695d89) SHA1(557bac9d2718519c1f69e374d0ef9a86a43fe86c) ) - ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) )//,CRC(8f374c0a) SHA1(94ff8581de11a03ef86525155f8433bf5858b980) ) - ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) )//,CRC(072a5c47) SHA1(86b8e973ae6b78197d685fe6d14722d8e2d0dfec) ) + ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) + ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) + ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) + ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) )//,CRC(c15cb257) SHA1(0cb8f231c62ea37955be5d452a436a6e815af8e8) ) - ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) )//,CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) + ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) + ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ ROM_LOAD( "rr1potl0.5b", 0x80000*0, 0x80000,CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) diff --git a/src/mame/drivers/nanos.cpp b/src/mame/drivers/nanos.cpp index decc7342ede..38c2a6db01a 100644 --- a/src/mame/drivers/nanos.cpp +++ b/src/mame/drivers/nanos.cpp @@ -515,7 +515,7 @@ MACHINE_CONFIG_START(nanos_state::nanos) m_pio->out_pb_callback().set(FUNC(nanos_state::port_b_w)); /* UPD765 */ - MCFG_UPD765A_ADD(m_fdc, false, true) + UPD765A(config, m_fdc, false, true); MCFG_FLOPPY_DRIVE_ADD(m_floppy, nanos_floppies, "525hd", nanos_state::floppy_formats) /* internal ram */ diff --git a/src/mame/drivers/nc.cpp b/src/mame/drivers/nc.cpp index 6b622164f45..9e3ad119c76 100644 --- a/src/mame/drivers/nc.cpp +++ b/src/mame/drivers/nc.cpp @@ -1260,7 +1260,7 @@ void nc200_state::nc200_io(address_map &map) map(0xb0, 0xb9).r(FUNC(nc200_state::nc_key_data_in_r)); map(0xc0, 0xc1).rw(m_uart, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xd0, 0xd1).rw("mc", FUNC(mc146818_device::read), FUNC(mc146818_device::write)); - map(0xe0, 0xe1).m("upd765", FUNC(upd765a_device::map)); + map(0xe0, 0xe1).m(m_fdc, FUNC(upd765a_device::map)); } static INPUT_PORTS_START(nc200) @@ -1482,8 +1482,8 @@ MACHINE_CONFIG_START(nc200_state::nc200) m_uart->rxrdy_handler().set(FUNC(nc200_state::nc200_rxrdy_callback)); m_uart->txrdy_handler().set(FUNC(nc200_state::nc200_txrdy_callback)); - MCFG_UPD765A_ADD("upd765", true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, nc200_state, nc200_fdc_interrupt)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set(FUNC(nc200_state::nc200_fdc_interrupt)); MCFG_FLOPPY_DRIVE_ADD("upd765:0", ibmpc_floppies, "525dd", ibmpc_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765:1", ibmpc_floppies, "525dd", ibmpc_floppy_formats) diff --git a/src/mame/drivers/neogeo.cpp b/src/mame/drivers/neogeo.cpp index 35d242c225f..f607b266cb5 100644 --- a/src/mame/drivers/neogeo.cpp +++ b/src/mame/drivers/neogeo.cpp @@ -1963,7 +1963,8 @@ MACHINE_CONFIG_START(neogeo_base_state::neogeo_stereo) MACHINE_CONFIG_END -MACHINE_CONFIG_START(ngarcade_base_state::neogeo_arcade) +void ngarcade_base_state::neogeo_arcade(machine_config &config) +{ neogeo_base(config); m_maincpu->set_addrmap(AS_PROGRAM, &ngarcade_base_state::neogeo_main_map); @@ -1973,10 +1974,10 @@ MACHINE_CONFIG_START(ngarcade_base_state::neogeo_arcade) WATCHDOG_TIMER(config, "watchdog").set_time(attotime::from_ticks(3244030, NEOGEO_MASTER_CLOCK)); - MCFG_UPD4990A_ADD("upd4990a", XTAL(32'768), NOOP, NOOP) + UPD4990A(config, m_upd4990a); NVRAM(config, "saveram", nvram_device::DEFAULT_ALL_0); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(ngarcade_base_state::neogeo_mono) @@ -6701,6 +6702,41 @@ ROM_START( mslug ) ROM_END /**************************************** + Nazca development cartridge, purpose unknown + + MVS-TEMP (Program ROMs, also a HD64180SCP10, no S1 ROM) + TENP0 SND (tiny board with only M1 ROM) +****************************************/ + +ROM_START( mvstemp ) + ROM_REGION( 0x200000, "cslot1:maincpu", ROMREGION_BE|ROMREGION_16BIT ) + ROM_LOAD16_BYTE( "mvs-ph", 0x00000, 0x10000, CRC(c461c209) SHA1(baeb27b0c4cc05d0a692325687208d47933ae841)) + ROM_LOAD16_BYTE( "mvs-pl", 0x00001, 0x10000, CRC(f82c3595) SHA1(5af628377d445e1494e695bbb45795d65f3a42e7) ) + + ROM_REGION( 0x20000, "cslot1:fixed", ROMREGION_ERASE00 ) + // No S1 data (no position for it) + + ROM_REGION( 0x20000, "fixedbios", 0 ) + ROM_LOAD( "sfix.sfix", 0x000000, 0x20000, CRC(c2ea0cfd) SHA1(fd4a618cdcdbf849374f0a50dd8efe9dbab706c3) ) // BIOS + ROM_Y_ZOOM + + NEO_BIOS_AUDIO_64K( "s-800h", CRC(307fffb2) SHA1(0a7a21c2f1a1f245de59d588f20b5ffea522a949) ) + + ROM_REGION( 0x200000, "cslot1:hd64180", 0 ) // HD64180SCP10 program, not hooked up + ROM_LOAD( "mvs64p", 0x000000, 0x10000, CRC(42a1d73a) SHA1(cb82a73f087ed6ca936dbe36a0a85451e63c9c8c) ) + + ROM_REGION( 0x117, "cslot1:pld", 0 ) + ROM_LOAD( "ic6.bin", 0x000, 0x117, CRC(7e3da063) SHA1(2778932f8d4c48101c728e2f1906e54f8d73ff90) ) + ROM_LOAD( "ic12.bin", 0x000, 0x117, CRC(b4f3c5ae) SHA1(61a1cda077c6998f0427922b1d229ef05e65e6ee) ) + + ROM_REGION( 0x800000, "cslot1:ymsnd", ROMREGION_ERASE00 ) + // No V data (no positions for it) + + ROM_REGION( 0x1000000, "cslot1:sprites", ROMREGION_ERASE00 ) + // No C data (no positions for it) +ROM_END + +/**************************************** ID-0202 . ??M-202 NEO-MVS PROG 4096 / NEO-MVS CHA 42G-2 @@ -11811,6 +11847,7 @@ GAME( 1991, bakatono, neogeo, neogeo_mj, neogeo_mj, mvs_led_state, empty_ini // Nazca (later acquired by SNK) GAME( 1996, turfmast, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Nazca", "Neo Turf Masters / Big Tournament Golf", MACHINE_SUPPORTS_SAVE ) GAME( 1996, mslug, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Nazca", "Metal Slug - Super Vehicle-001", MACHINE_SUPPORTS_SAVE ) +GAME( 1995?,mvstemp, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Nazca", "MVS-TEMP 'SubSystem Ver1.4' (Nazca development board)", MACHINE_NOT_WORKING ) // NMK GAME( 1994, zedblade, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "NMK", "Zed Blade / Operation Ragnarok", MACHINE_SUPPORTS_SAVE ) @@ -11840,7 +11877,7 @@ GAME( 1996, wakuwak7, neogeo, neobase, neogeo, mvs_led_state, empty_ini // Taito GAME( 1994, pbobblen, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Taito", "Puzzle Bobble / Bust-A-Move (Neo-Geo, NGM-083)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, pbobblenb, pbobblen, neobase, neogeo, mvs_led_state, empty_init, ROT0, "bootleg", "Puzzle Bobble / Bust-A-Move (Neo-Geo, bootleg)", MACHINE_SUPPORTS_SAVE ) -GAME( 1999, pbobbl2n, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Taito (SNK license)", "Puzzle Bobble 2 / Bust-A-Move Again (Neo-Geo)", MACHINE_SUPPORTS_SAVE ) +GAME( 1999, pbobbl2n, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Taito (SNK license)", "Puzzle Bobble 2 / Bust-A-Move Again (Neo-Geo)", MACHINE_SUPPORTS_SAVE ) // ported to Neo-Geo by SNK, original version is on Taito F3 GAME( 2003, pnyaa, neogeo, pnyaa, neogeo, mvs_led_state, empty_init, ROT0, "Aiky / Taito", "Pochi and Nyaa (Ver 2.02)", MACHINE_SUPPORTS_SAVE ) // this version does not show the web address on the title screen GAME( 2003, pnyaaa, pnyaa, pnyaa, neogeo, mvs_led_state, empty_init, ROT0, "Aiky / Taito", "Pochi and Nyaa (Ver 2.00)", MACHINE_SUPPORTS_SAVE ) @@ -11868,12 +11905,12 @@ GAME( 1995, froman2b, neogeo, neobase, neogeo, mvs_led_state, empty_ini // Visco GAME( 1992, androdun, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Andro Dunos (NGM-049 ~ NGH-049)", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, puzzledp, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Taito (Visco license)", "Puzzle De Pon!", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, neomrdo, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Neo Mr. Do!", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, puzzledp, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Puzzle De Pon!", MACHINE_SUPPORTS_SAVE ) // game concept licensed from Taito +GAME( 1996, neomrdo, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Neo Mr. Do!", MACHINE_SUPPORTS_SAVE ) // game concept licensed from Universal GAME( 1995, goalx3, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Goal! Goal! Goal!", MACHINE_SUPPORTS_SAVE ) GAME( 1996, neodrift, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Neo Drift Out - New Technology", MACHINE_SUPPORTS_SAVE ) GAME( 1996, breakers, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Breakers", MACHINE_SUPPORTS_SAVE ) -GAME( 1997, puzzldpr, puzzledp, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Taito (Visco license)", "Puzzle De Pon! R!", MACHINE_SUPPORTS_SAVE ) +GAME( 1997, puzzldpr, puzzledp, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Puzzle De Pon! R!", MACHINE_SUPPORTS_SAVE ) // game concept licensed from Taito GAME( 1998, breakrev, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Breakers Revenge", MACHINE_SUPPORTS_SAVE ) GAME( 1998, flipshot, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Battle Flip Shot", MACHINE_SUPPORTS_SAVE ) GAME( 1999, ctomaday, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Captain Tomaday", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/neoprint.cpp b/src/mame/drivers/neoprint.cpp index 3f9559bd9b2..2b915d80eca 100644 --- a/src/mame/drivers/neoprint.cpp +++ b/src/mame/drivers/neoprint.cpp @@ -509,7 +509,7 @@ MACHINE_CONFIG_START(neoprint_state::neoprint) MCFG_DEVICE_PROGRAM_MAP(neoprint_audio_map) MCFG_DEVICE_IO_MAP(neoprint_audio_io_map) - MCFG_UPD4990A_ADD("upd4990a", XTAL(32'768), NOOP, NOOP) + UPD4990A(config, m_upd4990a); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_neoprint) @@ -553,7 +553,7 @@ MACHINE_CONFIG_START(neoprint_state::nprsp) MCFG_DEVICE_PROGRAM_MAP(neoprint_audio_map) MCFG_DEVICE_IO_MAP(neoprint_audio_io_map) - MCFG_UPD4990A_ADD("upd4990a", XTAL(32'768), NOOP, NOOP) + UPD4990A(config, m_upd4990a); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_neoprint) diff --git a/src/mame/drivers/next.cpp b/src/mame/drivers/next.cpp index a9c834fc83b..bc962a26910 100644 --- a/src/mame/drivers/next.cpp +++ b/src/mame/drivers/next.cpp @@ -1055,9 +1055,9 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(next_state::next_fdc_base) next_base(config); - MCFG_N82077AA_ADD("fdc", n82077aa_device::MODE_PS2) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, next_state, fdc_irq)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, next_state, fdc_drq)) + N82077AA(config, fdc, n82077aa_device::MODE_PS2); + fdc->intrq_wr_callback().set(FUNC(next_state::fdc_irq)); + fdc->drq_wr_callback().set(FUNC(next_state::fdc_drq)); MCFG_FLOPPY_DRIVE_ADD("fdc:0", next_floppies, "35ed", next_state::floppy_formats) // software list diff --git a/src/mame/drivers/norautp.cpp b/src/mame/drivers/norautp.cpp index f61a2f43e41..58ac1ba8862 100644 --- a/src/mame/drivers/norautp.cpp +++ b/src/mame/drivers/norautp.cpp @@ -3670,7 +3670,7 @@ GAME( 1983, gtipoker, 0, dphl, norautp, norautp_state, empty_init, RO GAME( 1983, gtipokra, 0, dphla, norautp, norautp_state, empty_init, ROT0, "GTI Inc", "GTI Poker? (SMS hardware)", MACHINE_NOT_WORKING ) GAME( 1983, smshilo, 0, dphla, norautp, norautp_state, empty_init, ROT0, "SMS Manufacturing Corp.", "HI-LO Double Up Joker Poker", MACHINE_NOT_WORKING ) GAME( 1986, drhl, 0, drhl, norautp, norautp_state, empty_init, ROT0, "Drews Inc.", "Drews Revenge (v.2.89, set 1)", MACHINE_NOT_WORKING ) -GAME( 1986, drhla, 0, drhl, norautp, norautp_state, empty_init, ROT0, "Drews Inc.", "Drews Revenge (v.2.89, set 2)", MACHINE_NOT_WORKING ) +GAME( 1986, drhla, drhl, drhl, norautp, norautp_state, empty_init, ROT0, "Drews Inc.", "Drews Revenge (v.2.89, set 2)", MACHINE_NOT_WORKING ) GAME( 1982, ssjkrpkr, 0, ssjkrpkr, norautp, norautp_state, init_ssa, ROT0, "Southern Systems & Assembly", "Southern Systems Joker Poker", MACHINE_NOT_WORKING ) /* The following one also has a custom 68705 MCU */ diff --git a/src/mame/drivers/odyssey2.cpp b/src/mame/drivers/odyssey2.cpp index d5530db733b..1d0efddb345 100644 --- a/src/mame/drivers/odyssey2.cpp +++ b/src/mame/drivers/odyssey2.cpp @@ -113,7 +113,10 @@ private: DECLARE_WRITE8_MEMBER(p2_write); DECLARE_READ8_MEMBER(io_read); DECLARE_WRITE8_MEMBER(io_write); - DECLARE_WRITE8_MEMBER(i8243_port_w); + void i8243_p4_w(uint8_t data); + void i8243_p5_w(uint8_t data); + void i8243_p6_w(uint8_t data); + void i8243_p7_w(uint8_t data); DECLARE_WRITE16_MEMBER(scanline_postprocess); void g7400_io(address_map &map); @@ -555,7 +558,7 @@ WRITE8_MEMBER(odyssey2_state::p2_write) WRITE8_MEMBER(g7400_state::p2_write) { m_p2 = data; - m_i8243->p2_w( space, 0, m_p2 & 0x0f ); + m_i8243->p2_w(m_p2 & 0x0f); } @@ -587,43 +590,47 @@ WRITE8_MEMBER(odyssey2_state::bus_write) i8243 in the g7400 */ -WRITE8_MEMBER(g7400_state::i8243_port_w) +void g7400_state::i8243_p4_w(uint8_t data) { - switch ( offset & 3 ) - { - case 0: // "port 4" -logerror("setting ef-port4 to %02x\n", data); - m_ic674_decode[4] = BIT(data,0); - m_ic674_decode[5] = BIT(data,1); - m_ic674_decode[6] = BIT(data,2); - m_ic674_decode[7] = BIT(data,3); - break; - - case 1: // "port 5" -logerror("setting ef-port5 to %02x\n", data); - m_ic674_decode[0] = BIT(data,0); - m_ic674_decode[1] = BIT(data,1); - m_ic674_decode[2] = BIT(data,2); - m_ic674_decode[3] = BIT(data,3); - break; - - case 2: // "port 6" -logerror("setting vdc-port6 to %02x\n", data); - m_ic678_decode[4] = BIT(data,0); - m_ic678_decode[5] = BIT(data,1); - m_ic678_decode[6] = BIT(data,2); - m_ic678_decode[7] = BIT(data,3); - break; - - case 3: // "port 7" -logerror("setting vdc-port7 to %02x\n", data); - m_ic678_decode[0] = BIT(data,0); - m_ic678_decode[1] = BIT(data,1); - m_ic678_decode[2] = BIT(data,2); - m_ic678_decode[3] = BIT(data,3); - break; + // "port 4" + logerror("setting ef-port4 to %02x\n", data); + m_ic674_decode[4] = BIT(data,0); + m_ic674_decode[5] = BIT(data,1); + m_ic674_decode[6] = BIT(data,2); + m_ic674_decode[7] = BIT(data,3); +} - } + +void g7400_state::i8243_p5_w(uint8_t data) +{ + // "port 5" + logerror("setting ef-port5 to %02x\n", data); + m_ic674_decode[0] = BIT(data,0); + m_ic674_decode[1] = BIT(data,1); + m_ic674_decode[2] = BIT(data,2); + m_ic674_decode[3] = BIT(data,3); +} + + +void g7400_state::i8243_p6_w(uint8_t data) +{ + // "port 6" + logerror("setting vdc-port6 to %02x\n", data); + m_ic678_decode[4] = BIT(data,0); + m_ic678_decode[5] = BIT(data,1); + m_ic678_decode[6] = BIT(data,2); + m_ic678_decode[7] = BIT(data,3); +} + + +void g7400_state::i8243_p7_w(uint8_t data) +{ + // "port 7" + logerror("setting vdc-port7 to %02x\n", data); + m_ic678_decode[0] = BIT(data,0); + m_ic678_decode[1] = BIT(data,1); + m_ic678_decode[2] = BIT(data,2); + m_ic678_decode[3] = BIT(data,3); } @@ -767,8 +774,10 @@ MACHINE_CONFIG_START(g7400_state::g7400) MCFG_PALETTE_INIT_OWNER(g7400_state, g7400) I8243(config, m_i8243); - m_i8243->read_handler().set_constant(0); - m_i8243->write_handler().set(FUNC(g7400_state::i8243_port_w)); + m_i8243->p4_out_cb().set(FUNC(g7400_state::i8243_p4_w)); + m_i8243->p5_out_cb().set(FUNC(g7400_state::i8243_p5_w)); + m_i8243->p6_out_cb().set(FUNC(g7400_state::i8243_p6_w)); + m_i8243->p7_out_cb().set(FUNC(g7400_state::i8243_p7_w)); MCFG_EF9340_1_ADD("ef9340_1", 3540000, "screen") @@ -810,8 +819,10 @@ MACHINE_CONFIG_START(g7400_state::odyssey3) MCFG_PALETTE_INIT_OWNER(g7400_state, g7400) I8243(config, m_i8243); - m_i8243->read_handler().set_constant(0); - m_i8243->write_handler().set(FUNC(g7400_state::i8243_port_w)); + m_i8243->p4_out_cb().set(FUNC(g7400_state::i8243_p4_w)); + m_i8243->p5_out_cb().set(FUNC(g7400_state::i8243_p5_w)); + m_i8243->p6_out_cb().set(FUNC(g7400_state::i8243_p6_w)); + m_i8243->p7_out_cb().set(FUNC(g7400_state::i8243_p7_w)); MCFG_EF9340_1_ADD("ef9340_1", 3540000, "screen") diff --git a/src/mame/drivers/olyboss.cpp b/src/mame/drivers/olyboss.cpp index 45499d83768..f1bdbc88b33 100644 --- a/src/mame/drivers/olyboss.cpp +++ b/src/mame/drivers/olyboss.cpp @@ -514,9 +514,9 @@ MACHINE_CONFIG_START( olyboss_state::bossb85 ) MCFG_DEVICE_ADD("pic", PIC8259, 0) MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0)) - MCFG_UPD765A_ADD("fdc", true, true) - MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE("maincpu", I8085_RST65_LINE)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(m_dma, i8257_device, dreq0_w)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set_inputline(m_maincpu, I8085_RST65_LINE); + m_fdc->drq_wr_callback().set(m_dma, FUNC(i8257_device::dreq0_w)); MCFG_FLOPPY_DRIVE_ADD("fdc:0", bossb_floppies, "525dd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_SOUND(true) MCFG_FLOPPY_DRIVE_ADD("fdc:1", bossb_floppies, "525dd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/othello.cpp b/src/mame/drivers/othello.cpp index 21b4dd7a93d..9d0439c2d17 100644 --- a/src/mame/drivers/othello.cpp +++ b/src/mame/drivers/othello.cpp @@ -117,7 +117,8 @@ private: DECLARE_READ8_MEMBER(n7751_rom_r); DECLARE_READ8_MEMBER(n7751_command_r); DECLARE_WRITE8_MEMBER(n7751_p2_w); - DECLARE_WRITE8_MEMBER(n7751_rom_control_w); + template<int Shift> void n7751_rom_addr_w(uint8_t data); + void n7751_rom_select_w(uint8_t data); DECLARE_PALETTE_INIT(othello); MC6845_UPDATE_ROW(crtc_update_row); @@ -280,36 +281,24 @@ void othello_state::audio_portmap(address_map &map) map(0x08, 0x08).w(FUNC(othello_state::ay_select_w)); } -WRITE8_MEMBER(othello_state::n7751_rom_control_w) +template<int Shift> +void othello_state::n7751_rom_addr_w(uint8_t data) { - /* P4 - address lines 0-3 */ - /* P5 - address lines 4-7 */ - /* P6 - address lines 8-11 */ - /* P7 - ROM selects */ - switch (offset) - { - case 0: - m_sound_addr = (m_sound_addr & ~0x00f) | ((data & 0x0f) << 0); - break; - - case 1: - m_sound_addr = (m_sound_addr & ~0x0f0) | ((data & 0x0f) << 4); - break; - - case 2: - m_sound_addr = (m_sound_addr & ~0xf00) | ((data & 0x0f) << 8); - break; - - case 3: - m_sound_addr &= 0xfff; - { - if (!BIT(data, 0)) m_sound_addr |= 0x0000; - if (!BIT(data, 1)) m_sound_addr |= 0x1000; - if (!BIT(data, 2)) m_sound_addr |= 0x2000; - if (!BIT(data, 3)) m_sound_addr |= 0x3000; - } - break; - } + // P4 - address lines 0-3 + // P5 - address lines 4-7 + // P6 - address lines 8-11 + m_sound_addr = (m_sound_addr & ~(0x00f << Shift)) | ((data & 0x0f) << Shift); +} + +void othello_state::n7751_rom_select_w(uint8_t data) +{ + // P7 - ROM selects + m_sound_addr &= 0xfff; + + if (!BIT(data, 0)) m_sound_addr |= 0x0000; + if (!BIT(data, 1)) m_sound_addr |= 0x1000; + if (!BIT(data, 2)) m_sound_addr |= 0x2000; + if (!BIT(data, 3)) m_sound_addr |= 0x3000; } READ8_MEMBER(othello_state::n7751_rom_r) @@ -325,7 +314,7 @@ READ8_MEMBER(othello_state::n7751_command_r) WRITE8_MEMBER(othello_state::n7751_p2_w) { /* write to P2; low 4 bits go to 8243 */ - m_i8243->p2_w(space, offset, data & 0x0f); + m_i8243->p2_w(data & 0x0f); /* output of bit $80 indicates we are ready (1) or busy (0) */ /* no other outputs are used */ @@ -419,8 +408,10 @@ MACHINE_CONFIG_START(othello_state::othello) MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(m_i8243, i8243_device, prog_w)) I8243(config, m_i8243); - m_i8243->read_handler().set_constant(0); - m_i8243->write_handler().set(FUNC(othello_state::n7751_rom_control_w)); + m_i8243->p4_out_cb().set(FUNC(othello_state::n7751_rom_addr_w<0>)); + m_i8243->p5_out_cb().set(FUNC(othello_state::n7751_rom_addr_w<4>)); + m_i8243->p6_out_cb().set(FUNC(othello_state::n7751_rom_addr_w<8>)); + m_i8243->p7_out_cb().set(FUNC(othello_state::n7751_rom_select_w)); /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) diff --git a/src/mame/drivers/p8k.cpp b/src/mame/drivers/p8k.cpp index 24b4c33c7eb..47d836d0b44 100644 --- a/src/mame/drivers/p8k.cpp +++ b/src/mame/drivers/p8k.cpp @@ -472,8 +472,8 @@ MACHINE_CONFIG_START(p8k_state::p8k) m_pio2->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); m_pio2->in_pa_callback().set_ioport("DSW"); - MCFG_I8272A_ADD("i8272", true) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE("dma", z80dma_device, rdy_w)) + I8272A(config, m_i8272, true); + m_i8272->drq_wr_callback().set("dma", FUNC(z80dma_device::rdy_w)); MCFG_FLOPPY_DRIVE_ADD("i8272:0", p8k_floppies, "525hd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("i8272:1", p8k_floppies, "525hd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/pacman.cpp b/src/mame/drivers/pacman.cpp index a0bbb38938d..5e0c7b45682 100644 --- a/src/mame/drivers/pacman.cpp +++ b/src/mame/drivers/pacman.cpp @@ -4614,6 +4614,36 @@ ROM_START( crockman ) ROM_LOAD( "82s126.3m", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) /* timing - not used */ ROM_END +/* Bootleg from Marti Colls (Falgas) of Crock-Man. + It's mainly a hack to remove Rene Pierre logo, but it was on an original Marti Colls bootleg hardware */ +ROM_START( crockmnf ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "crockmc_01.bin", 0x0000, 0x0800, CRC(2c0fa0ab) SHA1(37680e4502771ae69d51d07ce43f65b9b2dd2a49) ) + ROM_LOAD( "crockmc_05.bin", 0x0800, 0x0800, CRC(afeca2f1) SHA1(1e6d6c75eeb3a354ce2dc88da62caf9e7d53d0cb) ) + ROM_LOAD( "crockmc_02.bin", 0x1000, 0x0800, CRC(7d177853) SHA1(9b5ddaaa8b564654f97af193dbcc29f81f230a25) ) + ROM_LOAD( "crockmc_06.bin", 0x1800, 0x0800, CRC(d3e8914c) SHA1(c2f00e1773c6864435f29c8b7f44f2ef85d227d3) ) + ROM_LOAD( "crockmc_03.bin", 0x2000, 0x0800, CRC(9045a44c) SHA1(a97d7016effbd2ace9a7d92ceb04a6ce18fb42f9) ) + ROM_LOAD( "crockmc_07.bin", 0x2800, 0x0800, CRC(93f344c5) SHA1(987c7fa18a774a47c045fa1dc7dff37457cb8983) ) + ROM_LOAD( "crockmc_04.bin", 0x3000, 0x0800, CRC(bed4a077) SHA1(39ac1d4d2acf4752ff7f9839f8f0d1974e023fab) ) + ROM_LOAD( "crockmc_08.bin", 0x3800, 0x0800, CRC(800be41e) SHA1(6f40e741d95c2cfe1b217f1061da3497b4c2a153) ) + + ROM_REGION( 0x2000, "gfx1", 0 ) + ROM_LOAD( "crockmc_09.bin", 0x0000, 0x0800, CRC(581d0c11) SHA1(82f39459bab2547d7bb70fd08e74da5c23590dfc) ) + ROM_LOAD( "crockmc_11.bin", 0x0800, 0x0800, CRC(3591b89d) SHA1(79bb456be6c39c1ccd7d077fbe181523131fb300) ) + ROM_LOAD( "crockmc_10.bin", 0x1000, 0x0800, CRC(9e39323a) SHA1(be933e691df4dbe7d12123913c3b7b7b585b7a35) ) + ROM_LOAD( "crockmc_12.bin", 0x1800, 0x0800, CRC(1b1d9096) SHA1(53771c573051db43e7185b1d188533056290a620) ) + + /* Undumped on the Marti Colls PCB, taken from the parent set */ + ROM_REGION( 0x0120, "proms", 0 ) + ROM_LOAD( "82s123.7f", 0x0000, 0x0020, CRC(2fc650bd) SHA1(8d0268dee78e47c712202b0ec4f1f51109b1f2a5) ) + ROM_LOAD( "82s126.4a", 0x0020, 0x0100, CRC(3eb3a8e4) SHA1(19097b5f60d1030f8b82d9f1d3a241f93e5c75d6) ) + + /* Undumped on the Marti Colls PCB, taken from the parent set */ + ROM_REGION( 0x0200, "namco", 0 ) /* sound PROMs */ + ROM_LOAD( "82s126.1m", 0x0000, 0x0100, CRC(a9cc86bf) SHA1(bbcec0570aeceb582ff8238a4bc8546a23430081) ) + ROM_LOAD( "82s126.3m", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) /* timing - not used */ +ROM_END + ROM_START( puckmanh ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "pm01.6e", 0x0000, 0x1000, CRC(5fe8610a) SHA1(d63eaebd85e10aa6c27bb7f47642dd403eeb6934) ) @@ -4863,6 +4893,36 @@ ROM_START( titanpac ) /* GDP-01 main PCB with GDP-02 auxiliary card (same as Pir ROM_LOAD( "82s126.3m", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) /* timing - not used */ ROM_END +/* Bootleg from Spanish company "FAMARE S.A.". Board labeled "FAMARESA 560-002" + It's mainly a hack to remove Namco logo, but it was on an original Famaresa bootleg hardware */ +ROM_START( pacmanfm ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "pacfama_01.bin", 0x0000, 0x0800, CRC(f36e88ab) SHA1(813cecf44bf5464b1aed64b36f5047e4c79ba176) ) + ROM_LOAD( "pacfama_05.bin", 0x0800, 0x0800, CRC(618bd9b3) SHA1(b9ca52b63a49ddece768378d331deebbe34fe177) ) + ROM_LOAD( "pacfama_02.bin", 0x1000, 0x0800, CRC(7d177853) SHA1(9b5ddaaa8b564654f97af193dbcc29f81f230a25) ) + ROM_LOAD( "pacfama_06.bin", 0x1800, 0x0800, CRC(d3e8914c) SHA1(c2f00e1773c6864435f29c8b7f44f2ef85d227d3) ) + ROM_LOAD( "pacfama_03.bin", 0x2000, 0x0800, CRC(6bf4f625) SHA1(afe72fdfec66c145b53ed865f98734686b26e921) ) + ROM_LOAD( "pacfama_07.bin", 0x2800, 0x0800, CRC(a948ce83) SHA1(08759833f7e0690b2ccae573c929e2a48e5bde7f) ) + ROM_LOAD( "pacfama_04.bin", 0x3000, 0x0800, CRC(b6289b26) SHA1(d249fa9cdde774d5fee7258147cd25fa3f4dc2b3) ) + ROM_LOAD( "pacfama_08.bin", 0x3800, 0x0800, CRC(17a88c13) SHA1(eb462de79f49b7aa8adb0cc6d31535b10550c0ce) ) + + ROM_REGION( 0x2000, "gfx1", 0 ) + ROM_LOAD( "pacfama_09.bin", 0x0000, 0x0800, CRC(7a7b48b3) SHA1(a12f08d76f9aee3c1fc8401d0aa087d2187c1803) ) + ROM_LOAD( "pacfama_11.bin", 0x0800, 0x0800, CRC(3591b89d) SHA1(79bb456be6c39c1ccd7d077fbe181523131fb300) ) + ROM_LOAD( "pacfama_10.bin", 0x1000, 0x0800, CRC(9e39323a) SHA1(be933e691df4dbe7d12123913c3b7b7b585b7a35) ) + ROM_LOAD( "pacfama_12.bin", 0x1800, 0x0800, CRC(1b1d9096) SHA1(53771c573051db43e7185b1d188533056290a620) ) + + /* Undumped on the Famaresa PCB, taken from the parent set */ + ROM_REGION( 0x0120, "proms", 0 ) + ROM_LOAD( "pm1-1.7f", 0x0000, 0x0020, CRC(2fc650bd) SHA1(8d0268dee78e47c712202b0ec4f1f51109b1f2a5) ) // 82s123 + ROM_LOAD( "pm1-4.4a", 0x0020, 0x0100, CRC(3eb3a8e4) SHA1(19097b5f60d1030f8b82d9f1d3a241f93e5c75d6) ) // 82s126 + + /* Undumped on the Famaresa PCB, taken from the parent set */ + ROM_REGION( 0x0200, "namco", 0 ) /* sound PROMs */ + ROM_LOAD( "pm1-3.1m", 0x0000, 0x0100, CRC(a9cc86bf) SHA1(bbcec0570aeceb582ff8238a4bc8546a23430081) ) // 82s126 + ROM_LOAD( "pm1-2.3m", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) // 82s126 - timing - not used +ROM_END + ROM_START( piranha ) /* GDP-01 main PCB with GDP-02 auxiliary card */ ROM_REGION( 0x10000, "maincpu",0 ) ROM_LOAD( "pir1.7e", 0x0000, 0x0800, CRC(69a3e6ea) SHA1(c54e5d039a03d3cbee7a5e21bf1e23f4fd913ea6) ) @@ -5152,6 +5212,31 @@ ROM_START( mspacmbe ) ROM_LOAD( "82s126.3m", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) /* timing - not used */ ROM_END +/** Marti Colls (Falgas) bootleg. */ +ROM_START( mspacmbmc ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "misspacmanfalgas_0.bin", 0x0000, 0x1000, CRC(d16b31b7) SHA1(bc2247ec946b639dd1f00bfc603fa157d0baaa97) ) + ROM_LOAD( "misspacmanfalgas_1.bin", 0x1000, 0x1000, CRC(0d32de5e) SHA1(13ea0c343de072508908be885e6a2a217bbb3047) ) + ROM_LOAD( "misspacmanfalgas_2.bin", 0x2000, 0x1000, CRC(1821ee0b) SHA1(5ea4d907dbb2690698db72c4e0b5be4d3e9a7786) ) + ROM_LOAD( "misspacmanfalgas_3.bin", 0x3000, 0x1000, CRC(e086219d) SHA1(6802cf425be878f442716d792946a85fc13e7413) ) + ROM_LOAD( "misspacmanfalgas_4.bin", 0x8000, 0x1000, CRC(8c3e6de6) SHA1(fed6e9a2b210b07e7189a18574f6b8c4ec5bb49b) ) + ROM_LOAD( "misspacmanfalgas_5.bin", 0x9000, 0x1000, CRC(206a9623) SHA1(20006f945c1b7b0e3c0415eecc0b148e5a6a1dfa) ) + + /* Undumped on the Marti Colls PCB, taken from the parent set */ + ROM_REGION( 0x2000, "gfx1", 0 ) + ROM_LOAD( "5e", 0x0000, 0x1000, CRC(5c281d01) SHA1(5e8b472b615f12efca3fe792410c23619f067845) ) + ROM_LOAD( "5f", 0x1000, 0x1000, CRC(615af909) SHA1(fd6a1dde780b39aea76bf1c4befa5882573c2ef4) ) + + /* Undumped on the Marti Colls PCB, taken from the parent set */ + ROM_REGION( 0x0120, "proms", 0 ) + ROM_LOAD( "82s123.7f", 0x0000, 0x0020, CRC(2fc650bd) SHA1(8d0268dee78e47c712202b0ec4f1f51109b1f2a5) ) + ROM_LOAD( "82s126.4a", 0x0020, 0x0100, CRC(3eb3a8e4) SHA1(19097b5f60d1030f8b82d9f1d3a241f93e5c75d6) ) + + /* Undumped on the Marti Colls PCB, taken from the parent set */ + ROM_REGION( 0x0200, "namco", 0 ) /* sound PROMs */ + ROM_LOAD( "82s126.1m", 0x0000, 0x0100, CRC(a9cc86bf) SHA1(bbcec0570aeceb582ff8238a4bc8546a23430081) ) + ROM_LOAD( "82s126.3m", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) /* timing - not used */ +ROM_END ROM_START( mspacii ) ROM_REGION( 0x10000, "maincpu", 0 ) @@ -7361,6 +7446,7 @@ GAME( 1981, hangly3, puckman, pacman, pacman, pacman_state, empty_init, GAME( 1981, popeyeman,puckman, pacman, pacman, pacman_state, empty_init, ROT90, "hack", "Popeye-Man", MACHINE_SUPPORTS_SAVE ) GAME( 1980, pacuman, puckman, pacman, pacuman, pacman_state, empty_init, ROT90, "bootleg (Recreativos Franco S.A.)", "Pacu-Man (Spanish bootleg of Puck Man)", MACHINE_SUPPORTS_SAVE ) // common bootleg in Spain, code is shifted a bit compared to the Puck Man sets. Title & Manufacturer info from cabinet/PCB, not displayed ingame GAME( 1980, crockman, puckman, pacman, pacman, pacman_state, empty_init, ROT90, "bootleg (Rene Pierre)", "Crock-Man", MACHINE_SUPPORTS_SAVE ) +GAME( 1980, crockmnf, puckman, pacman, pacman, pacman_state, empty_init, ROT90, "bootleg (Marti Colls)", "Crock-Man (Marti Colls bootleg of Rene Pierre Crock-Man)", MACHINE_SUPPORTS_SAVE ) GAME( 1982, joyman, puckman, pacman, pacman, pacman_state, empty_init, ROT90, "hack", "Joyman", MACHINE_SUPPORTS_SAVE ) GAME( 1982, ctrpllrp, puckman, pacman, pacman, pacman_state, empty_init, ROT90, "hack", "Caterpillar Pacman Hack", MACHINE_SUPPORTS_SAVE ) GAME( 1981, piranha, puckman, piranha, mspacman, pacman_state, init_eyes, ROT90, "GL (US Billiards license)", "Piranha", MACHINE_SUPPORTS_SAVE ) @@ -7368,6 +7454,7 @@ GAME( 1981, piranhao, puckman, piranha, mspacman, pacman_state, init_eyes, GAME( 1981, abscam, puckman, piranha, mspacman, pacman_state, init_eyes, ROT90, "GL (US Billiards license)", "Abscam", MACHINE_SUPPORTS_SAVE ) GAME( 1981, piranhah, puckman, pacman, mspacman, pacman_state, empty_init, ROT90, "hack", "Piranha (hack)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, titanpac, puckman, piranha, mspacman, pacman_state, init_eyes, ROT90, "hack", "Titan (Pac-Man hack)", MACHINE_SUPPORTS_SAVE ) +GAME( 1980, pacmanfm, puckman, pacman, pacman, pacman_state, empty_init, ROT90, "bootleg (FAMARE S.A.)", "Pac Man (FAMARE S.A. bootleg of Puck Man)", MACHINE_SUPPORTS_SAVE ) GAME( 1982, pacplus, 0, pacman, pacman, pacman_state, init_pacplus, ROT90, "Namco (Midway license)", "Pac-Man Plus", MACHINE_SUPPORTS_SAVE ) @@ -7380,6 +7467,7 @@ GAME( 1981, mspacmancr,mspacman,mspacman, mspacman, pacman_state, init_mspacman GAME( 1981, mspacmab, mspacman, woodpek, mspacman, pacman_state, empty_init, ROT90, "bootleg", "Ms. Pac-Man (bootleg, set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, mspacmab2,mspacman, woodpek, mspacman, pacman_state, empty_init, ROT90, "bootleg", "Ms. Pac-Man (bootleg, set 2)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, mspacmbe, mspacman, woodpek, mspacman, pacman_state, init_mspacmbe, ROT90, "bootleg", "Ms. Pac-Man (bootleg, encrypted)", MACHINE_SUPPORTS_SAVE ) +GAME( 1982, mspacmbmc,mspacman, woodpek, mspacman, pacman_state, empty_init, ROT90, "bootleg (Marti Colls)", "Ms. Pac-Man (Marti Colls bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, mspacii, mspacman, woodpek, mspacman, pacman_state, init_mspacii, ROT90, "bootleg (Orca)", "Ms. Pac-Man II (Orca bootleg set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, mspacii2, mspacman, woodpek, mspacman, pacman_state, init_mspacii, ROT90, "bootleg (Orca)", "Ms. Pac-Man II (Orca bootleg set 2)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, pacgal, mspacman, woodpek, mspacman, pacman_state, empty_init, ROT90, "hack", "Pac-Gal (set 1)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/paradise.cpp b/src/mame/drivers/paradise.cpp index 63d42960463..78ffc541953 100644 --- a/src/mame/drivers/paradise.cpp +++ b/src/mame/drivers/paradise.cpp @@ -549,51 +549,51 @@ INPUT_PORTS_END static INPUT_PORTS_START( madball ) PORT_START("DSW1") /* port $2020 */ - PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) + PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2") PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) ) PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) ) PORT_DIPSETTING( 0x01, DEF_STR( 1C_3C ) ) - PORT_DIPNAME( 0x0c, 0x08, DEF_STR( Lives ) ) + PORT_DIPNAME( 0x0c, 0x08, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:3,4") PORT_DIPSETTING( 0x0c, "3" ) PORT_DIPSETTING( 0x08, "4" ) PORT_DIPSETTING( 0x04, "5" ) PORT_DIPSETTING( 0x00, "6" ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:5") PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, "Control?" ) - PORT_DIPSETTING( 0x20, "Disable / Spinner?" ) + PORT_DIPNAME( 0x20, 0x00, DEF_STR( Controls ) ) PORT_DIPLOCATION("SW1:6") /* Spinner controls currently NOT hooked up */ + PORT_DIPSETTING( 0x20, "Spinner" ) PORT_DIPSETTING( 0x00, DEF_STR( Joystick ) ) - PORT_DIPNAME( 0x40, 0x00, DEF_STR( Demo_Sounds ) ) + PORT_DIPNAME( 0x40, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:7") PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, "Slide Show" ) /* Use P1 button to advance */ + PORT_DIPNAME( 0x80, 0x80, "Slide Show" ) PORT_DIPLOCATION("SW1:8") /* Use P1 button to advance */ PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_START("DSW2") /* port $2021 */ - PORT_DIPNAME( 0x03, 0x02, DEF_STR( Difficulty ) ) + PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2") PORT_DIPSETTING( 0x02, DEF_STR( Easy ) ) PORT_DIPSETTING( 0x03, DEF_STR( Normal ) ) PORT_DIPSETTING( 0x01, DEF_STR( Hard ) ) PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3") PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4") PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5") PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:6") PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:7") PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:8") PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) @@ -1327,7 +1327,6 @@ RAM 4 Hyundai HY62256ALP-70 6 UMC UM6116K-3 DSW 2 8-switch DIP - P.u1 Intel i27C010A - Program (next to Z80A) s.u28 ST M27C4001 - Sound (next to AD-65) @@ -1340,6 +1339,20 @@ s.u28 ST M27C4001 - Sound (next to AD-65) All roms read with manufacturer's IDs and routines +NOTE: A version of Mad Ball has been seen with a YS-1302 daughtercard that plugs in through the Z80 processor: + +YS-1302 Spinner Daughtercard ++--------------------------+ +| [Connector to Main] | +| CN1 R Z8400B | +| CN2 S GAL16V8 74LS669 | +| CD4584 74LS374 74LS669 | +| 74LS669 74LS374 74LS669 | ++--------------------------+ + +CN1 & CN2 are 4 pin headers for spinner controls +RS is a 4.7K 5 pin resistor pack + */ ROM_START( madball ) /* Models in swimsuits only, no nudity */ diff --git a/src/mame/drivers/pasopia7.cpp b/src/mame/drivers/pasopia7.cpp index e16dd1fc3d4..78f5673da9d 100644 --- a/src/mame/drivers/pasopia7.cpp +++ b/src/mame/drivers/pasopia7.cpp @@ -966,7 +966,7 @@ MACHINE_CONFIG_START(pasopia7_state::p7_base) m_ppi2->in_pc_callback().set(FUNC(pasopia7_state::nmi_reg_r)); m_ppi2->out_pc_callback().set(FUNC(pasopia7_state::nmi_reg_w)); - MCFG_UPD765A_ADD("fdc", true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD("fdc:0", pasopia7_floppies, "525hd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("fdc:1", pasopia7_floppies, "525hd", floppy_image_device::default_floppy_formats) MACHINE_CONFIG_END diff --git a/src/mame/drivers/pbaction.cpp b/src/mame/drivers/pbaction.cpp index 1edca6bc038..889b803c16a 100644 --- a/src/mame/drivers/pbaction.cpp +++ b/src/mame/drivers/pbaction.cpp @@ -323,15 +323,15 @@ static const z80_daisy_config daisy_chain[] = MACHINE_CONFIG_START(pbaction_state::pbaction) /* basic machine hardware */ - MCFG_DEVICE_ADD("maincpu", Z80, 4000000) /* 4 MHz? */ + MCFG_DEVICE_ADD("maincpu", Z80, 4_MHz_XTAL) MCFG_DEVICE_PROGRAM_MAP(pbaction_map) - Z80(config, m_audiocpu, 3072000); + Z80(config, m_audiocpu, 12_MHz_XTAL/4); m_audiocpu->set_addrmap(AS_PROGRAM, &pbaction_state::pbaction_sound_map); m_audiocpu->set_addrmap(AS_IO, &pbaction_state::pbaction_sound_io_map); m_audiocpu->set_daisy_config(daisy_chain); - Z80CTC(config, m_ctc, 3072000); + Z80CTC(config, m_ctc, 12_MHz_XTAL/4); m_ctc->intr_callback().set_inputline(m_audiocpu, 0); /* video hardware */ @@ -353,13 +353,13 @@ MACHINE_CONFIG_START(pbaction_state::pbaction) MCFG_GENERIC_LATCH_8_ADD("soundlatch") - MCFG_DEVICE_ADD("ay1", AY8910, 1500000) + MCFG_DEVICE_ADD("ay1", AY8910, 12_MHz_XTAL/8) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) - MCFG_DEVICE_ADD("ay2", AY8910, 1500000) + MCFG_DEVICE_ADD("ay2", AY8910, 12_MHz_XTAL/8) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) - MCFG_DEVICE_ADD("ay3", AY8910, 1500000) + MCFG_DEVICE_ADD("ay3", AY8910, 12_MHz_XTAL/8) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) MACHINE_CONFIG_END @@ -372,7 +372,7 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(pbaction_state::pbactionx) pbaction2(config); - MCFG_DEVICE_REPLACE("maincpu", SEGA_CPU_PBACTIO4, 4000000) /* 4 MHz? */ + MCFG_DEVICE_REPLACE("maincpu", SEGA_315_5128, 4_MHz_XTAL) MCFG_DEVICE_PROGRAM_MAP(pbaction_map) MCFG_DEVICE_OPCODES_MAP(decrypted_opcodes_map) MCFG_SEGACRPT_SET_DECRYPTED_TAG(":decrypted_opcodes") @@ -548,8 +548,7 @@ void pbaction_state::init_pbactio3() } - - +// some of these are probably bootlegs GAME( 1985, pbaction, 0, pbaction, pbaction, pbaction_state, empty_init, ROT90, "Tehkan", "Pinball Action (set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, pbaction2, pbaction, pbaction2, pbaction, pbaction_state, empty_init, ROT90, "Tehkan", "Pinball Action (set 2)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, pbaction3, pbaction, pbactionx, pbaction, pbaction_state, init_pbactio3, ROT90, "Tehkan", "Pinball Action (set 3, encrypted)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/pc100.cpp b/src/mame/drivers/pc100.cpp index c1dd19b6a40..24cf154d520 100644 --- a/src/mame/drivers/pc100.cpp +++ b/src/mame/drivers/pc100.cpp @@ -667,9 +667,9 @@ MACHINE_CONFIG_START(pc100_state::pc100) //i8251.rts_handler().set("rs232", FUNC(rs232_port_device::write_rts)); i8251.rxrdy_handler().set("pic8259", FUNC(pic8259_device::ir1_w)); - MCFG_UPD765A_ADD("upd765", true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, pc100_state, irqnmi_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, pc100_state, drqnmi_w)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set(FUNC(pc100_state::irqnmi_w)); + m_fdc->drq_wr_callback().set(FUNC(pc100_state::drqnmi_w)); MCFG_DEVICE_ADD("rtc", MSM58321, XTAL(32'768)) MCFG_MSM58321_D0_HANDLER(WRITELINE(*this, pc100_state, rtc_portc_0_w)) diff --git a/src/mame/drivers/pc1500.cpp b/src/mame/drivers/pc1500.cpp index 52ba566fe6d..cd00ea495f4 100644 --- a/src/mame/drivers/pc1500.cpp +++ b/src/mame/drivers/pc1500.cpp @@ -295,7 +295,7 @@ MACHINE_CONFIG_START(pc1500_state::pc1500) ioports.portc_w().set(FUNC(pc1500_state::port_c_w)); ioports.out_int().set_inputline("maincpu", LH5801_LINE_MI); - MCFG_UPD1990A_ADD("upd1990a", XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); MACHINE_CONFIG_END diff --git a/src/mame/drivers/pc8001.cpp b/src/mame/drivers/pc8001.cpp index 88fec2ddf37..acbdbed71b0 100644 --- a/src/mame/drivers/pc8001.cpp +++ b/src/mame/drivers/pc8001.cpp @@ -507,7 +507,7 @@ MACHINE_CONFIG_START(pc8001_state::pc8001) m_dma->in_memr_cb().set(FUNC(pc8001_state::dma_mem_r)); m_dma->out_iow_cb<2>().set(UPD3301_TAG, FUNC(upd3301_device::dack_w)); - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); MCFG_DEVICE_ADD(UPD3301_TAG, UPD3301, XTAL(14'318'181)) MCFG_UPD3301_CHARACTER_WIDTH(8) @@ -555,7 +555,7 @@ MACHINE_CONFIG_START(pc8001mk2_state::pc8001mk2) m_dma->in_memr_cb().set(FUNC(pc8001_state::dma_mem_r)); m_dma->out_iow_cb<2>().set(UPD3301_TAG, FUNC(upd3301_device::dack_w)); - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); MCFG_DEVICE_ADD(UPD3301_TAG, UPD3301, XTAL(14'318'181)) MCFG_UPD3301_CHARACTER_WIDTH(8) diff --git a/src/mame/drivers/pc8401a.cpp b/src/mame/drivers/pc8401a.cpp index f0c70f598a9..e6492f1cb5d 100644 --- a/src/mame/drivers/pc8401a.cpp +++ b/src/mame/drivers/pc8401a.cpp @@ -580,7 +580,7 @@ MACHINE_CONFIG_START(pc8401a_state::pc8401a) MCFG_TIMER_DRIVER_ADD_PERIODIC("keyboard", pc8401a_state, pc8401a_keyboard_tick, attotime::from_hz(64)) /* devices */ - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); i8255_device &ppi(I8255A(config, I8255A_TAG)); ppi.in_pc_callback().set(FUNC(pc8401a_state::ppi_pc_r)); @@ -620,7 +620,7 @@ MACHINE_CONFIG_START(pc8500_state::pc8500) MCFG_TIMER_DRIVER_ADD_PERIODIC("keyboard", pc8401a_state, pc8401a_keyboard_tick, attotime::from_hz(64)) /* devices */ - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); i8255_device &ppi(I8255A(config, I8255A_TAG)); ppi.in_pc_callback().set(FUNC(pc8401a_state::ppi_pc_r)); diff --git a/src/mame/drivers/pc8801.cpp b/src/mame/drivers/pc8801.cpp index 098301df216..f404fc5bbff 100644 --- a/src/mame/drivers/pc8801.cpp +++ b/src/mame/drivers/pc8801.cpp @@ -1685,7 +1685,7 @@ void pc8801_state::pc8801fdc_io(address_map &map) map(0xf4, 0xf4).w(FUNC(pc8801_state::fdc_drive_mode_w)); // Drive mode, 2d, 2dd, 2hd map(0xf7, 0xf7).nopw(); // printer port output map(0xf8, 0xf8).rw(FUNC(pc8801_state::upd765_tc_r), FUNC(pc8801_state::upd765_mc_w)); // (R) Terminal Count Port (W) Motor Control Port - map(0xfa, 0xfb).m("upd765", FUNC(upd765a_device::map)); + map(0xfa, 0xfb).m(m_fdc, FUNC(upd765a_device::map)); map(0xfc, 0xff).rw("d8255_slave", FUNC(i8255_device::read), FUNC(i8255_device::write)); } @@ -2351,7 +2351,7 @@ MACHINE_CONFIG_START(pc8801_state::pc8801) MCFG_DEVICE_IRQ_ACKNOWLEDGE_DRIVER(pc8801_state,pc8801_irq_callback) /* sub CPU(5 inch floppy drive) */ - MCFG_DEVICE_ADD("fdccpu", Z80, MASTER_CLOCK) /* 4 MHz */ + MCFG_DEVICE_ADD(m_fdccpu, Z80, MASTER_CLOCK) /* 4 MHz */ MCFG_DEVICE_PROGRAM_MAP(pc8801fdc_mem) MCFG_DEVICE_IO_MAP(pc8801fdc_io) @@ -2370,13 +2370,13 @@ MACHINE_CONFIG_START(pc8801_state::pc8801) d8255_slave.in_pc_callback().set(FUNC(pc8801_state::fdc_8255_c_r)); d8255_slave.out_pc_callback().set(FUNC(pc8801_state::fdc_8255_c_w)); - MCFG_UPD765A_ADD("upd765", true, true) - MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE("fdccpu", INPUT_LINE_IRQ0)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set_inputline(m_fdccpu, INPUT_LINE_IRQ0); #if USE_PROPER_I8214 I8214(config, I8214_TAG, MASTER_CLOCK); #endif - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); //MCFG_CENTRONICS_ADD("centronics", centronics_devices, "printer") MCFG_CASSETTE_ADD("cassette") MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED | CASSETTE_MOTOR_ENABLED | CASSETTE_SPEAKER_MUTED) diff --git a/src/mame/drivers/pc88va.cpp b/src/mame/drivers/pc88va.cpp index 00cd0c6c959..6753c89381d 100644 --- a/src/mame/drivers/pc88va.cpp +++ b/src/mame/drivers/pc88va.cpp @@ -1648,9 +1648,9 @@ MACHINE_CONFIG_START(pc88va_state::pc88va) m_dmac->in_memr_callback().set(FUNC(pc88va_state::dma_memr_cb)); m_dmac->out_memw_callback().set(FUNC(pc88va_state::dma_memw_cb)); - MCFG_UPD765A_ADD("upd765", false, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, pc88va_state, fdc_irq)) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, pc88va_state, fdc_drq)) + UPD765A(config, m_fdc, false, true); + m_fdc->intrq_wr_callback().set(FUNC(pc88va_state::fdc_irq)); + m_fdc->drq_wr_callback().set(FUNC(pc88va_state::fdc_drq)); FLOPPY_CONNECTOR(config, m_fdd[0], pc88va_floppies, "525hd", pc88va_state::floppy_formats); FLOPPY_CONNECTOR(config, m_fdd[1], pc88va_floppies, "525hd", pc88va_state::floppy_formats); MCFG_SOFTWARE_LIST_ADD("disk_list","pc88va") diff --git a/src/mame/drivers/pc9801.cpp b/src/mame/drivers/pc9801.cpp index 1a9cbe3fb2a..640a0338eed 100644 --- a/src/mame/drivers/pc9801.cpp +++ b/src/mame/drivers/pc9801.cpp @@ -2407,7 +2407,7 @@ MACHINE_CONFIG_START(pc9801_state::pc9801) FLOPPY_CONNECTOR(config, "upd765_2dd:1", pc9801_floppies, "525dd", pc9801_state::floppy_formats); pc9801_sasi(config); - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); m_dmac->in_ior_callback<3>().set(m_fdc_2dd, FUNC(upd765a_device::mdma_r)); m_dmac->out_iow_callback<3>().set(m_fdc_2dd, FUNC(upd765a_device::mdma_w)); @@ -2434,7 +2434,7 @@ MACHINE_CONFIG_START(pc9801_state::pc9801rs) MCFG_DEVICE_CLOCK(MAIN_CLOCK_X1*8); // unknown clock pc9801_ide(config); - MCFG_UPD4990A_ADD("upd1990a", XTAL(32'768), NOOP, NOOP) + UPD4990A(config, m_rtc); RAM(config, m_ram).set_default_size("1664K").set_extra_options("640K,3712K,7808K,14M"); diff --git a/src/mame/drivers/pcw.cpp b/src/mame/drivers/pcw.cpp index a718faf0373..d0c55c7a763 100644 --- a/src/mame/drivers/pcw.cpp +++ b/src/mame/drivers/pcw.cpp @@ -1263,8 +1263,8 @@ MACHINE_CONFIG_START(pcw_state::pcw) MCFG_DEVICE_ADD("beeper", BEEP, 3750) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00) - MCFG_UPD765A_ADD("upd765", true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, pcw_state, pcw_fdc_interrupt)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set(FUNC(pcw_state::pcw_fdc_interrupt)); MCFG_FLOPPY_DRIVE_ADD("upd765:0", pcw_floppies, "3dsdd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765:1", pcw_floppies, "3dsdd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/pcw16.cpp b/src/mame/drivers/pcw16.cpp index 9c6e8b6accf..4df31663131 100644 --- a/src/mame/drivers/pcw16.cpp +++ b/src/mame/drivers/pcw16.cpp @@ -1060,11 +1060,11 @@ MACHINE_CONFIG_START(pcw16_state::pcw16) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00) /* printer */ - MCFG_DEVICE_ADD("lpt", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(INPUTLINE("maincpu", 0)) + pc_lpt_device &lpt(PC_LPT(config, "lpt")); + lpt.irq_handler().set_inputline(m_maincpu, 0); - MCFG_PC_FDC_SUPERIO_ADD("fdc") - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, pcw16_state, fdc_interrupt)) + PC_FDC_SUPERIO(config, m_fdc); + m_fdc->intrq_wr_callback().set(FUNC(pcw16_state::fdc_interrupt)); MCFG_FLOPPY_DRIVE_ADD("fdc:0", pcw16_floppies, "35hd", pcw16_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("fdc:1", pcw16_floppies, "35hd", pcw16_state::floppy_formats) diff --git a/src/mame/drivers/peoplepc.cpp b/src/mame/drivers/peoplepc.cpp index 565fa2c21c3..153c78fdfd4 100644 --- a/src/mame/drivers/peoplepc.cpp +++ b/src/mame/drivers/peoplepc.cpp @@ -288,9 +288,9 @@ MACHINE_CONFIG_START(peoplepc_state::olypeopl) m_dmac->in_ior_cb<0>().set("upd765", FUNC(upd765a_device::mdma_r)); m_dmac->out_iow_cb<0>().set("upd765", FUNC(upd765a_device::mdma_w)); - MCFG_UPD765A_ADD("upd765", true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE("pic8259_0", pic8259_device, ir2_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(m_dmac, i8257_device, dreq0_w)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set("pic8259_0", FUNC(pic8259_device::ir2_w)); + m_fdc->drq_wr_callback().set(m_dmac, FUNC(i8257_device::dreq0_w)); MCFG_FLOPPY_DRIVE_ADD("upd765:0", peoplepc_floppies, "525qd", peoplepc_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765:1", peoplepc_floppies, "525qd", peoplepc_state::floppy_formats) diff --git a/src/mame/drivers/phoenix.cpp b/src/mame/drivers/phoenix.cpp index 1ab376031f0..524d9854e15 100644 --- a/src/mame/drivers/phoenix.cpp +++ b/src/mame/drivers/phoenix.cpp @@ -915,6 +915,30 @@ ROM_START( phoenixi ) // verified single PCB, single PROM ROM_LOAD( "sn74s471n.bin", 0x0100, 0x0100, CRC(c68a49bc) SHA1(1a015b89ac0622e73bcebd76cf5132830fe0bfc1) ) ROM_END +ROM_START( fenixn ) // Fenix, bootleg from the Spanish company Niemer + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "2201.bin", 0x0000, 0x0800, CRC(2afa8e2c) SHA1(e9cd02b730912365aae4172da881bddb7c7b16aa) ) + ROM_LOAD( "1202.bin", 0x0800, 0x0800, CRC(6527395e) SHA1(13799da4b5c4118b3fafe7b6145b0ebca89b9f00) ) + ROM_LOAD( "1203.bin", 0x1000, 0x0800, CRC(868e69ba) SHA1(bef3173f1c978a9b9d1597439d272186b466e069) ) + ROM_LOAD( "1204.bin", 0x1800, 0x0800, CRC(85d96d7c) SHA1(19bb1d0a6764b6982d3cb29e2681dee8648d5fda) ) + ROM_LOAD( "1205.bin", 0x2000, 0x0800, CRC(a105e4e7) SHA1(b35142a91b6b7fdf7535202671793393c9f4685f) ) + ROM_LOAD( "1206.bin", 0x2800, 0x0800, CRC(249a6f21) SHA1(1c83d9883120796cf3bf775ab6620c4850f52d3c) ) + ROM_LOAD( "1207.bin", 0x3000, 0x0800, CRC(2eab35b4) SHA1(849bf8273317cc869bdd67e50c68399ee8ece81d) ) + ROM_LOAD( "1208.bin", 0x3800, 0x0800, CRC(b90efc28) SHA1(61956880f64ae50c4796d4cf60a49c44a81aaa31) ) + + ROM_REGION( 0x1000, "bgtiles", 0 ) + ROM_LOAD( "1211.bin", 0x0000, 0x0800, CRC(3c7e623f) SHA1(e7ff5fc371664af44785c079e92eeb2d8530187b) ) + ROM_LOAD( "1212.bin", 0x0800, 0x0800, CRC(59916d3b) SHA1(71aec70a8e096ed1f0c2297b3ae7dca1b8ecc38d) ) + + ROM_REGION( 0x1000, "fgtiles", 0 ) + ROM_LOAD( "1209.bin", 0x0000, 0x0800, CRC(bb0525ed) SHA1(86db1c7584fb3846bfd47535e1585eeb7fbbb1fe) ) + ROM_LOAD( "1210.bin", 0x0800, 0x0800, CRC(0be2ba91) SHA1(af9243ee23377b632b9b7d0b84d341d06bf22480) ) + + ROM_REGION( 0x0200, "proms", 0 ) + ROM_LOAD( "prom1.bin", 0x0000, 0x0100, CRC(79350b25) SHA1(57411be4c1d89677f7919ae295446da90612c8a8) ) /* palette low bits */ + ROM_LOAD( "prom2.bin", 0x0100, 0x0100, CRC(e176b768) SHA1(e2184dd495ed579f10b6da0b78379e02d7a6229f) ) /* palette high bits */ +ROM_END + ROM_START( condor ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "cond01c.bin", 0x0000, 0x0800, CRC(c0f73929) SHA1(3cecf8341a5674165d2cae9b22ea5db26a9597de) ) @@ -1583,6 +1607,7 @@ GAME( 1981, phoenixc2, phoenix, phoenix, phoenixt, phoenix_state, empty_init, GAME( 1981, phoenixc3, phoenix, phoenix, phoenixt, phoenix_state, empty_init, ROT90, "bootleg? (Irecsa / G.G.I Corp)", "Phoenix (Irecsa / G.G.I Corp, set 3)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, phoenixc4, phoenix, phoenix, phoenixt, phoenix_state, empty_init, ROT90, "bootleg? (Irecsa / G.G.I Corp)", "Phoenix (Irecsa / G.G.I Corp, set 4)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, phoenixi, phoenix, condor, condor, phoenix_state, init_oneprom_coindsw, ROT90, "bootleg (IDI)", "Phoenix (IDI bootleg)", MACHINE_WRONG_COLORS | MACHINE_SUPPORTS_SAVE ) // Needs correct color PROM decode +GAME( 1980, fenixn, phoenix, phoenix, phoenix, phoenix_state, empty_init, ROT90, "bootleg (Niemer)", "Fenix (Niemer bootleg of Phoenix)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, condor, phoenix, condor, condor, phoenix_state, init_coindsw, ROT90, "bootleg (Sidam)", "Condor (Sidam bootleg of Phoenix)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, condorn, phoenix, condor, condor, phoenix_state, init_oneprom_coindsw, ROT90, "bootleg (S C Novar)", "Condor (S C Novar bootleg of Phoenix)", MACHINE_SUPPORTS_SAVE ) // the following 2 were common bootlegs in England & France respectively @@ -1595,8 +1620,8 @@ GAME( 1980, vautourza, phoenix, condor , phoenixt, phoenix_state, init_oneprom // German bootlegs GAME( 1981, phoenixha, phoenix, phoenix, phoenixt, phoenix_state, empty_init, ROT90, "bootleg (Hellomat Automaten)", "Phoenix (Hellomat Automaten bootleg)", MACHINE_SUPPORTS_SAVE ) -// fenix is an Italian bootleg based on vautourz -GAME( 1980, fenix, phoenix, condor, condor, phoenix_state, init_oneprom_coindsw, ROT90, "bootleg (Orio)", "Fenix (bootleg of Phoenix)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) +// fenix is an Italian bootleg based on vautourz (also an unrelated Spanish bootleg from Niemer) +GAME( 1980, fenix, phoenix, condor, condor, phoenix_state, init_oneprom_coindsw, ROT90, "bootleg (Orio)", "Fenix (Orio bootleg of Phoenix)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) GAME( 1980, griffon, phoenix, condor, condor, phoenix_state, init_oneprom_coindsw, ROT90, "bootleg (Videotron)", "Griffon (Videotron bootleg of Phoenix)", MACHINE_SUPPORTS_SAVE ) GAME( 1980, griffono, phoenix, condor, condor, phoenix_state, init_oneprom_coindsw, ROT90, "bootleg (Olympia)", "Griffon (Olympia bootleg of Phoenix)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // nextfase is a Spanish bootleg diff --git a/src/mame/drivers/pktgaldx.cpp b/src/mame/drivers/pktgaldx.cpp index 164fdece3ab..e36ccf4977a 100644 --- a/src/mame/drivers/pktgaldx.cpp +++ b/src/mame/drivers/pktgaldx.cpp @@ -41,6 +41,8 @@ Notes: Driver by David Haywood and Bryan McPhail +NOTE: Hold down both Player1 & Player2 Start buttons during boot up to see version & region + */ /* @@ -339,7 +341,7 @@ void pktgaldx_state::machine_start() MACHINE_CONFIG_START(pktgaldx_state::pktgaldx) /* basic machine hardware */ - MCFG_DEVICE_ADD("maincpu", M68000, 14000000) + MCFG_DEVICE_ADD("maincpu", M68000, 28_MHz_XTAL / 2) // The clock input is 14.000MHz on pin 6 MCFG_DEVICE_PROGRAM_MAP(pktgaldx_map) MCFG_DEVICE_OPCODES_MAP(decrypted_opcodes_map) @@ -388,11 +390,11 @@ MACHINE_CONFIG_START(pktgaldx_state::pktgaldx) SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); - MCFG_DEVICE_ADD("oki1", OKIM6295, 32220000/32, okim6295_device::PIN7_HIGH) + MCFG_DEVICE_ADD("oki1", OKIM6295, 32.22_MHz_XTAL / 32, okim6295_device::PIN7_HIGH) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.75) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.75) - MCFG_DEVICE_ADD("oki2", OKIM6295, 32220000/16, okim6295_device::PIN7_HIGH) + MCFG_DEVICE_ADD("oki2", OKIM6295, 32.22_MHz_XTAL / 16, okim6295_device::PIN7_HIGH) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.60) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.60) MACHINE_CONFIG_END @@ -435,38 +437,56 @@ MACHINE_CONFIG_END ROM_START( pktgaldx ) ROM_REGION( 0x80000, "maincpu", 0 ) /* DE102 code (encrypted) */ - ROM_LOAD16_WORD_SWAP( "ke00-2.12a", 0x00000, 0x80000, CRC(b04baf3a) SHA1(680d1b4ab4b6edef36cd96a60539fb7c2dac9637) ) + ROM_LOAD16_WORD_SWAP( "ke00-2.12a", 0x00000, 0x80000, CRC(b04baf3a) SHA1(680d1b4ab4b6edef36cd96a60539fb7c2dac9637) ) /* Version 3.00 Euro */ ROM_REGION( 0x100000, "gfx1", 0 ) - ROM_LOAD( "maz-02.2h", 0x00000, 0x100000, CRC(c9d35a59) SHA1(07b44c7d7d76b668b4d6ca5672bd1c2910228e68) ) + ROM_LOAD( "maz-02.2h", 0x00000, 0x100000, CRC(c9d35a59) SHA1(07b44c7d7d76b668b4d6ca5672bd1c2910228e68) ) ROM_REGION( 0x100000, "gfx2", 0 ) - ROM_LOAD16_BYTE( "maz-00.1b", 0x000000, 0x080000, CRC(fa3071f4) SHA1(72e7d920e9ca94f8cb166007a9e9e5426a201af8) ) - ROM_LOAD16_BYTE( "maz-01.3b", 0x000001, 0x080000, CRC(4934fe21) SHA1(b852249f59906d69d32160ebaf9b4781193227e4) ) + ROM_LOAD16_BYTE( "maz-00.1b", 0x000000, 0x080000, CRC(fa3071f4) SHA1(72e7d920e9ca94f8cb166007a9e9e5426a201af8) ) + ROM_LOAD16_BYTE( "maz-01.3b", 0x000001, 0x080000, CRC(4934fe21) SHA1(b852249f59906d69d32160ebaf9b4781193227e4) ) ROM_REGION( 0x40000, "oki1", 0 ) /* Oki samples */ - ROM_LOAD( "ke01.14f", 0x00000, 0x20000, CRC(8a106263) SHA1(229ab17403c2b8f4e89a90a8cda2f3c3a4b55d9e) ) + ROM_LOAD( "ke01.14f", 0x00000, 0x20000, CRC(8a106263) SHA1(229ab17403c2b8f4e89a90a8cda2f3c3a4b55d9e) ) ROM_REGION( 0x100000, "oki2", 0 ) /* Oki samples (banked?) */ - ROM_LOAD( "maz-03.13f", 0x00000, 0x100000, CRC(a313c964) SHA1(4a3664c4e2c44a017a0ab6a6d4361799cbda57b5) ) + ROM_LOAD( "maz-03.13f", 0x00000, 0x100000, CRC(a313c964) SHA1(4a3664c4e2c44a017a0ab6a6d4361799cbda57b5) ) ROM_END ROM_START( pktgaldxj ) ROM_REGION( 0x80000, "maincpu", 0 ) /* DE102 code (encrypted) */ - ROM_LOAD16_WORD_SWAP( "kg00-2.12a", 0x00000, 0x80000, CRC(62dc4137) SHA1(23887dc3f6e7c4cdcb1bf4f4c87fe3cbe8cdbe69) ) + ROM_LOAD16_WORD_SWAP( "kg00-2.12a", 0x00000, 0x80000, CRC(62dc4137) SHA1(23887dc3f6e7c4cdcb1bf4f4c87fe3cbe8cdbe69) ) /* Version 3.00 Japan */ + + ROM_REGION( 0x100000, "gfx1", 0 ) + ROM_LOAD( "maz-02.2h", 0x00000, 0x100000, CRC(c9d35a59) SHA1(07b44c7d7d76b668b4d6ca5672bd1c2910228e68) ) + + ROM_REGION( 0x100000, "gfx2", 0 ) + ROM_LOAD16_BYTE( "maz-00.1b", 0x000000, 0x080000, CRC(fa3071f4) SHA1(72e7d920e9ca94f8cb166007a9e9e5426a201af8) ) + ROM_LOAD16_BYTE( "maz-01.3b", 0x000001, 0x080000, CRC(4934fe21) SHA1(b852249f59906d69d32160ebaf9b4781193227e4) ) + + ROM_REGION( 0x40000, "oki1", 0 ) /* Oki samples */ + ROM_LOAD( "ke01.14f", 0x00000, 0x20000, CRC(8a106263) SHA1(229ab17403c2b8f4e89a90a8cda2f3c3a4b55d9e) ) + + ROM_REGION( 0x100000, "oki2", 0 ) /* Oki samples (banked?) */ + ROM_LOAD( "maz-03.13f", 0x00000, 0x100000, CRC(a313c964) SHA1(4a3664c4e2c44a017a0ab6a6d4361799cbda57b5) ) +ROM_END + +ROM_START( pktgaldxa ) + ROM_REGION( 0x80000, "maincpu", 0 ) /* DE102 code (encrypted) */ + ROM_LOAD16_WORD_SWAP( "rom.12a", 0x00000, 0x80000, CRC(c4c7cc68) SHA1(d3841459096a37ffd96fbf9017d3176893034c01) ) /* Version 3.00 Asia - Need to verify label */ ROM_REGION( 0x100000, "gfx1", 0 ) - ROM_LOAD( "maz-02.2h", 0x00000, 0x100000, CRC(c9d35a59) SHA1(07b44c7d7d76b668b4d6ca5672bd1c2910228e68) ) + ROM_LOAD( "maz-02.2h", 0x00000, 0x100000, CRC(c9d35a59) SHA1(07b44c7d7d76b668b4d6ca5672bd1c2910228e68) ) ROM_REGION( 0x100000, "gfx2", 0 ) - ROM_LOAD16_BYTE( "maz-00.1b", 0x000000, 0x080000, CRC(fa3071f4) SHA1(72e7d920e9ca94f8cb166007a9e9e5426a201af8) ) - ROM_LOAD16_BYTE( "maz-01.3b", 0x000001, 0x080000, CRC(4934fe21) SHA1(b852249f59906d69d32160ebaf9b4781193227e4) ) + ROM_LOAD16_BYTE( "maz-00.1b", 0x000000, 0x080000, CRC(fa3071f4) SHA1(72e7d920e9ca94f8cb166007a9e9e5426a201af8) ) + ROM_LOAD16_BYTE( "maz-01.3b", 0x000001, 0x080000, CRC(4934fe21) SHA1(b852249f59906d69d32160ebaf9b4781193227e4) ) ROM_REGION( 0x40000, "oki1", 0 ) /* Oki samples */ - ROM_LOAD( "ke01.14f", 0x00000, 0x20000, CRC(8a106263) SHA1(229ab17403c2b8f4e89a90a8cda2f3c3a4b55d9e) ) + ROM_LOAD( "ke01.14f", 0x00000, 0x20000, CRC(8a106263) SHA1(229ab17403c2b8f4e89a90a8cda2f3c3a4b55d9e) ) ROM_REGION( 0x100000, "oki2", 0 ) /* Oki samples (banked?) */ - ROM_LOAD( "maz-03.13f", 0x00000, 0x100000, CRC(a313c964) SHA1(4a3664c4e2c44a017a0ab6a6d4361799cbda57b5) ) + ROM_LOAD( "maz-03.13f", 0x00000, 0x100000, CRC(a313c964) SHA1(4a3664c4e2c44a017a0ab6a6d4361799cbda57b5) ) ROM_END ROM_START( pktgaldxb ) @@ -475,19 +495,19 @@ ROM_START( pktgaldxb ) ROM_LOAD16_BYTE( "5.bin", 0x00001, 0x80000, CRC(64cb4c33) SHA1(02f988f558113dd9a77079dee59e23583394fa98) ) ROM_REGION( 0x400000, "gfx1", 0 ) - ROM_LOAD16_BYTE( "11.bin", 0x000000, 0x80000, CRC(a8c8f1fd) SHA1(9fd5fa500967a1bd692abdbeef89ce195c8aecd4) ) - ROM_LOAD16_BYTE( "6.bin", 0x000001, 0x80000, CRC(0e3335a1) SHA1(2d6899336302d222e8404dde159e64911a8f94e6) ) - ROM_LOAD16_BYTE( "10.bin", 0x100000, 0x80000, CRC(9dd743a9) SHA1(dbc3e2bd044dbf21b04c174bd860969ee53b4050) ) - ROM_LOAD16_BYTE( "7.bin", 0x100001, 0x80000, CRC(0ebf12b5) SHA1(17b6c2ce21de3671d75d89a41317efddf5b49339) ) - ROM_LOAD16_BYTE( "9.bin", 0x200001, 0x80000, CRC(078f371c) SHA1(5b510a0f7f50c55cce1ffcc8f2e9c3432b23e352) ) - ROM_LOAD16_BYTE( "8.bin", 0x200000, 0x80000, CRC(40f5a032) SHA1(c2ad585ddbc3ef40c6214cb30b4d78a2cd0a9446) ) + ROM_LOAD16_BYTE( "11.bin", 0x000000, 0x80000, CRC(a8c8f1fd) SHA1(9fd5fa500967a1bd692abdbeef89ce195c8aecd4) ) + ROM_LOAD16_BYTE( "6.bin", 0x000001, 0x80000, CRC(0e3335a1) SHA1(2d6899336302d222e8404dde159e64911a8f94e6) ) + ROM_LOAD16_BYTE( "10.bin", 0x100000, 0x80000, CRC(9dd743a9) SHA1(dbc3e2bd044dbf21b04c174bd860969ee53b4050) ) + ROM_LOAD16_BYTE( "7.bin", 0x100001, 0x80000, CRC(0ebf12b5) SHA1(17b6c2ce21de3671d75d89a41317efddf5b49339) ) + ROM_LOAD16_BYTE( "9.bin", 0x200001, 0x80000, CRC(078f371c) SHA1(5b510a0f7f50c55cce1ffcc8f2e9c3432b23e352) ) + ROM_LOAD16_BYTE( "8.bin", 0x200000, 0x80000, CRC(40f5a032) SHA1(c2ad585ddbc3ef40c6214cb30b4d78a2cd0a9446) ) ROM_REGION( 0x40000, "oki1", 0 ) /* Oki samples */ - ROM_LOAD( "kg01.14f", 0x00000, 0x20000, CRC(8a106263) SHA1(229ab17403c2b8f4e89a90a8cda2f3c3a4b55d9e) ) // 1.bin on the bootleg + ROM_LOAD( "1.bin", 0x00000, 0x20000, CRC(8a106263) SHA1(229ab17403c2b8f4e89a90a8cda2f3c3a4b55d9e) ) ROM_REGION( 0x100000, "oki2", 0 ) /* Oki samples (banked?) */ - ROM_LOAD( "3.bin", 0x00000, 0x80000, CRC(4638747b) SHA1(56d79cd8d4d7b41b71f1e942b5a5bf1bafc5c6e7) ) - ROM_LOAD( "2.bin", 0x80000, 0x80000, CRC(f841d995) SHA1(0ef2f8fd9be62b979862c3688e7aad34c7b0404d) ) + ROM_LOAD( "3.bin", 0x00000, 0x80000, CRC(4638747b) SHA1(56d79cd8d4d7b41b71f1e942b5a5bf1bafc5c6e7) ) + ROM_LOAD( "2.bin", 0x80000, 0x80000, CRC(f841d995) SHA1(0ef2f8fd9be62b979862c3688e7aad34c7b0404d) ) ROM_END @@ -498,6 +518,7 @@ void pktgaldx_state::init_pktgaldx() deco102_decrypt_cpu((uint16_t *)memregion("maincpu")->base(), m_decrypted_opcodes, 0x80000, 0x42ba, 0x00, 0x00); } -GAME( 1992, pktgaldx, 0, pktgaldx, pktgaldx, pktgaldx_state, init_pktgaldx, ROT0, "Data East Corporation", "Pocket Gal Deluxe (Euro v3.00)", MACHINE_SUPPORTS_SAVE ) +GAME( 1992, pktgaldx, 0, pktgaldx, pktgaldx, pktgaldx_state, init_pktgaldx, ROT0, "Data East Corporation", "Pocket Gal Deluxe (Euro v3.00)", MACHINE_SUPPORTS_SAVE ) GAME( 1993, pktgaldxj, pktgaldx, pktgaldx, pktgaldx, pktgaldx_state, init_pktgaldx, ROT0, "Data East Corporation (Nihon System license)", "Pocket Gal Deluxe (Japan v3.00)", MACHINE_SUPPORTS_SAVE ) -GAME( 1992, pktgaldxb, pktgaldx, pktgaldb, pktgaldx, pktgaldx_state, empty_init, ROT0, "bootleg", "Pocket Gal Deluxe (Euro v3.00, bootleg)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1992, pktgaldxa, pktgaldx, pktgaldx, pktgaldx, pktgaldx_state, init_pktgaldx, ROT0, "Data East Corporation", "Pocket Gal Deluxe (Asia v3.00)", MACHINE_SUPPORTS_SAVE ) +GAME( 1992, pktgaldxb, pktgaldx, pktgaldb, pktgaldx, pktgaldx_state, empty_init, ROT0, "bootleg", "Pocket Gal Deluxe (Euro v3.00, bootleg)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/prof180x.cpp b/src/mame/drivers/prof180x.cpp index c4e7fe5c1bf..0ba1d386377 100644 --- a/src/mame/drivers/prof180x.cpp +++ b/src/mame/drivers/prof180x.cpp @@ -252,7 +252,7 @@ MACHINE_CONFIG_START(prof180x_state::prof180x) MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 480-1) /* devices */ - MCFG_UPD765A_ADD(FDC9268_TAG, false, true) + UPD765A(config, FDC9268_TAG, false, true); MCFG_FLOPPY_DRIVE_ADD(FDC9268_TAG ":0", prof180x_floppies, "35dd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(FDC9268_TAG ":1", prof180x_floppies, "35dd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(FDC9268_TAG ":2", prof180x_floppies, "35dd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/prof80.cpp b/src/mame/drivers/prof80.cpp index 9ae0f6d292c..11a596e0774 100644 --- a/src/mame/drivers/prof80.cpp +++ b/src/mame/drivers/prof80.cpp @@ -460,10 +460,10 @@ MACHINE_CONFIG_START(prof80_state::prof80) MCFG_PROF80_MMU_ADD(m_mmu, prof80_mmu) // RTC - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); // FDC - MCFG_UPD765A_ADD(UPD765_TAG, true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", prof80_floppies, "525qd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", prof80_floppies, "525qd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":2", prof80_floppies, nullptr, floppy_image_device::default_floppy_formats) @@ -471,12 +471,12 @@ MACHINE_CONFIG_START(prof80_state::prof80) // DEMUX latches LS259(config, m_flra); - m_flra->q_out_cb<0>().set(UPD1990A_TAG, FUNC(upd1990a_device::data_in_w)); // TDI - m_flra->q_out_cb<0>().append(UPD1990A_TAG, FUNC(upd1990a_device::c0_w)); // C0 - m_flra->q_out_cb<1>().set(UPD1990A_TAG, FUNC(upd1990a_device::c1_w)); // C1 - m_flra->q_out_cb<2>().set(UPD1990A_TAG, FUNC(upd1990a_device::c2_w)); // C2 + m_flra->q_out_cb<0>().set(m_rtc, FUNC(upd1990a_device::data_in_w)); // TDI + m_flra->q_out_cb<0>().append(m_rtc, FUNC(upd1990a_device::c0_w)); // C0 + m_flra->q_out_cb<1>().set(m_rtc, FUNC(upd1990a_device::c1_w)); // C1 + m_flra->q_out_cb<2>().set(m_rtc, FUNC(upd1990a_device::c2_w)); // C2 m_flra->q_out_cb<3>().set(FUNC(prof80_state::ready_w)); // READY - m_flra->q_out_cb<4>().set(UPD1990A_TAG, FUNC(upd1990a_device::clk_w)); // TCK + m_flra->q_out_cb<4>().set(m_rtc, FUNC(upd1990a_device::clk_w)); // TCK m_flra->q_out_cb<5>().set(FUNC(prof80_state::inuse_w)); // IN USE m_flra->q_out_cb<6>().set(FUNC(prof80_state::motor_w)); // _MOTOR m_flra->q_out_cb<7>().set(FUNC(prof80_state::select_w)); // SELECT @@ -487,7 +487,7 @@ MACHINE_CONFIG_START(prof80_state::prof80) m_flrb->q_out_cb<3>().set(m_rs232a, FUNC(rs232_port_device::write_txd)); // TX m_flrb->q_out_cb<4>().set(FUNC(prof80_state::mstop_w)); // _MSTOP m_flrb->q_out_cb<5>().set(m_rs232b, FUNC(rs232_port_device::write_txd)); // TXP - m_flrb->q_out_cb<6>().set(UPD1990A_TAG, FUNC(upd1990a_device::stb_w)); // TSTB + m_flrb->q_out_cb<6>().set(m_rtc, FUNC(upd1990a_device::stb_w)); // TSTB m_flrb->q_out_cb<7>().set(m_mmu, FUNC(prof80_mmu_device::mme_w)); // MME // ECB bus diff --git a/src/mame/drivers/pwrview.cpp b/src/mame/drivers/pwrview.cpp index 0e66b61a15e..4a8cb3ebe54 100644 --- a/src/mame/drivers/pwrview.cpp +++ b/src/mame/drivers/pwrview.cpp @@ -419,9 +419,9 @@ MACHINE_CONFIG_START(pwrview_state::pwrview) MCFG_PIT8253_CLK2(XTAL(16'000'000)/16) // floppy disk controller - MCFG_UPD765A_ADD("fdc", true, true) // Rockwell R7675P - //MCFG_UPD765_INTRQ_CALLBACK(WRITELINE("pic1", pic8259_device, ir6_w)) - //MCFG_UPD765_DRQ_CALLBACK(WRITELINE("maincpu", i80186_cpu_device, drq1_w)) + UPD765A(config, "fdc", true, true); // Rockwell R7675P + //fdc.intrq_wr_callback().set("pic1", FUNC(pic8259_device::ir6_w)); + //fdc.drq_wr_callback().set(m_maincpu, FUNC(i80186_cpu_device::drq1_w)); MCFG_FLOPPY_DRIVE_ADD("fdc:0", pwrview_floppies, "525dd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("fdc:1", pwrview_floppies, "525dd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/pyl601.cpp b/src/mame/drivers/pyl601.cpp index e9a0102fa51..87c70ad0b2b 100644 --- a/src/mame/drivers/pyl601.cpp +++ b/src/mame/drivers/pyl601.cpp @@ -569,7 +569,7 @@ MACHINE_CONFIG_START(pyl601_state::pyl601) MCFG_MC6845_CHAR_WIDTH(8) /* ? */ MCFG_MC6845_UPDATE_ROW_CB(pyl601_state, pyl601_update_row) - MCFG_UPD765A_ADD("upd765", true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD("upd765:0", pyl601_floppies, "525hd", pyl601_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765:1", pyl601_floppies, "525hd", pyl601_state::floppy_formats) MCFG_SOFTWARE_LIST_ADD("flop_list","pyl601") diff --git a/src/mame/drivers/s11c.cpp b/src/mame/drivers/s11c.cpp index 27e6eae10a8..fb4c3f12cde 100644 --- a/src/mame/drivers/s11c.cpp +++ b/src/mame/drivers/s11c.cpp @@ -298,6 +298,16 @@ ROM_START(diner_l1) ROM_LOAD("dinr_u20.l1", 0x30000, 0x10000, CRC(511fb260) SHA1(e6e25b464c5c38f3c0492436f1e8aa2be33dd278)) ROM_END +ROM_START(diner_p0) + ROM_REGION(0x10000, "maincpu", 0) + ROM_LOAD("dinr_u26.pa0", 0x4000, 0x4000, CRC(dbf5de09) SHA1(55ca30bdf6e6e482f3ce5891b866103492fa3754)) + ROM_LOAD("dinr_u27.pa0", 0x8000, 0x8000, CRC(9875d16e) SHA1(fbbab61cc9e8e3f7a1bf1428ad50ad3c13f0f120)) + ROM_REGION(0x50000, "bgcpu", ROMREGION_ERASEFF) + ROM_LOAD("dinr_u4.l1", 0x10000, 0x10000, CRC(3bd28368) SHA1(41eec2f5f863039deaabfae8aece4b1cf15e4b78)) + ROM_LOAD("dinr_u19.l1", 0x20000, 0x10000, CRC(278b9a30) SHA1(41e59adb8b6c08caee46c3dd73256480b4041619)) + ROM_LOAD("dinr_u20.l1", 0x30000, 0x10000, CRC(511fb260) SHA1(e6e25b464c5c38f3c0492436f1e8aa2be33dd278)) +ROM_END + /*-------------------- / Dr. Dude 11/90 /--------------------*/ @@ -594,6 +604,7 @@ GAME(1990, diner_l3, diner_l4, s11c, s11c, s11c_state, init_s11c, ROT0, GAME(1990, diner_l2, diner_l4, s11c, s11c, s11c_state, init_s11c, ROT0, "Williams", "Diner (LU-2) Europe", MACHINE_IS_SKELETON_MECHANICAL) GAME(1990, diner_f2, diner_l4, s11c, s11c, s11c_state, init_s11c, ROT0, "Williams", "Diner (LF-2) French", MACHINE_IS_SKELETON_MECHANICAL) GAME(1990, diner_l1, diner_l4, s11c, s11c, s11c_state, init_s11c, ROT0, "Williams", "Diner (LU-1) Europe", MACHINE_IS_SKELETON_MECHANICAL) +GAME(1990, diner_p0, diner_l4, s11c, s11c, s11c_state, init_s11c, ROT0, "Williams", "Diner (PA-0 prototype)", MACHINE_IS_SKELETON_MECHANICAL) GAME(1990, dd_l2, 0, s11c, s11c, s11c_state, init_s11c, ROT0, "Bally", "Dr. Dude (LA-2)", MACHINE_IS_SKELETON_MECHANICAL) GAME(1990, dd_p6, dd_l2, s11c, s11c, s11c_state, init_s11c, ROT0, "Bally", "Dr. Dude (PA-6)", MACHINE_IS_SKELETON_MECHANICAL) GAME(1990, pool_l7, 0, s11c, s11c, s11c_state, init_s11c, ROT0, "Bally", "Pool Sharks (LA-7)", MACHINE_IS_SKELETON_MECHANICAL) diff --git a/src/mame/drivers/sage2.cpp b/src/mame/drivers/sage2.cpp index b3a7ddd1eb6..66a8cdb0334 100644 --- a/src/mame/drivers/sage2.cpp +++ b/src/mame/drivers/sage2.cpp @@ -467,8 +467,8 @@ MACHINE_CONFIG_START(sage2_state::sage2) MCFG_RS232_RXD_HANDLER(WRITELINE(m_usart1, i8251_device, write_rxd)) MCFG_RS232_DSR_HANDLER(WRITELINE(m_usart1, i8251_device, write_dsr)) - MCFG_UPD765A_ADD(UPD765_TAG, false, false) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, sage2_state, fdc_irq)) + UPD765A(config, m_fdc, false, false); + m_fdc->intrq_wr_callback().set(FUNC(sage2_state::fdc_irq)); MCFG_DEVICE_ADD(m_centronics, CENTRONICS, centronics_devices, "printer") MCFG_CENTRONICS_ACK_HANDLER(WRITELINE(*this, sage2_state, write_centronics_ack)) diff --git a/src/mame/drivers/sbrain.cpp b/src/mame/drivers/sbrain.cpp index 8b088a092d1..fc143eb1af5 100644 --- a/src/mame/drivers/sbrain.cpp +++ b/src/mame/drivers/sbrain.cpp @@ -8,10 +8,12 @@ Intertec SuperBrain Intertec Compustar terminal appears to have identical hardware. Need roms for it. -Chips: 2x Z80; FD1791; 2x 8251; 8255; BR1941; CRT8002; KR3600; DP8350 +Chips: 2x Z80; FD1791; 2x 8251; 8255; BR1941; CRT8002-003; KR3600-056; DP8350; MM5035 Xtals: 16.0, 10.92, 5.0688 +RAM: 32K or 64K dynamic (TMS4116-20NL); 1K static disk buffer (MM2114) Disk parameters: 512 bytes x 10 sectors x 35 tracks. 1 and 2-sided disks supported. Sound: Beeper +Expansion bus: 40 pins, nearly identical to TRS-80 The boot prom is shared between both cpus. This feat is accomplished by holding the sub cpu in reset, until the main cpu has prepared a few memory locations. The first thing in the rom @@ -26,30 +28,29 @@ When booted, the time (corrupted) is displayed at top right. You need to run TIM The schematic in parts is difficult to read. Some assumptions have been made. To Do: -- Without a disk in, it should display a message to insert a disk. Doesn't happen. May - attempt to execute empty memory instead. (-bios 1, -bios 2) - Improve keyboard. -- Video chips need to be emulated (CRT8002 and DP8350), attributes etc. +- Row buffering DMA (DP8350, MM5035) and line-by-line rendering. +- Proper character generator emulation (CRT8002). +- Add expansion bus slot. - Probably lots of other stuff. -- PC0 when high will swap out lower 16k of RAM for the DP8350 device. The value of HL (the - "memory" address) is the data (cursor location, top of screen, etc). The byte "written" - to this address (d0,d1) is the command for the CRTC. *************************************************************************************************************/ #include "emu.h" #include "cpu/z80/z80.h" +#include "bus/rs232/rs232.h" #include "machine/com8116.h" #include "machine/i8251.h" #include "machine/i8255.h" #include "machine/wd_fdc.h" +#include "machine/ram.h" #include "machine/timer.h" #include "sound/beep.h" -//#include "video/dp8350.h" -#include "emupal.h" +#include "video/dp8350.h" #include "screen.h" #include "speaker.h" +#include <algorithm> class sbrain_state : public driver_device @@ -59,42 +60,56 @@ public: : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") , m_subcpu(*this, "subcpu") - , m_p_videoram(*this, "videoram") , m_p_chargen(*this, "chargen") , m_beep(*this, "beeper") - , m_u0(*this, "uart0") - , m_u1(*this, "uart1") + , m_crtc(*this, "crtc") + , m_usart(*this, "usart%u", 0U) + , m_mainport(*this, "mainport") , m_ppi(*this, "ppi") - , m_fdc (*this, "fdc") - , m_floppy0(*this, "fdc:0") - , m_floppy1(*this, "fdc:1") - , m_vs(*this, "VS") - , m_bankr0(*this, "bankr0") - , m_bankw0(*this, "bankw0") - , m_bank2(*this, "bank2") + , m_fdc(*this, "fdc") + , m_floppy(*this, "fdc:%u", 0U) + , m_ram(*this, RAM_TAG) + , m_boot_prom(*this, "subcpu") + , m_disk_buffer(*this, "buffer") , m_keyboard(*this, "X%u", 0) + , m_modifiers(*this, "MODIFIERS") + , m_serial_sw(*this, "BAUDCLOCK") { } void sbrain(machine_config &config); - void init_sbrain(); +protected: + virtual void machine_start() override; + virtual void machine_reset() override; private: - DECLARE_MACHINE_RESET(sbrain); - DECLARE_READ8_MEMBER(ppi_pa_r); - DECLARE_WRITE8_MEMBER(ppi_pa_w); - DECLARE_READ8_MEMBER(ppi_pb_r); - DECLARE_WRITE8_MEMBER(ppi_pb_w); - DECLARE_READ8_MEMBER(ppi_pc_r); - DECLARE_WRITE8_MEMBER(ppi_pc_w); - DECLARE_READ8_MEMBER(port48_r); - DECLARE_READ8_MEMBER(port50_r); - DECLARE_READ8_MEMBER(port10_r); - DECLARE_WRITE8_MEMBER(port10_w); - u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + u8 mem_r(offs_t offset); + void mem_w(offs_t offset, u8 data); + + u8 ppi_pa_r(); + void ppi_pa_w(u8 data); + u8 ppi_pb_r(); + void ppi_pb_w(u8 data); + u8 ppi_pc_r(); + void ppi_pc_w(u8 data); + u8 char_int_ack_r(); + void char_int_ack_w(u8 data); + u8 keyboard_r(); + + void disk_select_w(u8 data); + + u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); TIMER_DEVICE_CALLBACK_MEMBER(kbd_scan); + DECLARE_WRITE_LINE_MEMBER(crtc_lrc_w); + DECLARE_WRITE_LINE_MEMBER(crtc_vblank_w); + DECLARE_WRITE_LINE_MEMBER(crtc_vsync_w); + + DECLARE_WRITE_LINE_MEMBER(external_txc_w); + DECLARE_WRITE_LINE_MEMBER(external_rxc_w); + DECLARE_WRITE_LINE_MEMBER(internal_txc_rxc_w); + void sbrain_io(address_map &map); void sbrain_mem(address_map &map); void sbrain_subio(address_map &map); @@ -106,78 +121,135 @@ private: u8 m_portb; u8 m_portc; u8 m_port10; - u8 m_term_data; + u8 m_key_data; u8 m_framecnt; + required_device<cpu_device> m_maincpu; required_device<cpu_device> m_subcpu; - required_shared_ptr<u8> m_p_videoram; required_region_ptr<u8> m_p_chargen; required_device<beep_device> m_beep; - required_device<i8251_device> m_u0; - required_device<i8251_device> m_u1; + required_device<dp8350_device> m_crtc; + required_device_array<i8251_device, 2> m_usart; + required_device<rs232_port_device> m_mainport; required_device<i8255_device> m_ppi; required_device<fd1791_device> m_fdc; - required_device<floppy_connector> m_floppy0; - required_device<floppy_connector> m_floppy1; - required_ioport m_vs; - required_memory_bank m_bankr0; - required_memory_bank m_bankw0; - required_memory_bank m_bank2; + required_device_array<floppy_connector, 4> m_floppy; + required_device<ram_device> m_ram; + required_region_ptr<u8> m_boot_prom; + required_shared_ptr<u8> m_disk_buffer; + required_ioport_array<10> m_keyboard; + required_ioport m_modifiers; + required_ioport m_serial_sw; }; void sbrain_state::sbrain_mem(address_map &map) { - map(0x0000, 0x3fff).bankr("bankr0").bankw("bankw0"); - map(0x4000, 0x7fff).ram(); - map(0x8000, 0xbfff).bankrw("bank2"); - map(0xc000, 0xf7ff).ram(); - map(0xf800, 0xffff).ram().share("videoram"); + map(0x0000, 0xffff).rw(FUNC(sbrain_state::mem_r), FUNC(sbrain_state::mem_w)); } void sbrain_state::sbrain_io(address_map &map) { map.global_mask(0xff); - map(0x40, 0x41).mirror(6).rw(m_u0, FUNC(i8251_device::read), FUNC(i8251_device::write)); - map(0x48, 0x4f).r(FUNC(sbrain_state::port48_r)); //chr_int_latch - map(0x50, 0x57).r(FUNC(sbrain_state::port50_r)); - map(0x58, 0x59).mirror(6).rw(m_u1, FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0x40, 0x41).mirror(6).rw(m_usart[0], FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0x48, 0x48).mirror(7).rw(FUNC(sbrain_state::char_int_ack_r), FUNC(sbrain_state::char_int_ack_w)); //chr_int_latch + map(0x50, 0x50).mirror(7).r(FUNC(sbrain_state::keyboard_r)); + map(0x58, 0x59).mirror(6).rw(m_usart[1], FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x60, 0x60).mirror(7).w("brg", FUNC(com8116_device::stt_str_w)); map(0x68, 0x6b).mirror(4).rw(m_ppi, FUNC(i8255_device::read), FUNC(i8255_device::write)); } void sbrain_state::sbrain_submem(address_map &map) { - map(0x0000, 0x07ff).rom(); - map(0x8800, 0x8bff).ram().region("subcpu", 0x8800); + map(0x0000, 0x07ff).mirror(0xf000).rom().region("subcpu", 0); + map(0x8800, 0x8bff).mirror(0x7400).ram().share("buffer"); } void sbrain_state::sbrain_subio(address_map &map) { - map.global_mask(0xff); - map(0x08, 0x0b).rw(m_fdc, FUNC(fd1791_device::read), FUNC(fd1791_device::write)); - map(0x10, 0x10).rw(FUNC(sbrain_state::port10_r), FUNC(sbrain_state::port10_w)); + map.global_mask(0x1f); + map(0x08, 0x0b).mirror(4).rw(m_fdc, FUNC(fd1791_device::read), FUNC(fd1791_device::write)); + map(0x10, 0x10).mirror(7).w(FUNC(sbrain_state::disk_select_w)); } -READ8_MEMBER( sbrain_state::port48_r ) +u8 sbrain_state::mem_r(offs_t offset) { - m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE); + switch (offset & 0xc000) + { + case 0x0000: + // PPIC-2 set selects boot PROM + if (BIT(m_portc, 2)) + return m_boot_prom[offset & 0x7ff]; + + // lowest 16K of RAM is disabled when PPIC-0 is set + if (BIT(m_portc, 0)) + return 0xff; + break; + + case 0x8000: + // resetting PPIC-4 selects disk buffer RAM + if (!BIT(m_portc, 4)) + return m_disk_buffer[offset & 0x3ff]; + + break; + } + + return m_ram->read(offset); +} + +void sbrain_state::mem_w(offs_t offset, u8 data) +{ + // any memory write affects CRTC when PPIC-0 is set + if (BIT(m_portc, 0)) + m_crtc->register_load(bitswap<2>(data, 0, 1), offset & 0xfff); + + switch (offset & 0xc000) + { + case 0x0000: + // can't write to boot PROM + if (BIT(m_portc, 2)) + return; + + // RAS is disabled for bank 0 when PPIC-0 is set + if (BIT(m_portc, 0)) + return; + + break; + + case 0x8000: + // resetting PPIC-4 selects disk buffer RAM + if (!BIT(m_portc, 4)) + { + m_disk_buffer[offset & 0x3ff] = data; + break; + } + + break; + } + + m_ram->write(offset, data); +} + +u8 sbrain_state::char_int_ack_r() +{ + if (!machine().side_effects_disabled()) + m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE); return 0xff; } -READ8_MEMBER( sbrain_state::port50_r ) +void sbrain_state::char_int_ack_w(u8 data) { - return m_term_data; + m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE); } -READ8_MEMBER( sbrain_state::port10_r ) +u8 sbrain_state::keyboard_r() { - return m_port10; + return m_key_data; } /* Misc disk functions -d0 : ? +d0 : busy signal to master CPU d1 : SEL A (drive 0?) d2 : SEL B (drive 1?) d3 : SEL C @@ -185,24 +257,26 @@ d4 : SEL D d5 : side select d6,7 : not used */ -WRITE8_MEMBER( sbrain_state::port10_w ) +void sbrain_state::disk_select_w(u8 data) { m_port10 = data | 0xc0; floppy_image_device *floppy = nullptr; - if (BIT(m_port10, 1)) floppy = m_floppy0->get_device(); - if (BIT(m_port10, 2)) floppy = m_floppy1->get_device(); + for (int d = 0; d < 4; d++) + if (BIT(m_port10, d + 1)) + { + floppy = m_floppy[d]->get_device(); + if (floppy) + break; + } m_fdc->set_floppy(floppy); if (floppy) floppy->ss_w(BIT(m_port10, 5)); - - m_floppy0->get_device()->mon_w(0); // motors run all the time - m_floppy1->get_device()->mon_w(0); } -READ8_MEMBER( sbrain_state::ppi_pa_r ) +u8 sbrain_state::ppi_pa_r() { return m_porta; } @@ -215,8 +289,10 @@ d5 : strike through d6 : 1=60hz 0=50hz d7 : reverse video */ -WRITE8_MEMBER( sbrain_state::ppi_pa_w ) +void sbrain_state::ppi_pa_w(u8 data) { + m_crtc->refresh_control(BIT(data, 6)); + m_porta = data; } @@ -226,25 +302,26 @@ d1 : key held down d2 : Vert Blank d3 : not used d4 : /capslock -d5 : ? +d5 : disk status: 1 = busy, 0 = ready d6 : Ring Indicator line from main rs232 port, 1=normal, 0=set d7 : cpu2 /busak line */ -READ8_MEMBER( sbrain_state::ppi_pb_r ) +u8 sbrain_state::ppi_pb_r() { - u8 vertsync = m_vs->read(); // bit 2 - u8 capslock = BIT(ioport("MODIFIERS")->read(), 0) << 4; // bit 4, capslock + u8 vertsync = m_crtc->vblank_r() << 2; + u8 capslock = BIT(m_modifiers->read(), 0) << 4; // bit 4, capslock u8 p10d0 = BIT(m_port10, 0) << 5; // bit 5 + u8 ri = m_mainport->ri_r() << 6; u8 busak = m_busak ? 128 : 0; // bit 7 - return busak | p10d0 | capslock | vertsync | m_keydown; + return busak | ri | p10d0 | capslock | vertsync | m_keydown; } -WRITE8_MEMBER( sbrain_state::ppi_pb_w ) +void sbrain_state::ppi_pb_w(u8 data) { m_portb = data & 8; } -READ8_MEMBER( sbrain_state::ppi_pc_r ) +u8 sbrain_state::ppi_pc_r() { return m_portc; } @@ -259,20 +336,45 @@ d5 : cpu2 /busreq line d6 : beeper d7 : keyboard, 1=enable comms, 0=reset */ -WRITE8_MEMBER( sbrain_state::ppi_pc_w ) +void sbrain_state::ppi_pc_w(u8 data) { m_portc = data; m_beep->set_state(BIT(data, 6)); - m_bankr0->set_entry(BIT(data, 2)); - m_bank2->set_entry(BIT(data, 4)); if (!BIT(data, 7)) m_keydown &= 2; // ack DR m_subcpu->set_input_line(INPUT_LINE_RESET, BIT(data, 3) ? ASSERT_LINE : CLEAR_LINE); + if (BIT(data, 3)) + { + m_fdc->soft_reset(); + disk_select_w(0); + } m_subcpu->set_input_line(Z80_INPUT_LINE_BUSRQ, BIT(data, 5) ? ASSERT_LINE : CLEAR_LINE); // ignored in z80.cpp m_busak = BIT(data, 5); } +WRITE_LINE_MEMBER(sbrain_state::external_txc_w) +{ + if (!BIT(m_serial_sw->read(), 0)) + m_usart[1]->write_txc(state); +} + +WRITE_LINE_MEMBER(sbrain_state::external_rxc_w) +{ + if (!BIT(m_serial_sw->read(), 2)) + m_usart[1]->write_rxc(state); +} + +WRITE_LINE_MEMBER(sbrain_state::internal_txc_rxc_w) +{ + if (!BIT(m_serial_sw->read(), 1)) + m_usart[1]->write_txc(state); + if (!BIT(m_serial_sw->read(), 3)) + m_usart[1]->write_rxc(state); + if (!BIT(m_serial_sw->read(), 4)) + m_mainport->write_etc(state); +} + u8 translate_table[3][10][8] = { // unshifted { @@ -415,16 +517,23 @@ static INPUT_PORTS_START( sbrain ) PORT_BIT(0x02,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1) PORT_BIT(0x04,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_SHIFT_2) - /* vblank */ - PORT_START("VS") - PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_VBLANK("screen") + PORT_START("BAUDCLOCK") + PORT_DIPNAME(0x03, 0x01, "Main TX Clock") PORT_DIPLOCATION("SW:1,3") + PORT_DIPSETTING(0x01, "Internal") + PORT_DIPSETTING(0x02, "External") + PORT_DIPNAME(0x0c, 0x04, "Main RX Clock") PORT_DIPLOCATION("SW:2,4") + PORT_DIPSETTING(0x04, "Internal") + PORT_DIPSETTING(0x08, "External") + PORT_DIPNAME(0x10, 0x10, "Internal Baud Clock to Main Port") PORT_DIPLOCATION("SW:5") + PORT_DIPSETTING(0x10, DEF_STR(Off)) + PORT_DIPSETTING(0x00, DEF_STR(On)) INPUT_PORTS_END TIMER_DEVICE_CALLBACK_MEMBER(sbrain_state::kbd_scan) { // m_keydown: d0 = 1 after key pressed, and is reset by pc7; d1 = 1 while a key is down. m_keydown &= 1; - u8 i, j, keyin, mods = ioport("MODIFIERS")->read() & 6; + u8 i, j, keyin, mods = m_modifiers->read() & 6; u8 translate_set = 0; if (BIT(mods, 1)) translate_set = 1; @@ -442,26 +551,41 @@ TIMER_DEVICE_CALLBACK_MEMBER(sbrain_state::kbd_scan) if (BIT(keyin, j)) { u8 pressed = translate_table[translate_set][i][j]; - m_keydown = (m_term_data == pressed) ? (m_keydown | 2) : 3; - m_term_data = pressed; + m_keydown = (m_key_data == pressed) ? (m_keydown | 2) : 3; + m_key_data = pressed; return; } } } } - m_term_data = 0xff; + m_key_data = 0xff; +} + +WRITE_LINE_MEMBER(sbrain_state::crtc_lrc_w) +{ + // TODO: actually triggered by BUSACK and taken after DMA burst finishes + if (state && !m_crtc->lbre_r() && !m_crtc->vblank_r()) + m_maincpu->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE); +} + +WRITE_LINE_MEMBER(sbrain_state::crtc_vblank_w) +{ + if (state) + m_maincpu->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE); +} + +WRITE_LINE_MEMBER(sbrain_state::crtc_vsync_w) +{ + // TODO: internal to the CRT8002 + if (!state) + m_framecnt++; } -void sbrain_state::init_sbrain() +void sbrain_state::machine_start() { - u8 *main = memregion("maincpu")->base(); - u8 *sub = memregion("subcpu")->base(); - - m_bankr0->configure_entry(0, &main[0x0000]); - m_bankr0->configure_entry(1, &sub[0x0000]); - m_bankw0->configure_entry(0, &main[0x0000]); - m_bank2->configure_entry(0, &sub[0x8000]); - m_bank2->configure_entry(1, &main[0x8000]); + std::fill_n(m_ram->pointer(), m_ram->size(), 0x00); + + m_usart[0]->write_cts(0); } static void sbrain_floppies(device_slot_interface &device) @@ -469,20 +593,31 @@ static void sbrain_floppies(device_slot_interface &device) device.option_add("525dd", FLOPPY_525_DD); } -MACHINE_RESET_MEMBER( sbrain_state, sbrain ) +void sbrain_state::machine_reset() { m_keydown = 0; - m_bankr0->set_entry(1); // point at rom - m_bankw0->set_entry(0); // always write to ram - m_bank2->set_entry(1); // point at maincpu bank - m_subcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // hold subcpu in reset + + for (auto &floppy : m_floppy) + { + floppy_image_device *device = floppy->get_device(); + if (device != nullptr) + device->mon_w(0); // motors run all the time + } + + // PPI resets to input mode, which causes PPIC-3 to be pulled up to +5V, resetting disk CPU } -u32 sbrain_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +u32 sbrain_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { + // PPIC-3 blanks entire display + if (BIT(m_portc, 3)) + { + bitmap.fill(rgb_t::black(), cliprect); + return 0; + } + u8 y,ra,chr,gfx; - uint16_t sy=0,ma=0,x; - m_framecnt++; + uint16_t sy=0,x; // Where attributes come from: // - Most systems use ram for character-based attributes, but this one uses strictly hardware which would seem cumbersome @@ -493,40 +628,45 @@ u32 sbrain_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, con // - d5 blank from PC1 (scan-line based) // - d6 flash from bit 7 of each character + uint16_t ma = m_crtc->top_of_page(); + uint16_t cr = m_crtc->cursor_address(); + uint8_t *videoram = &m_ram->pointer()[m_ram->size() - 0x800]; for (y = 0; y < 24; y++) { for (ra = 0; ra < 10; ra++) { - uint16_t *p = &bitmap.pix16(sy++); + uint32_t *p = &bitmap.pix32(sy++); for (x = 0; x < 80; x++) { gfx = 0; - if (ra < 9) + if (ra > 0) { - chr = m_p_videoram[x+ma]; + chr = videoram[(x + ma) & 0x7ff]; if (!BIT(chr, 7) || BIT(m_framecnt, 5)) { chr &= 0x7f; if (chr) - gfx = m_p_chargen[(chr<<4) | ra ]; + gfx = m_p_chargen[(chr<<4) | (ra - 1)]; // ra hacked for incorrect character generator } } + if (((x + ma) & 0xfff) == cr) + gfx ^= 0x7f; + /* Display a scanline of a character */ - *p++ = BIT(gfx, 7); - *p++ = BIT(gfx, 6); - *p++ = BIT(gfx, 5); - *p++ = BIT(gfx, 4); - *p++ = BIT(gfx, 3); - *p++ = BIT(gfx, 2); - *p++ = BIT(gfx, 1); - *p++ = BIT(gfx, 0); + *p++ = BIT(gfx, 6) ? rgb_t::white() : rgb_t::black(); + *p++ = BIT(gfx, 5) ? rgb_t::white() : rgb_t::black(); + *p++ = BIT(gfx, 4) ? rgb_t::white() : rgb_t::black(); + *p++ = BIT(gfx, 3) ? rgb_t::white() : rgb_t::black(); + *p++ = BIT(gfx, 2) ? rgb_t::white() : rgb_t::black(); + *p++ = BIT(gfx, 1) ? rgb_t::white() : rgb_t::black(); + *p++ = BIT(gfx, 0) ? rgb_t::white() : rgb_t::black(); } } - ma+=80; + ma = (ma + 80) & 0xfff; } return 0; } @@ -536,31 +676,26 @@ MACHINE_CONFIG_START(sbrain_state::sbrain) MCFG_DEVICE_ADD("maincpu", Z80, 16_MHz_XTAL / 4) MCFG_DEVICE_PROGRAM_MAP(sbrain_mem) MCFG_DEVICE_IO_MAP(sbrain_io) - MCFG_DEVICE_VBLANK_INT_DRIVER("screen", sbrain_state, irq0_line_hold) MCFG_DEVICE_ADD("subcpu", Z80, 16_MHz_XTAL / 4) MCFG_DEVICE_PROGRAM_MAP(sbrain_submem) MCFG_DEVICE_IO_MAP(sbrain_subio) - MCFG_MACHINE_RESET_OVERRIDE(sbrain_state, sbrain) + RAM(config, m_ram).set_default_size("64K").set_extra_options("32K"); /* video hardware */ MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::amber()) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ MCFG_SCREEN_UPDATE_DRIVER(sbrain_state, screen_update) - MCFG_SCREEN_SIZE(640, 240) - MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 239) - MCFG_SCREEN_PALETTE("palette") - MCFG_PALETTE_ADD_MONOCHROME("palette") - - //MCFG_DEVICE_ADD("crtc", DP8350, 10.92_MHz_XTAL) + DP8350(config, m_crtc, 10.92_MHz_XTAL).set_screen("screen"); // XTAL not directly connected + m_crtc->character_generator_program(1); + m_crtc->lrc_callback().set(FUNC(sbrain_state::crtc_lrc_w)); + m_crtc->vblank_callback().set(FUNC(sbrain_state::crtc_vblank_w)); + m_crtc->vsync_callback().set(FUNC(sbrain_state::crtc_vsync_w)); /* sound hardware */ SPEAKER(config, "mono").front_center(); - MCFG_DEVICE_ADD("beeper", BEEP, 800) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00) + BEEP(config, m_beep, 800).add_route(ALL_OUTPUTS, "mono", 1.00); /* Devices */ I8255(config, m_ppi); @@ -571,29 +706,46 @@ MACHINE_CONFIG_START(sbrain_state::sbrain) m_ppi->in_pc_callback().set(FUNC(sbrain_state::ppi_pc_r)); m_ppi->out_pc_callback().set(FUNC(sbrain_state::ppi_pc_w)); - I8251(config, m_u0, 0); + I8251(config, m_usart[0], 16_MHz_XTAL / 8); + m_usart[0]->txd_handler().set("auxport", FUNC(rs232_port_device::write_txd)); + + I8251(config, m_usart[1], 16_MHz_XTAL / 8); + m_usart[1]->txd_handler().set(m_mainport, FUNC(rs232_port_device::write_txd)); + m_usart[1]->rts_handler().set(m_mainport, FUNC(rs232_port_device::write_rts)); + m_usart[1]->dtr_handler().set(m_mainport, FUNC(rs232_port_device::write_dtr)); - I8251(config, m_u1, 0); + RS232_PORT(config, m_mainport, default_rs232_devices, nullptr); + m_mainport->rxd_handler().set(m_usart[1], FUNC(i8251_device::write_rxd)); + m_mainport->cts_handler().set(m_usart[1], FUNC(i8251_device::write_cts)); + m_mainport->dsr_handler().set(m_usart[1], FUNC(i8251_device::write_dsr)); + m_mainport->txc_handler().set(FUNC(sbrain_state::external_txc_w)); + m_mainport->rxc_handler().set(FUNC(sbrain_state::external_rxc_w)); + + rs232_port_device &auxport(RS232_PORT(config, "auxport", default_rs232_devices, nullptr)); + auxport.rxd_handler().set(m_usart[0], FUNC(i8251_device::write_rxd)); + auxport.dsr_handler().set(m_usart[0], FUNC(i8251_device::write_dsr)); com8116_device &brg(COM8116(config, "brg", 5.0688_MHz_XTAL)); // BR1941L - brg.fr_handler().set(m_u0, FUNC(i8251_device::write_txc)); - brg.fr_handler().append(m_u0, FUNC(i8251_device::write_rxc)); - brg.ft_handler().set(m_u1, FUNC(i8251_device::write_txc)); - brg.ft_handler().append(m_u1, FUNC(i8251_device::write_rxc)); + brg.fr_handler().set(m_usart[0], FUNC(i8251_device::write_txc)); + brg.fr_handler().append(m_usart[0], FUNC(i8251_device::write_rxc)); + brg.ft_handler().set(FUNC(sbrain_state::internal_txc_rxc_w)); FD1791(config, m_fdc, 16_MHz_XTAL / 16); + m_fdc->set_force_ready(true); MCFG_FLOPPY_DRIVE_ADD("fdc:0", sbrain_floppies, "525dd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_SOUND(true) MCFG_FLOPPY_DRIVE_ADD("fdc:1", sbrain_floppies, "525dd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_SOUND(true) + MCFG_FLOPPY_DRIVE_ADD("fdc:2", sbrain_floppies, nullptr, floppy_image_device::default_floppy_formats) + MCFG_FLOPPY_DRIVE_SOUND(true) + MCFG_FLOPPY_DRIVE_ADD("fdc:3", sbrain_floppies, nullptr, floppy_image_device::default_floppy_formats) + MCFG_FLOPPY_DRIVE_SOUND(true) MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_a", sbrain_state, kbd_scan, attotime::from_hz(15)) MACHINE_CONFIG_END ROM_START( sbrain ) - ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF ) - - ROM_REGION( 0x10000, "subcpu", ROMREGION_ERASEFF ) + ROM_REGION( 0x0800, "subcpu", ROMREGION_ERASEFF ) // only the second CPU has its own ROM ROM_SYSTEM_BIOS( 0, "4_003", "4.003" ) ROMX_LOAD("4_003_vc8001.z69", 0x0000, 0x0800, CRC(3ce3cd53) SHA1(fb6ade6bd67de3d9f911a1a48481ca619bda65ae), ROM_BIOS(0)) ROM_SYSTEM_BIOS( 1, "3_1", "3.1" ) @@ -605,4 +757,4 @@ ROM_START( sbrain ) ROM_LOAD("c10_char.bin", 0x0000, 0x2000, BAD_DUMP CRC(cb530b6f) SHA1(95590bbb433db9c4317f535723b29516b9b9fcbf)) ROM_END -COMP( 1981, sbrain, 0, 0, sbrain, sbrain, sbrain_state, init_sbrain, "Intertec", "Superbrain", MACHINE_NOT_WORKING ) +COMP( 1981, sbrain, 0, 0, sbrain, sbrain, sbrain_state, empty_init, "Intertec Data Systems", "SuperBrain Video Computer System", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/drivers/sderby.cpp b/src/mame/drivers/sderby.cpp index 05050f26ffb..1c28ae4a10f 100644 --- a/src/mame/drivers/sderby.cpp +++ b/src/mame/drivers/sderby.cpp @@ -1042,8 +1042,8 @@ ROM_END ******************************/ // YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME FLAGS LAYOUT -GAMEL( 1996, sderby, 0, sderby, sderby, sderby_state, empty_init, ROT0, "Playmark", "Super Derby (v.07.03)", 0, layout_sderby ) -GAMEL( 1996, sderbya, sderby, sderbya, sderbya, sderby_state, empty_init, ROT0, "Playmark", "Super Derby (v.10.04)", 0, layout_sderby ) +GAMEL( 1996, sderby, 0, sderby, sderby, sderby_state, empty_init, ROT0, "Playmark", "Super Derby (Playmark, v.07.03)", 0, layout_sderby ) +GAMEL( 1996, sderbya, sderby, sderbya, sderbya, sderby_state, empty_init, ROT0, "Playmark", "Super Derby (Playmark, v.10.04)", 0, layout_sderby ) GAMEL( 1996, spacewin, 0, spacewin, spacewin, sderby_state, empty_init, ROT0, "Playmark", "Scacco Matto / Space Win", 0, layout_spacewin ) GAME( 1996, shinygld, 0, shinygld, shinygld, sderby_state, empty_init, ROT0, "Playmark", "Shiny Golds", 0 ) GAMEL( 1997, croupier, 0, pmroulet, pmroulet, sderby_state, empty_init, ROT0, "Playmark", "Croupier (Playmark Roulette v.20.05)", MACHINE_UNEMULATED_PROTECTION | MACHINE_NOT_WORKING, layout_pmroulet ) diff --git a/src/mame/drivers/sdk51.cpp b/src/mame/drivers/sdk51.cpp new file mode 100644 index 00000000000..a00dbef6757 --- /dev/null +++ b/src/mame/drivers/sdk51.cpp @@ -0,0 +1,321 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/******************************************************************************* + + Skeleton driver for Intel MCS-51 System Design Kit (SDK-51). + +*******************************************************************************/ + +#include "emu.h" +#include "bus/rs232/rs232.h" +#include "cpu/mcs51/mcs51.h" +#include "cpu/mcs48/mcs48.h" +//#include "imagedev/cassette.h" +#include "machine/bankdev.h" +#include "machine/i8155.h" +#include "machine/i8243.h" +#include "machine/i8251.h" + +class sdk51_state : public driver_device +{ +public: + sdk51_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_progmem(*this, "progmem") + , m_datamem(*this, "datamem") + , m_mem0(*this, "mem0") + , m_upi(*this, "upi") + , m_usart(*this, "usart") + , m_cycles(*this, "cycles") + , m_kb(*this, "KB%u", 0U) + { + } + + void sdk51(machine_config &config); + +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + +private: + void psen_map(address_map &map); + void movx_map(address_map &map); + void progmem_map(address_map &map); + void datamem_map(address_map &map); + void mem0_map(address_map &map); + + DECLARE_READ8_MEMBER(psen_r); + DECLARE_READ8_MEMBER(datamem_r); + DECLARE_WRITE8_MEMBER(datamem_w); + + u8 brkmem_r(offs_t offset); + void brkmem_w(offs_t offset, u8 data); + + u8 upibus_r(); + void upibus_w(u8 data); + DECLARE_WRITE_LINE_MEMBER(display_clock_w); + DECLARE_WRITE_LINE_MEMBER(upiobf_w); + void serial_control_w(u8 data); + + required_device<mcs51_cpu_device> m_maincpu; + required_device<address_map_bank_device> m_progmem; + required_device<address_map_bank_device> m_datamem; + required_device<address_map_bank_device> m_mem0; + required_device<upi41_cpu_device> m_upi; + required_device<i8251_device> m_usart; + required_region_ptr<u8> m_cycles; + required_ioport_array<7> m_kb; + + bool m_upiobf; + u8 m_serial_control; + u32 m_kdtime; + bool m_display_clock; +}; + +READ8_MEMBER(sdk51_state::psen_r) +{ + return m_progmem->read8(space, offset); +} + +READ8_MEMBER(sdk51_state::datamem_r) +{ + return m_datamem->read8(space, offset); +} + +WRITE8_MEMBER(sdk51_state::datamem_w) +{ + m_datamem->write8(space, offset, data); +} + +u8 sdk51_state::brkmem_r(offs_t offset) +{ + return 1 | (m_upiobf ? 2 : 0); +} + +void sdk51_state::brkmem_w(offs_t offset, u8 data) +{ + m_mem0->set_bank(0); +} + +u8 sdk51_state::upibus_r() +{ + u8 result = 0xff; + + if (!BIT(m_serial_control, 0)) + result &= m_usart->read(BIT(m_serial_control, 2)); + + if (!BIT(m_upi->p2_r(), 6)) + for (int n = 0; n < 7; n++) + if (BIT(m_kdtime, n)) + result &= m_kb[n]->read(); + + return result; +} + +void sdk51_state::upibus_w(u8 data) +{ + if (!BIT(m_serial_control, 1)) + m_usart->write(BIT(m_serial_control, 2), data); +} + +void sdk51_state::serial_control_w(u8 data) +{ + m_serial_control = data; +} + +WRITE_LINE_MEMBER(sdk51_state::display_clock_w) +{ + if (!m_display_clock && state) + m_kdtime = ((m_kdtime << 1) & 0xfffffe) | BIT(m_upi->p1_r(), 6); + + m_display_clock = state; +} + +WRITE_LINE_MEMBER(sdk51_state::upiobf_w) +{ + if (m_upiobf != bool(state)) + { + m_upiobf = state; + m_maincpu->set_input_line(MCS51_INT0_LINE, state ? ASSERT_LINE : CLEAR_LINE); + } +} + +void sdk51_state::psen_map(address_map &map) +{ + map(0x0000, 0xffff).r(FUNC(sdk51_state::psen_r)); +} + +void sdk51_state::movx_map(address_map &map) +{ + map(0x0000, 0xffff).rw(FUNC(sdk51_state::datamem_r), FUNC(sdk51_state::datamem_w)); +} + +void sdk51_state::progmem_map(address_map &map) +{ + map(0x0000, 0x1fff).m(m_mem0, FUNC(address_map_bank_device::amap8)); + map(0x2000, 0x3fff).ram(); + map(0xe000, 0xffff).rom().region("monitor", 0); +} + +void sdk51_state::datamem_map(address_map &map) +{ + progmem_map(map); + map(0xa000, 0xa001).mirror(0xffe).rw(m_upi, FUNC(upi41_cpu_device::upi41_master_r), FUNC(upi41_cpu_device::upi41_master_w)); + map(0xb000, 0xb0ff).mirror(0x700).rw("io", FUNC(i8155_device::memory_r), FUNC(i8155_device::memory_w)); + map(0xb800, 0xb807).mirror(0x7f8).rw("io", FUNC(i8155_device::io_r), FUNC(i8155_device::io_w)); + map(0xc000, 0xdfff).rw(FUNC(sdk51_state::brkmem_r), FUNC(sdk51_state::brkmem_w)); +} + +void sdk51_state::mem0_map(address_map &map) +{ + map(0x0000, 0x1fff).ram(); + map(0x2000, 0x2fff).mirror(0x1000).rom().region("monitor", 0); +} + +static INPUT_PORTS_START(sdk51) + PORT_START("KB0") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Shift") PORT_CHAR(UCHAR_SHIFT_1) PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Control") PORT_CODE(KEYCODE_LCONTROL) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(0x09) PORT_CODE(KEYCODE_TAB) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(0x1b) PORT_CODE(KEYCODE_ESC) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Rubout") PORT_CHAR(0x7f) PORT_CODE(KEYCODE_BACKSPACE) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(' ') PORT_CODE(KEYCODE_SPACE) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('@') PORT_CODE(KEYCODE_OPENBRACE) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Return") PORT_CHAR(0x0d) PORT_CODE(KEYCODE_ENTER) + + PORT_START("KB1") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('0') PORT_CHAR('\\') PORT_CODE(KEYCODE_0) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('1') PORT_CHAR('!') PORT_CODE(KEYCODE_1) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('2') PORT_CHAR('"') PORT_CODE(KEYCODE_2) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('3') PORT_CHAR('#') PORT_CODE(KEYCODE_3) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('4') PORT_CHAR('$') PORT_CODE(KEYCODE_4) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('5') PORT_CHAR('%') PORT_CODE(KEYCODE_5) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('6') PORT_CHAR('&') PORT_CODE(KEYCODE_6) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('7') PORT_CHAR('\'') PORT_CODE(KEYCODE_7) + + PORT_START("KB2") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('8') PORT_CHAR('(') PORT_CODE(KEYCODE_8) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('9') PORT_CHAR(')') PORT_CODE(KEYCODE_9) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('-') PORT_CHAR('=') PORT_CODE(KEYCODE_MINUS) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(';') PORT_CHAR('+') PORT_CODE(KEYCODE_COLON) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(':') PORT_CHAR('*') PORT_CODE(KEYCODE_QUOTE) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('/') PORT_CHAR('?') PORT_CODE(KEYCODE_SLASH) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('.') PORT_CHAR(']') PORT_CODE(KEYCODE_STOP) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(',') PORT_CHAR('[') PORT_CODE(KEYCODE_COMMA) + + PORT_START("KB3") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('A') PORT_CODE(KEYCODE_A) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('B') PORT_CODE(KEYCODE_B) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('C') PORT_CODE(KEYCODE_C) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('D') PORT_CODE(KEYCODE_D) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('E') PORT_CODE(KEYCODE_E) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('F') PORT_CODE(KEYCODE_F) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('G') PORT_CODE(KEYCODE_G) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('H') PORT_CODE(KEYCODE_H) + + PORT_START("KB4") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('I') PORT_CODE(KEYCODE_I) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('J') PORT_CODE(KEYCODE_J) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('K') PORT_CODE(KEYCODE_K) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('L') PORT_CODE(KEYCODE_L) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('M') PORT_CODE(KEYCODE_M) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('N') PORT_CODE(KEYCODE_N) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('O') PORT_CODE(KEYCODE_O) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('P') PORT_CODE(KEYCODE_P) + + PORT_START("KB5") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('Q') PORT_CODE(KEYCODE_Q) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('R') PORT_CODE(KEYCODE_R) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('S') PORT_CODE(KEYCODE_S) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('T') PORT_CODE(KEYCODE_T) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('U') PORT_CODE(KEYCODE_U) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('V') PORT_CODE(KEYCODE_V) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('W') PORT_CODE(KEYCODE_W) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('X') PORT_CODE(KEYCODE_X) + + PORT_START("KB6") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('Y') PORT_CODE(KEYCODE_Y) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('Z') PORT_CODE(KEYCODE_Z) + PORT_BIT(0xfc, IP_ACTIVE_LOW, IPT_UNUSED) +INPUT_PORTS_END + +void sdk51_state::machine_start() +{ + m_upiobf = false; + m_serial_control = 0x0f; + m_display_clock = true; + + save_item(NAME(m_upiobf)); + save_item(NAME(m_serial_control)); + save_item(NAME(m_kdtime)); + save_item(NAME(m_display_clock)); +} + +void sdk51_state::machine_reset() +{ + m_mem0->set_bank(1); + m_kdtime = 0; +} + +void sdk51_state::sdk51(machine_config &config) +{ + I8031(config, m_maincpu, 12_MHz_XTAL); + m_maincpu->set_addrmap(AS_PROGRAM, &sdk51_state::psen_map); + m_maincpu->set_addrmap(AS_IO, &sdk51_state::movx_map); + + ADDRESS_MAP_BANK(config, m_progmem); + m_progmem->set_addrmap(0, &sdk51_state::progmem_map); + m_progmem->set_data_width(8); + m_progmem->set_addr_width(16); + + ADDRESS_MAP_BANK(config, m_datamem); + m_datamem->set_addrmap(0, &sdk51_state::datamem_map); + m_datamem->set_data_width(8); + m_datamem->set_addr_width(16); + + ADDRESS_MAP_BANK(config, m_mem0); + m_mem0->set_addrmap(0, &sdk51_state::mem0_map); + m_mem0->set_data_width(8); + m_mem0->set_addr_width(14); + m_mem0->set_stride(0x2000); + + I8041(config, m_upi, 6_MHz_XTAL); + m_upi->p1_in_cb().set(FUNC(sdk51_state::upibus_r)); + m_upi->p1_out_cb().set(FUNC(sdk51_state::upibus_w)); + m_upi->p2_in_cb().set("upiexp", FUNC(i8243_device::p2_r)); + m_upi->p2_out_cb().set(FUNC(sdk51_state::display_clock_w)).bit(7); + m_upi->p2_out_cb().append(FUNC(sdk51_state::upiobf_w)).bit(4); + m_upi->p2_out_cb().append("upiexp", FUNC(i8243_device::p2_w)).mask(0x0f); + m_upi->prog_out_cb().set("upiexp", FUNC(i8243_device::prog_w)); + m_upi->t1_in_cb().set(m_usart, FUNC(i8251_device::txrdy_r)); + + i8243_device &upiexp(I8243(config, "upiexp")); + upiexp.p4_out_cb().set(FUNC(sdk51_state::serial_control_w)); + + i8155_device &io(I8155(config, "io", 6_MHz_XTAL / 3)); + io.out_to_callback().set(m_usart, FUNC(i8251_device::write_txc)); + io.out_to_callback().append(m_usart, FUNC(i8251_device::write_txc)); + + I8251(config, m_usart, 6_MHz_XTAL / 3); + m_usart->txd_handler().set("rs232", FUNC(rs232_port_device::write_txd)); + m_usart->rts_handler().set("rs232", FUNC(rs232_port_device::write_rts)); + + rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, nullptr)); + rs232.rxd_handler().set(m_usart, FUNC(i8251_device::write_rxd)); + rs232.cts_handler().set(m_usart, FUNC(i8251_device::write_cts)); +} + +ROM_START(sdk51) + ROM_REGION(0x2000, "monitor", 0) // "SDK-51 MONITOR VER. 1.03" + ROM_LOAD("u59-e000.bin", 0x0000, 0x1000, CRC(cc6c7b05) SHA1(ead75920347ff19487e730e90e1e1f7207d44601)) + ROM_LOAD("u60-f000.bin", 0x1000, 0x1000, CRC(da6e664d) SHA1(18416106307f37dba6dbb789f3d39fe6d5294755)) + + ROM_REGION(0x0400, "upi", 0) + ROM_LOAD("u41-8041a.bin", 0x000, 0x400, CRC(02f38b69) SHA1(ab2ac73b69b3297572583242ed5bd717eb116c37)) + + ROM_REGION(0x0200, "cycles", 0) + ROM_LOAD("u63-3622a.bin", 0x000, 0x200, CRC(85cbd498) SHA1(f0214b6d02d6d153b5fafd9adf5a23013373c9c4)) // pin 9 output stuck high but not used +ROM_END + +COMP(1981, sdk51, 0, 0, sdk51, sdk51, sdk51_state, empty_init, "Intel", "MCS-51 System Design Kit", MACHINE_IS_SKELETON) diff --git a/src/mame/drivers/segae.cpp b/src/mame/drivers/segae.cpp index b57139891e2..0bdaa32e98c 100644 --- a/src/mame/drivers/segae.cpp +++ b/src/mame/drivers/segae.cpp @@ -928,11 +928,12 @@ void systeme_state::hangonjr(machine_config &config) m_ppi->out_pc_callback().set(FUNC(systeme_state::hangonjr_port_fa_write)); // CD4051 selector input } -MACHINE_CONFIG_START(systeme_state::ridleofp) +void systeme_state::ridleofp(machine_config &config) +{ systeme(config); - MCFG_DEVICE_ADD("upd4701", UPD4701A, 0) // on 834-6193 I/O sub board - MCFG_UPD4701_PORTX("PAD1") - MCFG_UPD4701_PORTY("PAD2") + upd4701_device &upd4701(UPD4701A(config, "upd4701")); // on 834-6193 I/O sub board + upd4701.set_portx_tag("PAD1"); + upd4701.set_porty_tag("PAD2"); i8255_device &ppi(*subdevice<i8255_device>("ppi")); ppi.in_pa_callback().set("upd4701", FUNC(upd4701_device::d_r)); @@ -941,7 +942,7 @@ MACHINE_CONFIG_START(systeme_state::ridleofp) ppi.out_pc_callback().append("upd4701", FUNC(upd4701_device::ul_w)).bit(2); ppi.out_pc_callback().append("upd4701", FUNC(upd4701_device::resetx_w)).bit(1); // or possibly bit 0 ppi.out_pc_callback().append("upd4701", FUNC(upd4701_device::resety_w)).bit(0); // or possibly bit 1 -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(systeme_state::systemex) systeme(config); diff --git a/src/mame/drivers/segas16a.cpp b/src/mame/drivers/segas16a.cpp index 74f1112d83c..df5b3c157d2 100644 --- a/src/mame/drivers/segas16a.cpp +++ b/src/mame/drivers/segas16a.cpp @@ -371,14 +371,15 @@ WRITE8_MEMBER( segas16a_state::n7751_control_w ) // n7751_rom_offset_w - post expander callback //------------------------------------------------- -WRITE8_MEMBER( segas16a_state::n7751_rom_offset_w ) +template<int Shift> +void segas16a_state::n7751_rom_offset_w(uint8_t data) { // P4 - address lines 0-3 // P5 - address lines 4-7 // P6 - address lines 8-11 // P7 - address lines 12-13 - int mask = (0xf << (4 * offset)) & 0x3fff; - int newdata = (data << (4 * offset)) & mask; + int mask = (0xf << Shift) & 0x3fff; + int newdata = (data << Shift) & mask; m_n7751_rom_address = (m_n7751_rom_address & ~mask) | newdata; } @@ -405,7 +406,7 @@ READ8_MEMBER( segas16a_state::n7751_p2_r ) { // read from P2 - 8255's PC0-2 connects to 7751's S0-2 (P24-P26 on an 8048) // bit 0x80 is an alternate way to control the sample on/off; doesn't appear to be used - return 0x80 | ((m_n7751_command & 0x07) << 4) | (m_n7751_i8243->p2_r(space, offset) & 0x0f); + return 0x80 | ((m_n7751_command & 0x07) << 4) | (m_n7751_i8243->p2_r() & 0x0f); } @@ -416,7 +417,7 @@ READ8_MEMBER( segas16a_state::n7751_p2_r ) WRITE8_MEMBER( segas16a_state::n7751_p2_w ) { // write to P2; low 4 bits go to 8243 - m_n7751_i8243->p2_w(space, offset, data & 0x0f); + m_n7751_i8243->p2_w(data & 0x0f); // output of bit $80 indicates we are ready (1) or busy (0) // no other outputs are used @@ -1982,8 +1983,10 @@ MACHINE_CONFIG_START(segas16a_state::system16a) MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE("n7751_8243", i8243_device, prog_w)) I8243(config, m_n7751_i8243); - m_n7751_i8243->read_handler().set_constant(0); - m_n7751_i8243->write_handler().set(FUNC(segas16a_state::n7751_rom_offset_w)); + m_n7751_i8243->p4_out_cb().set(FUNC(segas16a_state::n7751_rom_offset_w<0>)); + m_n7751_i8243->p5_out_cb().set(FUNC(segas16a_state::n7751_rom_offset_w<4>)); + m_n7751_i8243->p6_out_cb().set(FUNC(segas16a_state::n7751_rom_offset_w<8>)); + m_n7751_i8243->p7_out_cb().set(FUNC(segas16a_state::n7751_rom_offset_w<12>)); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); diff --git a/src/mame/drivers/segas16b.cpp b/src/mame/drivers/segas16b.cpp index 185727ea2e3..8f7a07316ce 100644 --- a/src/mame/drivers/segas16b.cpp +++ b/src/mame/drivers/segas16b.cpp @@ -3787,16 +3787,17 @@ MACHINE_CONFIG_START(segas16b_state::system16b_fd1094) MCFG_DEVICE_VBLANK_INT_DRIVER("screen", segas16b_state, irq4_line_hold) MACHINE_CONFIG_END -MACHINE_CONFIG_START(segas16b_state::aceattacb_fd1094) +void segas16b_state::aceattacb_fd1094(machine_config &config) +{ system16b_fd1094(config); // 834-6602 I/O board - MCFG_DEVICE_ADD("upd4701a1", UPD4701A, 0) - MCFG_DEVICE_ADD("upd4701a2", UPD4701A, 0) + UPD4701A(config, m_upd4701a[0]); + UPD4701A(config, m_upd4701a[1]); CXD1095(config, m_cxdio, 0); m_cxdio->in_porta_cb().set_ioport("HANDX1"); m_cxdio->in_portb_cb().set_ioport("HANDX2"); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(segas16b_state::system16b_i8751) diff --git a/src/mame/drivers/segas18.cpp b/src/mame/drivers/segas18.cpp index a18216ca514..80fd2c5c55d 100644 --- a/src/mame/drivers/segas18.cpp +++ b/src/mame/drivers/segas18.cpp @@ -1405,35 +1405,37 @@ void segas18_state::lghost(machine_config &config) m_io->out_pc_callback().set(FUNC(segas18_state::lghost_gun_recoil_w)); } -MACHINE_CONFIG_START(segas18_state::wwally_fd1094) +void segas18_state::wwally_fd1094(machine_config &config) +{ system18_fd1094(config); - MCFG_DEVICE_ADD("upd1", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX1") - MCFG_UPD4701_PORTY("TRACKY1") + UPD4701A(config, m_upd4701[0]); + m_upd4701[0]->set_portx_tag("TRACKX1"); + m_upd4701[0]->set_porty_tag("TRACKY1"); - MCFG_DEVICE_ADD("upd2", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX2") - MCFG_UPD4701_PORTY("TRACKY2") + UPD4701A(config, m_upd4701[1]); + m_upd4701[1]->set_portx_tag("TRACKX2"); + m_upd4701[1]->set_porty_tag("TRACKY2"); - MCFG_DEVICE_ADD("upd3", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX3") - MCFG_UPD4701_PORTY("TRACKY3") -MACHINE_CONFIG_END + UPD4701A(config, m_upd4701[2]); + m_upd4701[2]->set_portx_tag("TRACKX3"); + m_upd4701[2]->set_porty_tag("TRACKY3"); +} -MACHINE_CONFIG_START(segas18_state::wwally) +void segas18_state::wwally(machine_config &config) +{ system18(config); - MCFG_DEVICE_ADD("upd1", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX1") - MCFG_UPD4701_PORTY("TRACKY1") + UPD4701A(config, m_upd4701[0]); + m_upd4701[0]->set_portx_tag("TRACKX1"); + m_upd4701[0]->set_porty_tag("TRACKY1"); - MCFG_DEVICE_ADD("upd2", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX2") - MCFG_UPD4701_PORTY("TRACKY2") + UPD4701A(config, m_upd4701[1]); + m_upd4701[1]->set_portx_tag("TRACKX2"); + m_upd4701[1]->set_porty_tag("TRACKY2"); - MCFG_DEVICE_ADD("upd3", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX3") - MCFG_UPD4701_PORTY("TRACKY3") -MACHINE_CONFIG_END + UPD4701A(config, m_upd4701[2]); + m_upd4701[2]->set_portx_tag("TRACKX3"); + m_upd4701[2]->set_porty_tag("TRACKY3"); +} MACHINE_CONFIG_START(segas18_state::system18_i8751) system18(config); diff --git a/src/mame/drivers/segas24.cpp b/src/mame/drivers/segas24.cpp index d952187fa00..b26e0b60cf6 100644 --- a/src/mame/drivers/segas24.cpp +++ b/src/mame/drivers/segas24.cpp @@ -1938,13 +1938,13 @@ MACHINE_CONFIG_START(segas24_state::system24_floppy_hotrod) MCFG_DEVICE_MODIFY("subcpu") MCFG_DEVICE_PROGRAM_MAP(hotrod_cpu2_map) - MCFG_DEVICE_ADD("upd1", UPD4701A, 0) // IC4 on 834-6510 I/O board - MCFG_UPD4701_PORTX("DIAL1") - MCFG_UPD4701_PORTY("DIAL2") + upd4701_device &upd1(UPD4701A(config, "upd1")); // IC4 on 834-6510 I/O board + upd1.set_portx_tag("DIAL1"); + upd1.set_porty_tag("DIAL2"); - MCFG_DEVICE_ADD("upd2", UPD4701A, 0) // IC1 - MCFG_UPD4701_PORTX("DIAL3") - MCFG_UPD4701_PORTY("DIAL4") + upd4701_device &upd2(UPD4701A(config, "upd2")); // IC1 + upd2.set_portx_tag("DIAL3"); + upd2.set_porty_tag("DIAL4"); MCFG_DEVICE_ADD("adc1", MSM6253, 0) // IC5 - 33k/33p R/C clock MCFG_MSM6253_IN0_ANALOG_PORT("PEDAL1") @@ -1969,9 +1969,9 @@ MACHINE_CONFIG_START(segas24_state::system24_floppy_fd_upd) MCFG_DEVICE_MODIFY("subcpu") MCFG_DEVICE_PROGRAM_MAP(roughrac_cpu2_map) - MCFG_DEVICE_ADD("upd4701", UPD4701A, 0) // IC4 on 834-6510-01 I/O board - MCFG_UPD4701_PORTX("DIAL1") - MCFG_UPD4701_PORTY("DIAL2") + upd4701_device &upd4701(UPD4701A(config, "upd4701")); // IC4 on 834-6510 I/O board + upd4701.set_portx_tag("DIAL1"); + upd4701.set_porty_tag("DIAL2"); MACHINE_CONFIG_END void segas24_state::dcclub(machine_config &config) diff --git a/src/mame/drivers/segas32.cpp b/src/mame/drivers/segas32.cpp index d0a659bb374..3631259645f 100644 --- a/src/mame/drivers/segas32.cpp +++ b/src/mame/drivers/segas32.cpp @@ -2326,17 +2326,17 @@ MACHINE_CONFIG_START(segas32_trackball_state::device_add_mconfig) MCFG_DEVICE_MODIFY("maincpu") MCFG_DEVICE_PROGRAM_MAP(system32_trackball_map) - MCFG_DEVICE_ADD("upd1", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX1") - MCFG_UPD4701_PORTY("TRACKY1") + upd4701_device &upd1(UPD4701A(config, "upd1")); + upd1.set_portx_tag("TRACKX1"); + upd1.set_porty_tag("TRACKY1"); - MCFG_DEVICE_ADD("upd2", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX2") - MCFG_UPD4701_PORTY("TRACKY2") + upd4701_device &upd2(UPD4701A(config, "upd2")); + upd2.set_portx_tag("TRACKX2"); + upd2.set_porty_tag("TRACKY2"); - MCFG_DEVICE_ADD("upd3", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX3") - MCFG_UPD4701_PORTY("TRACKY3") + upd4701_device &upd3(UPD4701A(config, "upd3")); + upd3.set_portx_tag("TRACKX3"); + upd3.set_porty_tag("TRACKY3"); // 837-8685 I/O board has an unpopulated space for a fourth UPD4701A MACHINE_CONFIG_END diff --git a/src/mame/drivers/seta.cpp b/src/mame/drivers/seta.cpp index 3fabb929eac..ee2e4bc44e0 100644 --- a/src/mame/drivers/seta.cpp +++ b/src/mame/drivers/seta.cpp @@ -8029,9 +8029,9 @@ MACHINE_CONFIG_START(seta_state::usclssic) MCFG_DEVICE_PROGRAM_MAP(calibr50_sub_map) MCFG_DEVICE_VBLANK_INT_DRIVER("screen", seta_state, irq0_line_assert) - MCFG_DEVICE_ADD("upd4701", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX") - MCFG_UPD4701_PORTY("TRACKY") + UPD4701A(config, m_upd4701); + m_upd4701->set_portx_tag("TRACKX"); + m_upd4701->set_porty_tag("TRACKY"); HC157(config, m_buttonmux, 0); m_buttonmux->out_callback().set(m_upd4701, FUNC(upd4701_device::middle_w)).bit(0); @@ -8098,9 +8098,9 @@ MACHINE_CONFIG_START(seta_state::calibr50) MCFG_DEVICE_PROGRAM_MAP(calibr50_sub_map) MCFG_DEVICE_PERIODIC_INT_DRIVER(seta_state, irq0_line_assert, 4*60) // IRQ: 4/frame - MCFG_DEVICE_ADD("upd4701", UPD4701A, 0) - MCFG_UPD4701_PORTX("ROT1") - MCFG_UPD4701_PORTY("ROT2") + UPD4701A(config, m_upd4701); + m_upd4701->set_portx_tag("ROT1"); + m_upd4701->set_porty_tag("ROT2"); MCFG_MACHINE_RESET_OVERRIDE(seta_state,calibr50) @@ -8569,7 +8569,7 @@ MACHINE_CONFIG_START(setaroul_state::setaroul) NVRAM(config, "nvram", nvram_device::DEFAULT_RANDOM); /* devices */ - MCFG_DEVICE_ADD("rtc", UPD4992, XTAL(32'768)) // ! Actually D4911C ! + UPD4992(config, m_rtc); // ! Actually D4911C ! MCFG_DEVICE_ADD ("acia0", ACIA6850, 0) MCFG_TICKET_DISPENSER_ADD("hopper", attotime::from_msec(150), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW ) @@ -8998,13 +8998,13 @@ MACHINE_CONFIG_START(seta_state::krzybowl) MCFG_DEVICE_PROGRAM_MAP(krzybowl_map) MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", seta_state, seta_interrupt_1_and_2, "screen", 0, 1) - MCFG_DEVICE_ADD("upd1", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACK1_X") - MCFG_UPD4701_PORTY("TRACK1_Y") + upd4701_device &upd1(UPD4701A(config, "upd1")); + upd1.set_portx_tag("TRACK1_X"); + upd1.set_porty_tag("TRACK1_Y"); - MCFG_DEVICE_ADD("upd2", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACK2_X") - MCFG_UPD4701_PORTY("TRACK2_Y") + upd4701_device &upd2(UPD4701A(config, "upd2")); + upd2.set_portx_tag("TRACK2_X"); + upd2.set_porty_tag("TRACK2_Y"); MCFG_DEVICE_ADD("spritegen", SETA001_SPRITE, 0) MCFG_SETA001_SPRITE_GFXDECODE("gfxdecode") @@ -9830,7 +9830,7 @@ MACHINE_CONFIG_START(jockeyc_state::jockeyc) MCFG_MACHINE_START_OVERRIDE(jockeyc_state, jockeyc) /* devices */ - MCFG_DEVICE_ADD("rtc", UPD4992, XTAL(32'768)) // ! Actually D4911C ! + UPD4992(config, m_rtc); // ! Actually D4911C ! MCFG_DEVICE_ADD ("acia0", ACIA6850, 0) MCFG_TICKET_DISPENSER_ADD("hopper1", attotime::from_msec(150), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW ) MCFG_TICKET_DISPENSER_ADD("hopper2", attotime::from_msec(150), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW ) diff --git a/src/mame/drivers/seta2.cpp b/src/mame/drivers/seta2.cpp index d63b6bef5da..8dbf83e9536 100644 --- a/src/mame/drivers/seta2.cpp +++ b/src/mame/drivers/seta2.cpp @@ -2734,7 +2734,7 @@ MACHINE_CONFIG_START(staraudi_state::staraudi) MCFG_DEVICE_PROGRAM_MAP(staraudi_map) SHARP_LH28F016S_16BIT(config, "flash"); - MCFG_UPD4992_ADD("rtc") + UPD4992(config, m_rtc); // video hardware MCFG_SCREEN_MODIFY("screen") diff --git a/src/mame/drivers/sg1000.cpp b/src/mame/drivers/sg1000.cpp index d7a5a34579e..f9cd0d60758 100644 --- a/src/mame/drivers/sg1000.cpp +++ b/src/mame/drivers/sg1000.cpp @@ -649,7 +649,7 @@ MACHINE_CONFIG_START(sf7000_state::sf7000) MCFG_RS232_RXD_HANDLER(WRITELINE(UPD8251_TAG, i8251_device, write_rxd)) MCFG_RS232_DSR_HANDLER(WRITELINE(UPD8251_TAG, i8251_device, write_dsr)) - MCFG_UPD765A_ADD(UPD765_TAG, false, false) + UPD765A(config, m_fdc, false, false); MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", sf7000_floppies, "3ssdd", sf7000_state::floppy_formats) MCFG_DEVICE_ADD(m_centronics, CENTRONICS, centronics_devices, "printer") diff --git a/src/mame/drivers/sg1000a.cpp b/src/mame/drivers/sg1000a.cpp index 58bac477532..b85ddcef14f 100644 --- a/src/mame/drivers/sg1000a.cpp +++ b/src/mame/drivers/sg1000a.cpp @@ -286,11 +286,11 @@ public: m_maincpu(*this, "maincpu"), m_decrypted_opcodes(*this, "decrypted_opcodes") { } - void sderby2s(machine_config &config); + void sderbys(machine_config &config); void sg1000ax(machine_config &config); void sg1000a(machine_config &config); - void init_sg1000a(); + void init_sderby(); private: DECLARE_WRITE8_MEMBER(sg1000a_coin_counter_w); @@ -299,7 +299,7 @@ private: void decrypted_opcodes_map(address_map &map); void io_map(address_map &map); void program_map(address_map &map); - void sderby2_io_map(address_map &map); + void sderby_io_map(address_map &map); }; @@ -330,14 +330,14 @@ void sg1000a_state::io_map(address_map &map) map(0xdc, 0xdf).rw("ppi8255", FUNC(i8255_device::read), FUNC(i8255_device::write)); } -void sg1000a_state::sderby2_io_map(address_map &map) +void sg1000a_state::sderby_io_map(address_map &map) { map.global_mask(0xff); - map(0x7f, 0x7f).w("snsnd", FUNC(sn76489a_device::command_w)); - map(0xbe, 0xbe).rw("tms9928a", FUNC(tms9928a_device::vram_r), FUNC(tms9928a_device::vram_w)); - map(0xbf, 0xbf).rw("tms9928a", FUNC(tms9928a_device::register_r), FUNC(tms9928a_device::register_w)); - // AM_RANGE(0xc0, 0xc1) NEC D8251AC UART - map(0xc8, 0xcb).rw("ppi8255", FUNC(i8255_device::read), FUNC(i8255_device::write)); // NEC D8255AC-2 + map(0x40, 0x40).mirror(0x3f).w("snsnd", FUNC(sn76489a_device::command_w)); + map(0x80, 0x80).mirror(0x3e).rw("tms9928a", FUNC(tms9928a_device::vram_r), FUNC(tms9928a_device::vram_w)); + map(0x81, 0x81).mirror(0x3e).rw("tms9928a", FUNC(tms9928a_device::register_r), FUNC(tms9928a_device::register_w)); +// map(0xc0, 0xc1).mirror(0x06) NEC D8251AC UART + map(0xc8, 0xcb).mirror(0x04).rw("ppi8255", FUNC(i8255_device::read), FUNC(i8255_device::write)); // NEC D8255AC-2 } /************************************* @@ -426,7 +426,7 @@ static INPUT_PORTS_START( dokidoki ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) INPUT_PORTS_END -static INPUT_PORTS_START( sderby2s ) +static INPUT_PORTS_START( sderbys ) PORT_INCLUDE( sg1000 ) PORT_MODIFY("DSW") @@ -503,11 +503,11 @@ MACHINE_CONFIG_START(sg1000a_state::sg1000ax) MCFG_SEGACRPT_SET_DECRYPTED_TAG(":decrypted_opcodes") MACHINE_CONFIG_END -MACHINE_CONFIG_START(sg1000a_state::sderby2s) +MACHINE_CONFIG_START(sg1000a_state::sderbys) sg1000a(config); MCFG_DEVICE_MODIFY("maincpu") MCFG_DEVICE_CLOCK(XTAL(10'738'635) / 3) - MCFG_DEVICE_IO_MAP(sderby2_io_map) + MCFG_DEVICE_IO_MAP(sderby_io_map) // Actually uses a Sega 315-5066 chip, which is a TMS9918 and SN76489 in the same package but with RGB output MACHINE_CONFIG_END @@ -520,9 +520,9 @@ MACHINE_CONFIG_END ROM_START( chwrestl ) ROM_REGION( 2*0x10000, "maincpu", 0 ) - ROM_LOAD( "5732", 0x0000, 0x4000, CRC(a4e44370) SHA1(a9dbf60e77327dd2bec6816f3142b42ad9ca4d09) ) /* encrypted */ - ROM_LOAD( "5733", 0x4000, 0x4000, CRC(4f493538) SHA1(467862fe9337497e3cdebb29bf28f6cfe3066ccd) ) /* encrypted */ - ROM_LOAD( "5734", 0x8000, 0x4000, CRC(d99b6301) SHA1(5e762ed45cde08d5223828c6b1d3569b2240462c) ) + ROM_LOAD( "5732", 0x0000, 0x4000, CRC(a4e44370) SHA1(a9dbf60e77327dd2bec6816f3142b42ad9ca4d09) ) /* encrypted */ + ROM_LOAD( "5733", 0x4000, 0x4000, CRC(4f493538) SHA1(467862fe9337497e3cdebb29bf28f6cfe3066ccd) ) /* encrypted */ + ROM_LOAD( "5734", 0x8000, 0x4000, CRC(d99b6301) SHA1(5e762ed45cde08d5223828c6b1d3569b2240462c) ) ROM_END ROM_START( chboxing ) @@ -534,25 +534,39 @@ ROM_END ROM_START( dokidoki ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "epr-7356.ic1", 0x0000, 0x4000, CRC(95658c31) SHA1(f7b5638ab1b8b244b189317d954eb37b51923791) ) - ROM_LOAD( "epr-7357.ic2", 0x4000, 0x4000, CRC(e8dbad85) SHA1(9f13dafacee370d6e4720d8e27cf889053e79eb3) ) - ROM_LOAD( "epr-7358.ic3", 0x8000, 0x4000, CRC(c6f26b0b) SHA1(3753e05b6e77159832dbe88562ba7a818120d1a3) ) + ROM_LOAD( "epr-7356.ic1", 0x0000, 0x4000, CRC(95658c31) SHA1(f7b5638ab1b8b244b189317d954eb37b51923791) ) + ROM_LOAD( "epr-7357.ic2", 0x4000, 0x4000, CRC(e8dbad85) SHA1(9f13dafacee370d6e4720d8e27cf889053e79eb3) ) + ROM_LOAD( "epr-7358.ic3", 0x8000, 0x4000, CRC(c6f26b0b) SHA1(3753e05b6e77159832dbe88562ba7a818120d1a3) ) +ROM_END + +ROM_START( sderbys ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "v1.2.ic10", 0x0000, 0x4000, CRC(cf29b579) SHA1(e695da9c61167d1d30b32bd70d342ac23b29f087) ) ROM_END ROM_START( sderby2s ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "epr-6450d.ic10", 0x0000, 0x4000, CRC(e56986d3) SHA1(a2dbdc95128cc94a1492e080aeea402f2d4b89fe) ) - ROM_LOAD( "epr-6504d.ic11", 0x4000, 0x4000, CRC(7bb364b9) SHA1(9f93572b6d999422d93ad5f7a251b4695565651f) ) + ROM_LOAD( "epr-6450d.ic10", 0x0000, 0x4000, CRC(e56986d3) SHA1(a2dbdc95128cc94a1492e080aeea402f2d4b89fe) ) + ROM_LOAD( "epr-6504d.ic11", 0x4000, 0x4000, CRC(7bb364b9) SHA1(9f93572b6d999422d93ad5f7a251b4695565651f) ) ROM_END + /************************************* * * Driver initialization * *************************************/ -void sg1000a_state::init_sg1000a() +void sg1000a_state::init_sderby() { + // mini daughterboard in ic10 socket, with TI 27C128 rom and unknown ic(label scraped off) + u8 *rom = machine().root_device().memregion("maincpu")->base(); + const u32 len = memregion("maincpu")->bytes(); + + for (int i = 0; i < len; i++) + rom[i] = bitswap<8>(rom[i],3,7,4,6,5,2,1,0); + + // TODO: decryption is unfinished } @@ -563,7 +577,11 @@ void sg1000a_state::init_sg1000a() * *************************************/ -GAME( 1984, chboxing, 0, sg1000a, chboxing, sg1000a_state, init_sg1000a, ROT0, "Sega", "Champion Boxing", 0 ) -GAME( 1985, chwrestl, 0, sg1000ax, chwrestl, sg1000a_state, init_sg1000a, ROT0, "Sega", "Champion Pro Wrestling", 0 ) -GAME( 1985, dokidoki, 0, sg1000a, dokidoki, sg1000a_state, init_sg1000a, ROT0, "Sega", "Doki Doki Penguin Land", 0 ) -GAME( 1985, sderby2s, 0, sderby2s, sderby2s, sg1000a_state, init_sg1000a, ROT0, "Sega", "Super Derby II (Satellite board)", MACHINE_NOT_WORKING ) // inputs aren't hooked up, probably needs to be connected to the main board anyway +GAME( 1984, chboxing, 0, sg1000a, chboxing, sg1000a_state, empty_init, ROT0, "Sega", "Champion Boxing", 0 ) +GAME( 1985, chwrestl, 0, sg1000ax, chwrestl, sg1000a_state, empty_init, ROT0, "Sega", "Champion Pro Wrestling", 0 ) +GAME( 1985, dokidoki, 0, sg1000a, dokidoki, sg1000a_state, empty_init, ROT0, "Sega", "Doki Doki Penguin Land", 0 ) + +// inputs aren't hooked up, probably needs to be connected to the main board anyway +// TODO: move these guys over to sderby2.cpp +GAME( 1984, sderbys, 0, sderbys, sderbys, sg1000a_state, init_sderby, ROT0, "Sega", "Super Derby (satellite board)", MACHINE_NOT_WORKING ) +GAME( 1985, sderby2s, 0, sderbys, sderbys, sg1000a_state, empty_init, ROT0, "Sega", "Super Derby II (satellite board)", MACHINE_NOT_WORKING ) diff --git a/src/mame/drivers/specpls3.cpp b/src/mame/drivers/specpls3.cpp index 5acc987f1ca..15089e10516 100644 --- a/src/mame/drivers/specpls3.cpp +++ b/src/mame/drivers/specpls3.cpp @@ -389,7 +389,7 @@ MACHINE_CONFIG_START(spectrum_state::spectrum_plus3) MCFG_MACHINE_RESET_OVERRIDE(spectrum_state, spectrum_plus3 ) - MCFG_UPD765A_ADD("upd765", true, true) + UPD765A(config, m_upd765, true, true); MCFG_FLOPPY_DRIVE_ADD("upd765:0", specpls3_floppies, "3ssdd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765:1", specpls3_floppies, "3ssdd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/ssv.cpp b/src/mame/drivers/ssv.cpp index 4e9d328931b..7300cc1863c 100644 --- a/src/mame/drivers/ssv.cpp +++ b/src/mame/drivers/ssv.cpp @@ -2827,9 +2827,9 @@ MACHINE_CONFIG_START(ssv_state::eaglshot) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); - MCFG_DEVICE_ADD("upd4701", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX") - MCFG_UPD4701_PORTY("TRACKY") + UPD4701A(config, m_upd4701); + m_upd4701->set_portx_tag("TRACKX"); + m_upd4701->set_porty_tag("TRACKY"); WATCHDOG_TIMER(config, "watchdog"); diff --git a/src/mame/drivers/sun3x.cpp b/src/mame/drivers/sun3x.cpp index f07021c3dc2..43010631bd1 100644 --- a/src/mame/drivers/sun3x.cpp +++ b/src/mame/drivers/sun3x.cpp @@ -625,7 +625,7 @@ MACHINE_CONFIG_START(sun3x_state::sun3_80) MCFG_DEVICE_ADD(ESP_TAG, NCR539X, 20000000/2) MCFG_LEGACY_SCSI_PORT("scsi") - MCFG_N82077AA_ADD("fdc", n82077aa_device::MODE_PS2) + N82077AA(config, m_fdc, n82077aa_device::MODE_PS2); MCFG_FLOPPY_DRIVE_ADD("fdc:0", sun_floppies, "35hd", sun3x_state::floppy_formats) // the timekeeper has no interrupt output, so 3/80 includes a dedicated timer circuit diff --git a/src/mame/drivers/sun4.cpp b/src/mame/drivers/sun4.cpp index 9b02534a7aa..b3866f9442c 100644 --- a/src/mame/drivers/sun4.cpp +++ b/src/mame/drivers/sun4.cpp @@ -541,6 +541,7 @@ public: , m_scsibus(*this, "scsibus") , m_scsi(*this, "scsibus:7:ncr53c90a") , m_sbus(*this, "sbus") + , m_sbus_slot(*this, "slot%u", 1U) , m_type0space(*this, "type0") , m_type1space(*this, "type1") , m_ram(*this, RAM_TAG) @@ -550,14 +551,16 @@ public: } void sun4c(machine_config &config); + void sun4_20(machine_config &config); void sun4_40(machine_config &config); + void sun4_50(machine_config &config); void sun4_60(machine_config &config); + void sun4_65(machine_config &config); void sun4_75(machine_config &config); void sun4(machine_config &config); void init_sun4(); void init_sun4c(); - void init_ss2(); private: virtual void machine_reset() override; @@ -673,13 +676,14 @@ private: required_device<z80scc_device> m_scc1; required_device<z80scc_device> m_scc2; - required_device<i82072_device> m_fdc; + required_device<upd765_family_device> m_fdc; required_device<floppy_connector> m_floppy; required_device<am79c90_device> m_lance; required_device<nscsi_bus_device> m_scsibus; required_device<ncr53c90a_device> m_scsi; optional_device<sbus_device> m_sbus; + optional_device_array<sbus_slot_device, 3> m_sbus_slot; optional_device<address_map_bank_device> m_type0space; optional_device<address_map_bank_device> m_type1space; memory_access_cache<2, 0, ENDIANNESS_BIG> *m_type1_cache; @@ -751,7 +755,10 @@ private: uint8_t m_diag; int m_arch; - emu_timer *m_c0_timer, *m_c1_timer; + attotime m_c0_last_read_time; + attotime m_c1_last_read_time; + emu_timer *m_c0_timer; + emu_timer *m_c1_timer; emu_timer *m_reset_timer; void dma_check_interrupts(); @@ -759,8 +766,6 @@ private: void dma_transfer_write(); void dma_transfer_read(); - void start_timer(int num); - void l2p_command(int ref, const std::vector<std::string> ¶ms); void fcodes_command(int ref, const std::vector<std::string> ¶ms); }; @@ -785,7 +790,7 @@ READ32_MEMBER( sun4_state::sun4_system_r ) return m_cachetags[offset&0xfff]; case 9: // (d-)cache data - logerror("sun4: read dcache data @ %x, PC = %x\n", offset, m_maincpu->pc()); + //logerror("sun4: read dcache data @ %x, PC = %x\n", offset, m_maincpu->pc()); return 0xffffffff; case 0xf: // UART bypass @@ -799,7 +804,7 @@ READ32_MEMBER( sun4_state::sun4_system_r ) case 0: default: - logerror("sun4: ASI 2 space unhandled read @ %x (PC=%x)\n", offset<<2, m_maincpu->pc()); + //logerror("sun4: ASI 2 space unhandled read @ %x (PC=%x)\n", offset<<2, m_maincpu->pc()); return 0; } } @@ -818,9 +823,9 @@ WRITE32_MEMBER( sun4_state::sun4_system_w ) if (m_system_enable & ENA_RESET) { - m_reset_timer->adjust(attotime::from_usec(1)); + m_reset_timer->adjust(attotime::from_usec(1), 0); m_maincpu->set_input_line(SPARC_RESET, ASSERT_LINE); - logerror("%s: Asserting reset line\n", machine().describe_context()); + //logerror("%s: Asserting reset line\n", machine().describe_context()); } //printf("%08x to system enable, mask %08x\n", data, mem_mask); if (m_system_enable & ENA_RESET) @@ -856,7 +861,7 @@ WRITE32_MEMBER( sun4_state::sun4_system_w ) return; case 9: // cache data - logerror("sun4: %08x to cache data @ %x, PC = %x\n", data, offset, m_maincpu->pc()); + //logerror("sun4: %08x to cache data @ %x, PC = %x\n", data, offset, m_maincpu->pc()); return; case 0xf: // UART bypass @@ -870,7 +875,7 @@ WRITE32_MEMBER( sun4_state::sun4_system_w ) case 0: // IDPROM default: - logerror("sun4: ASI 2 space unhandled write %x @ %x (mask %08x, PC=%x)\n", data, offset<<2, mem_mask, m_maincpu->pc()); + //logerror("sun4: ASI 2 space unhandled write %x @ %x (mask %08x, PC=%x)\n", data, offset<<2, mem_mask, m_maincpu->pc()); return; } } @@ -882,6 +887,8 @@ READ32_MEMBER( sun4_state::sun4_segment_map_r ) return m_curr_segmap[(offset>>16) & 0xfff]<<16; else if (mem_mask == 0xff000000) return m_curr_segmap[(offset>>16) & 0xfff]<<24; + else if (mem_mask == 0xffffffff) + return m_curr_segmap[(offset>>16) & 0xfff]; else logerror("sun4: read segment map w/ unknown mask %08x\n", mem_mask); return 0x0; @@ -962,7 +969,7 @@ READ32_MEMBER( sun4_state::sun4_insn_data_r ) return m_type1space->read32(space, tmp, mem_mask); default: - logerror("sun4: access to unhandled memory type\n"); + //logerror("sun4: access to unhandled memory type\n"); return 0; } } @@ -970,7 +977,7 @@ READ32_MEMBER( sun4_state::sun4_insn_data_r ) { if (!machine().side_effects_disabled()) { - logerror("sun4: INVALID PTE entry %d %08x accessed! vaddr=%x PC=%x\n", entry_index, m_pagemap[entry_index].to_uint(), offset <<2, m_maincpu->pc()); + //logerror("sun4: INVALID PTE entry %d %08x accessed! vaddr=%x PC=%x\n", entry_index, m_pagemap[entry_index].to_uint(), offset <<2, m_maincpu->pc()); m_maincpu->set_mae(); m_buserr[0] |= 0x80; // invalid PTE m_buserr[0] &= ~0x8000; // read @@ -1022,13 +1029,13 @@ WRITE32_MEMBER( sun4_state::sun4_insn_data_w ) return; default: - logerror("sun4: access to memory type not defined in sun4c\n"); + //logerror("sun4: access to memory type not defined in sun4\n"); return; } } else { - logerror("sun4: INVALID PTE entry %d %08x accessed! data=%08x vaddr=%x PC=%x\n", entry_index, m_pagemap[entry_index].to_uint(), data, offset <<2, m_maincpu->pc()); + //logerror("sun4: INVALID PTE entry %d %08x accessed! data=%08x vaddr=%x PC=%x\n", entry_index, m_pagemap[entry_index].to_uint(), data, offset <<2, m_maincpu->pc()); //m_maincpu->trap(SPARC_DATA_ACCESS_EXCEPTION); //m_buserr[0] = 0x8; // invalid PTE //m_buserr[1] = offset<<2; @@ -1145,7 +1152,7 @@ void sun4_state::type1space_map(address_map &map) map(0x03000000, 0x0300000f).rw(FUNC(sun4_state::timer_r), FUNC(sun4_state::timer_w)).mirror(0xfffff0); map(0x05000000, 0x05000003).rw(FUNC(sun4_state::irq_r), FUNC(sun4_state::irq_w)); map(0x06000000, 0x0607ffff).rom().region("user1", 0); - map(0x07200000, 0x07200003).rw(FUNC(sun4_state::fdc_r), FUNC(sun4_state::fdc_w)); + map(0x07200000, 0x07200007).rw(FUNC(sun4_state::fdc_r), FUNC(sun4_state::fdc_w)); map(0x07400003, 0x07400003).rw(FUNC(sun4_state::auxio_r), FUNC(sun4_state::auxio_w)); map(0x08000000, 0x08000003).r(FUNC(sun4_state::ss1_sl0_id)); // slot 0 contains SCSI/DMA/Ethernet map(0x08400000, 0x0840000f).rw(FUNC(sun4_state::dma_r), FUNC(sun4_state::dma_w)); @@ -1180,6 +1187,11 @@ void sun4_state::machine_reset() m_dma_tc_read = false; m_dma_pack_register = 0; + m_c0_last_read_time = attotime::zero; + m_c1_last_read_time = attotime::zero; + m_counter[0] = 1 << 10; + m_counter[2] = 1 << 10; + memset(m_counter, 0, sizeof(m_counter)); memset(m_dma, 0, sizeof(m_dma)); } @@ -1203,12 +1215,56 @@ void sun4_state::machine_start() // allocate timers for the built-in two channel timer m_c0_timer = timer_alloc(TIMER_0); m_c1_timer = timer_alloc(TIMER_1); - m_c0_timer->adjust(attotime::never); - m_c1_timer->adjust(attotime::never); + m_c0_timer->adjust(attotime::from_usec(1), 0, attotime::from_usec(1)); + m_c1_timer->adjust(attotime::from_usec(1), 0, attotime::from_usec(1)); // allocate timer for system reset m_reset_timer = timer_alloc(TIMER_RESET); m_reset_timer->adjust(attotime::never); + + for (int i = 0; i < 16; i++) + { + save_item(NAME(m_segmap[i]), i); + save_item(NAME(m_segmap_masked[i]), i); + } + + for (int i = 0; i < 16384; i++) + { + save_item(NAME(m_pagemap[i].valid), i); + save_item(NAME(m_pagemap[i].writable), i); + save_item(NAME(m_pagemap[i].supervisor), i); + save_item(NAME(m_pagemap[i].uncached), i); + save_item(NAME(m_pagemap[i].accessed), i); + save_item(NAME(m_pagemap[i].modified), i); + save_item(NAME(m_pagemap[i].page), i); + save_item(NAME(m_pagemap[i].type), i); + } + + save_item(NAME(m_cachetags)); + save_item(NAME(m_cachedata)); + save_item(NAME(m_ram_size)); + save_item(NAME(m_ram_size_words)); + save_item(NAME(m_context)); + save_item(NAME(m_context_masked)); + save_item(NAME(m_system_enable)); + save_item(NAME(m_fetch_bootrom)); + save_item(NAME(m_buserr)); + save_item(NAME(m_page_valid)); + + save_item(NAME(m_auxio)); + save_item(NAME(m_counter)); + save_item(NAME(m_dma)); + save_item(NAME(m_dma_irq)); + save_item(NAME(m_dma_tc_read)); + save_item(NAME(m_dma_pack_register)); + save_item(NAME(m_scsi_irq)); + save_item(NAME(m_fdc_irq)); + + save_item(NAME(m_irq_reg)); + save_item(NAME(m_scc1_int)); + save_item(NAME(m_scc2_int)); + save_item(NAME(m_diag)); + save_item(NAME(m_arch)); } READ32_MEMBER( sun4_state::ram_r ) @@ -1300,12 +1356,22 @@ READ8_MEMBER( sun4_state::fdc_r ) switch(offset) { - case 0: // Main Status (R) + case 0: // Main Status (R, 82072) return m_fdc->msr_r(space, 0, 0xff); - case 1: // FIFO Data Port (R) + case 1: // FIFO Data Port (R, 82072) + case 5: // FIFO Data Port (R, 82077) return m_fdc->fifo_r(space, 0, 0xff); + case 2: // Digital Output Register (R, 82077) + return m_fdc->dor_r(space, 0, 0xff); + + case 4: // Main Status Register (R, 82077) + return m_fdc->msr_r(space, 0, 0xff); + + case 7:// Digital Input Register (R, 82077) + return m_fdc->dir_r(space, 0, 0xff); + default: break; } @@ -1317,14 +1383,20 @@ WRITE8_MEMBER( sun4_state::fdc_w ) { switch(offset) { - case 0: // Data Rate Select Register (W) + case 0: // Data Rate Select Register (W, 82072) + case 4: // Data Rate Select Register (W, 82077) m_fdc->dsr_w(space, 0, data, 0xff); break; - case 1: // FIFO Data Port (W) + case 1: // FIFO Data Port (W, 82072) + case 5: // FIFO Data Port (W, 82077) m_fdc->fifo_w(space, 0, data, 0xff); break; + case 7: // Configuration Control REgister (W, 82077) + m_fdc->ccr_w(space, 0, data, 0xff); + break; + default: break; } @@ -1353,6 +1425,7 @@ WRITE8_MEMBER( sun4_state::auxio_w ) READ8_MEMBER( sun4_state::irq_r ) { + //logerror("%02x from IRQ\n", m_irq_reg); return m_irq_reg; } @@ -1414,28 +1487,40 @@ void sun4_state::device_timer(emu_timer &timer, device_timer_id id, int param, v switch (id) { case TIMER_0: - //printf("Timer 0 expired\n"); - m_counter[0] = 0x80000000 | (1 << 10); - m_counter[1] |= 0x80000000; - //m_c0_timer->adjust(attotime::never); - start_timer(0); - if ((m_irq_reg & 0x21) == 0x21) + //logerror("Timer 0 expired\n"); + m_counter[0] += 1 << 10; + if ((m_counter[0] & 0x7fffffff) == (m_counter[1] & 0x7fffffff)) { - m_maincpu->set_input_line(SPARC_IRQ10, ASSERT_LINE); - //printf("Taking INT10\n"); + m_counter[0] = 0x80000000 | (1 << 10); + m_counter[1] |= 0x80000000; + if ((m_irq_reg & 0x21) == 0x21) + { + m_maincpu->set_input_line(SPARC_IRQ10, ASSERT_LINE); + //logerror("Taking INT10\n"); + } + else + { + //logerror("Not taking INT10\n"); + } } break; case TIMER_1: - //printf("Timer 1 expired\n"); - m_counter[2] = 0x80000000 | (1 << 10); - m_counter[3] |= 0x80000000; - start_timer(1); - //m_c1_timer->adjust(attotime::never); - if ((m_irq_reg & 0x81) == 0x81) + //logerror("Timer 1 expired\n"); + m_counter[2] += 1 << 10; + if ((m_counter[2] & 0x7fffffff) == (m_counter[3] & 0x7fffffff)) { - m_maincpu->set_input_line(SPARC_IRQ14, ASSERT_LINE); - //printf("Taking INT14\n"); + m_counter[2] = 0x80000000 | (1 << 10); + m_counter[3] |= 0x80000000; + if ((m_irq_reg & 0x81) == 0x81) + { + m_maincpu->set_input_line(SPARC_IRQ14, ASSERT_LINE); + //logerror("Taking INT14\n"); + } + else + { + //logerror("Not taking INT14\n"); + } } break; @@ -1449,51 +1534,33 @@ void sun4_state::device_timer(emu_timer &timer, device_timer_id id, int param, v READ32_MEMBER( sun4_state::timer_r ) { - uint32_t ret = m_counter[offset]; + const uint32_t ret = m_counter[offset]; // reading limt 0 if (offset == 0) { - //printf("Read timer counter 0 (%08x) @ %x, mask %08x\n", ret, m_maincpu->pc(), mem_mask); + //logerror("Read timer counter 0 (%x) @ %x, mask %08x\n", ret, m_maincpu->pc(), mem_mask); } - if (offset == 1) + else if (offset == 1) { - //printf("Read timer limit 0 (%08x) @ %x, mask %08x\n", ret, m_maincpu->pc(), mem_mask); + //logerror("Read timer limit 0 (%08x) @ %x, mask %08x, clearing IRQ10\n", ret, m_maincpu->pc(), mem_mask); m_counter[0] &= ~0x80000000; m_counter[1] &= ~0x80000000; m_maincpu->set_input_line(SPARC_IRQ10, CLEAR_LINE); } - - if (offset == 2) + else if (offset == 2) { - //printf("Read timer counter 1 (%08x) @ %x, mask %08x\n", ret, m_maincpu->pc(), mem_mask); + //logerror("Read timer counter 1 (%x) @ %x, mask %08x\n", ret, m_maincpu->pc(), mem_mask); } - if (offset == 3) + else if (offset == 3) { - //printf("Read timer limit 1 (%08x) @ %x, mask %08x\n", ret, m_maincpu->pc(), mem_mask); + //logerror("Read timer limit 1 (%08x) @ %x, mask %08x, clearing IRQ14\n", ret, m_maincpu->pc(), mem_mask); m_counter[2] &= ~0x80000000; m_counter[3] &= ~0x80000000; m_maincpu->set_input_line(SPARC_IRQ14, CLEAR_LINE); } - return ret; -} - -void sun4_state::start_timer(int num) -{ - int period = (m_counter[num * 2 + 1] >> 10) & 0x1fffff; - if (period == 0) - period = 0x200000; - //printf("Setting limit %d period to %d us\n", num, period); - - if (num == 0) - { - m_c0_timer->adjust(attotime::from_usec(period)); - } - else - { - m_c1_timer->adjust(attotime::from_usec(period)); - } + return ret; } WRITE32_MEMBER( sun4_state::timer_w ) @@ -1502,26 +1569,26 @@ WRITE32_MEMBER( sun4_state::timer_w ) if (offset == 0) { - printf("%08x to timer counter 0 @ %x, mask %08x\n", data, m_maincpu->pc(), mem_mask); + //logerror("%08x to timer counter 0 @ %x, mask %08x\n", data, m_maincpu->pc(), mem_mask); } // writing limit 0 if (offset == 1) { + //logerror("%08x to timer limit 0 @ %x, mask %08x\n", data, m_maincpu->pc(), mem_mask); m_counter[0] = 1 << 10; - start_timer(0); } if (offset == 2) { - printf("%08x to timer counter 1 @ %x, mask %08x\n", data, m_maincpu->pc(), mem_mask); + //printf("%08x to timer counter 1 @ %x, mask %08x\n", data, m_maincpu->pc(), mem_mask); } // writing limit 1 if (offset == 3) { + //logerror("%08x to timer limit 1 @ %x, mask %08x\n", data, m_maincpu->pc(), mem_mask); m_counter[2] = 1 << 10; - start_timer(1); } } @@ -1541,7 +1608,6 @@ void sun4_state::dma_check_interrupts() if (old_irq != m_dma_irq) { //logerror("m_dma_irq %d because irq_or_err_pending:%d and irq_enabled:%d\n", m_dma_irq ? 1 : 0, irq_or_err_pending, irq_enabled); - logerror("dma\n"); m_maincpu->set_input_line(SPARC_IRQ3, m_dma_irq ? ASSERT_LINE : CLEAR_LINE); } } @@ -1813,7 +1879,9 @@ MACHINE_CONFIG_START(sun4_state::sun4) m_mmu->set_scc(m_scc2); m_maincpu->set_mmu(m_mmu); - RAM(config, RAM_TAG).set_default_size("16M").set_default_value(0x00); + RAM(config, m_ram); + m_ram->set_default_size("16M"); + m_ram->set_default_value(0x00); M48T02(config, TIMEKEEPER_TAG, 0); @@ -1873,11 +1941,11 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(sun4_state::sun4c) /* basic machine hardware */ - MCFG_DEVICE_ADD(m_maincpu, MB86901, 16'670'000) + MCFG_DEVICE_ADD(m_maincpu, MB86901, 20'000'000) MCFG_SPARC_ADD_ASI_DESC(sun4c_asi_desc) m_maincpu->set_addrmap(0, &sun4_state::sun4c_debugger_map); - SUN4C_MMU(config, m_mmu, 16'670'000, 7, 0x7f); + SUN4C_MMU(config, m_mmu, 20'000'000, 7, 0x7f); m_mmu->type1_r().set(m_type1space, FUNC(address_map_bank_device::read32)); m_mmu->type1_w().set(m_type1space, FUNC(address_map_bank_device::write32)); m_mmu->set_cpu(m_maincpu); @@ -1886,11 +1954,12 @@ MACHINE_CONFIG_START(sun4_state::sun4c) m_mmu->set_scc(m_scc2); m_maincpu->set_mmu(m_mmu); - RAM(config, RAM_TAG).set_default_size("16M").set_default_value(0x00); + RAM(config, m_ram).set_default_size("16M").set_default_value(0x00); + m_ram->set_extra_options("4M,8M,12M,16M,20M,24M,28M,32M,36M,40M,48M,52M,64M"); M48T02(config, TIMEKEEPER_TAG, 0); - I82072(config, m_fdc, 24_MHz_XTAL); + N82077AA(config, m_fdc, 24_MHz_XTAL); m_fdc->set_ready_line_connected(false); m_fdc->intrq_wr_callback().set(FUNC(sun4_state::fdc_irq)); FLOPPY_CONNECTOR(config, m_floppy, sun_floppies, "35hd", sun4_state::floppy_formats); @@ -1899,7 +1968,7 @@ MACHINE_CONFIG_START(sun4_state::sun4c) ADDRESS_MAP_BANK(config, m_type0space).set_map(&sun4_state::type0space_map).set_options(ENDIANNESS_BIG, 32, 32, 0x80000000); // MMU Type 1 device space - ADDRESS_MAP_BANK(config, m_type1space).set_map(&sun4_state::type1space_map).set_options(ENDIANNESS_BIG, 32, 32, 0x80000000); + ADDRESS_MAP_BANK(config, m_type1space).set_map(&sun4_state::type1space_sbus_map).set_options(ENDIANNESS_BIG, 32, 32, 0x80000000); // Ethernet AM79C90(config, m_lance, 10'000'000); // clock is a guess @@ -1941,57 +2010,89 @@ MACHINE_CONFIG_START(sun4_state::sun4c) MCFG_NSCSI_ADD("scsibus:6", sun_scsi_devices, nullptr, false) MCFG_NSCSI_ADD("scsibus:7", sun_scsi_devices, "ncr53c90a", true) MCFG_SLOT_OPTION_MACHINE_CONFIG("ncr53c90a", [this] (device_t *device) { ncr53c90a(device); }) + + // SBus + SBUS(config, m_sbus, 20'000'000, "maincpu", "type1"); + SBUS_SLOT(config, m_sbus_slot[0], 20'000'000, m_sbus, sbus_cards, nullptr); + SBUS_SLOT(config, m_sbus_slot[1], 20'000'000, m_sbus, sbus_cards, nullptr); + SBUS_SLOT(config, m_sbus_slot[2], 20'000'000, m_sbus, sbus_cards, nullptr); MACHINE_CONFIG_END +void sun4_state::sun4_20(machine_config &config) +{ + sun4c(config); + + m_ram->set_extra_options("4M,8M,12M,16M"); + + m_sbus_slot[0]->set_fixed(true); + m_sbus_slot[1]->set_fixed(true); + m_sbus_slot[2]->set_default_option("bwtwo"); + m_sbus_slot[2]->set_fixed(true); +} + void sun4_state::sun4_40(machine_config &config) { sun4c(config); + m_ram->set_extra_options("4M,8M,12M,16M,20M,24M,32M,36M,48M"); + m_mmu->set_clock(25'000'000); m_maincpu->set_clock(25'000'000); - m_maincpu->set_mmu(m_mmu); - m_type1space->set_map(&sun4_state::type1space_sbus_map).set_options(ENDIANNESS_BIG, 32, 32, 0x80000000); + m_sbus->set_clock(25'000'000); + m_sbus_slot[0]->set_clock(25'000'000); + m_sbus_slot[1]->set_clock(25'000'000); + m_sbus_slot[2]->set_clock(25'000'000); + m_sbus_slot[2]->set_default_option("bwtwo"); + m_sbus_slot[2]->set_fixed(true); +} - // SBus - SBUS(config, m_sbus, 25'000'000, "maincpu", "type1"); - SBUS_SLOT(config, "slot1", 25'000'000, m_sbus, sbus_cards, nullptr); - SBUS_SLOT(config, "slot2", 25'000'000, m_sbus, sbus_cards, nullptr); - SBUS_SLOT(config, "slot3", 25'000'000, m_sbus, sbus_cards, "bwtwo"); +void sun4_state::sun4_50(machine_config &config) +{ + sun4c(config); + + m_mmu->set_ctx_mask(0xf); + m_mmu->set_pmeg_mask(0xff); + + m_mmu->set_clock(40'000'000); + m_maincpu->set_clock(40'000'000); + + m_sbus->set_clock(20'000'000); + m_sbus_slot[0]->set_clock(20'000'000); + m_sbus_slot[1]->set_clock(20'000'000); + m_sbus_slot[2]->set_clock(20'000'000); + m_sbus_slot[2]->set_default_option("turbogx"); // not accurate, should be gxp, not turbogx + m_sbus_slot[2]->set_fixed(true); } void sun4_state::sun4_60(machine_config &config) { sun4c(config); +} - m_mmu->set_clock(20'000'000); - m_maincpu->set_clock(20'000'000); - m_maincpu->set_mmu(m_mmu); +void sun4_state::sun4_65(machine_config &config) +{ + sun4c(config); - m_type1space->set_map(&sun4_state::type1space_sbus_map).set_options(ENDIANNESS_BIG, 32, 32, 0x80000000); + m_mmu->set_clock(25'000'000); + m_maincpu->set_clock(25'000'000); - // SBus - SBUS(config, m_sbus, 20'000'000, "maincpu", "type1"); - SBUS_SLOT(config, "slot1", 20'000'000, m_sbus, sbus_cards, nullptr); - SBUS_SLOT(config, "slot2", 20'000'000, m_sbus, sbus_cards, nullptr); - SBUS_SLOT(config, "slot3", 20'000'000, m_sbus, sbus_cards, nullptr); + m_sbus->set_clock(25'000'000); + m_sbus_slot[0]->set_clock(25'000'000); + m_sbus_slot[1]->set_clock(25'000'000); + m_sbus_slot[2]->set_clock(25'000'000); + m_sbus_slot[2]->set_default_option("bwtwo"); } void sun4_state::sun4_75(machine_config &config) { sun4c(config); + m_mmu->set_ctx_mask(0xf); + m_mmu->set_pmeg_mask(0xff); + m_mmu->set_clock(40'000'000); m_maincpu->set_clock(40'000'000); - m_maincpu->set_mmu(m_mmu); - - m_type1space->set_map(&sun4_state::type1space_sbus_map).set_options(ENDIANNESS_BIG, 32, 32, 0x80000000); - - // SBus - SBUS(config, m_sbus, 20'000'000, "maincpu", "type1"); - SBUS_SLOT(config, "slot1", 20'000'000, m_sbus, sbus_cards, nullptr); - SBUS_SLOT(config, "slot2", 20'000'000, m_sbus, sbus_cards, nullptr); - SBUS_SLOT(config, "slot3", 20'000'000, m_sbus, sbus_cards, nullptr); } /* @@ -2243,11 +2344,6 @@ void sun4_state::init_sun4c() m_arch = ARCH_SUN4C; } -void sun4_state::init_ss2() -{ - m_arch = ARCH_SUN4C; -} - /* Drivers */ // YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS @@ -2257,12 +2353,12 @@ COMP( 1987, sun4_300, 0, 0, sun4, sun4, sun4_state, init_sun4, COMP( 198?, sun4_400, 0, 0, sun4, sun4, sun4_state, init_sun4, "Sun Microsystems", "Sun 4/4x0", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // sun4c -COMP( 1990, sun4_40, sun4_300, 0, sun4_40, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation IPC (Sun 4/40)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -COMP( 1991, sun4_50, sun4_300, 0, sun4c, sun4, sun4_state, init_ss2, "Sun Microsystems", "SPARCstation IPX (Sun 4/50)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -COMP( 199?, sun4_20, sun4_300, 0, sun4c, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation SLC (Sun 4/20)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -COMP( 1989, sun4_60, sun4_300, 0, sun4_60, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation 1 (Sun 4/60)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -COMP( 1990, sun4_65, sun4_300, 0, sun4c, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation 1+ (Sun 4/65)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -COMP( 1990, sun4_75, sun4_300, 0, sun4_75, sun4, sun4_state, init_ss2, "Sun Microsystems", "SPARCstation 2 (Sun 4/75)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +COMP( 1990, sun4_40, sun4_300, 0, sun4_40, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation IPC (Sun 4/40)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE ) +COMP( 1991, sun4_50, sun4_300, 0, sun4_50, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation IPX (Sun 4/50)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +COMP( 199?, sun4_20, sun4_300, 0, sun4_20, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation SLC (Sun 4/20)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +COMP( 1989, sun4_60, sun4_300, 0, sun4_60, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation 1 (Sun 4/60)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE ) +COMP( 1990, sun4_65, sun4_300, 0, sun4_65, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation 1+ (Sun 4/65)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +COMP( 1990, sun4_75, sun4_300, 0, sun4_75, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation 2 (Sun 4/75)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // sun4m (using the SPARC "reference MMU", probably will go to a separate driver) COMP( 1992, sun_s10, sun4_300, 0, sun4c, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation 10 (Sun S10)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) diff --git a/src/mame/drivers/system1.cpp b/src/mame/drivers/system1.cpp index 64f5320419e..084d8ef8d50 100644 --- a/src/mame/drivers/system1.cpp +++ b/src/mame/drivers/system1.cpp @@ -5572,9 +5572,9 @@ GAME( 1984, flicky, 0, sys1piox_315_5051, flicky, system1_state, i GAME( 1984, flickya, flicky, sys1piox_315_5051, flicky, system1_state, init_bank00, ROT0, "Sega", "Flicky (128k Version, 315-5051, larger roms)", MACHINE_SUPPORTS_SAVE ) GAME( 1984, flickys2, flicky, sys1pio, flickys2, system1_state, init_bank00, ROT0, "Sega", "Flicky (128k Version, not encrypted)", MACHINE_SUPPORTS_SAVE ) GAME( 1984, thetogyu, bullfgt, sys1piox_315_5065, bullfgt, system1_state, init_bank00, ROT0, "Coreland / Sega", "The Togyu (315-5065, Japan)", MACHINE_SUPPORTS_SAVE ) -GAME( 1984, spatter, 0, sys1piosx_315_spat,spatter, system1_state, init_bank00, ROT0, "Sega", "Spatter (315-xxxx)", MACHINE_SUPPORTS_SAVE ) +GAME( 1984, spatter, 0, sys1piosx_315_spat,spatter, system1_state, init_bank00, ROT0, "Sega", "Spatter (315-5xxx)", MACHINE_SUPPORTS_SAVE ) GAME( 1984, spattera, spatter, sys1piosx_315_5099,spatter, system1_state, init_bank00, ROT0, "Sega", "Spatter (315-5099)", MACHINE_SUPPORTS_SAVE ) -GAME( 1984, ssanchan, spatter, sys1piosx_315_spat,spatter, system1_state, init_bank00, ROT0, "Sega", "Sanrin San Chan (Japan, 315-xxxx)", MACHINE_SUPPORTS_SAVE ) +GAME( 1984, ssanchan, spatter, sys1piosx_315_spat,spatter, system1_state, init_bank00, ROT0, "Sega", "Sanrin San Chan (Japan, 315-5xxx)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, pitfall2, 0, sys1piox_315_5093, pitfall2, system1_state, init_bank00, ROT0, "Sega", "Pitfall II (315-5093)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, pitfall2a, pitfall2, sys1piox_315_5093, pitfall2, system1_state, init_bank00, ROT0, "Sega", "Pitfall II (315-5093, Flicky Conversion)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, pitfall2u, pitfall2, sys1pio, pitfall2u, system1_state, init_bank00, ROT0, "Sega", "Pitfall II (not encrypted)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/taito_z.cpp b/src/mame/drivers/taito_z.cpp index fedcbba4d64..28af9ac056d 100644 --- a/src/mame/drivers/taito_z.cpp +++ b/src/mame/drivers/taito_z.cpp @@ -3230,9 +3230,9 @@ MACHINE_CONFIG_START(taitoz_state::contcirc) MCFG_DEVICE_ADD("tc0110pcr", TC0110PCR, 0, "palette") /* sound hardware */ - SPEAKER(config, "front", 0.0, 0.0, 1.0); - SPEAKER(config, "rear", 0.0, 0.0, -0.5); - SPEAKER(config, "subwoofer", 0.0, 0.0, 1.0); + SPEAKER(config, "front").front_center(); + SPEAKER(config, "rear").rear_center(); + SPEAKER(config, "subwoofer").subwoofer(); MCFG_DEVICE_ADD("ymsnd", YM2610, 16000000/2) MCFG_YM2610_IRQ_HANDLER(INPUTLINE("audiocpu", 0)) @@ -3304,9 +3304,9 @@ MACHINE_CONFIG_START(taitoz_state::chasehq) MCFG_DEVICE_ADD("tc0110pcr", TC0110PCR, 0, "palette") /* sound hardware */ - SPEAKER(config, "front", 0.0, 0.0, 1.0); - SPEAKER(config, "rear", 0.0, 0.0, -0.5); - SPEAKER(config, "subwoofer", 0.0, 0.0, 0.5); + SPEAKER(config, "front").front_center(); + SPEAKER(config, "rear").rear_center(); + SPEAKER(config, "subwoofer").subwoofer(); MCFG_DEVICE_ADD("ymsnd", YM2610, 16000000/2) MCFG_YM2610_IRQ_HANDLER(INPUTLINE("audiocpu", 0)) @@ -3620,9 +3620,9 @@ MACHINE_CONFIG_START(taitoz_state::nightstr) MCFG_DEVICE_ADD("tc0110pcr", TC0110PCR, 0, "palette") /* sound hardware */ - SPEAKER(config, "front", 0.0, 0.0, 1.0); - SPEAKER(config, "rear", 0.0, 0.0, -0.5); - SPEAKER(config, "subwoofer", 0.0, 0.0, 0.5); + SPEAKER(config, "front").front_center(); + SPEAKER(config, "rear").rear_center(); + SPEAKER(config, "subwoofer").subwoofer(); MCFG_DEVICE_ADD("ymsnd", YM2610, 16000000/2) MCFG_YM2610_IRQ_HANDLER(INPUTLINE("audiocpu", 0)) diff --git a/src/mame/drivers/taitojc.cpp b/src/mame/drivers/taitojc.cpp index 5197bc9ef31..bc20523d409 100644 --- a/src/mame/drivers/taitojc.cpp +++ b/src/mame/drivers/taitojc.cpp @@ -1133,9 +1133,9 @@ MACHINE_CONFIG_START(taitojc_state::dendego) MCFG_SCREEN_UPDATE_DRIVER(taitojc_state, screen_update_dendego) /* sound hardware */ - SPEAKER(config, "subwoofer", 0.0, 0.0, 1.0); + SPEAKER(config, "vibration").subwoofer(); MCFG_DEVICE_ADD("oki", OKIM6295, 1056000, okim6295_device::PIN7_HIGH) // clock frequency & pin 7 not verified - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "subwoofer", 0.20) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "vibration", 0.20) MACHINE_CONFIG_END diff --git a/src/mame/drivers/tandy2k.cpp b/src/mame/drivers/tandy2k.cpp index 03b12ee5e0c..2f76b848870 100644 --- a/src/mame/drivers/tandy2k.cpp +++ b/src/mame/drivers/tandy2k.cpp @@ -851,11 +851,11 @@ MACHINE_CONFIG_START(tandy2k_state::tandy2k) MCFG_DEVICE_ADD(I8259A_1_TAG, PIC8259, 0) MCFG_PIC8259_OUT_INT_CB(WRITELINE(I80186_TAG, i80186_cpu_device, int1_w)) - MCFG_I8272A_ADD(I8272A_TAG, true) - downcast<i8272a_device *>(device)->set_select_lines_connected(true); - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(I8259A_0_TAG, pic8259_device, ir4_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, tandy2k_state, fdc_drq_w)) - MCFG_UPD765_HDL_CALLBACK(WRITELINE(*this, tandy2k_state, fdc_hdl_w)) + I8272A(config, m_fdc, true); + m_fdc->set_select_lines_connected(true); + m_fdc->intrq_wr_callback().set(m_pic0, FUNC(pic8259_device::ir4_w)); + m_fdc->drq_wr_callback().set(FUNC(tandy2k_state::fdc_drq_w)); + m_fdc->hdl_wr_callback().set(FUNC(tandy2k_state::fdc_hdl_w)); MCFG_FLOPPY_DRIVE_ADD(I8272A_TAG ":0", tandy2k_floppies, "525qd", tandy2k_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD(I8272A_TAG ":1", tandy2k_floppies, "525qd", tandy2k_state::floppy_formats) diff --git a/src/mame/drivers/tim011.cpp b/src/mame/drivers/tim011.cpp index cad70b3cab4..61d70ecccc7 100644 --- a/src/mame/drivers/tim011.cpp +++ b/src/mame/drivers/tim011.cpp @@ -140,8 +140,8 @@ MACHINE_CONFIG_START(tim011_state::tim011) // MCFG_DEVICE_ADD("keyboard",CDP1802, XTAL(1'750'000)) // CDP1802, unknown clock // FDC9266 location U43 XTAL(8'000'000) - MCFG_UPD765A_ADD(FDC9266_TAG, true, true) - MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE("maincpu", INPUT_LINE_IRQ2)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ2); /* floppy drives */ MCFG_FLOPPY_DRIVE_ADD(FDC9266_TAG ":0", tim011_floppies, "35dd", tim011_floppy_formats) diff --git a/src/mame/drivers/tnzs.cpp b/src/mame/drivers/tnzs.cpp index 38b8705da99..721e116a340 100644 --- a/src/mame/drivers/tnzs.cpp +++ b/src/mame/drivers/tnzs.cpp @@ -1603,12 +1603,13 @@ MACHINE_CONFIG_START(extrmatn_state::extrmatn) MCFG_PALETTE_INIT_OWNER(tnzs_base_state, prompalette) MACHINE_CONFIG_END -MACHINE_CONFIG_START(extrmatn_state::plumppop) +void extrmatn_state::plumppop(machine_config &config) +{ extrmatn(config); - MCFG_DEVICE_ADD("upd4701", UPD4701A, 0) - MCFG_UPD4701_PORTX("AN1") - MCFG_UPD4701_PORTY("AN2") -MACHINE_CONFIG_END + UPD4701A(config, m_upd4701); + m_upd4701->set_portx_tag("AN1"); + m_upd4701->set_porty_tag("AN2"); +} MACHINE_CONFIG_START(arknoid2_state::arknoid2) plumppop(config); @@ -1720,9 +1721,9 @@ MACHINE_CONFIG_START(jpopnics_state::jpopnics) MCFG_DEVICE_MODIFY("sub") MCFG_DEVICE_PROGRAM_MAP(jpopnics_sub_map) - MCFG_DEVICE_ADD("upd4701", UPD4701A, 0) - MCFG_UPD4701_PORTX("AN1") - MCFG_UPD4701_PORTY("AN2") + UPD4701A(config, m_upd4701); + m_upd4701->set_portx_tag("AN1"); + m_upd4701->set_porty_tag("AN2"); /* video hardware */ MCFG_PALETTE_MODIFY("palette") diff --git a/src/mame/drivers/toypop.cpp b/src/mame/drivers/toypop.cpp index 65c9cab4c9c..abe9543c32f 100644 --- a/src/mame/drivers/toypop.cpp +++ b/src/mame/drivers/toypop.cpp @@ -123,9 +123,9 @@ private: bool m_slave_irq_enable; uint8_t m_pal_bank; - void legacy_bg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect); - void legacy_fg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect); - void legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &cliprect); + void legacy_bg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect,int flip); + void legacy_fg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect,int flip); + void legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &cliprect,int flip); }; PALETTE_INIT_MEMBER(namcos16_state, toypop) @@ -177,7 +177,7 @@ PALETTE_INIT_MEMBER(namcos16_state, toypop) } } -void namcos16_state::legacy_bg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect) +void namcos16_state::legacy_bg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect,int flip) { int x, y; const uint16_t pal_base = 0x300 + (m_pal_bank << 4); @@ -187,18 +187,32 @@ void namcos16_state::legacy_bg_draw(bitmap_ind16 &bitmap,const rectangle &clipre for (y = cliprect.min_y; y <= cliprect.max_y; ++y) { uint16_t *src = &m_bgvram[y * src_pitch + cliprect.min_x + src_base]; - uint16_t *dst = &bitmap.pix16(y, cliprect.min_x); + uint16_t *dst; + if(!flip) + dst = &bitmap.pix16(y, cliprect.min_x); + else + dst = &bitmap.pix16(cliprect.max_y - y, cliprect.max_x); for (x = cliprect.min_x; x <= cliprect.max_x; x += 2) { uint32_t srcpix = *src++; - *dst++ = m_palette->pen(((srcpix >> 8) & 0xf) + pal_base); - *dst++ = m_palette->pen((srcpix & 0xf) + pal_base); + int idx1 = ((srcpix >> 8) & 0xf) + pal_base; + int idx2 = (srcpix & 0xf) + pal_base; + if (!flip) + { + *dst++ = m_palette->pen(idx1); + *dst++ = m_palette->pen(idx2); + } + else + { + *dst-- = m_palette->pen(idx1); + *dst-- = m_palette->pen(idx2); + } } } } -void namcos16_state::legacy_fg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect) +void namcos16_state::legacy_fg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect,int flip) { gfx_element *gfx_0 = m_gfxdecode->gfx(0); int count; @@ -208,31 +222,52 @@ void namcos16_state::legacy_fg_draw(bitmap_ind16 &bitmap,const rectangle &clipre int x;// = (count % 32); int y; //= count / 32; - if(count < 64) - { - x = 34 + (count / 32); - y = (count % 32) - 2; - } - else if(count >= 32*30) + if (!flip) { - x = (count / 32) - 30; - y = (count % 32) - 2; + if(count < 64) + { + x = 34 + (count / 32); + y = (count % 32) - 2; + } + else if(count >= 32*30) + { + x = (count / 32) - 30; + y = (count % 32) - 2; + } + else + { + x = 2 + (count % 32); + y = (count / 32) - 2; + } } else { - x = 2 + (count % 32); - y = (count / 32) - 2; + if(count < 64) + { + x = 1 - (count / 32); + y = 29 - (count % 32); + } + else if(count >= 32*30) + { + x = 65 - (count / 32); + y = 29 - (count % 32); + } + else + { + x = 33 - (count % 32); + y = 29 - (count / 32); + } } uint16_t tile = m_fgvram[count]; uint8_t color = (m_fgattr[count] & 0x3f) + (m_pal_bank<<6); - gfx_0->transpen(bitmap,cliprect,tile,color,0,0,x*8,y*8,0); + gfx_0->transpen(bitmap,cliprect,tile,color,flip,flip,x*8,y*8,0); } } // TODO: this is likely to be a lot more complex, and maybe is per scanline too -void namcos16_state::legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &cliprect) +void namcos16_state::legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &cliprect,int flip) { gfx_element *gfx_1 = m_gfxdecode->gfx(1); int count; @@ -248,6 +283,11 @@ void namcos16_state::legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &clipr if(enabled == false) continue; + static const int gfx_offs[2][2] = + { + { 0, 1 }, + { 2, 3 } + }; uint8_t tile = base_spriteram[count]; uint8_t color = base_spriteram[count+1]; int x = base_spriteram[count+bank1+1] + (base_spriteram[count+bank2+1] << 8); @@ -263,6 +303,12 @@ void namcos16_state::legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &clipr uint8_t width = ((base_spriteram[count+bank2] & 4) >> 2) + 1; uint8_t height = ((base_spriteram[count+bank2] & 8) >> 3) + 1; + if (flip) + { + fx ^= 1; + fy ^= 1; + } + if(height == 2) y -=16; @@ -270,7 +316,7 @@ void namcos16_state::legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &clipr { for(int xi=0;xi<width;xi++) { - uint16_t sprite_offs = tile + (xi ^ ((width - 1) & fx)) + yi * 2; + uint16_t sprite_offs = tile + gfx_offs[yi ^ ((height - 1) * fy)][xi ^ ((width - 1) * fx)]; gfx_1->transmask(bitmap,cliprect,sprite_offs,color,fx,fy,x + xi*16,y + yi *16,m_palette->transpen_mask(*gfx_1, color, 0xff)); } } @@ -279,9 +325,10 @@ void namcos16_state::legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &clipr uint32_t namcos16_state::screen_update( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect ) { - legacy_bg_draw(bitmap,cliprect); - legacy_fg_draw(bitmap,cliprect); - legacy_obj_draw(bitmap,cliprect); + int flip = flip_screen(); + legacy_bg_draw(bitmap,cliprect,flip); + legacy_fg_draw(bitmap,cliprect,flip); + legacy_obj_draw(bitmap,cliprect,flip); return 0; } @@ -782,5 +829,5 @@ ROM_START( toypop ) ROM_LOAD( "tp1-6.3d", 0x0000, 0x0100, CRC(16a9166a) SHA1(847cbaf7c88616576c410177e066ae1d792ac0ba) ) ROM_END -GAME( 1983, liblrabl, 0, liblrabl, liblrabl, namcos16_state, empty_init, ROT0, "Namco", "Libble Rabble", MACHINE_NO_COCKTAIL ) -GAME( 1986, toypop, 0, toypop, toypop, namcos16_state, empty_init, ROT0, "Namco", "Toypop", MACHINE_NO_COCKTAIL ) +GAME( 1983, liblrabl, 0, liblrabl, liblrabl, namcos16_state, empty_init, ROT0, "Namco", "Libble Rabble", 0 ) +GAME( 1986, toypop, 0, toypop, toypop, namcos16_state, empty_init, ROT0, "Namco", "Toypop", 0 ) diff --git a/src/mame/drivers/tv990.cpp b/src/mame/drivers/tv990.cpp index 98f9b93e127..d6a89515dc4 100644 --- a/src/mame/drivers/tv990.cpp +++ b/src/mame/drivers/tv990.cpp @@ -42,8 +42,6 @@ #include "speaker.h" -#define UART0_TAG "ns16450_0" -#define UART1_TAG "ns16450_1" #define RS232A_TAG "rs232a" #define RS232B_TAG "rs232b" #define LPT_TAG "lpt" @@ -56,8 +54,7 @@ public: m_maincpu(*this, "maincpu"), m_vram(*this, "vram"), m_fontram(*this, "fontram"), - m_uart0(*this, UART0_TAG), - m_uart1(*this, UART1_TAG), + m_uart(*this, "ns16450_%u", 0U), m_screen(*this, "screen"), m_kbdc(*this, "pc_kbdc"), m_palette(*this, "palette"), @@ -73,7 +70,7 @@ private: required_device<m68000_device> m_maincpu; required_shared_ptr<uint16_t> m_vram; required_shared_ptr<uint16_t> m_fontram; - required_device<ns16450_device> m_uart0, m_uart1; + required_device_array<ns16450_device, 2> m_uart; required_device<screen_device> m_screen; required_device<kbdc8042_device> m_kbdc; required_device<palette_device> m_palette; @@ -94,8 +91,8 @@ private: DECLARE_WRITE_LINE_MEMBER(uart0_irq); DECLARE_WRITE_LINE_MEMBER(uart1_irq); DECLARE_WRITE_LINE_MEMBER(lpt_irq); + DECLARE_WRITE_LINE_MEMBER(vblank_irq); - INTERRUPT_GEN_MEMBER(vblank); void tv990_mem(address_map &map); uint16_t tvi1111_regs[(0x100/2)+2]; @@ -103,11 +100,14 @@ private: int m_rowh, m_width, m_height; }; -INTERRUPT_GEN_MEMBER(tv990_state::vblank) +WRITE_LINE_MEMBER(tv990_state::vblank_irq) { - m_rowtimer->adjust(m_screen->time_until_pos(m_rowh)); - m_maincpu->set_input_line(M68K_IRQ_6, ASSERT_LINE); - tvi1111_regs[0x1d] |= 4; + if (state) + { + m_rowtimer->adjust(m_screen->time_until_pos(m_rowh)); + m_maincpu->set_input_line(M68K_IRQ_6, ASSERT_LINE); + tvi1111_regs[0x1d] |= 4; + } } void tv990_state::machine_start() @@ -320,8 +320,8 @@ void tv990_state::tv990_mem(address_map &map) map(0x060000, 0x06ffff).ram().share("vram"); // character/attribute RAM map(0x080000, 0x087fff).ram().share("fontram"); // font RAM map(0x090000, 0x0900ff).rw(FUNC(tv990_state::tvi1111_r), FUNC(tv990_state::tvi1111_w)); - map(0x0a0000, 0x0a000f).rw(m_uart0, FUNC(ns16450_device::ins8250_r), FUNC(ns16450_device::ins8250_w)).umask16(0x00ff); - map(0x0a0010, 0x0a001f).rw(UART1_TAG, FUNC(ns16450_device::ins8250_r), FUNC(ns16450_device::ins8250_w)).umask16(0x00ff); + map(0x0a0000, 0x0a000f).rw(m_uart[0], FUNC(ns16450_device::ins8250_r), FUNC(ns16450_device::ins8250_w)).umask16(0x00ff); + map(0x0a0010, 0x0a001f).rw(m_uart[1], FUNC(ns16450_device::ins8250_r), FUNC(ns16450_device::ins8250_w)).umask16(0x00ff); map(0x0a0028, 0x0a002d).rw(LPT_TAG, FUNC(pc_lpt_device::read), FUNC(pc_lpt_device::write)).umask16(0x00ff); map(0x0b0000, 0x0b0003).rw(FUNC(tv990_state::kbdc_r), FUNC(tv990_state::kbdc_w)).umask16(0x00ff); map(0x0c0000, 0x0c7fff).ram().share("nvram");// work RAM @@ -374,43 +374,47 @@ void tv990_state::device_post_load() m_screen->set_visible_area(0, m_width * 16 - 1, 0, m_height * m_rowh - 1); } -MACHINE_CONFIG_START(tv990_state::tv990) +void tv990_state::tv990(machine_config &config) +{ /* basic machine hardware */ - MCFG_DEVICE_ADD("maincpu", M68000, 14967500) // verified (59.86992/4) - MCFG_DEVICE_PROGRAM_MAP(tv990_mem) - MCFG_DEVICE_VBLANK_INT_DRIVER("screen", tv990_state, vblank) - - MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::green()) - MCFG_SCREEN_UPDATE_DRIVER(tv990_state, screen_update) - MCFG_SCREEN_SIZE(132*16, 50*16) - MCFG_SCREEN_VISIBLE_AREA(0, (80*16)-1, 0, (50*16)-1) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_PALETTE_ADD_MONOCHROME_HIGHLIGHT("palette") - - NS16450(config, m_uart0, XTAL(3'686'400)); - m_uart0->out_dtr_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_dtr)); - m_uart0->out_rts_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_rts)); - m_uart0->out_tx_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_txd)); - m_uart0->out_int_callback().set(FUNC(tv990_state::uart0_irq)); - - NS16450(config, m_uart1, XTAL(3'686'400)); - m_uart1->out_dtr_callback().set(RS232B_TAG, FUNC(rs232_port_device::write_dtr)); - m_uart1->out_rts_callback().set(RS232B_TAG, FUNC(rs232_port_device::write_rts)); - m_uart1->out_tx_callback().set(RS232B_TAG, FUNC(rs232_port_device::write_txd)); - m_uart1->out_int_callback().set(FUNC(tv990_state::uart1_irq)); - - MCFG_DEVICE_ADD(LPT_TAG, PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE(*this, tv990_state, lpt_irq)) - - MCFG_DEVICE_ADD(RS232A_TAG, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(UART0_TAG, ns16450_device, rx_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(UART0_TAG, ns16450_device, dcd_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(UART0_TAG, ns16450_device, cts_w)) - - MCFG_DEVICE_ADD(RS232B_TAG, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(UART1_TAG, ns16450_device, rx_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(UART1_TAG, ns16450_device, dcd_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(UART1_TAG, ns16450_device, cts_w)) + M68000(config, m_maincpu, 14967500); // verified (59.86992/4) + m_maincpu->set_addrmap(AS_PROGRAM, &tv990_state::tv990_mem); + + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_color(rgb_t::green()); + m_screen->set_screen_update(FUNC(tv990_state::screen_update)); + m_screen->set_size(132*16, 50*16); + m_screen->set_visarea(0, (80*16)-1, 0, (50*16)-1); + m_screen->set_refresh_hz(60); + m_screen->screen_vblank().set(FUNC(tv990_state::vblank_irq)); + + palette_device &palette(PALETTE(config, "palette", 3)); + palette.set_init("palette", FUNC(palette_device::palette_init_monochrome_highlight)); + + NS16450(config, m_uart[0], 3.6864_MHz_XTAL); + m_uart[0]->out_dtr_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_dtr)); + m_uart[0]->out_rts_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_rts)); + m_uart[0]->out_tx_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_txd)); + m_uart[0]->out_int_callback().set(FUNC(tv990_state::uart0_irq)); + + NS16450(config, m_uart[1], 3.6864_MHz_XTAL); + m_uart[1]->out_dtr_callback().set(RS232B_TAG, FUNC(rs232_port_device::write_dtr)); + m_uart[1]->out_rts_callback().set(RS232B_TAG, FUNC(rs232_port_device::write_rts)); + m_uart[1]->out_tx_callback().set(RS232B_TAG, FUNC(rs232_port_device::write_txd)); + m_uart[1]->out_int_callback().set(FUNC(tv990_state::uart1_irq)); + + pc_lpt_device &lpt(PC_LPT(config, LPT_TAG)); + lpt.irq_handler().set(FUNC(tv990_state::lpt_irq)); + + rs232_port_device &rs232a(RS232_PORT(config, RS232A_TAG, default_rs232_devices, nullptr)); + rs232a.rxd_handler().set(m_uart[0], FUNC(ns16450_device::rx_w)); + rs232a.dcd_handler().set(m_uart[0], FUNC(ns16450_device::dcd_w)); + rs232a.cts_handler().set(m_uart[0], FUNC(ns16450_device::cts_w)); + + rs232_port_device &rs232b(RS232_PORT(config, RS232B_TAG, default_rs232_devices, nullptr)); + rs232b.rxd_handler().set(m_uart[1], FUNC(ns16450_device::rx_w)); + rs232b.dcd_handler().set(m_uart[1], FUNC(ns16450_device::dcd_w)); + rs232b.cts_handler().set(m_uart[1], FUNC(ns16450_device::cts_w)); KBDC8042(config, m_kbdc); m_kbdc->set_keyboard_type(kbdc8042_device::KBDC8042_AT386); @@ -419,9 +423,8 @@ MACHINE_CONFIG_START(tv990_state::tv990) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); SPEAKER(config, "mono").front_center(); - MCFG_DEVICE_ADD("beep", BEEP, 1000); //whats the freq? - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) -MACHINE_CONFIG_END + BEEP(config, "beep", 1000).add_route(ALL_OUTPUTS, "mono", 1.0); //whats the freq? +} /* ROM definition */ ROM_START( tv990 ) diff --git a/src/mame/drivers/twinkle.cpp b/src/mame/drivers/twinkle.cpp index 042f08abef0..b656674bda5 100644 --- a/src/mame/drivers/twinkle.cpp +++ b/src/mame/drivers/twinkle.cpp @@ -9,6 +9,8 @@ driver by smf and R. Belmont TODO: dvd check for bmiidx, bmiidxa, bmiidxc & bmiidxca + - 1st style (all variants, including club kit) connected over the mini-din8 (CN7) and dvd check requires RTS->CTS + - substream and above switched to standard serial connection (CN5) The first 128k of RF5C400 bank 0 is uploaded by the 68000, the rest is unused. It may be using 16J & 18J emulate dvd player and video mixing 16seg led font @@ -21,21 +23,26 @@ The following games are known to exist on this hardware (there may be more) Video CD Security Game Title Year Program CD 6/7/8 use DVD Dongle HDD label ----------------------------------------------------------------------------------------------------- -beatmania IIDX (English) 1999 GQ863 A01 GQ863 A04 *863 A02 ? -beatmania IIDX (Japanese) 1999 GQ863-JA B01 GQ863 A04 *863 A02 ? -beatmania IIDX + DDR Club Kit 1999 896 JA ABM *? *? ? -beatmania IIDX + DDR Club Kit(newer) 1999 896 JA BBM *? *? ? -beatmania IIDX Substream 1999 *? GC983 A04 *? ? -beatmania IIDX Club Version 2 1999 GE984 A01(BM) *? *984 A02 ? +beatmania IIDX (English) 1999 GQ863 A01 GQ863 A04 *863 A02 863 HDD A01 +beatmania IIDX (Japanese) 1999 GQ863-JA B01 GQ863 A04 *863 A02 863 HDD A01 +beatmania IIDX + DDR Club Kit 1999 896 JA ABM GQ863 A04 *863 A02 863 HDD A01 + + 896 JA A01 +beatmania IIDX + DDR Club Kit(newer) 1999 896 JA BBM GQ863 A04 *863 A02 863 HDD A01 + + 896 JA A01 +beatmania IIDX Substream 1999 GC983 A01 GC983 A04 *983 A02 983 HDD A01 +beatmania IIDX Substream (Asia) 1999 GC983-AA A01 GC983 A04 *983A A02 983 HDD A01 +beatmania IIDX Club Version 2 1999 GE984 A01(BM) GC983 A04 *984 A02 983 HDD A01 + GE984 A01(DDR) -beatmania IIDX 2nd Style 1999 GC985 A01 GC985 A04 *? *985 HDD A01 -beatmania IIDX 3rd Style 2000 GC992-JA A01 GC992-JA A04 *? *992 HDD A01 -beatmania IIDX 3rd Style(newer) 2000 GC992-JA C01 GC992-JA A04 *? *992 HDD A01 +beatmania IIDX 2nd Style 1999 GC985 A01 GC985 A04 *985 985 HDD A01 +beatmania IIDX 3rd Style 2000 GC992-JA A01 GC992-JA A04 *992 992 HDD A01 +beatmania IIDX 3rd Style(newer) 2000 GC992-JA B01 GC992-JA A04 *992 992 HDD A01 +beatmania IIDX 3rd Style(newest) 2000 GC992-JA C01 GC992-JA A04 *992 992 HDD A01 beatmania IIDX 4th Style 2000 A03 JA A01 A03 JA A02 A03 A03 JA A03 -beatmania IIDX 5th Style 2001 A17 JA A01 A17 JA A02 A17 *A17 JA A03 -beatmania IIDX 6th Style 2001 B4U JA A01 B4U JA A02 *? B4U JA A03 -beatmania IIDX 6th Style(newer) 2001 B4U JA B01 B4U JA A02 *? B4U JA A03 -beatmania IIDX 7th Style 2002 B44 JA A01 B44 JA A02 *? B44 JA A03 +beatmania IIDX 5th Style 2001 A17 JA A01 A17 JA A02 A17 A17 JA A03 +beatmania IIDX 6th Style 2001 B4U JA A01 B4U JA A02 *B4U B4U JA A03 +beatmania IIDX 6th Style(newer) 2001 B4U JA B01 B4U JA A02 *B4U B4U JA A03 +beatmania IIDX 7th Style 2002 B44 JA A01 B44 JA A02 *B44 B44 JA A03 +beatmania IIDX 7th Style(newer) 2002 B44 JA B01 B44 JA A02 *B44 B44 JA A03 beatmania IIDX 8th Style 2002 C44 JA A01 C44 JA A02 *C44 C44 JA A03 * = Not dumped. diff --git a/src/mame/drivers/ultrsprt.cpp b/src/mame/drivers/ultrsprt.cpp index 9ee55da84b6..dff66316263 100644 --- a/src/mame/drivers/ultrsprt.cpp +++ b/src/mame/drivers/ultrsprt.cpp @@ -247,13 +247,13 @@ MACHINE_CONFIG_START(ultrsprt_state::ultrsprt) EEPROM_93C46_16BIT(config, "eeprom"); - MCFG_DEVICE_ADD("upd1", UPD4701A, 0) - MCFG_UPD4701_PORTX("P1X") - MCFG_UPD4701_PORTY("P1Y") + UPD4701A(config, m_upd[0]); + m_upd[0]->set_portx_tag("P1X"); + m_upd[0]->set_porty_tag("P1Y"); - MCFG_DEVICE_ADD("upd2", UPD4701A, 0) - MCFG_UPD4701_PORTX("P2X") - MCFG_UPD4701_PORTY("P2Y") + UPD4701A(config, m_upd[1]); + m_upd[1]->set_portx_tag("P2X"); + m_upd[1]->set_porty_tag("P2Y"); /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) diff --git a/src/mame/drivers/vega.cpp b/src/mame/drivers/vega.cpp index b5206094442..9139b13f7ad 100644 --- a/src/mame/drivers/vega.cpp +++ b/src/mame/drivers/vega.cpp @@ -80,6 +80,7 @@ TODO: #include "machine/i8255.h" #include "machine/ins8154.h" #include "sound/ay8910.h" +#include "video/dp8350.h" #include "emupal.h" #include "screen.h" #include "speaker.h" @@ -110,6 +111,7 @@ public: , m_i8255(*this, "ppi8255") , m_ins8154(*this, "ins8154") , m_ay8910(*this, "ay8910") + , m_crtc(*this, "crtc") , m_gfxdecode(*this, "gfxdecode") , m_palette(*this, "palette") { @@ -124,6 +126,7 @@ private: required_device<i8255_device> m_i8255; required_device<ins8154_device> m_ins8154; required_device<ay8910_device> m_ay8910; + required_device<dp8350_device> m_crtc; required_device<gfxdecode_device> m_gfxdecode; required_device<palette_device> m_palette; @@ -170,7 +173,7 @@ private: virtual void machine_reset() override; DECLARE_PALETTE_INIT(vega); void draw_tilemap(screen_device& screen, bitmap_ind16& bitmap, const rectangle& cliprect); - uint32_t screen_update_vega(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void vega_io_map(address_map &map); void vega_map(address_map &map); }; @@ -393,7 +396,7 @@ WRITE8_MEMBER(vega_state::rombank_w) void vega_state::vega_map(address_map &map) { map(0x000, 0x7ff).bankr("bank1"); - map(0x800, 0xfff).rom(); + map(0x800, 0xfff).rom().region("mb1", 0); } void vega_state::vega_io_map(address_map &map) @@ -529,7 +532,7 @@ void vega_state::draw_tilemap(screen_device& screen, bitmap_ind16& bitmap, const { //for(int x=0;x<4;++x) { - m_gfxdecode->gfx(1)->transpen(bitmap,cliprect, num, 0, 1,flip?1:0, x*4+x0-offset_x, (flip?(3-y):y)*8+y0-offset_y, 0); + m_gfxdecode->gfx(1)->zoom_transpen(bitmap,cliprect, num, 0, 1,flip?1:0, (x*4+x0-offset_x)*2, (flip?(3-y):y)*8+y0-offset_y, 0x20000, 0x10000, 0); ++num; } } @@ -545,7 +548,7 @@ void vega_state::draw_tilemap(screen_device& screen, bitmap_ind16& bitmap, const } -uint32_t vega_state::screen_update_vega(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +uint32_t vega_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { ++m_frame_counter; @@ -578,7 +581,7 @@ uint32_t vega_state::screen_update_vega(screen_device &screen, bitmap_ind16 &bit // if(color==0) color=0xf; - m_gfxdecode->gfx(0)->transpen(bitmap,cliprect, character, color, 0, 0, x*7, y*10,0); + m_gfxdecode->gfx(0)->zoom_transpen(bitmap,cliprect, character, color, 0, 0, x*14, y*10, 0x20000, 0x10000, 0); ++idx; } @@ -599,7 +602,7 @@ uint32_t vega_state::screen_update_vega(screen_device &screen, bitmap_ind16 &bit { //for(int x=0;x<4;++x) { - m_gfxdecode->gfx(2)->transpen(bitmap,cliprect, num, 0, 1, flip?1:0, x*4+x0, (flip?(3-y):y)*8+y0, 0); + m_gfxdecode->gfx(2)->zoom_transpen(bitmap,cliprect, num, 0, 1, flip?1:0, (x*4+x0)*2, (flip?(3-y):y)*8+y0, 0x20000, 0x10000, 0); ++num; } } @@ -639,7 +642,7 @@ uint32_t vega_state::screen_update_vega(screen_device &screen, bitmap_ind16 &bit for(int y=0;y<4;++y) { - m_gfxdecode->gfx(3)->transpen(bitmap,cliprect, strip_num, 0, !xor_line, 0, x*4+x0, y*8+y0, 0); + m_gfxdecode->gfx(3)->zoom_transpen(bitmap,cliprect, strip_num, 0, !xor_line, 0, (x*4+x0)*2, y*8+y0, 0x20000, 0x10000, 0); ++strip_num; } } @@ -806,7 +809,6 @@ MACHINE_CONFIG_START(vega_state::vega) MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(*this, vega_state, p2_w)) MCFG_MCS48_PORT_T1_IN_CB(READLINE(*this, vega_state, t1_r)) MCFG_MCS48_PORT_PROG_OUT_CB(NOOP) /* prog - inputs CLK */ - MCFG_DEVICE_VBLANK_INT_DRIVER("screen", vega_state, irq0_line_hold) I8255A(config, m_i8255); m_i8255->in_pa_callback().set(FUNC(vega_state::txtram_r)); @@ -823,18 +825,18 @@ MACHINE_CONFIG_START(vega_state::vega) m_ins8154->out_b().set(FUNC(vega_state::ins8154_pb_w)); /* video hardware */ - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */) - MCFG_SCREEN_SIZE(512, 256) - MCFG_SCREEN_VISIBLE_AREA(0*8, 280, 0*8, 239) - MCFG_SCREEN_UPDATE_DRIVER(vega_state, screen_update_vega) - MCFG_SCREEN_PALETTE("palette") + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_screen_update(FUNC(vega_state::screen_update)); + screen.set_palette(m_palette); - MCFG_PALETTE_ADD("palette", 0x100) - MCFG_PALETTE_INIT_OWNER(vega_state, vega) + DP8350(config, m_crtc, 10920000); // pins 21/22 connected to XTAL, 3 to GND + m_crtc->set_screen("screen"); + m_crtc->refresh_control(0); + m_crtc->vblank_callback().set_inputline(m_maincpu, MCS48_INPUT_IRQ); // inverse of pin 2? - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_test_decode) + PALETTE(config, m_palette, 0x100).set_init(FUNC(vega_state::palette_init_vega)); + + GFXDECODE(config, "gfxdecode", "palette", gfx_test_decode); /* sound hardware */ @@ -850,9 +852,11 @@ MACHINE_CONFIG_START(vega_state::vega) MACHINE_CONFIG_END ROM_START( vega ) - ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "rom9.bin", 0x0800, 0x0800, CRC(191c73cd) SHA1(17b1c3790f82b276e55d25ea8a38a3c9cf20bf12) ) - ROM_LOAD( "rom10a.bin", 0x1000, 0x1000, CRC(fca9a570) SHA1(598772db11b32518ed6bf5155a19f4f1761a4831) ) + ROM_REGION( 0x01000, "mb0", 0 ) + ROM_LOAD( "rom10a.bin", 0x0000, 0x1000, CRC(fca9a570) SHA1(598772db11b32518ed6bf5155a19f4f1761a4831) ) + + ROM_REGION( 0x00800, "mb1", 0 ) + ROM_LOAD( "rom9.bin", 0x0000, 0x0800, CRC(191c73cd) SHA1(17b1c3790f82b276e55d25ea8a38a3c9cf20bf12) ) ROM_REGION( 0x01000, "gfx1", ROMREGION_INVERT ) ROM_LOAD( "rom8.bin", 0x0000, 0x0800, CRC(ccb8598c) SHA1(8c4a702f0653bb189db7d8ac4c2a06aacecc0de0) ) @@ -885,8 +889,8 @@ ROM_END void vega_state::init_vega() { - uint8_t *ROM = memregion("maincpu")->base(); - membank("bank1")->configure_entries(0, 2, &ROM[0x1000], 0x800); + uint8_t *ROM = memregion("mb0")->base(); + membank("bank1")->configure_entries(0, 2, &ROM[0], 0x800); } GAME( 1982, vega, 0, vega, vega, vega_state, init_vega, ROT270, "Olympia", "Vega", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/drivers/vgmplay.cpp b/src/mame/drivers/vgmplay.cpp index e3ef4814be5..ca168193182 100644 --- a/src/mame/drivers/vgmplay.cpp +++ b/src/mame/drivers/vgmplay.cpp @@ -78,14 +78,61 @@ public: virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; }; +enum vgm_chip +{ + CT_SN76489 = 0, + CT_YM2413, + CT_YM2612, + CT_YM2151, + CT_SEGAPCM, + CT_RF5C68, + CT_YM2203, + CT_YM2608, + CT_YM2610, + CT_YM3812, + CT_YM3526, + CT_Y8950, + CT_YMF262, + CT_YMF278B, + CT_YMF271, + CT_YMZ280B, + CT_RF5C164, + CT_SEGA32X, + CT_AY8910, + CT_GAMEBOY, + CT_NESAPU, + CT_MULTIPCM, + CT_UPD7759, + CT_OKIM6258, + CT_OKIM6295, + CT_K051649, + CT_K054539, + CT_C6280, + CT_C140, + CT_K053260, + CT_POKEY, + CT_QSOUND, + CT_SCSP, + CT_WSWAN, + CT_VSU_VUE, + CT_SAA1099, + CT_ES5503, + CT_ES5505, + CT_X1_010, + CT_C352, + CT_GA20, + + CT_COUNT, +}; + class vgmplay_device : public cpu_device { public: enum io8_t { REG_SIZE = 0xff000000, - A_SN76496_0 = 0x00000000, - A_SN76496_1 = 0x80000000, + A_SN76489_0 = 0x00000000, + A_SN76489_1 = 0x80000000, A_YM2413_0 = 0x01000000, A_YM2413_1 = 0x81000000, A_YM2612_0 = 0x02000000, @@ -190,34 +237,34 @@ public: virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; - template<int Chip> DECLARE_READ8_MEMBER(segapcm_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(ym2608_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(ym2610_adpcm_a_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(ym2610_adpcm_b_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(y8950_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(ymf278b_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(ymf271_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(ymz280b_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(multipcm_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(upd7759_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(okim6295_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(k054539_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(c140_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(k053260_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(qsound_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(es5505_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(x1_010_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(c352_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(ga20_rom_r); - - template<int Chip> DECLARE_WRITE8_MEMBER(multipcm_bank_hi_w); - template<int Chip> DECLARE_WRITE8_MEMBER(multipcm_bank_lo_w); - - template<int Chip> DECLARE_WRITE8_MEMBER(upd7759_bank_w); - - template<int Chip> DECLARE_WRITE8_MEMBER(okim6295_nmk112_enable_w); - template<int Chip> DECLARE_WRITE8_MEMBER(okim6295_bank_w); - template<int Chip> DECLARE_WRITE8_MEMBER(okim6295_nmk112_bank_w); + template<int Index> DECLARE_READ8_MEMBER(segapcm_rom_r); + template<int Index> DECLARE_READ8_MEMBER(ym2608_rom_r); + template<int Index> DECLARE_READ8_MEMBER(ym2610_adpcm_a_rom_r); + template<int Index> DECLARE_READ8_MEMBER(ym2610_adpcm_b_rom_r); + template<int Index> DECLARE_READ8_MEMBER(y8950_rom_r); + template<int Index> DECLARE_READ8_MEMBER(ymf278b_rom_r); + template<int Index> DECLARE_READ8_MEMBER(ymf271_rom_r); + template<int Index> DECLARE_READ8_MEMBER(ymz280b_rom_r); + template<int Index> DECLARE_READ8_MEMBER(multipcm_rom_r); + template<int Index> DECLARE_READ8_MEMBER(upd7759_rom_r); + template<int Index> DECLARE_READ8_MEMBER(okim6295_rom_r); + template<int Index> DECLARE_READ8_MEMBER(k054539_rom_r); + template<int Index> DECLARE_READ8_MEMBER(c140_rom_r); + template<int Index> DECLARE_READ8_MEMBER(k053260_rom_r); + template<int Index> DECLARE_READ8_MEMBER(qsound_rom_r); + template<int Index> DECLARE_READ8_MEMBER(es5505_rom_r); + template<int Index> DECLARE_READ8_MEMBER(x1_010_rom_r); + template<int Index> DECLARE_READ8_MEMBER(c352_rom_r); + template<int Index> DECLARE_READ8_MEMBER(ga20_rom_r); + + template<int Index> DECLARE_WRITE8_MEMBER(multipcm_bank_hi_w); + template<int Index> DECLARE_WRITE8_MEMBER(multipcm_bank_lo_w); + + template<int Index> DECLARE_WRITE8_MEMBER(upd7759_bank_w); + + template<int Index> DECLARE_WRITE8_MEMBER(okim6295_nmk112_enable_w); + template<int Index> DECLARE_WRITE8_MEMBER(okim6295_bank_w); + template<int Index> DECLARE_WRITE8_MEMBER(okim6295_nmk112_bank_w); void stop(); void pause(); @@ -232,56 +279,9 @@ protected: private: enum { ACT_LED_PERSIST_MS = 100 }; - enum act_led - { - LED_SN76496 = 0, - LED_YM2413, - LED_YM2612, - LED_YM2151, - LED_SEGAPCM, - LED_RF5C68, - LED_YM2203, - LED_YM2608, - LED_YM2610, - LED_YM3812, - LED_YM3526, - LED_Y8950, - LED_YMF262, - LED_YMF278B, - LED_YMF271, - LED_YMZ280B, - LED_RF5C164, - LED_32X_PWM, - LED_AY8910, - LED_GAMEBOY, - LED_NESAPU, - LED_MULTIPCM, - LED_UPD7759, - LED_OKIM6258, - LED_OKIM6295, - LED_K051649, - LED_K054539, - LED_C6280, - LED_C140, - LED_K053260, - LED_POKEY, - LED_QSOUND, - LED_SCSP, - LED_WSWAN, - LED_VSU_VUE, - LED_SAA1099, - LED_ES5503, - LED_ES5505, - LED_X1_010, - LED_C352, - LED_GA20, - - LED_COUNT - }; - enum { RESET, RUN, DONE }; - using led_expiry = std::pair<act_led, attotime>; + using led_expiry = std::pair<vgm_chip, attotime>; using led_expiry_list = std::list<led_expiry>; using led_expiry_iterator = led_expiry_list::iterator; @@ -301,7 +301,7 @@ private: uint32_t position; emu_timer *timer; // stream control - act_led chip_type; + vgm_chip chip_type; uint8_t port; uint8_t reg; // stream data @@ -321,15 +321,15 @@ private: stream m_streams[0xff]; - void pulse_act_led(act_led led); + void pulse_act_led(vgm_chip led); TIMER_CALLBACK_MEMBER(act_led_expired); - uint8_t rom_r(int chip, uint8_t type, offs_t offset); + uint8_t rom_r(int index, uint8_t type, offs_t offset); uint32_t handle_data_block(uint32_t address); uint32_t handle_pcm_write(uint32_t address); void blocks_clear(); - output_finder<LED_COUNT> m_act_leds; + output_finder<CT_COUNT> m_act_leds; led_expiry_list m_act_led_expiries; std::unique_ptr<led_expiry_iterator[]> m_act_led_index; led_expiry_iterator m_act_led_off; @@ -405,51 +405,51 @@ public: DECLARE_READ8_MEMBER(file_size_r); DECLARE_INPUT_CHANGED_MEMBER(key_pressed); - template<int Chip> DECLARE_WRITE8_MEMBER(upd7759_reset_w); - template<int Chip> DECLARE_WRITE8_MEMBER(upd7759_data_w); - template<int Chip> DECLARE_WRITE_LINE_MEMBER(upd7759_drq_w); - template<int Chip> DECLARE_WRITE8_MEMBER(okim6258_clock_w); - template<int Chip> DECLARE_WRITE8_MEMBER(okim6258_divider_w); - template<int Chip> DECLARE_WRITE8_MEMBER(okim6295_clock_w); - template<int Chip> DECLARE_WRITE8_MEMBER(okim6295_pin7_w); - template<int Chip> DECLARE_WRITE8_MEMBER(scc_w); + template<int Index> DECLARE_WRITE8_MEMBER(upd7759_reset_w); + template<int Index> DECLARE_WRITE8_MEMBER(upd7759_data_w); + template<int Index> DECLARE_WRITE_LINE_MEMBER(upd7759_drq_w); + template<int Index> DECLARE_WRITE8_MEMBER(okim6258_clock_w); + template<int Index> DECLARE_WRITE8_MEMBER(okim6258_divider_w); + template<int Index> DECLARE_WRITE8_MEMBER(okim6295_clock_w); + template<int Index> DECLARE_WRITE8_MEMBER(okim6295_pin7_w); + template<int Index> DECLARE_WRITE8_MEMBER(scc_w); void vgmplay(machine_config &config); void file_map(address_map &map); void soundchips_map(address_map &map); void soundchips16_map(address_map &map); - template<int Chip> void segapcm_map(address_map &map); - template<int Chip> void rf5c68_map(address_map &map); - template<int Chip> void ym2608_map(address_map &map); - template<int Chip> void ym2610_adpcm_a_map(address_map &map); - template<int Chip> void ym2610_adpcm_b_map(address_map &map); - template<int Chip> void y8950_map(address_map &map); - template<int Chip> void ymf278b_map(address_map &map); - template<int Chip> void ymf271_map(address_map &map); - template<int Chip> void ymz280b_map(address_map &map); - template<int Chip> void rf5c164_map(address_map &map); - template<int Chip> void nescpu_map(address_map &map); - template<int Chip> void multipcm_map(address_map &map); - template<int Chip> void upd7759_map(address_map &map); - template<int Chip> void okim6295_map(address_map &map); - template<int Chip> void k054539_map(address_map &map); - template<int Chip> void c140_map(address_map &map); - template<int Chip> void k053260_map(address_map &map); - template<int Chip> void qsound_map(address_map &map); - template<int Chip> void scsp_map(address_map &map); - template<int Chip> void wswan_map(address_map &map); - template<int Chip> void es5503_map(address_map &map); - template<int Chip> void es5505_map(address_map &map); - template<int Chip> void x1_010_map(address_map &map); - template<int Chip> void c352_map(address_map &map); - template<int Chip> void ga20_map(address_map &map); + template<int Index> void segapcm_map(address_map &map); + template<int Index> void rf5c68_map(address_map &map); + template<int Index> void ym2608_map(address_map &map); + template<int Index> void ym2610_adpcm_a_map(address_map &map); + template<int Index> void ym2610_adpcm_b_map(address_map &map); + template<int Index> void y8950_map(address_map &map); + template<int Index> void ymf278b_map(address_map &map); + template<int Index> void ymf271_map(address_map &map); + template<int Index> void ymz280b_map(address_map &map); + template<int Index> void rf5c164_map(address_map &map); + template<int Index> void nescpu_map(address_map &map); + template<int Index> void multipcm_map(address_map &map); + template<int Index> void upd7759_map(address_map &map); + template<int Index> void okim6295_map(address_map &map); + template<int Index> void k054539_map(address_map &map); + template<int Index> void c140_map(address_map &map); + template<int Index> void k053260_map(address_map &map); + template<int Index> void qsound_map(address_map &map); + template<int Index> void scsp_map(address_map &map); + template<int Index> void wswan_map(address_map &map); + template<int Index> void es5503_map(address_map &map); + template<int Index> void es5505_map(address_map &map); + template<int Index> void x1_010_map(address_map &map); + template<int Index> void c352_map(address_map &map); + template<int Index> void ga20_map(address_map &map); private: std::vector<uint8_t> m_file_data; required_device<vgmplay_device> m_vgmplay; required_device<speaker_device> m_lspeaker; required_device<speaker_device> m_rspeaker; - required_device_array<sn76496_device, 2> m_sn76496; + required_device_array<sn76489_device, 2> m_sn76489; required_device_array<ym2413_device, 2> m_ym2413; required_device_array<ym2612_device, 2> m_ym2612; required_device_array<ym2151_device, 2> m_ym2151; @@ -491,9 +491,7 @@ private: required_device_array<c352_device, 2> m_c352; required_device_array<iremga20_device, 2> m_ga20; - uint32_t m_okim6258_clock[2]; uint8_t m_okim6258_divider[2]; - uint32_t m_okim6295_clock[2]; uint8_t m_okim6295_pin7[2]; uint8_t m_scc_reg[2]; @@ -523,8 +521,8 @@ void vgmplay_device::device_start() m_io16 = &space(AS_IO16); m_act_leds.resolve(); - m_act_led_index = std::make_unique<led_expiry_iterator[]>(LED_COUNT); - for (act_led led = act_led(0); LED_COUNT != led; led = act_led(led + 1)) + m_act_led_index = std::make_unique<led_expiry_iterator[]>(CT_COUNT); + for (vgm_chip led = vgm_chip(0); led != CT_COUNT; led = vgm_chip(led + 1)) m_act_led_index[led] = m_act_led_expiries.emplace(m_act_led_expiries.end(), led, attotime::never); m_act_led_off = m_act_led_expiries.begin(); m_act_led_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(vgmplay_device::act_led_expired), this)); @@ -551,7 +549,7 @@ void vgmplay_device::device_reset() for (int i = 0; i < 0xff; i++) { stream& s(m_streams[i]); - s.chip_type = act_led(0xff); + s.chip_type = vgm_chip(0xff); s.bank = 0xff; s.frequency = 0; s.timer->enable(false); @@ -564,7 +562,7 @@ void vgmplay_device::device_reset() m_c6280_channel[1] = 0; } -void vgmplay_device::pulse_act_led(act_led led) +void vgmplay_device::pulse_act_led(vgm_chip led) { m_act_leds[led] = 1; @@ -871,28 +869,28 @@ TIMER_CALLBACK_MEMBER(vgmplay_device::stream_timer_expired) osd_printf_error("stream_timer_expired %02x: stream beyond end %d/%d %u>=%u\n", param, s.position, s.length, offset, uint32_t(m_data_streams[s.bank].size())); s.timer->enable(false); } - else if (s.chip_type == LED_SN76496) + else if (s.chip_type == CT_SN76489) { - m_io->write_byte(A_SN76496_0, (s.reg & 0xf0) | (m_data_streams[s.bank][offset] & 0xf)); + m_io->write_byte(A_SN76489_0, (s.reg & 0xf0) | (m_data_streams[s.bank][offset] & 0xf)); if ((s.reg & 0x10) == 0) - m_io->write_byte(A_SN76496_0, ((m_data_streams[s.bank][offset + 1] & 3) << 4) | (m_data_streams[s.bank][offset] >> 4)); + m_io->write_byte(A_SN76489_0, ((m_data_streams[s.bank][offset + 1] & 3) << 4) | (m_data_streams[s.bank][offset] >> 4)); } - else if (s.chip_type == LED_YM2612) + else if (s.chip_type == CT_YM2612) { m_io->write_byte(A_YM2612_0 + 0 + ((s.port & 1) << 1), s.reg); m_io->write_byte(A_YM2612_0 + 1 + ((s.port & 1) << 1), m_data_streams[s.bank][offset]); } - else if (s.chip_type == LED_YM2203) + else if (s.chip_type == CT_YM2203) { m_io->write_byte(A_YM2203_0 + 0 + ((s.port & 1) << 1), s.reg); m_io->write_byte(A_YM2203_0 + 1 + ((s.port & 1) << 1), m_data_streams[s.bank][offset]); } - else if (s.chip_type == LED_YM2608) + else if (s.chip_type == CT_YM2608) { m_io->write_byte(A_YM2608_0 + 0 + ((s.port & 1) << 1), s.reg); m_io->write_byte(A_YM2608_0 + 1 + ((s.port & 1) << 1), m_data_streams[s.bank][offset]); } - else if (s.chip_type == LED_32X_PWM) + else if (s.chip_type == CT_SEGA32X) { if (m_sega32x_channel_hack >= 0) { @@ -904,7 +902,7 @@ TIMER_CALLBACK_MEMBER(vgmplay_device::stream_timer_expired) m_io16->write_word(A_32X_PWM + (s.reg << 1), ((m_data_streams[s.bank][offset + 1] & 0xf) << 8) | m_data_streams[s.bank][offset]); } - else if (s.chip_type == LED_C6280) + else if (s.chip_type == CT_C6280) { if (s.port != 0xff) m_io->write_byte(A_C6280_0 + (s.reg >> 4), s.port); @@ -914,7 +912,7 @@ TIMER_CALLBACK_MEMBER(vgmplay_device::stream_timer_expired) if (s.port != 0xff && s.port != m_c6280_channel[0]) m_io->write_byte(A_C6280_0 + (s.reg >> 4), m_c6280_channel[0]); } - else if (s.chip_type == LED_OKIM6258) + else if (s.chip_type == CT_OKIM6258) m_io->write_byte(A_OKIM6258_0 + s.reg, m_data_streams[s.bank][offset]); else { @@ -988,31 +986,31 @@ void vgmplay_device::execute_run() switch (code) { case 0x30: - pulse_act_led(LED_SN76496); - m_io->write_byte(A_SN76496_1 + 0, m_file->read_byte(m_pc + 1)); + pulse_act_led(CT_SN76489); + m_io->write_byte(A_SN76489_1 + 0, m_file->read_byte(m_pc + 1)); m_pc += 2; break; case 0x3f: - pulse_act_led(LED_SN76496); - m_io->write_byte(A_SN76496_1 + 1, m_file->read_byte(m_pc + 1)); + pulse_act_led(CT_SN76489); + m_io->write_byte(A_SN76489_1 + 1, m_file->read_byte(m_pc + 1)); m_pc += 2; break; case 0x4f: - pulse_act_led(LED_SN76496); - m_io->write_byte(A_SN76496_0 + 1, m_file->read_byte(m_pc + 1)); + pulse_act_led(CT_SN76489); + m_io->write_byte(A_SN76489_0 + 1, m_file->read_byte(m_pc + 1)); m_pc += 2; break; case 0x50: - pulse_act_led(LED_SN76496); - m_io->write_byte(A_SN76496_0 + 0, m_file->read_byte(m_pc + 1)); + pulse_act_led(CT_SN76489); + m_io->write_byte(A_SN76489_0 + 0, m_file->read_byte(m_pc + 1)); m_pc += 2; break; case 0x51: - pulse_act_led(LED_YM2413); + pulse_act_led(CT_YM2413); m_io->write_byte(A_YM2413_0 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2413_0 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -1020,21 +1018,21 @@ void vgmplay_device::execute_run() case 0x52: case 0x53: - pulse_act_led(LED_YM2612); + pulse_act_led(CT_YM2612); m_io->write_byte(A_YM2612_0 + 0 + ((code & 1) << 1), m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2612_0 + 1 + ((code & 1) << 1), m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0x54: - pulse_act_led(LED_YM2151); + pulse_act_led(CT_YM2151); m_io->write_byte(A_YM2151_0 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2151_0 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0x55: - pulse_act_led(LED_YM2203); + pulse_act_led(CT_YM2203); m_io->write_byte(A_YM2203_0 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2203_0 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -1042,7 +1040,7 @@ void vgmplay_device::execute_run() case 0x56: case 0x57: - pulse_act_led(LED_YM2608); + pulse_act_led(CT_YM2608); m_io->write_byte(A_YM2608_0 + 0 + ((code & 1) << 1), m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2608_0 + 1 + ((code & 1) << 1), m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -1050,35 +1048,35 @@ void vgmplay_device::execute_run() case 0x58: case 0x59: - pulse_act_led(LED_YM2610); + pulse_act_led(CT_YM2610); m_io->write_byte(A_YM2610_0 + 0 + ((code & 1) << 1), m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2610_0 + 1 + ((code & 1) << 1), m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0x5a: - pulse_act_led(LED_YM3812); + pulse_act_led(CT_YM3812); m_io->write_byte(A_YM3812_0 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM3812_0 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0x5b: - pulse_act_led(LED_YM3526); + pulse_act_led(CT_YM3526); m_io->write_byte(A_YM3526_0 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM3526_0 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0x5c: - pulse_act_led(LED_Y8950); + pulse_act_led(CT_Y8950); m_io->write_byte(A_Y8950_0 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_Y8950_0 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0x5d: - pulse_act_led(LED_YMZ280B); + pulse_act_led(CT_YMZ280B); m_io->write_byte(A_YMZ280B_0 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YMZ280B_0 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -1086,7 +1084,7 @@ void vgmplay_device::execute_run() case 0x5e: case 0x5f: - pulse_act_led(LED_YMF262); + pulse_act_led(CT_YMF262); m_io->write_byte(A_YMF262_0 + 0 + ((code & 1) << 1), m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YMF262_0 + 1 + ((code & 1) << 1), m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -1145,7 +1143,7 @@ void vgmplay_device::execute_run() case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87: case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f: - pulse_act_led(LED_YM2612); + pulse_act_led(CT_YM2612); if (!m_data_streams[0].empty()) { if (m_ym2612_stream_offset >= int(m_data_streams[0].size())) @@ -1168,11 +1166,11 @@ void vgmplay_device::execute_run() { stream& s(m_streams[id]); - s.chip_type = act_led(m_file->read_byte(m_pc + 2)); + s.chip_type = vgm_chip(m_file->read_byte(m_pc + 2)); s.port = m_file->read_byte(m_pc + 3); s.reg = m_file->read_byte(m_pc + 4); - s.byte_depth = ((s.chip_type == LED_SN76496 && (s.reg & 0x10) == 0) || s.chip_type == LED_32X_PWM) ? 2 : 1; + s.byte_depth = ((s.chip_type == CT_SN76489 && (s.reg & 0x10) == 0) || s.chip_type == CT_SEGA32X) ? 2 : 1; if (s.timer->enabled()) { @@ -1245,7 +1243,7 @@ void vgmplay_device::execute_run() uint8_t id = m_file->read_byte(m_pc + 1); if (id == 0xff) osd_printf_error("stream start invalid id\n"); - else if (m_streams[id].chip_type >= LED_COUNT) + else if (m_streams[id].chip_type >= CT_COUNT) osd_printf_error("stream start %02x invalid chip type %02x\n", id, m_streams[id].chip_type); else { @@ -1310,7 +1308,7 @@ void vgmplay_device::execute_run() uint8_t id = m_file->read_byte(m_pc + 1); if (id == 0xff) osd_printf_error("stream start short invalid id\n"); - else if (m_streams[id].chip_type >= LED_COUNT) + else if (m_streams[id].chip_type >= CT_COUNT) osd_printf_error("stream start short %02x invalid chip type %02x\n", id, m_streams[id].chip_type); else { @@ -1344,7 +1342,7 @@ void vgmplay_device::execute_run() case 0xa0: { - pulse_act_led(LED_AY8910); + pulse_act_led(CT_AY8910); uint8_t reg = m_file->read_byte(m_pc + 1); if (reg & 0x80) { @@ -1361,7 +1359,7 @@ void vgmplay_device::execute_run() } case 0xa1: - pulse_act_led(LED_YM2413); + pulse_act_led(CT_YM2413); m_io->write_byte(A_YM2413_1 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2413_1 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -1369,21 +1367,21 @@ void vgmplay_device::execute_run() case 0xa2: case 0xa3: - pulse_act_led(LED_YM2612); + pulse_act_led(CT_YM2612); m_io->write_byte(A_YM2612_1 + 0 + ((code & 1) << 1), m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2612_1 + 1 + ((code & 1) << 1), m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xa4: - pulse_act_led(LED_YM2151); + pulse_act_led(CT_YM2151); m_io->write_byte(A_YM2151_1 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2151_1 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xa5: - pulse_act_led(LED_YM2203); + pulse_act_led(CT_YM2203); m_io->write_byte(A_YM2203_1 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2203_1 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -1391,7 +1389,7 @@ void vgmplay_device::execute_run() case 0xa6: case 0xa7: - pulse_act_led(LED_YM2608); + pulse_act_led(CT_YM2608); m_io->write_byte(A_YM2608_0 + 0 + ((code & 1) << 1), m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2608_0 + 1 + ((code & 1) << 1), m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -1399,35 +1397,35 @@ void vgmplay_device::execute_run() case 0xa8: case 0xa9: - pulse_act_led(LED_YM2610); + pulse_act_led(CT_YM2610); m_io->write_byte(A_YM2610_0 + 0 + ((code & 1) << 1), m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2610_0 + 1 + ((code & 1) << 1), m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xaa: - pulse_act_led(LED_YM3812); + pulse_act_led(CT_YM3812); m_io->write_byte(A_YM3812_1 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM3812_1 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xab: - pulse_act_led(LED_YM3526); + pulse_act_led(CT_YM3526); m_io->write_byte(A_YM3526_1 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM3526_1 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xac: - pulse_act_led(LED_Y8950); + pulse_act_led(CT_Y8950); m_io->write_byte(A_Y8950_1 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_Y8950_1 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xad: - pulse_act_led(LED_YMZ280B); + pulse_act_led(CT_YMZ280B); m_io->write_byte(A_YMZ280B_1 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YMZ280B_1 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -1435,27 +1433,27 @@ void vgmplay_device::execute_run() case 0xae: case 0xaf: - pulse_act_led(LED_YMF262); + pulse_act_led(CT_YMF262); m_io->write_byte(A_YMF262_1 + 0 + ((code & 1) << 1), m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YMF262_1 + 1 + ((code & 1) << 1), m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xb0: - pulse_act_led(LED_RF5C68); + pulse_act_led(CT_RF5C68); m_io->write_byte(A_RF5C68 + m_file->read_byte(m_pc + 1), m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xb1: - pulse_act_led(LED_RF5C164); + pulse_act_led(CT_RF5C164); m_io->write_byte(A_RF5C164 + m_file->read_byte(m_pc + 1), m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xb2: { - pulse_act_led(LED_32X_PWM); + pulse_act_led(CT_SEGA32X); uint8_t offset = m_file->read_byte(m_pc + 1); uint8_t data = m_file->read_byte(m_pc + 2); @@ -1486,7 +1484,7 @@ void vgmplay_device::execute_run() case 0xb3: { - pulse_act_led(LED_GAMEBOY); + pulse_act_led(CT_GAMEBOY); uint8_t reg = m_file->read_byte(m_pc + 1); if (reg & 0x80) m_io->write_byte(A_GAMEBOY_1 + (reg & 0x7f), m_file->read_byte(m_pc + 2)); @@ -1498,36 +1496,36 @@ void vgmplay_device::execute_run() case 0xb4: { - pulse_act_led(LED_NESAPU); + pulse_act_led(CT_NESAPU); uint8_t offset = m_file->read_byte(m_pc + 1); - int chip = offset & 0x80 ? 1 : 0; - if (m_nes_apu_channel_hack[chip] >= 0) + int index = offset & 0x80 ? 1 : 0; + if (m_nes_apu_channel_hack[index] >= 0) { if ((offset & 0x7f) == 0x15) { if ((m_file->read_byte(m_pc + 2) & 0x1f) != 0) - m_nes_apu_channel_hack[chip] = -1; + m_nes_apu_channel_hack[index] = -1; } else { - m_nes_apu_channel_hack[chip]++; - if (m_nes_apu_channel_hack[chip] == 32) + m_nes_apu_channel_hack[index]++; + if (m_nes_apu_channel_hack[index] == 32) { - osd_printf_error("bad rip detected, enabling nesapu.%d channels\n", chip); - if (chip) + osd_printf_error("bad rip detected, enabling nesapu.%d channels\n", index); + if (index) m_io->write_byte(A_NESAPU_1 + 0x15, 0x0f); else m_io->write_byte(A_NESAPU_0 + 0x15, 0x0f); - m_nes_apu_channel_hack[chip] = -2; + m_nes_apu_channel_hack[index] = -2; } } } - //else if ((offset & 0x7f) == 0x15 && m_nes_apu_channel_hack[chip] == -2 && (m_file->read_byte(m_pc + 2) & 0x1f) != 0) + //else if ((offset & 0x7f) == 0x15 && m_nes_apu_channel_hack[index] == -2 && (m_file->read_byte(m_pc + 2) & 0x1f) != 0) //{ - // osd_printf_error("bad rip false positive, late enabling nesapu.%d channels %x/%x\n", chip, m_pc, m_io->read_dword(REG_SIZE)); - // m_nes_apu_channel_hack[chip] = -1; + // osd_printf_error("bad rip false positive, late enabling nesapu.%d channels %x/%x\n", index, m_pc, m_io->read_dword(REG_SIZE)); + // m_nes_apu_channel_hack[index] = -1; //} if (offset & 0x80) @@ -1540,7 +1538,7 @@ void vgmplay_device::execute_run() case 0xb5: { - pulse_act_led(LED_MULTIPCM); + pulse_act_led(CT_MULTIPCM); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_MULTIPCM_1 + (offset & 0x7f), m_file->read_byte(m_pc + 2)); @@ -1552,7 +1550,7 @@ void vgmplay_device::execute_run() case 0xb6: { - pulse_act_led(LED_UPD7759); + pulse_act_led(CT_UPD7759); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_UPD7759_1 + (offset & 0x7f), m_file->read_byte(m_pc + 2)); @@ -1564,7 +1562,7 @@ void vgmplay_device::execute_run() case 0xb7: { - pulse_act_led(LED_OKIM6258); + pulse_act_led(CT_OKIM6258); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_OKIM6258_1 + (offset & 0x7f), m_file->read_byte(m_pc + 2)); @@ -1576,7 +1574,7 @@ void vgmplay_device::execute_run() case 0xb8: { - pulse_act_led(LED_OKIM6295); + pulse_act_led(CT_OKIM6295); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_OKIM6295_1 + (offset & 0x7f), m_file->read_byte(m_pc + 2)); @@ -1588,7 +1586,7 @@ void vgmplay_device::execute_run() case 0xb9: { - pulse_act_led(LED_C6280); + pulse_act_led(CT_C6280); uint8_t offset = m_file->read_byte(m_pc + 1); if ((offset & 0x7f) == 0) m_c6280_channel[BIT(offset, 7)] = m_file->read_byte(m_pc + 2); @@ -1602,7 +1600,7 @@ void vgmplay_device::execute_run() case 0xba: { - pulse_act_led(LED_K053260); + pulse_act_led(CT_K053260); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_K053260_1 + (offset & 0x7f), m_file->read_byte(m_pc + 2)); @@ -1614,7 +1612,7 @@ void vgmplay_device::execute_run() case 0xbb: { - pulse_act_led(LED_POKEY); + pulse_act_led(CT_POKEY); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_POKEY_1 + (offset & 0x7f), m_file->read_byte(m_pc + 2)); @@ -1626,7 +1624,7 @@ void vgmplay_device::execute_run() case 0xbc: { - pulse_act_led(LED_WSWAN); + pulse_act_led(CT_WSWAN); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_WSWAN_1 + (offset & 0x7f) + 0x80, m_file->read_byte(m_pc + 2)); @@ -1638,7 +1636,7 @@ void vgmplay_device::execute_run() case 0xbd: { - pulse_act_led(LED_SAA1099); + pulse_act_led(CT_SAA1099); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) { @@ -1656,7 +1654,7 @@ void vgmplay_device::execute_run() case 0xbe: { - pulse_act_led(LED_ES5505); + pulse_act_led(CT_ES5505); // TODO: es5505 m_pc += 3; break; @@ -1664,7 +1662,7 @@ void vgmplay_device::execute_run() case 0xbf: { - pulse_act_led(LED_GA20); + pulse_act_led(CT_GA20); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_GA20_1 + (offset & 0x7f), m_file->read_byte(m_pc + 2)); @@ -1676,7 +1674,7 @@ void vgmplay_device::execute_run() case 0xc0: { - pulse_act_led(LED_SEGAPCM); + pulse_act_led(CT_SEGAPCM); uint16_t offset = m_file->read_word(m_pc + 1); if (offset & 0x8000) m_io->write_byte(A_SEGAPCM_1 + (offset & 0x7fff), m_file->read_byte(m_pc + 3)); @@ -1687,20 +1685,20 @@ void vgmplay_device::execute_run() } case 0xc1: - pulse_act_led(LED_RF5C68); + pulse_act_led(CT_RF5C68); m_io->write_byte(A_RF5C68_RAM + m_file->read_word(m_pc + 1), m_file->read_byte(m_pc + 3)); m_pc += 4; break; case 0xc2: - pulse_act_led(LED_RF5C164); + pulse_act_led(CT_RF5C164); m_io->write_byte(A_RF5C164_RAM + m_file->read_word(m_pc + 1), m_file->read_byte(m_pc + 3)); m_pc += 4; break; case 0xc3: { - pulse_act_led(LED_MULTIPCM); + pulse_act_led(CT_MULTIPCM); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) { @@ -1717,7 +1715,7 @@ void vgmplay_device::execute_run() } case 0xc4: - pulse_act_led(LED_QSOUND); + pulse_act_led(CT_QSOUND); m_io->write_byte(A_QSOUND + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_QSOUND + 1, m_file->read_byte(m_pc + 2)); m_io->write_byte(A_QSOUND + 2, m_file->read_byte(m_pc + 3)); @@ -1726,7 +1724,7 @@ void vgmplay_device::execute_run() case 0xc5: { - pulse_act_led(LED_SCSP); + pulse_act_led(CT_SCSP); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io16->write_byte(A_SCSP_1 + ((offset & 0x7f) << 8) + (m_file->read_byte(m_pc + 2) ^ 1), m_file->read_byte(m_pc + 3)); @@ -1738,7 +1736,7 @@ void vgmplay_device::execute_run() case 0xc6: { - pulse_act_led(LED_WSWAN); + pulse_act_led(CT_WSWAN); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_WSWAN_RAM_1 + ((offset & 0x7f) << 8) + m_file->read_byte(m_pc + 2), m_file->read_byte(m_pc + 3)); @@ -1750,7 +1748,7 @@ void vgmplay_device::execute_run() case 0xc7: { - pulse_act_led(LED_VSU_VUE); + pulse_act_led(CT_VSU_VUE); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_VSU_VUE_1 + ((offset & 0x7f) << 10) + (m_file->read_byte(m_pc + 2) << 2), m_file->read_byte(m_pc + 3)); @@ -1762,7 +1760,7 @@ void vgmplay_device::execute_run() case 0xc8: { - pulse_act_led(LED_X1_010); + pulse_act_led(CT_X1_010); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_X1_010_1 + ((offset & 0x7f) << 8) + m_file->read_byte(m_pc + 2), m_file->read_byte(m_pc + 3)); @@ -1774,7 +1772,7 @@ void vgmplay_device::execute_run() case 0xd0: { - pulse_act_led(LED_YMF278B); + pulse_act_led(CT_YMF278B); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) { @@ -1792,7 +1790,7 @@ void vgmplay_device::execute_run() case 0xd1: { - pulse_act_led(LED_YMF271); + pulse_act_led(CT_YMF271); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) { @@ -1810,7 +1808,7 @@ void vgmplay_device::execute_run() case 0xd2: { - pulse_act_led(LED_K051649); + pulse_act_led(CT_K051649); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) { @@ -1828,7 +1826,7 @@ void vgmplay_device::execute_run() case 0xd3: { - pulse_act_led(LED_K054539); + pulse_act_led(CT_K054539); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_K054539_1 + ((offset & 0x7f) << 8) + m_file->read_byte(m_pc + 2), m_file->read_byte(m_pc + 3)); @@ -1840,7 +1838,7 @@ void vgmplay_device::execute_run() case 0xd4: { - pulse_act_led(LED_C140); + pulse_act_led(CT_C140); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_C140_1 + ((offset & 0x7f) << 8) + m_file->read_byte(m_pc + 2), m_file->read_byte(m_pc + 3)); @@ -1852,7 +1850,7 @@ void vgmplay_device::execute_run() case 0xd5: { - pulse_act_led(LED_ES5503); + pulse_act_led(CT_ES5503); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_ES5503_1 + ((offset & 0x7f) << 8) + m_file->read_byte(m_pc + 2), m_file->read_byte(m_pc + 3)); @@ -1864,21 +1862,21 @@ void vgmplay_device::execute_run() case 0xd6: { - pulse_act_led(LED_ES5505); + pulse_act_led(CT_ES5505); // TODO: es5505 m_pc += 4; break; } case 0xe0: - pulse_act_led(LED_YM2612); + pulse_act_led(CT_YM2612); m_ym2612_stream_offset = m_file->read_dword(m_pc + 1); m_pc += 5; break; case 0xe1: { - pulse_act_led(LED_C352); + pulse_act_led(CT_C352); uint8_t offset = m_file->read_byte(m_pc + 1); uint32_t addr = ((offset & 0x7f) << 8) + m_file->read_byte(m_pc + 2); uint16_t data = (m_file->read_byte(m_pc + 3) << 8) + m_file->read_byte(m_pc + 4); @@ -2384,9 +2382,9 @@ offs_t vgmplay_disassembler::disassemble(std::ostream &stream, offs_t pc, const } } -uint8_t vgmplay_device::rom_r(int chip, uint8_t type, offs_t offset) +uint8_t vgmplay_device::rom_r(int index, uint8_t type, offs_t offset) { - for (const auto &b : m_rom_blocks[chip][type - 0x80]) + for (const auto &b : m_rom_blocks[index][type - 0x80]) { if (offset >= b.start_address && offset <= b.end_address) { @@ -2396,155 +2394,155 @@ uint8_t vgmplay_device::rom_r(int chip, uint8_t type, offs_t offset) return 0; } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::segapcm_rom_r) { - return rom_r(Chip, 0x80, offset); + return rom_r(Index, 0x80, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::ym2608_rom_r) { - return rom_r(Chip, 0x81, offset); + return rom_r(Index, 0x81, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::ym2610_adpcm_a_rom_r) { - return rom_r(Chip, 0x82, offset); + return rom_r(Index, 0x82, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::ym2610_adpcm_b_rom_r) { - return rom_r(Chip, 0x83, offset); + return rom_r(Index, 0x83, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::ymf278b_rom_r) { - return rom_r(Chip, 0x84, offset); + return rom_r(Index, 0x84, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::ymf271_rom_r) { - return rom_r(Chip, 0x85, offset); + return rom_r(Index, 0x85, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::ymz280b_rom_r) { - return rom_r(Chip, 0x86, offset); + return rom_r(Index, 0x86, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::y8950_rom_r) { - return rom_r(Chip, 0x88, offset); + return rom_r(Index, 0x88, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::multipcm_rom_r) { - if (m_multipcm_banked[Chip] == 1) + if (m_multipcm_banked[Index] == 1) { offset &= 0x1fffff; if (offset & 0x100000) { - if (m_multipcm_bank_l[Chip] == m_multipcm_bank_r[Chip]) + if (m_multipcm_bank_l[Index] == m_multipcm_bank_r[Index]) { - offset = ((m_multipcm_bank_r[Chip] & ~0xf) << 16) | (offset & 0xfffff); + offset = ((m_multipcm_bank_r[Index] & ~0xf) << 16) | (offset & 0xfffff); } else { if (offset & 0x80000) { - offset = ((m_multipcm_bank_l[Chip] & ~0x7) << 16) | (offset & 0x7ffff); + offset = ((m_multipcm_bank_l[Index] & ~0x7) << 16) | (offset & 0x7ffff); } else { - offset = ((m_multipcm_bank_r[Chip] & ~0x7) << 16) | (offset & 0x7ffff); + offset = ((m_multipcm_bank_r[Index] & ~0x7) << 16) | (offset & 0x7ffff); } } } } - return rom_r(Chip, 0x89, offset); + return rom_r(Index, 0x89, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::upd7759_rom_r) { - return rom_r(Chip, 0x8a, m_upd7759_bank[Chip] | offset); + return rom_r(Index, 0x8a, m_upd7759_bank[Index] | offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::okim6295_rom_r) { - if (m_okim6295_nmk112_enable[Chip]) + if (m_okim6295_nmk112_enable[Index]) { - if ((offset < 0x400) && (m_okim6295_nmk112_enable[Chip] & 0x80)) + if ((offset < 0x400) && (m_okim6295_nmk112_enable[Index] & 0x80)) { - offset = (m_okim6295_nmk112_bank[Chip][(offset >> 8) & 0x3] << 16) | (offset & 0x3ff); + offset = (m_okim6295_nmk112_bank[Index][(offset >> 8) & 0x3] << 16) | (offset & 0x3ff); } else { - offset = (m_okim6295_nmk112_bank[Chip][(offset >> 16) & 0x3] << 16) | (offset & 0xffff); + offset = (m_okim6295_nmk112_bank[Index][(offset >> 16) & 0x3] << 16) | (offset & 0xffff); } } else { - offset = (m_okim6295_bank[Chip] * 0x40000) | offset; + offset = (m_okim6295_bank[Index] * 0x40000) | offset; } - return rom_r(Chip, 0x8b, offset); + return rom_r(Index, 0x8b, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::k054539_rom_r) { - return rom_r(Chip, 0x8c, offset); + return rom_r(Index, 0x8c, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::c140_rom_r) { - return rom_r(Chip, 0x8d, offset); + return rom_r(Index, 0x8d, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::k053260_rom_r) { - return rom_r(Chip, 0x8e, offset); + return rom_r(Index, 0x8e, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::qsound_rom_r) { - return rom_r(Chip, 0x8f, offset); + return rom_r(Index, 0x8f, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::es5505_rom_r) { - return rom_r(Chip, 0x90, offset); + return rom_r(Index, 0x90, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::x1_010_rom_r) { - return rom_r(Chip, 0x91, offset); + return rom_r(Index, 0x91, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::c352_rom_r) { - return rom_r(Chip, 0x92, offset); + return rom_r(Index, 0x92, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::ga20_rom_r) { - return rom_r(Chip, 0x93, offset); + return rom_r(Index, 0x93, offset); } vgmplay_state::vgmplay_state(const machine_config &mconfig, device_type type, const char *tag) @@ -2552,7 +2550,7 @@ vgmplay_state::vgmplay_state(const machine_config &mconfig, device_type type, co , m_vgmplay(*this, "vgmplay") , m_lspeaker(*this, "lspeaker") , m_rspeaker(*this, "rspeaker") - , m_sn76496(*this, "sn76496.%d", 0) + , m_sn76489(*this, "sn76489.%d", 0) , m_ym2413(*this, "ym2413.%d", 0) , m_ym2612(*this, "ym2612.%d", 0) , m_ym2151(*this, "ym2151.%d", 0) @@ -2710,68 +2708,92 @@ QUICKLOAD_LOAD_MEMBER(vgmplay_state, load_file) uint32_t extra_header_start = version >= 0x170 && data_start >= 0xc0 && r32(0xbc) ? r32(0xbc) + 0xbc : 0; uint32_t header_size = extra_header_start ? extra_header_start : data_start; - // Parse clocks - m_sn76496[0]->set_unscaled_clock(r32(0x0c) & ~0xc0000000); - m_sn76496[1]->set_unscaled_clock((r32(0x0c) & 0x40000000) ? r32(0x0c) & ~0xc0000000 : 0); + uint32_t extra_header_size = extra_header_start ? r32(extra_header_start) : 0; + uint32_t chip_clock_start = extra_header_size >= 4 && r32(extra_header_start + 4) ? r32(extra_header_start + 4) + extra_header_start + 4: 0; + uint32_t chip_volume_start = extra_header_size >= 8 && r32(extra_header_start + 8) ? r32(extra_header_start + 8) + extra_header_start + 8 : 0; - if (r32(0x0c) & 0x80000000) - logerror("Warning: file requests an unsupported T6W28"); + if (chip_volume_start != 0) + osd_printf_warning("Warning: file has unsupported chip volumes\n"); - m_ym2413[0]->set_unscaled_clock(r32(0x10) & ~0xc0000000); - m_ym2413[1]->set_unscaled_clock((r32(0x10) & 0x40000000) ? r32(0x10) & ~0xc0000000 : 0); - if (version >= 0x110 && (r32(0x2c) & 0x80000000)) - logerror("Warning: file requests an unsupported VRC7\n"); + const auto&& setup_device([&](device_t &device, int chip_num, vgm_chip chip_type, uint32_t offset, uint32_t min_version = 0) + { + uint32_t c = 0; - m_ym2612[0]->set_unscaled_clock((version >= 0x110 ? r32(0x2c) : r32(0x10)) & ~0xc0000000); - m_ym2612[1]->set_unscaled_clock(((version >= 0x110 ? r32(0x2c) : r32(0x10)) & 0x40000000) ? (version >= 0x110 ? r32(0x2c) : r32(0x10)) & ~0xc0000000 : 0); - if (version >= 0x110 && (r32(0x2c) & 0x80000000)) - logerror("Warning: file requests an unsupported YM3438\n"); + if (min_version <= version && offset + 4 <= header_size && (chip_num == 0 || (r32(offset) & 0x40000000) != 0)) + { + c = r32(offset); + + if (chip_clock_start && chip_num != 0) + for (auto i(0); i < r8(chip_clock_start); i++) + { + if (r8(chip_clock_start + 1 + (i * 5)) == chip_type) + { + c = r32(chip_clock_start + 2 + (i * 5)); + break; + } + } + } + + device.set_unscaled_clock(c & ~0xc0000000); + + return (c & 0x80000000) != 0; + }); + + // Parse clocks + if (setup_device(*m_sn76489[0], 0, CT_SN76489, 0x0c) || + setup_device(*m_sn76489[1], 1, CT_SN76489, 0x0c)) + osd_printf_warning("Warning: file requests an unsupported T6W28\n"); - m_ym2151[0]->set_unscaled_clock((version >= 0x110 ? r32(0x30) : r32(0x10)) & ~0x40000000); - m_ym2151[1]->set_unscaled_clock(((version >= 0x110 ? r32(0x30) : r32(0x10)) & 0x40000000) ? (version >= 0x110 ? r32(0x30) : r32(0x10)) & ~0x40000000 : 0); + if (setup_device(*m_ym2413[0], 0, CT_YM2413, 0x10) || + setup_device(*m_ym2413[1], 1, CT_YM2413, 0x10)) + osd_printf_warning("Warning: file requests an unsupported VRC7\n"); - m_segapcm[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x3c ? r32(0x38) & ~0x40000000 : 0); - m_segapcm[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x3c && (r32(0x38) & 0x40000000) ? r32(0x38) & ~0x40000000 : 0); + if (setup_device(*m_ym2612[0], 0, CT_YM2612, version < 110 ? 0x10 : 0x2c) || + setup_device(*m_ym2612[1], 1, CT_YM2612, version < 110 ? 0x10 : 0x2c)) + osd_printf_warning("Warning: file requests an unsupported YM3438\n"); + + setup_device(*m_ym2151[0], 0, CT_YM2151, version < 110 ? 0x10 : 0x30); + setup_device(*m_ym2151[1], 1, CT_YM2151, version < 110 ? 0x10 : 0x30); + + setup_device(*m_segapcm[0], 0, CT_SEGAPCM, 0x38, 0x151); + setup_device(*m_segapcm[1], 1, CT_SEGAPCM, 0x38, 0x151); m_segapcm[0]->set_bank(version >= 0x151 && header_size >= 0x40 ? r32(0x3c) : 0); m_segapcm[1]->set_bank(version >= 0x151 && header_size >= 0x40 ? r32(0x3c) : 0); - m_rf5c68->set_unscaled_clock(version >= 0x151 && header_size >= 0x44 ? r32(0x40) : 0); - m_ym2203[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x48 ? r32(0x44) & ~0x40000000 : 0); - m_ym2203[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x48 && (r32(0x44) & 0x40000000) ? r32(0x44) & ~0x40000000 : 0); - m_ym2608[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x4c ? r32(0x48) & ~0x40000000 : 0); - m_ym2608[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x4c && (r32(0x48) & 0x40000000) ? r32(0x48) & ~0x40000000 : 0); - - m_ym2610[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x50 ? r32(0x4c) & ~0xc0000000 : 0); - m_ym2610[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x50 && (r32(0x4c) & 0x40000000) ? r32(0x4c) & ~0xc0000000 : 0); - if (version >= 0x151 && header_size >= 0x50 && (r32(0x4c) & 0x80000000)) - logerror("Warning: file requests an unsupported YM2610B\n"); - - m_ym3812[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x54 ? r32(0x50) & ~0xc0000000 : 0); - m_ym3812[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x54 && (r32(0x50) & 0x40000000) ? r32(0x50) & ~0xc0000000 : 0); - if (version >= 0x151 && header_size >= 0x54 && (r32(0x50) & 0x80000000)) - logerror("Warning: file requests an unsupported SoundBlaster Pro\n"); - - m_ym3526[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x58 ? r32(0x54) & ~0x40000000 : 0); - m_ym3526[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x58 && (r32(0x54) & 0x40000000) ? r32(0x54) & ~0x40000000 : 0); - m_y8950[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x5c ? r32(0x58) & ~0x40000000 : 0); - m_y8950[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x5c && (r32(0x58) & 0x40000000) ? r32(0x58) & ~0x40000000 : 0); - m_ymf262[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x60 ? r32(0x5c) & ~0x40000000 : 0); - m_ymf262[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x60 && (r32(0x5c) & 0x40000000) ? r32(0x5c) & ~0x40000000 : 0); - m_ymf278b[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x64 ? r32(0x60) & ~0x40000000 : 0); - m_ymf278b[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x64 && r32(0x60) & 0x40000000 ? r32(0x60) & ~0x40000000 : 0); - m_ymf271[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x68 ? r32(0x64) & ~0x40000000 : 0); - m_ymf271[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x68 && r32(0x64) & 0x40000000 ? r32(0x64) & ~0x40000000 : 0); - m_ymz280b[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x6c ? r32(0x68) & ~0x40000000 : 0); - m_ymz280b[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x6c && r32(0x68) & 0x40000000 ? r32(0x68) & ~0x40000000 : 0); - - m_rf5c164->set_unscaled_clock(version >= 0x151 && header_size >= 0x70 ? r32(0x6c) & ~0x80000000 : 0); - if (version >= 0x151 && header_size >= 0x70 && (r32(0x6c) & 0x80000000)) - logerror("Warning: file requests an unsupported Cosmic Fantasy Stories HACK\n"); - - m_sega32x->set_unscaled_clock(version >= 0x151 && header_size >= 0x74 && r32(0x70) ? r32(0x70) : 0); - - m_ay8910[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x78 ? r32(0x74) & ~0x40000000 : 0); - m_ay8910[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x78 && (r32(0x74) & 0x40000000) ? r32(0x74) & ~0x40000000 : 0); + setup_device(*m_rf5c68, 0, CT_RF5C68, 0x40, 0x151); + setup_device(*m_ym2203[0], 0, CT_YM2203, 0x44, 0x151); + setup_device(*m_ym2203[1], 1, CT_YM2203, 0x44, 0x151); + setup_device(*m_ym2608[0], 0, CT_YM2608, 0x48, 0x151); + setup_device(*m_ym2608[1], 1, CT_YM2608, 0x48, 0x151); + + if (setup_device(*m_ym2610[0], 0, CT_YM2610, 0x4c, 0x151) || + setup_device(*m_ym2610[1], 1, CT_YM2610, 0x4c, 0x151)) + osd_printf_warning("Warning: file requests an unsupported YM2610B\n"); + + if (setup_device(*m_ym3812[0], 0, CT_YM3812, 0x50, 0x151) || + setup_device(*m_ym3812[1], 1, CT_YM3812, 0x50, 0x151)) + osd_printf_warning("Warning: file requests an unsupported SoundBlaster Pro\n"); + + setup_device(*m_ym3526[0], 0, CT_YM3526, 0x54, 0x151); + setup_device(*m_ym3526[1], 1, CT_YM3526, 0x54, 0x151); + setup_device(*m_y8950[0], 0, CT_Y8950, 0x58, 0x151); + setup_device(*m_y8950[1], 1, CT_Y8950, 0x58, 0x151); + setup_device(*m_ymf262[0], 0, CT_YMF262, 0x5c, 0x151); + setup_device(*m_ymf262[1], 1, CT_YMF262, 0x5c, 0x151); + setup_device(*m_ymf278b[0], 0, CT_YMF278B, 0x60, 0x151); + setup_device(*m_ymf278b[1], 1, CT_YMF278B, 0x60, 0x151); + setup_device(*m_ymf271[0], 0, CT_YMF271, 0x64, 0x151); + setup_device(*m_ymf271[1], 1, CT_YMF271, 0x64, 0x151); + setup_device(*m_ymz280b[0], 0, CT_YMZ280B, 0x68, 0x151); + setup_device(*m_ymz280b[1], 1, CT_YMZ280B, 0x68, 0x151); + + if (setup_device(*m_rf5c164, 0, CT_RF5C164, 0x6c, 0x151)) + osd_printf_warning("Warning: file requests an unsupported Cosmic Fantasy Stories HACK\n"); + + setup_device(*m_sega32x, 0, CT_SEGA32X, 0x70, 0x151); + + setup_device(*m_ay8910[0], 0, CT_AY8910, 0x74, 0x151); + setup_device(*m_ay8910[1], 1, CT_AY8910, 0x74, 0x151); m_ay8910[0]->set_psg_type(vgm_ay8910_type(version >= 0x151 && header_size >= 0x7c ? r8(0x78) : 0)); m_ay8910[1]->set_psg_type(vgm_ay8910_type(version >= 0x151 && header_size >= 0x7c ? r8(0x78) : 0)); m_ay8910[0]->set_flags(vgm_ay8910_flags(version >= 0x151 && header_size >= 0x7a ? r8(0x79) : 0)); @@ -2781,25 +2803,25 @@ QUICKLOAD_LOAD_MEMBER(vgmplay_state, load_file) m_ym2608[0]->set_flags(vgm_ay8910_flags(version >= 0x151 && header_size >= 0x7c ? r8(0x7b) : 0)); m_ym2608[1]->set_flags(vgm_ay8910_flags(version >= 0x151 && header_size >= 0x7c ? r8(0x7b) : 0)); - m_dmg[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0x84 ? r32(0x80) & ~0x40000000 : 0); - m_dmg[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0x84 && (r32(0x80) & 0x40000000) ? r32(0x80) & ~0x40000000 : 0); - m_nescpu[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0x88 ? r32(0x84) & ~0xc0000000 : 0); - m_nescpu[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0x88 && (r32(0x84) & 0x40000000) ? r32(0x84) & ~0xc0000000 : 0); - if (version >= 0x161 && header_size >= 0x88 && (r32(0x84) & 0x80000000)) - logerror("Warning: file requests an unsupported FDS sound addon\n"); + setup_device(*m_dmg[0], 0, CT_GAMEBOY, 0x80, 0x161); + setup_device(*m_dmg[1], 1, CT_GAMEBOY, 0x80, 0x161); + + if (setup_device(*m_nescpu[0], 0, CT_NESAPU, 0x84, 0x161) || + setup_device(*m_nescpu[1], 1, CT_NESAPU, 0x84, 0x161)) + osd_printf_warning("Warning: file requests an unsupported FDS sound addon\n"); - m_multipcm[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0x8c ? r32(0x88) & ~0x40000000 : 0); - m_multipcm[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0x8c && (r32(0x88) & 0x40000000) ? r32(0x88) & ~0x40000000 : 0); + setup_device(*m_multipcm[0], 0, CT_MULTIPCM, 0x88, 0x161); + setup_device(*m_multipcm[1], 1, CT_MULTIPCM, 0x88, 0x161); - m_upd7759[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0x90 ? r32(0x8c) & ~0xc0000000 : 0); - m_upd7759[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0x90 && (r32(0x8c) & 0x40000000) ? r32(0x8c) & ~0xc0000000 : 0); + setup_device(*m_upd7759[0], 0, CT_UPD7759, 0x8c, 0x161); + setup_device(*m_upd7759[1], 1, CT_UPD7759, 0x8c, 0x161); m_upd7759_md[0] = r32(0x8c) & 0x80000000 ? 0 : 1; m_upd7759_md[1] = r32(0x8c) & 0x80000000 ? 0 : 1; m_upd7759[0]->md_w(m_upd7759_md[0]); m_upd7759[1]->md_w(m_upd7759_md[1]); - m_okim6258[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0x94 ? r32(0x90) & ~0x40000000 : 0); - m_okim6258[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0x94 && (r32(0x90) & 0x40000000) ? r32(0x90) & ~0x40000000 : 0); + setup_device(*m_okim6258[0], 0, CT_OKIM6258, 0x90, 0x161); + setup_device(*m_okim6258[1], 1, CT_OKIM6258, 0x90, 0x161); uint8_t okim6258_flags = version >= 0x161 && header_size >= 0x95 ? r8(0x94) : 0; m_okim6258_divider[0] = okim6258_flags & 3; @@ -2817,78 +2839,58 @@ QUICKLOAD_LOAD_MEMBER(vgmplay_state, load_file) m_c140[0]->set_bank_type(c140_bank_type(version >= 0x161 && header_size >= 0x96 ? r8(0x96) : 0)); m_c140[1]->set_bank_type(c140_bank_type(version >= 0x161 && header_size >= 0x96 ? r8(0x96) : 0)); - m_okim6295_clock[0] = version >= 0x161 && header_size >= 0x9c ? r32(0x98) & ~0xc0000000 : 0; - m_okim6295_clock[1] = version >= 0x161 && header_size >= 0x9c && (r32(0x98) & 0x40000000) ? r32(0x98) & ~0xc0000000 : 0; - m_okim6295[0]->set_unscaled_clock(m_okim6295_clock[0]); - m_okim6295[1]->set_unscaled_clock(m_okim6295_clock[1]); - - m_okim6295_pin7[0] = version >= 0x161 && header_size >= 0x9c && (r32(0x98) & 0x80000000) ? 1 : 0; - m_okim6295_pin7[1] = version >= 0x161 && header_size >= 0x9c && (r32(0x98) & 0x40000000) && (r32(0x98) & 0x80000000) ? 1 : 0; + m_okim6295_pin7[0] = setup_device(*m_okim6295[0], 0, CT_OKIM6295, 0x98, 0x161); + m_okim6295_pin7[1] = setup_device(*m_okim6295[1], 1, CT_OKIM6295, 0x98, 0x161); m_okim6295[0]->set_pin7(m_okim6295_pin7[0] ? okim6295_device::PIN7_HIGH : okim6295_device::PIN7_LOW); m_okim6295[1]->set_pin7(m_okim6295_pin7[1] ? okim6295_device::PIN7_HIGH : okim6295_device::PIN7_LOW); - m_k051649[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xa0 ? r32(0x9c) & ~0xc0000000 : 0); - m_k051649[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xa0 && (r32(0x9c) & 0x40000000) ? r32(0x9c) & ~0xc0000000 : 0); - if (version >= 0x161 && header_size >= 0xa0 && (r32(0x9c) & 0x80000000)) - logerror("Warning: file requests an unsupported Konami SCC\n"); + if (setup_device(*m_k051649[0], 0, CT_K051649, 0x9c, 0x161) || + setup_device(*m_k051649[1], 1, CT_K051649, 0x9c, 0x161)) + osd_printf_warning("Warning: file requests an unsupported Konami SCC\n"); + + setup_device(*m_k054539[0], 0, CT_K054539, 0xa0, 0x161); + setup_device(*m_k054539[1], 1, CT_K054539, 0xa0, 0x161); // HACK: Some VGMs contain 48,000 instead of 18,432,000 - if (version >= 0x161 && header_size >= 0xa4 && (r32(0xa0) & ~0x40000000) == 48000) - { + m_k054539[0]->set_clock_scale(m_k054539[0]->unscaled_clock() == 48000 ? 384.0 : 1.0); + m_k054539[1]->set_clock_scale(m_k054539[1]->unscaled_clock() == 48000 ? 384.0 : 1.0); + if (m_k054539[0]->unscaled_clock() == 48000 || m_k054539[1]->unscaled_clock() == 48000) osd_printf_error("bad rip detected, correcting k054539 clock\n"); - m_k054539[0]->set_clock_scale(384); - m_k054539[1]->set_clock_scale(384); - } - - m_k054539[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xa4 ? r32(0xa0) & ~0x40000000 : 0); - m_k054539[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xa4 && (r32(0xa0) & 0x40000000) ? r32(0xa0) & ~0x40000000 : 0); // HACK: VGM contain the halved clock speed of the sound core inside the HUC6280 m_huc6280[0]->set_clock_scale(2); m_huc6280[1]->set_clock_scale(2); - m_huc6280[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xa8 ? r32(0xa4) & ~0x40000000 : 0); - m_huc6280[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xa8 && (r32(0xa4) & 0x40000000) ? r32(0xa4) & ~0x40000000 : 0); - - m_c140[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xac ? r32(0xa8) & ~0x40000000 : 0); - m_c140[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xac && (r32(0xa8) & 0x40000000) ? r32(0xa8) & ~0x40000000 : 0); + setup_device(*m_huc6280[0], 0, CT_C6280, 0xa4, 0x161); + setup_device(*m_huc6280[1], 1, CT_C6280, 0xa4, 0x161); + setup_device(*m_c140[0], 0, CT_C140, 0xa8, 0x161); + setup_device(*m_c140[1], 1, CT_C140, 0xa8, 0x161); + setup_device(*m_k053260[0], 0, CT_K053260, 0xac, 0x161); + setup_device(*m_k053260[1], 1, CT_K053260, 0xac, 0x161); + setup_device(*m_pokey[0], 0, CT_POKEY, 0xb0, 0x161); + setup_device(*m_pokey[1], 1, CT_POKEY, 0xb0, 0x161); - m_k053260[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xb0 ? r32(0xac) & ~0x40000000 : 0); - m_k053260[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xb0 && (r32(0xac) & 0x40000000) ? r32(0xac) & ~0x40000000 : 0); - - m_pokey[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xb4 ? r32(0xb0) & ~0x40000000 : 0); - m_pokey[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xb4 && (r32(0xb0) & 0x40000000) ? r32(0xb0) & ~0x40000000 : 0); + setup_device(*m_qsound, 0, CT_QSOUND, 0xb4, 0x161); // HACK: VGMs contain 4,000,000 instead of 60,000,000 - if (version >= 0x161 && header_size >= 0xb8 && r32(0xb4) == 4000000) - { + m_qsound->set_clock_scale(m_qsound->unscaled_clock() == 4000000 ? 15.0 : 1.0); + if (m_qsound->unscaled_clock() == 4000000) osd_printf_error("bad rip detected, correcting qsound clock\n"); - m_qsound->set_clock_scale(15); - } - - m_qsound->set_unscaled_clock(version >= 0x161 && header_size >= 0xb8 ? r32(0xb4) : 0); - m_scsp[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xbc ? r32(0xb8) & ~0x40000000 : 0); - m_scsp[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xbc && (r32(0xb8) & 0x40000000) ? r32(0xb8) & ~0x40000000 : 0); - - if (version >= 0x170 && header_size >= 0xc0 && r32(0xbc)) - logerror("Warning: file requests an unsupported Extra Header\n"); - - m_wswan[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xc4 ? r32(0xc0) & ~0x40000000 : 0); - m_wswan[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xc4 && (r32(0xc0) & 0x40000000) ? r32(0xc0) & ~0x40000000 : 0); - - m_vsu_vue[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xc8 ? r32(0xc4) & ~0x40000000 : 0); - m_vsu_vue[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xc8 && (r32(0xc4) & 0x40000000) ? r32(0xc4) & ~0x40000000 : 0); - - m_saa1099[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xcc ? r32(0xc8) & ~0x40000000 : 0); - m_saa1099[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xcc && (r32(0xc8) & 0x40000000) ? r32(0xc8) & ~0x40000000 : 0); - - m_es5503[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xd0 ? r32(0xcc) & ~0x40000000 : 0); - m_es5503[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xd0 && (r32(0xcc) & 0x40000000) ? r32(0xcc) & ~0x40000000 : 0); - m_es5505[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xd4 ? r32(0xd0) & ~0x40000000 : 0); - m_es5505[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xd4 && (r32(0xd0) & 0x40000000) ? r32(0xd0) & ~0x40000000 : 0); - if (version >= 0x171 && header_size >= 0xd4 && r32(0xd0) & 0x80000000) - logerror("Warning: file requests an unsupported ES5506\n"); + setup_device(*m_scsp[0], 0, CT_SCSP, 0xb8, 0x171); + setup_device(*m_scsp[1], 1, CT_SCSP, 0xb8, 0x171); + setup_device(*m_wswan[0], 0, CT_WSWAN, 0xc0, 0x171); + setup_device(*m_wswan[1], 1, CT_WSWAN, 0xc0, 0x171); + setup_device(*m_vsu_vue[0], 0, CT_VSU_VUE, 0xc4, 0x171); + setup_device(*m_vsu_vue[1], 1, CT_VSU_VUE, 0xc4, 0x171); + setup_device(*m_saa1099[0], 0, CT_SAA1099, 0xc8, 0x171); + setup_device(*m_saa1099[1], 1, CT_SAA1099, 0xc8, 0x171); + setup_device(*m_es5503[0], 0, CT_ES5503, 0xcc, 0x171); + setup_device(*m_es5503[1], 1, CT_ES5503, 0xcc, 0x171); + + if (setup_device(*m_es5505[0], 0, CT_ES5505, 0xd0, 0x171) || + setup_device(*m_es5505[1], 1, CT_ES5503, 0xd0, 0x171)) + osd_printf_warning("Warning: file requests an unsupported ES5506\n"); // TODO: dynamically remap es5503/es5505 channels? //m_es5503[0]->set_channels(version >= 0x171 && header_size >= 0xd5 ? r8(0xd4) : 0); @@ -2899,16 +2901,15 @@ QUICKLOAD_LOAD_MEMBER(vgmplay_state, load_file) m_c352[0]->set_divider(version >= 0x171 && header_size >= 0xd7 && r8(0xd6) ? r8(0xd6) * 4 : 1); m_c352[1]->set_divider(version >= 0x171 && header_size >= 0xd7 && r8(0xd6) ? r8(0xd6) * 4 : 1); - m_x1_010[0]->set_unscaled_clock(version >= 0x171 && header_size >= 0xdc ? r32(0xd8) & ~0x40000000 : 0); - m_x1_010[1]->set_unscaled_clock(version >= 0x171 && header_size >= 0xdc && (r32(0xd8) & 0x40000000) ? r32(0xd8) & ~0x40000000 : 0); + setup_device(*m_x1_010[0], 0, CT_X1_010, 0xd8, 0x171); + setup_device(*m_x1_010[1], 1, CT_X1_010, 0xd8, 0x171); - m_c352[0]->set_unscaled_clock(version >= 0x171 && header_size >= 0xe0 ? r32(0xdc) & ~0xc0000000 : 0); - m_c352[1]->set_unscaled_clock(version >= 0x171 && header_size >= 0xe0 && (r32(0xdc) & 0x40000000) ? r32(0xdc) & ~0xc0000000 : 0); - if (version >= 0x171 && header_size >= 0xe0 && r32(0xdc) & 0x80000000) - logerror("Warning: file requests an unsupported disable rear speakers\n"); + if (setup_device(*m_c352[0], 0, CT_C352, 0xdc, 0x171) || + setup_device(*m_c352[1], 1, CT_C352, 0xdc, 0x171)) + osd_printf_warning("Warning: file requests an unsupported disable rear speakers\n"); - m_ga20[0]->set_unscaled_clock(version >= 0x171 && header_size >= 0xe4 ? r32(0xe0) & ~0x40000000 : 0); - m_ga20[1]->set_unscaled_clock(version >= 0x171 && header_size >= 0xe4 && (r32(0xe0) & 0x40000000) ? r32(0xe0) & ~0x40000000 : 0); + setup_device(*m_ga20[0], 0, CT_GA20, 0xe0, 0x171); + setup_device(*m_ga20[1], 1, CT_GA20, 0xe0, 0x171); for (device_t &child : subdevices()) if (child.clock() != 0) @@ -2937,175 +2938,171 @@ READ8_MEMBER(vgmplay_state::file_size_r) return size >> (8 * offset); } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_device::multipcm_bank_hi_w) { if (offset & 1) - m_multipcm_bank_l[Chip] = (m_multipcm_bank_l[Chip] & 0xff) | (data << 16); + m_multipcm_bank_l[Index] = (m_multipcm_bank_l[Index] & 0xff) | (data << 16); if (offset & 2) - m_multipcm_bank_r[Chip] = (m_multipcm_bank_r[Chip] & 0xff) | (data << 16); + m_multipcm_bank_r[Index] = (m_multipcm_bank_r[Index] & 0xff) | (data << 16); } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_device::multipcm_bank_lo_w) { if (offset & 1) - m_multipcm_bank_l[Chip] = (m_multipcm_bank_l[Chip] & 0xff00) | data; + m_multipcm_bank_l[Index] = (m_multipcm_bank_l[Index] & 0xff00) | data; if (offset & 2) - m_multipcm_bank_r[Chip] = (m_multipcm_bank_r[Chip] & 0xff00) | data; + m_multipcm_bank_r[Index] = (m_multipcm_bank_r[Index] & 0xff00) | data; - m_multipcm_banked[Chip] = 1; + m_multipcm_banked[Index] = 1; } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_state::upd7759_reset_w) { int reset = data != 0; - m_upd7759[Chip]->reset_w(reset); + m_upd7759[Index]->reset_w(reset); - if (m_upd7759_reset[Chip] != reset) + if (m_upd7759_reset[Index] != reset) { - m_upd7759_reset[Chip] = reset; + m_upd7759_reset[Index] = reset; if (!reset) - std::queue<uint8_t>().swap(m_upd7759_slave_data[Chip]); + std::queue<uint8_t>().swap(m_upd7759_slave_data[Index]); } } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_state::upd7759_data_w) { - if (!m_upd7759_md[Chip] && !m_upd7759_drq[Chip]) + if (!m_upd7759_md[Index] && !m_upd7759_drq[Index]) { - m_upd7759_slave_data[Chip].push(data); + m_upd7759_slave_data[Index].push(data); } else { - m_upd7759[Chip]->port_w(data); - m_upd7759_drq[Chip] = 0; + m_upd7759[Index]->port_w(data); + m_upd7759_drq[Index] = 0; } } -template<int Chip> +template<int Index> WRITE_LINE_MEMBER(vgmplay_state::upd7759_drq_w) { - if (m_upd7759_drq[Chip] && !state) - osd_printf_error("upd7759.%d underflow\n", Chip); + if (m_upd7759_drq[Index] && !state) + osd_printf_error("upd7759.%d underflow\n", Index); - m_upd7759_drq[Chip] = state; + m_upd7759_drq[Index] = state; - if (!m_upd7759_md[Chip] && m_upd7759_drq[Chip] && !m_upd7759_slave_data[Chip].empty()) + if (!m_upd7759_md[Index] && m_upd7759_drq[Index] && !m_upd7759_slave_data[Index].empty()) { - const uint8_t data(m_upd7759_slave_data[Chip].front()); - m_upd7759_slave_data[Chip].pop(); - m_upd7759[Chip]->port_w(data); - m_upd7759_drq[Chip] = 0; + const uint8_t data(m_upd7759_slave_data[Index].front()); + m_upd7759_slave_data[Index].pop(); + m_upd7759[Index]->port_w(data); + m_upd7759_drq[Index] = 0; } } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_device::upd7759_bank_w) { // TODO: upd7759 update stream - m_upd7759_bank[Chip] = data * 0x20000; + m_upd7759_bank[Index] = data * 0x20000; } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_state::okim6258_clock_w) { - uint32_t old = m_okim6258_clock[Chip]; int shift = ((offset & 3) << 3); - m_okim6258_clock[Chip] = (m_okim6258_clock[Chip] & ~(mem_mask << shift)) | ((data & mem_mask) << shift); - if (old != m_okim6258_clock[Chip]) - m_okim6258[Chip]->set_unscaled_clock(m_okim6258_clock[Chip]); + uint32_t c = (m_okim6258[Index]->unscaled_clock() & ~(mem_mask << shift)) | ((data & mem_mask) << shift); + m_okim6258[Index]->set_unscaled_clock(c); } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_state::okim6258_divider_w) { - if ((data & mem_mask) != (m_okim6258_divider[Chip] & mem_mask)) + if ((data & mem_mask) != (m_okim6258_divider[Index] & mem_mask)) { - COMBINE_DATA(&m_okim6258_divider[Chip]); - m_okim6258[Chip]->set_divider(m_okim6258_divider[Chip]); + COMBINE_DATA(&m_okim6258_divider[Index]); + m_okim6258[Index]->set_divider(m_okim6258_divider[Index]); } } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_state::okim6295_clock_w) { - uint32_t old = m_okim6295_clock[Chip]; int shift = ((offset & 3) << 3); - m_okim6295_clock[Chip] = (m_okim6295_clock[Chip] & ~(mem_mask << shift)) | ((data & mem_mask) << shift); - if (old != m_okim6295_clock[Chip]) - m_okim6295[Chip]->set_unscaled_clock(m_okim6295_clock[Chip]); + uint32_t c = (m_okim6295[Index]->unscaled_clock() & ~(mem_mask << shift)) | ((data & mem_mask) << shift); + m_okim6295[Index]->set_unscaled_clock(c); } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_state::okim6295_pin7_w) { - if ((data & mem_mask) != (m_okim6295_pin7[Chip] & mem_mask)) + if ((data & mem_mask) != (m_okim6295_pin7[Index] & mem_mask)) { - COMBINE_DATA(&m_okim6295_pin7[Chip]); - m_okim6295[Chip]->set_pin7(m_okim6295_pin7[Chip]); + COMBINE_DATA(&m_okim6295_pin7[Index]); + m_okim6295[Index]->set_pin7(m_okim6295_pin7[Index]); } } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_device::okim6295_nmk112_enable_w) { - COMBINE_DATA(&m_okim6295_nmk112_enable[Chip]); + COMBINE_DATA(&m_okim6295_nmk112_enable[Index]); } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_device::okim6295_bank_w) { - if ((data & mem_mask) != (m_okim6295_bank[Chip] & mem_mask)) + if ((data & mem_mask) != (m_okim6295_bank[Index] & mem_mask)) { - COMBINE_DATA(&m_okim6295_bank[Chip]); + COMBINE_DATA(&m_okim6295_bank[Index]); } } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_device::okim6295_nmk112_bank_w) { offset &= 3; - if ((data & mem_mask) != (m_okim6295_nmk112_bank[Chip][offset] & mem_mask)) + if ((data & mem_mask) != (m_okim6295_nmk112_bank[Index][offset] & mem_mask)) { - COMBINE_DATA(&m_okim6295_nmk112_bank[Chip][offset]); + COMBINE_DATA(&m_okim6295_nmk112_bank[Index][offset]); } } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_state::scc_w) { switch (offset & 1) { case 0x00: - m_scc_reg[Chip] = data; + m_scc_reg[Index] = data; break; case 0x01: switch (offset >> 1) { case 0x00: - m_k051649[Chip]->k051649_waveform_w(space, m_scc_reg[Chip], data); + m_k051649[Index]->k051649_waveform_w(space, m_scc_reg[Index], data); break; case 0x01: - m_k051649[Chip]->k051649_frequency_w(space, m_scc_reg[Chip], data); + m_k051649[Index]->k051649_frequency_w(space, m_scc_reg[Index], data); break; case 0x02: - m_k051649[Chip]->k051649_volume_w(space, m_scc_reg[Chip], data); + m_k051649[Index]->k051649_volume_w(space, m_scc_reg[Index], data); break; case 0x03: - m_k051649[Chip]->k051649_keyonoff_w(space, m_scc_reg[Chip], data); + m_k051649[Index]->k051649_keyonoff_w(space, m_scc_reg[Index], data); break; case 0x04: - m_k051649[Chip]->k052539_waveform_w(space, m_scc_reg[Chip], data); + m_k051649[Index]->k052539_waveform_w(space, m_scc_reg[Index], data); break; case 0x05: - m_k051649[Chip]->k051649_test_w(space, m_scc_reg[Chip], data); + m_k051649[Index]->k051649_test_w(space, m_scc_reg[Index], data); break; } break; @@ -3155,10 +3152,10 @@ void vgmplay_state::file_map(address_map &map) void vgmplay_state::soundchips_map(address_map &map) { map(vgmplay_device::REG_SIZE, vgmplay_device::REG_SIZE + 3).r(FUNC(vgmplay_state::file_size_r)); - map(vgmplay_device::A_SN76496_0 + 0, vgmplay_device::A_SN76496_0 + 0).w(m_sn76496[0], FUNC(sn76496_device::command_w)); - //map(vgmplay_device::A_SN76496_0 + 1, vgmplay_device::A_SN76496_0 + 1).w(m_sn76496[0], FUNC(sn76496_device::stereo_w)); // TODO: GG stereo - map(vgmplay_device::A_SN76496_1 + 0, vgmplay_device::A_SN76496_1 + 0).w(m_sn76496[1], FUNC(sn76496_device::command_w)); - //map(vgmplay_device::A_SN76496_1 + 1, vgmplay_device::A_SN76496_1 + 1).w(m_sn76496[1], FUNC(sn76496_device::stereo_w)); // TODO: GG stereo + map(vgmplay_device::A_SN76489_0 + 0, vgmplay_device::A_SN76489_0 + 0).w(m_sn76489[0], FUNC(sn76489_device::command_w)); + //map(vgmplay_device::A_SN76489_0 + 1, vgmplay_device::A_SN76489_0 + 1).w(m_sn76489[0], FUNC(sn76489_device::stereo_w)); // TODO: GG stereo + map(vgmplay_device::A_SN76489_1 + 0, vgmplay_device::A_SN76489_1 + 0).w(m_sn76489[1], FUNC(sn76489_device::command_w)); + //map(vgmplay_device::A_SN76489_1 + 1, vgmplay_device::A_SN76489_1 + 1).w(m_sn76489[1], FUNC(sn76489_device::stereo_w)); // TODO: GG stereo map(vgmplay_device::A_YM2413_0, vgmplay_device::A_YM2413_0 + 1).w(m_ym2413[0], FUNC(ym2413_device::write)); map(vgmplay_device::A_YM2413_1, vgmplay_device::A_YM2413_1 + 1).w(m_ym2413[1], FUNC(ym2413_device::write)); map(vgmplay_device::A_YM2612_0, vgmplay_device::A_YM2612_0 + 3).w(m_ym2612[0], FUNC(ym2612_device::write)); @@ -3282,151 +3279,151 @@ void vgmplay_state::soundchips16_map(address_map &map) map(vgmplay_device::A_C352_1, vgmplay_device::A_C352_1 + 0x7fff).w(m_c352[1], FUNC(c352_device::write)); } -template<int Chip> +template<int Index> void vgmplay_state::segapcm_map(address_map &map) { - map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::segapcm_rom_r<Chip>)); + map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::segapcm_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::rf5c68_map(address_map &map) { - map(0, 0xffff).ram().share(Chip ? "rf5c68_ram.1" : "rf5c68_ram.0"); + map(0, 0xffff).ram().share(Index ? "rf5c68_ram.1" : "rf5c68_ram.0"); } -template<int Chip> +template<int Index> void vgmplay_state::ym2608_map(address_map &map) { - map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::ym2608_rom_r<Chip>)); + map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::ym2608_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::ym2610_adpcm_a_map(address_map &map) { - map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::ym2610_adpcm_a_rom_r<Chip>)); + map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::ym2610_adpcm_a_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::ym2610_adpcm_b_map(address_map &map) { - map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::ym2610_adpcm_b_rom_r<Chip>)); + map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::ym2610_adpcm_b_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::y8950_map(address_map &map) { - map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::y8950_rom_r<Chip>)); + map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::y8950_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::ymf278b_map(address_map &map) { - map(0, 0x3fffff).r("vgmplay", FUNC(vgmplay_device::ymf278b_rom_r<Chip>)); + map(0, 0x3fffff).r("vgmplay", FUNC(vgmplay_device::ymf278b_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::ymf271_map(address_map &map) { - map(0, 0x7fffff).r("vgmplay", FUNC(vgmplay_device::ymf271_rom_r<Chip>)); + map(0, 0x7fffff).r("vgmplay", FUNC(vgmplay_device::ymf271_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::ymz280b_map(address_map &map) { - map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::ymz280b_rom_r<Chip>)); + map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::ymz280b_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::nescpu_map(address_map &map) { - map(0, 0xffff).ram().share(Chip ? "nesapu_ram.1" : "nesapu_ram.0"); + map(0, 0xffff).ram().share(Index ? "nesapu_ram.1" : "nesapu_ram.0"); } -template<int Chip> +template<int Index> void vgmplay_state::multipcm_map(address_map &map) { - map(0, 0x3fffff).r("vgmplay", FUNC(vgmplay_device::multipcm_rom_r<Chip>)); + map(0, 0x3fffff).r("vgmplay", FUNC(vgmplay_device::multipcm_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::upd7759_map(address_map &map) { - map(0, 0x1ffff).r("vgmplay", FUNC(vgmplay_device::upd7759_rom_r<Chip>)); + map(0, 0x1ffff).r("vgmplay", FUNC(vgmplay_device::upd7759_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::okim6295_map(address_map &map) { - map(0, 0x3ffff).r("vgmplay", FUNC(vgmplay_device::okim6295_rom_r<Chip>)); + map(0, 0x3ffff).r("vgmplay", FUNC(vgmplay_device::okim6295_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::k054539_map(address_map &map) { - map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::k054539_rom_r<Chip>)); + map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::k054539_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::c140_map(address_map &map) { - map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::c140_rom_r<Chip>)); + map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::c140_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::k053260_map(address_map &map) { - map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::k053260_rom_r<Chip>)); + map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::k053260_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::qsound_map(address_map &map) { - map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::qsound_rom_r<Chip>)); + map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::qsound_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::scsp_map(address_map &map) { - map(0, 0xfffff).ram().share(Chip ? "scsp_ram.1" : "scsp_ram.0"); + map(0, 0xfffff).ram().share(Index ? "scsp_ram.1" : "scsp_ram.0"); } -template<int Chip> +template<int Index> void vgmplay_state::wswan_map(address_map &map) { - map(0, 0x3fff).ram().share(Chip ? "wswan_ram.1" : "wswan_ram.0"); + map(0, 0x3fff).ram().share(Index ? "wswan_ram.1" : "wswan_ram.0"); } -template<int Chip> +template<int Index> void vgmplay_state::es5503_map(address_map &map) { - map(0, 0x1ffff).ram().share(Chip ? "es5503_ram.1" : "es5503_ram.0"); + map(0, 0x1ffff).ram().share(Index ? "es5503_ram.1" : "es5503_ram.0"); } -template<int Chip> +template<int Index> void vgmplay_state::es5505_map(address_map &map) { - map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::es5505_rom_r<Chip>)); + map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::es5505_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::x1_010_map(address_map &map) { - map(0, 0xfffff).r("vgmplay", FUNC(vgmplay_device::x1_010_rom_r<Chip>)); + map(0, 0xfffff).r("vgmplay", FUNC(vgmplay_device::x1_010_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::c352_map(address_map &map) { - map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::c352_rom_r<Chip>)); + map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::c352_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::ga20_map(address_map &map) { - map(0, 0xfffff).r("vgmplay", FUNC(vgmplay_device::ga20_rom_r<Chip>)); + map(0, 0xfffff).r("vgmplay", FUNC(vgmplay_device::ga20_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::rf5c164_map(address_map &map) { map(0, 0xffff).ram().share("rf5c164_ram"); @@ -3445,13 +3442,13 @@ MACHINE_CONFIG_START(vgmplay_state::vgmplay) config.set_default_layout(layout_vgmplay); - SN76496(config, m_sn76496[0], 0); - m_sn76496[0]->add_route(0, "lspeaker", 0.5); - m_sn76496[0]->add_route(0, "rspeaker", 0.5); + SN76489(config, m_sn76489[0], 0); + m_sn76489[0]->add_route(0, "lspeaker", 0.5); + m_sn76489[0]->add_route(0, "rspeaker", 0.5); - SN76496(config, m_sn76496[1], 0); - m_sn76496[1]->add_route(0, "lspeaker", 0.5); - m_sn76496[1]->add_route(0, "rspeaker", 0.5); + SN76489(config, m_sn76489[1], 0); + m_sn76489[1]->add_route(0, "lspeaker", 0.5); + m_sn76489[1]->add_route(0, "rspeaker", 0.5); YM2413(config, m_ym2413[0], 0); m_ym2413[0]->add_route(ALL_OUTPUTS, "lspeaker", 1); diff --git a/src/mame/drivers/video21.cpp b/src/mame/drivers/video21.cpp index 6a0e2d145f1..ad3de2983cc 100644 --- a/src/mame/drivers/video21.cpp +++ b/src/mame/drivers/video21.cpp @@ -1,35 +1,36 @@ // license:BSD-3-Clause -// copyright-holders:Robbbert +// copyright-holders:Robbbert, hap /**************************************************************************************** 2018-09-15 -Video 21 blackjack game. Thanks to hap who figured out the inputs and the name of the game. - +Video 21 blackjack game VIDEO-GAMES - LICH/GERMANY 1017a -NEC D8080AFC (i8080), unknown xtal, bank of 7 dips. 10x 4-bit proms, type F93453 (=82S137) +NEC D8080AFC (i8080), 20.79MHz xtal, bank of 7 dips. 10x 4-bit proms, type F93453 (=82S137) Video Ram = 7 x 2102 (bit 7 omitted). Main Ram = 2x MCM145101 (=M5101L). The game has sound (there's a LM380N visible), looks like there's a bunch of TTL chips involved, and a 555. -To Do: -- Sound -- CPU clock -- unknown status bits? eg. hopper -- color overlay as seen on flyer upright cabinet +TODO: +- improve sound, it's definitely beeper pitch control, but sounds offtune +- identify all dips (7 total) +- confirm CPU clock When booted, press Key out (mapped to W by default) to get it going. - *******************************************************************************************/ #include "emu.h" #include "cpu/i8085/i8085.h" #include "machine/nvram.h" +#include "sound/beep.h" + #include "screen.h" #include "emupal.h" +#include "speaker.h" +#include "video21.lh" class video21_state : public driver_device { @@ -39,18 +40,35 @@ public: , m_maincpu(*this,"maincpu") , m_p_videoram(*this, "videoram") , m_p_chargen(*this, "chargen") + , m_beeper(*this, "beeper") + , m_lamps(*this, "lamp%u", 0U) { } void video21(machine_config &config); + DECLARE_CUSTOM_INPUT_MEMBER(hopper_coinout_r); + +protected: + virtual void machine_start() override; private: + DECLARE_WRITE8_MEMBER(sound_w); + DECLARE_WRITE8_MEMBER(lamp1_w); + DECLARE_WRITE8_MEMBER(lamp2_w); + + int m_hopper_motor; + int m_hopper_coin; + emu_timer *m_hopper_timer; + TIMER_CALLBACK_MEMBER(hopper_coinout); uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void mem_map(address_map &map); void io_map(address_map &map); + required_device<cpu_device> m_maincpu; required_shared_ptr<u8> m_p_videoram; required_region_ptr<u8> m_p_chargen; + optional_device<beep_device> m_beeper; + output_finder<6> m_lamps; }; @@ -86,6 +104,52 @@ uint32_t video21_state::screen_update(screen_device &screen, bitmap_ind16 &bitma return 0; } +TIMER_CALLBACK_MEMBER(video21_state::hopper_coinout) +{ + m_hopper_coin = param; + + if (m_hopper_motor || m_hopper_coin) + m_hopper_timer->adjust(attotime::from_msec(100), m_hopper_coin ^ 1); +} + +WRITE8_MEMBER(video21_state::sound_w) +{ + // beeper pitch + m_beeper->set_state(data != 0xff); // FF is off + m_beeper->set_clock(4 * data); +} + +WRITE8_MEMBER(video21_state::lamp1_w) +{ + // d1-d3: coincounters + machine().bookkeeping().coin_counter_w(0, data & 0x04); // coin in + machine().bookkeeping().coin_counter_w(1, data & 0x08); // keeper coin out + machine().bookkeeping().coin_counter_w(2, data & 0x02); // hopper coin out + + // d4: hopper motor + if (!m_hopper_motor && BIT(data, 4)) + m_hopper_timer->adjust(attotime::from_msec(100), 1); + m_hopper_motor = BIT(data, 4); + + // lamps: + // d5: take/stand(which?) + // d6: take/stand(which?) + // d7: start + for (int i = 0; i < 3; i++) + m_lamps[i+0] = BIT(data, 7-i); +} + +WRITE8_MEMBER(video21_state::lamp2_w) +{ + // lamps: + // d5: bet + // d6: accept win/double(which?) + // d7: accept win/double(which?) + for (int i = 0; i < 3; i++) + m_lamps[i+3] = BIT(data, 7-i); +} + + void video21_state::mem_map(address_map &map) { map(0x0000,0x0fff).rom().mirror(0x3000); map(0xe000,0xe3ff).ram().share("videoram"); @@ -93,17 +157,22 @@ void video21_state::mem_map(address_map &map) { } void video21_state::io_map(address_map &map) { - map(0x02,0x02).nopw(); // lots of unknown writes, might be some kind of dac - map(0x04,0x04); //.w unknown write - map(0x08,0x08); //.w unknown write + map(0x02,0x02).w(FUNC(video21_state::sound_w)); + map(0x04,0x04).w(FUNC(video21_state::lamp1_w)); + map(0x08,0x08).w(FUNC(video21_state::lamp2_w)); map(0x41,0x41).portr("IN41"); map(0x42,0x42).portr("IN42"); map(0x44,0x44).portr("IN44"); } +CUSTOM_INPUT_MEMBER(video21_state::hopper_coinout_r) +{ + return m_hopper_coin; +} + static INPUT_PORTS_START( video21 ) - PORT_START("IN41") // dips and tilt + PORT_START("IN41") PORT_DIPNAME( 0x01, 0x01, "41b0" ) PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) @@ -113,9 +182,9 @@ static INPUT_PORTS_START( video21 ) PORT_DIPNAME( 0x04, 0x04, "41b2" ) PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, "41b3" ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x08, "Win Mode" ) + PORT_DIPSETTING( 0x08, "Amusement" ) // winnings get added to credits + PORT_DIPSETTING( 0x00, "Casino" ) // winnings go to coin out PORT_DIPNAME( 0x10, 0x10, "41b4" ) PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) @@ -125,19 +194,17 @@ static INPUT_PORTS_START( video21 ) PORT_DIPNAME( 0x40, 0x40, DEF_STR( Coin_A ) ) PORT_DIPSETTING( 0x40, DEF_STR( 1C_5C ) ) PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_TILT ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_TILT ) // ? PORT_START("IN42") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_STAND ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) - PORT_DIPNAME( 0x40, 0x40, "42b6" ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, video21_state, hopper_coinout_r, nullptr) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen") PORT_START("IN44") PORT_DIPNAME( 0x01, 0x01, "44b0" ) @@ -149,14 +216,10 @@ static INPUT_PORTS_START( video21 ) PORT_DIPNAME( 0x04, 0x04, "44b2" ) PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DOOR ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) - PORT_DIPNAME( 0x20, 0x20, "44b5" ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, "44b6" ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) PORT_NAME("Double Or Nothing") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) PORT_NAME("Accept Win") PORT_DIPNAME( 0x80, 0x80, "Max Bet" ) PORT_DIPSETTING( 0x80, "10" ) PORT_DIPSETTING( 0x00, "2" ) @@ -180,6 +243,20 @@ static GFXDECODE_START( gfx_video21 ) GFXDECODE_ENTRY( "chargen", 0x0000, video21_charlayout, 0, 1 ) GFXDECODE_END +void video21_state::machine_start() +{ + m_hopper_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(video21_state::hopper_coinout),this)); + + m_lamps.resolve(); + + // zerofill/register for savestates + m_hopper_motor = 0; + m_hopper_coin = 0; + + save_item(NAME(m_hopper_motor)); + save_item(NAME(m_hopper_coin)); +} + void video21_state::video21(machine_config &config) { /* basic machine hardware */ @@ -200,24 +277,25 @@ void video21_state::video21(machine_config &config) PALETTE(config, "palette", 2).set_init("palette", FUNC(palette_device::palette_init_monochrome)); /* sound hardware */ + SPEAKER(config, "mono").front_center(); + BEEP(config, m_beeper, 0).add_route(ALL_OUTPUTS, "mono", 0.25); } - ROM_START( video21 ) ROM_REGION( 0x1000, "maincpu", 0 ) - ROM_LOAD_NIB_HIGH( "lich_prg.02", 0x0000, 0x0400, CRC(05585e39) SHA1(7eefb5d63b4499a303ecdcad6af5df9fe9c89205) ) - ROM_LOAD_NIB_LOW ( "lich_prg.03", 0x0000, 0x0400, CRC(b9134e96) SHA1(e7a8ff71f735add608d3c9dcc287ca37414debcb) ) - ROM_LOAD_NIB_HIGH( "lich_prg.04", 0x0400, 0x0400, CRC(8a6aa143) SHA1(16973106a95b17d8c4712db8aa7ef564751ae6d4) ) - ROM_LOAD_NIB_LOW ( "lich_prg.05", 0x0400, 0x0400, CRC(98c07d4d) SHA1(d3126b5484c67ecc7c44ddc25b48ff72ed8a734f) ) - ROM_LOAD_NIB_HIGH( "lich_prg.76", 0x0800, 0x0400, CRC(737c27f5) SHA1(55c7eb29b979d35633e5fb2c1c1ac3117901a0f0) ) - ROM_LOAD_NIB_LOW ( "lich_prg.78", 0x0800, 0x0400, CRC(c1081a2f) SHA1(24dc1d9afa4635c3114369c338903343a8b81d1a) ) - ROM_LOAD_NIB_HIGH( "lich_prg.77", 0x0c00, 0x0400, CRC(3a725b98) SHA1(efa3802025f1f99b45e56abd85dc3d1860d4734d) ) - ROM_LOAD_NIB_LOW ( "lich_prg.79", 0x0c00, 0x0400, CRC(044d1bfd) SHA1(5a57c1ab7eb7dd7ed05852e128b704c3b37a87b8) ) + ROM_LOAD_NIB_HIGH( "2", 0x0000, 0x0400, CRC(05585e39) SHA1(7eefb5d63b4499a303ecdcad6af5df9fe9c89205) ) + ROM_LOAD_NIB_LOW ( "3", 0x0000, 0x0400, CRC(b9134e96) SHA1(e7a8ff71f735add608d3c9dcc287ca37414debcb) ) + ROM_LOAD_NIB_HIGH( "4", 0x0400, 0x0400, CRC(8a6aa143) SHA1(16973106a95b17d8c4712db8aa7ef564751ae6d4) ) + ROM_LOAD_NIB_LOW ( "5", 0x0400, 0x0400, CRC(98c07d4d) SHA1(d3126b5484c67ecc7c44ddc25b48ff72ed8a734f) ) + ROM_LOAD_NIB_HIGH( "76", 0x0800, 0x0400, CRC(737c27f5) SHA1(55c7eb29b979d35633e5fb2c1c1ac3117901a0f0) ) + ROM_LOAD_NIB_LOW ( "78", 0x0800, 0x0400, CRC(c1081a2f) SHA1(24dc1d9afa4635c3114369c338903343a8b81d1a) ) + ROM_LOAD_NIB_HIGH( "77", 0x0c00, 0x0400, CRC(3a725b98) SHA1(efa3802025f1f99b45e56abd85dc3d1860d4734d) ) + ROM_LOAD_NIB_LOW ( "79", 0x0c00, 0x0400, CRC(044d1bfd) SHA1(5a57c1ab7eb7dd7ed05852e128b704c3b37a87b8) ) ROM_REGION( 0x0400, "chargen", 0 ) - ROM_LOAD_NIB_HIGH( "lich_gfx.29", 0x0000, 0x0400, CRC(2b70870d) SHA1(1f50a6976e1634020c78f10c1259e38f5e010a86) ) - ROM_LOAD_NIB_LOW ( "lich_gfx.43", 0x0000, 0x0400, CRC(0ecb0aab) SHA1(7f3f1b93a5d38828ae3e97e5f8ef1a6a96dc798b) ) + ROM_LOAD_NIB_HIGH( "29", 0x0000, 0x0400, CRC(2b70870d) SHA1(1f50a6976e1634020c78f10c1259e38f5e010a86) ) + ROM_LOAD_NIB_LOW ( "43", 0x0000, 0x0400, CRC(0ecb0aab) SHA1(7f3f1b93a5d38828ae3e97e5f8ef1a6a96dc798b) ) ROM_END -GAME(1980, video21, 0, video21, video21, video21_state, empty_init, ROT0, "Video Games GmbH", "Video 21", MACHINE_NO_SOUND) +GAMEL(1980?, video21, 0, video21, video21, video21_state, empty_init, ROT0, "Video Games GmbH", "Video 21", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_video21) diff --git a/src/mame/drivers/vii.cpp b/src/mame/drivers/vii.cpp index d4a8d2a3b1f..677be8bccbe 100644 --- a/src/mame/drivers/vii.cpp +++ b/src/mame/drivers/vii.cpp @@ -2,19 +2,9 @@ // copyright-holders:Ryan Holtz, Robbbert /****************************************************************************** - - Sport Vii / The Batman - ---------------------- - - driver by Ryan Holtz - Based largely off of Unununium, by Segher - - -******************************************************************************* - Short Description: - Systems run on the SPG243 SoC + Systems which run on the SPG243 SoC Status: @@ -23,7 +13,6 @@ To-Do: Audio (SPG243) - Motion controls (Vii) Known u'nSP-Based Systems: @@ -35,7 +24,7 @@ ND - SPG243 - Finding Nemo D - SPG243 - The Batman D - SPG243 - Wall-E - D - SPG243 - Chintendo / KenSingTon / Siatronics / Jungle Soft Vii + D - SPG243 - KenSingTon / Siatronics / Jungle Soft Vii Partial D - SPG200 - VTech V.Smile ND - unknown - Zone 40 D - SPG243 - Zone 60 @@ -58,29 +47,15 @@ also on this hardware name PCB ID ROM width TSOP pads ROM size SEEPROM die markings Radica Play TV Football 2 L7278 x16 48 not dumped no Sunplus - Dream Life ? x16 48 no tdumped no Sunplus + Dream Life ? x16 48 not dumped no Sunplus Detailed list of bugs: - When loading a cart from file manager, sometimes it will crash - On 'vii_vc1' & 'vii_vc2' cart, the left-right keys are transposed with the up-down keys -- The game 'Jewel Master' on both above carts displays a priority error at top of screen - In the default bios (no cart loaded): --- In the menu, when 'Come On!' is selected, a graphics error appears --- Catch Fish, black screen --- Come On! freezes at the high score screen, controls seem haywire --- Bird Knight, no controls --- Lucky Dice, the dice never stop spinning --- Fever Move, after pressing A it freezes --- Alacrity Golf, black screen --- Smart Dart, black screen --- Happy Tennis, controls are haywire --- Bowling, freezes at the high score screen --- The "EEPROM TEST" option in the diagnostic menu (accessible by holding 1+2 or A+B during startup) freezes when selected -- The "MOTOR" option in the diagnostic menu does nothing when selected --- The input for the gyroscopic sensor tests in the "KEYBOARD + G-SENSOR" sub-menu goes haywire - Zone 60 / Wireless 60: --- Auto Racing / Auto X, Dragon, Yummy, some other games: some sprites are inverted or opaque where they should be transparent --- Basketball: emulator crashes when starting the game due to an unimplemented instruction +-- Basketball: emulator crashes when starting the game due to jumping to invalid code. *******************************************************************************/ @@ -88,6 +63,7 @@ Detailed list of bugs: #include "emu.h" #include "cpu/unsp/unsp.h" +#include "machine/spg2xx.h" #include "machine/i2cmem.h" #include "bus/generic/slot.h" @@ -97,123 +73,82 @@ Detailed list of bugs: #include "screen.h" #include "softlist.h" - -#define PAGE_ENABLE_MASK 0x0008 - -#define PAGE_DEPTH_FLAG_MASK 0x3000 -#define PAGE_DEPTH_FLAG_SHIFT 12 -#define PAGE_TILE_HEIGHT_MASK 0x00c0 -#define PAGE_TILE_HEIGHT_SHIFT 6 -#define PAGE_TILE_WIDTH_MASK 0x0030 -#define PAGE_TILE_WIDTH_SHIFT 4 -#define TILE_X_FLIP 0x0004 -#define TILE_Y_FLIP 0x0008 - -class spg2xx_game_state : public driver_device +class spg2xx_game_state : public driver_device, public device_nvram_interface { public: spg2xx_game_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_bank(*this, "cart"), - m_maincpu(*this, "maincpu"), - m_p_ram(*this, "p_ram"), - m_p_rowscroll(*this, "p_rowscroll"), - m_p_palette(*this, "p_palette"), - m_p_spriteram(*this, "p_spriteram"), - m_io_p1(*this, "P1"), - m_io_p2(*this, "P2"), - m_io_p3(*this, "P3") + : driver_device(mconfig, type, tag) + , device_nvram_interface(mconfig, *this) + , m_maincpu(*this, "maincpu") + , m_screen(*this, "screen") + , m_spg(*this, "spg") + , m_bank(*this, "cart") + , m_io_p1(*this, "P1") + , m_io_p2(*this, "P2") + , m_io_p3(*this, "P3") + , m_io_motionx(*this, "MOTIONX") + , m_io_motiony(*this, "MOTIONY") + , m_io_motionz(*this, "MOTIONZ") { } void spg2xx_base(machine_config &config); void spg2xx_basep(machine_config &config); - void batman(machine_config &config); + void jakks(machine_config &config); + void wireless60(machine_config &config); + void rad_skat(machine_config &config); + void rad_crik(machine_config &config); + void non_spg_base(machine_config &config); - void init_walle(); - void init_batman(); - void init_wirels60(); - void init_rad_skat(); void init_rad_crik(); protected: void switch_bank(uint32_t bank); - uint32_t m_centered_coordinates; // this must be a vreg? - void test_centered(uint8_t *ROM); virtual void machine_start() override; - typedef delegate<uint16_t(uint16_t, int)> vii_io_rw_delegate; - vii_io_rw_delegate m_vii_io_rw; - - required_memory_bank m_bank; + DECLARE_READ8_MEMBER(uart_rx); -private: - DECLARE_READ16_MEMBER(video_r); - DECLARE_WRITE16_MEMBER(video_w); - DECLARE_READ16_MEMBER(audio_r); - DECLARE_WRITE16_MEMBER(audio_w); - DECLARE_READ16_MEMBER(io_r); - DECLARE_WRITE16_MEMBER(io_w); - DECLARE_READ16_MEMBER(rom_r); + DECLARE_WRITE8_MEMBER(eeprom_w); + DECLARE_READ8_MEMBER(eeprom_r); - uint32_t screen_update_vii(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + DECLARE_READ16_MEMBER(jakks_porta_r); + DECLARE_WRITE16_MEMBER(wireless60_porta_w); + DECLARE_WRITE16_MEMBER(wireless60_portb_w); + DECLARE_READ16_MEMBER(wireless60_porta_r); - INTERRUPT_GEN_MEMBER(vii_vblank); + DECLARE_WRITE_LINE_MEMBER(poll_controls); - TIMER_CALLBACK_MEMBER(tmb1_tick); - TIMER_CALLBACK_MEMBER(tmb2_tick); + required_device<cpu_device> m_maincpu; + required_device<screen_device> m_screen; + required_device<spg2xx_device> m_spg; + required_memory_bank m_bank; - void vii_mem(address_map &map); + // device_nvram_interface overrides + virtual void nvram_default() override; + virtual void nvram_read(emu_file &file) override; + virtual void nvram_write(emu_file &file) override; +private: virtual void machine_reset() override; - virtual void video_start() override; - uint16_t do_spg240_rad_skat_io(uint16_t what, int index); - uint16_t do_spg243_batman_io(uint16_t what, int index); - uint16_t do_spg243_wireless60_io(uint16_t what, int index); + void mem_map(address_map &map); uint32_t m_current_bank; - uint16_t m_video_regs[0x100]; - - struct - { - uint8_t r, g, b; - } - m_screenram[320 * 240]; - - uint16_t m_io_regs[0x200]; + std::unique_ptr<uint8_t[]> m_serial_eeprom; uint16_t m_uart_rx_count; uint8_t m_controller_input[8]; uint8_t m_w60_controller_input; + uint16_t m_w60_porta_data; - emu_timer *m_tmb1; - emu_timer *m_tmb2; - void do_dma(uint32_t len); - void do_gpio(uint32_t offset); - void do_i2c(); - void spg_do_dma(uint32_t len); - - void blit(bitmap_rgb32 &bitmap, const rectangle &cliprect, uint32_t xoff, uint32_t yoff, uint32_t attr, uint32_t ctrl, uint32_t bitmap_addr, uint16_t tile); - void blit_page(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth, uint32_t bitmap_addr, uint16_t *regs); - void blit_sprite(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth, uint32_t base_addr); - void blit_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth); inline void verboselog(int n_level, const char *s_fmt, ...) ATTR_PRINTF(3, 4); - inline uint8_t expand_rgb5_to_rgb8(uint8_t val); - inline uint8_t mix_channel(uint8_t a, uint8_t b); - void mix_pixel(uint32_t offset, uint16_t rgb); - void set_pixel(uint32_t offset, uint16_t rgb); - // devices - - required_device<cpu_device> m_maincpu; - required_shared_ptr<uint16_t> m_p_ram; - required_shared_ptr<uint16_t> m_p_rowscroll; - required_shared_ptr<uint16_t> m_p_palette; - required_shared_ptr<uint16_t> m_p_spriteram; required_ioport m_io_p1; optional_ioport m_io_p2; optional_ioport m_io_p3; + optional_ioport m_io_motionx; + optional_ioport m_io_motiony; + optional_ioport m_io_motionz; // temp hack DECLARE_READ16_MEMBER(rad_crik_hack_r); @@ -232,11 +167,9 @@ public: void vsmile(machine_config &config); void init_vii(); - void init_vsmile(); private: - uint16_t do_spg243_vsmile_io(uint16_t what, int index); - uint16_t do_spg243_vii_io(uint16_t what, int index); + DECLARE_WRITE16_MEMBER(vii_portb_w); DECLARE_DEVICE_IMAGE_LOAD_MEMBER(vii_cart); DECLARE_DEVICE_IMAGE_LOAD_MEMBER(vsmile_cart); @@ -247,11 +180,7 @@ private: memory_region *m_cart_rom; }; -#define VII_CTLR_IRQ_ENABLE m_io_regs[0x21] -#define VII_VIDEO_IRQ_ENABLE m_video_regs[0x62] -#define VII_VIDEO_IRQ_STATUS m_video_regs[0x63] - -#define VERBOSE_LEVEL (3) +#define VERBOSE_LEVEL (4) #define ENABLE_VERBOSE_LOG (1) @@ -264,382 +193,16 @@ inline void spg2xx_game_state::verboselog(int n_level, const char *s_fmt, ...) char buf[32768]; va_start(v, s_fmt); vsprintf(buf, s_fmt, v); + logerror("%s", buf); va_end(v); } #endif } /************************* -* Video Hardware * -*************************/ - -void spg2xx_game_state::video_start() -{ -} - -inline uint8_t spg2xx_game_state::expand_rgb5_to_rgb8(uint8_t val) -{ - uint8_t temp = val & 0x1f; - return (temp << 3) | (temp >> 2); -} - -// Perform a lerp between a and b -inline uint8_t spg2xx_game_state::mix_channel(uint8_t a, uint8_t b) -{ - uint8_t alpha = m_video_regs[0x1c] & 0x00ff; - return ((64 - alpha) * a + alpha * b) / 64; -} - -void spg2xx_game_state::mix_pixel(uint32_t offset, uint16_t rgb) -{ - m_screenram[offset].r = mix_channel(m_screenram[offset].r, expand_rgb5_to_rgb8(rgb >> 10)); - m_screenram[offset].g = mix_channel(m_screenram[offset].g, expand_rgb5_to_rgb8(rgb >> 5)); - m_screenram[offset].b = mix_channel(m_screenram[offset].b, expand_rgb5_to_rgb8(rgb)); -} - -void spg2xx_game_state::set_pixel(uint32_t offset, uint16_t rgb) -{ - m_screenram[offset].r = expand_rgb5_to_rgb8(rgb >> 10); - m_screenram[offset].g = expand_rgb5_to_rgb8(rgb >> 5); - m_screenram[offset].b = expand_rgb5_to_rgb8(rgb); -} - -void spg2xx_game_state::blit(bitmap_rgb32 &bitmap, const rectangle &cliprect, uint32_t xoff, uint32_t yoff, uint32_t attr, uint32_t ctrl, uint32_t bitmap_addr, uint16_t tile) -{ - address_space &space = m_maincpu->space(AS_PROGRAM); - - uint32_t h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT); - uint32_t w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT); - - uint32_t yflipmask = attr & TILE_Y_FLIP ? h - 1 : 0; - uint32_t xflipmask = attr & TILE_X_FLIP ? w - 1 : 0; - - uint32_t nc = ((attr & 0x0003) + 1) << 1; - - uint32_t palette_offset = (attr & 0x0f00) >> 4; - palette_offset >>= nc; - palette_offset <<= nc; - - uint32_t m = bitmap_addr + nc * w*h / 16 * tile; - uint32_t bits = 0; - uint32_t nbits = 0; - - uint32_t x, y; - - for (y = 0; y < h; y++) - { - uint32_t yy = (yoff + (y ^ yflipmask)) & 0x1ff; - - for (x = 0; x < w; x++) - { - uint32_t xx = (xoff + (x ^ xflipmask)) & 0x1ff; - uint32_t pal; - - bits <<= nc; - if (nbits < nc) - { - uint16_t b = space.read_word(m++ & 0x3fffff); - b = (b << 8) | (b >> 8); - bits |= b << (nc - nbits); - nbits += 16; - } - nbits -= nc; - - pal = palette_offset | (bits >> 16); - bits &= 0xffff; - - if ((ctrl & 0x0010) && yy < 240) - { - xx = (xx - (int16_t)m_p_rowscroll[yy]) & 0x01ff; - } - - if (xx < 320 && yy < 240) - { - uint16_t rgb = m_p_palette[pal]; - if (!(rgb & 0x8000)) - { - if (attr & 0x4000) - { - mix_pixel(xx + 320 * yy, rgb); - } - else - { - set_pixel(xx + 320 * yy, rgb); - } - } - } - } - } -} - -void spg2xx_game_state::blit_page(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth, uint32_t bitmap_addr, uint16_t *regs) -{ - uint32_t x0, y0; - uint32_t xscroll = regs[0]; - uint32_t yscroll = regs[1]; - uint32_t attr = regs[2]; - uint32_t ctrl = regs[3]; - uint32_t tilemap = regs[4]; - uint32_t palette_map = regs[5]; - uint32_t h, w, hn, wn; - address_space &space = m_maincpu->space(AS_PROGRAM); - - if (!(ctrl & PAGE_ENABLE_MASK)) - { - return; - } - - if (((attr & PAGE_DEPTH_FLAG_MASK) >> PAGE_DEPTH_FLAG_SHIFT) != depth) - { - return; - } - - h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT); - w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT); - - hn = 256 / h; - wn = 512 / w; - - for (y0 = 0; y0 < hn; y0++) - { - for (x0 = 0; x0 < wn; x0++) - { - uint16_t tile = space.read_word(tilemap + x0 + wn * y0); - uint16_t palette = 0; - uint32_t xx, yy; - - if (!tile) - { - continue; - } - - palette = space.read_word(palette_map + (x0 + wn * y0) / 2); - if (x0 & 1) - { - palette >>= 8; - } - - uint32_t tileattr = attr; - uint32_t tilectrl = ctrl; - if ((ctrl & 2) == 0) - { // -(1) bld(1) flip(2) pal(4) - tileattr &= ~0x000c; - tileattr |= (palette >> 2) & 0x000c; // flip - - tileattr &= ~0x0f00; - tileattr |= (palette << 8) & 0x0f00; // palette - - tileattr &= ~0x0100; - tileattr |= (palette << 2) & 0x0100; // blend - } - - yy = ((h*y0 - yscroll + 0x10) & 0xff) - 0x10; - xx = (w*x0 - xscroll) & 0x1ff; - - blit(bitmap, cliprect, xx, yy, tileattr, tilectrl, bitmap_addr, tile); - } - } -} - -void spg2xx_game_state::blit_sprite(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth, uint32_t base_addr) -{ - address_space &space = m_maincpu->space(AS_PROGRAM); - uint16_t tile, attr; - int16_t x, y; - uint32_t h, w; - uint32_t bitmap_addr = 0x40 * m_video_regs[0x22]; - - tile = space.read_word(base_addr + 0); - x = space.read_word(base_addr + 1); - y = space.read_word(base_addr + 2); - attr = space.read_word(base_addr + 3); - - if (!tile) - { - return; - } - - if (((attr & PAGE_DEPTH_FLAG_MASK) >> PAGE_DEPTH_FLAG_SHIFT) != depth) - { - return; - } - - if (m_centered_coordinates) - { - x = 160 + x; - y = 120 - y; - - h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT); - w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT); - - x -= (w / 2); - y -= (h / 2) - 8; - } - - x &= 0x01ff; - y &= 0x01ff; - - blit(bitmap, cliprect, x, y, attr, 0, bitmap_addr, tile); -} - -void spg2xx_game_state::blit_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth) -{ - uint32_t n; - - if (!(m_video_regs[0x42] & 1)) - { - return; - } - - for (n = 0; n < 256; n++) - { - //if(space.read_word(0x2c00 + 4*n) - { - blit_sprite(bitmap, cliprect, depth, 0x2c00 + 4 * n); - } - } -} - -uint32_t spg2xx_game_state::screen_update_vii(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) -{ - int i, x, y; - - bitmap.fill(0, cliprect); - - memset(m_screenram, 0, sizeof(m_screenram)); - - for (i = 0; i < 4; i++) - { - blit_page(bitmap, cliprect, i, 0x40 * m_video_regs[0x20], m_video_regs + 0x10); - blit_page(bitmap, cliprect, i, 0x40 * m_video_regs[0x21], m_video_regs + 0x16); - blit_sprites(bitmap, cliprect, i); - } - - for (y = 0; y < 240; y++) - { - for (x = 0; x < 320; x++) - { - bitmap.pix32(y, x) = (m_screenram[x + 320 * y].r << 16) | (m_screenram[x + 320 * y].g << 8) | m_screenram[x + 320 * y].b; - } - } - - return 0; -} - -/************************* * Machine Hardware * *************************/ -void spg2xx_game_state::do_dma(uint32_t len) -{ - address_space &mem = m_maincpu->space(AS_PROGRAM); - uint32_t src = m_video_regs[0x70]; - uint32_t dst = m_video_regs[0x71] + 0x2c00; - uint32_t j; - - for (j = 0; j < len; j++) - { - mem.write_word(dst + j, mem.read_word(src + j)); - } - - m_video_regs[0x72] = 0; - m_video_regs[0x63] |= 4; -} - -READ16_MEMBER(spg2xx_game_state::video_r) -{ - switch (offset) - { - case 0x62: // Video IRQ Enable - verboselog(0, "video_r: Video IRQ Enable: %04x\n", VII_VIDEO_IRQ_ENABLE); - return VII_VIDEO_IRQ_ENABLE; - - case 0x63: // Video IRQ Status - verboselog(0, "video_r: Video IRQ Status: %04x\n", VII_VIDEO_IRQ_STATUS); - return VII_VIDEO_IRQ_STATUS; - - default: - verboselog(0, "video_r: Unknown register %04x = %04x\n", 0x2800 + offset, m_video_regs[offset]); - break; - } - return m_video_regs[offset]; -} - -WRITE16_MEMBER(spg2xx_game_state::video_w) -{ - switch (offset) - { - case 0x10: case 0x16: // page 1,2 X scroll - data &= 0x01ff; - COMBINE_DATA(&m_video_regs[offset]); - break; - - case 0x11: case 0x17: // page 1,2 Y scroll - data &= 0x00ff; - COMBINE_DATA(&m_video_regs[offset]); - break; - case 0x36: // IRQ pos V - case 0x37: // IRQ pos H - data &= 0x01ff; - COMBINE_DATA(&m_video_regs[offset]); - break; - case 0x62: // Video IRQ Enable - verboselog(0, "video_w: Video IRQ Enable = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&VII_VIDEO_IRQ_ENABLE); - break; - - case 0x63: // Video IRQ Acknowledge - verboselog(0, "video_w: Video IRQ Acknowledge = %04x (%04x)\n", data, mem_mask); - VII_VIDEO_IRQ_STATUS &= ~data; - if (!VII_VIDEO_IRQ_STATUS) - { - m_maincpu->set_input_line(UNSP_IRQ0_LINE, CLEAR_LINE); - } - break; - - case 0x70: // Video DMA Source - verboselog(0, "video_w: Video DMA Source = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_video_regs[offset]); - break; - - case 0x71: // Video DMA Dest - verboselog(0, "video_w: Video DMA Dest = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_video_regs[offset]); - break; - - case 0x72: // Video DMA Length - verboselog(0, "video_w: Video DMA Length = %04x (%04x)\n", data, mem_mask); - do_dma(data); - break; - - default: - verboselog(0, "video_w: Unknown register %04x = %04x (%04x)\n", 0x2800 + offset, data, mem_mask); - COMBINE_DATA(&m_video_regs[offset]); - break; - } -} - -READ16_MEMBER(spg2xx_game_state::audio_r) -{ - switch (offset) - { - default: - verboselog(4, "audio_r: Unknown register %04x\n", 0x3000 + offset); - break; - } - return 0; -} - -WRITE16_MEMBER(spg2xx_game_state::audio_w) -{ - switch (offset) - { - default: - verboselog(4, "audio_w: Unknown register %04x = %04x (%04x)\n", 0x3000 + offset, data, mem_mask); - break; - } -} - void spg2xx_game_state::switch_bank(uint32_t bank) { if (bank != m_current_bank) @@ -649,385 +212,96 @@ void spg2xx_game_state::switch_bank(uint32_t bank) } } -uint16_t spg2xx_cart_state::do_spg243_vii_io(uint16_t what, int index) +WRITE8_MEMBER(spg2xx_game_state::eeprom_w) { - if (index == 1) - { - uint32_t bank = ((what & 0x80) >> 7) | ((what & 0x20) >> 4); - switch_bank(bank); - } - return what; + m_serial_eeprom[offset & 0x3ff] = data; } -uint16_t spg2xx_cart_state::do_spg243_vsmile_io(uint16_t what, int index) +READ8_MEMBER(spg2xx_game_state::eeprom_r) { - // TODO: find out how vsmile accesses these GPIO regs! - return what; + return m_serial_eeprom[offset & 0x3ff]; } -uint16_t spg2xx_game_state::do_spg243_batman_io(uint16_t what, int index) +READ8_MEMBER(spg2xx_game_state::uart_rx) { - if (index == 0) - { - uint16_t temp = m_io_p1->read(); - what |= (temp & 0x0001) ? 0x8000 : 0; - what |= (temp & 0x0002) ? 0x4000 : 0; - what |= (temp & 0x0004) ? 0x2000 : 0; - what |= (temp & 0x0008) ? 0x1000 : 0; - what |= (temp & 0x0010) ? 0x0800 : 0; - what |= (temp & 0x0020) ? 0x0400 : 0; - what |= (temp & 0x0040) ? 0x0200 : 0; - what |= (temp & 0x0080) ? 0x0100 : 0; - } - - if (index == 2) - { - // TODO: what is here? - } - - return what; + uint8_t val = m_controller_input[m_uart_rx_count]; + m_uart_rx_count = (m_uart_rx_count + 1) % 8; + return val; } -uint16_t spg2xx_game_state::do_spg240_rad_skat_io(uint16_t what, int index) +WRITE16_MEMBER(spg2xx_game_state::wireless60_porta_w) { - // have not checked for outputs yet. - - if (index == 0) - { - what = m_io_p1->read(); - } - else if (index == 1) + m_w60_porta_data = data & 0xf00; + switch (m_w60_porta_data & 0x300) { - what = m_io_p2->read(); - } - else if (index == 2) - { - what = m_io_p3->read(); - } - return what; -} + case 0x300: + m_w60_controller_input = -1; + break; -uint16_t spg2xx_game_state::do_spg243_wireless60_io(uint16_t what, int index) -{ - if (index == 0) - { - switch (what & 0x300) - { - case 0x300: - m_w60_controller_input = -1; - break; - - case 0x200: - m_w60_controller_input++; - break; - - default: - uint16_t temp1 = m_io_p1->read(); - uint16_t temp2 = m_io_p2->read(); - uint16_t temp3 = 1 << m_w60_controller_input; - if (temp1 & temp3) what ^= 0x400; - if (temp2 & temp3) what ^= 0x800; - break; - } - } + case 0x200: + m_w60_controller_input++; + break; - if (index == 1) - { - uint32_t bank = (what & 7); - switch_bank(bank); + default: + uint16_t temp1 = m_io_p1->read(); + uint16_t temp2 = m_io_p2->read(); + uint16_t temp3 = 1 << m_w60_controller_input; + if (temp1 & temp3) m_w60_porta_data ^= 0x400; + if (temp2 & temp3) m_w60_porta_data ^= 0x800; + break; } - - return what; } - -void spg2xx_game_state::do_gpio(uint32_t offset) +READ16_MEMBER(spg2xx_game_state::wireless60_porta_r) { - uint32_t index = (offset - 1) / 5; - uint16_t buffer = m_io_regs[5 * index + 2]; - uint16_t dir = m_io_regs[5 * index + 3]; - uint16_t attr = m_io_regs[5 * index + 4]; - uint16_t special = m_io_regs[5 * index + 5]; - - uint16_t push = dir; - uint16_t pull = (~dir) & (~attr); - uint16_t what = (buffer & (push | pull)); - what ^= (dir & ~attr); - what &= ~special; - - if (!m_vii_io_rw.isnull()) - what = m_vii_io_rw(what, index); - - m_io_regs[5 * index + 1] = what; + return m_w60_porta_data; } -void spg2xx_game_state::do_i2c() +WRITE16_MEMBER(spg2xx_game_state::wireless60_portb_w) { + switch_bank(data & 7); } -void spg2xx_game_state::spg_do_dma(uint32_t len) +WRITE16_MEMBER(spg2xx_cart_state::vii_portb_w) { - address_space &mem = m_maincpu->space(AS_PROGRAM); - - uint32_t src = ((m_io_regs[0x101] & 0x3f) << 16) | m_io_regs[0x100]; - uint32_t dst = m_io_regs[0x103] & 0x3fff; - uint32_t j; - - for (j = 0; j < len; j++) - mem.write_word(dst + j, mem.read_word(src + j)); - - m_io_regs[0x102] = 0; + if (data == 0x7c) machine().debug_break(); + switch_bank(((data & 0x80) >> 7) | ((data & 0x20) >> 4)); } -READ16_MEMBER(spg2xx_game_state::io_r) +READ16_MEMBER(spg2xx_game_state::jakks_porta_r) { - logerror("io_r %04x\n", offset); - - static const char *const gpioregs[] = { "GPIO Data Port", "GPIO Buffer Port", "GPIO Direction Port", "GPIO Attribute Port", "GPIO IRQ/Latch Port" }; - static const char gpioports[] = { 'A', 'B', 'C' }; - - uint16_t val = m_io_regs[offset]; - - switch (offset) - { - case 0x01: case 0x06: case 0x0b: // GPIO Data Port A/B/C - do_gpio(offset); - verboselog(3, "io_r: %s %c = %04x (%04x)\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], m_io_regs[offset], mem_mask); - val = m_io_regs[offset]; - break; - - case 0x02: case 0x03: case 0x04: case 0x05: - case 0x07: case 0x08: case 0x09: case 0x0a: - case 0x0c: case 0x0d: case 0x0e: case 0x0f: // Other GPIO regs - verboselog(3, "io_r: %s %c = %04x (%04x)\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], m_io_regs[offset], mem_mask); - break; - - case 0x1c: // Random - val = machine().rand() & 0x00ff; - verboselog(3, "io_r: Random = %04x (%04x)\n", val, mem_mask); - break; - - case 0x21: // IRQ Control - verboselog(3, "io_r: Controller IRQ Control = %04x (%04x)\n", val, mem_mask); - break; - - case 0x22: // IRQ Status - verboselog(3, "io_r: Controller IRQ Status = %04x (%04x)\n", val, mem_mask); - break; - - case 0x2b: - return 0x0000; - - case 0x2c: case 0x2d: // Timers? - val = machine().rand() & 0x0000ffff; - verboselog(3, "io_r: Unknown Timer %d Register = %04x (%04x)\n", offset - 0x2c, val, mem_mask); - break; - - case 0x2f: // Data Segment - val = m_maincpu->state_int(UNSP_SR) >> 10; - verboselog(3, "io_r: Data Segment = %04x (%04x)\n", val, mem_mask); - break; - - case 0x31: // Unknown, UART Status? - verboselog(3, "io_r: Unknown (UART Status?) = %04x (%04x)\n", 3, mem_mask); - val = 3; - break; - - case 0x36: // UART RX Data - val = m_controller_input[m_uart_rx_count]; - m_uart_rx_count = (m_uart_rx_count + 1) % 8; - verboselog(3, "io_r: UART RX Data = %04x (%04x)\n", val, mem_mask); - break; - - case 0x59: // I2C Status - verboselog(3, "io_r: I2C Status = %04x (%04x)\n", val, mem_mask); - break; - - case 0x5e: // I2C Data In - verboselog(3, "io_r: I2C Data In = %04x (%04x)\n", val, mem_mask); - break; - - default: - verboselog(3, "io_r: Unknown register %04x\n", 0x3d00 + offset); - break; - } - - return val; + const uint16_t temp = m_io_p1->read(); + uint16_t value = 0; + value |= (temp & 0x0001) ? 0x8000 : 0; + value |= (temp & 0x0002) ? 0x4000 : 0; + value |= (temp & 0x0004) ? 0x2000 : 0; + value |= (temp & 0x0008) ? 0x1000 : 0; + value |= (temp & 0x0010) ? 0x0800 : 0; + value |= (temp & 0x0020) ? 0x0400 : 0; + value |= (temp & 0x0040) ? 0x0200 : 0; + value |= (temp & 0x0080) ? 0x0100 : 0; + return value; } -WRITE16_MEMBER(spg2xx_game_state::io_w) +void spg2xx_game_state::nvram_default() { - static const char *const gpioregs[] = { "GPIO Data Port", "GPIO Buffer Port", "GPIO Direction Port", "GPIO Attribute Port", "GPIO IRQ/Latch Port" }; - static const char gpioports[3] = { 'A', 'B', 'C' }; - - uint16_t temp = 0; - - switch (offset) - { - case 0x00: // GPIO special function select - verboselog(3, "io_w: GPIO Function Select = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x01: case 0x06: case 0x0b: // GPIO data, port A/B/C - offset++; - // Intentional fallthrough - - case 0x02: case 0x03: case 0x04: case 0x05: // Port A - case 0x07: case 0x08: case 0x09: case 0x0a: // Port B - case 0x0c: case 0x0d: case 0x0e: case 0x0f: // Port C - verboselog(3, "io_w: %s %c = %04x (%04x)\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - do_gpio(offset); - break; - - case 0x10: // timebase control - if ((m_io_regs[offset] & 0x0003) != (data & 0x0003)) { - uint16_t hz = 8 << (data & 0x0003); - verboselog(3, "*** TMB1 FREQ set to %dHz\n", hz); - m_tmb1->adjust(attotime::zero, 0, attotime::from_hz(hz)); - } - if ((m_io_regs[offset] & 0x000c) != (data & 0x000c)) { - uint16_t hz = 128 << ((data & 0x000c) >> 2); - verboselog(3, "*** TMB2 FREQ set to %dHz\n", hz); - m_tmb2->adjust(attotime::zero, 0, attotime::from_hz(hz)); - } - COMBINE_DATA(&m_io_regs[offset]); - break; - case 0x21: // IRQ Enable - verboselog(3, "io_w: Controller IRQ Control = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&VII_CTLR_IRQ_ENABLE); - if (!VII_CTLR_IRQ_ENABLE) - { - m_maincpu->set_input_line(UNSP_IRQ3_LINE, CLEAR_LINE); - } - break; - - case 0x22: // IRQ Acknowledge - verboselog(3, "io_w: Controller IRQ Acknowledge = %04x (%04x)\n", data, mem_mask); - m_io_regs[0x22] &= ~data; - if (!m_io_regs[0x22]) - { - m_maincpu->set_input_line(UNSP_IRQ3_LINE, CLEAR_LINE); - } - break; - - case 0x2f: // Data Segment - temp = m_maincpu->state_int(UNSP_SR); - m_maincpu->set_state_int(UNSP_SR, (temp & 0x03ff) | ((data & 0x3f) << 10)); - verboselog(3, "io_w: Data Segment = %04x (%04x)\n", data, mem_mask); - break; - - case 0x31: // Unknown UART - verboselog(3, "io_w: Unknown UART = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x32: // UART Reset - verboselog(3, "io_w: UART Reset\n"); - break; - - case 0x33: // UART Baud Rate - verboselog(3, "io_w: UART Baud Rate = %u\n", 27000000 / 16 / (0x10000 - (m_io_regs[0x34] << 8) - data)); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x35: // UART TX Data - verboselog(3, "io_w: UART Baud Rate = %u\n", 27000000 / 16 / (0x10000 - (data << 8) - m_io_regs[0x33])); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x5a: // I2C Access Mode - verboselog(3, "io_w: I2C Access Mode = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x5b: // I2C Device Address - verboselog(3, "io_w: I2C Device Address = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x5c: // I2C Sub-Address - verboselog(3, "io_w: I2C Sub-Address = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x5d: // I2C Data Out - verboselog(3, "io_w: I2C Data Out = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x5e: // I2C Data In - verboselog(3, "io_w: I2C Data In = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x5f: // I2C Controller Mode - verboselog(3, "io_w: I2C Controller Mode = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x58: // I2C Command - verboselog(3, "io_w: I2C Command = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - do_i2c(); - break; - - case 0x59: // I2C Status / IRQ Acknowledge(?) - verboselog(3, "io_w: I2C Status / Ack = %04x (%04x)\n", data, mem_mask); - m_io_regs[offset] &= ~data; - break; - - case 0x100: // DMA Source (L) - case 0x101: // DMA Source (H) - case 0x103: // DMA Destination - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x102: // DMA Length - spg_do_dma(data); - break; - - default: - verboselog(3, "io_w: Unknown register %04x = %04x (%04x)\n", 0x3d00 + offset, data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - } + memset(&m_serial_eeprom[0], 0, 0x400); } -/* -WRITE16_MEMBER( spg2xx_game_state::rowscroll_w ) +void spg2xx_game_state::nvram_read(emu_file &file) { - switch(offset) - { - default: - verboselog(0, "rowscroll_w: %04x = %04x (%04x)\n", 0x2900 + offset, data, mem_mask); - break; - } + file.read(&m_serial_eeprom[0], 0x400); } -WRITE16_MEMBER( spg2xx_game_state::spriteram_w ) +void spg2xx_game_state::nvram_write(emu_file &file) { - switch(offset) - { - default: - verboselog(0, "spriteram_w: %04x = %04x (%04x)\n", 0x2c00 + offset, data, mem_mask); - break; - } + file.write(&m_serial_eeprom[0], 0x400); } -*/ -void spg2xx_game_state::vii_mem(address_map &map) +void spg2xx_game_state::mem_map(address_map &map) { map(0x000000, 0x3fffff).bankr("cart"); - - map(0x000000, 0x0027ff).ram().share("p_ram"); - map(0x002800, 0x0028ff).rw(FUNC(spg2xx_game_state::video_r), FUNC(spg2xx_game_state::video_w)); - map(0x002900, 0x002aff).ram().share("p_rowscroll"); - map(0x002b00, 0x002bff).ram().share("p_palette"); - map(0x002c00, 0x002fff).ram().share("p_spriteram"); - map(0x003000, 0x0037ff).rw(FUNC(spg2xx_game_state::audio_r), FUNC(spg2xx_game_state::audio_w)); - map(0x003d00, 0x003eff).rw(FUNC(spg2xx_game_state::io_r), FUNC(spg2xx_game_state::io_w)); + map(0x000000, 0x003fff).m(m_spg, FUNC(spg2xx_device::map)); } static INPUT_PORTS_START( vii ) @@ -1040,6 +314,15 @@ static INPUT_PORTS_START( vii ) PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_NAME("Button B") PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1) PORT_NAME("Button C") PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_PLAYER(1) PORT_NAME("Button D") + + PORT_START("MOTIONX") + PORT_BIT( 0x3ff, 0x200, IPT_PADDLE ) PORT_MINMAX(0x000, 0x3ff) PORT_SENSITIVITY(50) PORT_KEYDELTA(50) PORT_NAME("Motion Control X") + + PORT_START("MOTIONY") + PORT_BIT( 0x3ff, 0x200, IPT_PADDLE ) PORT_MINMAX(0x000, 0x3ff) PORT_SENSITIVITY(50) PORT_KEYDELTA(50) PORT_NAME("Motion Control Y") PORT_PLAYER(2) + + PORT_START("MOTIONZ") + PORT_BIT( 0x3ff, 0x200, IPT_PADDLE ) PORT_MINMAX(0x000, 0x3ff) PORT_SENSITIVITY(50) PORT_KEYDELTA(50) PORT_NAME("Motion Control Z") PORT_PLAYER(3) INPUT_PORTS_END static INPUT_PORTS_START( batman ) @@ -1248,33 +531,6 @@ static INPUT_PORTS_START( rad_crik ) PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN ) INPUT_PORTS_END -void spg2xx_game_state::test_centered(uint8_t *ROM) -{ - if (ROM[0x3cd808] == 0x99 && - ROM[0x3cd809] == 0x99 && - ROM[0x3cd80a] == 0x83 && - ROM[0x3cd80b] == 0x5e && - ROM[0x3cd80c] == 0x52 && - ROM[0x3cd80d] == 0x6b && - ROM[0x3cd80e] == 0x78 && - ROM[0x3cd80f] == 0x7f) - { - m_centered_coordinates = 0; - } -} - - - -TIMER_CALLBACK_MEMBER(spg2xx_game_state::tmb1_tick) -{ - m_io_regs[0x22] |= 1; -} - -TIMER_CALLBACK_MEMBER(spg2xx_game_state::tmb2_tick) -{ - m_io_regs[0x22] |= 2; -} - void spg2xx_cart_state::machine_start() { spg2xx_game_state::machine_start(); @@ -1291,8 +547,14 @@ void spg2xx_cart_state::machine_start() void spg2xx_game_state::machine_start() { - memset(m_video_regs, 0, 0x100 * sizeof(m_video_regs[0])); - memset(m_io_regs, 0, 0x200 * sizeof(m_io_regs[0])); + m_bank->configure_entries(0, ceilf((float)memregion("maincpu")->bytes() / 0x800000), memregion("maincpu")->base(), 0x800000); + m_bank->set_entry(0); + + m_serial_eeprom = std::make_unique<uint8_t[]>(0x400); +} + +void spg2xx_game_state::machine_reset() +{ m_current_bank = 0; m_controller_input[0] = 0; @@ -1300,91 +562,33 @@ void spg2xx_game_state::machine_start() m_controller_input[6] = 0xff; m_controller_input[7] = 0; m_w60_controller_input = -1; - - m_video_regs[0x36] = 0xffff; - m_video_regs[0x37] = 0xffff; - - m_tmb1 = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(spg2xx_game_state::tmb1_tick), this)); - m_tmb2 = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(spg2xx_game_state::tmb2_tick), this)); - m_tmb1->reset(); - m_tmb2->reset(); - - m_bank->configure_entries(0, ceilf((float)memregion("maincpu")->bytes() / 0x800000), memregion("maincpu")->base(), 0x800000); - m_bank->set_entry(0); + m_w60_porta_data = 0; } -void spg2xx_game_state::machine_reset() +WRITE_LINE_MEMBER(spg2xx_game_state::poll_controls) { -} + if (!state) + return; -INTERRUPT_GEN_MEMBER(spg2xx_game_state::vii_vblank) -{ - uint32_t x = machine().rand() & 0x3ff; - uint32_t y = machine().rand() & 0x3ff; - uint32_t z = machine().rand() & 0x3ff; + int32_t x = m_io_motionx ? ((int32_t)m_io_motionx->read() - 0x200) : 0; + int32_t y = m_io_motiony ? ((int32_t)m_io_motiony->read() - 0x200) : 0; + int32_t z = m_io_motionz ? ((int32_t)m_io_motionz->read() - 0x200) : 0; m_controller_input[0] = m_io_p1->read(); m_controller_input[1] = (uint8_t)x; m_controller_input[2] = (uint8_t)y; m_controller_input[3] = (uint8_t)z; m_controller_input[4] = 0; - x >>= 8; - y >>= 8; - z >>= 8; + x = (x >> 8) & 3; + y = (y >> 8) & 3; + z = (z >> 8) & 3; m_controller_input[5] = (z << 4) | (y << 2) | x; m_controller_input[6] = 0xff; m_controller_input[7] = 0; m_uart_rx_count = 0; - - VII_VIDEO_IRQ_STATUS = VII_VIDEO_IRQ_ENABLE & 1; - if (VII_VIDEO_IRQ_STATUS) - { - verboselog(0, "Video IRQ\n"); - m_maincpu->set_input_line(UNSP_IRQ0_LINE, ASSERT_LINE); - } - - // { - // verboselog(0, "audio 1 IRQ\n"); - // m_maincpu->set_input_line(UNSP_IRQ1_LINE, ASSERT_LINE); - // } - if (m_io_regs[0x22] & m_io_regs[0x21] & 0x0c00) - { - verboselog(0, "timerA, timer B IRQ\n"); - m_maincpu->set_input_line(UNSP_IRQ2_LINE, ASSERT_LINE); - } - - //if(m_io_regs[0x22] & m_io_regs[0x21] & 0x2100) - // For now trigger always if any enabled - if (VII_CTLR_IRQ_ENABLE) - { - verboselog(0, "UART, ADC IRQ\n"); - m_maincpu->set_input_line(UNSP_IRQ3_LINE, ASSERT_LINE); - } - // { - // verboselog(0, "audio 4 IRQ\n"); - // m_maincpu->set_input_line(UNSP_IRQ4_LINE, ASSERT_LINE); - // } - - if (m_io_regs[0x22] & m_io_regs[0x21] & 0x1200) - { - verboselog(0, "External IRQ\n"); - m_maincpu->set_input_line(UNSP_IRQ5_LINE, ASSERT_LINE); - } - if (m_io_regs[0x22] & m_io_regs[0x21] & 0x0070) - { - verboselog(0, "1024Hz, 2048HZ, 4096HZ IRQ\n"); - m_maincpu->set_input_line(UNSP_IRQ6_LINE, ASSERT_LINE); - } - if (m_io_regs[0x22] & m_io_regs[0x21] & 0x008b) - { - verboselog(0, "TMB1, TMB2, 4Hz, key change IRQ\n"); - m_maincpu->set_input_line(UNSP_IRQ7_LINE, ASSERT_LINE); - } } - - DEVICE_IMAGE_LOAD_MEMBER(spg2xx_cart_state, vii_cart) { uint32_t size = m_cart->common_get_size("rom"); @@ -1398,8 +602,6 @@ DEVICE_IMAGE_LOAD_MEMBER(spg2xx_cart_state, vii_cart) m_cart->rom_alloc(size, GENERIC_ROM16_WIDTH, ENDIANNESS_LITTLE); m_cart->common_load_rom(m_cart->get_rom_base(), size, "rom"); - test_centered(m_cart->get_rom_base()); - return image_init_result::PASS; } @@ -1413,74 +615,111 @@ DEVICE_IMAGE_LOAD_MEMBER(spg2xx_cart_state, vsmile_cart) return image_init_result::PASS; } -MACHINE_CONFIG_START(spg2xx_game_state::spg2xx_base) - MCFG_DEVICE_ADD( "maincpu", UNSP, XTAL(27'000'000)) - MCFG_DEVICE_PROGRAM_MAP( vii_mem ) - MCFG_DEVICE_VBLANK_INT_DRIVER("screen", spg2xx_game_state, vii_vblank) +void spg2xx_game_state::spg2xx_base(machine_config &config) +{ + UNSP(config, m_maincpu, XTAL(27'000'000)); + m_maincpu->set_addrmap(AS_PROGRAM, &spg2xx_game_state::mem_map); - MCFG_SCREEN_ADD( "screen", RASTER ) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_SIZE(320, 240) - MCFG_SCREEN_VISIBLE_AREA(0, 320-1, 0, 240-1) - MCFG_SCREEN_UPDATE_DRIVER(spg2xx_game_state, screen_update_vii) - MCFG_PALETTE_ADD("palette", 32768) -MACHINE_CONFIG_END + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_refresh_hz(60); + m_screen->set_size(320, 262); + m_screen->set_visarea(0, 320-1, 0, 240-1); + m_screen->set_screen_update("spg", FUNC(spg2xx_device::screen_update)); + m_screen->screen_vblank().set(m_spg, FUNC(spg2xx_device::vblank)); + m_screen->screen_vblank().append(FUNC(spg2xx_game_state::poll_controls)); +} -MACHINE_CONFIG_START(spg2xx_game_state::spg2xx_basep) +void spg2xx_game_state::non_spg_base(machine_config &config) +{ spg2xx_base(config); - MCFG_SCREEN_MODIFY( "screen" ) - MCFG_SCREEN_REFRESH_RATE(50) -MACHINE_CONFIG_END - + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen); +} -MACHINE_CONFIG_START(spg2xx_cart_state::vii) +void spg2xx_game_state::spg2xx_basep(machine_config &config) +{ spg2xx_base(config); - MCFG_GENERIC_CARTSLOT_ADD("cartslot", generic_plain_slot, "vii_cart") - MCFG_GENERIC_WIDTH(GENERIC_ROM16_WIDTH) - MCFG_GENERIC_LOAD(spg2xx_cart_state, vii_cart) - MCFG_SOFTWARE_LIST_ADD("vii_cart","vii") -MACHINE_CONFIG_END + m_screen->set_refresh_hz(50); + m_screen->set_size(320, 312); +} -MACHINE_CONFIG_START(spg2xx_cart_state::vsmile) +void spg2xx_cart_state::vii(machine_config &config) +{ spg2xx_base(config); - MCFG_GENERIC_CARTSLOT_ADD("cartslot", generic_plain_slot, "vsmile_cart") - MCFG_GENERIC_WIDTH(GENERIC_ROM16_WIDTH) - MCFG_GENERIC_LOAD(spg2xx_cart_state, vsmile_cart) - MCFG_SOFTWARE_LIST_ADD("cart_list","vsmile_cart") -MACHINE_CONFIG_END + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen); + m_spg->uart_rx().set(FUNC(spg2xx_cart_state::uart_rx)); + m_spg->portb_out().set(FUNC(spg2xx_cart_state::vii_portb_w)); + + GENERIC_CARTSLOT(config, m_cart, generic_plain_slot, "vii_cart"); + m_cart->set_width(GENERIC_ROM16_WIDTH); + m_cart->set_device_load(device_image_load_delegate(&spg2xx_cart_state::device_image_load_vii_cart, this)); + + SOFTWARE_LIST(config, "vii_cart").set_original("vii"); +} -void spg2xx_game_state::batman(machine_config &config) +void spg2xx_cart_state::vsmile(machine_config &config) { spg2xx_base(config); - I2CMEM(config, "i2cmem", 0).set_data_size(0x200); -} + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen); + m_spg->uart_rx().set(FUNC(spg2xx_cart_state::uart_rx)); -void spg2xx_cart_state::init_vii() + GENERIC_CARTSLOT(config, m_cart, generic_plain_slot, "vsmile_cart"); + m_cart->set_width(GENERIC_ROM16_WIDTH); + m_cart->set_device_load(device_image_load_delegate(&spg2xx_cart_state::device_image_load_vsmile_cart, this)); + + SOFTWARE_LIST(config, "cart_list").set_original("vsmile_cart"); +} + +void spg2xx_game_state::wireless60(machine_config &config) { - m_vii_io_rw = vii_io_rw_delegate(&spg2xx_cart_state::do_spg243_vii_io, this); - m_centered_coordinates = 1; + spg2xx_base(config); + + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen); + m_spg->uart_rx().set(FUNC(spg2xx_game_state::uart_rx)); + + m_spg->porta_out().set(FUNC(spg2xx_game_state::wireless60_porta_w)); + m_spg->portb_out().set(FUNC(spg2xx_game_state::wireless60_portb_w)); + m_spg->porta_in().set(FUNC(spg2xx_game_state::wireless60_porta_r)); } -void spg2xx_cart_state::init_vsmile() +void spg2xx_game_state::jakks(machine_config &config) { - m_vii_io_rw = vii_io_rw_delegate(&spg2xx_cart_state::do_spg243_vsmile_io, this); - m_centered_coordinates = 1; + spg2xx_base(config); + + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen); + m_spg->uart_rx().set(FUNC(spg2xx_game_state::uart_rx)); + m_spg->porta_in().set(FUNC(spg2xx_cart_state::jakks_porta_r)); + + I2CMEM(config, "i2cmem", 0).set_data_size(0x200); } -void spg2xx_game_state::init_batman() +void spg2xx_game_state::rad_skat(machine_config &config) { - m_vii_io_rw = vii_io_rw_delegate(&spg2xx_game_state::do_spg243_batman_io, this); - m_centered_coordinates = 1; + spg2xx_base(config); + + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen); + m_spg->uart_rx().set(FUNC(spg2xx_game_state::uart_rx)); + m_spg->porta_in().set_ioport("P1"); + m_spg->portb_in().set_ioport("P2"); + m_spg->portc_in().set_ioport("P3"); + m_spg->eeprom_w().set(FUNC(spg2xx_game_state::eeprom_w)); + m_spg->eeprom_r().set(FUNC(spg2xx_game_state::eeprom_r)); } -void spg2xx_game_state::init_rad_skat() +void spg2xx_game_state::rad_crik(machine_config &config) { - m_vii_io_rw = vii_io_rw_delegate(&spg2xx_game_state::do_spg240_rad_skat_io, this); - m_centered_coordinates = 1; + spg2xx_base(config); + + SPG28X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen); + m_spg->uart_rx().set(FUNC(spg2xx_game_state::uart_rx)); + m_spg->porta_in().set_ioport("P1"); + m_spg->portb_in().set_ioport("P2"); + m_spg->portc_in().set_ioport("P3"); + m_spg->eeprom_w().set(FUNC(spg2xx_game_state::eeprom_w)); + m_spg->eeprom_r().set(FUNC(spg2xx_game_state::eeprom_r)); } READ16_MEMBER(spg2xx_game_state::rad_crik_hack_r) @@ -1494,25 +733,8 @@ READ16_MEMBER(spg2xx_game_state::rad_crik_hack_r) void spg2xx_game_state::init_rad_crik() { - m_maincpu->space(AS_PROGRAM).install_writeonly(0x5800, 0x5bff, m_p_spriteram); // is this due to a CPU or DMA bug? 5800 == 2c00 << 1 - // not 100% sure what this is waiting on, could be eeprom as it seems to end up here frequently during the eeprom test, patch running code, not ROM, so that checksum can still pass m_maincpu->space(AS_PROGRAM).install_read_handler(0xf851, 0xf851, read16_delegate(FUNC(spg2xx_game_state::rad_crik_hack_r),this)); - - m_vii_io_rw = vii_io_rw_delegate(&spg2xx_game_state::do_spg240_rad_skat_io, this); - m_centered_coordinates = 1; -} - -void spg2xx_game_state::init_walle() -{ - m_vii_io_rw = vii_io_rw_delegate(&spg2xx_game_state::do_spg243_batman_io, this); - m_centered_coordinates = 0; -} - -void spg2xx_game_state::init_wirels60() -{ - m_vii_io_rw = vii_io_rw_delegate(&spg2xx_game_state::do_spg243_wireless60_io, this); - m_centered_coordinates = 1; } ROM_START( vii ) @@ -1601,7 +823,7 @@ System: Wireless Air 60 ROM: Toshiba TC58NVG0S3ETA00 RAM: ESMT M12L128168A -This is a RAW NAND FLASH DUMP +This is a raw NAND flash dump Interesting Strings: @@ -1622,7 +844,7 @@ ROM_START( wlsair60 ) ROM_END /* -Wireless +Wireless: Hunting Video Game System (info provided with dump) System: Wireless Hunting Video Game System @@ -1697,40 +919,37 @@ which is also found in the Wireless Air 60 ROM. */ -ROM_START( wireless ) +ROM_START( wrlshunt ) ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD16_WORD_SWAP( "wireless.bin", 0x0000, 0x8000000, CRC(a6ecc20e) SHA1(3645f23ba2bb218e92d4560a8ae29dddbaabf796) ) ROM_END -// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS +// year, name, parent, compat, machine, input, class, init, company, fullname, flags // VTech systems -CONS( 2005, vsmile, 0, 0, vsmile, vsmile, spg2xx_cart_state, init_vsmile, "VTech", "V.Smile (US)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -CONS( 2005, vsmileg, vsmile, 0, vsmile, vsmile, spg2xx_cart_state, init_vsmile, "VTech", "V.Smile (Germany)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -CONS( 2005, vsmilef, vsmile, 0, vsmile, vsmile, spg2xx_cart_state, init_vsmile, "VTech", "V.Smile (France)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -CONS( 2005, vsmileb, 0, 0, vsmile, vsmile, spg2xx_cart_state, init_vsmile, "VTech", "V.Smile Baby (US)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) +CONS( 2005, vsmile, 0, 0, vsmile, vsmile, spg2xx_cart_state, empty_init, "VTech", "V.Smile (US)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) +CONS( 2005, vsmileg, vsmile, 0, vsmile, vsmile, spg2xx_cart_state, empty_init, "VTech", "V.Smile (Germany)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) +CONS( 2005, vsmilef, vsmile, 0, vsmile, vsmile, spg2xx_cart_state, empty_init, "VTech", "V.Smile (France)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) +CONS( 2005, vsmileb, 0, 0, vsmile, vsmile, spg2xx_cart_state, empty_init, "VTech", "V.Smile Baby (US)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -// Jungle Soft TV games -CONS( 2007, vii, 0, 0, vii, vii, spg2xx_cart_state, init_vii, "Jungle Soft / KenSingTon / Chintendo / Siatronics", "Vii", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) // some games run, others crash - -CONS( 2010, zone60, 0, 0, spg2xx_base, wirels60, spg2xx_game_state, init_wirels60, "Jungle Soft / Ultimate Products (HK) Ltd", "Zone 60", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) -CONS( 2010, wirels60, 0, 0, spg2xx_base, wirels60, spg2xx_game_state, init_wirels60, "Jungle Soft / Kids Station Toys Inc", "Wireless 60", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +// Jungle's Soft TV games +CONS( 2007, vii, 0, 0, vii, vii, spg2xx_cart_state, empty_init, "Jungle's Soft / KenSingTon / Siatronics", "Vii", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // motion controls are awkward, but playable for the most part +CONS( 2010, zone60, 0, 0, wireless60, wirels60, spg2xx_game_state, empty_init, "Jungle's Soft / Ultimate Products (HK) Ltd", "Zone 60", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +CONS( 2010, wirels60, 0, 0, wireless60, wirels60, spg2xx_game_state, empty_init, "Jungle's Soft / Kids Station Toys Inc", "Wireless 60", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // JAKKS Pacific Inc TV games -CONS( 2004, batmantv, 0, 0, batman, batman, spg2xx_game_state, init_batman, "JAKKS Pacific Inc / HotGen Ltd", "The Batman", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) -CONS( 2008, walle, 0, 0, batman, walle, spg2xx_game_state, init_walle, "JAKKS Pacific Inc", "Wall-E", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +CONS( 2004, batmantv, 0, 0, jakks, batman, spg2xx_game_state, empty_init, "JAKKS Pacific Inc / HotGen Ltd", "The Batman", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +CONS( 2008, walle, 0, 0, jakks, walle, spg2xx_game_state, empty_init, "JAKKS Pacific Inc", "Wall-E", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // Radica TV games -CONS( 2006, rad_skat, 0, 0, spg2xx_base, rad_skat, spg2xx_game_state, init_rad_skat, "Radica", "Play TV Skateboarder (NTSC)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) -CONS( 2006, rad_skatp, rad_skat,0, spg2xx_basep,rad_skatp,spg2xx_game_state, init_rad_skat, "Radica", "Connectv Skateboarder (PAL)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) - -CONS( 2006, rad_crik, 0, 0, spg2xx_basep,rad_crik, spg2xx_game_state, init_rad_crik, "Radica", "Connectv Cricket (PAL)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) // Version 3.00 20/03/06 is listed in INTERNAL TEST - -CONS( 2007, rad_sktv, 0, 0, spg2xx_base, rad_sktv, spg2xx_game_state, init_rad_skat, "Radica", "Skannerz TV", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) - +CONS( 2006, rad_skat, 0, 0, rad_skat, rad_skat, spg2xx_game_state, empty_init, "Radica", "Play TV Skateboarder (NTSC)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +CONS( 2006, rad_skatp, rad_skat, 0, rad_skat, rad_skatp, spg2xx_game_state, empty_init, "Radica", "Connectv Skateboarder (PAL)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +CONS( 2006, rad_crik, 0, 0, rad_crik, rad_crik, spg2xx_game_state, empty_init, "Radica", "Connectv Cricket (PAL)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) // Version 3.00 20/03/06 is listed in INTERNAL TEST +CONS( 2007, rad_sktv, 0, 0, rad_skat, rad_sktv, spg2xx_game_state, empty_init, "Radica", "Skannerz TV", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) // might not fit here. First 0x8000 bytes are blank (not too uncommon for these) then rest of rom looks like it's probably encrypted at least -CONS( 2009, zone40, 0, 0, spg2xx_base, wirels60, spg2xx_game_state, init_wirels60, "Jungle Soft / Ultimate Products (HK) Ltd", "Zone 40", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) -// might not fit here, NAND dump, has internal bootstrap at least, see above. -CONS( 2010, wlsair60, 0, 0, spg2xx_base, wirels60, spg2xx_game_state, init_wirels60, "Jungle Soft / Kids Station Toys Inc", "Wireless Air 60", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) -CONS( 2011, wireless, 0, 0, spg2xx_base, wirels60, spg2xx_game_state, init_wirels60, "Hamy / Kids Station Toys Inc", "Wireless", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +CONS( 2009, zone40, 0, 0, non_spg_base, wirels60, spg2xx_game_state, empty_init, "Jungle Soft / Ultimate Products (HK) Ltd", "Zone 40", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) + +// NAND dumps w/ internal bootstrap. Almost certainly do not fit in this driver, as the SPG2xx can only address up to 4Mwords. +CONS( 2010, wlsair60, 0, 0, non_spg_base, wirels60, spg2xx_game_state, empty_init, "Jungle Soft / Kids Station Toys Inc", "Wireless Air 60", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +CONS( 2011, wrlshunt, 0, 0, non_spg_base, wirels60, spg2xx_game_state, empty_init, "Hamy / Kids Station Toys Inc", "Wireless: Hunting Video Game System", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) diff --git a/src/mame/drivers/viper.cpp b/src/mame/drivers/viper.cpp index 5e4e5ccc612..3581c9667b3 100644 --- a/src/mame/drivers/viper.cpp +++ b/src/mame/drivers/viper.cpp @@ -81,7 +81,7 @@ boxingm Goes to attract mode when ran with memory card check. Coins up. code1d,b RTC self check bad gticlub2 Attract mode works. Coins up. Hangs in car selection. - gticlub2ea Doesn't boot: bad CHD? + gticlub2ea Asks for password. jpark3 POST?: Shows "Now loading..." then black screen (sets global timer 1 on EPIC) - with IRQ3 crashes at first 3d frame mocapglf Security code error mocapb,j Crash after self checks @@ -2553,8 +2553,8 @@ ROM_START(gticlub2ea) //* ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00) /* M48T58 Timekeeper NVRAM */ ROM_LOAD("941eaa_nvram.u39", 0x00000, 0x2000, BAD_DUMP CRC(5ee7004d) SHA1(92e0ce01049308f459985d466fbfcfac82f34a47)) - DISK_REGION( "ata:0:hdd:image" ) - DISK_IMAGE( "941a02", 0, NO_DUMP ) + DISK_REGION( "ata:0:hdd:image" ) // 32 MB Memory Card labeled 941 EA A02 + DISK_IMAGE( "941a02", 0, SHA1(dd180ad92dd344b38f160e31833077e342cee38d) ) // with ATA id included ROM_END /* This CF card has sticker B41C02 */ diff --git a/src/mame/drivers/wangpc.cpp b/src/mame/drivers/wangpc.cpp index d77a2d3b48d..5126269d9c3 100644 --- a/src/mame/drivers/wangpc.cpp +++ b/src/mame/drivers/wangpc.cpp @@ -1326,9 +1326,9 @@ MACHINE_CONFIG_START(wangpc_state::wangpc) m_epci->dtr_handler().set(RS232_TAG, FUNC(rs232_port_device::write_dtr)); m_epci->txemt_dschg_handler().set(FUNC(wangpc_state::epci_irq_w)); - MCFG_UPD765A_ADD(UPD765_TAG, false, false) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, wangpc_state, fdc_irq)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, wangpc_state, fdc_drq)) + UPD765A(config, m_fdc, false, false); + m_fdc->intrq_wr_callback().set(FUNC(wangpc_state::fdc_irq)); + m_fdc->drq_wr_callback().set(FUNC(wangpc_state::fdc_drq)); MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", wangpc_floppies, "525dd", wangpc_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", wangpc_floppies, "525dd", wangpc_state::floppy_formats) diff --git a/src/mame/drivers/wecleman.cpp b/src/mame/drivers/wecleman.cpp index a6775273d0c..5cf1db7c6e8 100644 --- a/src/mame/drivers/wecleman.cpp +++ b/src/mame/drivers/wecleman.cpp @@ -1297,7 +1297,7 @@ ROM_END ROM_START( weclemanb ) ROM_REGION( 0x40000, "maincpu", 0 ) /* Main CPU Code */ - // I doubt these labels are correct, or one set of roms is bad (17h and 23h differ slightly from parent) + // This set has been hacked, set was provided using same labels as weclemana ROM_LOAD16_BYTE( "602f08.17h", 0x00000, 0x10000, CRC(43241265) SHA1(3da1ed0d15b03845c07f07ec6838ce160d81633d) ) // sldh ROM_LOAD16_BYTE( "602f11.23h", 0x00001, 0x10000, CRC(3ea7dae0) SHA1(d33d67f4cc65a7680e5f43407136b75512a10230) ) // sldh ROM_LOAD16_BYTE( "602a09.18h", 0x20000, 0x10000, CRC(8a9d756f) SHA1(12605e86ce29e6300b5400720baac7b0293d9e66) ) @@ -1750,8 +1750,8 @@ void wecleman_state::init_hotchase() ***************************************************************************/ GAMEL( 1986, wecleman, 0, wecleman, wecleman, wecleman_state, init_wecleman, ROT0, "Konami", "WEC Le Mans 24 (v2.01)", 0, layout_wecleman ) -GAMEL( 1986, weclemana, wecleman, wecleman, wecleman, wecleman_state, init_wecleman, ROT0, "Konami", "WEC Le Mans 24 (v2.00, set 1)", 0, layout_wecleman ) -GAMEL( 1986, weclemanb, wecleman, wecleman, wecleman, wecleman_state, init_wecleman, ROT0, "Konami", "WEC Le Mans 24 (v2.00, set 2)", 0, layout_wecleman ) // 1988 release (maybe date hacked?) +GAMEL( 1986, weclemana, wecleman, wecleman, wecleman, wecleman_state, init_wecleman, ROT0, "Konami", "WEC Le Mans 24 (v2.00)", 0, layout_wecleman ) +GAMEL( 1988, weclemanb, wecleman, wecleman, wecleman, wecleman_state, init_wecleman, ROT0, "hack", "WEC Le Mans 24 (v2.00, hack)", 0, layout_wecleman ) // small section of code inserted, year changed to 1988 GAMEL( 1986, weclemanc, wecleman, wecleman, wecleman, wecleman_state, init_wecleman, ROT0, "Konami", "WEC Le Mans 24 (v1.26)", 0, layout_wecleman ) // a version 1.21 is known to exist too, see https://www.youtube.com/watch?v=4l8vYJi1OeU diff --git a/src/mame/drivers/witch.cpp b/src/mame/drivers/witch.cpp index 5a26bd4ffa9..1331bf72cf1 100644 --- a/src/mame/drivers/witch.cpp +++ b/src/mame/drivers/witch.cpp @@ -1172,8 +1172,8 @@ void witch_state::init_witch() m_subcpu->space(AS_PROGRAM).install_read_handler(0x7000, 0x700f, read8_delegate(FUNC(witch_state::prot_read_700x), this)); } -GAME( 1987, keirinou, 0, keirinou, keirinou, keirinou_state, empty_init, ROT0, "Excellent System", "Keirin Ou", MACHINE_SUPPORTS_SAVE ) -GAME( 1992, witch, 0, witch, witch, witch_state, init_witch, ROT0, "Excellent System", "Witch", MACHINE_SUPPORTS_SAVE ) -GAME( 1992, witchb, witch, witch, witch, witch_state, init_witch, ROT0, "Excellent System", "Witch (With ranking)", MACHINE_SUPPORTS_SAVE ) -GAME( 1992, witchs, witch, witch, witch, witch_state, init_witch, ROT0, "Sega / Vic Tokai", "Witch (Sega License)", MACHINE_SUPPORTS_SAVE ) +GAME( 1987, keirinou, 0, keirinou, keirinou, keirinou_state, empty_init, ROT0, "Excellent System", "Keirin Ou", MACHINE_SUPPORTS_SAVE ) +GAME( 1992, witch, 0, witch, witch, witch_state, init_witch, ROT0, "Vic Tokai (Excellent System license)", "Witch", MACHINE_SUPPORTS_SAVE ) +GAME( 1992, witchb, witch, witch, witch, witch_state, init_witch, ROT0, "Vic Tokai (Excellent System license)", "Witch (with ranking)", MACHINE_SUPPORTS_SAVE ) +GAME( 1992, witchs, witch, witch, witch, witch_state, init_witch, ROT0, "Vic Tokai (Sega license)", "Witch (Sega license)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, pbchmp95, witch, witch, witch, witch_state, init_witch, ROT0, "Veltmeijer Automaten", "Pinball Champ '95", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/wpc_95.cpp b/src/mame/drivers/wpc_95.cpp index fe2978c1ea4..10c949b0d37 100644 --- a/src/mame/drivers/wpc_95.cpp +++ b/src/mame/drivers/wpc_95.cpp @@ -2475,6 +2475,19 @@ ROM_START(congo_11) ROM_LOAD16_BYTE("cgs4v1_0.rom", 0x400000, 0x100000, CRC(2a1980e7) SHA1(0badf27c2b8bc7b0074dc5e606d64490470bc108)) ROM_END +ROM_START(congo_11s10) + ROM_REGION(0x100000, "maincpu", 0) + ROM_LOAD("cong1_10.rom", 0x00000, 0x80000, CRC(b0b0ffd9) SHA1(26343f3bfbacf85b3f4db5aa3dad39216311a2da)) + ROM_RELOAD(0x80000, 0x80000) + ROM_REGION16_LE(0x1000000, "dcs", ROMREGION_ERASEFF) + ROM_LOAD16_BYTE("su2-100.rom", 0x000000, 0x80000, CRC(c4b59ac9) SHA1(a0bc5150120777c771a181496ced71bd3f92a311)) + ROM_LOAD16_BYTE("su3-100.rom", 0x200000, 0x80000, CRC(1d4dbc9a) SHA1(3fac6ffb1af806d1dfcf71d85b0be21e7ea4b8d2)) + ROM_LOAD16_BYTE("su4-100.rom", 0x400000, 0x80000, CRC(a3e9fd93) SHA1(7d767ddf22080f9886621a5130929d7afce90472)) + ROM_LOAD16_BYTE("su5-100.rom", 0x600000, 0x80000, CRC(c397b3f6) SHA1(ef4cc5a08a55ae941f42d2b02213cc5c85d67b43)) + ROM_LOAD16_BYTE("su6-100.rom", 0x800000, 0x80000, CRC(f89a29a2) SHA1(63f69ae6a886d9eac44627edd5ee561bdb3dd418)) + ROM_LOAD16_BYTE("su7-100.rom", 0xa00000, 0x80000, CRC(d1244d35) SHA1(7c5b3fcf8a35c417c778cd9bc741b92aaffeb444)) +ROM_END + /*----------------- / Junk Yard #50052 /------------------*/ @@ -3053,6 +3066,7 @@ GAME(1995, congo_21, 0, wpc_95, congo, wpc_95_state, init_congo, GAME(1995, congo_20, congo_21, wpc_95, congo, wpc_95_state, init_congo, ROT0, "Williams", "Congo (2.0)", MACHINE_MECHANICAL) GAME(1995, congo_13, congo_21, wpc_95, congo, wpc_95_state, init_congo, ROT0, "Williams", "Congo (1.3)", MACHINE_MECHANICAL) GAME(1995, congo_11, congo_21, wpc_95, congo, wpc_95_state, init_congo, ROT0, "Williams", "Congo (1.1)", MACHINE_MECHANICAL) +GAME(1995, congo_11s10,congo_21, wpc_95, congo, wpc_95_state, init_congo, ROT0, "Williams", "Congo (1.1, DCS sound 1.0)", MACHINE_MECHANICAL) GAME(1996, jy_12, 0, wpc_95, jy, wpc_95_state, init_jy, ROT0, "Williams", "Junk Yard (1.2)", MACHINE_MECHANICAL) GAME(1996, jy_11, jy_12, wpc_95, jy, wpc_95_state, init_jy, ROT0, "Williams", "Junk Yard (1.1)", MACHINE_MECHANICAL) GAME(1996, jy_03, jy_12, wpc_95, jy, wpc_95_state, init_jy, ROT0, "Williams", "Junk Yard (0.3)", MACHINE_MECHANICAL) diff --git a/src/mame/drivers/wpc_s.cpp b/src/mame/drivers/wpc_s.cpp index 6df1c12ec47..24b754c81e6 100644 --- a/src/mame/drivers/wpc_s.cpp +++ b/src/mame/drivers/wpc_s.cpp @@ -2141,6 +2141,17 @@ ROM_START(jb_10b) ROM_LOAD16_BYTE("jbsnd_u6.rom", 0x800000, 0x080000, CRC(7a1e2c3d) SHA1(0c6ccb937328509cb0a87e4c557a64c13bbed2db)) ROM_END +ROM_START(jb_04a) // WPC-S 5-Board + ROM_REGION(0x80000, "maincpu", 0) + ROM_LOAD("jack0_4a.rom", 0x00000, 0x80000, CRC(cc02e024) SHA1(5de886e4631c3c99b83f6692482259e2a6bf0bca)) + ROM_REGION16_LE(0x1000000, "dcs", ROMREGION_ERASEFF) + ROM_LOAD16_BYTE("jbsnd_04a.u2", 0x000000, 0x080000, CRC(f90ebf0f) SHA1(d18362c1946504dd456f6edc28bb5812d584874a)) + ROM_LOAD16_BYTE("jbsnd_u3.rom", 0x200000, 0x080000, CRC(76ad3aad) SHA1(012b44c48d1cbb282eb763e40db40b141397f426)) + ROM_LOAD16_BYTE("jbsnd_u4.rom", 0x400000, 0x080000, CRC(038b1309) SHA1(a6e337476902ed9ec5123fe4e088a0608c0d5f48)) + ROM_LOAD16_BYTE("jbsnd_u5.rom", 0x600000, 0x080000, CRC(0957e2ad) SHA1(0fb4e3fdb949b0979721064162a41cfba84d0013)) + ROM_LOAD16_BYTE("jbsnd_u6.rom", 0x800000, 0x080000, CRC(7a1e2c3d) SHA1(0c6ccb937328509cb0a87e4c557a64c13bbed2db)) +ROM_END + /*----------------- / Johnny Mnemonic #50042 /------------------*/ @@ -2753,6 +2764,7 @@ GAME(1995, i500_10r, i500_11r, wpc_s, i500, wpc_s_state, init_i500, ROT0 GAME(1995, i500_11b, i500_11r, wpc_s, i500, wpc_s_state, init_i500, ROT0, "Bally", "Indianapolis 500 (1.1 Belgium)", MACHINE_MECHANICAL) GAME(1995, jb_10r, 0, wpc_s, jb, wpc_s_state, init_jb, ROT0, "Williams", "Jack*Bot (1.0R)", MACHINE_MECHANICAL) GAME(1995, jb_10b, jb_10r, wpc_s, jb, wpc_s_state, init_jb, ROT0, "Williams", "Jack*Bot (1.0B) (Belgium/Canada)", MACHINE_MECHANICAL) +GAME(1995, jb_04a, jb_10r, wpc_s, jb, wpc_s_state, init_jb, ROT0, "Williams", "Jack*Bot (0.4A prototype)", MACHINE_MECHANICAL) GAME(1995, jm_12r, 0, wpc_s, jm, wpc_s_state, init_jm, ROT0, "Williams", "Johnny Mnemonic (1.2R)", MACHINE_MECHANICAL) GAME(1995, jm_12b, jm_12r, wpc_s, jm, wpc_s_state, init_jm, ROT0, "Williams", "Johnny Mnemonic (1.2B) Belgium", MACHINE_MECHANICAL) GAME(1995, jm_05r, jm_12r, wpc_s, jm, wpc_s_state, init_jm, ROT0, "Williams", "Johnny Mnemonic (0.5R)", MACHINE_MECHANICAL) diff --git a/src/mame/drivers/xbox.cpp b/src/mame/drivers/xbox.cpp index fa93e2c975a..1822dbe3419 100644 --- a/src/mame/drivers/xbox.cpp +++ b/src/mame/drivers/xbox.cpp @@ -10,8 +10,9 @@ #include "emu.h" -#include "includes/xbox.h" +#include "machine/pci.h" #include "includes/xbox_pci.h" +#include "includes/xbox.h" #include "cpu/i386/i386.h" #include "machine/atapicdr.h" diff --git a/src/mame/drivers/z100.cpp b/src/mame/drivers/z100.cpp index e911fa4e3bd..f502eb087b6 100644 --- a/src/mame/drivers/z100.cpp +++ b/src/mame/drivers/z100.cpp @@ -744,5 +744,5 @@ void z100_state::driver_init() /* Driver */ -// YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS -COMP( 1982, z100, 0, 0, z100, z100, z100_state, driver_init, "Zenith", "Z-100", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +// YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS +COMP( 1982, z100, 0, 0, z100, z100, z100_state, driver_init, "Zenith Data Systems", "Z-100", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) diff --git a/src/mame/includes/bbc.h b/src/mame/includes/bbc.h index a4e4d6b3e77..63a07b670fd 100644 --- a/src/mame/includes/bbc.h +++ b/src/mame/includes/bbc.h @@ -193,8 +193,8 @@ public: DECLARE_WRITE_LINE_MEMBER(motor_w); DECLARE_WRITE_LINE_MEMBER(side_w); - UPD7002_GET_ANALOGUE(BBC_get_analogue_input); - UPD7002_EOC(BBC_uPD7002_EOC); + int BBC_get_analogue_input(int channel_number); + void BBC_uPD7002_EOC(int data); void bbc_setup_banks(memory_bank *membank, int banks, uint32_t shift, uint32_t size); void bbcm_setup_banks(memory_bank *membank, int banks, uint32_t shift, uint32_t size); diff --git a/src/mame/includes/contra.h b/src/mame/includes/contra.h index 93585e3beda..80115d52038 100644 --- a/src/mame/includes/contra.h +++ b/src/mame/includes/contra.h @@ -20,6 +20,7 @@ public: m_tx_cram(*this, "tx_cram"), m_tx_vram(*this, "tx_vram"), m_spriteram(*this, "spriteram"), + m_spriteram_2(*this, "spriteram_2"), m_bg_cram(*this, "bg_cram"), m_bg_vram(*this, "bg_vram"), m_audiocpu(*this, "audiocpu"), @@ -38,6 +39,7 @@ public: required_shared_ptr<uint8_t> m_tx_cram; required_shared_ptr<uint8_t> m_tx_vram; required_shared_ptr<uint8_t> m_spriteram; + required_shared_ptr<uint8_t> m_spriteram_2; required_shared_ptr<uint8_t> m_bg_cram; required_shared_ptr<uint8_t> m_bg_vram; diff --git a/src/mame/includes/cps3.h b/src/mame/includes/cps3.h index 8ca781cddc3..694117a4946 100644 --- a/src/mame/includes/cps3.h +++ b/src/mame/includes/cps3.h @@ -135,6 +135,7 @@ public: SH2_DMA_KLUDGE_CB(dma_callback); virtual void machine_reset() override; virtual void video_start() override; + void draw_fg_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); uint32_t screen_update_cps3(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); INTERRUPT_GEN_MEMBER(cps3_vbl_interrupt); INTERRUPT_GEN_MEMBER(cps3_other_interrupt); diff --git a/src/mame/includes/flkatck.h b/src/mame/includes/flkatck.h index 00b073eee79..a3b81cfe008 100644 --- a/src/mame/includes/flkatck.h +++ b/src/mame/includes/flkatck.h @@ -16,7 +16,8 @@ class flkatck_state : public driver_device public: flkatck_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), - m_k007121_ram(*this, "k007121_ram"), + m_vram(*this, "vram"), + m_spriteram(*this, "spriteram"), m_maincpu(*this, "maincpu"), m_audiocpu(*this, "audiocpu"), m_k007121(*this, "k007121"), @@ -29,7 +30,8 @@ public: private: /* memory pointers */ - required_shared_ptr<uint8_t> m_k007121_ram; + required_shared_ptr<uint8_t> m_vram; + required_shared_ptr<uint8_t> m_spriteram; /* video-related */ tilemap_t *m_k007121_tilemap[2]; @@ -53,7 +55,7 @@ private: DECLARE_WRITE8_MEMBER(flkatck_ls138_w); DECLARE_READ8_MEMBER(multiply_r); DECLARE_WRITE8_MEMBER(multiply_w); - DECLARE_WRITE8_MEMBER(flkatck_k007121_w); + DECLARE_WRITE8_MEMBER(vram_w); DECLARE_WRITE8_MEMBER(flkatck_k007121_regs_w); TILE_GET_INFO_MEMBER(get_tile_info_A); TILE_GET_INFO_MEMBER(get_tile_info_B); diff --git a/src/mame/includes/itech8.h b/src/mame/includes/itech8.h index d031b64ecc2..ed8dd446dd9 100644 --- a/src/mame/includes/itech8.h +++ b/src/mame/includes/itech8.h @@ -7,6 +7,7 @@ **************************************************************************/ +#include "machine/gen_latch.h" #include "machine/ticket.h" #include "machine/timer.h" #include "video/tlc34076.h" @@ -17,19 +18,25 @@ class itech8_state : public driver_device { public: - itech8_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), + itech8_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), m_soundcpu(*this, "soundcpu"), m_subcpu(*this, "sub"), + m_soundlatch(*this, "soundlatch"), m_tms34061(*this, "tms34061"), m_tlc34076(*this, "tlc34076"), m_screen(*this, "screen"), m_ticket(*this, "ticket"), + m_grom(*this, "grom"), + m_mainbank(*this, "mainbank"), + m_fixed(*this, "fixed"), m_an(*this, { { "AN_C", "AN_D", "AN_E", "AN_F" } }), m_fakex(*this, "FAKEX"), m_fakey(*this, "FAKEY"), - m_visarea(0, 0, 0, 0) { } + m_visarea(0, 0, 0, 0), + m_bankxor(0) + {} void rimrockn(machine_config &config); void gtg2(machine_config &config); @@ -44,13 +51,12 @@ public: void slikshot_hi(machine_config &config); void hstennis_hi(machine_config &config); - void init_rimrockn(); + void init_invbank(); void init_peggle(); void init_slikshot(); void init_neckneck(); void init_arligntn(); void init_hstennis(); - void init_sstrike(); DECLARE_CUSTOM_INPUT_MEMBER(special_r); DECLARE_CUSTOM_INPUT_MEMBER(gtg_mux); @@ -64,7 +70,6 @@ protected: { TIMER_IRQ_OFF, TIMER_BEHIND_BEAM_UPDATE, - TIMER_DELAYED_SOUND_DATA, TIMER_BLITTER_DONE, TIMER_DELAYED_Z80_CONTROL, TIMER_BASE_LAST = TIMER_DELAYED_Z80_CONTROL @@ -73,10 +78,14 @@ protected: required_device<cpu_device> m_maincpu; required_device<cpu_device> m_soundcpu; optional_device<cpu_device> m_subcpu; + required_device<generic_latch_8_device> m_soundlatch; required_device<tms34061_device> m_tms34061; required_device<tlc34076_device> m_tlc34076; required_device<screen_device> m_screen; required_device<ticket_dispenser_device> m_ticket; + required_region_ptr<uint8_t> m_grom; + optional_memory_bank m_mainbank; + optional_memory_bank m_fixed; optional_ioport_array<4> m_an; optional_ioport m_fakex; optional_ioport m_fakey; @@ -87,7 +96,6 @@ protected: uint8_t m_blitter_int; uint8_t m_tms34061_int; uint8_t m_periodic_int; - uint8_t m_sound_data; uint8_t m_pia_porta_data; uint8_t m_pia_portb_data; uint8_t m_z80_ctrl; @@ -113,13 +121,11 @@ protected: uint8_t m_fetch_rle_count; uint8_t m_fetch_rle_value; uint8_t m_fetch_rle_literal; - uint8_t *m_grom_base; - uint32_t m_grom_size; emu_timer *m_irq_off_timer; emu_timer *m_behind_beam_update_timer; - emu_timer *m_delayed_sound_data_timer; emu_timer *m_blitter_done_timer; emu_timer *m_delayed_z80_control_timer; + int m_bankxor; // common DECLARE_WRITE_LINE_MEMBER(generate_tms34061_interrupt); @@ -127,12 +133,10 @@ protected: DECLARE_WRITE8_MEMBER(blitter_bank_w); DECLARE_WRITE8_MEMBER(rimrockn_bank_w); DECLARE_WRITE8_MEMBER(pia_portb_out); - DECLARE_WRITE8_MEMBER(sound_data_w); DECLARE_WRITE8_MEMBER(gtg2_sound_data_w); - DECLARE_READ8_MEMBER(sound_data_r); DECLARE_WRITE8_MEMBER(grom_bank_w); DECLARE_WRITE8_MEMBER(palette_w); - DECLARE_WRITE8_MEMBER(page_w); + void page_w(u8 data); DECLARE_READ8_MEMBER(blitter_r); DECLARE_WRITE8_MEMBER(blitter_w); DECLARE_WRITE8_MEMBER(tms34061_w); @@ -155,7 +159,6 @@ protected: DECLARE_WRITE_LINE_MEMBER(ninclown_irq); TIMER_CALLBACK_MEMBER(irq_off); TIMER_CALLBACK_MEMBER(behind_the_beam_update); - TIMER_CALLBACK_MEMBER(delayed_sound_data_w); TIMER_CALLBACK_MEMBER(blitter_done); inline uint8_t fetch_next_raw(); @@ -165,7 +168,7 @@ protected: void perform_blit(address_space &space); void update_interrupts(int periodic, int tms34061, int blitter); - /*----------- defined in machine/slikshot.c -----------*/ + /*----------- defined in machine/itech8.cpp -----------*/ DECLARE_READ8_MEMBER( slikz80_port_r ); DECLARE_WRITE8_MEMBER( slikz80_port_w ); @@ -190,8 +193,6 @@ protected: DECLARE_READ16_MEMBER(rom_constant_r); DECLARE_READ8_MEMBER(ninclown_palette_r); DECLARE_WRITE8_MEMBER(ninclown_palette_w); - DECLARE_WRITE16_MEMBER(grom_bank16_w); - DECLARE_WRITE16_MEMBER(display_page16_w); void itech8_sound_ym2203(machine_config &config); void itech8_sound_ym2608b(machine_config &config); @@ -200,16 +201,19 @@ protected: void itech8_core_devices(machine_config &config); void itech8_core_lo(machine_config &config); void itech8_core_hi(machine_config &config); + void common_hi_map(address_map &map); + void common_lo_map(address_map &map); void gtg2_map(address_map &map); void ninclown_map(address_map &map); + void rimrockn_map(address_map &map); + void slikshot_map(address_map &map); void slikz80_io_map(address_map &map); void slikz80_mem_map(address_map &map); void sound2203_map(address_map &map); void sound2608b_map(address_map &map); void sound3812_external_map(address_map &map); void sound3812_map(address_map &map); - void tmshi_map(address_map &map); - void tmslo_map(address_map &map); + void sstrike_map(address_map &map); virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; }; @@ -217,8 +221,8 @@ protected: class grmatch_state : public itech8_state { public: - grmatch_state(const machine_config &mconfig, device_type type, const char *tag) - : itech8_state(mconfig, type, tag), + grmatch_state(const machine_config &mconfig, device_type type, const char *tag) : + itech8_state(mconfig, type, tag), m_palette_timer(nullptr) { } @@ -249,4 +253,6 @@ protected: uint8_t m_palcontrol; uint8_t m_xscroll; rgb_t m_palette[2][16]; + + void grmatch_map(address_map &map); }; diff --git a/src/mame/includes/m52.h b/src/mame/includes/m52.h index fb899754a37..5d77946b3f6 100644 --- a/src/mame/includes/m52.h +++ b/src/mame/includes/m52.h @@ -50,6 +50,7 @@ private: DECLARE_PALETTE_INIT(m52); uint32_t screen_update_m52(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void draw_background(bitmap_ind16 &bitmap, const rectangle &cliprect, int xpos, int ypos, int image); + void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int initoffs); required_device<cpu_device> m_maincpu; required_device<gfxdecode_device> m_gfxdecode; required_device<screen_device> m_screen; diff --git a/src/mame/includes/namcos22.h b/src/mame/includes/namcos22.h index f679d498399..b308232af29 100644 --- a/src/mame/includes/namcos22.h +++ b/src/mame/includes/namcos22.h @@ -6,6 +6,11 @@ ***************************************************************************/ +#ifndef MAME_INCLUDES_NAMCOS22_H +#define MAME_INCLUDES_NAMCOS22_H + +#pragma once + #include "machine/eeprompar.h" #include "machine/timer.h" #include "video/rgbutil.h" @@ -188,8 +193,8 @@ public: , m_iomcu(*this, "iomcu") , m_shareram(*this, "shareram") , m_eeprom(*this, "eeprom") - , m_pSlaveExternalRAM(*this, "slaveextram") - , m_pMasterExternalRAM(*this, "masterextram") + , m_slave_extram(*this, "slaveextram") + , m_master_extram(*this, "masterextram") , m_paletteram(*this, "paletteram") , m_cgram(*this, "cgram") , m_textram(*this, "textram") @@ -294,8 +299,6 @@ private: DECLARE_WRITE16_MEMBER(namcos22_dspram16_w); DECLARE_READ16_MEMBER(pdp_status_r); DECLARE_READ16_MEMBER(pdp_begin_r); - DECLARE_READ16_MEMBER(slave_external_ram_r); - DECLARE_WRITE16_MEMBER(slave_external_ram_w); DECLARE_READ16_MEMBER(dsp_hold_signal_r); DECLARE_WRITE16_MEMBER(dsp_hold_ack_w); DECLARE_WRITE16_MEMBER(dsp_xf_output_w); @@ -310,15 +313,13 @@ private: DECLARE_READ16_MEMBER(dsp_unk8_r); DECLARE_READ16_MEMBER(custom_ic_status_r); DECLARE_READ16_MEMBER(dsp_upload_status_r); - DECLARE_READ16_MEMBER(master_external_ram_r); - DECLARE_WRITE16_MEMBER(master_external_ram_w); DECLARE_WRITE16_MEMBER(slave_serial_io_w); DECLARE_READ16_MEMBER(master_serial_io_r); DECLARE_WRITE16_MEMBER(dsp_unk_porta_w); DECLARE_WRITE16_MEMBER(dsp_led_w); DECLARE_WRITE16_MEMBER(dsp_unk8_w); DECLARE_WRITE16_MEMBER(master_render_device_w); - DECLARE_READ16_MEMBER(dsp_bioz_r); + DECLARE_READ16_MEMBER(dsp_slave_bioz_r); DECLARE_READ16_MEMBER(dsp_slave_port3_r); DECLARE_READ16_MEMBER(dsp_slave_port4_r); DECLARE_READ16_MEMBER(dsp_slave_port5_r); @@ -328,9 +329,12 @@ private: DECLARE_READ16_MEMBER(dsp_slave_portb_r); DECLARE_WRITE16_MEMBER(dsp_slave_portb_w); DECLARE_READ32_MEMBER(namcos22_sci_r); + DECLARE_WRITE32_MEMBER(namcos22_sci_w); DECLARE_READ8_MEMBER(namcos22_system_controller_r); DECLARE_WRITE8_MEMBER(namcos22s_system_controller_w); DECLARE_WRITE8_MEMBER(namcos22_system_controller_w); + DECLARE_READ16_MEMBER(namcos22_shared_r); + DECLARE_WRITE16_MEMBER(namcos22_shared_w); DECLARE_READ16_MEMBER(namcos22_keycus_r); DECLARE_WRITE16_MEMBER(namcos22_keycus_w); DECLARE_READ16_MEMBER(namcos22_portbit_r); @@ -341,8 +345,6 @@ private: DECLARE_READ32_MEMBER(alpinesa_prot_r); DECLARE_WRITE32_MEMBER(alpinesa_prot_w); DECLARE_WRITE32_MEMBER(namcos22s_chipselect_w); - DECLARE_READ16_MEMBER(s22mcu_shared_r); - DECLARE_WRITE16_MEMBER(s22mcu_shared_w); DECLARE_WRITE8_MEMBER(mcu_port4_w); DECLARE_READ8_MEMBER(mcu_port4_r); DECLARE_WRITE8_MEMBER(mcu_port5_w); @@ -371,40 +373,41 @@ private: float dspfloat_to_nativefloat(uint32_t val); void handle_driving_io(); - void handle_coinage(int slots, int address_is_odd); + void handle_coinage(uint16_t flags); void handle_cybrcomm_io(); - uint32_t pdp_polygonram_read(offs_t offs); - void pdp_polygonram_write(offs_t offs, uint32_t data); + inline uint32_t pdp_polygonram_read(offs_t offs) { return m_polygonram[offs & 0x7fff]; } + inline void pdp_polygonram_write(offs_t offs, uint32_t data) { m_polygonram[offs & 0x7fff] = data; } void point_write(offs_t offs, uint32_t data); - void slave_halt(); - void slave_enable(); - void enable_slave_simulation(bool enable); + int32_t pointram_read(offs_t offs); + inline int32_t point_read(offs_t offs) { offs &= 0x00ffffff; return (offs < m_pointrom_size) ? m_pointrom[offs] : pointram_read(offs); } + void master_enable(bool enable); + void slave_enable(bool enable); void matrix3d_multiply(float a[4][4], float b[4][4]); void matrix3d_identity(float m[4][4]); + void matrix3d_apply_reflection(float m[4][4]); void transform_point(float *vx, float *vy, float *vz, float m[4][4]); void transform_normal(float *nx, float *ny, float *nz, float m[4][4]); void register_normals(int32_t addr, float m[4][4]); - void blit_single_quad(bitmap_rgb32 &bitmap, uint32_t color, uint32_t addr, float m[4][4], int32_t polyshift, int flags, int packetformat); - void blit_quads(bitmap_rgb32 &bitmap, int32_t addr, float m[4][4], int32_t base); - void blit_polyobject(bitmap_rgb32 &bitmap, int code, float m[4][4]); + void blit_single_quad(uint32_t color, uint32_t addr, float m[4][4], int32_t polyshift, int flags, int packetformat); + void blit_quads(int32_t addr, float m[4][4], int32_t base); + void blit_polyobject(int code, float m[4][4]); void slavesim_handle_bb0003(const int32_t *src); - void slavesim_handle_200002(bitmap_rgb32 &bitmap, const int32_t *src); + void slavesim_handle_200002(const int32_t *src); void slavesim_handle_300000(const int32_t *src); void slavesim_handle_233002(const int32_t *src); - void simulate_slavedsp(bitmap_rgb32 &bitmap); + void simulate_slavedsp(); - int32_t point_read(int32_t addr); void init_tables(); void update_mixer(); void update_palette(); void recalc_czram(); void draw_direct_poly(const uint16_t *src); - void draw_polygons(bitmap_rgb32 &bitmap); - void draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect); - void draw_sprite_group(bitmap_rgb32 &bitmap, const rectangle &cliprect, const uint32_t *src, const uint32_t *attr, int num_sprites, int deltax, int deltay, int y_lowres); + void draw_polygons(); + void draw_sprites(); + void draw_sprite_group(const uint32_t *src, const uint32_t *attr, int num_sprites, int deltax, int deltay, int y_lowres); void draw_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); void namcos22s_mix_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int prival); void namcos22_mix_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); @@ -420,14 +423,14 @@ private: uint32_t screen_update_namcos22(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); INTERRUPT_GEN_MEMBER(namcos22s_interrupt); INTERRUPT_GEN_MEMBER(namcos22_interrupt); + INTERRUPT_GEN_MEMBER(dsp_vblank_irq); + TIMER_DEVICE_CALLBACK_MEMBER(dsp_serial_pulse); + TIMER_DEVICE_CALLBACK_MEMBER(mcu_irq); TIMER_DEVICE_CALLBACK_MEMBER(adillor_trackball_update); TIMER_CALLBACK_MEMBER(adillor_trackball_interrupt); TIMER_DEVICE_CALLBACK_MEMBER(propcycl_pedal_update); TIMER_DEVICE_CALLBACK_MEMBER(propcycl_pedal_interrupt); TIMER_DEVICE_CALLBACK_MEMBER(alpine_steplock_callback); - TIMER_DEVICE_CALLBACK_MEMBER(dsp_master_serial_irq); - TIMER_DEVICE_CALLBACK_MEMBER(dsp_slave_serial_irq); - TIMER_DEVICE_CALLBACK_MEMBER(mcu_irq); void alpine_io_map(address_map &map); void alpinesa_am(address_map &map); void iomcu_s22_io(address_map &map); @@ -456,10 +459,10 @@ private: required_device<cpu_device> m_slave; required_device<cpu_device> m_mcu; optional_device<cpu_device> m_iomcu; - required_shared_ptr<uint32_t> m_shareram; + required_shared_ptr<uint16_t> m_shareram; required_device<eeprom_parallel_28xx_device> m_eeprom; - required_shared_ptr<uint16_t> m_pSlaveExternalRAM; - required_shared_ptr<uint16_t> m_pMasterExternalRAM; + required_shared_ptr<uint16_t> m_slave_extram; + required_shared_ptr<uint16_t> m_master_extram; required_shared_ptr<uint32_t> m_paletteram; required_shared_ptr<uint32_t> m_cgram; required_shared_ptr<uint32_t> m_textram; @@ -485,9 +488,10 @@ private: emu_timer *m_ar_tb_interrupt[2]; uint16_t m_dsp_master_bioz; std::unique_ptr<uint32_t[]> m_pointram; - uint32_t m_old_coin_state; + int m_old_coin_state; uint32_t m_credits1; uint32_t m_credits2; + uint16_t m_pdp_base; uint32_t m_point_address; uint32_t m_point_data; uint16_t m_SerialDataSlaveToMasterNext; @@ -521,6 +525,8 @@ private: int32_t m_objectshift; uint16_t m_PrimitiveID; float m_viewmatrix[4][4]; + uint8_t m_reflection; + bool m_cullflip; uint8_t m_LitSurfaceInfo[NAMCOS22_MAX_LIT_SURFACES]; int32_t m_SurfaceNormalFormat; unsigned m_LitSurfaceCount; @@ -545,3 +551,5 @@ private: int m_camera_ambient; // 0.0..1.0 int m_camera_power; // 0.0..1.0 }; + +#endif // MAME_INCLUDES_NAMCOS22_H diff --git a/src/mame/includes/segas16a.h b/src/mame/includes/segas16a.h index 90804513a4b..9862f1cc662 100644 --- a/src/mame/includes/segas16a.h +++ b/src/mame/includes/segas16a.h @@ -95,7 +95,7 @@ private: DECLARE_READ8_MEMBER( sound_data_r ); DECLARE_WRITE8_MEMBER( n7751_command_w ); DECLARE_WRITE8_MEMBER( n7751_control_w ); - DECLARE_WRITE8_MEMBER( n7751_rom_offset_w ); + template<int Shift> void n7751_rom_offset_w(uint8_t data); // N7751 sound generator CPU read/write handlers DECLARE_READ8_MEMBER( n7751_rom_r ); diff --git a/src/mame/includes/seta2.h b/src/mame/includes/seta2.h index 1c9380fdbf5..c1ebfe4940d 100644 --- a/src/mame/includes/seta2.h +++ b/src/mame/includes/seta2.h @@ -32,7 +32,6 @@ public: m_oki(*this, "oki"), m_eeprom(*this, "eeprom"), m_flash(*this, "flash"), - m_rtc(*this, "rtc"), m_dispenser(*this, "dispenser"), m_x1_bank(*this,"x1_bank_%u", 1U), @@ -129,7 +128,6 @@ protected: optional_device<okim9810_device> m_oki; optional_device<eeprom_serial_93cxx_device> m_eeprom; optional_device<intelfsh16_device> m_flash; - optional_device<upd4992_device> m_rtc; optional_device<ticket_dispenser_device> m_dispenser; optional_memory_bank_array<8> m_x1_bank; @@ -212,6 +210,7 @@ class staraudi_state : public seta2_state public: staraudi_state(const machine_config &mconfig, device_type type, const char *tag) : seta2_state(mconfig, type, tag), + m_rtc(*this, "rtc"), m_rgbram(*this, "rgbram", 0) { } @@ -236,6 +235,7 @@ private: void draw_rgbram(bitmap_ind16 &bitmap); + required_device<upd4992_device> m_rtc; required_shared_ptr<uint16_t> m_rgbram; uint16_t m_lamps1 = 0, m_lamps2 = 0, m_cam = 0; diff --git a/src/mame/includes/xbox.h b/src/mame/includes/xbox.h index 26388e6e159..47910468c2e 100644 --- a/src/mame/includes/xbox.h +++ b/src/mame/includes/xbox.h @@ -10,7 +10,70 @@ #include "machine/idectrl.h" #include "machine/pic8259.h" -#include "machine/pci.h" + +/* + * PIC16LC connected to SMBus + */ + +class xbox_pic16lc_device : public device_t, public smbus_interface +{ +public: + xbox_pic16lc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual int execute_command(int command, int rw, int data) override; + +protected: + virtual void device_start() override; + virtual void device_reset() override; + +private: + uint8_t buffer[0xff]; +}; + +DECLARE_DEVICE_TYPE(XBOX_PIC16LC, xbox_pic16lc_device) + +/* + * CX25871 connected to SMBus + */ + +class xbox_cx25871_device : public device_t, public smbus_interface +{ +public: + xbox_cx25871_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual int execute_command(int command, int rw, int data) override; + +protected: + virtual void device_start() override; + virtual void device_reset() override; + +private: +}; + +DECLARE_DEVICE_TYPE(XBOX_CX25871, xbox_cx25871_device) + +/* + * EEPROM connected to SMBus + */ + +class xbox_eeprom_device : public device_t, public smbus_interface +{ +public: + xbox_eeprom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual int execute_command(int command, int rw, int data) override; + + std::function<void(void)> hack_eeprom; + +protected: + virtual void device_start() override; + virtual void device_reset() override; + +private: +}; + +DECLARE_DEVICE_TYPE(XBOX_EEPROM, xbox_eeprom_device) + +/* + * Base + */ class xbox_base_state : public driver_device { @@ -63,7 +126,6 @@ protected: int selected; uint8_t registers[16][256]; // 256 registers for up to 16 devices, registers 0-0x2f common to all } superiost; - uint8_t pic16lc_buffer[0xff]; nv2a_renderer *nvidia_nv2a; bool debug_irq_active; int debug_irq_number; diff --git a/src/mame/includes/xbox_pci.h b/src/mame/includes/xbox_pci.h index 7d4f69dfd62..d1488cb0c37 100644 --- a/src/mame/includes/xbox_pci.h +++ b/src/mame/includes/xbox_pci.h @@ -78,10 +78,14 @@ DECLARE_DEVICE_TYPE(MCPX_LPC, mcpx_lpc_device) * SMBus */ +class smbus_interface { +public: + virtual int execute_command(int command, int rw, int data) = 0; +}; + class mcpx_smbus_device : public pci_device { public: mcpx_smbus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - void register_device(int address, std::function<int(int command, int rw, int data)> callback) { if (address < 128) smbusst.devices[address] = callback; } template<class Object> devcb_base &set_interrupt_handler(Object &&cb) { return m_interrupt_handler.set_callback(std::forward<Object>(cb)); } @@ -101,7 +105,7 @@ private: int data; int command; int rw; - std::function<int(int command, int rw, int data)> devices[128]; + smbus_interface *devices[128]; uint32_t words[256 / 4]; } smbusst; void smbus_io0(address_map &map); diff --git a/src/mame/layout/coco3.lay b/src/mame/layout/coco3.lay index bebd45729eb..5bb06a96148 100644 --- a/src/mame/layout/coco3.lay +++ b/src/mame/layout/coco3.lay @@ -1,13 +1,16 @@ <?xml version="1.0"?> <mamelayout version="2"> <view name="Composite"> - <screen index="0"> <bounds left="0" top="0" right="4" bottom="3" /> - </screen> + <screen index="0"> + <bounds left="0" top="0" right="4" bottom="3" /> + </screen> + <!-- workaround for MAME selecting a 2-screen view by default --> + <screen index="1"><bounds left="10" top="0" right="14" bottom="3" /></screen> </view> <view name="RGB"> - <screen index="1"> + <screen index="1"> <bounds left="0" top="0" right="4" bottom="3" /> </screen> </view> diff --git a/src/mame/layout/hp9825.lay b/src/mame/layout/hp9825.lay new file mode 100644 index 00000000000..d73603d07f7 --- /dev/null +++ b/src/mame/layout/hp9825.lay @@ -0,0 +1,34 @@ +<?xml version="1.0"?> +<mamelayout version="2"> + <element name="dotmatrix5dot"> + <dotmatrix5dot> + <color red="1.0" green="0" blue="0" /> + </dotmatrix5dot> + </element> + <element name="run_light" defstate="0"> + <disk state="0"> + <color red="0.25" green="0" blue="0" /> + </disk> + <disk state="1"> + <color red="1.0" green="0" blue="0" /> + </disk> + </element> + <view name="32-char display"> + <bounds x="-5" y="0" width="289" height="7"/> + <bezel name="run_light" element="run_light"> + <bounds x="-5" y="2" width="2" height="2"/> + </bezel> + <!-- 32 5x7 characters --> + <repeat count="32"> + <param name="digitidx" start="0" increment="1" /> + <param name="digit_x" start="0.0" increment="9"/> + <!-- Each of the 7 rows in a character --> + <repeat count="7"> + <param name="rowidx" start="0" increment="1" /> + <bezel name="char_~digitidx~_~rowidx~" element="dotmatrix5dot" state="0"> + <bounds x="~digit_x~" y="~rowidx~" width="5" height="1" /> + </bezel> + </repeat> + </repeat> + </view> +</mamelayout> diff --git a/src/mame/layout/video21.lay b/src/mame/layout/video21.lay new file mode 100644 index 00000000000..8a83cdecbca --- /dev/null +++ b/src/mame/layout/video21.lay @@ -0,0 +1,134 @@ +<?xml version="1.0"?> +<mamelayout version="2"> + + <!-- define elements --> + + <element name="overlay"> + <rect> + <bounds x="0" y="0" width="256" height="97" /> + <color red="1" green="0.2" blue="0.2" /> + </rect> + <rect> + <bounds x="0" y="96" width="129" height="37" /> + <color red="0.2" green="0.5" blue="1" /> + </rect> + <rect> + <bounds x="128" y="96" width="128" height="37" /> + <color red="0.2" green="1" blue="0.1" /> + </rect> + <rect> + <bounds x="0" y="132" width="256" height="92" /> + <color red="1" green="1" blue="0.2" /> + </rect> + </element> + + <element name="start" defstate="0"> + <rect state="1"> + <color red="1.0" green="0.0" blue="0.0" /> + </rect> + <rect state="0"> + <color red="0.3" green="0.0" blue="0.0" /> + </rect> + <text string="Start"> + <color red="0.0" green="0.0" blue="0.0" /> + <bounds x="0.1" y="0.25" width="0.8" height="0.5" /> + </text> + </element> + + <element name="take" defstate="0"> + <rect state="1"> + <color red="1.0" green="0.0" blue="0.0" /> + </rect> + <rect state="0"> + <color red="0.3" green="0.0" blue="0.0" /> + </rect> + <text string="Take"> + <color red="0.0" green="0.0" blue="0.0" /> + <bounds x="0.1" y="0.25" width="0.8" height="0.5" /> + </text> + </element> + + <element name="stand" defstate="0"> + <rect state="1"> + <color red="1.0" green="0.0" blue="0.0" /> + </rect> + <rect state="0"> + <color red="0.3" green="0.0" blue="0.0" /> + </rect> + <text string="Stand"> + <color red="0.0" green="0.0" blue="0.0" /> + <bounds x="0.1" y="0.25" width="0.8" height="0.5" /> + </text> + </element> + + <element name="bet" defstate="0"> + <rect state="1"> + <color red="1.0" green="0.0" blue="0.0" /> + </rect> + <rect state="0"> + <color red="0.3" green="0.0" blue="0.0" /> + </rect> + <text string="Bet"> + <color red="0.0" green="0.0" blue="0.0" /> + <bounds x="0.1" y="0.25" width="0.8" height="0.5" /> + </text> + </element> + + <element name="accept" defstate="0"> + <rect state="1"> + <color red="1.0" green="0.0" blue="0.0" /> + </rect> + <rect state="0"> + <color red="0.3" green="0.0" blue="0.0" /> + </rect> + <text string="Accept"> + <color red="0.0" green="0.0" blue="0.0" /> + <bounds x="0.1" y="0.25" width="0.8" height="0.5" /> + </text> + </element> + + <element name="double" defstate="0"> + <rect state="1"> + <color red="1.0" green="0.0" blue="0.0" /> + </rect> + <rect state="0"> + <color red="0.3" green="0.0" blue="0.0" /> + </rect> + <text string="Double"> + <color red="0.0" green="0.0" blue="0.0" /> + <bounds x="0.1" y="0.25" width="0.8" height="0.5" /> + </text> + </element> + + + <!-- build screen --> + + <view name="Internal Layout"> + <screen index="0"> + <bounds left="0" top="0" right="4" bottom="3" /> + </screen> + <overlay name="overlay" element="overlay"> + <bounds left="0" top="0" right="4" bottom="3" /> + </overlay> + + <bezel name="lamp5" element="bet" inputtag="IN44" inputmask="0x10"> + <bounds x="0.0" y="3.05" width="0.35" height="0.24" /> + </bezel> + <bezel name="lamp0" element="start" inputtag="IN42" inputmask="0x04"> + <bounds x="0.4" y="3.05" width="0.35" height="0.24" /> + </bezel> + <bezel name="lamp1" element="take" inputtag="IN42" inputmask="0x08"> + <bounds x="0.8" y="3.05" width="0.35" height="0.24" /> + </bezel> + <bezel name="lamp2" element="stand" inputtag="IN42" inputmask="0x10"> + <bounds x="1.2" y="3.05" width="0.35" height="0.24" /> + </bezel> + <bezel name="lamp3" element="accept" inputtag="IN44" inputmask="0x40"> + <bounds x="1.85" y="3.05" width="0.35" height="0.24" /> + </bezel> + <bezel name="lamp4" element="double" inputtag="IN44" inputmask="0x20"> + <bounds x="2.25" y="3.05" width="0.35" height="0.24" /> + </bezel> + + </view> +</mamelayout> diff --git a/src/mame/machine/6883sam.cpp b/src/mame/machine/6883sam.cpp index 03d86b20a1f..3f455fc3954 100644 --- a/src/mame/machine/6883sam.cpp +++ b/src/mame/machine/6883sam.cpp @@ -156,6 +156,9 @@ void sam6883_device::configure_bank(int bank, uint8_t *memory, uint32_t memory_s /* if we're configuring a bank that never changes, update it now */ switch(bank) { + case 3: + m_space_C000.point(m_banks[3], m_banks[3].m_memory_offset); + break; case 4: m_space_FF00.point(m_banks[4], 0x0000); break; diff --git a/src/mame/machine/at.cpp b/src/mame/machine/at.cpp index 13ecf80f24f..3554832896e 100644 --- a/src/mame/machine/at.cpp +++ b/src/mame/machine/at.cpp @@ -135,14 +135,15 @@ MACHINE_CONFIG_START(at_mb_device::device_add_mconfig) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50) at_keyboard_controller_device &keybc(AT_KEYBOARD_CONTROLLER(config, "keybc", 12_MHz_XTAL)); - keybc.system_reset_cb().set_inputline(":maincpu", INPUT_LINE_RESET); - keybc.gate_a20_cb().set_inputline(":maincpu", INPUT_LINE_A20); - keybc.input_buffer_full_cb().set("pic8259_master", FUNC(pic8259_device::ir1_w)); - keybc.keyboard_clock_cb().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); - keybc.keyboard_data_cb().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); + keybc.hot_res().set_inputline(":maincpu", INPUT_LINE_RESET); + keybc.gate_a20().set_inputline(":maincpu", INPUT_LINE_A20); + keybc.kbd_irq().set("pic8259_master", FUNC(pic8259_device::ir1_w)); + keybc.kbd_clk().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); + keybc.kbd_data().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); + MCFG_DEVICE_ADD("pc_kbdc", PC_KBDC, 0) - MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_clock_w)) - MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_data_w)) + MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_clk_w)) + MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_data_w)) MACHINE_CONFIG_END diff --git a/src/mame/machine/bbc.cpp b/src/mame/machine/bbc.cpp index 6dbc57335a9..2ecd9e05e70 100644 --- a/src/mame/machine/bbc.cpp +++ b/src/mame/machine/bbc.cpp @@ -968,7 +968,7 @@ WRITE_LINE_MEMBER(bbc_state::lpstb_w) BBC Joystick Support **************************************/ -UPD7002_GET_ANALOGUE(bbc_state::BBC_get_analogue_input) +int bbc_state::BBC_get_analogue_input(int channel_number) { if (m_analog) return ((0xff - m_analog->ch_r(channel_number)) << 8); @@ -976,7 +976,7 @@ UPD7002_GET_ANALOGUE(bbc_state::BBC_get_analogue_input) return 0xff; } -UPD7002_EOC(bbc_state::BBC_uPD7002_EOC) +void bbc_state::BBC_uPD7002_EOC(int data) { m_via6522_0->write_cb1(data); } diff --git a/src/mame/machine/coco_vhd.cpp b/src/mame/machine/coco_vhd.cpp index 2384127346e..c75e278caee 100644 --- a/src/mame/machine/coco_vhd.cpp +++ b/src/mame/machine/coco_vhd.cpp @@ -48,7 +48,7 @@ CONSTANTS ***************************************************************************/ -#define VERBOSE 1 +#define VERBOSE 0 #define VHDSTATUS_OK 0x00 #define VHDSTATUS_NO_VHD_ATTACHED 0x02 diff --git a/src/mame/machine/ibm6580_fdc.cpp b/src/mame/machine/ibm6580_fdc.cpp index 14648266a53..ac9e2db3fd8 100644 --- a/src/mame/machine/ibm6580_fdc.cpp +++ b/src/mame/machine/ibm6580_fdc.cpp @@ -43,9 +43,9 @@ MACHINE_CONFIG_START(dw_fdc_device::device_add_mconfig) MCFG_DEVICE_ADD("ppi8255", I8255, 0) - MCFG_UPD765A_ADD("upd765", false, false) -// MCFG_UPD765_INTRQ_CALLBACK(WRITELINE("pic8259", pic8259_device, ir4_w)) -// MCFG_UPD765_DRQ_CALLBACK(WRITELINE("dma8257", dma8257_device, XXX)) + UPD765A(config, "upd765", false, false); +// m_upd_fdc->intrq_wr_callback().set("pic8259", FUNC(pic8259_device::ir4_w)); +// m_upd_fdc->drq_wr_callback().set("dma8257", FUNC(dma8257_device::XXX)); // MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", wangpc_floppies, "525dd", wangpc_state::floppy_formats) // MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", wangpc_floppies, "525dd", wangpc_state::floppy_formats) MACHINE_CONFIG_END diff --git a/src/mame/machine/ioc2.cpp b/src/mame/machine/ioc2.cpp index f5313a244d2..bb96828ccef 100644 --- a/src/mame/machine/ioc2.cpp +++ b/src/mame/machine/ioc2.cpp @@ -68,7 +68,7 @@ MACHINE_CONFIG_START(ioc2_device::device_add_mconfig) MCFG_RS232_DCD_HANDLER(WRITELINE(m_scc, scc85230_device, dcdb_w)) MCFG_RS232_RXD_HANDLER(WRITELINE(m_scc, scc85230_device, rxb_w)) - PC_LPT(config, m_pi1, 0); + PC_LPT(config, m_pi1); KBDC8042(config, m_kbdc); m_kbdc->set_keyboard_type(kbdc8042_device::KBDC8042_PS2); diff --git a/src/mame/machine/isbc_208.cpp b/src/mame/machine/isbc_208.cpp index 3f2b2806ef0..22456234ad7 100644 --- a/src/mame/machine/isbc_208.cpp +++ b/src/mame/machine/isbc_208.cpp @@ -31,7 +31,8 @@ static void isbc_208_floppies(device_slot_interface &device) device.option_add("525dd", FLOPPY_525_DD); } -MACHINE_CONFIG_START(isbc_208_device::device_add_mconfig) +void isbc_208_device::device_add_mconfig(machine_config &config) +{ AM9517A(config, m_dmac, 8_MHz_XTAL/4); m_dmac->out_hreq_callback().set(FUNC(isbc_208_device::hreq_w)); m_dmac->out_eop_callback().set(FUNC(isbc_208_device::out_eop_w)); @@ -40,12 +41,12 @@ MACHINE_CONFIG_START(isbc_208_device::device_add_mconfig) m_dmac->in_ior_callback<0>().set(m_fdc, FUNC(i8272a_device::mdma_r)); m_dmac->out_iow_callback<0>().set(m_fdc, FUNC(i8272a_device::mdma_w)); - MCFG_I8272A_ADD(m_fdc, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, isbc_208_device, irq_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE("dmac", am9517a_device, dreq0_w)) + I8272A(config, m_fdc, true); + m_fdc->intrq_wr_callback().set(FUNC(isbc_208_device::irq_w)); + m_fdc->drq_wr_callback().set(m_dmac, FUNC(am9517a_device::dreq0_w)); FLOPPY_CONNECTOR(config, "fdc:0", isbc_208_floppies, "525dd", isbc_208_device::floppy_formats); FLOPPY_CONNECTOR(config, "fdc:1", isbc_208_floppies, "525dd", isbc_208_device::floppy_formats); -MACHINE_CONFIG_END +} void isbc_208_device::map(address_map &map) { diff --git a/src/mame/machine/ms7004.cpp b/src/mame/machine/ms7004.cpp index 5eb66f2c64f..52183ba835b 100644 --- a/src/mame/machine/ms7004.cpp +++ b/src/mame/machine/ms7004.cpp @@ -66,8 +66,10 @@ MACHINE_CONFIG_START(ms7004_device::device_add_mconfig) MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(m_i8243, i8243_device, prog_w)) I8243(config, m_i8243); - m_i8243->read_handler().set_constant(0); - m_i8243->write_handler().set(FUNC(ms7004_device::i8243_port_w)); + m_i8243->p4_out_cb().set(FUNC(ms7004_device::i8243_port_w<0>)); + m_i8243->p5_out_cb().set(FUNC(ms7004_device::i8243_port_w<1>)); + m_i8243->p6_out_cb().set(FUNC(ms7004_device::i8243_port_w<2>)); + m_i8243->p7_out_cb().set(FUNC(ms7004_device::i8243_port_w<3>)); SPEAKER(config, "mono").front_center(); MCFG_DEVICE_ADD(MS7004_SPK_TAG, BEEP, 3250) @@ -432,7 +434,7 @@ WRITE8_MEMBER( ms7004_device::p2_w ) DBG_LOG(2,0,( "p2_w %02x = col %d\n", data, data&15)); m_p2 = data; - m_i8243->p2_w(space, offset, data); + m_i8243->p2_w(data); } @@ -440,23 +442,24 @@ WRITE8_MEMBER( ms7004_device::p2_w ) // prog_w - //------------------------------------------------- -WRITE8_MEMBER( ms7004_device::i8243_port_w ) +template<int P> +void ms7004_device::i8243_port_w(uint8_t data) { int sense = 0; - DBG_LOG(2,0,( "8243 port %d data %02xH\n", offset + 4, data)); + DBG_LOG(2,0,( "8243 port %d data %02xH\n", P + 4, data)); if (data) { switch(data) { - case 0x01: sense = m_kbd[(offset << 2) + 0]->read(); break; - case 0x02: sense = m_kbd[(offset << 2) + 1]->read(); break; - case 0x04: sense = m_kbd[(offset << 2) + 2]->read(); break; - case 0x08: sense = m_kbd[(offset << 2) + 3]->read(); break; + case 0x01: sense = m_kbd[(P << 2) + 0]->read(); break; + case 0x02: sense = m_kbd[(P << 2) + 1]->read(); break; + case 0x04: sense = m_kbd[(P << 2) + 2]->read(); break; + case 0x08: sense = m_kbd[(P << 2) + 3]->read(); break; } m_keylatch = BIT(sense, (m_p1 & 7)); if (m_keylatch) DBG_LOG(1,0,( "row %d col %02x t1 %d\n", - (m_p1 & 7), (offset << 4 | data), m_keylatch)); + (m_p1 & 7), (P << 4 | data), m_keylatch)); } } diff --git a/src/mame/machine/ms7004.h b/src/mame/machine/ms7004.h index 4c6979a486e..654cc4d33dc 100644 --- a/src/mame/machine/ms7004.h +++ b/src/mame/machine/ms7004.h @@ -66,7 +66,7 @@ private: DECLARE_WRITE8_MEMBER( p1_w ); DECLARE_WRITE8_MEMBER( p2_w ); DECLARE_READ_LINE_MEMBER( t1_r ); - DECLARE_WRITE8_MEMBER( i8243_port_w ); + template<int P> void i8243_port_w(uint8_t data); }; // device type definition diff --git a/src/mame/machine/qx10kbd.cpp b/src/mame/machine/qx10kbd.cpp index c467b4689ee..d9b727ae5d2 100644 --- a/src/mame/machine/qx10kbd.cpp +++ b/src/mame/machine/qx10kbd.cpp @@ -1,73 +1,62 @@ // license:BSD-3-Clause // copyright-holders:Carl -// TODO: dump 8049 mcu; key repeat; LEDs +// TODO: LEDs #include "emu.h" #include "machine/qx10kbd.h" - -#include "machine/keyboard.ipp" +#include "cpu/mcs48/mcs48.h" qx10_keyboard_device::qx10_keyboard_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock) - : buffered_rs232_device(mconfig, QX10_KEYBOARD, tag, owner, 0) - , device_matrix_keyboard_interface(mconfig, *this, "LINE0", "LINE1", "LINE2", "LINE3", "LINE4", "LINE5", "LINE6", "LINE7", "LINE8", "LINE9", "LINEA", "LINEB", "LINEC", "LINED", "LINEE", "LINEF") + : device_t(mconfig, QX10_KEYBOARD, tag, owner, clock) + , device_rs232_port_interface(mconfig, *this) + , m_rows(*this, "LINE%X", 0U) + , m_mcu(*this, "mcu") { } +ROM_START(qx10kbd) + ROM_REGION(0x0800, "mcu", 0) + ROM_LOAD("mbl8049h.5a", 0x0000, 0x0800, CRC(8615e159) SHA1(26b7f447acfe2c605dbe0fc98e6c777f0fa8a94d)) +ROM_END -void qx10_keyboard_device::device_reset() +tiny_rom_entry const *qx10_keyboard_device::device_rom_region() const { - buffered_rs232_device::device_reset(); - - reset_key_state(); - clear_fifo(); - - set_data_frame(1, 8, PARITY_EVEN, STOP_BITS_1); - set_rate(1'200); - receive_register_reset(); - transmit_register_reset(); - - output_dcd(0); - output_dsr(0); - output_cts(0); - output_rxd(1); - - start_processing(attotime::from_hz(2'400)); + return ROM_NAME(qx10kbd); } +void qx10_keyboard_device::device_start() +{ + m_bit_timer = timer_alloc(); + m_bit_timer->adjust(attotime::from_hz(2400), 0, attotime::from_hz(2400)); + m_clk_state = 0; +} -void qx10_keyboard_device::key_make(uint8_t row, uint8_t column) +WRITE_LINE_MEMBER(qx10_keyboard_device::input_txd) { - transmit_byte((column << 4) | row); + m_rxd = state; } +void qx10_keyboard_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ + m_clk_state = !m_clk_state; +} -void qx10_keyboard_device::received_byte(uint8_t data) +WRITE8_MEMBER(qx10_keyboard_device::mcu_p1_w) { - switch (data & 0xe0) - { - case 0x00: // set repeat start - break; - case 0x20: // set repeat interval - break; - case 0x40: // set LED - break; - case 0x60: // get LED - transmit_byte(0); - break; - case 0x80: // get SW - break; - case 0xa0: // set repeat - break; - case 0xc0: // enable keyboard - break; - case 0xe0: - if (!(data & 1)) - transmit_byte(0); - break; - } + m_row = data & 0xf; + output_rxd(BIT(data, 7)); } +void qx10_keyboard_device::device_add_mconfig(machine_config &config) +{ + auto &mcu(I8049(config, "mcu", 11_MHz_XTAL)); + mcu.p1_out_cb().set(FUNC(qx10_keyboard_device::mcu_p1_w)); + mcu.p2_out_cb().set([](u8 data) { /* leds */ }); + mcu.bus_in_cb().set([this]() { return m_rows[m_row]->read(); }); + mcu.t1_in_cb().set([this]() { return m_rxd; }); + mcu.t0_in_cb().set([this]() { return m_clk_state; }); +} static INPUT_PORTS_START( qx10_keyboard ) PORT_START("LINE0") diff --git a/src/mame/machine/qx10kbd.h b/src/mame/machine/qx10kbd.h index b351fd4ef73..8070548c556 100644 --- a/src/mame/machine/qx10kbd.h +++ b/src/mame/machine/qx10kbd.h @@ -9,18 +9,28 @@ #include "machine/keyboard.h" -class qx10_keyboard_device : public buffered_rs232_device<16U>, protected device_matrix_keyboard_interface<16U> +class qx10_keyboard_device + : public device_t + , public device_rs232_port_interface { public: qx10_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ioport_constructor device_input_ports() const override; + virtual DECLARE_WRITE_LINE_MEMBER(input_txd) override; + DECLARE_WRITE8_MEMBER(mcu_p1_w); protected: - virtual void device_reset() override; - virtual void key_make(uint8_t row, uint8_t column) override; + virtual const tiny_rom_entry *device_rom_region() const override; + virtual void device_add_mconfig(machine_config &config) override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + virtual void device_start() override; private: - virtual void received_byte(uint8_t data) override; + required_ioport_array<16> m_rows; + required_device<cpu_device> m_mcu; + emu_timer *m_bit_timer; + u8 m_rxd; + int m_row, m_clk_state; }; DECLARE_DEVICE_TYPE(QX10_KEYBOARD, qx10_keyboard_device) diff --git a/src/mame/machine/segacrpt_device.cpp b/src/mame/machine/segacrpt_device.cpp index cc1131ece2f..47dc8bfb55c 100644 --- a/src/mame/machine/segacrpt_device.cpp +++ b/src/mame/machine/segacrpt_device.cpp @@ -104,7 +104,7 @@ List of encrypted games currently known: - CPU Part # Game Comments + CPU Part # Game Comments 315-5010 Pengo unencrypted version available 315-5013 Super Zaxxon used Zaxxon for known plaintext attack 315-5014 Buck Rogers / Zoom 909 unencrypted version available @@ -112,8 +112,8 @@ 315-5018 Yamato ???-???? Top Roller same key as Yamato 315-5028 Sindbad Mystery - 315-5030 Up'n Down & unencrypted version available - ???-???? M120 Razzmatazz + 315-5030 Up'n Down unencrypted version available + ???-???? M120 Razzmatazz same key as Up'n Down 315-5033 Regulus unencrypted version available 315-5041 M140 Mister Viking 315-5048 SWAT used Bull Fight for k.p.a. @@ -123,15 +123,15 @@ 315-5064 Water Match used Mister Viking for k.p.a. 315-5065 Bull Fight 315-5069 Star Force game by Tehkan; same key as Super Locomotive - ???-???? Pinball Action game by Tehkan; also has a simple bitswap on top ???-???? Spatter 315-5084 Jongkyo TABLE INCOMPLETE game by Kiwako; also has a simple bitswap on top 315-5093 Pitfall II 315-5098 Ninja Princess unencrypted version available; same key as Up'n Down 315-5102 Sega Ninja unencrypted version available 315-5110 I'm Sorry used My Hero for k.p.a. - 315-5114 ?? pcb 834-5492 same key as Regulus + 315-5114 Champion Pro Wrestling same key as Regulus 315-5115 TeddyBoy Blues + 315-5128 Pinball Action game by Tehkan; also has a simple bitswap on top 315-5132 My Hero 315-5135 Heavy Metal & Wonder Boy (set 1a & 3; bootlegs?) @@ -278,10 +278,8 @@ DEFINE_DEVICE_TYPE(SEGA_315_5013, sega_315_5013_device, "sega_315_5013", "Sega 3 DEFINE_DEVICE_TYPE(SEGA_315_5014, sega_315_5014_device, "sega_315_5014", "Sega 315-5014") DEFINE_DEVICE_TYPE(SEGA_315_5018, sega_315_5018_device, "sega_315_5018", "Sega 315-5018") DEFINE_DEVICE_TYPE(SEGA_315_5010, sega_315_5010_device, "sega_315_5010", "Sega 315-5010") - -// below are unknown part numbers -DEFINE_DEVICE_TYPE(SEGA_315_SPAT, sega_315_spat_device, "sega_315_spat", "Sega 315-???? Spat") // unknown part number -DEFINE_DEVICE_TYPE(SEGA_CPU_PBACTIO4, sega_cpu_pbactio4_device, "sega_pbactio4", "Sega pbactio4") +DEFINE_DEVICE_TYPE(SEGA_315_SPAT, sega_315_spat_device, "sega_315_spat", "Sega 315-5xxx (Spatter)") // unknown part number +DEFINE_DEVICE_TYPE(SEGA_315_5128, sega_315_5128_device, "sega_315_5128", "Sega 315-5128") @@ -971,8 +969,8 @@ void sega_315_5010_device::decrypt() -sega_cpu_pbactio4_device::sega_cpu_pbactio4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : segacrpt_z80_device(mconfig, SEGA_CPU_PBACTIO4, tag, owner, clock) {} -void sega_cpu_pbactio4_device::decrypt() +sega_315_5128_device::sega_315_5128_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : segacrpt_z80_device(mconfig, SEGA_315_5128, tag, owner, clock) {} +void sega_315_5128_device::decrypt() { static const uint8_t convtable[32][4] = { diff --git a/src/mame/machine/segacrpt_device.h b/src/mame/machine/segacrpt_device.h index 1c31d6a0116..ba87cca9671 100644 --- a/src/mame/machine/segacrpt_device.h +++ b/src/mame/machine/segacrpt_device.h @@ -45,7 +45,7 @@ protected: virtual void device_reset() override; virtual void decrypt() = 0; - const char* m_decrypted_tag; + const char* m_decrypted_tag; uint8_t* m_decrypted_ptr; uint8_t* m_region_ptr; int m_decode_size; @@ -241,10 +241,10 @@ protected: -class sega_cpu_pbactio4_device : public segacrpt_z80_device +class sega_315_5128_device : public segacrpt_z80_device { public: - sega_cpu_pbactio4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t); + sega_315_5128_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t); protected: virtual void decrypt() override; }; @@ -266,31 +266,31 @@ protected: }; -DECLARE_DEVICE_TYPE(SEGA_315_5132, sega_315_5132_device) -DECLARE_DEVICE_TYPE(SEGA_315_5155, sega_315_5155_device) -DECLARE_DEVICE_TYPE(SEGA_315_5110, sega_315_5110_device) -DECLARE_DEVICE_TYPE(SEGA_315_5135, sega_315_5135_device) -DECLARE_DEVICE_TYPE(SEGA_315_5051, sega_315_5051_device) -DECLARE_DEVICE_TYPE(SEGA_315_5098, sega_315_5098_device) -DECLARE_DEVICE_TYPE(SEGA_315_5102, sega_315_5102_device) -DECLARE_DEVICE_TYPE(SEGA_315_5065, sega_315_5065_device) -DECLARE_DEVICE_TYPE(SEGA_315_5064, sega_315_5064_device) -DECLARE_DEVICE_TYPE(SEGA_315_5033, sega_315_5033_device) -DECLARE_DEVICE_TYPE(SEGA_315_5041, sega_315_5041_device) -DECLARE_DEVICE_TYPE(SEGA_315_5048, sega_315_5048_device) -DECLARE_DEVICE_TYPE(SEGA_315_5093, sega_315_5093_device) -DECLARE_DEVICE_TYPE(SEGA_315_5099, sega_315_5099_device) -DECLARE_DEVICE_TYPE(SEGA_315_SPAT, sega_315_spat_device) -DECLARE_DEVICE_TYPE(SEGA_315_5015, sega_315_5015_device) -DECLARE_DEVICE_TYPE(SEGA_315_5133, sega_315_5133_device) -DECLARE_DEVICE_TYPE(SEGA_315_5014, sega_315_5014_device) -DECLARE_DEVICE_TYPE(SEGA_315_5013, sega_315_5013_device) -DECLARE_DEVICE_TYPE(SEGA_315_5061, sega_315_5061_device) -DECLARE_DEVICE_TYPE(SEGA_315_5018, sega_315_5018_device) -DECLARE_DEVICE_TYPE(SEGA_315_5010, sega_315_5010_device) -DECLARE_DEVICE_TYPE(SEGA_CPU_PBACTIO4, sega_cpu_pbactio4_device) -DECLARE_DEVICE_TYPE(SEGA_315_5028, sega_315_5028_device) -DECLARE_DEVICE_TYPE(SEGA_315_5084, sega_315_5084_device) +DECLARE_DEVICE_TYPE(SEGA_315_5132, sega_315_5132_device) +DECLARE_DEVICE_TYPE(SEGA_315_5155, sega_315_5155_device) +DECLARE_DEVICE_TYPE(SEGA_315_5110, sega_315_5110_device) +DECLARE_DEVICE_TYPE(SEGA_315_5135, sega_315_5135_device) +DECLARE_DEVICE_TYPE(SEGA_315_5051, sega_315_5051_device) +DECLARE_DEVICE_TYPE(SEGA_315_5098, sega_315_5098_device) +DECLARE_DEVICE_TYPE(SEGA_315_5102, sega_315_5102_device) +DECLARE_DEVICE_TYPE(SEGA_315_5065, sega_315_5065_device) +DECLARE_DEVICE_TYPE(SEGA_315_5064, sega_315_5064_device) +DECLARE_DEVICE_TYPE(SEGA_315_5033, sega_315_5033_device) +DECLARE_DEVICE_TYPE(SEGA_315_5041, sega_315_5041_device) +DECLARE_DEVICE_TYPE(SEGA_315_5048, sega_315_5048_device) +DECLARE_DEVICE_TYPE(SEGA_315_5093, sega_315_5093_device) +DECLARE_DEVICE_TYPE(SEGA_315_5099, sega_315_5099_device) +DECLARE_DEVICE_TYPE(SEGA_315_SPAT, sega_315_spat_device) +DECLARE_DEVICE_TYPE(SEGA_315_5015, sega_315_5015_device) +DECLARE_DEVICE_TYPE(SEGA_315_5133, sega_315_5133_device) +DECLARE_DEVICE_TYPE(SEGA_315_5014, sega_315_5014_device) +DECLARE_DEVICE_TYPE(SEGA_315_5013, sega_315_5013_device) +DECLARE_DEVICE_TYPE(SEGA_315_5061, sega_315_5061_device) +DECLARE_DEVICE_TYPE(SEGA_315_5018, sega_315_5018_device) +DECLARE_DEVICE_TYPE(SEGA_315_5010, sega_315_5010_device) +DECLARE_DEVICE_TYPE(SEGA_315_5128, sega_315_5128_device) +DECLARE_DEVICE_TYPE(SEGA_315_5028, sega_315_5028_device) +DECLARE_DEVICE_TYPE(SEGA_315_5084, sega_315_5084_device) #endif // MAME_MACHINE_SEGACRYPT_DEVICE_H diff --git a/src/mame/machine/xbox.cpp b/src/mame/machine/xbox.cpp index 2e2bc7bdaa2..83fa5549c52 100644 --- a/src/mame/machine/xbox.cpp +++ b/src/mame/machine/xbox.cpp @@ -2,8 +2,9 @@ // copyright-holders:Samuele Zannoli #include "emu.h" -#include "includes/xbox.h" +#include "machine/pci.h" #include "includes/xbox_pci.h" +#include "includes/xbox.h" #include "cpu/i386/i386.h" #include "machine/pit8253.h" @@ -389,7 +390,8 @@ void xbox_base_state::grab_vprog_command(int ref, const std::vector<std::string> return; if ((fil = fopen(params[1].c_str(), "wb")) == nullptr) return; - for (int n = 0; n < 136; n++) { + for (int n = 0; n < 136; n++) + { nvidia_nv2a->debug_grab_vertex_program_slot(n, instruction); fwrite(instruction, sizeof(uint32_t), 4, fil); } @@ -636,72 +638,6 @@ WRITE_LINE_MEMBER(xbox_base_state::xbox_nv2a_interrupt_changed) } /* - * SMbus devices - */ - -int xbox_base_state::smbus_pic16lc(int command, int rw, int data) -{ - if (rw == 1) { // read - if (command == 0) { - if (pic16lc_buffer[0] == 'D') - pic16lc_buffer[0] = 'X'; - else if (pic16lc_buffer[0] == 'X') - pic16lc_buffer[0] = 'B'; - else if (pic16lc_buffer[0] == 'B') - pic16lc_buffer[0] = 'D'; - } - logerror("pic16lc: %d %d %d\n", command, rw, pic16lc_buffer[command]); - return pic16lc_buffer[command]; - } - else - if (command == 0) - pic16lc_buffer[0] = 'B'; - else - pic16lc_buffer[command] = (uint8_t)data; - logerror("pic16lc: %d %d %d\n", command, rw, data); - return 0; -} - -int xbox_base_state::smbus_cx25871(int command, int rw, int data) -{ - logerror("cx25871: %d %d %d\n", command, rw, data); - return 0; -} - -// let's try to fake the missing eeprom, make sure its ntsc, otherwise chihiro will show an error -static int dummyeeprom[256] = { - 0x39, 0xe3, 0xcc, 0x81, 0xb0, 0xa9, 0x97, 0x09, 0x57, 0xac, 0x57, 0x12, 0xf7, 0xc2, 0xc0, 0x21, 0xce, 0x0d, 0x0a, 0xdb, 0x20, 0x7a, 0xf3, 0xff, - 0xdf, 0x67, 0xed, 0xf4, 0xf8, 0x95, 0x5c, 0xd0, 0x9b, 0xef, 0x7b, 0x81, 0xda, 0xd5, 0x98, 0xc1, 0xb1, 0xb3, 0x74, 0x18, 0x86, 0x05, 0xe2, 0x7c, - 0xd1, 0xad, 0xc9, 0x90, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x41, 0x42, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x00, 0x00, - 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff, 0xab, 0xcd, 0xef, 0xba, 0xdc, 0xfe, 0xa1, 0xb2, 0xc3, 0xd3, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; - -int xbox_base_state::smbus_eeprom(int command, int rw, int data) -{ - if (command >= 112) - return 0; - if (rw == 1) { // if reading - // hack to avoid hanging if eeprom contents are not correct - // this would need dumping the serial eeprom on the xbox board - if (command == 0) { - hack_eeprom(); - } - data = dummyeeprom[command] + dummyeeprom[command + 1] * 256; - logerror("eeprom: %d %d %d\n", command, rw, data); - return data; - } - logerror("eeprom: %d %d %d\n", command, rw, data); - dummyeeprom[command] = data; - return 0; -} - -/* * SuperIO */ @@ -772,37 +708,144 @@ WRITE8_MEMBER(xbox_base_state::superiors232_write) } } -void xbox_base_state::machine_start() +/* + * SMbus devices + */ + +/* + * PIC16LC + */ + +DEFINE_DEVICE_TYPE(XBOX_PIC16LC, xbox_pic16lc_device, "pic16lc", "XBOX PIC16LC") + +xbox_pic16lc_device::xbox_pic16lc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, XBOX_PIC16LC, tag, owner, clock) { - find_debug_params(); - nvidia_nv2a = subdevice<nv2a_gpu_device>("pci:1e.0:00.0")->debug_get_renderer(); - memset(pic16lc_buffer, 0, sizeof(pic16lc_buffer)); - pic16lc_buffer[0] = 'B'; - pic16lc_buffer[4] = 0; // A/V connector, 0=scart 2=vga 4=svideo 7=none - // PIC challenge handshake data - pic16lc_buffer[0x1c] = 0x0c; - pic16lc_buffer[0x1d] = 0x0d; - pic16lc_buffer[0x1e] = 0x0e; - pic16lc_buffer[0x1f] = 0x0f; - mcpx_smbus_device *smbus = subdevice<mcpx_smbus_device>("pci:01.1"); - smbus->register_device(0x10, - [&](int command, int rw, int data) - { - return smbus_pic16lc(command, rw, data); - } - ); - smbus->register_device(0x45, - [&](int command, int rw, int data) - { - return smbus_cx25871(command, rw, data); +} + +int xbox_pic16lc_device::execute_command(int command, int rw, int data) +{ + if (rw == 1) { // read + if (command == 0) + { + if (buffer[0] == 'D') + buffer[0] = 'X'; + else if (buffer[0] == 'X') + buffer[0] = 'B'; + else if (buffer[0] == 'B') + buffer[0] = 'D'; + } + logerror("pic16lc: %d %d %d\n", command, rw, buffer[command]); + return buffer[command]; } - ); - smbus->register_device(0x54, - [&](int command, int rw, int data) + else + if (command == 0) + buffer[0] = 'B'; + else + buffer[command] = (uint8_t)data; + logerror("pic16lc: %d %d %d\n", command, rw, data); + return 0; +} + +void xbox_pic16lc_device::device_start() +{ + memset(buffer, 0, sizeof(buffer)); + buffer[0] = 'B'; + buffer[4] = 0; // A/V connector, 0=scart 2=vga 4=svideo 7=none + // PIC challenge handshake data + buffer[0x1c] = 0x0c; + buffer[0x1d] = 0x0d; + buffer[0x1e] = 0x0e; + buffer[0x1f] = 0x0f; +} + +void xbox_pic16lc_device::device_reset() +{ +} + +/* + * CX25871 + */ + +DEFINE_DEVICE_TYPE(XBOX_CX25871, xbox_cx25871_device, "cx25871", "XBOX CX25871") + +xbox_cx25871_device::xbox_cx25871_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, XBOX_CX25871, tag, owner, clock) +{ +} + +int xbox_cx25871_device::execute_command(int command, int rw, int data) +{ + logerror("cx25871: %d %d %d\n", command, rw, data); + return 0; +} + +void xbox_cx25871_device::device_start() +{ +} + +void xbox_cx25871_device::device_reset() +{ +} + +/* + * EEPROM + */ + +// let's try to fake the missing eeprom, make sure its ntsc, otherwise chihiro will show an error +static int dummyeeprom[256] = { + 0x39, 0xe3, 0xcc, 0x81, 0xb0, 0xa9, 0x97, 0x09, 0x57, 0xac, 0x57, 0x12, 0xf7, 0xc2, 0xc0, 0x21, 0xce, 0x0d, 0x0a, 0xdb, 0x20, 0x7a, 0xf3, 0xff, + 0xdf, 0x67, 0xed, 0xf4, 0xf8, 0x95, 0x5c, 0xd0, 0x9b, 0xef, 0x7b, 0x81, 0xda, 0xd5, 0x98, 0xc1, 0xb1, 0xb3, 0x74, 0x18, 0x86, 0x05, 0xe2, 0x7c, + 0xd1, 0xad, 0xc9, 0x90, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x41, 0x42, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x00, 0x00, + 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff, 0xab, 0xcd, 0xef, 0xba, 0xdc, 0xfe, 0xa1, 0xb2, 0xc3, 0xd3, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; + +DEFINE_DEVICE_TYPE(XBOX_EEPROM, xbox_eeprom_device, "eeprom", "XBOX EEPROM") + +xbox_eeprom_device::xbox_eeprom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, XBOX_EEPROM, tag, owner, clock) +{ +} + +int xbox_eeprom_device::execute_command(int command, int rw, int data) +{ + if (command >= 112) + return 0; + if (rw == 1) // if reading { - return smbus_eeprom(command, rw, data); + // hack to avoid hanging if eeprom contents are not correct + // removing this would need dumping the serial eeprom on the chihiro xbox board + if (command == 0) + { + hack_eeprom(); + } + data = dummyeeprom[command] + dummyeeprom[command + 1] * 256; + logerror("eeprom: %d %d %d\n", command, rw, data); + return data; } - ); + logerror("eeprom: %d %d %d\n", command, rw, data); + dummyeeprom[command] = data; + return 0; +} + +void xbox_eeprom_device::device_start() +{ +} + +void xbox_eeprom_device::device_reset() +{ +} + +void xbox_base_state::machine_start() +{ + find_debug_params(); + nvidia_nv2a = subdevice<nv2a_gpu_device>("pci:1e.0:00.0")->debug_get_renderer(); xbox_base_devs.pic8259_1 = subdevice<pic8259_device>("pic8259_1"); xbox_base_devs.pic8259_2 = subdevice<pic8259_device>("pic8259_2"); xbox_base_devs.ide = subdevice<bus_master_ide_controller_device>("ide"); @@ -811,6 +854,11 @@ void xbox_base_state::machine_start() using namespace std::placeholders; machine().debugger().console().register_command("xbox", CMDFLAG_NONE, 0, 1, 4, std::bind(&xbox_base_state::xbox_debug_commands, this, _1, _2)); } + subdevice<xbox_eeprom_device>("pci:01.1:54")->hack_eeprom = + [&](void) + { + hack_eeprom(); + }; subdevice<mcpx_ohci_device>("pci:02.0")->set_hack_callback( [&](void) { @@ -824,7 +872,6 @@ void xbox_base_state::machine_start() // savestates save_item(NAME(debug_irq_active)); save_item(NAME(debug_irq_number)); - save_item(NAME(pic16lc_buffer)); } void xbox_base_state::xbox_base_map(address_map &map) @@ -876,6 +923,9 @@ MACHINE_CONFIG_START(xbox_base_state::xbox_base) MCFG_DEVICE_ADD(":pci:01.0", MCPX_LPC, 0) MCFG_DEVICE_ADD(":pci:01.1", MCPX_SMBUS, 0) MCFG_MCPX_SMBUS_INTERRUPT_HANDLER(WRITELINE(*this, xbox_base_state, xbox_smbus_interrupt_changed)) + MCFG_DEVICE_ADD(":pci:01.1:10", XBOX_PIC16LC, 0) + MCFG_DEVICE_ADD(":pci:01.1:45", XBOX_CX25871, 0) + MCFG_DEVICE_ADD(":pci:01.1:54", XBOX_EEPROM, 0) MCFG_DEVICE_ADD(":pci:02.0", MCPX_OHCI, 0) MCFG_MCPX_OHCI_INTERRUPT_HANDLER(WRITELINE(*this, xbox_base_state, xbox_ohci_usb_interrupt_changed)) MCFG_DEVICE_ADD(":pci:03.0", MCPX_OHCI, 0) diff --git a/src/mame/machine/xbox_pci.cpp b/src/mame/machine/xbox_pci.cpp index 0045fc9f990..8e856de385e 100644 --- a/src/mame/machine/xbox_pci.cpp +++ b/src/mame/machine/xbox_pci.cpp @@ -2,8 +2,9 @@ // copyright-holders:Samuele Zannoli #include "emu.h" -#include "includes/xbox.h" +#include "machine/pci.h" #include "includes/xbox_pci.h" +#include "includes/xbox.h" #include <functional> @@ -153,6 +154,36 @@ void mcpx_smbus_device::device_start() add_map(0x00000020, M_IO, FUNC(mcpx_smbus_device::smbus_io2)); bank_infos[2].adr = 0xc200; memset(&smbusst, 0, sizeof(smbusst)); + for (int n = 0; n < 128; n++) + smbusst.devices[n] = nullptr; + for (device_t &d : subdevices()) + { + const char *t = d.tag(); + int l = strlen(t); + + while (l > 0) + { + l--; + if (t[l] == ':') + { + l++; + int address = strtol(t + l, nullptr, 16); + if ((address > 0) && (address < 128)) + { + if (smbusst.devices[address] == nullptr) + { + smbus_interface *i = dynamic_cast<smbus_interface *>(&d); + smbusst.devices[address] = i; + } + else + logerror("Duplicate address for SMBus device with tag %s\n", t); + } + else + logerror("Invalid address for SMBus device with tag %s\n", t); + break; + } + } + } } void mcpx_smbus_device::device_reset() @@ -190,9 +221,9 @@ WRITE32_MEMBER(mcpx_smbus_device::smbus_w) { if (smbusst.devices[smbusst.address]) if (smbusst.rw == 0) - smbusst.devices[smbusst.address](smbusst.command, smbusst.rw, smbusst.data); + smbusst.devices[smbusst.address]->execute_command(smbusst.command, smbusst.rw, smbusst.data); else - smbusst.data = smbusst.devices[smbusst.address](smbusst.command, smbusst.rw, smbusst.data); + smbusst.data = smbusst.devices[smbusst.address]->execute_command(smbusst.command, smbusst.rw, smbusst.data); else logerror("SMBUS: access to missing device at address %d\n", smbusst.address); smbusst.status |= 0x10; diff --git a/src/mame/machine/xbox_usb.cpp b/src/mame/machine/xbox_usb.cpp index 5a7a167ee49..edfb254f85c 100644 --- a/src/mame/machine/xbox_usb.cpp +++ b/src/mame/machine/xbox_usb.cpp @@ -2,6 +2,8 @@ // copyright-holders:Samuele Zannoli #include "emu.h" +#include "machine/pci.h" +#include "includes/xbox_pci.h" #include "includes/xbox_usb.h" #include "includes/xbox.h" diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 76906e6c59e..aa9e94a01f1 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -12647,6 +12647,9 @@ royalpk2 // @source:facit4440.cpp facit4440 // 1984 +@source:falco5220.cpp +falco5220 // 1987 + @source:famibox.cpp famibox // 1986 @@ -13464,8 +13467,9 @@ victorycb // (c) Comsoft (bootleg) warofbug // (c) 1981 Armenia warofbugg // German Version warofbugu // (c) 1981 Armenia -zerotime // hack -zerotimed // hack +zerotime // hack (Petaco S.A.) +zerotimed // hack (Datamat) +zerotimemc // hack (Marti Colls) zigzagb // (c) 1982 LAX (bootleg) zigzagb2 // (c) 1982 LAX (bootleg) @@ -15176,9 +15180,10 @@ sams64_2 // 005 1998/10/16 Samurai Shodown: Warrior's Rag xrally // 003 1998/05/13 Xtreme Rally / Off Beat Racer! @source:holeland.cpp -crzrally // (c) 1985 -crzrallya // (c) 1985 -crzrallyg // (c) 1985 +crzrally // (c) 1985 Tecfri +crzrallya // (c) 1985 Tecfri +crzrallyg // (c) 1985 Gecas +crzrallyrf // (c) 1985 Recreativos Franco holeland // (c) 1984 holeland2 // (c) 1984 @@ -15281,6 +15286,9 @@ hp64k // @source:hp700.cpp hp700_92 // +@source:hp9825.cpp +hp9825b // HP 9825B + @source:hp9845.cpp hp9835a // hp9835b // @@ -15786,6 +15794,7 @@ pegglet // (c) 1991 Strata/Incredible Technologies pokrdice // (c) 1991 Strata/Incredible Technologies rimrockn // (c) 1991 Strata/Incredible Technologies rimrockn12 // (c) 1991 Strata/Incredible Technologies +rimrockn12b // bootleg rimrockn16 // (c) 1991 Strata/Incredible Technologies rimrockn20 // (c) 1991 Strata/Incredible Technologies slikshot // (c) 1990 Grand Products/Incredible Technologies @@ -15839,6 +15848,8 @@ euro2k2s // (c) 2002 Nazionale Elettronica laperla // (c) 2002 Nazionale Elettronica laperlag // (c) 2001 Nazionale Elettronica mnumber // (c) 200? M.M. - B.R.L. +wcup // (c) 2001 Nazionale Elettronica +wcup14 // (c) 2001 Nazionale Elettronica @source:itt3030.cpp itt3030 // @@ -18012,6 +18023,7 @@ grainbow // (c) 1993 Banpresto grainbowk // (c) 1993 Banpresto heatbrl // (c) 1992 Tad (World version 3) heatbrl2 // (c) 1992 Tad (World version 2) +heatbrl3 // (c) 1992 Tad (World version ?) heatbrle // (c) 1992 Tad (Electronic Devices license) heatbrlo // (c) 1992 Tad (World) heatbrlu // (c) 1992 Tad (US) @@ -21456,6 +21468,7 @@ qtono1 // 25/12/1990 (QUIZ 3) (c) 1991 Capcom (Japan) sbbros // 01/10/1990 (c) 1990 Mitchell + Capcom (US) not listed on Capcom's site spang // 14/09/1990 (c) 1990 Mitchell (World) spangbl // bootleg +spangbl2 // bootleg spangj // --/--/1990 (c) 1990 Mitchell (Japan) @source:mits680b.cpp @@ -29930,6 +29943,7 @@ minasan // 0027 (c) 1990 Monolith Corp. moshougi // 0203 (c) 1995 ADK / SNK ms4plus // bootleg ms5plus // bootleg +mvstemp // development board mslug // 0201 (c) 1996 Nazca mslug2 // 0241 (c) 1998 SNK mslug2t // bootleg @@ -30639,6 +30653,7 @@ clubpacm // Miky SRL clubpacma // Miky SRL clubpacmb // Miky SRL crockman // 1980 bootleg (RENE PIERRE) +crockmnf // bootleg (Marti Colls / Falgas) crush // (c) 1981 Kural Samno Electric Ltd crush2 // (c) 1981 Kural Esco Electric Ltd - bootleg? crush3 // Kural Electric Ltd @@ -30675,6 +30690,7 @@ mrtnt // (c) 1983 Telko mschamp // hack by RAYGLO MFG "Zola-Puc" (c) 1992/1993 mschamps // hack (hack of the Rayglo hack?) msheartb // hack +mspacmbmc // bootleg (Marti Colls / Falgas) mspacii // bootleg mspacii2 // bootleg mspacmab // bootleg @@ -30734,6 +30750,7 @@ superabc // hack superabco // hack theglobp // (c) 1983 Epos Corporation titanpac // hack +pacmanfm // bootleg (FAMARE S.A.) vanvan // (c) 1983 Sanritsu vanvanb // (c) 1983 Karateco (bootleg?) vanvank // (c) 1983 Karateco (bootleg?) @@ -31845,7 +31862,8 @@ condor // bootleg (Sidam) condorn // bootleg (S C Novar) falcon // bootleg falconz // bootleg -fenix // bootleg +fenix // bootleg (Orio) +fenixn // bootleg (Niemer) griffon // bootleg (Videotron) griffono // bootleg (Olympia) nextfase // bootleg @@ -31971,9 +31989,10 @@ neiva // pkscram // (c) 1993 Cosmo Electronics Corporation @source:pktgaldx.cpp -pktgaldx // MAZ (c) 1993 Data East (Euro v3.00) +pktgaldx // MAZ (c) 1992 Data East (Euro v3.00) +pktgaldxa // MAZ (c) 1992 Data East (Asia v3.00) pktgaldxb // bootleg -pktgaldxj // MAZ (c) 1993 +pktgaldxj // MAZ (c) 1993 Nihon System inc (Japan v3.00) @source:plan80.cpp plan80 // @@ -33341,6 +33360,7 @@ diner_l1 // diner_l2 // diner_l3 // diner_l4 // +diner_p0 // gs_la3 // gs_lg6 // gs_lu3 // @@ -33849,6 +33869,9 @@ spacewin // @source:sderby2.cpp sderby2 // (c) 1985 +@source:sdk51.cpp +sdk51 // + @source:sdk80.cpp sdk80 // @@ -34924,6 +34947,7 @@ sg1000m2 // Sega SG-1000 Mark II (Japan) chboxing // (c) 1984 chwrestl // (c) 1985 dokidoki // (c) 1985 +sderbys // (c) 1984 sderby2s // (c) 1985 @source:sh4robot.cpp @@ -38282,13 +38306,13 @@ vigilanto // (c) 1988 (US) @source:vii.cpp batmantv // The Batman, 2004 -vii // Chintendo / KenSingTon / Jungle Soft / Siatronics Vii +vii // KenSingTon / Jungle Soft / Siatronics Vii vsmile // vsmileb // vsmilef // vsmileg // walle // -wireless // Wireless +wrlshunt // Wireless: Hunting Video Game System wirels60 // Wireless 60 wlsair60 // Wireless Air 60 zone40 // Zone 40 @@ -39099,6 +39123,7 @@ cc_104 // cc_12 // cc_13 // congo_11 // +congo_11s10 // congo_13 // congo_20 // congo_21 // @@ -39305,6 +39330,7 @@ fs_sp2 // i500_10r // i500_11b // i500_11r // +jb_04a // jb_10b // jb_10r // jm_05r // diff --git a/src/mame/mess.flt b/src/mame/mess.flt index 1173c64b324..eee3d5ef50c 100644 --- a/src/mame/mess.flt +++ b/src/mame/mess.flt @@ -222,6 +222,7 @@ excali64.cpp exelv.cpp exp85.cpp facit4440.cpp +falco5220.cpp fanucs15.cpp fanucspmg.cpp fb01.cpp @@ -290,6 +291,7 @@ hp48.cpp hp49gp.cpp hp64k.cpp hp700.cpp +hp9825.cpp hp9845.cpp hp9k.cpp hp9k_3xx.cpp @@ -635,6 +637,7 @@ sc2.cpp scopus.cpp scorpion.cpp scv.cpp +sdk51.cpp sdk80.cpp sdk85.cpp sdk86.cpp diff --git a/src/mame/video/contra.cpp b/src/mame/video/contra.cpp index 45bab77d1f6..ef97ba765a7 100644 --- a/src/mame/video/contra.cpp +++ b/src/mame/video/contra.cpp @@ -239,9 +239,9 @@ WRITE8_MEMBER(contra_state::contra_K007121_ctrl_1_w) if (offset == 3) { if ((data & 0x8) == 0) - memcpy(m_buffered_spriteram_2.get(), m_spriteram + 0x2800, 0x800); + memcpy(m_buffered_spriteram_2.get(), m_spriteram_2 + 0x800, 0x800); else - memcpy(m_buffered_spriteram_2.get(), m_spriteram + 0x2000, 0x800); + memcpy(m_buffered_spriteram_2.get(), m_spriteram_2 + 0x000, 0x800); } if (offset == 6) { diff --git a/src/mame/video/flkatck.cpp b/src/mame/video/flkatck.cpp index 764bb40aa66..e90c49c9982 100644 --- a/src/mame/video/flkatck.cpp +++ b/src/mame/video/flkatck.cpp @@ -23,8 +23,8 @@ TILE_GET_INFO_MEMBER(flkatck_state::get_tile_info_A) uint8_t ctrl_3 = m_k007121->ctrlram_r(3); uint8_t ctrl_4 = m_k007121->ctrlram_r(4); uint8_t ctrl_5 = m_k007121->ctrlram_r(5); - int attr = m_k007121_ram[tile_index]; - int code = m_k007121_ram[tile_index + 0x400]; + int attr = m_vram[tile_index]; + int code = m_vram[tile_index + 0x400]; int bit0 = (ctrl_5 >> 0) & 0x03; int bit1 = (ctrl_5 >> 2) & 0x03; int bit2 = (ctrl_5 >> 4) & 0x03; @@ -51,8 +51,8 @@ TILE_GET_INFO_MEMBER(flkatck_state::get_tile_info_A) TILE_GET_INFO_MEMBER(flkatck_state::get_tile_info_B) { - int attr = m_k007121_ram[tile_index + 0x800]; - int code = m_k007121_ram[tile_index + 0xc00]; + int attr = m_vram[tile_index + 0x800]; + int code = m_vram[tile_index + 0xc00]; SET_TILE_INFO_MEMBER(0, code, @@ -80,16 +80,13 @@ void flkatck_state::video_start() ***************************************************************************/ -WRITE8_MEMBER(flkatck_state::flkatck_k007121_w) +WRITE8_MEMBER(flkatck_state::vram_w) { - m_k007121_ram[offset] = data; - if (offset < 0x1000) /* tiles */ - { - if (offset & 0x800) /* score */ - m_k007121_tilemap[1]->mark_tile_dirty(offset & 0x3ff); - else - m_k007121_tilemap[0]->mark_tile_dirty(offset & 0x3ff); - } + m_vram[offset] = data; + if (offset & 0x800) /* score */ + m_k007121_tilemap[1]->mark_tile_dirty(offset & 0x3ff); + else + m_k007121_tilemap[0]->mark_tile_dirty(offset & 0x3ff); } WRITE8_MEMBER(flkatck_state::flkatck_k007121_regs_w) @@ -118,18 +115,13 @@ WRITE8_MEMBER(flkatck_state::flkatck_k007121_regs_w) ***************************************************************************/ -/*************************************************************************** - - Flack Attack sprites. Each sprite has 16 bytes!: - - -***************************************************************************/ - uint32_t flkatck_state::screen_update_flkatck(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { rectangle clip[2]; const rectangle &visarea = screen.visible_area(); - + // TODO: reversed polarity? Hard to say, fwiw Combat School uses this in reverse ... + uint16_t sprite_buffer = (m_k007121->ctrlram_r(3) & 8) * 0x100; + if (m_flipscreen) { clip[0] = visarea; @@ -162,7 +154,7 @@ uint32_t flkatck_state::screen_update_flkatck(screen_device &screen, bitmap_ind1 /* draw the graphics */ m_k007121_tilemap[0]->draw(screen, bitmap, clip[0], 0, 0); - m_k007121->sprites_draw(bitmap, cliprect, m_gfxdecode->gfx(0), m_gfxdecode->palette(), &m_k007121_ram[0x1000], 0, 40, 0, screen.priority(), (uint32_t)-1, true); + m_k007121->sprites_draw(bitmap, cliprect, m_gfxdecode->gfx(0), m_gfxdecode->palette(), &m_spriteram[sprite_buffer], 0, 40, 0, screen.priority(), (uint32_t)-1, true); m_k007121_tilemap[1]->draw(screen, bitmap, clip[1], 0, 0); return 0; } diff --git a/src/mame/video/gime.cpp b/src/mame/video/gime.cpp index 71086db95c7..db8265c0b89 100644 --- a/src/mame/video/gime.cpp +++ b/src/mame/video/gime.cpp @@ -86,6 +86,7 @@ + //************************************************************************** // CONSTANTS //************************************************************************** @@ -97,6 +98,7 @@ #define LOG_INT_MASKING 0 #define LOG_GIME 0 #define LOG_TIMER 0 +#define LOG_PALETTE 0 @@ -552,12 +554,15 @@ void gime_device::update_memory(int bank) // we're in ROM static const uint8_t rom_map[4][4] = { - { 0, 1, 6, 7 }, - { 0, 1, 6, 7 }, + { 0, 1, 4, 5 }, + { 0, 1, 4, 5 }, { 0, 1, 2, 3 }, - { 4, 5, 6, 7 } + { 6, 7, 4, 5 } }; + // Pin ROM page to MMU slot + block = (block & 0xfc) | (bank & 0x03); + // look up the block in the ROM map block = rom_map[m_gime_registers[0] & 3][(block & 0x3F) - 0x3C]; @@ -1005,6 +1010,10 @@ inline void gime_device::write_palette_register(offs_t offset, uint8_t data) { offset &= 0x0F; + // perform logging + if (LOG_PALETTE) + logerror("%s: CoCo3 Palette: $%04x <== $%02x\n", describe_context(), offset + 0xffB0, data); + /* has this entry changed? */ if (m_palette_rotated[m_palette_rotated_position][offset] != data) { diff --git a/src/mame/video/itech8.cpp b/src/mame/video/itech8.cpp index 90d27ccbc54..6218c6c8e5e 100644 --- a/src/mame/video/itech8.cpp +++ b/src/mame/video/itech8.cpp @@ -146,10 +146,6 @@ void itech8_state::video_start() /* reset statics */ m_page_select = 0xc0; - /* fetch the GROM base */ - m_grom_base = memregion("grom")->base(); - m_grom_size = memregion("grom")->bytes(); - save_item(NAME(m_blitter_data)); save_item(NAME(m_blit_in_progress)); save_item(NAME(m_page_select)); @@ -180,7 +176,7 @@ WRITE8_MEMBER(itech8_state::palette_w) * *************************************/ -WRITE8_MEMBER(itech8_state::page_w) +void itech8_state::page_w(u8 data) { m_screen->update_partial(m_screen->vpos()); logerror("%04x:display_page = %02X (%d)\n", m_maincpu->pc(), data, m_screen->vpos()); @@ -198,7 +194,7 @@ WRITE8_MEMBER(itech8_state::page_w) inline uint8_t itech8_state::fetch_next_raw() { - return m_grom_base[m_fetch_offset++ % m_grom_size]; + return m_grom[m_fetch_offset++ % m_grom.length()]; } @@ -212,17 +208,17 @@ inline uint8_t itech8_state::fetch_next_rle() { if (m_fetch_rle_count == 0) { - m_fetch_rle_count = m_grom_base[m_fetch_offset++ % m_grom_size]; + m_fetch_rle_count = m_grom[m_fetch_offset++ % m_grom.length()]; m_fetch_rle_literal = m_fetch_rle_count & 0x80; m_fetch_rle_count &= 0x7f; if (!m_fetch_rle_literal) - m_fetch_rle_value = m_grom_base[m_fetch_offset++ % m_grom_size]; + m_fetch_rle_value = m_grom[m_fetch_offset++ % m_grom.length()]; } m_fetch_rle_count--; if (m_fetch_rle_literal) - m_fetch_rle_value = m_grom_base[m_fetch_offset++ % m_grom_size]; + m_fetch_rle_value = m_grom[m_fetch_offset++ % m_grom.length()]; return m_fetch_rle_value; } @@ -236,12 +232,12 @@ inline void itech8_state::consume_rle(int count) if (m_fetch_rle_count == 0) { - m_fetch_rle_count = m_grom_base[m_fetch_offset++ % m_grom_size]; + m_fetch_rle_count = m_grom[m_fetch_offset++ % m_grom.length()]; m_fetch_rle_literal = m_fetch_rle_count & 0x80; m_fetch_rle_count &= 0x7f; if (!m_fetch_rle_literal) - m_fetch_rle_value = m_grom_base[m_fetch_offset++ % m_grom_size]; + m_fetch_rle_value = m_grom[m_fetch_offset++ % m_grom.length()]; } num_to_consume = (count < m_fetch_rle_count) ? count : m_fetch_rle_count; diff --git a/src/mame/video/k007121.cpp b/src/mame/video/k007121.cpp index e5bae691d41..7714f54d60f 100644 --- a/src/mame/video/k007121.cpp +++ b/src/mame/video/k007121.cpp @@ -46,6 +46,7 @@ control registers 000: scroll x (low 8 bits) 001: -------x scroll x (high bit) ------x- enable rowscroll? (combatsc) + -----x-- unknown (flak attack) ----x--- this probably selects an alternate screen layout used in combat school where tilemap #2 is overlayed on front and doesn't scroll. The 32 lines of the front layer can be individually turned on or @@ -206,17 +207,6 @@ WRITE8_MEMBER( k007121_device::ctrl_w ) * 4 | ----xxx- | sprite size 000=16x16 001=16x8 010=8x16 011=8x8 100=32x32 * 4 | -------x | x position (high bit) * - * Flack Attack uses a different, "wider" layout with 32 bytes per sprite, - * mapped as follows, and the priority order is reversed. Maybe it is a - * compatibility mode with an older custom IC. It is not known how this - * alternate layout is selected. - * - * 0 -> e - * 1 -> f - * 2 -> 6 - * 3 -> 4 - * 4 -> 8 - * */ void k007121_device::sprites_draw( bitmap_ind16 &bitmap, const rectangle &cliprect, gfx_element *gfx, device_palette_interface &palette, @@ -224,55 +214,37 @@ void k007121_device::sprites_draw( bitmap_ind16 &bitmap, const rectangle &clipre { // gfx_element *gfx = gfxs[chip]; int flipscreen = m_flipscreen; - int i, num, inc, offs[5]; + int i, num, inc; - if (is_flakatck) - { - num = 0x40; - inc = -0x20; - source += 0x3f * 0x20; - offs[0] = 0x0e; - offs[1] = 0x0f; - offs[2] = 0x06; - offs[3] = 0x04; - offs[4] = 0x08; - } - else /* all others */ + + // TODO: sprite limit is supposed to be per-line! (check MT #00185) + num = 0x40; + //num = (k007121->ctrlram[0x03] & 0x40) ? 0x80 : 0x40; /* WRONG!!! (needed by combatsc) */ + + inc = 5; + /* when using priority buffer, draw front to back */ + if (pri_mask != -1) { - /* TODO: sprite limit is supposed to be per-line! (check MT #00185) */ - num = 0x40; - //num = (k007121->ctrlram[0x03] & 0x40) ? 0x80 : 0x40; /* WRONG!!! (needed by combatsc) */ - - inc = 5; - offs[0] = 0x00; - offs[1] = 0x01; - offs[2] = 0x02; - offs[3] = 0x03; - offs[4] = 0x04; - /* when using priority buffer, draw front to back */ - if (pri_mask != -1) - { - source += (num - 1)*inc; - inc = -inc; - } + source += (num - 1)*inc; + inc = -inc; } for (i = 0; i < num; i++) { - int number = source[offs[0]]; /* sprite number */ - int sprite_bank = source[offs[1]] & 0x0f; /* sprite bank */ - int sx = source[offs[3]]; /* vertical position */ - int sy = source[offs[2]]; /* horizontal position */ - int attr = source[offs[4]]; /* attributes */ - int xflip = source[offs[4]] & 0x10; /* flip x */ - int yflip = source[offs[4]] & 0x20; /* flip y */ - int color = base_color + ((source[offs[1]] & 0xf0) >> 4); + int number = source[0]; /* sprite number */ + int sprite_bank = source[1] & 0x0f; /* sprite bank */ + int sx = source[3]; /* vertical position */ + int sy = source[2]; /* horizontal position */ + int attr = source[4]; /* attributes */ + int xflip = source[4] & 0x10; /* flip x */ + int yflip = source[4] & 0x20; /* flip y */ + int color = base_color + ((source[1] & 0xf0) >> 4); int width, height; int transparent_mask; static const int x_offset[4] = {0x0,0x1,0x4,0x5}; static const int y_offset[4] = {0x0,0x2,0x8,0xa}; int x,y, ex, ey, flipx, flipy, destx, desty; - + if (attr & 0x01) sx -= 256; if (sy >= 240) sy -= 256; @@ -282,68 +254,66 @@ void k007121_device::sprites_draw( bitmap_ind16 &bitmap, const rectangle &clipre /* Flak Attack doesn't use a lookup PROM, it maps the color code directly */ /* to a palette entry */ + // TODO: check if it's true or callback-ize this one and remove the per-game hack. if (is_flakatck) transparent_mask = 1 << 0; else transparent_mask = palette.transpen_mask(*gfx, color, 0); - if (!is_flakatck || source[0x00]) /* Flak Attack needs this */ - { - number += bank_base; + number += bank_base; - switch (attr & 0xe) - { - case 0x06: width = height = 1; break; - case 0x04: width = 1; height = 2; number &= (~2); break; - case 0x02: width = 2; height = 1; number &= (~1); break; - case 0x00: width = height = 2; number &= (~3); break; - case 0x08: width = height = 4; number &= (~3); break; - default: width = 1; height = 1; + switch (attr & 0xe) + { + case 0x06: width = height = 1; break; + case 0x04: width = 1; height = 2; number &= (~2); break; + case 0x02: width = 2; height = 1; number &= (~1); break; + case 0x00: width = height = 2; number &= (~3); break; + case 0x08: width = height = 4; number &= (~3); break; + default: width = 1; height = 1; // logerror("Unknown sprite size %02x\n", attr & 0xe); // popmessage("Unknown sprite size %02x\n", attr & 0xe); - } + } - for (y = 0; y < height; y++) + for (y = 0; y < height; y++) + { + for (x = 0; x < width; x++) { - for (x = 0; x < width; x++) + ex = xflip ? (width - 1 - x) : x; + ey = yflip ? (height - 1 - y) : y; + + if (flipscreen) + { + flipx = !xflip; + flipy = !yflip; + destx = 248 - (sx + x * 8); + desty = 248 - (sy + y * 8); + } + else { - ex = xflip ? (width - 1 - x) : x; - ey = yflip ? (height - 1 - y) : y; - - if (flipscreen) - { - flipx = !xflip; - flipy = !yflip; - destx = 248 - (sx + x * 8); - desty = 248 - (sy + y * 8); - } - else - { - flipx = xflip; - flipy = yflip; - destx = global_x_offset + sx + x * 8; - desty = sy + y * 8; - } - - if (pri_mask != -1) - gfx->prio_transmask(bitmap,cliprect, - number + x_offset[ex] + y_offset[ey], - color, - flipx,flipy, - destx,desty, - priority_bitmap,pri_mask, - transparent_mask); - else - gfx->transmask(bitmap,cliprect, - number + x_offset[ex] + y_offset[ey], - color, - flipx,flipy, - destx,desty, - transparent_mask); + flipx = xflip; + flipy = yflip; + destx = global_x_offset + sx + x * 8; + desty = sy + y * 8; } + + if (pri_mask != -1) + gfx->prio_transmask(bitmap,cliprect, + number + x_offset[ex] + y_offset[ey], + color, + flipx,flipy, + destx,desty, + priority_bitmap,pri_mask, + transparent_mask); + else + gfx->transmask(bitmap,cliprect, + number + x_offset[ex] + y_offset[ey], + color, + flipx,flipy, + destx,desty, + transparent_mask); } } - + source += inc; } } diff --git a/src/mame/video/m52.cpp b/src/mame/video/m52.cpp index cedc7db65e6..1bb2852d418 100644 --- a/src/mame/video/m52.cpp +++ b/src/mame/video/m52.cpp @@ -182,7 +182,7 @@ WRITE8_MEMBER(m52_state::m52_scroll_w) m_bg_tilemap->set_scrollx(0, 255); m_bg_tilemap->set_scrollx(1, 255); m_bg_tilemap->set_scrollx(2, 255); - m_bg_tilemap->set_scrollx(3, -data); + m_bg_tilemap->set_scrollx(3, -(data + 1)); } @@ -298,17 +298,17 @@ void m52_state::draw_background(bitmap_ind16 &bitmap, const rectangle &cliprect, if (flip_screen()) { - xpos = 127 - xpos; - ypos = 255 - ypos - BGHEIGHT; + xpos = 264 - xpos; + ypos = 264 - ypos - BGHEIGHT; } - xpos += 128; + xpos += 124; /* this may not be correct */ - ypos = ypos + (22 - 8); + ypos += 16; - m_gfxdecode->gfx(image)->transpen(bitmap,cliprect, + m_gfxdecode->gfx(image)->transpen(bitmap,cliprect, 0, 0, flip_screen(), flip_screen(), @@ -316,7 +316,7 @@ void m52_state::draw_background(bitmap_ind16 &bitmap, const rectangle &cliprect, ypos, 0); - m_gfxdecode->gfx(image)->transpen(bitmap,cliprect, + m_gfxdecode->gfx(image)->transpen(bitmap,cliprect, 0, 0, flip_screen(), flip_screen(), @@ -344,34 +344,16 @@ void m52_state::draw_background(bitmap_ind16 &bitmap, const rectangle &cliprect, /************************************* * - * Video render + * Sprites rendering * *************************************/ -uint32_t m52_state::screen_update_m52(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +void m52_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int initoffs) { int offs; - bitmap.fill(0, cliprect); - - if (!(m_bgcontrol & 0x20)) - { - if (!(m_bgcontrol & 0x10)) - draw_background(bitmap, cliprect, m_bg2xpos, m_bg2ypos, 2); /* distant mountains */ - - if (!(m_bgcontrol & 0x02)) - draw_background(bitmap, cliprect, m_bg1xpos, m_bg1ypos, 3); /* hills */ - - if (!(m_bgcontrol & 0x04)) - draw_background(bitmap, cliprect, m_bg1xpos, m_bg1ypos, 4); /* cityscape */ - } - - m_bg_tilemap->set_flip(flip_screen() ? TILEMAP_FLIPX | TILEMAP_FLIPY : 0); - - m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0); - /* draw the sprites */ - for (offs = 0xfc; offs >= 0; offs -= 4) + for (offs = initoffs; offs >= (initoffs & 0xc0); offs -= 4) { int sy = 257 - m_spriteram[offs]; int color = m_spriteram[offs + 1] & 0x3f; @@ -397,11 +379,11 @@ uint32_t m52_state::screen_update_m52(screen_device &screen, bitmap_ind16 &bitma clip.max_y = 255 - temp; flipx = !flipx; flipy = !flipy; - sx = 112 - sx; - sy = 257 + 11 - sy; + sx = 238 - sx; + sy = 282 - sy; } - sx += 128; + sx += 129; /* in theory anyways; in practice, some of the molecule-looking guys get clipped */ #ifdef SPLIT_SPRITES @@ -414,5 +396,41 @@ uint32_t m52_state::screen_update_m52(screen_device &screen, bitmap_ind16 &bitma code, color, flipx, flipy, sx, sy, m_palette->transpen_mask(*m_gfxdecode->gfx(1), color, 512 + 32)); } +} + + + +/************************************* + * + * Video render + * + *************************************/ + +uint32_t m52_state::screen_update_m52(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + int offs; + + bitmap.fill(0, cliprect); + + if (!(m_bgcontrol & 0x20)) + { + if (!(m_bgcontrol & 0x10)) + draw_background(bitmap, cliprect, m_bg2xpos, m_bg2ypos, 2); /* distant mountains */ + + if (!(m_bgcontrol & 0x02)) + draw_background(bitmap, cliprect, m_bg1xpos, m_bg1ypos, 3); /* hills */ + + if (!(m_bgcontrol & 0x04)) + draw_background(bitmap, cliprect, m_bg1xpos, m_bg1ypos, 4); /* cityscape */ + } + + m_bg_tilemap->set_flip(flip_screen() ? TILEMAP_FLIPX | TILEMAP_FLIPY : 0); + + m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0); + + /* draw the sprites */ + for (offs = 0x3c; offs <= 0xfc; offs += 0x40) + draw_sprites(bitmap, cliprect, offs); + return 0; } diff --git a/src/mame/video/namcos22.cpp b/src/mame/video/namcos22.cpp index e12254a611d..2023f4fdd3c 100644 --- a/src/mame/video/namcos22.cpp +++ b/src/mame/video/namcos22.cpp @@ -4,27 +4,25 @@ * video hardware for Namco System22 * * TODO: - * - * - emulate slave dsp! * - texture u/v mapping is often 1 pixel off, resulting in many glitch lines/gaps between textures. The glitch may be in MAME core: * it used to be much worse with the legacy_poly_manager - * - tokyowar tanks are not shootable, same for timecris helicopter, there's still a very small hitbox but almost impossible to hit. - * is this related to dsp? or cpu? * - find out how/where vics num_sprites is determined exactly, currently a workaround is needed for airco22b and dirtdash * - improve ss22 fogging: * + scene changes too rapidly sometimes, eg. dirtdash snow level finish (see attract), or aquajet going down the waterfall * + 100% fog if you start dirtdash at the hill level * - improve ss22 lighting, eg. mountains in alpinr2b selection screen - * - improve ss22 spot: + * - improve ss22 spot: the bugs hint toward an extra bg layer bank? * + dirtdash spotlight is opaque for a short time when exiting the jungle level * + dirtdash speedometer has wrong colors when in the jungle level - * + dirtdash record time message creates a 'gap' in the spotlight when entering the jungle level (possibly just a game bug?) - * - add layer enable in system 22, see bugs in cybrcomm and victlapw - * - window clipping is wrong in acedrvrw, victlapw + * + dirtdash record time message creates a 'gap' in the spotlight when entering the jungle level + * - polygon layer stays visible sometimes when it shouldn't: + * + cybrcomm/victlapw namco logo screen after attract demo + * + airco22b title logo after attract demo + * + aquajet namco logo/game over after ending + * - window clipping is wrong in acedrvrw, victlapw (see rear-view mirrors), and alpinr2b character selection screen * - ridgerac waving flag title screen is missing, just an empty beach scenery instead * - global offset is wrong in non-super22 servicemode video test, and above that, it flickers in acedrvrw, victlapw * - dirtdash polys are broken at the start section of the mountain level, maybe bad rom? - * - alpinr2b skiier selection screen should have mirrored models (easiest to see with cursor on the red pants guy). specular reflection? * - propcycl scoreboard sprite part should fade out in attract mode and just before game over, fader or fog related? * - ridgerac fogging isn't applied to the upper/side part of the sky (best seen when driving down a hill), it's fine in ridgera2 * czram contents is rather odd here and partly cleared (probably the cause?): @@ -756,12 +754,12 @@ float namcos22_state::dspfloat_to_nativefloat(uint32_t val) return result; } -/* modal rendering properties */ +/* model rendering properties */ void namcos22_state::matrix3d_multiply(float a[4][4], float b[4][4]) { - float temp[4][4]; + float result[4][4]; - for (int row = 0; row < 4; row++) + for (int row = 0; row < 4; row++) { for (int col = 0; col < 4; col++) { @@ -770,24 +768,40 @@ void namcos22_state::matrix3d_multiply(float a[4][4], float b[4][4]) { sum += a[row][i] * b[i][col]; } - temp[row][col] = sum; + result[row][col] = sum; } } - memcpy(a, temp, sizeof(temp)); + memcpy(a, result, sizeof(result)); } void namcos22_state::matrix3d_identity(float m[4][4]) { - for (int r = 0; r < 4; r++) + for (int row = 0; row < 4; row++) { - for (int c = 0; c < 4; c++) + for (int col = 0; col < 4; col++) { - m[r][c] = (r == c) ? 1.0 : 0.0; + m[row][col] = (row == col) ? 1.0f : 0.0f; } } } +void namcos22_state::matrix3d_apply_reflection(float m[4][4]) +{ + if (!m_reflection) + return; + + float r[4][4]; + matrix3d_identity(r); + + if (m_reflection & 0x10) + r[0][0] = -1.0f; + if (m_reflection & 0x20) + r[1][1] = -1.0f; + + matrix3d_multiply(m, r); +} + void namcos22_state::transform_point(float *vx, float *vy, float *vz, float m[4][4]) { float x = *vx; @@ -968,7 +982,7 @@ void namcos22_state::draw_direct_poly(const uint16_t *src) * 0x07350 - guardrail * 0x061a8 - red car */ -void namcos22_state::blit_single_quad(bitmap_rgb32 &bitmap, uint32_t color, uint32_t addr, float m[4][4], int32_t polyshift, int flags, int packetformat) +void namcos22_state::blit_single_quad(uint32_t color, uint32_t addr, float m[4][4], int32_t polyshift, int flags, int packetformat) { int absolute_priority = m_absolute_priority; int32_t zsort; @@ -987,16 +1001,19 @@ void namcos22_state::blit_single_quad(bitmap_rgb32 &bitmap, uint32_t color, uint } /* backface cull one-sided polygons */ - if (flags & 0x0020 && - (v[2].x*((v[0].z*v[1].y)-(v[0].y*v[1].z)))+ - (v[2].y*((v[0].x*v[1].z)-(v[0].z*v[1].x)))+ - (v[2].z*((v[0].y*v[1].x)-(v[0].x*v[1].y))) >= 0 && - - (v[0].x*((v[2].z*v[3].y)-(v[2].y*v[3].z)))+ - (v[0].y*((v[2].x*v[3].z)-(v[2].z*v[3].x)))+ - (v[0].z*((v[2].y*v[3].x)-(v[2].x*v[3].y))) >= 0) - { - return; + if (flags & 0x0020) + { + float c1 = + (v[2].x*((v[0].z*v[1].y)-(v[0].y*v[1].z)))+ + (v[2].y*((v[0].x*v[1].z)-(v[0].z*v[1].x)))+ + (v[2].z*((v[0].y*v[1].x)-(v[0].x*v[1].y))); + float c2 = + (v[0].x*((v[2].z*v[3].y)-(v[2].y*v[3].z)))+ + (v[0].y*((v[2].x*v[3].z)-(v[2].z*v[3].x)))+ + (v[0].z*((v[2].y*v[3].x)-(v[2].x*v[3].y))); + + if ((m_cullflip && c1 <= 0.0f && c2 <= 0.0f) || (!m_cullflip && c1 >= 0.0f && c2 >= 0.0f)) + return; } for (i = 0; i < 4; i++) @@ -1022,7 +1039,7 @@ void namcos22_state::blit_single_quad(bitmap_rgb32 &bitmap, uint32_t color, uint else if (m_SurfaceNormalFormat == 0x4000) m_LitSurfaceIndex++; else - logerror("unknown normal format: 0x%x\n", m_SurfaceNormalFormat); + logerror("blit_single_quad:unknown normal format: 0x%x\n", m_SurfaceNormalFormat); } else if (packetformat & 0x40) { @@ -1109,7 +1126,7 @@ void namcos22_state::blit_single_quad(bitmap_rgb32 &bitmap, uint32_t color, uint } -void namcos22_state::blit_quads(bitmap_rgb32 &bitmap, int32_t addr, float m[4][4], int32_t base) +void namcos22_state::blit_quads(int32_t addr, float m[4][4], int32_t base) { // int additionalnormals = 0; int chunklength = point_read(addr++); @@ -1148,7 +1165,7 @@ void namcos22_state::blit_quads(bitmap_rgb32 &bitmap, int32_t addr, float m[4][4 flags = point_read(addr + 1); color = point_read(addr + 2); bias = 0; - blit_single_quad(bitmap, color, addr + 3, m, bias, flags, packetformat); + blit_single_quad(color, addr + 3, m, bias, flags, packetformat); break; case 0x18: @@ -1161,7 +1178,7 @@ void namcos22_state::blit_quads(bitmap_rgb32 &bitmap, int32_t addr, float m[4][4 flags = point_read(addr + 1); color = point_read(addr + 2); bias = point_read(addr + 3); - blit_single_quad(bitmap, color, addr + 4, m, bias, flags, packetformat); + blit_single_quad(color, addr + 4, m, bias, flags, packetformat); break; case 0x10: /* vertex lighting */ @@ -1198,7 +1215,7 @@ void namcos22_state::blit_quads(bitmap_rgb32 &bitmap, int32_t addr, float m[4][4 } } -void namcos22_state::blit_polyobject(bitmap_rgb32 &bitmap, int code, float m[4][4]) +void namcos22_state::blit_polyobject(int code, float m[4][4]) { uint32_t addr1 = point_read(code); m_LitSurfaceCount = 0; @@ -1209,7 +1226,7 @@ void namcos22_state::blit_polyobject(bitmap_rgb32 &bitmap, int code, float m[4][ int32_t addr2 = point_read(addr1++); if (addr2 < 0) break; - blit_quads(bitmap, addr2, m, code); + blit_quads(addr2, m, code); } } @@ -1245,21 +1262,13 @@ void namcos22_state::blit_polyobject(bitmap_rgb32 &bitmap, int code, float m[4][ /*******************************************************************************/ -/** - * 0xfffd - * 0x0: transform - * 0x1 - * 0x2 - * 0x5: transform - * >=0x45: draw primitive - */ void namcos22_state::slavesim_handle_bb0003(const int32_t *src) { /* bb0003 or 3b0003 14.00c8 light.ambient light.power - 01.0000 ? light.dx + 01.0000 reflection,? light.dx 06.5a82 window priority light.dy 00.a57e ? light.dz @@ -1280,6 +1289,8 @@ void namcos22_state::slavesim_handle_bb0003(const int32_t *src) m_camera_ly = dspfixed_to_nativefloat(src[0x3]); m_camera_lz = dspfixed_to_nativefloat(src[0x4]); + m_reflection = src[0x2] >> 16 & 0x30; // z too? + m_cullflip = (m_reflection == 0x10 || m_reflection == 0x20); m_absolute_priority = src[0x3] >> 16; m_camera_vx = (int16_t)(src[5] >> 16); m_camera_vy = (int16_t)(src[5] & 0xffff); @@ -1299,11 +1310,20 @@ void namcos22_state::slavesim_handle_bb0003(const int32_t *src) m_viewmatrix[1][2] = dspfixed_to_nativefloat(src[0x13]); m_viewmatrix[2][2] = dspfixed_to_nativefloat(src[0x14]); + matrix3d_apply_reflection(m_viewmatrix); transform_normal(&m_camera_lx, &m_camera_ly, &m_camera_lz, m_viewmatrix); } -void namcos22_state::slavesim_handle_200002(bitmap_rgb32 &bitmap, const int32_t *src) +void namcos22_state::slavesim_handle_200002(const int32_t *src) { + /** + * 0xfffd + * 0x0: transform + * 0x1 + * 0x2 + * 0x5: transform + * >=0x45: draw primitive + */ if (m_PrimitiveID >= 0x45) { float m[4][4]; /* row major */ @@ -1327,11 +1347,11 @@ void namcos22_state::slavesim_handle_200002(bitmap_rgb32 &bitmap, const int32_t m[3][2] = src[0xc]; /* zpos */ matrix3d_multiply(m, m_viewmatrix); - blit_polyobject(bitmap, m_PrimitiveID, m); + blit_polyobject(m_PrimitiveID, m); } else if (m_PrimitiveID != 0 && m_PrimitiveID != 2) { - logerror("slavesim_handle_200002:unk code=0x%x\n", m_PrimitiveID); + logerror("slavesim_handle_200002:unknown code=0x%x\n", m_PrimitiveID); // ridgerac title screen waving flag: 0x5 } } @@ -1349,6 +1369,8 @@ void namcos22_state::slavesim_handle_300000(const int32_t *src) m_viewmatrix[0][2] = dspfixed_to_nativefloat(src[7]); m_viewmatrix[1][2] = dspfixed_to_nativefloat(src[8]); m_viewmatrix[2][2] = dspfixed_to_nativefloat(src[9]); + + matrix3d_apply_reflection(m_viewmatrix); } void namcos22_state::slavesim_handle_233002(const int32_t *src) @@ -1367,12 +1389,9 @@ void namcos22_state::slavesim_handle_233002(const int32_t *src) m_objectshift = src[2]; } -void namcos22_state::simulate_slavedsp(bitmap_rgb32 &bitmap) +void namcos22_state::simulate_slavedsp() { const int32_t *src = 0x300 + (int32_t *)m_polygonram.target(); - int16_t len; - - matrix3d_identity(m_viewmatrix); if (m_is_ss22) { @@ -1385,9 +1404,15 @@ void namcos22_state::simulate_slavedsp(bitmap_rgb32 &bitmap) for (;;) { - int16_t next; + /* hackery! commands should be streamed, not parsed here */ m_PrimitiveID = *src++; - len = (int16_t)*src++; + uint16_t len = *src++; + int32_t index = src - (int32_t *)m_polygonram.target(); + if ((index + len) >= 0x7fff) + { + logerror("simulate_slavedsp:buffer overflow len=0x%x code=0x%x addr=0x%x\n", len, m_PrimitiveID, index); + return; + } switch (len) { @@ -1396,7 +1421,7 @@ void namcos22_state::simulate_slavedsp(bitmap_rgb32 &bitmap) break; case 0x10: - slavesim_handle_233002(src); /* set modal rendering options */ + slavesim_handle_233002(src); /* set model rendering options */ break; case 0x0a: @@ -1404,39 +1429,47 @@ void namcos22_state::simulate_slavedsp(bitmap_rgb32 &bitmap) break; case 0x0d: - slavesim_handle_200002(bitmap, src); /* render primitive */ + slavesim_handle_200002(src); /* render primitive */ break; default: - logerror("unk 3d data(%d) addr=0x%x!", len, (int)(src-(int32_t*)m_polygonram.target())); + { + std::string polydata; + int i = 0; + for (; i < len && i < 0x20; i++) { - int i; - for (i = 0; i < len; i++) - { - logerror(" %06x", src[i] & 0xffffff); - } - logerror("\n"); + char h[8]; + sprintf(h, " %06x", src[i] & 0xffffff); + polydata += h; } + if (i < len) + polydata += " (...)"; + logerror("simulate_slavedsp:unknown 3d data len=0x%x code=0x%x addr=0x%x!%s\n", len, m_PrimitiveID, index, polydata); return; + } } - /* hackery! commands should be streamed, not parsed here */ src += len; src++; /* always 0xffff */ - next = (int16_t)*src++; /* link to next command */ - if ((next & 0x7fff) != (src - (int32_t *)m_polygonram.target())) + uint16_t next = *src++ & 0x7fff; /* link to next command */ + if (next != (index + len + 1 + 1)) { /* end of list */ break; } + if (next == 0x7fff) + { + logerror("simulate_slavedsp:buffer overflow next=0x7fff\n"); + return; + } } } -void namcos22_state::draw_polygons(bitmap_rgb32 &bitmap) +void namcos22_state::draw_polygons() { if (m_slave_simulation_active) { - simulate_slavedsp(bitmap); + simulate_slavedsp(); m_poly->wait("draw_polygons"); } } @@ -1445,7 +1478,7 @@ void namcos22_state::draw_polygons(bitmap_rgb32 &bitmap) /*********************************************************************************************/ -void namcos22_state::draw_sprite_group(bitmap_rgb32 &bitmap, const rectangle &cliprect, const uint32_t *src, const uint32_t *attr, int num_sprites, int deltax, int deltay, int y_lowres) +void namcos22_state::draw_sprite_group(const uint32_t *src, const uint32_t *attr, int num_sprites, int deltax, int deltay, int y_lowres) { for (int i = 0; i < num_sprites; i++) { @@ -1570,7 +1603,7 @@ void namcos22_state::draw_sprite_group(bitmap_rgb32 &bitmap, const rectangle &cl } } -void namcos22_state::draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect) +void namcos22_state::draw_sprites() { const uint32_t *src; const uint32_t *attr; @@ -1641,7 +1674,7 @@ void namcos22_state::draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprec { src = &m_spriteram[0x04000/4 + base*4]; attr = &m_spriteram[0x20000/4 + base*2]; - draw_sprite_group(bitmap, cliprect, src, attr, num_sprites, deltax, deltay, y_lowres); + draw_sprite_group(src, attr, num_sprites, deltax, deltay, y_lowres); } /* VICS RAM provides two additional banks (also many unknown regs here) */ @@ -1675,7 +1708,7 @@ void namcos22_state::draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprec { src = &m_vics_data[(m_vics_control[0x48/4] & 0xffff)/4]; attr = &m_vics_data[(m_vics_control[0x58/4] & 0xffff)/4]; - draw_sprite_group(bitmap, cliprect, src, attr, num_sprites, deltax, deltay, y_lowres); + draw_sprite_group(src, attr, num_sprites, deltax, deltay, y_lowres); } num_sprites = m_vics_control[0x60/4] >> 4 & 0x1ff; // no +1 @@ -1691,7 +1724,7 @@ void namcos22_state::draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprec { src = &m_vics_data[(m_vics_control[0x68/4] & 0xffff)/4]; attr = &m_vics_data[(m_vics_control[0x78/4] & 0xffff)/4]; - draw_sprite_group(bitmap, cliprect, src, attr, num_sprites, deltax, deltay, y_lowres); + draw_sprite_group(src, attr, num_sprites, deltax, deltay, y_lowres); } } @@ -1741,15 +1774,21 @@ TILE_GET_INFO_MEMBER(namcos22_state::get_text_tile_info) WRITE32_MEMBER(namcos22_state::namcos22_textram_w) { + uint32_t prevdata = m_textram[offset]; COMBINE_DATA(&m_textram[offset]); - m_bgtilemap->mark_tile_dirty(offset * 2); - m_bgtilemap->mark_tile_dirty(offset * 2 + 1); + if (prevdata != m_textram[offset]) + { + m_bgtilemap->mark_tile_dirty(offset * 2); + m_bgtilemap->mark_tile_dirty(offset * 2 + 1); + } } WRITE32_MEMBER(namcos22_state::namcos22_cgram_w) { + uint32_t prevdata = m_cgram[offset]; COMBINE_DATA(&m_cgram[offset]); - m_gfxdecode->gfx(0)->mark_dirty(offset/32); + if (prevdata != m_cgram[offset]) + m_gfxdecode->gfx(0)->mark_dirty(offset/32); } READ32_MEMBER(namcos22_state::namcos22_tilemapattr_r) @@ -2304,8 +2343,8 @@ uint32_t namcos22_state::screen_update_namcos22s(screen_device &screen, bitmap_r // layers uint8_t layer = nthbyte(m_mixer, 0x1f); if (layer & 4) draw_text_layer(screen, bitmap, cliprect); - if (layer & 2) draw_sprites(bitmap, cliprect); - if (layer & 1) draw_polygons(bitmap); + if (layer & 2) draw_sprites(); + if (layer & 1) draw_polygons(); m_poly->render_scene(screen, bitmap); if (layer & 4) namcos22s_mix_text_layer(screen, bitmap, cliprect, 6); @@ -2339,7 +2378,7 @@ uint32_t namcos22_state::screen_update_namcos22(screen_device &screen, bitmap_rg bitmap.fill(m_palette->pen(0x7fff), cliprect); // layers - draw_polygons(bitmap); + draw_polygons(); m_poly->render_scene(screen, bitmap); draw_text_layer(screen, bitmap, cliprect); // text layer + final mix(gamma) @@ -2352,6 +2391,8 @@ uint32_t namcos22_state::screen_update_namcos22(screen_device &screen, bitmap_rg void namcos22_state::init_tables() { + matrix3d_identity(m_viewmatrix); + m_dirtypal = std::make_unique<uint8_t[]>(0x8000/4); memset(m_dirtypal.get(), 1, 0x8000/4); memset(m_paletteram, 0, 0x8000); diff --git a/src/osd/windows/window.cpp b/src/osd/windows/window.cpp index 69bb5153ed4..ca4062a9adf 100644 --- a/src/osd/windows/window.cpp +++ b/src/osd/windows/window.cpp @@ -325,6 +325,7 @@ win_window_info::win_window_info( m_non_fullscreen_bounds.right = 0; m_non_fullscreen_bounds.bottom = 0; m_prescale = video_config.prescale; + m_index = index; } POINT win_window_info::s_saved_cursor_pos = { -1, -1 }; diff --git a/src/tools/unidasm.cpp b/src/tools/unidasm.cpp index 837f50e3e75..85d57327908 100644 --- a/src/tools/unidasm.cpp +++ b/src/tools/unidasm.cpp @@ -349,8 +349,9 @@ static const dasm_table_entry dasm_table[] = { "hd6309", be, 0, []() -> util::disasm_interface * { return new hd6309_disassembler; } }, { "hd63701", be, 0, []() -> util::disasm_interface * { return new m680x_disassembler(63701); } }, { "hmcs40", le, -1, []() -> util::disasm_interface * { return new hmcs40_disassembler; } }, - { "hp_hybrid", be, -1, []() -> util::disasm_interface * { return new hp_hybrid_disassembler; } }, { "hp_5061_3001", be, -1, []() -> util::disasm_interface * { return new hp_5061_3001_disassembler; } }, + { "hp_5061_3011", be, -1, []() -> util::disasm_interface * { return new hp_5061_3011_disassembler; } }, + { "hp_09825_67907", be, -1, []() -> util::disasm_interface * { return new hp_09825_67907_disassembler; } }, { "hyperstone", be, 0, []() -> util::disasm_interface * { return new hyperstone_disassembler(&hyperstone_unidasm); } }, { "i4004", le, 0, []() -> util::disasm_interface * { return new i4004_disassembler; } }, { "i4040", le, 0, []() -> util::disasm_interface * { return new i4040_disassembler; } }, |