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-rw-r--r--src/devices/cpu/dsp16/dsp16fe.cpp4
-rw-r--r--src/devices/cpu/i386/i386.cpp5
-rw-r--r--src/devices/cpu/m6809/6x09dasm.cpp10
-rw-r--r--src/devices/cpu/tlcs870/tlcs870.cpp3026
-rw-r--r--src/devices/cpu/tlcs870/tlcs870.h362
-rw-r--r--src/devices/cpu/tlcs870/tlcs870_ops.cpp951
-rw-r--r--src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp127
-rw-r--r--src/devices/cpu/tlcs870/tlcs870_ops_helper.cpp500
-rw-r--r--src/devices/cpu/tlcs870/tlcs870_ops_reg.cpp760
-rw-r--r--src/devices/cpu/tlcs870/tlcs870_ops_src.cpp548
-rw-r--r--src/devices/cpu/tlcs870/tlcs870d.cpp27
-rw-r--r--src/devices/machine/mc68681.cpp934
-rw-r--r--src/devices/machine/mc68681.h51
-rw-r--r--src/devices/machine/nscsi_cd.cpp34
-rw-r--r--src/devices/machine/nscsi_cd.h2
-rw-r--r--src/devices/sound/aica.cpp88
-rw-r--r--src/devices/sound/aica.h7
-rw-r--r--src/devices/sound/x1_010.cpp63
-rw-r--r--src/devices/sound/x1_010.h11
-rw-r--r--src/devices/video/psx.cpp58
-rw-r--r--src/devices/video/psx.h22
-rw-r--r--src/emu/romload.cpp4
-rw-r--r--src/mame/audio/orbit.cpp9
-rw-r--r--src/mame/drivers/comebaby.cpp2
-rw-r--r--src/mame/drivers/dccons.cpp5
-rw-r--r--src/mame/drivers/dec8.cpp6
-rw-r--r--src/mame/drivers/funworld.cpp21
-rw-r--r--src/mame/drivers/goldstar.cpp6
-rw-r--r--src/mame/drivers/hikaru.cpp9
-rw-r--r--src/mame/drivers/hng64.cpp20
-rw-r--r--src/mame/drivers/model3.cpp2
-rw-r--r--src/mame/drivers/modena.cpp175
-rw-r--r--src/mame/drivers/naomi.cpp4
-rw-r--r--src/mame/drivers/next.cpp2
-rw-r--r--src/mame/drivers/orbit.cpp45
-rw-r--r--src/mame/drivers/peyper.cpp4
-rw-r--r--src/mame/drivers/play_1.cpp22
-rw-r--r--src/mame/drivers/playch10.cpp2
-rw-r--r--src/mame/drivers/polgar.cpp154
-rw-r--r--src/mame/drivers/segas32.cpp1
-rw-r--r--src/mame/drivers/seta.cpp136
-rw-r--r--src/mame/drivers/seta2.cpp186
-rw-r--r--src/mame/drivers/snk.cpp56
-rw-r--r--src/mame/drivers/super80.cpp6
-rw-r--r--src/mame/drivers/system1.cpp28
-rw-r--r--src/mame/drivers/tmnt.cpp2
-rw-r--r--src/mame/drivers/trs80m3.cpp88
-rw-r--r--src/mame/drivers/twincobr.cpp27
-rw-r--r--src/mame/drivers/vgmplay.cpp44
-rw-r--r--src/mame/includes/next.h2
-rw-r--r--src/mame/includes/orbit.h27
-rw-r--r--src/mame/includes/seta.h8
-rw-r--r--src/mame/includes/seta2.h7
-rw-r--r--src/mame/includes/trs80m3.h7
-rw-r--r--src/mame/includes/twincobr.h1
-rw-r--r--src/mame/layout/vgmplay.lay4
-rw-r--r--src/mame/machine/inder_vid.cpp19
-rw-r--r--src/mame/machine/inder_vid.h2
-rw-r--r--src/mame/machine/pcecommn.cpp2
-rw-r--r--src/mame/machine/trs80m3.cpp47
-rw-r--r--src/mame/mame.lst9
-rw-r--r--src/mame/mess.flt1
-rw-r--r--src/mame/video/apple2.cpp38
-rw-r--r--src/mame/video/orbit.cpp10
-rw-r--r--src/mame/video/seta.cpp31
-rw-r--r--src/tools/imgtool/main.cpp18
66 files changed, 4816 insertions, 4073 deletions
diff --git a/src/devices/cpu/dsp16/dsp16fe.cpp b/src/devices/cpu/dsp16/dsp16fe.cpp
index f7387768ccb..2e79371bdd2 100644
--- a/src/devices/cpu/dsp16/dsp16fe.cpp
+++ b/src/devices/cpu/dsp16/dsp16fe.cpp
@@ -816,7 +816,7 @@ void dsp16_device_base::frontend::describe_x(opcode_desc &desc, u16 op)
void dsp16_device_base::frontend::describe_y(opcode_desc &desc, u16 op, bool read, bool write)
{
- u32 const r(REG_BIT_YAAU_R0 + ((op >> 2) && 0x0003U));
+ u32 const r(REG_BIT_YAAU_R0 + ((op >> 2) & 0x0003U));
if (read)
desc.flags |= OPFLAG_READS_MEMORY;
if (write)
@@ -844,7 +844,7 @@ void dsp16_device_base::frontend::describe_y(opcode_desc &desc, u16 op, bool rea
void dsp16_device_base::frontend::describe_z(opcode_desc &desc, u16 op)
{
- u32 const r(REG_BIT_YAAU_R0 + ((op >> 2) && 0x0003U));
+ u32 const r(REG_BIT_YAAU_R0 + ((op >> 2) & 0x0003U));
desc.flags |= OPFLAG_READS_MEMORY | OPFLAG_WRITES_MEMORY;
flag_output_reg(desc, r);
switch (op & 0x0003U)
diff --git a/src/devices/cpu/i386/i386.cpp b/src/devices/cpu/i386/i386.cpp
index d0bb0c8e396..2d39e450c4c 100644
--- a/src/devices/cpu/i386/i386.cpp
+++ b/src/devices/cpu/i386/i386.cpp
@@ -273,7 +273,7 @@ void i386_device::i386_load_segment_descriptor(int segment )
{
if( !m_performed_intersegment_jump )
m_sreg[segment].base |= 0xfff00000;
- if(m_cpu_version < 0x5000)
+ if(m_cpu_version < 0x500)
m_sreg[segment].flags = 0x93;
}
}
@@ -335,6 +335,7 @@ uint32_t i386_device::get_flags() const
void i386_device::set_flags(uint32_t f )
{
+ f &= m_eflags_mask;
m_CF = (f & 0x1) ? 1 : 0;
m_PF = (f & 0x4) ? 1 : 0;
m_AF = (f & 0x10) ? 1 : 0;
@@ -353,7 +354,7 @@ void i386_device::set_flags(uint32_t f )
m_VIF = (f & 0x80000) ? 1 : 0;
m_VIP = (f & 0x100000) ? 1 : 0;
m_ID = (f & 0x200000) ? 1 : 0;
- m_eflags = f & m_eflags_mask;
+ m_eflags = f;
}
void i386_device::sib_byte(uint8_t mod, uint32_t* out_ea, uint8_t* out_segment)
diff --git a/src/devices/cpu/m6809/6x09dasm.cpp b/src/devices/cpu/m6809/6x09dasm.cpp
index 393eba18998..9b7721ab268 100644
--- a/src/devices/cpu/m6809/6x09dasm.cpp
+++ b/src/devices/cpu/m6809/6x09dasm.cpp
@@ -113,7 +113,10 @@ offs_t m6x09_base_disassembler::disassemble(std::ostream &stream, offs_t pc, con
const opcodeinfo *op = fetch_opcode(opcodes, p);
if (!op)
{
- stream << "Illegal Opcode";
+ // illegal opcode
+ util::stream_format(stream, "%-6s$%02X", "FCB", opcodes.r8(pc));
+ for (offs_t q = pc + 1; q < p; q++)
+ util::stream_format(stream, ",$%02X", opcodes.r8(q));
return (p - pc) | SUPPORTED;
}
@@ -126,7 +129,10 @@ offs_t m6x09_base_disassembler::disassemble(std::ostream &stream, offs_t pc, con
p += numoperands;
// output the base instruction name
- util::stream_format(stream, "%-6s", op->name());
+ if (op->mode() == INH)
+ stream << op->name();
+ else
+ util::stream_format(stream, "%-6s", op->name());
switch (op->mode())
{
diff --git a/src/devices/cpu/tlcs870/tlcs870.cpp b/src/devices/cpu/tlcs870/tlcs870.cpp
index 1d775a29951..e893cf69e0b 100644
--- a/src/devices/cpu/tlcs870/tlcs870.cpp
+++ b/src/devices/cpu/tlcs870/tlcs870.cpp
@@ -8,8 +8,6 @@
The TLCS-870/C appears to have a completely different encoding.
- loosely baesd on the tlcs90 core by Luca Elia
-
*************************************************************************************************************/
@@ -19,59 +17,6 @@
#include "tlcs870d.h"
#include "debugger.h"
-#define IS16BIT 0x80
-#define BITPOS 0x40
-#define BITPOS_INDIRECT 0x20
-
-#define ABSOLUTE_VAL_8 0x01
-#define REG_8BIT 0x02
-
-// special
-#define CONDITIONAL 0x03
-#define STACKPOINTER (0x04 | IS16BIT) // this is a 16-bit reg
-#define CARRYFLAG (0x5 | BITPOS) // also flag as BITPOS since it's a bit operation?
-#define MEMVECTOR_16BIT 0x6
-#define REGISTERBANK 0x7
-#define PROGRAMSTATUSWORD 0x8
-
-#define ABSOLUTE_VAL_16 (ABSOLUTE_VAL_8|IS16BIT)
-#define REG_16BIT (REG_8BIT|IS16BIT)
-
-#define ADDR_IN_BASE 0x10
-#define ADDR_IN_IMM_X (ADDR_IN_BASE+0x0)
-#define ADDR_IN_PC_PLUS_REG_A (ADDR_IN_BASE+0x1)
-#define ADDR_IN_DE (ADDR_IN_BASE+0x2)
-#define ADDR_IN_HL (ADDR_IN_BASE+0x3)
-#define ADDR_IN_HL_PLUS_IMM_D (ADDR_IN_BASE+0x4)
-#define ADDR_IN_HL_PLUS_REG_C (ADDR_IN_BASE+0x5)
-#define ADDR_IN_HLINC (ADDR_IN_BASE+0x6)
-#define ADDR_IN_DECHL (ADDR_IN_BASE+0x7)
-
-#define MODE_MASK 0x1f
-
-
-#define FLAG_J (0x80)
-#define FLAG_Z (0x40)
-#define FLAG_C (0x20)
-#define FLAG_H (0x10)
-
-
-#define IS_JF ((m_F & FLAG_J) ? 1 : 0)
-#define IS_ZF ((m_F & FLAG_Z) ? 1 : 0)
-#define IS_CF ((m_F & FLAG_C) ? 1 : 0)
-#define IS_HF ((m_F & FLAG_H) ? 1 : 0)
-
-#define SET_JF (m_F |= FLAG_J)
-#define SET_ZF (m_F |= FLAG_Z)
-#define SET_CF (m_F |= FLAG_C)
-#define SET_HF (m_F |= FLAG_H)
-
-#define CLEAR_JF (m_F &= ~FLAG_J)
-#define CLEAR_ZF (m_F &= ~FLAG_Z)
-#define CLEAR_CF (m_F &= ~FLAG_C)
-#define CLEAR_HF (m_F &= ~FLAG_H)
-
-
DEFINE_DEVICE_TYPE(TMP87PH40AN, tmp87ph40an_device, "tmp87ph40an", "Toshiba TMP87PH40AN")
@@ -157,8 +102,8 @@ void tlcs870_device::tmp87ph40an_mem(address_map &map)
}
-tlcs870_device::tlcs870_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor program_map)
- : cpu_device(mconfig, type, tag, owner, clock)
+tlcs870_device::tlcs870_device(const machine_config &mconfig, device_type optype, const char *tag, device_t *owner, uint32_t clock, address_map_constructor program_map)
+ : cpu_device(mconfig, optype, tag, owner, clock)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0, program_map)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 16, 0)
, m_intram(*this, "intram")
@@ -173,2949 +118,176 @@ tmp87ph40an_device::tmp87ph40an_device(const machine_config &mconfig, const char
device_memory_interface::space_config_vector tlcs870_device::memory_space_config() const
{
- return space_config_vector {
+ return space_config_vector{
std::make_pair(AS_PROGRAM, &m_program_config),
std::make_pair(AS_IO, &m_io_config)
};
}
-uint8_t tlcs870_device::RM8 (uint32_t a) { return m_program->read_byte( a ); }
-uint16_t tlcs870_device::RM16(uint32_t a) { return RM8(a) | (RM8( (a+1) & 0xffff ) << 8); }
-
-void tlcs870_device::WM8 (uint32_t a, uint8_t v) { m_program->write_byte( a, v ); }
-void tlcs870_device::WM16(uint32_t a, uint16_t v) { WM8(a,v); WM8( (a+1) & 0xffff, v >> 8); }
-
-uint8_t tlcs870_device::RX8 (uint32_t a, uint32_t base) { return m_program->read_byte( base | a ); }
-uint16_t tlcs870_device::RX16(uint32_t a, uint32_t base) { return RX8(a,base) | (RX8( (a+1) & 0xffff, base ) << 8); }
-
-void tlcs870_device::WX8 (uint32_t a, uint8_t v, uint32_t base) { m_program->write_byte( base | a, v ); }
-void tlcs870_device::WX16(uint32_t a, uint16_t v, uint32_t base) { WX8(a,v,base); WX8( (a+1) & 0xffff, v >> 8, base); }
-
-uint8_t tlcs870_device::READ8() { uint8_t b0 = RM8( m_addr++ ); m_addr &= 0xffff; return b0; }
-uint16_t tlcs870_device::READ16() { uint8_t b0 = READ8(); return b0 | (READ8() << 8); }
-
-void tlcs870_device::decode()
+bool tlcs870_device::stream_arg(std::ostream &stream, uint32_t pc, const char *pre, const uint16_t mode, const uint16_t r, const uint16_t rb)
{
- m_op = 0;
- m_param1_type = 0;
- m_param1 = 0;
- m_param2_type = 0;
- m_param2 = 0;
- m_bitpos = 0;
- m_cycles = 1;
- m_flagsaffected = 0; // needed to signal which flags to change and which to leave alone in some cases (LD operations at least)
-
- uint8_t b0;
- uint8_t b1;
-
- int tmppc = m_addr;
-
- b0 = READ8();
-
-
- switch (b0)
- {
- case 0x00:
- m_op = NOP;
- // NOP;
- break;
-
- case 0x01:
- // SWAP A
- m_op = SWAP;
-
- m_param1_type = REG_8BIT;
- m_param1 = 0; // A
- break;
-
- case 0x02:
- // MUL W,A
- m_op = MUL;
-
- m_param1_type = REG_8BIT;
- m_param1 = 1; // W
-
- m_param2_type = REG_8BIT;
- m_param2 = 0; // A
- break;
-
- case 0x03:
- // DIV WA,C
- m_op = DIV;
-
- m_param1_type = REG_16BIT;
- m_param1 = 0; // WA
-
- m_param2_type = REG_8BIT;
- m_param2 = 2; // C
- break;
-
- case 0x04:
- // RETI
- m_op = RETI;
- break;
-
- case 0x05:
- // RET
- m_op = RET;
- break;
-
- case 0x06:
- // POP PSW
- m_op = POP;
- m_param1_type = PROGRAMSTATUSWORD;
- break;
-
- case 0x07:
- // PUSH PSW:
- m_op = PUSH;
- m_param1_type = PROGRAMSTATUSWORD;
- break;
-
- case 0x08:
- case 0x09:
- // unused?
- break;
-
- case 0x0a:
- // DAA A
- m_op = DAA;
-
- m_param1_type = REG_8BIT;
- m_param1 = 0; // A
- break;
-
- case 0x0b:
- // DAS A
- m_op = DAS;
-
- m_param1_type = REG_8BIT;
- m_param1 = 0; // A
- break;
-
- case 0x0c:
- // CLR CF
- m_op = CLR;
-
- m_param1_type = CARRYFLAG; // 16-bit register
- //m_param1 = 0;
- break;
-
- case 0x0d:
- // SET CF
- m_op = SET;
-
- m_param1_type = CARRYFLAG; // 16-bit register
- //m_param1 = 0;
- break;
-
- case 0x0e:
- // CPL CF
- m_op = CPL;
-
- m_param1_type = CARRYFLAG; // 16-bit register
- //m_param1 = 0;
- break;
-
- case 0x0f:
- // LD RBS,n
- m_op = LD; // Flags / Cycles 1--- / 2
- m_flagsaffected |= FLAG_J;
-
- m_param1_type = REGISTERBANK; // 4-bit register
- //m_param1 = 0;
-
- m_param2_type = ABSOLUTE_VAL_8;
- m_param2 = READ8();
-
- break;
-
- case 0x10:
- case 0x11:
- case 0x12:
- case 0x13:
- // INC rr
- m_op = INC;
-
- m_param1_type = REG_16BIT; // 16-bit register
- m_param1 = b0&3;
-
- break;
-
- case 0x14:
- case 0x15:
- case 0x16:
- case 0x17:
- // LD rr,mn
- m_op = LD; // Flags / Cycles 1--- / 3
- m_flagsaffected |= FLAG_J;
-
- m_param1_type = REG_16BIT; // 16-bit register
- m_param1 = b0&3;
-
- m_param2_type = ABSOLUTE_VAL_16; // absolute value
- m_param2 = READ16(); // 16-bit
-
- break;
-
- case 0x18:
- case 0x19:
- case 0x1a:
- case 0x1b:
- // DEC rr
- m_op = DEC;
-
- m_param1_type = REG_16BIT; // 16-bit register
- m_param1 = b0&3;
-
- break;
-
- case 0x1c:
- // SHLC A
- m_op = SHLC;
-
- m_param1_type = REG_8BIT;
- m_param1 = 0; // A
- break;
-
- case 0x1d:
- // SHRC A
- m_op = SHRC;
-
- m_param1_type = REG_8BIT;
- m_param1 = 0; // A
- break;
-
- case 0x1e:
- // ROLC A
- m_op = ROLC;
-
- m_param1_type = REG_8BIT;
- m_param1 = 0; // A
- break;
-
- case 0x1f:
- // RORC A
- m_op = RORC;
-
- m_param1_type = REG_8BIT;
- m_param1 = 0; // A
- break;
-
- case 0x20:
- // INC (x)
- m_op = INC;
- m_param1_type = ADDR_IN_IMM_X;
- m_param1 = READ8();
- break;
-
- case 0x21:
- // INC (HL)
- m_op = INC;
- m_param1_type = ADDR_IN_HL;
- //m_param1 = 0;
- break;
-
- case 0x22:
- // LD A,(x)
- m_op = LD; // Flags / Cycles 1Z-- / 3
- m_flagsaffected |= FLAG_J | FLAG_Z;
-
- m_param1_type = REG_8BIT;
- m_param1 = 0; // A
-
- m_param2_type = ADDR_IN_IMM_X;
- m_param2 = READ8();
- break;
-
- case 0x23:
- // LD A,(HL)
- m_op = LD; // Flags / Cycles 1Z-- / 2
- m_flagsaffected |= FLAG_J | FLAG_Z;
-
- m_param1_type = REG_8BIT;
- m_param1 = 0; // A
-
- m_param2_type = ADDR_IN_HL;
- //m_param2 = 0;
- break;
-
- case 0x24:
- // LDW (x),mn
- m_op = LDW;
- m_param1_type = ADDR_IN_IMM_X; // 8-bit memory address
- m_param1 = READ8();
-
- m_param2_type = ABSOLUTE_VAL_16; // absolute value
- m_param2 = READ16();
- break;
-
- case 0x25:
- // LDW (HL),mn
- m_op = LDW;
- m_param1_type = ADDR_IN_HL;
- //m_param1 = 0;
-
- m_param2_type = ABSOLUTE_VAL_16;
- m_param2 = READ16();
- break;
-
-
- case 0x26:
- // LD (x),(y) // Flags / Cycles 1Z-- / 5
- m_op = LD;
- m_flagsaffected |= FLAG_J | FLAG_Z;
-
- m_param2_type = ADDR_IN_IMM_X;
- m_param2 = READ8();
-
- m_param1_type = ADDR_IN_IMM_X;
- m_param1 = READ8();
- break;
-
- case 0x27:
- // unused
- break;
-
- case 0x28:
- // DEC (x)
- m_op = DEC;
- m_param1_type = ADDR_IN_IMM_X;
- m_param1 = READ8();
- break;
-
- case 0x29:
- // DEC (HL)
- m_op = DEC;
- m_param1_type = ADDR_IN_HL;
- //m_param1 = 0;
- break;
-
- case 0x2a:
- // LD (x),A // Flags / Cycles 1Z-- / 3
- m_op = LD;
- m_flagsaffected |= FLAG_J | FLAG_Z;
-
- m_param1_type = ADDR_IN_IMM_X;
- m_param1 = READ8();
-
- m_param2_type = REG_8BIT;
- m_param2 = 0; // A
-
- break;
-
- case 0x2b:
- // LD (HL),A // Flags / Cycles 1--- / 2
- m_op = LD;
- m_flagsaffected |= FLAG_J;
-
- m_param1_type = ADDR_IN_HL;
- //m_param1 = 0;
-
- m_param2_type = REG_8BIT;
- m_param2 = 0; // A
- break;
-
- case 0x2c:
- // LD (x),n
- m_op = LD; // Flags / Cycles 1--- / 4
- m_flagsaffected |= FLAG_J;
-
- m_param1_type = ADDR_IN_IMM_X; // 8-bit memory address
- m_param1 = READ8();
-
- m_param2_type = ABSOLUTE_VAL_8; // absolute value
- m_param2 = READ8();
-
- break;
-
- case 0x2d:
- // LD (HL),n
- m_op = LD; // Flags / Cycles 1--- / 3
- m_flagsaffected |= FLAG_J;
-
- m_param1_type = ADDR_IN_HL; // memory address in 16-bit register
- //m_param1 = 3; // (HL)
-
- m_param2_type = ABSOLUTE_VAL_8; // absolute value
- m_param2 = READ8();
-
- break;
-
- case 0x2e:
- // CLR (x)
- m_op = CLR;
- m_param1_type = ADDR_IN_IMM_X; // 8-bit memory address
- m_param1 = READ8();
-
- break;
-
- case 0x2f:
- // CLR (HL)
- m_op = CLR;
- m_param1_type = ADDR_IN_HL; // memory address in 16-bit register
- //m_param1 = 3; // (HL)
-
- break;
-
- case 0x30:
- case 0x31:
- case 0x32:
- case 0x33:
- case 0x34:
- case 0x35:
- case 0x36:
- case 0x37:
- // LD r,n
-
- m_op = LD; // Flags / Cycles 1--- / 2
- m_flagsaffected |= FLAG_J;
-
- m_param1_type = REG_8BIT; // 8-bit register register
- m_param1 = b0&7;
-
- m_param2_type = ABSOLUTE_VAL_8; // absolute value
- m_param2 = READ8();
-
-
- break;
-
- case 0x38:
- case 0x39:
- case 0x3a:
- case 0x3b:
- case 0x3c:
- case 0x3d:
- case 0x3e:
- case 0x3f:
- break;
-
- case 0x40:
- case 0x41:
- case 0x42:
- case 0x43:
- case 0x44:
- case 0x45:
- case 0x46:
- case 0x47:
- // SET (x).b
- b1 = READ8();
-#if 0
- // this is just an alias
- if ((b0 == 0x40) && (b1 == 0x3a))
- {
- // EI 'Assembler expansion machine instruction'
- break;
- }
-#endif
- m_op = SET;
-
- m_param1_type = ADDR_IN_IMM_X | BITPOS;
- m_param1 = b1;
- m_bitpos = b0 & 7;
-
- break;
+ return false;
+}
- case 0x48:
- case 0x49:
- case 0x4a:
- case 0x4b:
- case 0x4c:
- case 0x4d:
- case 0x4e:
- case 0x4f:
- // CLR (x).b
- b1 = READ8();
+void tlcs870_device::execute_set_input(int inputnum, int state)
+{
#if 0
- // this is just an alias
- if ((b0 == 0x48) && (b1 == 0x3a))
- {
- // DI 'Assembler expansion machine instruction'
- break;
- }
-#endif
- m_op = CLR;
-
- m_param1_type = ADDR_IN_IMM_X | BITPOS;
- m_param1 = b1;
- m_bitpos = b0 & 7;
-
- break;
-
- case 0x50:
- case 0x51:
- case 0x52:
- case 0x53:
- case 0x54:
- case 0x55:
- case 0x56:
- case 0x57:
- // LD A,r 0101 0rrr
- m_op = LD; // Flags / Cycles 1Z-- / 1
- m_flagsaffected |= FLAG_J | FLAG_Z;
-
- m_param1_type = REG_8BIT;
- m_param1 = 0; // A
-
- m_param2_type = REG_8BIT;
- m_param2 = b0 & 0x7;
-
- break;
-
- case 0x58:
- case 0x59:
- case 0x5a:
- case 0x5b:
- case 0x5c:
- case 0x5d:
- case 0x5e:
- case 0x5f:
- // LD r,A 0101 1rrr
- m_op = LD; // Flags / Cycles 1Z-- / 1
- m_flagsaffected |= FLAG_J | FLAG_Z;
-
- m_param2_type = REG_8BIT;
- m_param2 = 0; // A
-
- m_param1_type = REG_8BIT;
- m_param1 = b0 & 0x7;
+ switch (inputnum) {
+ case INPUT_LINE_NMI:
+ set_irq_line(INTNMI, state);
break;
-
- case 0x60:
- case 0x61:
- case 0x62:
- case 0x63:
- case 0x64:
- case 0x65:
- case 0x66:
- case 0x67:
- // INC r
- m_op = INC;
- m_param1_type = REG_8BIT;
- m_param1 = b0 & 0x7;
- break;
-
- case 0x68:
- case 0x69:
- case 0x6a:
- case 0x6b:
- case 0x6c:
- case 0x6d:
- case 0x6e:
- case 0x6f:
- // DEC r
- m_op = DEC;
- m_param1_type = REG_8BIT;
- m_param1 = b0 & 0x7;
- break;
-
- case 0x70:
- case 0x71:
- case 0x72:
- case 0x73:
- case 0x74:
- case 0x75:
- case 0x76:
- case 0x77:
- // (ALU OP) A,n
- m_op = (b0 & 0x7)+ALU_ADDC;
-
- m_param1_type = REG_8BIT;
- m_param1 = 0; // A
-
- m_param2_type = ABSOLUTE_VAL_8;
- m_param2 = READ8();
-
- break;
-
- case 0x78:
- case 0x79:
- case 0x7a:
- case 0x7b:
- case 0x7c:
- case 0x7d:
- case 0x7e:
- case 0x7f:
- // (ALU OP) A,(x)
- m_op = (b0 & 0x7)+ALU_ADDC;
-
- m_param1_type = REG_8BIT;
- m_param1 = 0; // A
-
- m_param2_type = ADDR_IN_IMM_X;
- m_param2 = READ8();
-
+ case INPUT_LINE_IRQ0:
+ set_irq_line(INT0, state);
break;
-
- case 0x80:
- case 0x81:
- case 0x82:
- case 0x83:
- case 0x84:
- case 0x85:
- case 0x86:
- case 0x87:
- case 0x88:
- case 0x89:
- case 0x8a:
- case 0x8b:
- case 0x8c:
- case 0x8d:
- case 0x8e:
- case 0x8f:
- case 0x90:
- case 0x91:
- case 0x92:
- case 0x93:
- case 0x94:
- case 0x95:
- case 0x96:
- case 0x97:
- case 0x98:
- case 0x99:
- case 0x9a:
- case 0x9b:
- case 0x9c:
- case 0x9d:
- case 0x9e:
- case 0x9f:
- {
- // JRS T,a
- m_op = JRS;
-
- m_param1_type = CONDITIONAL;
- m_param1 = 6;
-
- m_param2_type = ABSOLUTE_VAL_16;
-
- int val = b0 & 0x1f;
- if (val & 0x10) val -= 0x20;
-
- m_param2 = tmppc + 2 + val;
-
+ case INPUT_LINE_IRQ1:
+ set_irq_line(INT1, state);
break;
- }
- case 0xa0:
- case 0xa1:
- case 0xa2:
- case 0xa3:
- case 0xa4:
- case 0xa5:
- case 0xa6:
- case 0xa7:
- case 0xa8:
- case 0xa9:
- case 0xaa:
- case 0xab:
- case 0xac:
- case 0xad:
- case 0xae:
- case 0xaf:
- case 0xb0:
- case 0xb1:
- case 0xb2:
- case 0xb3:
- case 0xb4:
- case 0xb5:
- case 0xb6:
- case 0xb7:
- case 0xb8:
- case 0xb9:
- case 0xba:
- case 0xbb:
- case 0xbc:
- case 0xbd:
- case 0xbe:
- case 0xbf:
- {
- // JRS F,a
- m_op = JRS;
-
- m_param1_type = CONDITIONAL;
- m_param1 = 7;
-
- m_param2_type = ABSOLUTE_VAL_16;
-
- int val = b0 & 0x1f;
- if (val & 0x10) val -= 0x20;
-
- m_param2 = tmppc + 2 + val;
-
+ case INPUT_LINE_IRQ2:
+ set_irq_line(INT2, state);
break;
}
+#endif
+}
- case 0xc0:
- case 0xc1:
- case 0xc2:
- case 0xc3:
- case 0xc4:
- case 0xc5:
- case 0xc6:
- case 0xc7:
- case 0xc8:
- case 0xc9:
- case 0xca:
- case 0xcb:
- case 0xcc:
- case 0xcd:
- case 0xce:
- case 0xcf:
- // CALLV n
- m_op = CALLV;
-
- m_param1_type = MEMVECTOR_16BIT;
-
- m_param1 = 0xffc0 + ((b0 & 0xf) * 2);
-
- break;
-
- case 0xd0:
- case 0xd1:
- case 0xd2:
- case 0xd3:
- case 0xd4:
- case 0xd5:
- case 0xd6:
- case 0xd7:
- {
- // JR cc,a
-
- m_op = JR;
-
- m_param1_type = CONDITIONAL;
- m_param1 = b0 & 0x7;
-
- m_param2_type = ABSOLUTE_VAL_16;
-
- int val = READ8();
- if (val & 0x80) val -= 0x100;
-
- m_param2 = tmppc+ 2 + val;
-
- break;
- }
- case 0xd8:
- case 0xd9:
- case 0xda:
- case 0xdb:
- case 0xdc:
- case 0xdd:
- case 0xde:
- case 0xdf:
- // LD CF, (x).b aka TEST (x).b
- m_op = LD; // Flags / Cycles %-*- / 4
- m_flagsaffected |= FLAG_J | FLAG_C;
-
- m_param1_type = CARRYFLAG;
- //m_param1 = 0;
-
- m_param2_type = ADDR_IN_IMM_X | BITPOS;
- m_param2 = READ8();
- m_bitpos = b0 & 0x7;
- break;
-
- case 0xe0:
- // src prefix
- decode_source(ADDR_IN_BASE+(b0&0x7), READ8());
- break;
-
- case 0xe1:
- case 0xe2:
- case 0xe3:
- decode_source(ADDR_IN_BASE+(b0&0x7), 0);
- break;
-
- case 0xe4:
- decode_source(ADDR_IN_BASE+(b0&0x7), READ8());
- break;
-
- case 0xe5:
- case 0xe6:
- case 0xe7:
- decode_source(ADDR_IN_BASE+(b0&0x7), 0);
- break;
-
- case 0xe8:
- case 0xe9:
- case 0xea:
- case 0xeb:
- case 0xec:
- case 0xed:
- case 0xee:
- case 0xef:
- // register prefix: g/gg
- decode_register_prefix(b0);
- break;
-
- case 0xf0: // 1111 0000 xxxx xxxx 0101 0rrr
- // destination memory prefix (dst)
- m_param1_type = ADDR_IN_BASE+(b0&0x7);
- m_param1 = READ8();
- decode_dest(b0);
- break;
-
- case 0xf2: // 1111 001p 0101 0rrr
- case 0xf3: // 1111 001p 0101 0rrr
- // destination memory prefix (dst)
- m_param1_type = ADDR_IN_BASE+(b0&0x7);
- decode_dest(b0);
- break;
-
-
- case 0xf4: // 1111 0100 dddd dddd 0101 0rrr
- // destination memory prefix (dst)
- m_param1_type = ADDR_IN_BASE+(b0&0x7);
- m_param1 = READ8();
- decode_dest(b0);
- break;
-
- case 0xf6: // 1110 0110 0101 0rrr
- case 0xf7: // 1111 0111 0101 0rrr
- // destination memory prefix (dst)
- m_param1_type = ADDR_IN_BASE+(b0&0x7);
- decode_dest(b0);
- break;
-
- case 0xf1:
- case 0xf5:
- // invalid dst memory prefix
- break;
-
-
- case 0xf8:
- case 0xf9:
- // unused
- break;
-
- case 0xfa:
- // LD SP,mn
- m_op = LD; // Flags / Cycles 1--- / 3
- m_flagsaffected |= FLAG_J;
-
- m_param1_type = STACKPOINTER;
- //m_param1 = 0;
-
- m_param2_type = ABSOLUTE_VAL_16;
- m_param2 = READ16();
-
- break;
+void tlcs870_device::execute_run()
+{
+ m_cycles = 1;
- case 0xfb:
+ while (m_icount > 0)
{
- // JR a
- m_op = JR;
-
- m_param2_type = ABSOLUTE_VAL_16;
-
- int val = READ8();
- if (val & 0x80) val -= 0x100;
-
- m_param2 = tmppc + 2 + val;
-
- break;
- }
-
- break;
-
- case 0xfc:
- // CALL mn
- m_op = CALL;
-
- m_param1_type = ABSOLUTE_VAL_16;
- m_param1 = READ16();
- break;
-
- case 0xfd:
- // CALLP n
- m_op = CALLP;
-
- m_param1_type = ABSOLUTE_VAL_16;
- m_param1 = READ8()+0xff00;
-
- break;
-
- case 0xfe:
- // JP mn
- m_op = JP;
-
- m_param2_type = ABSOLUTE_VAL_16;
- m_param2 = READ16();
-
- break;
+ m_prvpc.d = m_pc.d;
+ debugger_instruction_hook(m_pc.d);
- case 0xff:
- // SWI
- m_op = SWI;
+ //check_interrupts();
+ m_addr = m_pc.d;
+ m_tmppc = m_addr; // used for jumps etc.
+ decode();
+ m_pc.d = m_addr;
- break;
- }
+ m_icount -= m_cycles * 4; // 1 machine cycle = 4 clock cycles?
+ };
}
-// e8 - ef use this table
-void tlcs870_device::decode_register_prefix(uint8_t b0)
+void tlcs870_device::device_reset()
{
- uint8_t bx;
-
- bx = READ8();
+ m_pc.d = RM16(0xfffe);
+ m_RBS = 0;
+}
- switch (bx)
+void tlcs870_device::state_import(const device_state_entry &entry)
+{
+ switch (entry.index())
{
- case 0x00:
- // nothing
- break;
-
- case 0x01:
- // SWAP g
- m_op = SWAP;
-
- m_param1_type = REG_8BIT;
- m_param1 = b0 & 0x7;
- break;
-
- case 0x02:
- // MUL ggG, ggL
- m_op = MUL;
-
- m_param1_type = REG_16BIT; // odd syntax
- m_param1 = b0 & 0x3;
- break;
-
- case 0x03:
- // DIV gg,C
- m_op = DIV;
- m_param1_type = REG_16BIT;
- m_param1 = b0 & 3;
-
- m_param2_type = REG_8BIT;
- m_param2 = 2; // C
-
- break;
-
- case 0x04:
- // with E8 only
- // RETN
- if (b0 == 0xe8)
- {
- m_op = RETN;
- }
-
- break;
-
- case 0x05:
- break;
-
- case 0x06:
- // POP gg
- m_op = POP;
- m_param1_type = REG_16BIT;
- m_param1 = b0 & 3;
- // b0 & 4 = invalid?
-
- break;
-
- case 0x07:
- // PUSH gg
- m_op = PUSH;
- m_param1_type = REG_16BIT;
- m_param1 = b0 & 3;
- // b0 & 4 = invalid?
-
- break;
-
- case 0x08:
- case 0x09:
- break;
-
- case 0x0a:
- // DAA g
- m_op = DAA;
-
- m_param1_type = REG_8BIT;
- m_param1 = b0 & 0x7;
-
- break;
-
- case 0x0b:
- // DAS g
- m_op = DAS;
-
- m_param1_type = REG_8BIT;
- m_param1 = b0 & 0x7;
-
- break;
-
- case 0x0c:
- case 0x0d:
- case 0x0e:
- case 0x0f:
- break;
-
- case 0x10:
- case 0x11:
- case 0x12:
- case 0x13:
- // XCH rr,gg
- m_op = XCH;
-
- m_param1_type = REG_16BIT;
- m_param1 = bx & 0x3;
-
- m_param2_type = REG_16BIT;
- m_param2 = b0 & 0x3;
- break;
-
- case 0x14:
- case 0x15:
- case 0x16:
- case 0x17:
- // LD rr,gg
- m_op = LD; // Flags / Cycles 1--- / 2
- m_flagsaffected |= FLAG_J;
-
- m_param1_type = REG_16BIT;
- m_param1 = bx & 0x3;
-
- m_param2_type = REG_16BIT;
- m_param2 = b0 & 0x3;
-
- break;
-
- case 0x18:
- case 0x19:
- case 0x1a:
- case 0x1b:
- break;
-
- case 0x1c:
- // SHLC g
- m_op = SHLC;
-
- m_param1_type = REG_8BIT;
- m_param1 = b0 & 0x7;
-
- break;
-
- case 0x1d:
- // SHRC g
- m_op = SHRC;
-
- m_param1_type = REG_8BIT;
- m_param1 = b0 & 0x7;
-
- break;
-
- case 0x1e:
- // ROLC g
- m_op = ROLC;
-
- m_param1_type = REG_8BIT;
- m_param1 = b0 & 0x7;
-
- break;
-
- case 0x1f:
- // RORC g
- m_op = RORC;
-
- m_param1_type = REG_8BIT;
- m_param1 = b0 & 0x7;
-
- break;
-
- case 0x20:
- case 0x21:
- case 0x22:
- case 0x23:
- case 0x24:
- case 0x25:
- case 0x26:
- case 0x27:
- case 0x28:
- case 0x29:
- case 0x2a:
- case 0x2b:
- case 0x2c:
- case 0x2d:
- case 0x2e:
- case 0x2f:
- break;
-
- case 0x30:
- case 0x31:
- case 0x32:
- case 0x33:
- case 0x34:
- case 0x35:
- case 0x36:
- case 0x37:
- // (ALU OP) WA,gg
- m_op = (bx & 0x7)+ALU_ADDC;
-
- m_param1_type = REG_16BIT;
- m_param1 = 0;
-
- m_param2_type = REG_16BIT;
- m_param2 = b0 & 3;
- // b0 & 4 would be invalid?
-
-
- break;
-
- case 0x38:
- case 0x39:
- case 0x3a:
- case 0x3b:
- case 0x3c:
- case 0x3d:
- case 0x3e:
- case 0x3f:
- // (ALU OP) gg,mn
- m_op = (bx & 0x7)+ALU_ADDC;
-
- m_param1_type = REG_16BIT;
- m_param1 = b0 & 0x3;
-
- m_param2_type = ABSOLUTE_VAL_16; // absolute value
- m_param2 = READ16(); // 16-bit
-
- break;
-
- case 0x40:
- case 0x41:
- case 0x42:
- case 0x43:
- case 0x44:
- case 0x45:
- case 0x46:
- case 0x47:
- // SET g.b
- m_op = SET;
-
- m_param1_type = REG_8BIT | BITPOS;
- m_param1 = b0 & 0x7;
- m_bitpos = bx & 0x7;
-
-
- break;
-
- case 0x48:
- case 0x49:
- case 0x4a:
- case 0x4b:
- case 0x4c:
- case 0x4d:
- case 0x4e:
- case 0x4f:
- // CLR g.b
- m_op = CLR;
-
- m_param1_type = REG_8BIT | BITPOS;
- m_param1 = b0 & 0x7;
- m_bitpos = bx & 0x7;
-
- break;
-
- case 0x50:
- case 0x51:
- case 0x52:
- case 0x53:
- case 0x54:
- case 0x55:
- case 0x56:
- case 0x57:
- break;
-
- case 0x58:
- case 0x59:
- case 0x5a:
- case 0x5b:
- case 0x5c:
- case 0x5d:
- case 0x5e:
- case 0x5f:
- // LD r,g
- m_op = LD; // Flags / Cycles 1Z-- / 2
- m_flagsaffected |= FLAG_J | FLAG_Z;
-
- m_param1_type = REG_8BIT;
- m_param1 = bx & 0x7;
-
- m_param2_type = REG_8BIT;
- m_param2 = b0 & 0x7;
- break;
-
- case 0x60:
- case 0x61:
- case 0x62:
- case 0x63:
- case 0x64:
- case 0x65:
- case 0x66:
- case 0x67:
- // (ALU OP) A,g
- m_op = (bx & 0x7)+ALU_ADDC;
-
- m_param2_type = REG_8BIT;
- m_param2 = b0 & 0x7;
-
- m_param1_type = REG_8BIT;
- m_param1 = 0; // A
- break;
-
- case 0x68:
- case 0x69:
- case 0x6a:
- case 0x6b:
- case 0x6c:
- case 0x6d:
- case 0x6e:
- case 0x6f:
- // (ALU OP) g,A
- m_op = (bx & 0x7)+ALU_ADDC;
-
- m_param1_type = REG_8BIT;
- m_param1 = b0 & 0x7;
-
- m_param2_type = REG_8BIT;
- m_param2 = 0; // A
- break;
-
- case 0x70:
- case 0x71:
- case 0x72:
- case 0x73:
- case 0x74:
- case 0x75:
- case 0x76:
- case 0x77:
- // (ALU OP) g,n
- m_op = (bx & 0x7)+ALU_ADDC;
-
- m_param1_type = REG_8BIT;
- m_param1 = b0 & 0x7;
-
- m_param2_type = ABSOLUTE_VAL_8;
- m_param2 = READ8();
-
-
- break;
-
- case 0x78:
- case 0x79:
- case 0x7a:
- case 0x7b:
- case 0x7c:
- case 0x7d:
- case 0x7e:
- case 0x7f:
- break;
-
-
- case 0x80:
- case 0x81:
- break;
-
- case 0x82:
- case 0x83:
- // SET (pp).g
- m_op = SET;
- m_param1_type = (ADDR_IN_DE+(bx&1)) | BITPOS | BITPOS_INDIRECT;
- //m_param1 = 0;
- m_bitpos = b0 & 7;
- break;
-
- case 0x84:
- case 0x85:
- case 0x86:
- case 0x87:
- break;
-
- case 0x88:
- case 0x89:
- break;
-
- case 0x8a:
- case 0x8b:
- // CLR (pp).g
- m_op = CLR;
- m_param1_type = (ADDR_IN_DE+(bx&1)) | BITPOS | BITPOS_INDIRECT;
- //m_param1 = 0;
- m_bitpos = b0 & 7;
- break;
-
- case 0x8c:
- case 0x8d:
- case 0x8e:
- case 0x8f:
- break;
-
-
- case 0x90:
- case 0x91:
- break;
-
- case 0x92:
- case 0x93:
- // CPL (pp).g
- m_op = CPL;
- m_param1_type = (ADDR_IN_DE+(bx&1)) | BITPOS | BITPOS_INDIRECT;
- //m_param1 = 0;
- m_bitpos = b0 & 7;
- break;
-
- case 0x94:
- case 0x95:
- case 0x96:
- case 0x97:
- break;
-
- case 0x9a:
- case 0x9b:
- // LD (pp).g,CF
- m_op = LD; // Flags / Cycles 1--- / 5
- m_flagsaffected |= FLAG_J;
-
- m_param1_type = (ADDR_IN_DE+(bx&1)) | BITPOS | BITPOS_INDIRECT;
- //m_para1 = 0;
- m_bitpos = b0 & 7;
-
- m_param2_type = CARRYFLAG;
- //m_param2 = 0;
- break;
-
- case 0x9c:
- case 0x9d:
- break;
-
- case 0x9e:
- case 0x9f:
- // LD CF,(pp).g aka TEST (pp).g
- m_op = LD; // Flags / Cycles %-*- / 4
- m_flagsaffected |= FLAG_J | FLAG_C;
-
- m_param1_type = CARRYFLAG;
- //m_param1 = 0;
-
- m_param2_type = (ADDR_IN_DE+(bx&1)) | BITPOS | BITPOS_INDIRECT;
- //m_param2 = 0;
- m_bitpos = b0 & 7;
- break;
-
- case 0xa0:
- case 0xa1:
- case 0xa2:
- case 0xa3:
- case 0xa4:
- case 0xa5:
- case 0xa6:
- case 0xa7:
+ case DEBUGGER_REG_A:
+ set_reg8(REG_A, m_debugger_temp);
break;
- case 0xb0:
- case 0xb1:
- case 0xb2:
- case 0xb3:
- case 0xb4:
- case 0xb5:
- case 0xb6:
- case 0xb7:
- case 0xb8:
- case 0xb9:
- case 0xba:
- case 0xbb:
- case 0xbc:
- case 0xbd:
- case 0xbe:
- case 0xbf:
+ case DEBUGGER_REG_W:
+ set_reg8(REG_W, m_debugger_temp);
break;
- case 0xc0:
- case 0xc1:
- case 0xc2:
- case 0xc3:
- case 0xc4:
- case 0xc5:
- case 0xc6:
- case 0xc7:
- // CPL g.b
- m_op = CPL;
-
- m_param1_type = REG_8BIT | BITPOS;
- m_param1 = b0 & 0x7;
- m_bitpos = bx & 0x7;
+ case DEBUGGER_REG_C:
+ set_reg8(REG_C, m_debugger_temp);
break;
- case 0xc8:
- case 0xc9:
- case 0xca:
- case 0xcb:
- case 0xcc:
- case 0xcd:
- case 0xce:
- case 0xcf:
- // LD g.b,CF
- m_op = LD; // Flags / Cycles 1--- / 2
- m_flagsaffected |= FLAG_J;
-
- m_param2_type = CARRYFLAG;
- //m_param2 = 0;
-
- m_param1_type = REG_8BIT | BITPOS;
- m_param1 = b0 & 0x7;
- m_bitpos = bx & 0x7;
-
+ case DEBUGGER_REG_B:
+ set_reg8(REG_B, m_debugger_temp);
break;
- case 0xd0:
- case 0xd1:
- case 0xd2:
- case 0xd3:
- case 0xd4:
- case 0xd5:
- case 0xd6:
- case 0xd7:
- // XOR CF,g.b
- m_op = ALU_XOR;
-
- m_param1_type = CARRYFLAG;
- //m_param1 = 0;
-
- m_param2_type = REG_8BIT | BITPOS;
- m_param2 = b0 & 0x7;
- m_bitpos = bx & 0x7;
-
+ case DEBUGGER_REG_E:
+ set_reg8(REG_E, m_debugger_temp);
break;
- case 0xd8:
- case 0xd9:
- case 0xda:
- case 0xdb:
- case 0xdc:
- case 0xdd:
- case 0xde:
- case 0xdf:
- // LD CF,g.b aka TEST g.b
- m_op = LD; // Flags / Cycles %-*- / 2
- m_flagsaffected |= FLAG_J | FLAG_C;
-
- m_param1_type = CARRYFLAG;
- //m_param1 = 0;
-
- m_param2_type = REG_8BIT | BITPOS;
- m_param2 = b0 & 0x7;
- m_bitpos = bx & 0x7;
-
+ case DEBUGGER_REG_D:
+ set_reg8(REG_D, m_debugger_temp);
break;
- case 0xe0:
- case 0xe1:
- case 0xe2:
- case 0xe3:
- case 0xe4:
- case 0xe5:
- case 0xe6:
- case 0xe7:
- case 0xe8:
- case 0xe9:
- case 0xea:
- case 0xeb:
- case 0xec:
- case 0xed:
- case 0xee:
- case 0xef:
+ case DEBUGGER_REG_L:
+ set_reg8(REG_L, m_debugger_temp);
break;
- case 0xf0:
- case 0xf1:
- case 0xf2:
- case 0xf3:
- case 0xf4:
- case 0xf5:
- case 0xf6:
- case 0xf7:
+ case DEBUGGER_REG_H:
+ set_reg8(REG_H, m_debugger_temp);
break;
- case 0xf8:
- case 0xf9:
+ case DEBUGGER_REG_WA:
+ set_reg16(REG_WA, m_debugger_temp);
break;
- case 0xfa:
- // LD SP,gg
- m_op = LD; // Flags / Cycles 1--- / 3
- m_flagsaffected |= FLAG_J;
-
- m_param2_type = REG_16BIT;
- m_param2 = b0 & 3;
- // b0 & 4 would be invalid?
-
- m_param1_type = STACKPOINTER;
- // m_param1 = 0;
-
+ case DEBUGGER_REG_BC:
+ set_reg16(REG_BC, m_debugger_temp);
break;
- case 0xfb:
- // LD gg,SP
- m_op = LD; // Flags / Cycles 1--- / 3
- m_flagsaffected |= FLAG_J;
-
- m_param1_type = REG_16BIT;
- m_param1 = b0 & 3;
- // b0 & 4 would be invalid?
-
- m_param2_type = STACKPOINTER;
- // m_param2 = 0;
+ case DEBUGGER_REG_DE:
+ set_reg16(REG_DE, m_debugger_temp);
break;
- case 0xfc:
- // CALL gg
- m_op = CALL;
-
- m_param2_type = REG_16BIT;
- m_param2 = b0 & 3;
- // b0 & 4 would be invalid?
-
- break;
-
- case 0xfd:
- break;
-
- case 0xfe:
- // JP gg
- m_op = JP;
-
- m_param2_type = REG_16BIT;
- m_param2 = b0 & 3;
- // b0 & 4 would be invalid?
-
+ case DEBUGGER_REG_HL:
+ set_reg16(REG_HL, m_debugger_temp);
break;
-
- case 0xff:
- break;
-
}
-
}
-
-// e0 - e7 use this table
-void tlcs870_device::decode_source(int type, uint16_t val)
+void tlcs870_device::state_export(const device_state_entry &entry)
{
- uint8_t bx;
-
- bx = READ8();
-
- switch (bx)
+ switch (entry.index())
{
- case 0x00:
- case 0x01:
- case 0x02:
- case 0x03:
- case 0x04:
- case 0x05:
- case 0x06:
- case 0x07:
+ case DEBUGGER_REG_A:
+ m_debugger_temp = get_reg8(REG_A);
break;
- case 0x08:
- // ROLD A,(src)
- m_op = ROLD;
- m_param2_type = type;
- m_param2 = val;
-
- m_param1_type = REG_8BIT;
- m_param1 = 0; // A
+ case DEBUGGER_REG_W:
+ m_debugger_temp = get_reg8(REG_W);
break;
- case 0x09:
- // RORD A,(src)
- m_op = RORD;
- m_param2_type = type;
- m_param2 = val;
-
- m_param1_type = REG_8BIT;
- m_param1 = 0; // A
+ case DEBUGGER_REG_C:
+ m_debugger_temp = get_reg8(REG_C);
break;
- case 0x0a:
- case 0x0b:
- case 0x0c:
- case 0x0d:
- case 0x0e:
- case 0x0f:
-
- case 0x10:
- case 0x11:
- case 0x12:
- case 0x13:
- // see dst
+ case DEBUGGER_REG_B:
+ m_debugger_temp = get_reg8(REG_B);
break;
- case 0x14:
- case 0x15:
- case 0x16:
- case 0x17:
- // LD rr, (src)
- m_op = LD; // Flags / Cycles 1--- / x
- m_flagsaffected |= FLAG_J;
-
- m_param1_type = REG_16BIT;
- m_param1 = bx & 0x3;
-
- m_param2_type = type | IS16BIT;
- m_param2 = val;
+ case DEBUGGER_REG_E:
+ m_debugger_temp = get_reg8(REG_E);
break;
- case 0x18:
- case 0x19:
- case 0x1a:
- case 0x1b:
- case 0x1c:
- case 0x1d:
- case 0x1e:
- case 0x1f:
+ case DEBUGGER_REG_D:
+ m_debugger_temp = get_reg8(REG_D);
break;
- case 0x20:
- // INC (src)
- m_op = INC;
- m_param1_type = type;
- m_param1 = val;
-
+ case DEBUGGER_REG_L:
+ m_debugger_temp = get_reg8(REG_L);
break;
- case 0x21:
- case 0x22:
- case 0x23:
- case 0x24:
- case 0x25:
+ case DEBUGGER_REG_H:
+ m_debugger_temp = get_reg8(REG_H);
break;
- case 0x26: // invalid if (src) is also (x) ? (not specified)
- // LD (x),(src)
- m_op = LD; // Flags / Cycles 1U-- / x
- m_flagsaffected |= FLAG_J /*| FLAG_Z*/; // Z is undefined!
-
- m_param1_type = ADDR_IN_IMM_X;
- m_param1 = READ8();
-
- m_param2_type = type;
- m_param2 = val;
- break;
-
- case 0x27:
- // LD (HL),(src)
- m_op = LD; // Flags / Cycles 1Z-- / x
- m_flagsaffected |= FLAG_J | FLAG_Z;
-
- m_param1_type = ADDR_IN_HL;
- //m_param1 = 0;
-
- m_param2_type = type;
- m_param2 = val;
+ case DEBUGGER_REG_WA:
+ m_debugger_temp = get_reg16(REG_WA);
break;
-
- case 0x28:
- // DEC (src)
- m_op = DEC;
- m_param1_type = type;
- m_param1 = val;
-
+ case DEBUGGER_REG_BC:
+ m_debugger_temp = get_reg16(REG_BC);
break;
- case 0x29:
- case 0x2a:
- case 0x2b:
- case 0x2c:
- case 0x2d:
- case 0x2e:
+ case DEBUGGER_REG_DE:
+ m_debugger_temp = get_reg16(REG_DE);
break;
- case 0x2f:
- // MCMP (src), n
- m_op = MCMP;
- m_param1_type = type;
- m_param1 = val;
-
- m_param2_type = ABSOLUTE_VAL_8;
- m_param2 = READ8();
+ case DEBUGGER_REG_HL:
+ m_debugger_temp = get_reg16(REG_HL);
break;
- case 0x30:
- case 0x31:
- case 0x32:
- case 0x33:
- case 0x34:
- case 0x35:
- case 0x36:
- case 0x37:
- case 0x38:
- case 0x39:
- case 0x3a:
- case 0x3b:
- case 0x3c:
- case 0x3d:
- case 0x3e:
- case 0x3f:
- break;
-
- case 0x40:
- case 0x41:
- case 0x42:
- case 0x43:
- case 0x44:
- case 0x45:
- case 0x46:
- case 0x47:
- // SET (src).b
- m_op = SET;
-
- m_param1_type = type | BITPOS;
- m_param1 = val;
- m_bitpos = bx & 0x7;
- break;
-
- case 0x48:
- case 0x49:
- case 0x4a:
- case 0x4b:
- case 0x4c:
- case 0x4d:
- case 0x4e:
- case 0x4f:
- // CLR (src).b
- m_op = CLR;
-
- m_param1_type = type | BITPOS;
- m_param1 = val;
- m_bitpos = bx & 0x7;
- break;
-
- case 0x50:
- case 0x51:
- case 0x52:
- case 0x53:
- case 0x54:
- case 0x55:
- case 0x56:
- case 0x57:
- // see dst
- break;
-
- case 0x58:
- case 0x59:
- case 0x5a:
- case 0x5b:
- case 0x5c:
- case 0x5d:
- case 0x5e:
- case 0x5f:
- // LD r, (src)
- m_op = LD; // Flags / Cycles 1Z-- / x
- m_flagsaffected |= FLAG_J | FLAG_Z;
-
- m_param1_type = REG_8BIT;
- m_param1 = bx & 0x7;
-
- m_param2_type = type;
- m_param2 = val;
- break;
-
- case 0x60:
- case 0x61:
- case 0x62:
- case 0x63:
- case 0x64:
- case 0x65:
- case 0x66:
- case 0x67:
- // (ALU OP) (src), (HL)
- m_op = (bx & 0x7)+ALU_ADDC;
- m_param1_type = type;
- m_param1 = val;
-
- m_param2_type = ADDR_IN_HL;
- //m_param2 = 0;
- break;
-
- case 0x68:
- case 0x69:
- case 0x6a:
- case 0x6b:
- case 0x6c:
- case 0x6d:
- case 0x6e:
- case 0x6f:
- break;
-
- case 0x70:
- case 0x71:
- case 0x72:
- case 0x73:
- case 0x74:
- case 0x75:
- case 0x76:
- case 0x77:
- // (ALU OP) (src), n
- m_op = (bx & 0x7)+ALU_ADDC;
- m_param1_type = type;
- m_param1 = val;
-
- m_param2_type = ABSOLUTE_VAL_8;
- m_param2 = READ8();
- break;
-
- case 0x78:
- case 0x79:
- case 0x7a:
- case 0x7b:
- case 0x7c:
- case 0x7d:
- case 0x7e:
- case 0x7f:
- // (ALU OP) A, (src)
-
- m_op = (bx & 0x7)+ALU_ADDC;
- m_param2_type = type;
- m_param2 = val;
-
- m_param1_type = REG_8BIT;
- m_param1 = 0; // A
- break;
-
- case 0x80:
- case 0x81:
- case 0x82:
- case 0x83:
- case 0x84:
- case 0x85:
- case 0x86:
- case 0x87:
- case 0x88:
- case 0x89:
- case 0x8a:
- case 0x8b:
- case 0x8c:
- case 0x8d:
- case 0x8e:
- case 0x8f:
- break;
-
- case 0x90:
- case 0x91:
- case 0x92:
- case 0x93:
- case 0x94:
- case 0x95:
- case 0x96:
- case 0x97:
- case 0x98:
- case 0x99:
- case 0x9a:
- case 0x9b:
- case 0x9c:
- case 0x9d:
- case 0x9e:
- case 0x9f:
- break;
-
- case 0xa0:
- case 0xa1:
- case 0xa2:
- case 0xa3:
- case 0xa4:
- case 0xa5:
- case 0xa6:
- case 0xa7:
- break;
-
- case 0xa8:
- case 0xa9:
- case 0xaa:
- case 0xab:
- case 0xac:
- case 0xad:
- case 0xae:
- case 0xaf:
- // XCH r,(src)
- m_op = XCH;
-
- m_param1_type = REG_8BIT;
- m_param1 = bx & 0x7;
-
- m_param2_type = type;
- m_param2 = val;
- break;
-
-
- case 0xb0:
- case 0xb1:
- case 0xb2:
- case 0xb3:
- case 0xb4:
- case 0xb5:
- case 0xb6:
- case 0xb7:
- case 0xb8:
- case 0xb9:
- case 0xba:
- case 0xbb:
- case 0xbc:
- case 0xbd:
- case 0xbe:
- case 0xbf:
- break;
-
- case 0xc0:
- case 0xc1:
- case 0xc2:
- case 0xc3:
- case 0xc4:
- case 0xc5:
- case 0xc6:
- case 0xc7:
- // CPL (src).b
- m_op = CPL;
-
- m_param1_type = type | BITPOS;
- m_param1 = val;
- m_bitpos = bx & 0x7;
- break;
-
- case 0xc8:
- case 0xc9:
- case 0xca:
- case 0xcb:
- case 0xcc:
- case 0xcd:
- case 0xce:
- case 0xcf:
- // LD (src).b,CF
- m_op = LD; // Flags / Cycles 1--- / x
- m_flagsaffected |= FLAG_J;
-
- m_param1_type = type | BITPOS;
- m_param1 = val;
- m_bitpos = bx & 0x7;
-
- m_param2_type = CARRYFLAG;
- //m_param2 = 0;
- break;
-
-
- case 0xd0:
- case 0xd1:
- case 0xd2:
- case 0xd3:
- case 0xd4:
- case 0xd5:
- case 0xd6:
- case 0xd7:
- // XOR CF,(src).b
- m_op = ALU_XOR;
- m_param1_type = CARRYFLAG;
- //m_param1 = 0;
-
- m_param2_type = type | BITPOS;
- m_param2 = val;
- m_bitpos = bx & 0x7;
- break;
-
- case 0xd8:
- case 0xd9:
- case 0xda:
- case 0xdb:
- case 0xdc:
- case 0xdd:
- case 0xde:
- case 0xdf:
- // LD CF,(src).b aka TEST (src).b
- m_op = LD; // Flags / Cycles %-*- / x
- m_flagsaffected |= FLAG_J | FLAG_C;
-
- m_param2_type = type | BITPOS;
- m_param2 = val;
- m_bitpos = bx & 0x7;
-
- m_param1_type = CARRYFLAG;
- //m_param1 = 0;
- break;
-
-
- case 0xe0:
- case 0xe1:
- case 0xe2:
- case 0xe3:
- case 0xe4:
- case 0xe5:
- case 0xe6:
- case 0xe7:
- case 0xe8:
- case 0xe9:
- case 0xea:
- case 0xeb:
- case 0xec:
- case 0xed:
- case 0xee:
- case 0xef:
- break;
-
- case 0xf0:
- case 0xf1:
- case 0xf2:
- case 0xf3:
- case 0xf4:
- case 0xf5:
- case 0xf6:
- case 0xf7:
- break;
-
- case 0xf8:
- case 0xf9:
- case 0xfa:
- case 0xfb:
- case 0xfc:
- // CALL (src)
- m_op = CALL;
- m_param1_type = type;
- m_param1 = val;
- break;
-
- case 0xfd:
- break;
-
- case 0xfe:
- // JP (src)
- m_op = JP;
- m_param2_type = type | IS16BIT;
- m_param2 = val;
- break;
-
- case 0xff:
- break;
-
-
- }
-
-}
-
-// f0 - f7 use this table
-// note, same table is shown as above in manual, there's no overlap between src/dest, but they're not compatible
-void tlcs870_device::decode_dest(uint8_t b0)
-{
- uint8_t bx;
-
- bx = READ8();
-
- switch (bx)
- {
- case 0x10:
- case 0x11:
- case 0x12:
- case 0x13:
- // LD (dst),rr // (dst) can only be (x) (pp) or (HL+d) ? not (HL+) or (-HL) ?
- m_op = LD; // Flags / Cycles 1--- / x
- m_flagsaffected |= FLAG_J;
-
- m_param1_type |= IS16BIT;
-
-
- m_param2_type = REG_16BIT;
- m_param2 = bx&0x3;
- break;
-
- case 0x2c:
- // LD (dst),n // (dst) can only be (DE), (HL+), (-HL), or (HL+d) because (x) and (HL) are redundant encodings?
- m_op = LD; // Flags / Cycles 1--- / x
- m_flagsaffected |= FLAG_J;
-
- m_param2_type = ABSOLUTE_VAL_8;
- m_param2 = READ8();
- break;
-
- case 0x50:
- case 0x51:
- case 0x52:
- case 0x53:
- case 0x54:
- case 0x55:
- case 0x56:
- case 0x57:
- // LD (dst),r
- m_op = LD; // Flags / Cycles 1--- / x
- m_flagsaffected |= FLAG_J;
-
- m_param2_type = REG_8BIT;
- m_param2 = bx&0x7;
- break;
-
- default:
- break;
- }
-}
-
-bool tlcs870_device::stream_arg(std::ostream &stream, uint32_t pc, const char *pre, const uint16_t mode, const uint16_t r, const uint16_t rb)
-{
- return false;
-}
-
-void tlcs870_device::execute_set_input(int inputnum, int state)
-{
-#if 0
- switch(inputnum) {
- case INPUT_LINE_NMI:
- set_irq_line(INTNMI, state);
- break;
- case INPUT_LINE_IRQ0:
- set_irq_line(INT0, state);
- break;
- case INPUT_LINE_IRQ1:
- set_irq_line(INT1, state);
- break;
- case INPUT_LINE_IRQ2:
- set_irq_line(INT2, state);
- break;
- }
-#endif
-}
-
-uint16_t tlcs870_device::get_addr(uint16_t param_type, uint16_t param_val)
-{
- uint16_t addr = 0x0000;
-
- switch (param_type&MODE_MASK)
- {
- case ADDR_IN_IMM_X:
- addr = param_val;
- break;
- case ADDR_IN_PC_PLUS_REG_A:
- addr = m_temppc + 2 + get_reg8(REG_A);
- break;
- case ADDR_IN_DE:
- addr = get_reg16(REG_DE);
- break;
- case ADDR_IN_HL:
- addr = get_reg16(REG_HL);
- break;
- case ADDR_IN_HL_PLUS_IMM_D:
- addr = get_reg16(REG_HL) + param_val;
- break;
- case ADDR_IN_HL_PLUS_REG_C:
- addr = get_reg16(REG_HL) + get_reg16(REG_C);
- break;
- case ADDR_IN_HLINC:
- {
- uint16_t tmpHL = get_reg16(REG_HL);
- addr = tmpHL;
- tmpHL++;
- set_reg16(REG_HL, tmpHL);
- break;
- }
- case ADDR_IN_DECHL:
- {
- uint16_t tmpHL = get_reg16(REG_HL);
- tmpHL--;
- set_reg16(REG_HL, tmpHL);
- addr = tmpHL;
- break;
- }
- }
-
- return addr;
-}
-
-void tlcs870_device::set_dest_val(uint16_t param_type, uint16_t param_val, uint16_t dest_val)
-{
- if (param_type & IS16BIT)
- {
- switch (param_type)
- {
- case ABSOLUTE_VAL_16:
- logerror("illegal dest ABSOLUTE_VAL_16\n");
- break;
-
- case REG_16BIT:
- set_reg16(param_val, dest_val);
- break;
-
- case (STACKPOINTER):
- m_sp.d = dest_val;
- break;
- }
- }
- else
- {
- switch (param_type & MODE_MASK)
- {
- case ABSOLUTE_VAL_8:
- logerror("illegal dest ABSOLUTE_VAL_8\n");
- break;
- case REG_8BIT:
- set_reg8(param_val, dest_val);
- break;
- }
- }
-}
-
-uint16_t tlcs870_device::get_source_val(uint16_t param_type, uint16_t param_val)
-{
- uint16_t ret_val = 0x0000;
-
- if (param_type & IS16BIT)
- {
- switch (param_type)
- {
- case ABSOLUTE_VAL_16:
- ret_val = param_val;
- break;
-
- case REG_16BIT:
- ret_val = get_reg16(param_val);
- break;
-
- case (STACKPOINTER):
- ret_val = m_sp.d;
- break;
- }
- }
- else
- {
- switch (param_type & MODE_MASK)
- {
- case ABSOLUTE_VAL_8:
- ret_val = param_val;
- break;
- case REG_8BIT:
- ret_val = get_reg8(param_val);
- break;
- }
- }
- return ret_val;
-}
-
-void tlcs870_device::setbit_param(uint16_t param_type, uint16_t param, uint8_t bit, bool do_flag)
-{
- if (param_type & BITPOS)
- {
- uint8_t bitpos = 0;
-
- // need to read param 1
- uint16_t addr = 0x0000;
- uint16_t val = 0;
-
- // READ
- if (param_type & ADDR_IN_BASE)
- {
- addr = get_addr(param_type, param); // any pre/post HL address adjustments happen here
- if (param_type & IS16BIT)
- val = RM16(addr);
- else
- val = RM8(addr);
- }
- else
- {
- val = get_source_val(param_type, param);
- }
-
- if (param_type & BITPOS_INDIRECT)
- {
- bitpos = get_reg8(m_bitpos & 7) & 0x7;
- }
- else
- {
- bitpos = m_bitpos;
- }
-
- // MODIFY
- int bitused = (1 << bitpos);
-
- // this is the flag behavior for the set/clr bit opcodes
- if (do_flag)
- {
- int existingbit = (val & bitused);
- if (existingbit)
- {
- CLEAR_ZF;
- CLEAR_JF; // 'Z' (so copy Z flag?)
- }
- else
- {
- SET_ZF;
- SET_JF; // 'Z'
- }
- }
-
-
- bit ? (val |= bitused) : (val &= ~bitused);
-
- //printf("bit to set is %d, value is %02x", bitused, val);
-
- // WRITE
- if (param_type & ADDR_IN_BASE)
- {
- //addr = get_addr(param_type,param); // already have addr, don't want to cause any further HL decrements/increments.
- if (param_type & IS16BIT)
- WM16(addr, val);
- else
- WM8(addr, val);
- }
- else
- {
- set_dest_val(param_type, param, val);
- }
- }
- else
- {
- fatalerror("not a bit op? 0\n");
- }
-}
-
-uint8_t tlcs870_device::getbit_param(uint16_t param_type, uint16_t param)
-{
- uint8_t bit = 0;
-
- if (param_type & BITPOS)
- {
- uint8_t bitpos;
-
- // need to read param 2
- uint16_t addr = 0x0000;
- uint16_t val = 0;
- if (param_type & ADDR_IN_BASE)
- {
- addr = get_addr(param_type, param);
- if (param_type & IS16BIT)
- val = RM16(addr);
- else
- val = RM8(addr);
- }
- else
- {
- val = get_source_val(param_type, param);
- }
-
- if (param_type & BITPOS_INDIRECT)
- {
- bitpos = get_reg8(m_bitpos & 7) & 0x7;
- }
- else
- {
- bitpos = m_bitpos;
- }
-
- bit = (val >> bitpos) & 1;
- }
- else
- {
- fatalerror("not a bit op? 0\n");
- }
-
- return bit;
-}
-
-void tlcs870_device::execute_run()
-{
- do
- {
- m_prvpc.d = m_pc.d;
- debugger_instruction_hook(m_pc.d);
-
- //check_interrupts();
- m_temppc = m_pc.d;
-
- m_addr = m_pc.d;
- decode();
- m_pc.d = m_addr;
-
- switch (m_op)
- {
- case UNKNOWN:
- // invalid instruction
- break;
-
- case CALL:
- break;
- case CALLP:
- break;
- case CALLV:
- break;
-
- case CLR:
- if ((m_param1_type & BITPOS))
- {
- //printf("clr on bit\n");
-
- if (m_param1_type == CARRYFLAG)
- {
- CLEAR_CF;
- SET_JF;
- }
- else
- {
- setbit_param(m_param1_type, m_param1, 0, true);
- }
- }
- else
- {
- // grouped with the LD operations in the manual but with CLR name, so probably internally just calling LD with 0 value
-
- uint16_t addr = 0x0000;
- uint16_t val = 0;
-
- if (m_param1_type & ADDR_IN_BASE)
- {
- addr = get_addr(m_param1_type,m_param1);
- if (m_param1_type & IS16BIT)
- WM16(addr, val);
- else
- WM8(addr, val);
- }
- else
- {
- set_dest_val(m_param1_type,m_param1, val);
- }
- SET_JF;
- }
- break;
-
-
- case CPL:
- break;
- case DAA:
- break;
- case DAS:
- break;
- case DEC:
- break;
- /*
- case DI:
- break;
- */
- case DIV:
- break;
- /*
- case EI:
- break;
- */
- case INC:
- {
- // READ
- uint16_t addr = 0x0000;
- uint16_t val = 0;
- if (m_param1_type & ADDR_IN_BASE)
- {
- addr = get_addr(m_param1_type, m_param1);
- if (m_param1_type & IS16BIT)
- val = RM16(addr);
- else
- val = RM8(addr);
- }
- else
- {
- val = get_source_val(m_param1_type, m_param1);
- }
-
- // MODIFY
- val++;
-
- if (!(m_param1_type & IS16BIT))
- val &= 0xff;
-
- if (val == 0)
- {
- SET_ZF;
- SET_JF;
- }
- else
- {
- CLEAR_ZF;
- CLEAR_JF;
- }
-
- // WRITE
- if (m_param1_type & ADDR_IN_BASE)
- {
- //addr = get_addr(m_param1_type,m_param1); // already have
- if (m_param1_type & IS16BIT)
- WM16(addr, val);
- else
- WM8(addr, val);
- }
- else
- {
- set_dest_val(m_param1_type,m_param1, val);
- }
-
- break;
- }
- /*
- case J:
- break;
- */
- case JP:
- case JR:
- case JRS:
- {
- bool takejump = true;
-
- if (m_param1_type == CONDITIONAL)
- {
- switch (m_param1)
- {
- case COND_EQ_Z:
- if (IS_ZF == 1) takejump = true;
- else takejump = false;
- break;
-
- case COND_NE_NZ:
- if (IS_ZF == 0) takejump = true;
- else takejump = false;
- break;
-
- case COND_LT_CS:
- if (IS_CF == 1) takejump = true;
- else takejump = false;
- break;
-
- case COND_GE_CC:
- if (IS_CF == 0) takejump = true;
- else takejump = false;
- break;
-
- case COND_LE:
- if ((IS_CF || IS_ZF) == 1) takejump = true;
- else takejump = false;
- break;
-
- case COND_GT:
- if ((IS_CF || IS_ZF) == 0) takejump = true;
- else takejump = false;
- break;
-
- case COND_T:
- if (IS_JF == 1) takejump = true;
- else takejump = false;
- break;
-
- case COND_F:
- if (IS_JF == 0) takejump = true;
- else takejump = false;
- break;
-
- }
- }
-
- if (takejump)
- {
- // would the address / register be read even if the jump isn't going to be taken?
- uint16_t addr = 0x0000;
- uint16_t val = 0;
- if (m_param2_type & ADDR_IN_BASE)
- {
- addr = get_addr(m_param2_type,m_param2);
- if (m_param2_type & IS16BIT)
- val = RM16(addr);
- else
- {
- fatalerror("8-bit jump destination?");
- // val = RM8(addr);
- }
- }
- else
- {
- val = get_source_val(m_param2_type,m_param2);
- }
-
- m_pc.d = val;
- }
-
- SET_JF;
-
- break;
- }
- case LD:
- {
- if ((m_param1_type & BITPOS) || (m_param2_type & BITPOS))
- {
- // bit operations, including the 'TEST' style bit instruction
- uint8_t bit = 0;
-
- if (m_param2_type == CARRYFLAG)
- {
- bit = IS_CF;
-
- setbit_param(m_param1_type,m_param1,bit, false);
-
- // for this type of operation ( LD *.b, CF ) the Jump Flag always ends up being 1
- SET_JF;
-
- }
- else if (m_param1_type == CARRYFLAG)
- {
- getbit_param(m_param2_type,m_param2);
-
- bit ? SET_CF : CLEAR_CF;
- // for this type of operation ( LD CF, *.b ) the Jump Flag always ends up the inverse of the Carry Flag
- bit ? CLEAR_JF : SET_JF;
- }
- else
- {
- fatalerror("not a bit op?! 2");
- }
- }
- else
- {
- uint16_t addr = 0x0000;
- uint16_t val = 0;
- if (m_param2_type & ADDR_IN_BASE)
- {
- addr = get_addr(m_param2_type,m_param2);
- if (m_param2_type & IS16BIT)
- val = RM16(addr);
- else
- val = RM8(addr);
- }
- else
- {
- val = get_source_val(m_param2_type,m_param2);
- }
-
- SET_JF; // Jump Flag always gets set
-
- // some (but not all) LD operations change the Zero Flag, some leave it undefined (for those we don't change it)
- if (m_flagsaffected & FLAG_Z)
- {
- if (val == 0x00) SET_ZF;
- else CLEAR_ZF;
- }
-
- if (m_param1_type & ADDR_IN_BASE)
- {
- addr = get_addr(m_param1_type,m_param1);
- if (m_param1_type & IS16BIT)
- WM16(addr, val);
- else
- WM8(addr, val);
- }
- else
- {
- set_dest_val(m_param1_type,m_param1, val);
- }
- }
- break;
- }
- case LDW:
- break;
- case MCMP:
- break;
- case MUL:
- break;
- case NOP:
- break;
- case POP:
- break;
- case PUSH:
- break;
- case RET:
- break;
- case RETI:
- break;
- case RETN:
- break;
- case ROLC:
- break;
- case ROLD:
- break;
- case RORC:
- break;
- case RORD:
- break;
-
-
- case SET:
- if ((m_param1_type & BITPOS))
- {
- //printf("set on bit\n");
-
- if (m_param1_type == CARRYFLAG)
- {
- SET_CF;
- CLEAR_JF;
- }
- else
- {
- //printf("set with setbit_param\n");
-
- setbit_param(m_param1_type, m_param1, 1, true);
- }
- }
- else
- {
- fatalerror("all SET opcode should be bit operations\n");
- /*
- uint16_t addr = 0x0000;
- uint16_t val = 1;
-
- if (m_param1_type & ADDR_IN_BASE)
- {
- addr = get_addr(m_param1_type,m_param1);
- if (m_param1_type & IS16BIT)
- WM16(addr, val);
- else
- WM8(addr, val);
- }
- else
- {
- set_dest_val(m_param1_type,m_param1, val);
- }
- */
-
- }
- break;
-
-
- case SHLC:
- break;
- case SHRC:
- break;
- case SWAP:
- break;
- case SWI:
- break;
- /*
- case TEST:
- break;
- */
- case XCH:
- break;
- case ALU_ADDC:
- break;
- case ALU_ADD:
- break;
- case ALU_SUBB:
- break;
- case ALU_SUB:
- break;
- case ALU_AND:
- break;
- case ALU_XOR:
- break;
- case ALU_OR:
- break;
- case ALU_CMP:
-
- uint16_t addr = 0x0000;
- uint16_t val = 0;
- if (m_param2_type & ADDR_IN_BASE)
- {
- addr = get_addr(m_param2_type,m_param2);
- if (m_param2_type & IS16BIT)
- val = RM16(addr);
- else
- val = RM8(addr);
- }
- else
- {
- val = get_source_val(m_param2_type,m_param2);
- }
-
- uint16_t val2 = val;
-
- if (m_param1_type & ADDR_IN_BASE)
- {
- addr = get_addr(m_param1_type,m_param1);
- if (m_param1_type & IS16BIT)
- val = RM16(addr);
- else
- val = RM8(addr);
- }
- else
- {
- val = get_source_val(m_param1_type,m_param1);
- }
-
- if (val < val2)
- {
- SET_CF;
- }
- else
- {
- CLEAR_CF;
- }
-
- if (val == val2)
- {
- SET_ZF;
- SET_JF;
- }
- else
- {
- CLEAR_ZF;
- CLEAR_JF;
- }
-
- // TODO: HF (how to calculate it?)
-
-
- break;
- }
-
- m_icount-=m_cycles*4; // 1 machine cycle = 4 clock cycles?
-
-
- } while( m_icount > 0 );
-}
-
-void tlcs870_device::device_reset()
-{
- // todo, read from top address
- m_pc.d = 0xc030;
-
- m_RBS = 0;
-
-}
-
-uint8_t tlcs870_device::get_reg8(int reg)
-{
- return m_intram[((m_RBS & 0xf) * 8) + (reg & 0x7)];
-}
-
-void tlcs870_device::set_reg8(int reg, uint8_t val)
-{
- m_intram[((m_RBS & 0xf) * 8) + (reg & 0x7)] = val;
-}
-
-uint16_t tlcs870_device::get_reg16(int reg)
-{
- uint16_t res = 0;
- res |= get_reg8(((reg & 0x3) * 2) + 1) << 8;
- res |= get_reg8(((reg & 0x3) * 2) + 0) << 0;
- return res;
-}
-
-void tlcs870_device::set_reg16(int reg, uint16_t val)
-{
- set_reg8(((reg & 0x3) * 2) + 1, (val & 0xff00) >> 8);
- set_reg8(((reg & 0x3) * 2) + 0, (val & 0x00ff) >> 0);
-}
-
-
-
-void tlcs870_device::state_import(const device_state_entry &entry)
-{
- switch (entry.index())
- {
- case DEBUGGER_REG_A:
- set_reg8(REG_A, m_debugger_temp);
- break;
-
- case DEBUGGER_REG_W:
- set_reg8(REG_W, m_debugger_temp);
- break;
-
- case DEBUGGER_REG_C:
- set_reg8(REG_C, m_debugger_temp);
- break;
-
- case DEBUGGER_REG_B:
- set_reg8(REG_B, m_debugger_temp);
- break;
-
- case DEBUGGER_REG_E:
- set_reg8(REG_E, m_debugger_temp);
- break;
-
- case DEBUGGER_REG_D:
- set_reg8(REG_D, m_debugger_temp);
- break;
-
- case DEBUGGER_REG_L:
- set_reg8(REG_L, m_debugger_temp);
- break;
-
- case DEBUGGER_REG_H:
- set_reg8(REG_H, m_debugger_temp);
- break;
-
- case DEBUGGER_REG_WA:
- set_reg16(REG_WA, m_debugger_temp);
- break;
-
- case DEBUGGER_REG_BC:
- set_reg16(REG_BC, m_debugger_temp);
- break;
-
- case DEBUGGER_REG_DE:
- set_reg16(REG_DE, m_debugger_temp);
- break;
-
- case DEBUGGER_REG_HL:
- set_reg16(REG_HL, m_debugger_temp);
- break;
- }
-}
-
-
-void tlcs870_device::state_export(const device_state_entry &entry)
-{
- switch (entry.index())
- {
- case DEBUGGER_REG_A:
- m_debugger_temp = get_reg8(REG_A);
- break;
-
- case DEBUGGER_REG_W:
- m_debugger_temp = get_reg8(REG_W);
- break;
-
- case DEBUGGER_REG_C:
- m_debugger_temp = get_reg8(REG_C);
- break;
-
- case DEBUGGER_REG_B:
- m_debugger_temp = get_reg8(REG_B);
- break;
-
- case DEBUGGER_REG_E:
- m_debugger_temp = get_reg8(REG_E);
- break;
-
- case DEBUGGER_REG_D:
- m_debugger_temp = get_reg8(REG_D);
- break;
-
- case DEBUGGER_REG_L:
- m_debugger_temp = get_reg8(REG_L);
- break;
-
- case DEBUGGER_REG_H:
- m_debugger_temp = get_reg8(REG_H);
- break;
-
- case DEBUGGER_REG_WA:
- m_debugger_temp = get_reg16(REG_WA);
- break;
-
- case DEBUGGER_REG_BC:
- m_debugger_temp = get_reg16(REG_BC);
- break;
-
- case DEBUGGER_REG_DE:
- m_debugger_temp = get_reg16(REG_DE);
- break;
-
- case DEBUGGER_REG_HL:
- m_debugger_temp = get_reg16(REG_HL);
- break;
-
}
}
void tlcs870_device::device_start()
{
-// int i, p;
+ // int i, p;
m_sp.d = 0x0000;
m_F = 0;
@@ -3140,7 +312,7 @@ void tlcs870_device::device_start()
state_add(STATE_GENPC, "GENPC", m_pc.w.l).formatstr("%04X");
state_add(STATE_GENPCBASE, "CURPC", m_prvpc.w.l).formatstr("%04X").noshow();
state_add(STATE_GENSP, "GENSP", m_sp.w.l).formatstr("%04X");
- state_add(STATE_GENFLAGS, "GENFLAGS", m_F ).formatstr("%8s").noshow();
+ state_add(STATE_GENFLAGS, "GENFLAGS", m_F).formatstr("%8s").noshow();
set_icountptr(m_icount);
}
@@ -3153,14 +325,14 @@ void tlcs870_device::state_string_export(const device_state_entry &entry, std::s
switch (entry.index())
{
- case STATE_GENFLAGS:
- str = string_format("%c%c%c%c",
- F & 0x80 ? 'J':'.',
- F & 0x40 ? 'Z':'.',
- F & 0x20 ? 'C':'.',
- F & 0x10 ? 'H':'.'
- );
- break;
+ case STATE_GENFLAGS:
+ str = string_format("%c%c%c%c",
+ F & 0x80 ? 'J' : '.',
+ F & 0x40 ? 'Z' : '.',
+ F & 0x20 ? 'C' : '.',
+ F & 0x10 ? 'H' : '.'
+ );
+ break;
}
}
diff --git a/src/devices/cpu/tlcs870/tlcs870.h b/src/devices/cpu/tlcs870/tlcs870.h
index 42ca4b1c6c6..8b3c9d83bd3 100644
--- a/src/devices/cpu/tlcs870/tlcs870.h
+++ b/src/devices/cpu/tlcs870/tlcs870.h
@@ -8,32 +8,40 @@
class tlcs870_device : public cpu_device
{
protected:
- enum _e_op {
- UNKNOWN = 0x00,
- CALL, CALLP, CALLV, CLR, CPL,
- DAA, DAS, DEC, /*DI,*/ DIV,
- /*EI,*/
- INC,
- /*J,*/ JP, JR, JRS,
- LD, LDW,
- MCMP, MUL,
- NOP,
- POP, PUSH,
- RET, RETI, RETN, ROLC, ROLD, RORC, RORD,
- SET, SHLC, SHRC, SWAP, SWI,
- /*TEST,*/ XCH,
-
- ALU_ADDC,
- ALU_ADD,
- ALU_SUBB,
- ALU_SUB,
- ALU_AND,
- ALU_XOR,
- ALU_OR,
- ALU_CMP
- };
+ // construction/destruction
+ tlcs870_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor program_map);
+
+ // device-level overrides
+ virtual void device_start() override;
+ virtual void device_reset() override;
+
+ // device_execute_interface overrides
+ virtual uint32_t execute_min_cycles() const override { return 2; }
+ virtual uint32_t execute_max_cycles() const override { return 26; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
+ virtual bool execute_input_edge_triggered(int inputnum) const override { return inputnum == INPUT_LINE_NMI; }
+ virtual void execute_run() override;
+ virtual void execute_set_input(int inputnum, int state) override;
+
+ // device_memory_interface overrides
+ virtual space_config_vector memory_space_config() const override;
+
+ // device_state_interface overrides
+ virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
+ virtual void state_import(const device_state_entry &entry) override;
+ virtual void state_export(const device_state_entry &entry) override;
+
+ // device_disasm_interface overrides
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+ void tmp87ph40an_mem(address_map &map);
+
+ uint32_t m_debugger_temp;
- enum _regs8 {
+private:
+
+ enum _regs8
+ {
REG_A,
REG_W,
REG_C,
@@ -44,19 +52,16 @@ protected:
REG_H
};
- enum _regs16 {
+ enum _regs16
+ {
REG_WA,
REG_BC,
REG_DE,
REG_HL
};
- enum _regs16p {
- pREG_DE,
- pREG_HL
- };
-
- enum _regs_debugger {
+ enum _regs_debugger
+ {
DEBUGGER_REG_A,
DEBUGGER_REG_W,
DEBUGGER_REG_C,
@@ -71,7 +76,8 @@ protected:
DEBUGGER_REG_HL
};
- enum _conditions {
+ enum _conditions
+ {
COND_EQ_Z,
COND_NE_NZ,
COND_LT_CS,
@@ -82,37 +88,18 @@ protected:
COND_F
};
- // construction/destruction
- tlcs870_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor program_map);
-
- // device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
-
- // device_execute_interface overrides
- virtual uint32_t execute_min_cycles() const override { return 2; }
- virtual uint32_t execute_max_cycles() const override { return 26; }
- virtual uint32_t execute_input_lines() const override { return 1; }
- virtual bool execute_input_edge_triggered(int inputnum) const override { return inputnum == INPUT_LINE_NMI; }
- virtual void execute_run() override;
- virtual void execute_set_input(int inputnum, int state) override;
-
- // device_memory_interface overrides
- virtual space_config_vector memory_space_config() const override;
-
- // device_state_interface overrides
- virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
- virtual void state_import(const device_state_entry &entry) override;
- virtual void state_export(const device_state_entry &entry) override;
-
- // device_disasm_interface overrides
- virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
-
- void tmp87ph40an_mem(address_map &map);
-
- uint32_t m_debugger_temp;
+ enum _srcdst_addressingmode
+ {
+ ADDR_IN_IMM_X,
+ ADDR_IN_PC_PLUS_REG_A,
+ ADDR_IN_DE,
+ ADDR_IN_HL,
+ ADDR_IN_HL_PLUS_IMM_D,
+ ADDR_IN_HL_PLUS_REG_C,
+ ADDR_IN_HLINC,
+ ADDR_IN_DECHL
+ };
-private:
address_space_config m_program_config;
address_space_config m_io_config;
required_shared_ptr<uint8_t> m_intram;
@@ -124,18 +111,8 @@ private:
int m_icount;
// Work registers
- uint16_t m_op;
- int m_param2_type;
- uint16_t m_param2;
-
- int m_param1_type;
- uint16_t m_param1;
- uint16_t m_temppc; // this is just PPC? use generic reg?
-
- uint8_t m_bitpos;
- uint8_t m_flagsaffected;
uint8_t m_cycles;
-
+ uint16_t m_tmppc;
uint32_t m_addr;
uint16_t m_F;
@@ -143,34 +120,225 @@ private:
/* CPU registers */
uint8_t m_RBS; // register base (4-bits)
- inline uint8_t RM8 (uint32_t a);
- inline uint16_t RM16(uint32_t a);
- inline void WM8 (uint32_t a, uint8_t v);
- inline void WM16(uint32_t a, uint16_t v);
- inline uint8_t RX8 (uint32_t a, uint32_t base);
- inline uint16_t RX16(uint32_t a, uint32_t base);
- inline void WX8 (uint32_t a, uint8_t v, uint32_t base);
- inline void WX16(uint32_t a, uint16_t v, uint32_t base);
- inline uint8_t READ8();
- inline uint16_t READ16();
- void decode();
- void decode_register_prefix(uint8_t b0);
- void decode_source(int type, uint16_t val);
- void decode_dest(uint8_t b0);
+ uint8_t RM8(const uint32_t a) { return m_program->read_byte(a); }
+ uint16_t RM16(const uint32_t a) { return RM8(a) | (RM8((a + 1) & 0xffff) << 8); }
+
+ void WM8(const uint32_t a, const uint8_t v) { m_program->write_byte(a, v); }
+ void WM16(const uint32_t a, const uint16_t v) { WM8(a, v); WM8((a + 1) & 0xffff, v >> 8); }
- void setbit_param(uint16_t param_type, uint16_t param, uint8_t bit, bool do_flag);
- uint8_t getbit_param(uint16_t param_type, uint16_t param);
+ uint8_t RX8(const uint32_t a, const uint32_t base) { return m_program->read_byte(base | a); }
+ uint16_t RX16(const uint32_t a, const uint32_t base) { return RX8(a, base) | (RX8((a + 1) & 0xffff, base) << 8); }
- uint16_t get_addr(uint16_t param_type, uint16_t param_val);
- uint16_t get_source_val(uint16_t param_type, uint16_t param_val);
- void set_dest_val(uint16_t param_type, uint16_t param_val, uint16_t dest_val);
+ void WX8(const uint32_t a, const uint8_t v, const uint32_t base) { m_program->write_byte(base | a, v); }
+ void WX16(const uint32_t a, const uint16_t v, const uint32_t base) { WX8(a, v, base); WX8((a + 1) & 0xffff, v >> 8, base); }
- uint8_t get_reg8(int reg);
- void set_reg8(int reg, uint8_t val);
- uint16_t get_reg16(int reg);
- void set_reg16(int reg, uint16_t val);
+ uint8_t READ8() { const uint8_t b0 = RM8(m_addr++); m_addr &= 0xffff; return b0; }
+ uint16_t READ16() { const uint8_t b0 = READ8(); return b0 | (READ8() << 8); }
+
+ uint16_t get_addr(uint16_t opbyte0, uint16_t val);
+
+ const uint8_t get_reg8(const int reg);
+ void set_reg8(const int reg, uint8_t val);
+ const uint16_t get_reg16(const int reg);
+ void set_reg16(const int reg, uint16_t val);
+
+ static constexpr int FLAG_J = 0x80;
+ static constexpr int FLAG_Z = 0x40;
+ static constexpr int FLAG_C = 0x20;
+ static constexpr int FLAG_H = 0x10;
+
+ void clear_JF() { m_F &= ~FLAG_J; }
+ void clear_ZF() { m_F &= ~FLAG_Z; }
+ void clear_CF() { m_F &= ~FLAG_C; }
+ void clear_HF() { m_F &= ~FLAG_H; }
+
+ void set_JF() { m_F |= FLAG_J; }
+ void set_ZF() { m_F |= FLAG_Z; }
+ void set_CF() { m_F |= FLAG_C; }
+ void set_HF() { m_F |= FLAG_H; }
+
+ int is_JF() const { return ((m_F & FLAG_J) ? 1 : 0); }
+ int is_ZF() const { return ((m_F & FLAG_Z) ? 1 : 0); }
+ int is_CF() const { return ((m_F & FLAG_C) ? 1 : 0); }
+ int is_HF() const { return ((m_F & FLAG_H) ? 1 : 0); }
bool stream_arg(std::ostream &stream, uint32_t pc, const char *pre, const uint16_t mode, const uint16_t r, const uint16_t rb);
+
+ // tlcs870_ops.cpp
+ void decode();
+
+ void do_illegal(const uint8_t opbyte0);
+
+ void do_NOP(const uint8_t opbyte0);
+ void do_SWAP_A(const uint8_t opbyte0);
+ void do_MUL_W_A(const uint8_t opbyte0);
+ void do_DIV_WA_C(const uint8_t opbyte0);
+ void do_RETI(const uint8_t opbyte0);
+ void do_RET(const uint8_t opbyte0);
+ void do_POP_PSW(const uint8_t opbyte0);
+ void do_PUSH_PSW(const uint8_t opbyte0);
+
+ void do_DAA_A(const uint8_t opbyte0);
+ void do_DAS_A(const uint8_t opbyte0);
+ void do_CLR_CF(const uint8_t opbyte0);
+ void do_SET_CF(const uint8_t opbyte0);
+ void do_CPL_CF(const uint8_t opbyte0);
+ void do_LD_RBS_n(const uint8_t opbyte0);
+ void do_INC_rr(const uint8_t opbyte0);
+ void do_LD_rr_mn(const uint8_t opbyte0);
+ void do_DEC_rr(const uint8_t opbyte0);
+ void do_SHLC_A(const uint8_t opbyte0);
+ void do_SHRC_A(const uint8_t opbyte0);
+ void do_ROLC_A(const uint8_t opbyte0);
+ void do_RORC_A(const uint8_t opbyte0);
+ void do_INC_inx(const uint8_t opbyte0);
+ void do_INC_inHL(const uint8_t opbyte0);
+ void do_LD_A_inx(const uint8_t opbyte0);
+ void do_LD_A_inHL(const uint8_t opbyte0);
+ void do_LDW_inx_mn(const uint8_t opbyte0);
+ void do_LDW_inHL_mn(const uint8_t opbyte0);
+ void do_LD_inx_iny(const uint8_t opbyte0);
+
+ void do_DEC_inx(const uint8_t opbyte0);
+ void do_DEC_inHL(const uint8_t opbyte0);
+ void do_LD_inx_A(const uint8_t opbyte0);
+ void do_LD_inHL_A(const uint8_t opbyte0);
+ void do_LD_inx_n(const uint8_t opbyte0);
+ void do_LD_inHL_n(const uint8_t opbyte0);
+ void do_CLR_inx(const uint8_t opbyte0);
+ void do_CLR_inHL(const uint8_t opbyte0);
+ void do_LD_r_n(const uint8_t opbyte0);
+
+ void do_SET_inxbit(const uint8_t opbyte0);
+ void do_CLR_inxbit(const uint8_t opbyte0);
+ void do_LD_A_r(const uint8_t opbyte0);
+ void do_LD_r_A(const uint8_t opbyte0);
+ void do_INC_r(const uint8_t opbyte0);
+ void do_DEC_r(const uint8_t opbyte0);
+ void do_ALUOP_A_n(const uint8_t opbyte0);
+ void do_ALUOP_A_inx(const uint8_t opbyte0);
+ void do_JRS_T_a(const uint8_t opbyte0);
+ void do_JRS_F_a(const uint8_t opbyte0);
+ void do_CALLV_n(const uint8_t opbyte0);
+ void do_JR_cc_a(const uint8_t opbyte0);
+ void do_LD_CF_inxbit(const uint8_t opbyte0);
+
+ void do_LD_SP_mn(const uint8_t opbyte0);
+ void do_JR_a(const uint8_t opbyte0);
+ void do_CALL_mn(const uint8_t opbyte0);
+ void do_CALLP_n(const uint8_t opbyte0);
+ void do_JP_mn(const uint8_t opbyte0);
+ void do_ff_opcode(const uint8_t opbyte0);
+
+ // tlcs870_ops_src.cpp
+
+ void do_e0_opcode(const uint8_t opbyte0);
+ void do_e1_to_e3_opcode(const uint8_t opbyte0);
+ void do_e4_opcode(const uint8_t opbyte0);
+ void do_e5_to_e7_opcode(const uint8_t opbyte0);
+
+ void do_e0_to_e7_opcode(uint8_t opbyte0, uint16_t srcaddr);
+
+ void do_e0_to_e7_oprand_illegal(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+
+ void do_ROLD_A_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_RORD_A_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_LD_rr_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_INC_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_LD_inx_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_LD_inHL_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_DEC_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_MCMP_insrc_n(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_SET_insrcbit(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_CLR_insrcbit(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_LD_r_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_ALUOP_insrc_inHL(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_ALUOP_insrc_n(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_ALUOP_A_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_XCH_r_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_CPL_insrcbit(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_LD_insrcbit_CF(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_XOR_CF_insrcbit(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_LD_CF_insrcbit(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_CALL_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+ void do_JP_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr);
+
+ uint16_t do_alu(int op, uint16_t param1, uint16_t param2);
+
+ // tlcs870_ops_dst.cpp
+
+ void do_f0_opcode(const uint8_t opbyte0);
+ void do_f2_to_f3_opcode(const uint8_t opbyte0);
+ void do_f4_opcode(const uint8_t opbyte0);
+ void do_f6_to_f7_opcode(const uint8_t opbyte0);
+
+ void do_f0_to_f7_opcode(const uint8_t opbyte0, const uint16_t dstaddr);
+
+ void do_f0_to_f7_oprand_illegal_opcode(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t dstaddr);
+
+ void do_LD_indst_rr(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t dstaddr);
+ void do_LD_indst_n(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t dstaddr);
+ void do_LD_indst_r(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t dstaddr);
+
+ // tlcs870_ops_reg.cpp
+
+ void do_regprefixtype_opcode(const uint8_t opbyte0);
+
+ void do_regprefixtype_oprand_illegal(const uint8_t opbyte0, const uint8_t opbyte1);
+
+ void do_SWAP_g(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_MUL_gg(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_DIV_gg_C(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_RETN(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_POP_gg(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_PUSH_gg(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_DAA_g(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_DAS_g(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_XCH_rr_gg(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_LD_rr_gg(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_SHLC_g(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_SHRC_g(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_ROLC_g(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_RORC_g(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_ALUOP_WA_gg(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_ALUOP_gg_mn(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_SET_gbit(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_CLR_gbit(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_LD_r_g(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_ALUOP_A_g(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_ALUOP_g_A(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_ALUOP_g_n(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_SET_inppbit(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_CLR_inppbit(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_CPL_inppbit(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_LD_inppbit_CF(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_LD_CF_inppbit(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_XCH_r_g(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_CPL_gbit(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_LD_gbit_CF(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_XOR_CF_gbit(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_LD_CF_gbit(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_LD_SP_gg(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_LD_gg_SP(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_CALL_gg(const uint8_t opbyte0, const uint8_t opbyte1);
+ void do_JP_gg(const uint8_t opbyte0, const uint8_t opbyte1);
+
+ void handle_div(const int reg);
+ void handle_mul(const int reg);
+ void handle_swap(const int reg);
+
+ uint8_t handle_SHLC(uint8_t val);
+ uint8_t handle_SHRC(uint8_t val);
+ uint8_t handle_DAS(uint8_t val);
+ uint8_t handle_DAA(uint8_t val);
+ uint8_t handle_ROLC(uint8_t val);
+ uint8_t handle_RORC(uint8_t val);
+ void handle_take_interrupt(int level);
+
+ const bool check_jump_condition(int param1);
+
+ const uint8_t get_PSW();
+ void set_PSW(uint8_t data);
};
diff --git a/src/devices/cpu/tlcs870/tlcs870_ops.cpp b/src/devices/cpu/tlcs870/tlcs870_ops.cpp
new file mode 100644
index 00000000000..a2ab06ca962
--- /dev/null
+++ b/src/devices/cpu/tlcs870/tlcs870_ops.cpp
@@ -0,0 +1,951 @@
+// license:BSD-3-Clause
+// copyright-holders:David Haywood
+/*************************************************************************************************************
+
+ Toshiba TLCS-870 Series MCUs
+
+ (src) prefix ops (e0 to e7 subtable)
+
+ (src) address depends on the first byte of the opcode
+
+ E0 (x)
+ E1 (PC+A)
+ E2 (DE)
+ E3 (HL)
+ E4 (HL+d)
+ E5 (HL+)
+ E6 (-HL)
+
+ note, in cases where the address is an immediate value, not a register (x) and (HL+d) the
+ immediate value is directly after the first byte of the opcode
+
+*************************************************************************************************************/
+
+#include "emu.h"
+#include "tlcs870.h"
+#include "tlcs870d.h"
+#include "debugger.h"
+
+// Main dispatch handlers for these
+
+void tlcs870_device::decode()
+{
+ const uint8_t opbyte0 = READ8();
+
+ switch (opbyte0)
+ {
+ case 0x00:
+ do_NOP(opbyte0); break;
+ case 0x01:
+ do_SWAP_A(opbyte0); break;
+ case 0x02:
+ do_MUL_W_A(opbyte0); break;
+ case 0x03:
+ do_DIV_WA_C(opbyte0); break;
+ case 0x04:
+ do_RETI(opbyte0); break;
+ case 0x05:
+ do_RET(opbyte0); break;
+ case 0x06:
+ do_POP_PSW(opbyte0); break;
+ case 0x07:
+ do_PUSH_PSW(opbyte0); break;
+ case 0x0a:
+ do_DAA_A(opbyte0); break;
+ case 0x0b:
+ do_DAS_A(opbyte0); break;
+ case 0x0c:
+ do_CLR_CF(opbyte0); break;
+ case 0x0d:
+ do_SET_CF(opbyte0); break;
+ case 0x0e:
+ do_CPL_CF(opbyte0); break;
+ case 0x0f:
+ do_LD_RBS_n(opbyte0); break;
+ case 0x10: case 0x11: case 0x12: case 0x13:
+ do_INC_rr(opbyte0); break;
+ case 0x14: case 0x15: case 0x16: case 0x17:
+ do_LD_rr_mn(opbyte0); break;
+ case 0x18: case 0x19: case 0x1a: case 0x1b:
+ do_DEC_rr(opbyte0); break;
+ case 0x1c:
+ do_SHLC_A(opbyte0); break;
+ case 0x1d:
+ do_SHRC_A(opbyte0); break;
+ case 0x1e:
+ do_ROLC_A(opbyte0); break;
+ case 0x1f:
+ do_RORC_A(opbyte0); break;
+ case 0x20:
+ do_INC_inx(opbyte0); break;
+ case 0x21:
+ do_INC_inHL(opbyte0); break;
+ case 0x22:
+ do_LD_A_inx(opbyte0); break;
+ case 0x23:
+ do_LD_A_inHL(opbyte0); break;
+ case 0x24:
+ do_LDW_inx_mn(opbyte0); break;
+ case 0x25:
+ do_LDW_inHL_mn(opbyte0); break;
+ case 0x26:
+ do_LD_inx_iny(opbyte0); break;
+ case 0x28:
+ do_DEC_inx(opbyte0); break;
+ case 0x29:
+ do_DEC_inHL(opbyte0); break;
+ case 0x2a:
+ do_LD_inx_A(opbyte0); break;
+ case 0x2b:
+ do_LD_inHL_A(opbyte0); break;
+ case 0x2c:
+ do_LD_inx_n(opbyte0); break;
+ case 0x2d:
+ do_LD_inHL_n(opbyte0); break;
+ case 0x2e:
+ do_CLR_inx(opbyte0); break;
+ case 0x2f:
+ do_CLR_inHL(opbyte0); break;
+ case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
+ do_LD_r_n(opbyte0); break;
+ case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
+ do_SET_inxbit(opbyte0); break;
+ case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
+ do_CLR_inxbit(opbyte0); break;
+ case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
+ do_LD_A_r(opbyte0); break;
+ case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
+ do_LD_r_A(opbyte0); break;
+ case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
+ do_INC_r(opbyte0); break;
+ case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f:
+ do_DEC_r(opbyte0); break;
+ case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
+ do_ALUOP_A_n(opbyte0); break;
+ case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f:
+ do_ALUOP_A_inx(opbyte0); break;
+ case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87: case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f:
+ case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97: case 0x98: case 0x99: case 0x9a: case 0x9b: case 0x9c: case 0x9d: case 0x9e: case 0x9f:
+ do_JRS_T_a(opbyte0); break;
+ case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7: case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7: case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
+ do_JRS_F_a(opbyte0); break;
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7: case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
+ do_CALLV_n(opbyte0); break;
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ do_JR_cc_a(opbyte0); break;
+ case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf:
+ do_LD_CF_inxbit(opbyte0); break;
+ case 0xe0:
+ do_e0_opcode(opbyte0); break;
+ case 0xe1: case 0xe2: case 0xe3:
+ do_e1_to_e3_opcode(opbyte0); break;
+ case 0xe4:
+ do_e4_opcode(opbyte0); break;
+ case 0xe5: case 0xe6: case 0xe7:
+ do_e5_to_e7_opcode(opbyte0); break;
+ case 0xe8: case 0xe9: case 0xea: case 0xeb: case 0xec: case 0xed: case 0xee: case 0xef:
+ do_regprefixtype_opcode(opbyte0); break;
+ case 0xf0:
+ do_f0_opcode(opbyte0); break;
+ case 0xf2: case 0xf3:
+ do_f2_to_f3_opcode(opbyte0); break;
+ case 0xf4:
+ do_f4_opcode(opbyte0); break;
+ case 0xf6: case 0xf7:
+ do_f6_to_f7_opcode(opbyte0); break;
+ case 0xfa:
+ do_LD_SP_mn(opbyte0); break;
+ case 0xfb:
+ do_JR_a(opbyte0); break;
+ case 0xfc:
+ do_CALL_mn(opbyte0); break;
+ case 0xfd:
+ do_CALLP_n(opbyte0); break;
+ case 0xfe:
+ do_JP_mn(opbyte0); break;
+ case 0xff:
+ do_ff_opcode(opbyte0); break;
+
+ default:
+ do_illegal(opbyte0); break;
+ }
+}
+
+
+void tlcs870_device::do_illegal(const uint8_t opbyte0)
+{
+ logerror("illegal opcode %02x\n", opbyte0);
+}
+
+void tlcs870_device::do_NOP(const uint8_t opbyte0)
+{
+ // NOP
+}
+
+void tlcs870_device::do_SWAP_A(const uint8_t opbyte0)
+{
+ // SWAP A
+ handle_swap(REG_A);
+}
+
+void tlcs870_device::do_MUL_W_A(const uint8_t opbyte0)
+{
+ // MUL W,A
+ handle_mul(REG_WA);
+}
+
+void tlcs870_device::do_DIV_WA_C(const uint8_t opbyte0)
+{
+ // DIV WA,C
+ handle_div(REG_WA);
+}
+
+void tlcs870_device::do_RETI(const uint8_t opbyte0)
+{
+ // RETI
+ // Return from maskable interrupt service (how does this differ from RETN?)
+ m_sp.d += 3;
+ m_addr = RM16(m_sp.d - 2);
+ set_PSW(RM8(m_sp.d - 1));
+}
+
+void tlcs870_device::do_RET(const uint8_t opbyte0)
+{
+ // RET
+ m_sp.d += 2;
+ m_addr = RM16(m_sp.d - 1);
+};
+
+void tlcs870_device::do_POP_PSW(const uint8_t opbyte0)
+{
+ // POP PSW
+ m_sp.d += 2;
+ const uint16_t val = RM16(m_sp.d - 1);
+ set_PSW(val);
+}
+
+void tlcs870_device::do_PUSH_PSW(const uint8_t opbyte0)
+{
+ // PUSH PSW:
+ const uint16_t val = get_PSW();
+ WM16(m_sp.d - 1, val);
+ m_sp.d -= 2;
+}
+
+void tlcs870_device::do_DAA_A(const uint8_t opbyte0)
+{
+ // DAA A
+ uint8_t val = get_reg8(REG_A);
+
+ val = handle_DAA(val);
+
+ set_reg8(REG_A, val);
+}
+
+void tlcs870_device::do_DAS_A(const uint8_t opbyte0)
+{
+ // DAS A
+ uint8_t val = get_reg8(REG_A);
+
+ val = handle_DAS(val);
+
+ set_reg8(REG_A, val);
+}
+
+void tlcs870_device::do_CLR_CF(const uint8_t opbyte0)
+{
+ // CLR CF
+ clear_CF();
+ set_JF();
+}
+
+void tlcs870_device::do_SET_CF(const uint8_t opbyte0)
+{
+ // SET CF
+ set_CF();
+ clear_JF();
+}
+
+void tlcs870_device::do_CPL_CF(const uint8_t opbyte0)
+{
+ // CPL CF
+ if (is_CF())
+ {
+ set_JF();
+ clear_CF();
+ }
+ else
+ {
+ clear_JF();
+ set_CF();
+ }
+}
+
+void tlcs870_device::do_LD_RBS_n(const uint8_t opbyte0) // register bank switching
+{
+ // LD RBS,n
+ const uint8_t param = READ8();
+ m_RBS = param & 0x0f;
+ set_JF();
+}
+
+
+void tlcs870_device::do_INC_rr(const uint8_t opbyte0)
+{
+ // INC rr
+ const int reg = opbyte0 & 3;
+ uint16_t temp = get_reg16(reg);
+ temp++;
+ set_reg16(reg, temp);
+
+ if (temp == 0x0000)
+ {
+ set_ZF();
+ set_JF();
+ }
+ else
+ {
+ // do we clear?
+ clear_ZF();
+ clear_JF();
+ }
+}
+
+
+void tlcs870_device::do_LD_rr_mn(const uint8_t opbyte0)
+{
+ // LD rr,mn
+ const uint16_t val = READ16(); // 16-bit
+ set_reg16(opbyte0 & 3, val);
+ set_JF();
+}
+
+
+void tlcs870_device::do_DEC_rr(const uint8_t opbyte0)
+{
+ // DEC rr
+ const int reg = opbyte0 & 3;
+ uint16_t temp = get_reg16(reg);
+ temp--;
+ set_reg16(reg, temp);
+
+ if (temp == 0xffff)
+ {
+ set_JF();
+ }
+ else
+ {
+ // do we clear?
+ clear_JF();
+ }
+
+ if (temp == 0x0000) // check
+ {
+ set_ZF();
+ }
+ else
+ {
+ set_ZF();
+ }
+}
+
+
+void tlcs870_device::do_SHLC_A(const uint8_t opbyte0)
+{
+ // SHLC A
+ uint8_t val = get_reg8(REG_A);
+
+ val = handle_SHLC(val);
+
+ set_reg8(REG_A, val);
+}
+
+void tlcs870_device::do_SHRC_A(const uint8_t opbyte0)
+{
+ // SHRC A
+ uint8_t val = get_reg8(REG_A);
+
+ val = handle_SHRC(val);
+
+ set_reg8(REG_A, val);
+}
+
+void tlcs870_device::do_ROLC_A(const uint8_t opbyte0)
+{
+ // ROLC A
+ uint8_t val = get_reg8(REG_A);
+
+ val = handle_ROLC(val);
+
+ set_reg8(REG_A, val);
+}
+
+void tlcs870_device::do_RORC_A(const uint8_t opbyte0)
+{
+ // RORC A
+ uint8_t val = get_reg8(REG_A);
+
+ val = handle_RORC(val);
+
+ set_reg8(REG_A, val);
+}
+
+void tlcs870_device::do_INC_inx(const uint8_t opbyte0)
+{
+ // INC (x)
+ const uint16_t srcaddr = READ8();
+ uint8_t val = RM8(srcaddr);
+
+ val++;
+
+ if (val == 0)
+ {
+ set_ZF();
+ set_JF();
+ }
+ else
+ {
+ clear_ZF();
+ clear_JF();
+ }
+
+ // WRITE
+ WM8(srcaddr, val);
+}
+
+void tlcs870_device::do_INC_inHL(const uint8_t opbyte0)
+{
+ // INC (HL)
+ const uint16_t addr = get_reg16(REG_HL);
+ uint8_t val = RM8(addr);
+
+ val++;
+
+ if (val == 0)
+ {
+ set_ZF();
+ set_JF();
+ }
+ else
+ {
+ clear_ZF();
+ clear_JF();
+ }
+
+ WM8(addr, val);
+}
+
+void tlcs870_device::do_LD_A_inx(const uint8_t opbyte0)
+{
+ // LD A,(x)
+ const uint16_t srcaddr = READ8();
+ const uint8_t val = RM8(srcaddr);
+
+ set_reg8(REG_A, val);
+
+ set_JF();
+
+ if (val == 0x00) set_ZF();
+ else clear_ZF();
+}
+
+void tlcs870_device::do_LD_A_inHL(const uint8_t opbyte0)
+{
+ // LD A,(HL)
+ const uint16_t srcaddr = get_reg16(REG_HL);
+ const uint8_t val = RM8(srcaddr);
+
+ set_reg8(REG_A, val);
+
+ set_JF();
+
+ if (val == 0x00) set_ZF();
+ else clear_ZF();
+}
+
+void tlcs870_device::do_LD_inx_iny(const uint8_t opbyte0)
+{
+ // LD (x),(y)
+ const uint16_t srcaddr = READ8();
+ const uint16_t dstaddr = READ8();
+
+ const uint8_t val = RM8(srcaddr);
+
+ set_JF();
+
+ if (val == 0x00) set_ZF();
+ else clear_ZF();
+
+ WM8(dstaddr, val);
+}
+
+void tlcs870_device::do_DEC_inx(const uint8_t opbyte0)
+{
+ // DEC (x)
+ const uint16_t addr = READ8();
+
+ uint8_t temp = RM8(addr);
+ temp--;
+ WM8(addr, temp);
+
+ if (temp == 0xff)
+ {
+ set_JF();
+ }
+ else
+ {
+ // do we clear?
+ clear_JF();
+ }
+
+ if (temp == 0x00)
+ {
+ set_ZF();
+ }
+ else
+ {
+ set_ZF();
+ }
+}
+
+void tlcs870_device::do_DEC_inHL(const uint8_t opbyte0)
+{
+ // DEC (HL)
+ const uint16_t addr = get_reg16(REG_HL);
+
+ uint8_t temp = RM8(addr);
+ temp--;
+ WM8(addr, temp);
+
+ if (temp == 0xff)
+ {
+ set_JF();
+ }
+ else
+ {
+ // do we clear?
+ clear_JF();
+ }
+
+ if (temp == 0x00)
+ {
+ set_ZF();
+ }
+ else
+ {
+ set_ZF();
+ }
+}
+
+void tlcs870_device::do_LD_inx_A(const uint8_t opbyte0)
+{
+ // LD (x),A
+ const uint16_t dstaddr = READ8();
+ const uint8_t val = get_reg8(REG_A);
+
+ set_JF();
+
+ if (val == 0x00) set_ZF();
+ else clear_ZF();
+
+ WM8(dstaddr, val);
+}
+
+void tlcs870_device::do_LD_inHL_A(const uint8_t opbyte0)
+{
+ // LD (HL),A
+ const uint8_t val = get_reg8(REG_A);
+
+ set_JF();
+
+ const uint16_t addr = get_reg16(REG_HL);
+ WM8(addr, val);
+}
+
+void tlcs870_device::do_LD_inx_n(const uint8_t opbyte0)
+{
+ // LD (x),n
+ const uint16_t dstaddr = READ8();
+ const uint8_t val = READ8();
+
+ set_JF();
+
+ WM8(dstaddr, val);
+}
+
+void tlcs870_device::do_LD_inHL_n(const uint8_t opbyte0)
+{
+ // LD (HL),n
+ const uint8_t val = READ8();
+ const uint16_t addr = get_reg16(REG_HL);
+
+ set_JF();
+
+ WM8(addr, val);
+}
+
+void tlcs870_device::do_CLR_inx(const uint8_t opbyte0)
+{
+ // CLR (x)
+ const uint16_t addr = READ8();
+
+ WM8(addr, 0);
+
+ set_JF();
+}
+
+void tlcs870_device::do_CLR_inHL(const uint8_t opbyte0)
+{
+ // CLR (HL)
+ const uint16_t addr = get_reg16(REG_HL);
+ WM8(addr, 0);
+
+ set_JF();
+}
+
+void tlcs870_device::do_LD_r_n(const uint8_t opbyte0)
+{
+ // LD r,n
+ const uint8_t param1 = opbyte0 & 7;
+ const uint8_t param2 = READ8();
+
+ set_reg8(param1, param2);
+
+ set_JF();
+}
+
+void tlcs870_device::do_SET_inxbit(const uint8_t opbyte0)
+{
+ // SET (x).b
+ // 0100 0bbb xxxx xxxx
+
+ // (opbyte0 == 0x40) && (opval == 0x3a) is EI
+ const uint8_t srcaddr = READ8();
+
+ uint8_t val = RM8(srcaddr);
+ const uint8_t bitpos = opbyte0 & 0x7;
+
+ const int bitused = (1 << bitpos);
+
+ if (val & bitused) // Zero flag gets set based on original value of bit?
+ {
+ clear_ZF();
+ clear_JF(); // 'Z' (so copy Z flag?)
+ }
+ else
+ {
+ set_ZF();
+ set_JF(); // 'Z'
+ }
+
+ val |= bitused;
+
+ WM8(srcaddr, val);
+}
+
+void tlcs870_device::do_CLR_inxbit(const uint8_t opbyte0)
+{
+ // CLR (x).b
+ // 0100 1bbb xxxx xxxx
+
+ // (opbyte0 == 0x48) && (opval == 0x3a) is DI
+ const uint8_t srcaddr = READ8();
+
+ uint8_t val = RM8(srcaddr);
+ const uint8_t bitpos = opbyte0 & 0x7;
+
+ const int bitused = (1 << bitpos);
+
+ if (val & bitused) // Zero flag gets set based on original value of bit?
+ {
+ clear_ZF();
+ clear_JF(); // 'Z' (so copy Z flag?)
+ }
+ else
+ {
+ set_ZF();
+ set_JF(); // 'Z'
+ }
+
+ val &= ~bitused;
+
+ WM8(srcaddr, val);
+}
+
+void tlcs870_device::do_LD_A_r(const uint8_t opbyte0)
+{
+ // LD A,r
+ // 0101 0rrr
+ const uint8_t val = get_reg8(opbyte0 & 0x7);
+ set_reg8(REG_A, val);
+
+ set_JF();
+
+ if (val == 0x00) set_ZF();
+ else clear_ZF();
+}
+
+void tlcs870_device::do_LD_r_A(const uint8_t opbyte0)
+{
+ // LD r,A
+ // 0101 1rrr
+ const uint8_t val = get_reg8(REG_A);
+ set_reg8(opbyte0 & 0x7, val);
+
+ set_JF();
+
+ if (val == 0x00) set_ZF();
+ else clear_ZF();
+}
+
+void tlcs870_device::do_INC_r(const uint8_t opbyte0)
+{
+ // INC r
+ const int reg = opbyte0 & 7;
+ uint8_t temp = get_reg8(reg);
+ temp++;
+ set_reg8(reg, temp);
+
+ if (temp == 0x00)
+ {
+ set_ZF();
+ set_JF();
+ }
+ else
+ {
+ // do we clear?
+ clear_ZF();
+ clear_JF();
+ }
+}
+
+void tlcs870_device::do_DEC_r(const uint8_t opbyte0)
+{
+ // DEC r
+ const int reg = opbyte0 & 7;
+ uint8_t temp = get_reg8(reg);
+ temp--;
+ set_reg8(reg, temp);
+
+ if (temp == 0xff)
+ {
+ set_JF();
+ }
+ else
+ {
+ // do we clear?
+ clear_JF();
+ }
+
+ if (temp == 0x00)
+ {
+ set_ZF();
+ }
+ else
+ {
+ set_ZF();
+ }
+}
+
+void tlcs870_device::do_JRS_T_a(const uint8_t opbyte0)
+{
+ // JRS T,a
+ const int param1 = 6;
+
+ int val = opbyte0 & 0x1f;
+ if (val & 0x10) val -= 0x20;
+
+ const bool takejump = check_jump_condition(param1);
+
+ if (takejump)
+ {
+ m_addr = m_tmppc + 2 + val;
+ set_JF();
+ }
+}
+
+void tlcs870_device::do_JRS_F_a(const uint8_t opbyte0)
+{
+ // JRS F,a
+ const int param1 = 7;
+
+ int val = opbyte0 & 0x1f;
+ if (val & 0x10) val -= 0x20;
+
+ const bool takejump = check_jump_condition(param1);
+
+ if (takejump)
+ {
+ m_addr = m_tmppc + 2 + val;
+ set_JF();
+ }
+}
+
+void tlcs870_device::do_CALLV_n(const uint8_t opbyte0)
+{
+ // CALLV n
+ const uint16_t addr = 0xffc0 + ((opbyte0 & 0xf) * 2);
+
+ WM16(m_sp.d - 1, m_addr);
+ m_sp.d -= 2;
+
+ m_addr = addr;
+}
+
+void tlcs870_device::do_JR_cc_a(const uint8_t opbyte0)
+{
+ // JR cc,a
+ const int param1 = opbyte0 & 0x7;
+
+ int val = READ8();
+ if (val & 0x80) val -= 0x100;
+
+ bool takejump = check_jump_condition(param1);
+
+ if (takejump)
+ {
+ m_addr = m_tmppc + 2 + val;
+ set_JF();
+ }
+}
+
+void tlcs870_device::do_LD_CF_inxbit(const uint8_t opbyte0)
+{
+ // LD CF, (x).b aka TEST (x).b
+ const uint16_t srcaddr = READ8();
+ const uint8_t val = RM8(srcaddr);
+ const uint8_t bitpos = opbyte0 & 0x7;
+
+ const int bitused = (1 << bitpos);
+
+ uint8_t bit = val & bitused;
+
+ bit ? set_CF() : clear_CF();
+ // for this optype of operation ( LD CF, *.b ) the Jump Flag always ends up the inverse of the Carry Flag
+ bit ? clear_JF() : set_JF();
+}
+
+void tlcs870_device::do_LD_SP_mn(const uint8_t opbyte0)
+{
+ // LD SP,mn
+ // Flags / Cycles 1--- / 3
+ const uint16_t param = READ16();
+ m_sp.d = param;
+ set_JF();
+}
+
+void tlcs870_device::do_JR_a(const uint8_t opbyte0)
+{
+ // JR a
+ int val = READ8();
+ if (val & 0x80) val -= 0x100;
+
+ m_addr = m_tmppc + 2 + val;;
+
+ set_JF();
+}
+
+void tlcs870_device::do_CALL_mn(const uint8_t opbyte0)
+{
+ // CALL mn
+ const uint16_t addr = READ16();
+
+ WM16(m_sp.d - 1, m_addr);
+ m_sp.d -= 2;
+
+ m_addr = addr;
+}
+
+void tlcs870_device::do_CALLP_n(const uint8_t opbyte0)
+{
+ // CALLP n
+ const uint16_t addr = READ8() + 0xff00;
+
+ WM16(m_sp.d - 1, m_addr);
+ m_sp.d -= 2;
+
+ m_addr = addr;
+}
+
+void tlcs870_device::do_JP_mn(const uint8_t opbyte0)
+{
+ // JP mn
+ const int param2 = READ16();
+ m_addr = param2;
+ set_JF();
+}
+
+void tlcs870_device::do_ff_opcode(const uint8_t opbyte0)
+{
+ // SWI
+ handle_take_interrupt(0x0e);
+}
+
+/**********************************************************************************************************************/
+// ALU Operations
+/**********************************************************************************************************************/
+
+void tlcs870_device::do_ALUOP_A_n(const uint8_t opbyte0)
+{
+ // (ALU OP) A,n
+ // 0111 0000 nnnn nnnn ADDC A,n
+ // 0111 0001 nnnn nnnn ADD A,n
+
+ const int aluop = (opbyte0 & 0x7);
+ const uint8_t val = READ8();
+
+ const uint8_t result = do_alu(aluop, get_reg8(REG_A), val);
+
+ if (aluop != 0x07) // CMP doesn't write back
+ {
+ set_reg8(REG_A, result);
+ }
+}
+
+void tlcs870_device::do_ALUOP_A_inx(const uint8_t opbyte0)
+{
+ // (ALU OP) A,(x)
+ // 0111 1000 nnnn nnnn ADDC A,(x)
+ // 0111 1001 nnnn nnnn ADD A,(x)
+
+ const int aluop = (opbyte0 & 0x7);
+ const uint16_t addr = READ8();
+ const uint8_t val = RM8(addr);
+
+ const uint8_t result = do_alu(aluop, get_reg8(REG_A), val);
+
+ if (aluop != 0x07) // CMP doesn't write back
+ {
+ set_reg8(REG_A, result);
+ }
+}
+
+/**********************************************************************************************************************/
+// 16-bit loads
+/**********************************************************************************************************************/
+
+void tlcs870_device::do_LDW_inx_mn(const uint8_t opbyte0)
+{
+ // LDW (x),mn
+ const uint16_t dstaddr = READ8();
+
+ const uint16_t val = READ16();
+
+ WM16(dstaddr, val);
+
+ set_JF(); // only JF changes
+}
+
+void tlcs870_device::do_LDW_inHL_mn(const uint8_t opbyte0)
+{
+ // LDW (HL),mn
+ // m_op = LDW;
+ const uint16_t dstaddr = get_reg16(REG_HL);
+
+ const uint16_t val = READ16();
+
+ WM16(dstaddr, val);
+
+ set_JF(); // only JF changes
+}
diff --git a/src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp b/src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp
new file mode 100644
index 00000000000..6eee0ff72bc
--- /dev/null
+++ b/src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp
@@ -0,0 +1,127 @@
+// license:BSD-3-Clause
+// copyright-holders:David Haywood
+/*************************************************************************************************************
+
+ Toshiba TLCS-870 Series MCUs
+
+ (dst) prefix ops (f0 to f7 subtable)
+
+ (dst) address depends on the first byte of the opcode
+
+ F0 (x)
+ F1 invalid (would be (PC+A) based on the src table, check for undefined behavior?)
+ F2 (DE)
+ F3 (HL)
+ F4 (HL+d)
+ F5 invalid (would be (HL+) based on the src table, check for undefined behavior?)
+ F6 (-HL)
+
+ note, in cases where the address is an immediate value, not a register (x) and (HL+d) the
+ immediate value is directly after the first byte of the opcode
+
+*************************************************************************************************************/
+
+#include "emu.h"
+#include "tlcs870.h"
+#include "tlcs870d.h"
+#include "debugger.h"
+
+// Main dispatch handlers for these
+
+void tlcs870_device::do_f0_opcode(const uint8_t opbyte0)
+{
+ // 1111 0000 xxxx xxxx 0101 0rrr
+ // destination memory prefix (dst)
+ const uint16_t dstaddr = get_addr((opbyte0 & 0x7), READ8());
+ do_f0_to_f7_opcode(opbyte0, dstaddr);
+}
+
+void tlcs870_device::do_f2_to_f3_opcode(const uint8_t opbyte0)
+{
+ // 0xf2: 1111 001p 0101 0rrr
+ // 0xf3: 1111 001p 0101 0rrr
+ // destination memory prefix (dst)
+ const uint16_t dstaddr = get_addr((opbyte0 & 0x7), 0);
+ do_f0_to_f7_opcode(opbyte0, dstaddr);
+}
+
+
+void tlcs870_device::do_f4_opcode(const uint8_t opbyte0)
+{
+ // 0xf4: 1111 0100 dddd dddd 0101 0rrr
+ // destination memory prefix (dst)
+ const uint16_t dstaddr = get_addr((opbyte0 & 0x7), READ8());
+ do_f0_to_f7_opcode(opbyte0, dstaddr);
+}
+
+void tlcs870_device::do_f6_to_f7_opcode(const uint8_t opbyte0)
+{
+ // 0xf6: 1110 0110 0101 0rrr
+ // 0xf7: 1111 0111 0101 0rrr
+ // destination memory prefix (dst)
+ const uint16_t dstaddr = get_addr((opbyte0 & 0x7), 0);
+ do_f0_to_f7_opcode(opbyte0, dstaddr);
+}
+
+// f0 - f7 use this table
+// note, same table is shown as above in manual, there's no overlap between src/dest, but they're not compatible
+void tlcs870_device::do_f0_to_f7_opcode(const uint8_t opbyte0, const uint16_t dstaddr)
+{
+ const uint8_t opbyte1 = READ8();
+
+ switch (opbyte1)
+ {
+ case 0x10: case 0x11: case 0x12: case 0x13:
+ do_LD_indst_rr(opbyte0, opbyte1, dstaddr); break;
+ case 0x2c:
+ do_LD_indst_n(opbyte0, opbyte1, dstaddr); break;
+ case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
+ do_LD_indst_r(opbyte0, opbyte1, dstaddr); break;
+ default:
+ do_f0_to_f7_oprand_illegal_opcode(opbyte0, opbyte1, dstaddr); break;
+ }
+}
+
+// Actual handlers
+
+/**********************************************************************************************************************/
+// (16-bit)
+/**********************************************************************************************************************/
+
+void tlcs870_device::do_LD_indst_rr(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t dstaddr)
+{
+ // LD (dst),rr
+ // (dst) can only be (x) (pp) or (HL+d) ? not (HL+) or (-HL) ?
+ const uint16_t val = get_reg16(opbyte1 & 0x3);
+ WM16(dstaddr, val);
+
+ set_JF();
+}
+
+/**********************************************************************************************************************/
+// (8-bit)
+/**********************************************************************************************************************/
+
+void tlcs870_device::do_LD_indst_n(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t dstaddr)
+{
+ // LD (dst),n
+ // (dst) can only be (DE), (HL+), (-HL), or (HL+d) because (x) and (HL) are redundant encodings?
+ const uint16_t n = READ8();
+ WM8(dstaddr, n);
+
+ set_JF();
+}
+
+void tlcs870_device::do_LD_indst_r(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t dstaddr)
+{
+ // LD (dst),r
+ const uint8_t reg = get_reg8(opbyte1 & 0x7);
+ WM8(dstaddr, reg);
+
+ set_JF();
+}
+
+void tlcs870_device::do_f0_to_f7_oprand_illegal_opcode(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t dstaddr)
+{
+ logerror("illegal dst prefix opcode %02x %02x (dst addr %04x)\n", opbyte0, opbyte1, dstaddr);
+}
diff --git a/src/devices/cpu/tlcs870/tlcs870_ops_helper.cpp b/src/devices/cpu/tlcs870/tlcs870_ops_helper.cpp
new file mode 100644
index 00000000000..e2a11b57661
--- /dev/null
+++ b/src/devices/cpu/tlcs870/tlcs870_ops_helper.cpp
@@ -0,0 +1,500 @@
+// license:BSD-3-Clause
+// copyright-holders:David Haywood
+/*************************************************************************************************************
+
+ Toshiba TLCS-870 Series MCUs
+
+*************************************************************************************************************/
+
+#include "emu.h"
+#include "tlcs870.h"
+#include "tlcs870d.h"
+#include "debugger.h"
+
+
+// General Helpers
+
+const uint8_t tlcs870_device::get_reg8(const int reg)
+{
+ return m_intram[((m_RBS & 0xf) * 8) + (reg & 0x7)];
+}
+
+void tlcs870_device::set_reg8(const int reg, uint8_t val)
+{
+ m_intram[((m_RBS & 0xf) * 8) + (reg & 0x7)] = val;
+}
+
+const uint16_t tlcs870_device::get_reg16(const int reg)
+{
+ uint16_t res = 0;
+ res |= get_reg8(((reg & 0x3) * 2) + 1) << 8;
+ res |= get_reg8(((reg & 0x3) * 2) + 0) << 0;
+ return res;
+}
+
+void tlcs870_device::set_reg16(const int reg, uint16_t val)
+{
+ set_reg8(((reg & 0x3) * 2) + 1, (val & 0xff00) >> 8);
+ set_reg8(((reg & 0x3) * 2) + 0, (val & 0x00ff) >> 0);
+}
+
+const uint8_t tlcs870_device::get_PSW()
+{
+ return (m_F & 0xf0) | (m_RBS & 0x0f);
+}
+
+void tlcs870_device::set_PSW(uint8_t data)
+{
+ // used by the push/pop opcodes, flags can't be written by memory access
+ m_F = data & 0xf0;
+ m_RBS = data & 0xf0;
+}
+
+void tlcs870_device::handle_div(const int reg)
+{
+ const uint16_t temp16 = get_reg16(reg);
+ const uint8_t temp8 = get_reg8(REG_C);
+
+ if (!temp8)
+ {
+ // divide by zero
+ set_CF();
+ // does the ZF change too?
+ }
+ else
+ {
+ const uint16_t tempres16 = temp16 / temp8;
+ const uint8_t tempres8 = temp16 % temp8;
+
+ const uint16_t tempfull = (tempres8 << 8) | (tempres16 & 0x00ff);
+
+ set_reg16(reg, tempfull);
+
+ if (tempres16 & 0xff00)
+ {
+ // result is also 'undefined' in this case
+ set_CF();
+ }
+ else
+ {
+ clear_CF();
+ }
+
+ if (!tempres8)
+ {
+ set_ZF();
+ set_JF();
+ }
+ else
+ {
+ clear_ZF();
+ clear_JF();
+ }
+ }
+}
+
+void tlcs870_device::handle_mul(const int reg)
+{
+ const uint16_t temp16 = get_reg16(reg);
+ const uint16_t tempres = (temp16 & 0xff) * ((temp16 & 0xff00) >> 8);
+ set_reg16(reg, temp16);
+
+ if (!(tempres & 0xff00))
+ {
+ set_ZF();
+ set_JF();
+ }
+ else
+ {
+ clear_ZF();
+ clear_JF();
+ }
+}
+
+void tlcs870_device::handle_swap(const int reg)
+{
+ uint8_t temp = get_reg8(reg);
+ temp = ((temp & 0x0f) << 4) | ((temp & 0xf0) >> 4);
+ set_reg8(reg, temp);
+
+ set_JF();
+}
+
+
+uint16_t tlcs870_device::get_addr(uint16_t opbyte0, uint16_t val)
+{
+ uint16_t addr = 0x0000;
+
+ switch (opbyte0)
+ {
+ case ADDR_IN_IMM_X:
+ addr = val;
+ break;
+ case ADDR_IN_PC_PLUS_REG_A:
+ addr = m_tmppc + 2 + get_reg8(REG_A);
+ break;
+ case ADDR_IN_DE:
+ addr = get_reg16(REG_DE);
+ break;
+ case ADDR_IN_HL:
+ addr = get_reg16(REG_HL);
+ break;
+ case ADDR_IN_HL_PLUS_IMM_D:
+ addr = get_reg16(REG_HL) + val;
+ break;
+ case ADDR_IN_HL_PLUS_REG_C:
+ addr = get_reg16(REG_HL) + get_reg8(REG_C);
+ break;
+ case ADDR_IN_HLINC:
+ {
+ uint16_t tmpHL = get_reg16(REG_HL);
+ addr = tmpHL;
+ tmpHL++;
+ set_reg16(REG_HL, tmpHL);
+ break;
+ }
+ case ADDR_IN_DECHL:
+ {
+ uint16_t tmpHL = get_reg16(REG_HL);
+ tmpHL--;
+ set_reg16(REG_HL, tmpHL);
+ addr = tmpHL;
+ break;
+ }
+ }
+
+ return addr;
+}
+
+const bool tlcs870_device::check_jump_condition(int param1)
+{
+ bool takejump = true;
+
+ switch (param1)
+ {
+ case COND_EQ_Z:
+ if (is_ZF() == 1) takejump = true;
+ else takejump = false;
+ break;
+
+ case COND_NE_NZ:
+ if (is_ZF() == 0) takejump = true;
+ else takejump = false;
+ break;
+
+ case COND_LT_CS:
+ if (is_CF() == 1) takejump = true;
+ else takejump = false;
+ break;
+
+ case COND_GE_CC:
+ if (is_CF() == 0) takejump = true;
+ else takejump = false;
+ break;
+
+ case COND_LE:
+ if ((is_CF() || is_ZF()) == 1) takejump = true;
+ else takejump = false;
+ break;
+
+ case COND_GT:
+ if ((is_CF() || is_ZF()) == 0) takejump = true;
+ else takejump = false;
+ break;
+
+ case COND_T:
+ if (is_JF() == 1) takejump = true;
+ else takejump = false;
+ break;
+
+ case COND_F:
+ if (is_JF() == 0) takejump = true;
+ else takejump = false;
+ break;
+ }
+
+ return takejump;
+}
+
+
+uint16_t tlcs870_device::do_alu(int op, uint16_t param1, uint16_t param2)
+{
+ uint16_t result = 0x00;
+
+ // TODO: flags
+ switch (op)
+ {
+ case 0x0: // ADDC
+ result = param1 + param2;
+ result += is_CF();
+ break;
+
+ case 0x1: // ADD
+ result = param1 + param2;
+ break;
+
+ case 0x2: // SUBB
+ result = param1 - param2;
+ result -= is_CF();
+ break;
+
+ case 0x3: // SUB
+ result = param1 - param2;
+ break;
+
+ case 0x4: // AND
+ result = param1 & param2;
+ break;
+
+ case 0x5: // XOR
+ result = param1 ^ param2;
+ break;
+
+ case 0x6: // OR
+ result = param1 | param2;
+ break;
+
+ case 0x7: // CMP
+ if (param1 < param2)
+ {
+ set_CF();
+ }
+ else
+ {
+ clear_CF();
+ }
+ break;
+
+ }
+
+ return result;
+}
+
+
+uint8_t tlcs870_device::handle_SHLC(uint8_t val)
+{
+ if (val & 0x80)
+ {
+ set_CF();
+ }
+ else
+ {
+ clear_CF();
+ }
+
+ val = (val << 1);
+
+ // JF gets set to CF
+ if (is_CF())
+ {
+ set_JF();
+ }
+ else
+ {
+ clear_JF();
+ }
+
+ if (val == 0)
+ {
+ set_ZF();
+ }
+ else
+ {
+ clear_ZF();
+ }
+
+ return val;
+}
+
+
+uint8_t tlcs870_device::handle_SHRC(uint8_t val)
+{
+ if (val & 0x01)
+ {
+ set_CF();
+ }
+ else
+ {
+ clear_CF();
+ }
+
+ val = (val >> 1);
+
+ // JF gets set to CF
+ if (is_CF())
+ {
+ set_JF();
+ }
+ else
+ {
+ clear_JF();
+ }
+
+ if (val == 0)
+ {
+ set_ZF();
+ }
+ else
+ {
+ clear_ZF();
+ }
+
+ return val;
+}
+
+uint8_t tlcs870_device::handle_DAS(uint8_t val)
+{
+ if (((val & 0x0f) > 9) || (is_HF() == 1))
+ {
+ val = val - 0x06;
+ set_HF();
+ }
+ else
+ {
+ clear_HF();
+ }
+
+ if ((val > 0x9f) || (is_CF() == 1))
+ {
+ val = val - 0x60;
+ set_CF();
+ }
+ else
+ {
+ clear_CF();
+ }
+
+ return val;
+}
+
+uint8_t tlcs870_device::handle_DAA(uint8_t val)
+{
+ if (((val & 0x0f) > 9) || (is_HF() == 1))
+ {
+ val = val + 0x06;
+ set_HF();
+ }
+ else
+ {
+ clear_HF();
+ }
+
+ if ((val > 0x9f) || (is_CF() == 1))
+ {
+ val = val + 0x60;
+ set_CF();
+ }
+ else
+ {
+ clear_CF();
+ }
+
+ return val;
+}
+
+uint8_t tlcs870_device::handle_ROLC(uint8_t val)
+{
+ const int tempcarry = is_CF();
+
+ if (val & 0x80)
+ {
+ set_CF();
+ }
+ else
+ {
+ clear_CF();
+ }
+
+ val = (val << 1) | tempcarry;
+
+ // JF gets set to CF
+ if (is_CF())
+ {
+ set_JF();
+ }
+ else
+ {
+ clear_JF();
+ }
+
+ if (val == 0)
+ {
+ set_ZF();
+ }
+ else
+ {
+ clear_ZF();
+ }
+
+ return val;
+}
+
+uint8_t tlcs870_device::handle_RORC(uint8_t val)
+{
+ const int tempcarry = (is_CF()) << 7;
+
+ if (val & 0x01)
+ {
+ set_CF();
+ }
+ else
+ {
+ clear_CF();
+ }
+
+ val = (val >> 1) | tempcarry;
+
+ // JF gets set to CF
+ if (is_CF())
+ {
+ set_JF();
+ }
+ else
+ {
+ clear_JF();
+ }
+
+ if (val == 0)
+ {
+ set_ZF();
+ }
+ else
+ {
+ clear_ZF();
+ }
+
+ return val;
+}
+
+/*
+
+(Priority Low - 15)
+FFE0 INT5 (External Interrupt 5)
+FFE2 INTTC2 (16-bit TC2 Interrupt)
+FFE4 INTSIO2 (Serial Interface 2 Interrupt)
+FFE6 INT4 (External Interrupt 4)
+FFE8 INT3 (External Interrupt 3)
+FFEA INTTC4 (8-bit TC4 Interrupt)
+FFEC INTSIO1 (Serial Interface 1 Interrupt)
+FFEE INTTC3 (8-bit TC3 Interrupt)
+FFF0 INT2 (External Interrupt 2)
+FFF2 INTTBT (Time Base Timer Interrupt)
+FFF4 INT1 (External Interrupt 1)
+FFF6 INTTC1 (16-bit TC1 Interrupt)
+FFF8 INT0 (External Interrupt 0)
+FFFA INTWDT (Watchdog Timer Interrupt)
+FFFC INTSW (Software Interrupt)
+FFFE RESET (Reset Vector)
+(Priority High - 0)
+
+*/
+
+void tlcs870_device::handle_take_interrupt(int level)
+{
+ WM8(m_sp.d - 1, get_PSW());
+ WM16(m_sp.d - 2, m_addr);
+ m_sp.d -= 3;
+
+ m_addr = RM16(0xffe0 + ((level &0xf)*2));
+}
+
diff --git a/src/devices/cpu/tlcs870/tlcs870_ops_reg.cpp b/src/devices/cpu/tlcs870/tlcs870_ops_reg.cpp
new file mode 100644
index 00000000000..e9073bc4c49
--- /dev/null
+++ b/src/devices/cpu/tlcs870/tlcs870_ops_reg.cpp
@@ -0,0 +1,760 @@
+// license:BSD-3-Clause
+// copyright-holders:David Haywood
+/*************************************************************************************************************
+
+ Toshiba TLCS-870 Series MCUs
+
+ (reg) prefix ops (e8 to ef subtable)
+
+ (reg) implies one of the follow registers
+
+ (8-bit mode operations)
+ E8 A
+ E9 W
+ EA C
+ EB B
+ EC E
+ ED D
+ EE L
+ EF H
+
+ (16-bit mode operations)
+ E8 invalid
+ E9 invalid
+ EA invalid
+ EB invalid
+ EC WA
+ ED BC
+ EE DE
+ EF HL
+
+ (RETN operation - special)
+ E8 RETN
+ E9-EF invalid
+
+*************************************************************************************************************/
+
+#include "emu.h"
+#include "tlcs870.h"
+#include "tlcs870d.h"
+#include "debugger.h"
+
+// Main dispatch handlers for these
+
+void tlcs870_device::do_regprefixtype_opcode(const uint8_t opbyte0)
+{
+ // register prefix: g/gg
+ uint8_t opbyte1 = READ8();
+
+ switch (opbyte1)
+ {
+ case 0x01:
+ do_SWAP_g(opbyte0, opbyte1); break;
+ case 0x02:
+ do_MUL_gg(opbyte0, opbyte1); break;
+ case 0x03:
+ do_DIV_gg_C(opbyte0, opbyte1); break;
+ case 0x04:
+ do_RETN(opbyte0, opbyte1); break;
+ case 0x06:
+ do_POP_gg(opbyte0, opbyte1); break;
+ case 0x07:
+ do_PUSH_gg(opbyte0, opbyte1); break;
+ case 0x0a:
+ do_DAA_g(opbyte0, opbyte1); break;
+ case 0x0b:
+ do_DAS_g(opbyte0, opbyte1); break;
+ case 0x10: case 0x11: case 0x12: case 0x13:
+ do_XCH_rr_gg(opbyte0, opbyte1); break;
+ case 0x14: case 0x15: case 0x16: case 0x17:
+ do_LD_rr_gg(opbyte0, opbyte1); break;
+ case 0x1c:
+ do_SHLC_g(opbyte0, opbyte1); break;
+ case 0x1d:
+ do_SHRC_g(opbyte0, opbyte1); break;
+ case 0x1e:
+ do_ROLC_g(opbyte0, opbyte1); break;
+ case 0x1f:
+ do_RORC_g(opbyte0, opbyte1); break;
+ case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
+ do_ALUOP_WA_gg(opbyte0, opbyte1); break;
+ case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f:
+ do_ALUOP_gg_mn(opbyte0, opbyte1); break;
+ case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
+ do_SET_gbit(opbyte0, opbyte1); break;
+ case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
+ do_CLR_gbit(opbyte0, opbyte1); break;
+ case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
+ do_LD_r_g(opbyte0, opbyte1); break;
+ case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
+ do_ALUOP_A_g(opbyte0, opbyte1); break;
+ case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f:
+ do_ALUOP_g_A(opbyte0, opbyte1); break;
+ case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
+ do_ALUOP_g_n(opbyte0, opbyte1); break;
+ case 0x82: case 0x83:
+ do_SET_inppbit(opbyte0, opbyte1); break;
+ case 0x8a: case 0x8b:
+ do_CLR_inppbit(opbyte0, opbyte1); break;
+ case 0x92: case 0x93:
+ do_CPL_inppbit(opbyte0, opbyte1); break;
+ case 0x9a: case 0x9b:
+ do_LD_inppbit_CF(opbyte0, opbyte1); break;
+ case 0x9e: case 0x9f:
+ do_LD_CF_inppbit(opbyte0, opbyte1); break;
+ case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
+ do_XCH_r_g(opbyte0, opbyte1); break;
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
+ do_CPL_gbit(opbyte0, opbyte1); break;
+ case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
+ do_LD_gbit_CF(opbyte0, opbyte1); break;
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ do_XOR_CF_gbit(opbyte0, opbyte1); break;
+ case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf:
+ do_LD_CF_gbit(opbyte0, opbyte1); break;
+ case 0xfa:
+ do_LD_SP_gg(opbyte0, opbyte1); break;
+ case 0xfb:
+ do_LD_gg_SP(opbyte0, opbyte1); break;
+ case 0xfc:
+ do_CALL_gg(opbyte0, opbyte1); break;
+ case 0xfe:
+ do_JP_gg(opbyte0, opbyte1); break;
+
+ default:
+ do_regprefixtype_oprand_illegal(opbyte0, opbyte1); break;
+ }
+}
+
+// Actual handlers
+
+/**********************************************************************************************************************/
+// (Special)
+/**********************************************************************************************************************/
+
+void tlcs870_device::do_regprefixtype_oprand_illegal(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ logerror("illegal reg prefix opcode %02x %02x\n", opbyte0, opbyte1);
+}
+
+
+void tlcs870_device::do_RETN(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // with E8 only
+ if (opbyte0 == 0xe8)
+ {
+ // RETN
+ // Return from non-maskable interrupt service (how does this differ from RETI?)
+ m_sp.d += 3;
+ m_addr = RM16(m_sp.d - 2);
+ set_PSW(RM8(m_sp.d - 1));
+ }
+ else
+ {
+ do_regprefixtype_oprand_illegal(opbyte0, opbyte1);
+ }
+}
+
+/**********************************************************************************************************************/
+// (8-bit)
+/**********************************************************************************************************************/
+
+void tlcs870_device::do_SWAP_g(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // SWAP g
+ const uint8_t reg = opbyte0 & 0x7;
+ handle_swap(reg);
+}
+
+void tlcs870_device::do_DAA_g(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // DAA g
+ // 1110 1ggg 0000 1010
+ uint8_t val = get_reg8(opbyte0 & 0x7);
+
+ val = handle_DAA(val);
+
+ set_reg8(opbyte0 & 0x7, val);
+}
+
+
+void tlcs870_device::do_DAS_g(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // DAS g
+ // 1110 1ggg 0000 1011
+ uint8_t val = get_reg8(opbyte0 & 0x7);
+
+ val = handle_DAS(val);
+
+ set_reg8(opbyte0 & 0x7, val);
+}
+
+
+void tlcs870_device::do_SHLC_g(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // SHLC g
+ // Logical Shift Left with Carry Flag
+ uint8_t val = get_reg8(opbyte0 & 0x7);
+
+ val = handle_SHLC(val);
+
+ set_reg8(opbyte0 & 0x7, val);
+}
+
+void tlcs870_device::do_SHRC_g(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // SHRC g
+ // Logical Shift Right with Carry Flag
+
+ uint8_t val = get_reg8(opbyte0 & 0x7);
+
+ val = handle_SHRC(val);
+
+ set_reg8(opbyte0 & 0x7, val);
+}
+
+void tlcs870_device::do_ROLC_g(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // ROLC g
+ // Rotate Left through Carry flag
+ uint8_t val = get_reg8(opbyte0 & 0x7);
+
+ val = handle_ROLC(val);
+
+ set_reg8(opbyte0 & 0x7, val);
+
+}
+
+void tlcs870_device::do_RORC_g(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // RORC g
+ // Rotate Right through Carry flag
+ uint8_t val = get_reg8(opbyte0 & 0x7);
+
+ val = handle_RORC(val);
+
+ set_reg8(opbyte0 & 0x7, val);
+}
+
+
+void tlcs870_device::do_LD_r_g(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // LD r,g
+ // 1110 1ggg 0101 1rrr
+ const uint8_t val = get_reg8(opbyte0 & 0x7);
+ set_reg8(opbyte1 & 0x7, val);
+
+ set_JF();
+
+ if (val == 0x00) set_ZF();
+ else clear_ZF();
+}
+
+void tlcs870_device::do_XCH_r_g(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // XCH r,g
+ // 1110 1ggg 1010 1rrr
+ const uint8_t val = get_reg8(opbyte0 & 0x7);
+ const uint8_t r = get_reg8(opbyte1 & 0x7);
+
+ set_reg8(opbyte1 & 0x7, val);
+ set_reg8(opbyte0 & 0x7, r);
+
+ set_JF();
+
+ if (val == 0x00) set_ZF();
+ else clear_ZF();
+}
+
+/**********************************************************************************************************************/
+// (ALU handlers)
+/**********************************************************************************************************************/
+
+void tlcs870_device::do_ALUOP_A_g(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // (ALU OP) A,g
+ /*
+ 1110 1ggg 0110 0000 ADDC A,g
+ 1110 1ggg 0110 0001 ADD A,g
+ 1110 1ggg 0110 0010 SUBB A,g
+ 1110 1ggg 0110 0011 SUB A,g
+ 1110 1ggg 0110 0100 AND A,g
+ 1110 1ggg 0110 0101 XOR A,g
+ 1110 1ggg 0110 0110 OR A,g
+ 1110 1ggg 0110 0111 CMP A,g
+ */
+
+ const int aluop = (opbyte1 & 0x7);
+
+ const uint8_t result = do_alu(aluop, get_reg8(REG_A), get_reg8(opbyte0 & 0x7));
+
+ if (aluop != 0x07) // CMP doesn't write back
+ {
+ set_reg8(REG_A, result);
+ }
+}
+
+void tlcs870_device::do_ALUOP_g_A(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // (ALU OP) g,A
+ /*
+ 1110 1ggg 0110 1000 ADDC A,g
+ 1110 1ggg 0110 1001 ADD A,g
+ 1110 1ggg 0110 1010 SUBB A,g
+ 1110 1ggg 0110 1011 SUB A,g
+ 1110 1ggg 0110 1100 AND A,g
+ 1110 1ggg 0110 1101 XOR A,g
+ 1110 1ggg 0110 1110 OR A,g
+ 1110 1ggg 0110 1111 CMP A,g
+ */
+
+ const int aluop = (opbyte1 & 0x7);
+ const uint8_t result = do_alu(aluop, get_reg8(opbyte0 & 0x7), get_reg8(REG_A));
+
+ if (aluop != 0x07) // CMP doesn't write back
+ {
+ set_reg8(opbyte0 & 0x7, result);
+ }
+}
+
+void tlcs870_device::do_ALUOP_g_n(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // (ALU OP) g,n
+ const int aluop = (opbyte1 & 0x7);
+
+ const uint8_t n = READ8();
+
+ const uint8_t result = do_alu(aluop, get_reg8(opbyte0 & 0x7), n);
+
+ if (aluop != 0x07) // CMP doesn't write back
+ {
+ set_reg8(opbyte0 & 0x7, result);
+ }
+}
+
+/**********************************************************************************************************************/
+// (16-bit ALU handlers)
+/**********************************************************************************************************************/
+
+void tlcs870_device::do_ALUOP_WA_gg(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // (ALU OP) WA,gg
+ /*
+ 1110 10gg 0011 0000 ADDC WA,gg
+ 1110 10gg 0011 0001 ADD WA,gg
+ 1110 10gg 0011 0010 SUBB WA,gg
+ 1110 10gg 0011 0011 SUB WA,gg
+ 1110 10gg 0011 0100 AND WA,gg
+ 1110 10gg 0011 0101 XOR WA,gg
+ 1110 10gg 0011 0110 OR WA,gg
+ 1110 10gg 0011 0111 CMP WA,gg
+ */
+
+ const int aluop = (opbyte1 & 0x7);
+
+ const uint16_t result = do_alu(aluop, get_reg16(REG_WA), get_reg16(opbyte0 & 0x3));
+
+ if (aluop != 0x07) // CMP doesn't write back
+ {
+ set_reg16(REG_WA, result);
+ }
+
+}
+
+void tlcs870_device::do_ALUOP_gg_mn(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // (ALU OP) gg,mn
+ const int aluop = (opbyte1 & 0x7);
+
+ const uint16_t mn = READ16();
+
+ const uint16_t result = do_alu(aluop, get_reg16(opbyte0 & 0x3), mn);
+
+ if (aluop != 0x07) // CMP doesn't write back
+ {
+ set_reg16(opbyte0 & 0x3, result);
+ }
+}
+
+/**********************************************************************************************************************/
+// bit accesses
+/**********************************************************************************************************************/
+
+// ops using (pp).g
+
+void tlcs870_device::do_SET_inppbit(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // SET (pp).g
+ const uint8_t bitpos = opbyte0 & 7;
+ const uint8_t bitused = 1 << bitpos;
+ const uint16_t addr = get_reg16((opbyte1 & 1) + 2); // DE or HL
+ uint8_t val = RM8(addr);
+
+ if (val & bitused) // Zero flag gets set based on original value of bit?
+ {
+ clear_ZF();
+ clear_JF(); // 'Z' (so copy Z flag?)
+ }
+ else
+ {
+ set_ZF();
+ set_JF(); // 'Z'
+ }
+
+ val |= bitused;
+
+ WM8(addr, val);
+}
+
+void tlcs870_device::do_CLR_inppbit(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // CLR (pp).g
+ const uint8_t bitpos = opbyte0 & 7;
+ const uint8_t bitused = 1 << bitpos;
+ const uint16_t addr = get_reg16((opbyte1 & 1) + 2); // DE or HL
+ uint8_t val = RM8(addr);
+
+ if (val & bitused) // Zero flag gets set based on original value of bit?
+ {
+ clear_ZF();
+ clear_JF(); // 'Z' (so copy Z flag?)
+ }
+ else
+ {
+ set_ZF();
+ set_JF(); // 'Z'
+ }
+
+ val &= ~bitused;
+
+ WM8(addr, val);
+}
+
+void tlcs870_device::do_CPL_inppbit(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // CPL (pp).g
+ const uint8_t bitpos = opbyte0 & 7;
+ const uint8_t bitused = 1 << bitpos;
+ const uint16_t addr = get_reg16((opbyte1 & 1) + 2); // DE or HL
+ uint8_t val = RM8(addr);
+
+ uint8_t bit = val & bitused;
+
+ if (bit) // if the bit is set, clear the zero/jump flags and unset the bit
+ {
+ clear_ZF();
+ clear_JF();
+
+ val &= ~bitused;
+ }
+ else // if the bit isn't set, set the zero/jump flags and set the bit
+ {
+ set_ZF();
+ set_JF();
+
+ val |= bitused;
+ }
+
+ WM8(addr, val);
+}
+
+void tlcs870_device::do_LD_inppbit_CF(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // LD (pp).g,CF
+ const uint8_t bitpos = opbyte0 & 7;
+ const uint8_t bitused = 1 << bitpos;
+ const uint16_t addr = get_reg16((opbyte1 & 1) + 2); // DE or HL
+ uint8_t val = RM8(addr);
+
+ if (is_CF()) // if carry flag is set, set the bit in val
+ {
+ val |= bitused;
+ }
+ else // if carry flag isn't set, clear the bit in val
+ {
+ val &= ~bitused;
+ }
+
+ // for this optype of operation ( LD *.b, CF ) the Jump Flag always ends up being 1
+ set_JF();
+
+ WM8(addr, val);
+
+}
+
+void tlcs870_device::do_LD_CF_inppbit(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // LD CF,(pp).g aka TEST (pp).g
+ // 1110 1ggg 1001 111p
+ const uint8_t bitpos = opbyte0 & 7;
+ const uint8_t bitused = 1 << bitpos;
+ const uint16_t addr = get_reg16((opbyte1 & 1) + 2); // DE or HL
+ const uint8_t val = RM8(addr);
+
+ const uint8_t bit = val & bitused;
+
+ bit ? set_CF() : clear_CF();
+ // for this optype of operation ( LD CF, *.b ) the Jump Flag always ends up the inverse of the Carry Flag
+ bit ? clear_JF() : set_JF();
+}
+
+// ops using g.b
+
+void tlcs870_device::do_SET_gbit(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // SET g.b
+ // 1110 1ggg 0100 0bbb
+ uint8_t val = get_reg8(opbyte0 & 0x7);
+ const uint8_t bitpos = opbyte1 & 0x7;
+
+ const int bitused = (1 << bitpos);
+
+ if (val & bitused) // Zero flag gets set based on original value of bit?
+ {
+ clear_ZF();
+ clear_JF(); // 'Z' (so copy Z flag?)
+ }
+ else
+ {
+ set_ZF();
+ set_JF(); // 'Z'
+ }
+
+ val |= bitused;
+
+ set_reg8(opbyte0 & 0x7, val);
+}
+
+void tlcs870_device::do_CLR_gbit(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // CLR g.b
+ // 1110 1ggg 0100 1bbb
+ uint8_t val = get_reg8(opbyte0 & 0x7);
+ const uint8_t bitpos = opbyte1 & 0x7;
+
+ const int bitused = (1 << bitpos);
+
+ if (val & bitused) // Zero flag gets set based on original value of bit?
+ {
+ clear_ZF();
+ clear_JF(); // 'Z' (so copy Z flag?)
+ }
+ else
+ {
+ set_ZF();
+ set_JF(); // 'Z'
+ }
+
+ val &= ~bitused;
+
+ set_reg8(opbyte0 & 0x7, val);
+}
+
+void tlcs870_device::do_CPL_gbit(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // CPL g.b
+ // 1110 1ggg 1100 0bbb
+ uint8_t val = get_reg8(opbyte0 & 0x7);
+ const uint8_t bitpos = opbyte1 & 0x7;
+
+ const int bitused = (1 << bitpos);
+
+ uint8_t bit = val & bitused;
+
+ if (bit) // if the bit is set, clear the zero/jump flags and unset the bit
+ {
+ clear_ZF();
+ clear_JF();
+
+ val &= ~bitused;
+ }
+ else // if the bit isn't set, set the zero/jump flags and set the bit
+ {
+ set_ZF();
+ set_JF();
+
+ val |= bitused;
+ }
+
+ set_reg8(opbyte0 & 0x7, val);
+}
+
+void tlcs870_device::do_LD_gbit_CF(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // LD g.b,CF
+ // m_op = LD; // Flags / Cycles 1--- / 2
+ //m_flagsaffected |= FLAG_J;
+ uint8_t val = get_reg8(opbyte0 & 0x7);
+ const uint8_t bitpos = opbyte1 & 0x7;
+
+ const int bitused = (1 << bitpos);
+
+ if (is_CF()) // if carry flag is set, set the bit in val
+ {
+ val |= bitused;
+ }
+ else // if carry flag isn't set, clear the bit in val
+ {
+ val &= ~bitused;
+ }
+
+ // for this optype of operation ( LD *.b, CF ) the Jump Flag always ends up being 1
+ set_JF();
+
+ set_reg8(opbyte0 & 0x7, val);
+}
+
+
+void tlcs870_device::do_XOR_CF_gbit(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // XOR CF,g.b
+ const uint8_t bitpos = opbyte1 & 0x7;
+ const uint8_t bitused = 1 << bitpos;
+
+ const uint8_t g = get_reg8(opbyte0 & 0x7);
+
+ const uint8_t bit = g & bitused;
+
+ if (is_CF())
+ {
+ if (bit)
+ {
+ clear_CF();
+ }
+ else
+ {
+ set_CF();
+ }
+ }
+ else
+ {
+ if (bit)
+ {
+ set_CF();
+ }
+ else
+ {
+ clear_CF();
+ }
+ }
+
+ // JF ends up being whatever the new value of CF is
+ if (is_CF())
+ set_JF();
+ else
+ clear_JF();
+}
+
+
+void tlcs870_device::do_LD_CF_gbit(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // LD CF,g.b aka TEST g.b
+ const uint8_t bitpos = opbyte1 & 0x7;
+ const uint8_t bitused = 1 << bitpos;
+
+ const uint8_t g = get_reg8(opbyte0 & 0x7);
+
+ const uint8_t bit = g & bitused;
+
+ bit ? set_CF() : clear_CF();
+ // for this optype of operation ( LD CF, *.b ) the Jump Flag always ends up the inverse of the Carry Flag
+ bit ? clear_JF() : set_JF();
+}
+
+/**********************************************************************************************************************/
+// 16-bit
+/**********************************************************************************************************************/
+
+void tlcs870_device::do_MUL_gg(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // MUL ggH, ggL (odd syntax, basically MUL gg)
+ const uint8_t reg = opbyte0 & 0x3; // opbyte0 & 4 = invalid?
+ handle_mul(reg); // flag changes in handler
+}
+
+void tlcs870_device::do_DIV_gg_C(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // DIV gg,C
+ // (DIV BC,C is presumably an illegal / undefined result)
+ // (DIV WA,C is a redundant encoding)
+ const uint8_t reg = opbyte0 & 0x3; // opbyte0 & 4 = invalid?
+ handle_div(reg); // flag changes in handler
+}
+
+void tlcs870_device::do_POP_gg(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // POP gg
+ m_sp.d += 2;
+ const uint16_t val = RM16(m_sp.d - 1);
+ set_reg16(opbyte0 & 3, val);
+ // no flag changes
+}
+
+void tlcs870_device::do_PUSH_gg(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // PUSH gg
+ const uint16_t val = get_reg16(opbyte0 & 3);
+ WM16(m_sp.d - 1, val);
+ m_sp.d -= 2;
+ // no flag changes
+}
+
+
+void tlcs870_device::do_LD_SP_gg(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // LD SP,gg
+ m_sp.d = get_reg16(opbyte0 & 0x3);
+ set_JF(); // no other flag changes for this type of LD
+}
+
+void tlcs870_device::do_LD_gg_SP(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // LD gg,SP
+ set_reg16(opbyte0 & 0x3, m_sp.d);
+ set_JF(); // no other flag changes for this type of LD
+}
+
+void tlcs870_device::do_LD_rr_gg(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // LD rr,gg
+ const uint16_t gg = get_reg16(opbyte0 & 0x3);
+ set_reg16(opbyte1 & 0x3, gg);
+
+ set_JF(); // no other flag changes for this type of LD
+}
+
+
+void tlcs870_device::do_XCH_rr_gg(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // XCH rr,gg
+ const uint16_t gg = get_reg16(opbyte0 & 0x3);
+ const uint16_t rr = get_reg16(opbyte1 & 0x3);
+
+ set_reg16(opbyte1 & 0x3, gg);
+ set_reg16(opbyte0 & 0x3, rr);
+
+ // flags not done
+}
+
+
+void tlcs870_device::do_CALL_gg(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // CALL gg
+ const uint16_t val = get_reg16(opbyte0 & 3);
+
+ WM16(m_sp.d - 1, m_addr);
+ m_sp.d -= 2;
+
+ m_addr = val;
+
+ // no flag changes on call
+}
+
+void tlcs870_device::do_JP_gg(const uint8_t opbyte0, const uint8_t opbyte1)
+{
+ // JP gg
+ const uint16_t val = get_reg16(opbyte0 & 3);
+
+ m_addr = val;
+ set_JF();
+}
diff --git a/src/devices/cpu/tlcs870/tlcs870_ops_src.cpp b/src/devices/cpu/tlcs870/tlcs870_ops_src.cpp
new file mode 100644
index 00000000000..afb1c0c9ac0
--- /dev/null
+++ b/src/devices/cpu/tlcs870/tlcs870_ops_src.cpp
@@ -0,0 +1,548 @@
+// license:BSD-3-Clause
+// copyright-holders:David Haywood
+/*************************************************************************************************************
+
+ Toshiba TLCS-870 Series MCUs
+
+ (src) prefix ops (e0 to e7 subtable)
+
+ (src) address depends on the first byte of the opcode
+
+ E0 (x)
+ E1 (PC+A)
+ E2 (DE)
+ E3 (HL)
+ E4 (HL+d)
+ E5 (HL+C)
+ E6 (HL+)
+ E7 (-HL)
+
+ note, in cases where the address is an immediate value, not a register (x) and (HL+d) the
+ immediate value is directly after the first byte of the opcode
+
+*************************************************************************************************************/
+
+#include "emu.h"
+#include "tlcs870.h"
+#include "tlcs870d.h"
+#include "debugger.h"
+
+// Main dispatch handlers for these
+
+void tlcs870_device::do_e0_opcode(const uint8_t opbyte0)
+{
+ const uint16_t srcaddr = get_addr((opbyte0 & 0x7), READ8());
+ do_e0_to_e7_opcode(opbyte0, srcaddr);
+}
+
+void tlcs870_device::do_e1_to_e3_opcode(const uint8_t opbyte0)
+{
+ const uint16_t srcaddr = get_addr((opbyte0 & 0x7), 0);
+ do_e0_to_e7_opcode(opbyte0, srcaddr);
+}
+
+void tlcs870_device::do_e4_opcode(const uint8_t opbyte0)
+{
+ const uint16_t srcaddr = get_addr((opbyte0 & 0x7), READ8());
+ do_e0_to_e7_opcode(opbyte0, srcaddr);
+}
+
+void tlcs870_device::do_e5_to_e7_opcode(const uint8_t opbyte0)
+{
+ const uint16_t srcaddr = get_addr((opbyte0 & 0x7), 0);
+ do_e0_to_e7_opcode(opbyte0, srcaddr);
+}
+
+// e0 - e7 use this table
+void tlcs870_device::do_e0_to_e7_opcode(uint8_t opbyte0, uint16_t srcaddr)
+{
+ const uint8_t opbyte1 = READ8();
+
+ switch (opbyte1)
+ {
+ case 0x08:
+ do_ROLD_A_insrc(opbyte0, opbyte1, srcaddr); break;
+ case 0x09:
+ do_RORD_A_insrc(opbyte0, opbyte1, srcaddr); break;
+ case 0x14: case 0x15: case 0x16: case 0x17:
+ do_LD_rr_insrc(opbyte0, opbyte1, srcaddr); break;
+ case 0x20:
+ do_INC_insrc(opbyte0, opbyte1, srcaddr); break;
+ case 0x26:
+ do_LD_inx_insrc(opbyte0, opbyte1, srcaddr); break;
+ case 0x27:
+ do_LD_inHL_insrc(opbyte0, opbyte1, srcaddr); break;
+ case 0x28:
+ do_DEC_insrc(opbyte0, opbyte1, srcaddr); break;
+ case 0x2f:
+ do_MCMP_insrc_n(opbyte0, opbyte1, srcaddr); break;
+ case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
+ do_SET_insrcbit(opbyte0, opbyte1, srcaddr); break;
+ case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
+ do_CLR_insrcbit(opbyte0, opbyte1, srcaddr); break;
+ case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
+ do_LD_r_insrc(opbyte0, opbyte1, srcaddr); break;
+ case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
+ do_ALUOP_insrc_inHL(opbyte0, opbyte1, srcaddr); break;
+ case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
+ do_ALUOP_insrc_n(opbyte0, opbyte1, srcaddr); break;
+ case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f:
+ do_ALUOP_A_insrc(opbyte0, opbyte1, srcaddr); break;
+ case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
+ do_XCH_r_insrc(opbyte0, opbyte1, srcaddr); break;
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
+ do_CPL_insrcbit(opbyte0, opbyte1, srcaddr); break;
+ case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
+ do_LD_insrcbit_CF(opbyte0, opbyte1, srcaddr); break;
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ do_XOR_CF_insrcbit(opbyte0, opbyte1, srcaddr); break;
+ case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf:
+ do_LD_CF_insrcbit(opbyte0, opbyte1, srcaddr); break;
+ case 0xfc:
+ do_CALL_insrc(opbyte0, opbyte1, srcaddr); break;
+ case 0xfe:
+ do_JP_insrc(opbyte0, opbyte1, srcaddr); break;
+
+ default:
+ do_e0_to_e7_oprand_illegal(opbyte0, opbyte1, srcaddr); break;
+ }
+}
+
+// Actual handlers
+
+void tlcs870_device::do_e0_to_e7_oprand_illegal(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ logerror("illegal src prefix opcode %02x %02x (src addr %04x)\n", opbyte0, opbyte1, srcaddr);
+}
+
+/**********************************************************************************************************************/
+// (16-bit)
+/**********************************************************************************************************************/
+
+void tlcs870_device::do_LD_rr_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // LD rr, (src)
+ const uint16_t val = RM16(srcaddr);
+ set_reg16(opbyte1 & 0x3, val);
+ set_JF();
+}
+
+/**********************************************************************************************************************/
+// (8-bit)
+/**********************************************************************************************************************/
+
+void tlcs870_device::do_INC_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // INC (src)
+ uint8_t val = RM8(srcaddr);
+ val++;
+
+ if (val == 0)
+ {
+ set_ZF();
+ set_JF();
+ }
+ else
+ {
+ clear_ZF();
+ clear_JF();
+ }
+
+ WM8(srcaddr, val);
+}
+
+void tlcs870_device::do_DEC_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // DEC (src)
+ uint8_t val = RM8(srcaddr);
+ val--;
+
+ if (val == 0xff)
+ {
+ set_JF();
+ }
+ else
+ {
+ // do we clear?
+ clear_JF();
+ }
+
+ if (val == 0x00) // check
+ {
+ set_ZF();
+ }
+ else
+ {
+ set_ZF();
+ }
+
+ WM8(srcaddr, val);
+}
+
+void tlcs870_device::do_ROLD_A_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // ROLD A,(src)
+ // 12-bit left rotation using lower 4 bits of REG_A and content of (src)
+ const uint8_t val = RM8(srcaddr);
+ const uint8_t reg = get_reg8(REG_A);
+
+ uint8_t tempval = (val & 0x0f) << 4;
+ tempval |= reg & 0x0f;
+ const uint8_t tempa = (reg & 0xf0) | (val & 0xf0) >> 4;
+
+ set_reg8(REG_A, tempa);
+ WM8(srcaddr, tempval);
+
+ // TODO: flags
+}
+
+void tlcs870_device::do_RORD_A_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // RORD A,(src)
+ // 12-bit right rotation using lower 4 bits of REG_A and content of (src)
+ const uint8_t val = RM8(srcaddr);
+ const uint8_t reg = get_reg8(REG_A);
+
+ uint8_t tempval = (val & 0xf0) >> 4;
+ tempval |= ((reg & 0x0f) << 4);
+ const uint8_t tempa = (reg & 0xf0) | (val & 0x0f);
+
+ set_reg8(REG_A, tempa);
+ WM8(srcaddr, tempval);
+
+ // TODO: flags
+}
+
+
+
+void tlcs870_device::do_LD_inx_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // LD (x),(src)
+ // invalid if (src) is also (x) ? (not specified)
+ const uint16_t x = READ8(); // get address x
+ const uint8_t val = RM8(srcaddr);
+ WM8(x, val);
+
+ set_JF();
+ // z-flag is undefined, check real behavior
+}
+
+void tlcs870_device::do_LD_inHL_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // LD (HL),(src)
+ const uint8_t val = RM8(srcaddr);
+
+ const uint16_t dstaddr = get_reg16(REG_HL);
+
+ WM8(dstaddr, val);
+
+ set_JF();
+
+ if (val == 0x00) set_ZF();
+ else clear_ZF();
+}
+
+void tlcs870_device::do_LD_r_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // LD r, (src)
+ const uint8_t val = RM8(srcaddr);
+
+ set_reg8(opbyte1 & 0x7, val);
+
+ set_JF();
+
+ if (val == 0x00) set_ZF();
+ else clear_ZF();
+}
+
+void tlcs870_device::do_MCMP_insrc_n(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // MCMP (src), n
+ const uint8_t n = READ8();
+ const uint8_t val = RM8(srcaddr);
+
+ const uint8_t temp = n & val;
+ const uint8_t a = get_reg8(REG_A);
+
+ // ZF and JF set conditionally
+ if (a == temp)
+ {
+ // if n & val is equal to accumulator
+ set_ZF();
+ set_JF();
+ }
+ else
+ {
+ clear_ZF();
+ clear_JF();
+ }
+
+ // C gets set conditionally (like CMP?)
+ if (a < temp)
+ {
+ set_CF();
+ }
+ else
+ {
+ clear_CF();
+ }
+
+ // apparently H gets set conditionally too? (like CMP?)
+}
+
+void tlcs870_device::do_XCH_r_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // XCH r,(src)
+ const uint8_t val = RM8(srcaddr);
+ const uint8_t temp = get_reg8(opbyte1 & 0x7);
+
+ WM8(srcaddr, temp);
+ set_reg8(opbyte1 & 0x7, val);
+
+ set_JF();
+
+ if (val == 0)
+ {
+ set_ZF();
+ }
+ else
+ {
+ // do we clear?
+ clear_ZF();
+ }
+}
+
+/**********************************************************************************************************************/
+// ALU Operations
+/**********************************************************************************************************************/
+
+void tlcs870_device::do_ALUOP_insrc_inHL(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // (ALU OP) (src), (HL)
+ const int aluop = (opbyte1 & 0x7);
+ const uint8_t val = RM8(srcaddr);
+
+ const uint16_t HL = get_reg16(REG_HL);
+
+ const uint8_t result = do_alu(aluop, val, RM8(HL));
+
+ if (aluop != 0x07) // CMP doesn't write back
+ {
+ WM8(srcaddr, result);
+ }
+}
+
+void tlcs870_device::do_ALUOP_insrc_n(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // (ALU OP) (src), n
+ const uint8_t n = READ8();
+
+ const int aluop = (opbyte1 & 0x7);
+ const uint8_t val = RM8(srcaddr);
+
+ const uint8_t result = do_alu(aluop, val, n);
+
+ if (aluop != 0x07) // CMP doesn't write back
+ {
+ WM8(srcaddr, result);
+ }
+}
+
+void tlcs870_device::do_ALUOP_A_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // (ALU OP) A, (src)
+ const int aluop = (opbyte1 & 0x7);
+ const uint8_t val = RM8(srcaddr);
+
+ const uint8_t result = do_alu(aluop, get_reg8(REG_A), val);
+
+ if (aluop != 0x07) // CMP doesn't write back
+ {
+ set_reg8(REG_A, result);
+ }
+}
+
+/**********************************************************************************************************************/
+// jumps / calls
+/**********************************************************************************************************************/
+
+void tlcs870_device::do_CALL_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // CALL (src)
+ const uint16_t val = RM16(srcaddr);
+
+ WM16(m_sp.d - 1, m_addr);
+ m_sp.d -= 2;
+
+ m_addr = val;
+
+ // no flag changes on call
+}
+
+void tlcs870_device::do_JP_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // JP (src)
+ const uint16_t val = RM16(srcaddr);
+ m_addr = val;
+ set_JF();
+}
+
+/**********************************************************************************************************************/
+// (8-bit) bit operations
+/**********************************************************************************************************************/
+
+void tlcs870_device::do_XOR_CF_insrcbit(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // XOR CF,(src).b
+ const uint8_t val = RM8(srcaddr);
+ const uint8_t bitpos = opbyte1 & 0x7;
+
+ int bitused = (1 << bitpos);
+
+ const uint8_t bit = val & bitused;
+
+ if (is_CF())
+ {
+ if (bit)
+ {
+ clear_CF();
+ }
+ else
+ {
+ set_CF();
+ }
+ }
+ else
+ {
+ if (bit)
+ {
+ set_CF();
+ }
+ else
+ {
+ clear_CF();
+ }
+ }
+
+ // JF ends up being whatever the new value of CF is
+ if (is_CF())
+ set_JF();
+ else
+ clear_JF();
+}
+
+
+void tlcs870_device::do_LD_insrcbit_CF(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // LD (src).b,CF
+ uint8_t val = RM8(srcaddr);
+ const uint8_t bitpos = opbyte1 & 0x7;
+
+ const int bitused = (1 << bitpos);
+
+ if (is_CF()) // if carry flag is set, set the bit in val
+ {
+ val |= bitused;
+ }
+ else // if carry flag isn't set, clear the bit in val
+ {
+ val &= ~bitused;
+ }
+
+ // for this optype of operation ( LD *.b, CF ) the Jump Flag always ends up being 1
+ set_JF();
+
+ WM8(srcaddr, val);
+}
+
+void tlcs870_device::do_CPL_insrcbit(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // CPL (src).b
+ uint8_t val = RM8(srcaddr);
+ const uint8_t bitpos = opbyte1 & 0x7;
+
+ const int bitused = (1 << bitpos);
+
+ const uint8_t bit = val & bitused;
+
+ if (bit) // if the bit is set, clear the zero/jump flags and unset the bit
+ {
+ clear_ZF();
+ clear_JF();
+
+ val &= ~bitused;
+ }
+ else // if the bit isn't set, set the zero/jump flags and set the bit
+ {
+ set_ZF();
+ set_JF();
+
+ val |= bitused;
+ }
+
+ WM8(srcaddr, val);
+}
+
+void tlcs870_device::do_LD_CF_insrcbit(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // LD CF,(src).b aka TEST (src).b
+ const uint8_t val = RM8(srcaddr);
+ const uint8_t bitpos = opbyte1 & 0x7;
+
+ const int bitused = (1 << bitpos);
+
+ const uint8_t bit = val & bitused;
+
+ bit ? set_CF() : clear_CF();
+ // for this optype of operation ( LD CF, *.b ) the Jump Flag always ends up the inverse of the Carry Flag
+ bit ? clear_JF() : set_JF();
+}
+
+void tlcs870_device::do_SET_insrcbit(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // SET (src).b
+ uint8_t val = RM8(srcaddr);
+ const uint8_t bitpos = opbyte1 & 0x7;
+
+ const int bitused = (1 << bitpos);
+
+ if (val & bitused) // Zero flag gets set based on original value of bit?
+ {
+ clear_ZF();
+ clear_JF(); // 'Z' (so copy Z flag?)
+ }
+ else
+ {
+ set_ZF();
+ set_JF(); // 'Z'
+ }
+
+ val |= bitused;
+
+ WM8(srcaddr, val);
+}
+
+void tlcs870_device::do_CLR_insrcbit(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr)
+{
+ // CLR (src).b
+ uint8_t val = RM8(srcaddr);
+ const uint8_t bitpos = opbyte1 & 0x7;
+
+ const int bitused = (1 << bitpos);
+
+ if (val & bitused) // Zero flag gets set based on original value of bit?
+ {
+ clear_ZF();
+ clear_JF(); // 'Z' (so copy Z flag?)
+ }
+ else
+ {
+ set_ZF();
+ set_JF(); // 'Z'
+ }
+
+ val &= ~bitused;
+
+ WM8(srcaddr, val);
+}
+
diff --git a/src/devices/cpu/tlcs870/tlcs870d.cpp b/src/devices/cpu/tlcs870/tlcs870d.cpp
index 0017caab950..50b7b12f05d 100644
--- a/src/devices/cpu/tlcs870/tlcs870d.cpp
+++ b/src/devices/cpu/tlcs870/tlcs870d.cpp
@@ -8,8 +8,6 @@
The TLCS-870/C appears to have a completely different encoding.
- loosely baesd on the tlcs90 core by Luca Elia
-
*************************************************************************************************************/
#include "emu.h"
@@ -1020,7 +1018,7 @@ void tlcs870_disassembler::decode_register_prefix(uint8_t b0)
break;
case 0x02:
- // MUL ggG, ggL
+ // MUL ggH, ggL
m_op = MUL;
m_param1_type = REG_16BIT; // odd syntax
@@ -1416,6 +1414,10 @@ void tlcs870_disassembler::decode_register_prefix(uint8_t b0)
case 0x97:
break;
+ case 0x98:
+ case 0x99:
+ break;
+
case 0x9a:
case 0x9b:
// LD (pp).g,CF
@@ -1458,6 +1460,25 @@ void tlcs870_disassembler::decode_register_prefix(uint8_t b0)
case 0xa7:
break;
+ case 0xa8:
+ case 0xa9:
+ case 0xaa:
+ case 0xab:
+ case 0xac:
+ case 0xad:
+ case 0xae:
+ case 0xaf:
+ // XCH r,g
+ m_op = XCH;
+
+ //m_flagsaffected |= FLAG_J | FLAG_Z;
+
+ m_param1_type = REG_8BIT;
+ m_param1 = bx & 0x7;
+
+ m_param2_type = REG_8BIT;
+ m_param2 = b0 & 0x7;
+ break;
case 0xb0:
case 0xb1:
case 0xb2:
diff --git a/src/devices/machine/mc68681.cpp b/src/devices/machine/mc68681.cpp
index e311c0a7ac2..bc8244b731f 100644
--- a/src/devices/machine/mc68681.cpp
+++ b/src/devices/machine/mc68681.cpp
@@ -1,16 +1,18 @@
// license:BSD-3-Clause
-// copyright-holders:Mariusz Wojcieszek, R. Belmont
+// copyright-holders:Mariusz Wojcieszek, R. Belmont, Joseph Zatarski
/*
2681 DUART
68681 DUART
28C94 QUART
68340 serial module
+ XR68C681 DUART (backwards compatible with 68681 with some improvements)
Written by Mariusz Wojcieszek
Updated by Jonathan Gevaryahu AKA Lord Nightmare
Improved interrupt handling by R. Belmont
Rewrite and modernization in progress by R. Belmont
Addition of the duart compatible 68340 serial module support by Edstrom
+ Support for the Exar XR68C681 by Joseph Zatarski (July of 2018)
The main incompatibility between the 2681 and 68681 (Signetics and Motorola each
manufactured both versions of the chip) is that the 68681 has a R/W input and
@@ -21,6 +23,26 @@
The command register addresses should never be read from. Doing so may place
the baud rate generator into a test mode which drives the parallel outputs with
internal counters and causes serial ports to operate at uncontrollable rates.
+
+ Exar XR68C681
+
+ The XR68C681 is an improvement upon the MC68681 which supports more baud
+ rates, adds an additional MISR (masked ISR) register, and adds a low-power
+ standby mode. There may be other differences, but these are the most
+ notable.
+
+ The extra baud rates are implemented by an 'X' bit for each channel. The X
+ bit chooses between two baud rate tables, in addition to the ACR[7] bit.
+ The X bit is changed by additional commands that are written to CRA and
+ CRB.
+
+ The MISR is a read only register that takes the place of the 'BRG Test'
+ register on the MC68681.
+
+ The low power standby mode is entered and left by a command written to CRA
+ or CRB registers. Writing the commands to either register affects the whole
+ DUART, not just one channel. Resetting the DUART also leaves low power
+ mode.
*/
#include "emu.h"
@@ -41,8 +63,10 @@ static const char *const duart68681_reg_write_names[0x10] =
"MRA", "CSRA", "CRA", "THRA", "ACR", "IMR", "CRUR", "CTLR", "MRB", "CSRB", "CRB", "THRB", "IVR", "OPCR", "Set OP Bits", "Reset OP Bits"
};
-static const int baud_rate_ACR_0[] = { 50, 110, 134, 200, 300, 600, 1200, 1050, 2400, 4800, 7200, 9600, 38400, 0, 0, 0 };
-static const int baud_rate_ACR_1[] = { 75, 110, 134, 150, 300, 600, 1200, 2000, 2400, 4800, 1800, 9600, 19200, 0, 0, 0 };
+static const int baud_rate_ACR_0[] = { 50, 110, 134, 200, 300, 600, 1200, 1050, 2400, 4800, 7200, 9600, 38400, 0, 0, 0 }; /* xr68c681 X=0 */
+static const int baud_rate_ACR_0_X_1[] = { 75, 110, 134, 150, 3600, 14400, 28800, 57600, 115200, 4800, 1800, 9600, 19200, 0, 0, 0 };
+static const int baud_rate_ACR_1[] = { 75, 110, 134, 150, 300, 600, 1200, 2000, 2400, 4800, 1800, 9600, 19200, 0, 0, 0 }; /* xr68c681 X=0 */
+static const int baud_rate_ACR_1_X_1[] = { 50, 110, 134, 200, 3600, 14400, 28800, 57600, 115200, 4800, 7200, 9600, 38400, 0, 0, 0 };
#define INT_INPUT_PORT_CHANGE 0x80
#define INT_DELTA_BREAK_B 0x40
@@ -74,6 +98,7 @@ DEFINE_DEVICE_TYPE(SCN2681, scn2681_device, "scn2681", "SCN2681 DUART")
DEFINE_DEVICE_TYPE(MC68681, mc68681_device, "mc68681", "MC68681 DUART")
DEFINE_DEVICE_TYPE(SC28C94, sc28c94_device, "sc28c94", "SC28C94 QUART")
DEFINE_DEVICE_TYPE(MC68340_DUART, mc68340_duart_device, "mc68340duart", "MC68340 DUART Device")
+DEFINE_DEVICE_TYPE(XR68C681, xr68c681_device, "xr68c681", "XR68C681 DUART")
DEFINE_DEVICE_TYPE(DUART_CHANNEL, duart_channel, "duart_channel", "DUART channel")
@@ -108,12 +133,17 @@ scn2681_device::scn2681_device(const machine_config &mconfig, const char *tag, d
{
}
-mc68681_device::mc68681_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : duart_base_device(mconfig, MC68681, tag, owner, clock),
+mc68681_device::mc68681_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
+ : duart_base_device(mconfig, type, tag, owner, clock),
m_read_vector(false)
{
}
+mc68681_device::mc68681_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mc68681_device(mconfig, MC68681, tag, owner, clock)
+{
+}
+
sc28c94_device::sc28c94_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: duart_base_device(mconfig, SC28C94, tag, owner, clock)
{
@@ -136,6 +166,15 @@ mc68340_duart_device::mc68340_duart_device(const machine_config &mconfig, const
{
}
+xr68c681_device::xr68c681_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mc68681_device(mconfig, XR68C681, tag, owner, clock),
+ m_XTXA(false),
+ m_XRXA(false),
+ m_XTXB(false),
+ m_XRXB(false)
+{
+}
+
//-------------------------------------------------
// set_clocks - configuration helper to set
// the external clocks
@@ -182,6 +221,16 @@ void mc68681_device::device_start()
save_item(NAME(IVR));
}
+void xr68c681_device::device_start()
+{
+ mc68681_device::device_start();
+
+ save_item(NAME(m_XTXA));
+ save_item(NAME(m_XRXA));
+ save_item(NAME(m_XTXB));
+ save_item(NAME(m_XRXB));
+}
+
/*-------------------------------------------------
device reset callback
-------------------------------------------------*/
@@ -209,6 +258,13 @@ void mc68681_device::device_reset()
m_read_vector = false;
}
+void xr68c681_device::device_reset()
+{
+ mc68681_device::device_reset();
+
+ m_XTXA = m_XRXA = m_XTXB = m_XRXB = false;
+}
+
MACHINE_CONFIG_START(duart_base_device::device_add_mconfig)
MCFG_DEVICE_ADD(CHANA_TAG, DUART_CHANNEL, 0)
MCFG_DEVICE_ADD(CHANB_TAG, DUART_CHANNEL, 0)
@@ -243,42 +299,42 @@ void duart_base_device::update_interrupts()
ISR: bit 1: RxRDYA/FFULLA: this is handled here; depending on whether MSR1A bit 6 is 0 or 1, this bit holds the state of SRA bit 0 or bit 1 respectively
ISR: bit 0: TxRDYA: this is handled here; it mirrors SRA bit 2
*/
- if ( (ISR & IMR) != 0 )
+ if ((ISR & IMR) != 0)
{
- LOG( "68681: Interrupt line active (IMR & ISR = %02X)\n", (ISR & IMR) );
+ LOG("68681: Interrupt line active (IMR & ISR = %02X)\n", (ISR & IMR));
write_irq(ASSERT_LINE);
}
else
{
- LOG( "68681: Interrupt line not active (IMR & ISR = %02X)\n", ISR & IMR);
+ LOG("68681: Interrupt line not active (IMR & ISR = %02X)\n", ISR & IMR);
write_irq(CLEAR_LINE);
}
- if(OPCR & 0xf0)
+ if (OPCR & 0xf0)
{
- if(BIT(OPCR, 4))
+ if (BIT(OPCR, 4))
{
- if(BIT(ISR, 1))
+ if (BIT(ISR, 1))
OPR |= 0x10;
else
OPR &= ~0x10;
}
- if(BIT(OPCR, 5))
+ if (BIT(OPCR, 5))
{
- if(BIT(ISR, 5))
+ if (BIT(ISR, 5))
OPR |= 0x20;
else
OPR &= ~0x20;
}
- if(BIT(OPCR, 6))
+ if (BIT(OPCR, 6))
{
- if(BIT(ISR, 0))
+ if (BIT(ISR, 0))
OPR |= 0x40;
else
OPR &= ~0x40;
}
- if(BIT(OPCR, 7))
+ if (BIT(OPCR, 7))
{
- if(BIT(ISR, 4))
+ if (BIT(ISR, 4))
OPR |= 0x80;
else
OPR &= ~0x80;
@@ -304,17 +360,17 @@ double duart_base_device::get_ct_rate()
// Timer mode
switch ((ACR >> 4) & 3)
{
- case 0: // IP2
- case 1: // IP2 / 16
- //logerror( "68681 (%s): Unhandled timer/counter mode %d\n", duart68681->tag(), (duart68681->ACR >> 4) & 3);
- rate = clock();
- break;
- case 2: // X1/CLK
- rate = clock();
- break;
- case 3: // X1/CLK / 16
- rate = clock() / 16;
- break;
+ case 0: // IP2
+ case 1: // IP2 / 16
+ //logerror( "68681 (%s): Unhandled timer/counter mode %d\n", duart68681->tag(), (duart68681->ACR >> 4) & 3);
+ rate = clock();
+ break;
+ case 2: // X1/CLK
+ rate = clock();
+ break;
+ case 3: // X1/CLK / 16
+ rate = clock() / 16;
+ break;
}
}
else
@@ -322,15 +378,15 @@ double duart_base_device::get_ct_rate()
// Counter mode
switch ((ACR >> 4) & 3)
{
- case 0: // IP2
- case 1: // TxCA
- case 2: // TxCB
- //logerror( "68681 (%s): Unhandled timer/counter mode %d\n", device->tag(), (duart68681->ACR >> 4) & 3);
- rate = clock();
- break;
- case 3: // X1/CLK / 16
- rate = clock() / 16;
- break;
+ case 0: // IP2
+ case 1: // TxCA
+ case 2: // TxCB
+ //logerror( "68681 (%s): Unhandled timer/counter mode %d\n", device->tag(), (duart68681->ACR >> 4) & 3);
+ rate = clock();
+ break;
+ case 3: // X1/CLK / 16
+ rate = clock() / 16;
+ break;
}
}
@@ -349,7 +405,7 @@ void duart_base_device::start_ct(int count)
duart_timer->adjust(attotime::from_hz(clock) * count, 0);
}
-TIMER_CALLBACK_MEMBER( duart_base_device::duart_timer_callback )
+TIMER_CALLBACK_MEMBER(duart_base_device::duart_timer_callback)
{
if (ACR & 0x40)
{
@@ -403,7 +459,7 @@ TIMER_CALLBACK_MEMBER( duart_base_device::duart_timer_callback )
}
-READ8_MEMBER( mc68681_device::read )
+READ8_MEMBER(mc68681_device::read)
{
if (offset == 0x0c)
return IVR;
@@ -422,31 +478,31 @@ READ8_MEMBER( mc68681_device::read )
return r;
}
-READ8_MEMBER( mc68340_duart_device::read )
+READ8_MEMBER(mc68340_duart_device::read)
{
uint8_t r = 0;
switch (offset)
{
- case 0x00: /* MR1A - does not share register address with MR2A */
- r = m_chanA->read_MR1();
- break;
- case 0x08: /* MR1B - does not share register address with MR2B */
- r = m_chanB->read_MR1();
- break;
- case 0x10: /* MR2A - does not share register address with MR1A */
- r = m_chanA->read_MR2();
- break;
- case 0x11: /* MR2B - does not share register address with MR1B */
- r = m_chanB->read_MR2();
- break;
- default:
- r = duart_base_device::read(space, offset, mem_mask);
+ case 0x00: /* MR1A - does not share register address with MR2A */
+ r = m_chanA->read_MR1();
+ break;
+ case 0x08: /* MR1B - does not share register address with MR2B */
+ r = m_chanB->read_MR1();
+ break;
+ case 0x10: /* MR2A - does not share register address with MR1A */
+ r = m_chanA->read_MR2();
+ break;
+ case 0x11: /* MR2B - does not share register address with MR1B */
+ r = m_chanB->read_MR2();
+ break;
+ default:
+ r = duart_base_device::read(space, offset, mem_mask);
}
return r;
}
-READ8_MEMBER( sc28c94_device::read )
+READ8_MEMBER(sc28c94_device::read)
{
uint8_t r = 0;
offset &= 0x1f;
@@ -458,115 +514,124 @@ READ8_MEMBER( sc28c94_device::read )
switch (offset)
{
- case 0x10: /* MR1A/MR2C */
- case 0x11: /* SRC */
- case 0x13: /* Rx Holding Register C */
- r = m_chanC->read_chan_reg(offset & 3);
- break;
+ case 0x10: /* MR1A/MR2C */
+ case 0x11: /* SRC */
+ case 0x13: /* Rx Holding Register C */
+ r = m_chanC->read_chan_reg(offset & 3);
+ break;
- case 0x18: /* MR1D/MR2D */
- case 0x19: /* SRD */
- case 0x1b: /* RHRD */
- r = m_chanD->read_chan_reg(offset & 3);
- break;
+ case 0x18: /* MR1D/MR2D */
+ case 0x19: /* SRD */
+ case 0x1b: /* RHRD */
+ r = m_chanD->read_chan_reg(offset & 3);
+ break;
}
return r;
}
-READ8_MEMBER( duart_base_device::read )
+READ8_MEMBER(xr68c681_device::read)
+{
+ if (offset == 0x02)
+ {
+ LOG("Reading XR68C681 (%s) reg 0x02 (MISR)\n", tag());
+ return ISR & IMR;
+ }
+ else
+ return mc68681_device::read(space, offset, mem_mask);
+}
+
+READ8_MEMBER(duart_base_device::read)
{
uint8_t r = 0xff;
offset &= 0xf;
- LOG( "Reading 68681 (%s) reg %x (%s)\n", tag(), offset, duart68681_reg_read_names[offset] );
+ LOG("Reading 68681 (%s) reg %x (%s)\n", tag(), offset, duart68681_reg_read_names[offset]);
switch (offset)
{
- case 0x00: /* MR1A/MR2A */
- case 0x01: /* SRA */
- case 0x03: /* Rx Holding Register A */
- r = m_chanA->read_chan_reg(offset & 3);
- break;
+ case 0x00: /* MR1A/MR2A */
+ case 0x01: /* SRA */
+ case 0x03: /* Rx Holding Register A */
+ r = m_chanA->read_chan_reg(offset & 3);
+ break;
- case 0x04: /* IPCR */
- {
- r = IPCR;
+ case 0x04: /* IPCR */
+ r = IPCR;
- // reading this clears all the input change bits
- IPCR &= 0x0f;
- clear_ISR_bits(INT_INPUT_PORT_CHANGE);
- }
+ // reading this clears all the input change bits
+ IPCR &= 0x0f;
+ clear_ISR_bits(INT_INPUT_PORT_CHANGE);
break;
- case 0x05: /* ISR */
- r = ISR;
- break;
+ case 0x05: /* ISR */
+ r = ISR;
+ break;
- case 0x06: /* CUR */
- r = get_ct_count() >> 8;
- break;
+ case 0x06: /* CUR */
+ r = get_ct_count() >> 8;
+ break;
- case 0x07: /* CLR */
- r = get_ct_count() & 0xff;
- break;
+ case 0x07: /* CLR */
+ r = get_ct_count() & 0xff;
+ break;
- case 0x08: /* MR1B/MR2B */
- case 0x09: /* SRB */
- case 0x0b: /* RHRB */
- r = m_chanB->read_chan_reg(offset & 3);
- break;
+ case 0x08: /* MR1B/MR2B */
+ case 0x09: /* SRB */
+ case 0x0b: /* RHRB */
+ r = m_chanB->read_chan_reg(offset & 3);
+ break;
- case 0x0a: /* 1X/16X Test */
- r = 0x61; // the old 68681 returned this and it makes Apollo happy
- break;
+ case 0x0a: /* 1X/16X Test */
+ r = 0x61; // the old 68681 returned this and it makes Apollo happy
+ break;
- case 0x0d: /* IP */
- if (!read_inport.isnull())
- {
- r = read_inport(); // TODO: go away
- }
- else
- {
- r = IP_last_state;
- }
+ case 0x0d: /* IP */
+ if (!read_inport.isnull())
+ {
+ r = read_inport(); // TODO: go away
+ }
+ else
+ {
+ r = IP_last_state;
+ }
- r |= 0x80; // bit 7 is always set
- break;
+ r |= 0x80; // bit 7 is always set
+ break;
- case 0x0e: /* Start counter command */
+ case 0x0e: /* Start counter command */
+ {
+ if (ACR & 0x40)
{
- if (ACR & 0x40)
- {
- // Reset the timer
- half_period = 0;
- }
-
- int count = std::max(CTR.w.l, uint16_t(1));
- start_ct(count);
- break;
+ // Reset the timer
+ half_period = 0;
}
- case 0x0f: /* Stop counter command */
- clear_ISR_bits(INT_COUNTER_READY);
+ int count = std::max(CTR.w.l, uint16_t(1));
+ start_ct(count);
+ break;
+ }
+
+ case 0x0f: /* Stop counter command */
+ clear_ISR_bits(INT_COUNTER_READY);
- // Stop the counter only
- if (!(ACR & 0x40))
- duart_timer->adjust(attotime::never);
+ // Stop the counter only
+ if (!(ACR & 0x40))
+ duart_timer->adjust(attotime::never);
- break;
+ break;
- default:
- LOG( "Reading unhandled 68681 reg %x\n", offset );
- break;
+ default:
+ LOG("Reading unhandled 68681 reg %x\n", offset);
+ break;
}
LOG("returned %02x\n", r);
return r;
}
-WRITE8_MEMBER( mc68681_device::write )
+WRITE8_MEMBER(mc68681_device::write)
{
if (offset == 0x0c)
IVR = data;
@@ -574,30 +639,30 @@ WRITE8_MEMBER( mc68681_device::write )
duart_base_device::write(space, offset, data, mem_mask);
}
-WRITE8_MEMBER( mc68340_duart_device::write )
+WRITE8_MEMBER(mc68340_duart_device::write)
{
//printf("Duart write %02x -> %02x\n", data, offset);
switch(offset)
{
- case 0x00: /* MR1A - does not share register address with MR2A */
- m_chanA->write_MR1(data);
- break;
- case 0x08: /* MR1B - does not share register address with MR2B */
- m_chanB->write_MR1(data);
- break;
- case 0x10: /* MR2A - does not share register address with MR1A */
- m_chanA->write_MR2(data);
- break;
- case 0x11: /* MR2B - does not share register address with MR1B */
- m_chanB->write_MR2(data);
- break;
- default:
- duart_base_device::write(space, offset, data, mem_mask);
+ case 0x00: /* MR1A - does not share register address with MR2A */
+ m_chanA->write_MR1(data);
+ break;
+ case 0x08: /* MR1B - does not share register address with MR2B */
+ m_chanB->write_MR1(data);
+ break;
+ case 0x10: /* MR2A - does not share register address with MR1A */
+ m_chanA->write_MR2(data);
+ break;
+ case 0x11: /* MR2B - does not share register address with MR1B */
+ m_chanB->write_MR2(data);
+ break;
+ default:
+ duart_base_device::write(space, offset, data, mem_mask);
}
}
-WRITE8_MEMBER( sc28c94_device::write )
+WRITE8_MEMBER(sc28c94_device::write)
{
offset &= 0x1f;
@@ -606,110 +671,185 @@ WRITE8_MEMBER( sc28c94_device::write )
duart_base_device::write(space, offset, data, mem_mask);
}
- switch(offset)
+ switch (offset)
{
- case 0x10: /* MRC */
- case 0x11: /* CSRC */
- case 0x12: /* CRC */
- case 0x13: /* THRC */
- m_chanC->write_chan_reg(offset&3, data);
- break;
+ case 0x10: /* MRC */
+ case 0x11: /* CSRC */
+ case 0x12: /* CRC */
+ case 0x13: /* THRC */
+ m_chanC->write_chan_reg(offset&3, data);
+ break;
- case 0x18: /* MRC */
- case 0x19: /* CSRC */
- case 0x1a: /* CRC */
- case 0x1b: /* THRC */
- m_chanD->write_chan_reg(offset&3, data);
- break;
+ case 0x18: /* MRC */
+ case 0x19: /* CSRC */
+ case 0x1a: /* CRC */
+ case 0x1b: /* THRC */
+ m_chanD->write_chan_reg(offset&3, data);
+ break;
}
}
-WRITE8_MEMBER( duart_base_device::write )
+WRITE8_MEMBER(xr68c681_device::write)
{
- offset &= 0x0f;
- LOG( "Writing 68681 (%s) reg %x (%s) with %04x\n", tag(), offset, duart68681_reg_write_names[offset], data );
- switch(offset)
- {
- case 0x00: /* MRA */
- case 0x01: /* CSRA */
- case 0x02: /* CRA */
- case 0x03: /* THRA */
- m_chanA->write_chan_reg(offset&3, data);
+ if (offset == 0x02) /* CRA */
+ switch (data >> 4)
+ {
+ case 0x08: /* set RX extend bit */
+ m_XRXA = true;
+ m_chanA->baud_updated();
+ data &= 0x0f; /* disable command before we send it off to 68681 */
break;
- case 0x04: /* ACR */
- {
- uint8_t old_acr = ACR;
- ACR = data;
+ case 0x09: /* clear RX extend bit */
+ m_XRXA = false;
+ m_chanA->baud_updated();
+ data &= 0x0f;
+ break;
- // bits 6-4: Counter/Timer Mode And Clock Source Select
- // bits 3-0: IP3-0 Change-Of-State Interrupt Enable
- if ((old_acr ^ data) & 0x40)
- {
- if (data & 0x40)
- {
- // Entering timer mode
- uint16_t count = std::max(CTR.w.l, uint16_t(1));
- half_period = 0;
-
- start_ct(count);
- }
- else
- {
- // Leaving timer mode (TODO: is this correct?)
- duart_timer->adjust(attotime::never);
- }
- }
+ case 0x0a: /* set TX extend bit */
+ m_XTXA = true;
+ m_chanA->baud_updated();
+ data &= 0x0f;
+ break;
- // check for pending input port delta interrupts
- if ((((IPCR>>4) & data) & 0x0f) != 0)
- set_ISR_bits(INT_INPUT_PORT_CHANGE);
+ case 0x0b: /* clear TX extend bit */
+ m_XTXA = false;
+ m_chanA->baud_updated();
+ data &= 0x0f;
+ break;
- m_chanA->ACR_updated();
- m_chanB->ACR_updated();
- m_chanA->update_interrupts();
- m_chanB->update_interrupts();
+ case 0x0c: /* enter low power mode TODO: unimplemented */
+ case 0x0d: /* leave low power mode */
+ case 0x0e: /* reserved */
+ case 0x0f: /* reserved */
+ data &= 0x0f;
break;
}
- case 0x05: /* IMR */
- IMR = data;
- update_interrupts();
- break;
- case 0x06: /* CTUR */
- CTR.b.h = data;
+ else if (offset == 0x0a) /* CRB */
+ switch (data >> 4)
+ {
+ case 0x08: /* set RX extend bit */
+ m_XRXB = true;
+ m_chanB->baud_updated();
+ data &= 0x0f;
break;
- case 0x07: /* CTLR */
- CTR.b.l = data;
+ case 0x09: /* clear RX extend bit */
+ m_XRXB = false;
+ m_chanB->baud_updated();
+ data &= 0x0f;
break;
- case 0x08: /* MRB */
- case 0x09: /* CSRB */
- case 0x0a: /* CRB */
- case 0x0b: /* THRB */
- m_chanB->write_chan_reg(offset&3, data);
+ case 0x0a: /* set TX extend bit */
+ m_XTXB = true;
+ m_chanB->baud_updated();
+ data &= 0x0f;
break;
- case 0x0d: /* OPCR */
- if (((data & 0xf) != 0x00) && ((data & 0xc) != 0x4))
- logerror( "68681 (%s): Unhandled OPCR value: %02x\n", tag(), data);
- OPCR = data;
+ case 0x0b: /* clear TX extend bit */
+ m_XTXB = false;
+ m_chanB->baud_updated();
+ data &= 0x0f;
break;
- case 0x0e: /* Set Output Port Bits */
- OPR |= data;
- write_outport(OPR ^ 0xff);
+ case 0x0c: /* enter low power mode TODO: unimplemented */
+ case 0x0d: /* leave low power mode */
+ case 0x0e: /* reserved */
+ case 0x0f: /* reserved */
+ data &= 0x0f;
break;
+ }
+
+ mc68681_device::write(space, offset, data, mem_mask); /* pass on 68681 command */
+}
- case 0x0f: /* Reset Output Port Bits */
- OPR &= ~data;
- write_outport(OPR ^ 0xff);
- break;
+WRITE8_MEMBER(duart_base_device::write)
+{
+ offset &= 0x0f;
+ LOG("Writing 68681 (%s) reg %x (%s) with %04x\n", tag(), offset, duart68681_reg_write_names[offset], data);
+ switch (offset)
+ {
+ case 0x00: /* MRA */
+ case 0x01: /* CSRA */
+ case 0x02: /* CRA */
+ case 0x03: /* THRA */
+ m_chanA->write_chan_reg(offset&3, data);
+ break;
+
+ case 0x04: /* ACR */
+ {
+ uint8_t old_acr = ACR;
+ ACR = data;
+
+ // bits 6-4: Counter/Timer Mode And Clock Source Select
+ // bits 3-0: IP3-0 Change-Of-State Interrupt Enable
+ if ((old_acr ^ data) & 0x40)
+ {
+ if (data & 0x40)
+ {
+ // Entering timer mode
+ uint16_t count = std::max(CTR.w.l, uint16_t(1));
+ half_period = 0;
+
+ start_ct(count);
+ }
+ else
+ {
+ // Leaving timer mode (TODO: is this correct?)
+ duart_timer->adjust(attotime::never);
+ }
+ }
+
+ // check for pending input port delta interrupts
+ if ((((IPCR>>4) & data) & 0x0f) != 0)
+ set_ISR_bits(INT_INPUT_PORT_CHANGE);
+
+ m_chanA->baud_updated();
+ m_chanB->baud_updated();
+ m_chanA->update_interrupts();
+ m_chanB->update_interrupts();
+ break;
+ }
+ case 0x05: /* IMR */
+ IMR = data;
+ update_interrupts();
+ break;
+
+ case 0x06: /* CTUR */
+ CTR.b.h = data;
+ break;
+
+ case 0x07: /* CTLR */
+ CTR.b.l = data;
+ break;
+
+ case 0x08: /* MRB */
+ case 0x09: /* CSRB */
+ case 0x0a: /* CRB */
+ case 0x0b: /* THRB */
+ m_chanB->write_chan_reg(offset&3, data);
+ break;
+
+ case 0x0d: /* OPCR */
+ if (((data & 0xf) != 0x00) && ((data & 0xc) != 0x4))
+ logerror("68681 (%s): Unhandled OPCR value: %02x\n", tag(), data);
+ OPCR = data;
+ break;
+
+ case 0x0e: /* Set Output Port Bits */
+ OPR |= data;
+ write_outport(OPR ^ 0xff);
+ break;
+
+ case 0x0f: /* Reset Output Port Bits */
+ OPR &= ~data;
+ write_outport(OPR ^ 0xff);
+ break;
}
}
-WRITE_LINE_MEMBER( duart_base_device::ip0_w )
+WRITE_LINE_MEMBER(duart_base_device::ip0_w)
{
uint8_t newIP = (IP_last_state & ~0x01) | ((state == ASSERT_LINE) ? 1 : 0);
@@ -726,7 +866,7 @@ WRITE_LINE_MEMBER( duart_base_device::ip0_w )
IP_last_state = newIP;
}
-WRITE_LINE_MEMBER( duart_base_device::ip1_w )
+WRITE_LINE_MEMBER(duart_base_device::ip1_w)
{
uint8_t newIP = (IP_last_state & ~0x02) | ((state == ASSERT_LINE) ? 2 : 0);
@@ -743,7 +883,7 @@ WRITE_LINE_MEMBER( duart_base_device::ip1_w )
IP_last_state = newIP;
}
-WRITE_LINE_MEMBER( duart_base_device::ip2_w )
+WRITE_LINE_MEMBER(duart_base_device::ip2_w)
{
uint8_t newIP = (IP_last_state & ~0x04) | ((state == ASSERT_LINE) ? 4 : 0);
@@ -760,7 +900,7 @@ WRITE_LINE_MEMBER( duart_base_device::ip2_w )
IP_last_state = newIP;
}
-WRITE_LINE_MEMBER( duart_base_device::ip3_w )
+WRITE_LINE_MEMBER(duart_base_device::ip3_w)
{
uint8_t newIP = (IP_last_state & ~0x08) | ((state == ASSERT_LINE) ? 8 : 0);
@@ -777,21 +917,21 @@ WRITE_LINE_MEMBER( duart_base_device::ip3_w )
IP_last_state = newIP;
}
-WRITE_LINE_MEMBER( duart_base_device::ip4_w )
+WRITE_LINE_MEMBER(duart_base_device::ip4_w)
{
uint8_t newIP = (IP_last_state & ~0x10) | ((state == ASSERT_LINE) ? 0x10 : 0);
// TODO: special mode for ip4 (Ch. A Rx clock)
IP_last_state = newIP;
}
-WRITE_LINE_MEMBER( duart_base_device::ip5_w )
+WRITE_LINE_MEMBER(duart_base_device::ip5_w)
{
uint8_t newIP = (IP_last_state & ~0x20) | ((state == ASSERT_LINE) ? 0x20 : 0);
// TODO: special mode for ip5 (Ch. B Tx clock)
IP_last_state = newIP;
}
-WRITE_LINE_MEMBER( duart_base_device::ip6_w )
+WRITE_LINE_MEMBER(duart_base_device::ip6_w)
{
uint8_t newIP = (IP_last_state & ~0x40) | ((state == ASSERT_LINE) ? 0x40 : 0);
// TODO: special mode for ip6 (Ch. B Rx clock)
@@ -808,11 +948,11 @@ duart_channel *duart_base_device::get_channel(int chan)
return m_chanB;
}
-int duart_base_device::calc_baud(int ch, uint8_t data)
+int duart_base_device::calc_baud(int ch, bool rx, uint8_t data)
{
int baud_rate;
- if ( BIT(ACR, 7) == 0 )
+ if (BIT(ACR, 7) == 0)
{
baud_rate = baud_rate_ACR_0[data & 0x0f];
@@ -846,7 +986,46 @@ int duart_base_device::calc_baud(int ch, uint8_t data)
if ((baud_rate == 0) && ((data & 0xf) != 0xd))
{
- LOG( "Unsupported transmitter clock: channel %d, clock select = %02x\n", ch, data );
+ LOG("Unsupported transmitter clock: channel %d, clock select = %02x\n", ch, data);
+ }
+
+ //printf("%s ch %d setting baud to %d\n", tag(), ch, baud_rate);
+ return baud_rate;
+}
+
+int xr68c681_device::calc_baud(int ch, bool rx, uint8_t data)
+{
+ int baud_rate;
+
+
+ baud_rate = baud_rate_ACR_0[data & 0x0f];
+
+ if (ch == 0)
+ {
+ if ((data & 0x0f) == 0x0e)
+ baud_rate = ip3clk/16;
+ else if ((data & 0x0f) == 0x0f)
+ baud_rate = ip3clk;
+ else if ((rx && m_XRXA) || (!rx && m_XTXA)) /* X = 1 */
+ baud_rate = BIT(ACR, 7) == 0 ? baud_rate_ACR_0_X_1[data & 0x0f] : baud_rate_ACR_1_X_1[data & 0x0f];
+ else /* X = 0 */
+ baud_rate = BIT(ACR, 7) == 0 ? baud_rate_ACR_0[data & 0x0f] : baud_rate_ACR_1[data & 0x0f];
+ }
+ else if (ch == 1)
+ {
+ if ((data & 0x0f) == 0x0e)
+ baud_rate = ip5clk/16;
+ else if ((data & 0x0f) == 0x0f)
+ baud_rate = ip5clk;
+ else if ((rx && m_XRXB) || (!rx && m_XTXB)) /* X = 1 */
+ baud_rate = BIT(ACR, 7) == 0 ? baud_rate_ACR_0_X_1[data & 0x0f] : baud_rate_ACR_1_X_1[data & 0x0f];
+ else /* X = 0 */
+ baud_rate = BIT(ACR, 7) == 0 ? baud_rate_ACR_0[data & 0x0f] : baud_rate_ACR_1[data & 0x0f];
+ }
+
+ if ((baud_rate == 0) && ((data & 0xf) != 0xd))
+ {
+ LOG("Unsupported transmitter clock: channel %d, clock select = %02x\n", ch, data);
}
//printf("%s ch %d setting baud to %d\n", tag(), ch, baud_rate);
@@ -874,14 +1053,14 @@ void duart_base_device::set_ISR_bits(int mask)
// DUART channel class stuff
duart_channel::duart_channel(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : device_t(mconfig, DUART_CHANNEL, tag, owner, clock),
- device_serial_interface(mconfig, *this),
- MR1(0),
- MR2(0),
- SR(0),
- rx_enabled(0),
- rx_fifo_num(0),
- tx_enabled(0)
+ : device_t(mconfig, DUART_CHANNEL, tag, owner, clock)
+ , device_serial_interface(mconfig, *this)
+ , MR1(0)
+ , MR2(0)
+ , SR(0)
+ , rx_enabled(0)
+ , rx_fifo_num(0)
+ , tx_enabled(0)
{
}
@@ -928,9 +1107,9 @@ void duart_channel::rcv_complete()
//printf("%s ch %d rcv complete\n", tag(), m_ch);
- if ( rx_enabled )
+ if (rx_enabled)
{
- if ( rx_fifo_num >= MC68681_RX_FIFO_SIZE )
+ if (rx_fifo_num >= MC68681_RX_FIFO_SIZE)
{
logerror("68681: FIFO overflow\n");
SR |= STATUS_OVERRUN_ERROR;
@@ -958,11 +1137,11 @@ void duart_channel::tra_complete()
m_uart->clear_ISR_bits(INT_TXRDYB);
// if local loopback is on, write the transmitted data as if a byte had been received
- if ((MR2 & 0xC0) == 0x80)
+ if ((MR2 & 0xc0) == 0x80)
{
if (rx_fifo_num >= MC68681_RX_FIFO_SIZE)
{
- LOG( "68681: FIFO overflow\n" );
+ LOG("68681: FIFO overflow\n");
SR |= STATUS_OVERRUN_ERROR;
}
else
@@ -982,7 +1161,7 @@ void duart_channel::tra_complete()
void duart_channel::tra_callback()
{
// don't actually send in loopback mode
- if ((MR2&0xC0) != 0x80)
+ if ((MR2 & 0xc0) != 0x80)
{
int bit = transmit_register_get_data_bit();
//printf("%s ch %d transmit %d\n", tag(), m_ch, bit);
@@ -1021,7 +1200,7 @@ void duart_channel::update_interrupts()
{
SR &= ~STATUS_RECEIVER_READY;
}
- if ( rx_fifo_num == MC68681_RX_FIFO_SIZE )
+ if (rx_fifo_num == MC68681_RX_FIFO_SIZE)
{
SR |= STATUS_FIFO_FULL;
}
@@ -1032,40 +1211,33 @@ void duart_channel::update_interrupts()
}
// Handle the TxEMT and TxRDY bits based on mode
- switch(MR2&0xC0) // what mode are we in?
- {
- case 0x00: // normal mode
- if ( tx_enabled )
- {
- SR |= STATUS_TRANSMITTER_EMPTY;
- }
- else
- {
- SR &= ~STATUS_TRANSMITTER_EMPTY;
- }
- break;
- case 0x40: // automatic echo mode
+ switch (MR2 & 0xc0) // what mode are we in?
+ {
+ case 0x00: // normal mode
+ if (tx_enabled)
+ SR |= STATUS_TRANSMITTER_EMPTY;
+ else
SR &= ~STATUS_TRANSMITTER_EMPTY;
- SR &= ~STATUS_TRANSMITTER_READY;
break;
- case 0x80: // local loopback mode
- if ( tx_enabled )
- {
- SR |= STATUS_TRANSMITTER_EMPTY;
- }
- else
- {
- SR &= ~STATUS_TRANSMITTER_EMPTY;
- }
+ case 0x40: // automatic echo mode
+ SR &= ~STATUS_TRANSMITTER_EMPTY;
+ SR &= ~STATUS_TRANSMITTER_READY;
break;
- case 0xC0: // remote loopback mode
- // write me, what the txrdy/txemt regs do for remote loopback mode is undocumented afaik, for now just clear both
+ case 0x80: // local loopback mode
+ if (tx_enabled)
+ SR |= STATUS_TRANSMITTER_EMPTY;
+ else
SR &= ~STATUS_TRANSMITTER_EMPTY;
- SR &= ~STATUS_TRANSMITTER_READY;
break;
- }
+ case 0xc0: // remote loopback mode
+ // write me, what the txrdy/txemt regs do for remote loopback mode is undocumented afaik, for now just clear both
+ SR &= ~STATUS_TRANSMITTER_EMPTY;
+ SR &= ~STATUS_TRANSMITTER_READY;
+ break;
+ }
+
// now handle the ISR bits
- if ( SR & STATUS_TRANSMITTER_READY )
+ if (SR & STATUS_TRANSMITTER_READY)
{
if (m_ch == 0)
m_uart->set_ISR_bits(INT_TXRDYA);
@@ -1080,9 +1252,9 @@ void duart_channel::update_interrupts()
m_uart->clear_ISR_bits(INT_TXRDYB);
}
//logerror("DEBUG: 68681 int check: before receiver test, SR%c is %02X, ISR is %02X\n", (ch+0x41), duart68681->channel[ch].SR, duart68681->ISR);
- if ( MR1 & MODE_RX_INT_SELECT_BIT )
+ if (MR1 & MODE_RX_INT_SELECT_BIT)
{
- if ( SR & STATUS_FIFO_FULL )
+ if (SR & STATUS_FIFO_FULL)
{
m_uart->set_ISR_bits((m_ch == 0) ? INT_RXRDY_FFULLA : INT_RXRDY_FFULLB);
}
@@ -1093,7 +1265,7 @@ void duart_channel::update_interrupts()
}
else
{
- if ( SR & STATUS_RECEIVER_READY )
+ if (SR & STATUS_RECEIVER_READY)
{
m_uart->set_ISR_bits((m_ch == 0) ? INT_RXRDY_FFULLA : INT_RXRDY_FFULLB);
}
@@ -1112,15 +1284,15 @@ uint8_t duart_channel::read_rx_fifo()
//printf("read_rx_fifo: rx_fifo_num %d\n", rx_fifo_num);
- if ( rx_fifo_num == 0 )
+ if (rx_fifo_num == 0)
{
- LOG( "68681 channel: rx fifo underflow\n" );
+ LOG("68681 channel: rx fifo underflow\n");
update_interrupts();
return 0;
}
rv = rx_fifo[rx_fifo_read_ptr++];
- if ( rx_fifo_read_ptr == MC68681_RX_FIFO_SIZE )
+ if (rx_fifo_read_ptr == MC68681_RX_FIFO_SIZE)
{
rx_fifo_read_ptr = 0;
}
@@ -1139,28 +1311,28 @@ uint8_t duart_channel::read_chan_reg(int reg)
switch (reg)
{
- case 0: // MR1/MR2
- if ( MR_ptr == 0 )
- {
- rv = MR1;
- MR_ptr = 1;
- }
- else
- {
- rv = MR2;
- }
- break;
+ case 0: // MR1/MR2
+ if (MR_ptr == 0)
+ {
+ rv = MR1;
+ MR_ptr = 1;
+ }
+ else
+ {
+ rv = MR2;
+ }
+ break;
- case 1: // SRA
- rv = SR;
- break;
+ case 1: // SRA
+ rv = SR;
+ break;
- case 2: // CSRA: reading this is prohibited
- break;
+ case 2: // CSRA: reading this is prohibited
+ break;
- case 3: // Rx holding register A
- rv = read_rx_fifo();
- break;
+ case 3: // Rx holding register A
+ rv = read_rx_fifo();
+ break;
}
return rv;
@@ -1176,8 +1348,8 @@ void duart_channel::write_chan_reg(int reg, uint8_t data)
case 0x01: /* CSR */
CSR = data;
- tx_baud_rate = m_uart->calc_baud(m_ch, data & 0xf);
- rx_baud_rate = m_uart->calc_baud(m_ch, (data>>4) & 0xf);
+ tx_baud_rate = m_uart->calc_baud(m_ch, false, data & 0xf);
+ rx_baud_rate = m_uart->calc_baud(m_ch, true, (data>>4) & 0xf);
//printf("%s ch %d CSR %02x Tx baud %d Rx baud %d\n", tag(), m_ch, data, tx_baud_rate, rx_baud_rate);
set_rcv_rate(rx_baud_rate);
set_tra_rate(tx_baud_rate);
@@ -1195,7 +1367,7 @@ void duart_channel::write_chan_reg(int reg, uint8_t data)
void duart_channel::write_MR(uint8_t data)
{
- if ( MR_ptr == 0 )
+ if (MR_ptr == 0)
{
MR1 = data;
MR_ptr = 1;
@@ -1211,120 +1383,111 @@ void duart_channel::write_MR(uint8_t data)
void duart_channel::recalc_framing()
{
parity_t parity = PARITY_NONE;
- switch ((MR1>>3) & 3)
+ switch ((MR1 >> 3) & 3)
{
- case 0: // with parity
- if (MR1 & 4)
- {
- parity = PARITY_ODD;
- }
- else
- {
- parity = PARITY_EVEN;
- }
- break;
+ case 0: // with parity
+ if (MR1 & 4)
+ parity = PARITY_ODD;
+ else
+ parity = PARITY_EVEN;
+ break;
- case 1: // force parity
- if (MR1 & 4)
- {
- parity = PARITY_MARK;
- }
- else
- {
- parity = PARITY_SPACE;
- }
- break;
+ case 1: // force parity
+ if (MR1 & 4)
+ parity = PARITY_MARK;
+ else
+ parity = PARITY_SPACE;
+ break;
- case 2: // no parity
- parity = PARITY_NONE;
- break;
+ case 2: // no parity
+ parity = PARITY_NONE;
+ break;
- case 3: // multidrop mode
- // fatalerror("68681: multidrop parity not supported\n");
- // Apollo DEX CPU will test this; omit to abort the emulation
- logerror("68681: multidrop parity not supported\n");
- break;
+ case 3: // multidrop mode
+ // fatalerror("68681: multidrop parity not supported\n");
+ // Apollo DEX CPU will test this; omit to abort the emulation
+ logerror("68681: multidrop parity not supported\n");
+ break;
}
stop_bits_t stopbits = STOP_BITS_0;
switch ((MR2 >> 2) & 3)
{
- case 0:
- case 1:
- stopbits = STOP_BITS_1;
- break;
+ case 0:
+ case 1:
+ stopbits = STOP_BITS_1;
+ break;
- case 2: // "1.5 async, 2 sync"
- stopbits = STOP_BITS_1_5;
- break;
+ case 2: // "1.5 async, 2 sync"
+ stopbits = STOP_BITS_1_5;
+ break;
- case 3:
- stopbits = STOP_BITS_2;
- break;
+ case 3:
+ stopbits = STOP_BITS_2;
+ break;
}
//printf("%s ch %d MR1 %02x MR2 %02x => %d bits / char, %d stop bits, parity %d\n", tag(), m_ch, MR1, MR2, (MR1 & 3)+5, stopbits, parity);
- set_data_frame(1, (MR1 & 3)+5, parity, stopbits);
+ set_data_frame(1, (MR1 & 3) + 5, parity, stopbits);
}
void duart_channel::write_CR(uint8_t data)
{
CR = data;
- switch( (data >> 4) & 0x07 )
+ switch ((data >> 4) & 0x07)
{
- case 0: /* No command */
- break;
- case 1: /* Reset MR pointer. Causes the channel MR pointer to point to MR1 */
- MR_ptr = 0;
- break;
- case 2: /* Reset channel receiver (disable receiver and flush fifo) */
- rx_enabled = 0;
- SR &= ~STATUS_RECEIVER_READY;
- SR &= ~STATUS_OVERRUN_ERROR; // is this correct?
- rx_fifo_read_ptr = 0;
- rx_fifo_write_ptr = 0;
- rx_fifo_num = 0;
- receive_register_reset();
- break;
- case 3: /* Reset channel transmitter */
- tx_enabled = 0;
- SR &= ~STATUS_TRANSMITTER_READY;
- if (m_ch == 0)
- m_uart->clear_ISR_bits(INT_TXRDYA);
- else
- m_uart->clear_ISR_bits(INT_TXRDYB);
- transmit_register_reset();
- break;
- case 4: /* Reset Error Status */
- SR &= ~(STATUS_RECEIVED_BREAK | STATUS_FRAMING_ERROR | STATUS_PARITY_ERROR | STATUS_OVERRUN_ERROR);
- break;
- case 5: /* Reset Channel break change interrupt */
- if ( m_ch == 0 )
- {
- m_uart->clear_ISR_bits(INT_DELTA_BREAK_A);
- }
- else
- {
- m_uart->clear_ISR_bits(INT_DELTA_BREAK_B);
- }
- break;
- /* TODO: case 6 and case 7 are start break and stop break respectively, which start or stop holding the TxDA or TxDB line low (space) after whatever data is in the buffer finishes transmitting (following the stop bit?), or after two bit-times if no data is being transmitted */
- default:
- LOG( "68681: Unhandled command (%x) in CR%d\n", (data >> 4) & 0x07, m_ch );
- break;
+ case 0: /* No command */
+ break;
+ case 1: /* Reset MR pointer. Causes the channel MR pointer to point to MR1 */
+ MR_ptr = 0;
+ break;
+ case 2: /* Reset channel receiver (disable receiver and flush fifo) */
+ rx_enabled = 0;
+ SR &= ~STATUS_RECEIVER_READY;
+ SR &= ~STATUS_OVERRUN_ERROR; // is this correct?
+ rx_fifo_read_ptr = 0;
+ rx_fifo_write_ptr = 0;
+ rx_fifo_num = 0;
+ receive_register_reset();
+ break;
+ case 3: /* Reset channel transmitter */
+ tx_enabled = 0;
+ SR &= ~STATUS_TRANSMITTER_READY;
+ if (m_ch == 0)
+ m_uart->clear_ISR_bits(INT_TXRDYA);
+ else
+ m_uart->clear_ISR_bits(INT_TXRDYB);
+ transmit_register_reset();
+ break;
+ case 4: /* Reset Error Status */
+ SR &= ~(STATUS_RECEIVED_BREAK | STATUS_FRAMING_ERROR | STATUS_PARITY_ERROR | STATUS_OVERRUN_ERROR);
+ break;
+ case 5: /* Reset Channel break change interrupt */
+ if (m_ch == 0)
+ m_uart->clear_ISR_bits(INT_DELTA_BREAK_A);
+ else
+ m_uart->clear_ISR_bits(INT_DELTA_BREAK_B);
+ break;
+ /* TODO: case 6 and case 7 are start break and stop break respectively, which start or stop holding the TxDA or TxDB line low (space) after whatever data is in the buffer finishes transmitting (following the stop bit?), or after two bit-times if no data is being transmitted */
+ default:
+ LOG("68681: Unhandled command (%x) in CR%d\n", (data >> 4) & 0x07, m_ch);
+ break;
}
- if (BIT(data, 0)) {
+ if (BIT(data, 0))
+ {
rx_enabled = 1;
}
- if (BIT(data, 1)) {
+ if (BIT(data, 1))
+ {
rx_enabled = 0;
SR &= ~STATUS_RECEIVER_READY;
}
- if (BIT(data, 2)) {
+ if (BIT(data, 2))
+ {
tx_enabled = 1;
tx_ready = 1;
SR |= STATUS_TRANSMITTER_READY;
@@ -1333,7 +1496,8 @@ void duart_channel::write_CR(uint8_t data)
else
m_uart->set_ISR_bits(INT_TXRDYB);
}
- if (BIT(data, 3)) {
+ if (BIT(data, 3))
+ {
tx_enabled = 0;
tx_ready = 0;
SR &= ~STATUS_TRANSMITTER_READY;
@@ -1371,7 +1535,7 @@ void duart_channel::write_TX(uint8_t data)
update_interrupts();
}
-void duart_channel::ACR_updated()
+void duart_channel::baud_updated()
{
write_chan_reg(1, CSR);
}
diff --git a/src/devices/machine/mc68681.h b/src/devices/machine/mc68681.h
index 9a706ee6087..6be2e9209bc 100644
--- a/src/devices/machine/mc68681.h
+++ b/src/devices/machine/mc68681.h
@@ -59,7 +59,7 @@ public:
uint8_t read_rx_fifo();
- void ACR_updated();
+ void baud_updated();
uint8_t get_chan_CSR();
@@ -123,8 +123,8 @@ public:
virtual DECLARE_READ8_MEMBER(read);
virtual DECLARE_WRITE8_MEMBER(write);
- DECLARE_WRITE_LINE_MEMBER( rx_a_w ) { m_chanA->device_serial_interface::rx_w((uint8_t)state); }
- DECLARE_WRITE_LINE_MEMBER( rx_b_w ) { m_chanB->device_serial_interface::rx_w((uint8_t)state); }
+ DECLARE_WRITE_LINE_MEMBER(rx_a_w) { m_chanA->device_serial_interface::rx_w((uint8_t)state); }
+ DECLARE_WRITE_LINE_MEMBER(rx_b_w) { m_chanB->device_serial_interface::rx_w((uint8_t)state); }
template <class Object> devcb_base &set_irq_cb(Object &&cb) { return write_irq.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_a_tx_cb(Object &&cb) { return write_a_tx.set_callback(std::forward<Object>(cb)); }
@@ -138,13 +138,13 @@ public:
auto outport_cb() { return write_outport.bind(); }
// new-style push handlers for input port bits
- DECLARE_WRITE_LINE_MEMBER( ip0_w );
- DECLARE_WRITE_LINE_MEMBER( ip1_w );
- DECLARE_WRITE_LINE_MEMBER( ip2_w );
- DECLARE_WRITE_LINE_MEMBER( ip3_w );
- DECLARE_WRITE_LINE_MEMBER( ip4_w );
- DECLARE_WRITE_LINE_MEMBER( ip5_w );
- DECLARE_WRITE_LINE_MEMBER( ip6_w );
+ DECLARE_WRITE_LINE_MEMBER(ip0_w);
+ DECLARE_WRITE_LINE_MEMBER(ip1_w);
+ DECLARE_WRITE_LINE_MEMBER(ip2_w);
+ DECLARE_WRITE_LINE_MEMBER(ip3_w);
+ DECLARE_WRITE_LINE_MEMBER(ip4_w);
+ DECLARE_WRITE_LINE_MEMBER(ip5_w);
+ DECLARE_WRITE_LINE_MEMBER(ip6_w);
bool irq_pending() const { return (ISR & IMR) != 0; }
@@ -165,12 +165,15 @@ protected:
virtual void update_interrupts();
private:
- TIMER_CALLBACK_MEMBER( duart_timer_callback );
+ TIMER_CALLBACK_MEMBER(duart_timer_callback);
+protected:
/* registers */
uint8_t ACR; /* Auxiliary Control Register */
uint8_t IMR; /* Interrupt Mask Register */
uint8_t ISR; /* Interrupt Status Register */
+
+private:
uint8_t OPCR; /* Output Port Conf. Register */
uint8_t OPR; /* Output Port Register */
PAIR CTR; /* Counter/Timer Preset Value */
@@ -186,7 +189,7 @@ private:
double get_ct_rate();
uint16_t get_ct_count();
void start_ct(int count);
- int calc_baud(int ch, uint8_t data);
+ virtual int calc_baud(int ch, bool rx, uint8_t data);
void clear_ISR_bits(int mask);
void set_ISR_bits(int mask);
@@ -230,6 +233,7 @@ protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void update_interrupts() override;
+ mc68681_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
private:
bool m_read_vector; // if this is read and IRQ is active, it counts as pulling IACK
@@ -245,8 +249,8 @@ public:
template <class Object> devcb_base &set_c_tx_cb(Object &&cb) { return write_c_tx.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_d_tx_cb(Object &&cb) { return write_d_tx.set_callback(std::forward<Object>(cb)); }
- DECLARE_WRITE_LINE_MEMBER( rx_c_w ) { m_chanC->device_serial_interface::rx_w((uint8_t)state); }
- DECLARE_WRITE_LINE_MEMBER( rx_d_w ) { m_chanD->device_serial_interface::rx_w((uint8_t)state); }
+ DECLARE_WRITE_LINE_MEMBER(rx_c_w) { m_chanC->device_serial_interface::rx_w((uint8_t)state); }
+ DECLARE_WRITE_LINE_MEMBER(rx_d_w) { m_chanD->device_serial_interface::rx_w((uint8_t)state); }
virtual DECLARE_READ8_MEMBER(read) override;
virtual DECLARE_WRITE8_MEMBER(write) override;
@@ -270,10 +274,29 @@ protected:
mc68340_duart_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
};
+class xr68c681_device : public mc68681_device
+{
+public:
+ xr68c681_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ virtual DECLARE_READ8_MEMBER(read) override;
+ virtual DECLARE_WRITE8_MEMBER(write) override;
+
+protected:
+ virtual void device_start() override;
+ virtual void device_reset() override;
+
+private:
+ virtual int calc_baud(int ch, bool rx, uint8_t data) override;
+
+ bool m_XTXA,m_XRXA,m_XTXB,m_XRXB; /* X bits for the BRG (selects between 2 BRG tables) */
+};
+
DECLARE_DEVICE_TYPE(SCN2681, scn2681_device)
DECLARE_DEVICE_TYPE(MC68681, mc68681_device)
DECLARE_DEVICE_TYPE(SC28C94, sc28c94_device)
DECLARE_DEVICE_TYPE(MC68340_DUART, mc68340_duart_device)
+DECLARE_DEVICE_TYPE(XR68C681, xr68c681_device)
DECLARE_DEVICE_TYPE(DUART_CHANNEL, duart_channel)
#endif // MAME_MACHINE_MC68681_H
diff --git a/src/devices/machine/nscsi_cd.cpp b/src/devices/machine/nscsi_cd.cpp
index 8211657b73c..8827af488ea 100644
--- a/src/devices/machine/nscsi_cd.cpp
+++ b/src/devices/machine/nscsi_cd.cpp
@@ -2,7 +2,6 @@
// copyright-holders:Olivier Galibert
#include "emu.h"
#include "machine/nscsi_cd.h"
-#include "imagedev/chd_cd.h"
#define VERBOSE 1
#include "logmacro.h"
@@ -10,7 +9,7 @@
DEFINE_DEVICE_TYPE(NSCSI_CDROM, nscsi_cdrom_device, "scsi_cdrom", "SCSI CD-ROM")
nscsi_cdrom_device::nscsi_cdrom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- nscsi_full_device(mconfig, NSCSI_CDROM, tag, owner, clock), cdrom(nullptr), bytes_per_block(bytes_per_sector), lba(0), cur_sector(0)
+ nscsi_full_device(mconfig, NSCSI_CDROM, tag, owner, clock), cdrom(nullptr), bytes_per_block(bytes_per_sector), lba(0), cur_sector(0), image(*this, "image")
{
}
@@ -26,7 +25,7 @@ void nscsi_cdrom_device::device_start()
void nscsi_cdrom_device::device_reset()
{
nscsi_full_device::device_reset();
- cdrom = subdevice<cdrom_image_device>("image")->get_cdrom_file();
+ cdrom = image->get_cdrom_file();
lba = 0;
cur_sector = -1;
}
@@ -49,7 +48,7 @@ uint8_t nscsi_cdrom_device::scsi_get_data(int id, int pos)
{
if(id != 2)
return nscsi_full_device::scsi_get_data(id, pos);
- int sector = (lba * bytes_per_block + pos) / bytes_per_sector;
+ const int sector = (lba * bytes_per_block + pos) / bytes_per_sector;
if(sector != cur_sector) {
cur_sector = sector;
if(!cdrom_read_data(cdrom, sector, sector_buffer, CD_TRACK_MODE1)) {
@@ -70,6 +69,19 @@ void nscsi_cdrom_device::scsi_command()
{
int blocks;
+ // check for media change
+ if((cdrom != image->get_cdrom_file()) && (scsi_cmdbuf[0] != SC_INQUIRY))
+ {
+ // clear media change condition
+ cdrom = image->get_cdrom_file();
+ cur_sector = -1;
+
+ // report unit attention condition
+ sense(false, 6);
+ scsi_status_complete(SS_CHECK_CONDITION);
+ return;
+ }
+
switch(scsi_cmdbuf[0]) {
case SC_TEST_UNIT_READY:
LOG("command TEST UNIT READY\n");
@@ -109,7 +121,7 @@ void nscsi_cdrom_device::scsi_command()
int size = scsi_cmdbuf[4];
switch(page) {
case 0:
- std::fill_n(scsi_cmdbuf, 148, 0);
+ std::fill_n(scsi_cmdbuf, 36, 0);
// vendor and product information must be padded with spaces
std::fill_n(&scsi_cmdbuf[8], 28, 0x20);
@@ -118,13 +130,14 @@ void nscsi_cdrom_device::scsi_command()
scsi_cmdbuf[1] = 0x80; // media is removable
scsi_cmdbuf[2] = 0x05; // device complies with SPC-3 standard
scsi_cmdbuf[3] = 0x02; // response data format = SPC-3 standard
+ scsi_cmdbuf[4] = 32; // additional length
// some Konami games freak out if this isn't "Sony", so we'll lie
// this is the actual drive on my Nagano '98 board
strncpy((char *)&scsi_cmdbuf[8], "Sony", 4);
strncpy((char *)&scsi_cmdbuf[16], "CDU-76S", 7);
strncpy((char *)&scsi_cmdbuf[32], "1.0", 3);
- if(size > 148)
- size = 148;
+ if(size > 36)
+ size = 36;
scsi_data_in(SBUF_MAIN, size);
break;
}
@@ -133,7 +146,8 @@ void nscsi_cdrom_device::scsi_command()
}
case SC_START_STOP_UNIT:
- LOG("command START STOP UNIT\n");
+ LOG("command %s UNIT%s\n", (scsi_cmdbuf[4] & 0x1) ? "START" : "STOP",
+ (scsi_cmdbuf[4] & 0x2) ? (scsi_cmdbuf[4] & 0x1) ? " (LOAD)" : " (EJECT)" : "");
scsi_status_complete(SS_GOOD);
break;
@@ -196,7 +210,7 @@ void nscsi_cdrom_device::scsi_command()
const uint32_t temp = cdrom_get_track_start(cdrom, 0xaa) * (bytes_per_sector / bytes_per_block) - 1;
scsi_cmdbuf[pos++] = 0x08; // Block descriptor length
- scsi_cmdbuf[pos++] = (temp>>24) & 0xff;
+ scsi_cmdbuf[pos++] = 0x00; // density code
scsi_cmdbuf[pos++] = (temp>>16) & 0xff;
scsi_cmdbuf[pos++] = (temp>>8) & 0xff;
scsi_cmdbuf[pos++] = (temp & 0xff);
@@ -251,7 +265,7 @@ void nscsi_cdrom_device::scsi_command()
case SC_PREVENT_ALLOW_MEDIUM_REMOVAL:
// TODO: support eject prevention
- LOG("command PREVENT ALLOW MEDIUM REMOVAL\n");
+ LOG("command %s MEDIUM REMOVAL\n", (scsi_cmdbuf[4] & 0x1) ? "PREVENT" : "ALLOW");
scsi_status_complete(SS_GOOD);
break;
diff --git a/src/devices/machine/nscsi_cd.h b/src/devices/machine/nscsi_cd.h
index 95afedfdf66..45e470b4c32 100644
--- a/src/devices/machine/nscsi_cd.h
+++ b/src/devices/machine/nscsi_cd.h
@@ -6,6 +6,7 @@
#pragma once
#include "machine/nscsi_bus.h"
+#include "imagedev/chd_cd.h"
#include "cdrom.h"
class nscsi_cdrom_device : public nscsi_full_device
@@ -30,6 +31,7 @@ private:
cdrom_file *cdrom;
uint32_t bytes_per_block;
int lba, cur_sector;
+ required_device<cdrom_image_device> image;
void return_no_cd();
};
diff --git a/src/devices/sound/aica.cpp b/src/devices/sound/aica.cpp
index ad7d5467c3d..3c66130fb77 100644
--- a/src/devices/sound/aica.cpp
+++ b/src/devices/sound/aica.cpp
@@ -72,10 +72,10 @@
#define IMXL(slot) ((slot->udata.data[0x20/2]>>0x4)&0x000F)
#define DISDL(slot) ((slot->udata.data[0x24/2]>>0x8)&0x000F)
-#define DIPAN(slot) ((slot->udata.data[0x24/2]>>0x0)&0x001F)
+#define DIPAN(slot) (MONO() ? 0 : ((slot->udata.data[0x24/2]>>0x0)&0x001F))
#define EFSDL(slot) ((m_EFSPAN[slot*4]>>8)&0x000f)
-#define EFPAN(slot) ((m_EFSPAN[slot*4]>>0)&0x001f)
+#define EFPAN(slot) (MONO() ? 0 : ((m_EFSPAN[slot*4]>>0)&0x001f))
//Unimplemented
#define Q(slot) ((slot->udata.data[0x28/2]>>0x0)&0x001F) // (0.75 × register value - 3)
@@ -99,6 +99,7 @@ static constexpr double DRTimes[64]={100000/*infinity*/,100000/*infinity*/,11820
920.0,790.0,690.0,550.0,460.0,390.0,340.0,270.0,230.0,200.0,170.0,140.0,110.0,98.0,85.0,68.0,57.0,49.0,43.0,34.0,
28.0,25.0,22.0,18.0,14.0,12.0,11.0,8.5,7.1,6.1,5.4,4.3,3.6,3.1};
+#define MONO(aica) ((m_udata.data[0]>>0x0)&0x8000)
#define MEM8MB(aica) ((m_udata.data[0]>>0x0)&0x0200)
#define DAC18B(aica) ((m_udata.data[0]>>0x0)&0x0100)
#define MVOL(aica) ((m_udata.data[0]>>0x0)&0x000F)
@@ -505,24 +506,7 @@ void aica_device::Init()
m_ARTABLE[0]=m_DRTABLE[0]=0; //Infinite time
m_ARTABLE[1]=m_DRTABLE[1]=0; //Infinite time
- for(i=2;i<64;++i)
- {
- double t,step,scale;
- t=ARTimes[i]; //In ms
- if(t!=0.0)
- {
- step=(1023*1000.0)/(44100.0*t);
- scale=(double) (1<<EG_SHIFT);
- m_ARTABLE[i]=(int) (step*scale);
- }
- else
- m_ARTABLE[i]=1024<<EG_SHIFT;
-
- t=DRTimes[i]; //In ms
- step=(1023*1000.0)/(44100.0*t);
- scale=(double) (1<<EG_SHIFT);
- m_DRTABLE[i]=(int) (step*scale);
- }
+ ClockChange();
// make sure all the slots are off
for(i=0;i<64;++i)
@@ -535,8 +519,6 @@ void aica_device::Init()
}
AICALFO_Init();
- m_buffertmpl=make_unique_clear<int32_t[]>(44100);
- m_buffertmpr=make_unique_clear<int32_t[]>(44100);
// no "pend"
m_udata.data[0xa0/2] = 0;
@@ -546,6 +528,32 @@ void aica_device::Init()
m_TimCnt[2] = 0xffff;
}
+void aica_device::ClockChange()
+{
+ m_rate = ((double)clock()) / 512.0;
+ for(int i=2;i<64;++i)
+ {
+ double t,step,scale;
+ t=ARTimes[i]; //In ms
+ if(t!=0.0)
+ {
+ step=(1023*1000.0)/(m_rate*t);
+ scale=(double) (1<<EG_SHIFT);
+ m_ARTABLE[i]=(int) (step*scale);
+ }
+ else
+ m_ARTABLE[i]=1024<<EG_SHIFT;
+
+ t=DRTimes[i]; //In ms
+ step=(1023*1000.0)/(m_rate*t);
+ scale=(double) (1<<EG_SHIFT);
+ m_DRTABLE[i]=(int) (step*scale);
+ }
+
+ m_buffertmpl.resize((int)m_rate, 0);
+ m_buffertmpr.resize((int)m_rate, 0);
+}
+
void aica_device::UpdateSlotReg(int s,int r)
{
AICA_SLOT *slot=m_Slots+s;
@@ -675,10 +683,10 @@ void aica_device::UpdateReg(address_space &space, int reg)
if ((m_udata.data[0x90/2]&0xff) != 255)
{
- time = (44100 / m_TimPris[0]) / (255-(m_udata.data[0x90/2]&0xff));
+ time = (clock() / m_TimPris[0]) / (255-(m_udata.data[0x90/2]&0xff));
if (time)
{
- m_timerA->adjust(attotime::from_hz(time));
+ m_timerA->adjust(attotime::from_ticks(512, time));
}
}
}
@@ -694,10 +702,10 @@ void aica_device::UpdateReg(address_space &space, int reg)
if ((m_udata.data[0x94/2]&0xff) != 255)
{
- time = (44100 / m_TimPris[1]) / (255-(m_udata.data[0x94/2]&0xff));
+ time = (clock() / m_TimPris[1]) / (255-(m_udata.data[0x94/2]&0xff));
if (time)
{
- m_timerB->adjust(attotime::from_hz(time));
+ m_timerB->adjust(attotime::from_ticks(512, time));
}
}
}
@@ -713,10 +721,10 @@ void aica_device::UpdateReg(address_space &space, int reg)
if ((m_udata.data[0x98/2]&0xff) != 255)
{
- time = (44100 / m_TimPris[2]) / (255-(m_udata.data[0x98/2]&0xff));
+ time = (clock() / m_TimPris[2]) / (255-(m_udata.data[0x98/2]&0xff));
if (time)
{
- m_timerC->adjust(attotime::from_hz(time));
+ m_timerC->adjust(attotime::from_ticks(512, time));
}
}
}
@@ -1305,8 +1313,8 @@ void aica_device::DoMasterSamples(int nsamples)
}
}
- *bufl++ = ICLIP16(smpl>>3);
- *bufr++ = ICLIP16(smpr>>3);
+ *bufl++ = (ICLIP16(smpl>>3)*m_LPANTABLE[MVOL()<<0xd])>>SHIFT;
+ *bufr++ = (ICLIP16(smpr>>3)*m_LPANTABLE[MVOL()<<0xd])>>SHIFT;
}
}
@@ -1425,7 +1433,7 @@ void aica_device::device_start()
m_irq_cb.resolve_safe();
m_main_irq_cb.resolve_safe();
- m_stream = machine().sound().stream_alloc(*this, 0, 2, 44100);
+ m_stream = machine().sound().stream_alloc(*this, 0, 2, (int)m_rate);
// save state
save_item(NAME(m_IrqTimA));
@@ -1442,6 +1450,17 @@ void aica_device::device_start()
save_item(NAME(m_TimCnt),3);
}
+//-------------------------------------------------
+// device_clock_changed - called if the clock
+// changes
+//-------------------------------------------------
+
+void aica_device::device_clock_changed()
+{
+ ClockChange();
+ m_stream->set_sample_rate((int)m_rate);
+}
+
void aica_device::set_ram_base(void *base, int size)
{
m_AICARAM = (unsigned char *)base;
@@ -1481,12 +1500,13 @@ READ16_MEMBER( aica_device::midi_out_r )
return val;
}
-DEFINE_DEVICE_TYPE(AICA, aica_device, "aica", "AICA")
+DEFINE_DEVICE_TYPE(AICA, aica_device, "aica", "Yamaha AICA")
aica_device::aica_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, AICA, tag, owner, clock),
device_sound_interface(mconfig, *this),
m_master(false),
+ m_rate(44100.0),
m_roffset(0),
m_irq_cb(*this),
m_main_irq_cb(*this),
@@ -1498,8 +1518,6 @@ aica_device::aica_device(const machine_config &mconfig, const char *tag, device_
m_AICARAM_LENGTH(0),
m_RAM_MASK(0),
m_RAM_MASK16(0),
- m_buffertmpl(nullptr),
- m_buffertmpr(nullptr),
m_IrqTimA(0),
m_IrqTimBC(0),
m_IrqMidi(0),
@@ -1651,7 +1669,7 @@ signed int aica_device::AICAALFO_Step(AICA_LFO_t *LFO)
void aica_device::AICALFO_ComputeStep(AICA_LFO_t *LFO,uint32_t LFOF,uint32_t LFOWS,uint32_t LFOS,int ALFO)
{
- float step=(float) LFOFreq[LFOF]*256.0f/(float)44100.0f;
+ float step=(float) LFOFreq[LFOF]*256.0f/(float)m_rate;
LFO->phase_step=(unsigned int) ((float) (1<<LFO_SHIFT)*step);
if(ALFO)
{
diff --git a/src/devices/sound/aica.h b/src/devices/sound/aica.h
index 91e7be6f6d2..3c78692ee97 100644
--- a/src/devices/sound/aica.h
+++ b/src/devices/sound/aica.h
@@ -51,6 +51,7 @@ public:
protected:
// device-level overrides
virtual void device_start() override;
+ virtual void device_clock_changed() override;
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) override;
@@ -128,6 +129,7 @@ private:
void StartSlot(AICA_SLOT *slot);
void StopSlot(AICA_SLOT *slot,int keyoff);
void Init();
+ void ClockChange();
void UpdateSlotReg(int s,int r);
void UpdateReg(address_space &space, int reg);
void UpdateSlotRegR(int slot,int reg);
@@ -145,6 +147,7 @@ private:
void AICALFO_ComputeStep(AICA_LFO_t *LFO,uint32_t LFOF,uint32_t LFOWS,uint32_t LFOS,int ALFO);
bool m_master;
+ double m_rate;
int m_roffset; /* offset in the region */
devcb_write_line m_irq_cb;
devcb_write_line m_main_irq_cb;
@@ -165,8 +168,8 @@ private:
uint32_t m_AICARAM_LENGTH, m_RAM_MASK, m_RAM_MASK16;
sound_stream * m_stream;
- std::unique_ptr<int32_t[]> m_buffertmpl;
- std::unique_ptr<int32_t[]> m_buffertmpr;
+ std::vector<int32_t> m_buffertmpl;
+ std::vector<int32_t> m_buffertmpr;
uint32_t m_IrqTimA;
uint32_t m_IrqTimBC;
diff --git a/src/devices/sound/x1_010.cpp b/src/devices/sound/x1_010.cpp
index 226d956c268..b94851c0510 100644
--- a/src/devices/sound/x1_010.cpp
+++ b/src/devices/sound/x1_010.cpp
@@ -87,17 +87,17 @@ struct X1_010_CHANNEL {
DEFINE_DEVICE_TYPE(X1_010, x1_010_device, "x1_010", "Seta X1-010")
x1_010_device::x1_010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : device_t(mconfig, X1_010, tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_region(*this, DEVICE_SELF),
- m_rate(0),
- m_xor(0),
- m_stream(nullptr),
- m_sound_enable(0),
- m_base_clock(0)
+ : device_t(mconfig, X1_010, tag, owner, clock)
+ , device_sound_interface(mconfig, *this)
+ , device_rom_interface(mconfig, *this, 20)
+ , m_rate(0)
+ , m_xor(0)
+ , m_stream(nullptr)
+ , m_sound_enable(0)
+ , m_reg(nullptr)
+ , m_HI_WORD_BUF(nullptr)
+ , m_base_clock(0)
{
- std::fill(std::begin(m_reg), std::end(m_reg), 0);
- std::fill(std::begin(m_HI_WORD_BUF), std::end(m_HI_WORD_BUF), 0);
std::fill(std::begin(m_smp_offset), std::end(m_smp_offset), 0);
std::fill(std::begin(m_env_offset), std::end(m_env_offset), 0);
}
@@ -123,15 +123,40 @@ void x1_010_device::device_start()
/* get stream channels */
m_stream = machine().sound().stream_alloc(*this, 0, 2, m_rate);
+ m_reg = make_unique_clear<uint8_t[]>(0x2000);
+ m_HI_WORD_BUF = make_unique_clear<uint8_t[]>(0x2000);
+
save_item(NAME(m_rate));
save_item(NAME(m_sound_enable));
- save_item(NAME(m_reg));
- save_item(NAME(m_HI_WORD_BUF));
+ save_pointer(NAME(m_reg), 0x2000);
+ save_pointer(NAME(m_HI_WORD_BUF), 0x2000);
save_item(NAME(m_smp_offset));
save_item(NAME(m_env_offset));
save_item(NAME(m_base_clock));
}
+//-------------------------------------------------
+// device_clock_changed - called if the clock
+// changes
+//-------------------------------------------------
+
+void x1_010_device::device_clock_changed()
+{
+ m_base_clock = clock();
+ m_rate = clock() / 512;
+
+ m_stream->set_sample_rate(m_rate);
+}
+
+//-------------------------------------------------
+// rom_bank_updated - the rom bank has changed
+//-------------------------------------------------
+
+void x1_010_device::rom_bank_updated()
+{
+ m_stream->update();
+}
+
void x1_010_device::enable_w(int data)
{
@@ -193,9 +218,9 @@ void x1_010_device::sound_stream_update(sound_stream &stream, stream_sample_t **
{
X1_010_CHANNEL *reg;
int ch, i, volL, volR, freq, div;
- int8_t *start, *end, data;
+ int8_t data;
uint8_t *env;
- uint32_t smp_offs, smp_step, env_offs, env_step, delta;
+ uint32_t start, end, smp_offs, smp_step, env_offs, env_step, delta;
// mixer buffer zero clear
memset( outputs[0], 0, samples*sizeof(*outputs[0]) );
@@ -210,8 +235,8 @@ void x1_010_device::sound_stream_update(sound_stream &stream, stream_sample_t **
stream_sample_t *bufR = outputs[1];
div = (reg->status&0x80) ? 1 : 0;
if( (reg->status&2) == 0 ) { // PCM sampling
- start = m_region + reg->start*0x1000;
- end = m_region + (0x100-reg->end)*0x1000;
+ start = reg->start*0x1000;
+ end = (0x100-reg->end)*0x1000;
volL = ((reg->volume>>4)&0xf)*VOL_BASE;
volR = ((reg->volume>>0)&0xf)*VOL_BASE;
smp_offs = m_smp_offset[ch];
@@ -232,14 +257,14 @@ void x1_010_device::sound_stream_update(sound_stream &stream, stream_sample_t **
reg->status &= 0xfe; // Key off
break;
}
- data = *(start+delta);
+ data = (int8_t)(read_byte(start+delta));
*bufL++ += (data*volL/256);
*bufR++ += (data*volR/256);
smp_offs += smp_step;
}
m_smp_offset[ch] = smp_offs;
} else { // Wave form
- start = (int8_t *)&(m_reg[reg->volume*128+0x1000]);
+ start = (reg->volume*128+0x1000);
smp_offs = m_smp_offset[ch];
freq = ((reg->pitch_hi<<8)+reg->frequency)>>div;
smp_step = (uint32_t)((float)m_base_clock/128.0f/1024.0f/4.0f*freq*(1<<FREQ_BASE_BITS)/(float)m_rate);
@@ -263,7 +288,7 @@ void x1_010_device::sound_stream_update(sound_stream &stream, stream_sample_t **
vol = *(env+(delta&0x7f));
volL = ((vol>>4)&0xf)*VOL_BASE;
volR = ((vol>>0)&0xf)*VOL_BASE;
- data = *(start+((smp_offs>>FREQ_BASE_BITS)&0x7f));
+ data = (int8_t)(m_reg[start+((smp_offs>>FREQ_BASE_BITS)&0x7f)]);
*bufL++ += (data*volL/256);
*bufR++ += (data*volR/256);
smp_offs += smp_step;
diff --git a/src/devices/sound/x1_010.h b/src/devices/sound/x1_010.h
index 12bf9c975d8..45801d0bb2c 100644
--- a/src/devices/sound/x1_010.h
+++ b/src/devices/sound/x1_010.h
@@ -5,7 +5,7 @@
#pragma once
-class x1_010_device : public device_t, public device_sound_interface
+class x1_010_device : public device_t, public device_sound_interface, public device_rom_interface
{
public:
x1_010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
@@ -24,23 +24,26 @@ public:
protected:
// device-level overrides
virtual void device_start() override;
+ virtual void device_clock_changed() override;
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) override;
+ // device_rom_interface overrides
+ virtual void rom_bank_updated() override;
+
private:
static constexpr unsigned NUM_CHANNELS = 16;
// internal state
/* Variables only used here */
- required_region_ptr<int8_t> m_region; // ROM
int m_rate; // Output sampling rate (Hz)
int m_xor; // address XOR
sound_stream * m_stream; // Stream handle
int m_sound_enable; // sound output enable/disable
- uint8_t m_reg[0x2000]; // X1-010 Register & wave form area
- uint8_t m_HI_WORD_BUF[0x2000]; // X1-010 16bit access ram check avoidance work
+ std::unique_ptr<uint8_t[]> m_reg; // X1-010 Register & wave form area
+ std::unique_ptr<uint8_t[]> m_HI_WORD_BUF; // X1-010 16bit access ram check avoidance work
uint32_t m_smp_offset[NUM_CHANNELS];
uint32_t m_env_offset[NUM_CHANNELS];
diff --git a/src/devices/video/psx.cpp b/src/devices/video/psx.cpp
index c10c7def37c..4f59f55974d 100644
--- a/src/devices/video/psx.cpp
+++ b/src/devices/video/psx.cpp
@@ -18,16 +18,17 @@
#define VERBOSE_LEVEL ( 0 )
// device type definition
-DEFINE_DEVICE_TYPE(CXD8514Q, cxd8514q_device, "cxd8514q", "CXD8514Q GPU")
-DEFINE_DEVICE_TYPE(CXD8538Q, cxd8538q_device, "cxd8538q", "CXD8538Q GPU")
-DEFINE_DEVICE_TYPE(CXD8561Q, cxd8561q_device, "cxd8561q", "CXD8561Q GPU")
-DEFINE_DEVICE_TYPE(CXD8561BQ, cxd8561bq_device, "cxd8561bq", "CXD8561BQ GPU")
-DEFINE_DEVICE_TYPE(CXD8561CQ, cxd8561cq_device, "cxd8561cq", "CXD8561CQ GPU")
-DEFINE_DEVICE_TYPE(CXD8654Q, cxd8654q_device, "cxd8654q", "CXD8654Q GPU")
+DEFINE_DEVICE_TYPE(CXD8514Q, cxd8514q_device, "cxd8514q", "CXD8514Q GPU") // VRAM
+DEFINE_DEVICE_TYPE(CXD8538Q, cxd8538q_device, "cxd8538q", "CXD8538Q GPU") // VRAM
+DEFINE_DEVICE_TYPE(CXD8561Q, cxd8561q_device, "cxd8561q", "CXD8561Q GPU") // SGRAM
+DEFINE_DEVICE_TYPE(CXD8561BQ, cxd8561bq_device, "cxd8561bq", "CXD8561BQ GPU") // SGRAM
+DEFINE_DEVICE_TYPE(CXD8561CQ, cxd8561cq_device, "cxd8561cq", "CXD8561CQ GPU") // SGRAM
+DEFINE_DEVICE_TYPE(CXD8654Q, cxd8654q_device, "cxd8654q", "CXD8654Q GPU") // SGRAM
psxgpu_device::psxgpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, type, tag, owner, clock)
, device_video_interface(mconfig, *this)
+ , device_palette_interface(mconfig, *this)
, m_vblank_handler(*this)
{
}
@@ -36,6 +37,11 @@ void psxgpu_device::device_start()
{
m_vblank_handler.resolve_safe();
+ for( int n_colour = 0; n_colour < 0x10000; n_colour++ )
+ {
+ set_pen_color( n_colour, pal555(n_colour,0, 5, 10) );
+ }
+
if (type() == CXD8538Q)
{
psx_gpu_init( 1 );
@@ -316,17 +322,18 @@ void psxgpu_device::DebugCheckKeys()
#endif
}
-int psxgpu_device::DebugMeshDisplay( bitmap_ind16 &bitmap, const rectangle &cliprect )
+int psxgpu_device::DebugMeshDisplay( bitmap_rgb32 &bitmap, const rectangle &cliprect )
{
if( m_debug.b_mesh )
{
- copybitmap( bitmap, *m_debug.mesh, 0, 0, 0, 0, cliprect );
+ for (int y = cliprect.min_y; y <= cliprect.max_y; y++)
+ draw_scanline16( bitmap, cliprect.min_x, y, cliprect.max_x+1-cliprect.min_x, &m_debug.mesh.pix16(y), pens() );
}
m_debug.b_clear = 1;
return m_debug.b_mesh;
}
-int psxgpu_device::DebugTextureDisplay( bitmap_ind16 &bitmap )
+int psxgpu_device::DebugTextureDisplay( bitmap_rgb32 &bitmap )
{
uint32_t n_y;
@@ -361,7 +368,7 @@ int psxgpu_device::DebugTextureDisplay( bitmap_ind16 &bitmap )
}
p_n_interleave[ n_x ] = p_p_vram[ n_yi ][ n_xi ];
}
- draw_scanline16( bitmap, 0, n_y, width, p_n_interleave, screen().palette().pens() );
+ draw_scanline16( bitmap, 0, n_y, width, p_n_interleave, pens() );
}
}
return m_debug.b_texture;
@@ -534,11 +541,11 @@ void psxgpu_device::psx_gpu_init( int n_gputype )
p_n_greenb1[ n_level ] = ( ( n_level >> 5 ) & ( MAX_LEVEL - 1 ) ) * MAX_LEVEL;
p_n_blueb1[ n_level ] = ( ( n_level >> 10 ) & ( MAX_LEVEL - 1 ) ) * MAX_LEVEL;
- /* 24bit to 15 bit conversion */
- p_n_g0r0[ n_level ] = ( ( ( n_level >> 11 ) & ( MAX_LEVEL - 1 ) ) << 5 ) | ( ( ( n_level >> 3 ) & ( MAX_LEVEL - 1 ) ) << 0 );
- p_n_b0[ n_level ] = ( ( n_level >> 3 ) & ( MAX_LEVEL - 1 ) ) << 10;
- p_n_r1[ n_level ] = ( ( n_level >> 11 ) & ( MAX_LEVEL - 1 ) ) << 0;
- p_n_b1g1[ n_level ] = ( ( ( n_level >> 11 ) & ( MAX_LEVEL - 1 ) ) << 10 ) | ( ( ( n_level >> 3 ) & ( MAX_LEVEL - 1 ) ) << 5 );
+ /* 24bit color */
+ p_n_g0r0[ n_level ] = ( ( ( n_level >> 8 ) & 0xff ) << 8 ) | ( ( ( n_level >> 0 ) & 0xff ) << 16 );
+ p_n_b0[ n_level ] = ( ( n_level >> 0 ) & 0xff ) << 0;
+ p_n_r1[ n_level ] = ( ( n_level >> 8 ) & 0xff ) << 16;
+ p_n_b1g1[ n_level ] = ( ( ( n_level >> 8 ) & 0xff ) << 0 ) | ( ( ( n_level >> 0 ) & 0xff ) << 8 );
}
for( n_level = 0; n_level < MAX_LEVEL; n_level++ )
@@ -605,7 +612,7 @@ void psxgpu_device::psx_gpu_init( int n_gputype )
machine().save().register_postload( save_prepost_delegate( FUNC( psxgpu_device::updatevisiblearea ), this ) );
}
-uint32_t psxgpu_device::update_screen(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
+uint32_t psxgpu_device::update_screen(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
uint32_t n_x;
uint32_t n_y;
@@ -725,7 +732,7 @@ uint32_t psxgpu_device::update_screen(screen_device &screen, bitmap_ind16 &bitma
while( n_line > 0 )
{
uint16_t *p_n_src = p_p_vram[ n_y + n_displaystarty ] + 3 * n_x + n_displaystartx;
- uint16_t *p_n_dest = &bitmap.pix16(n_y + n_top, n_x + n_left);
+ uint32_t *p_n_dest = &bitmap.pix32(n_y + n_top, n_x + n_left);
n_column = n_columns;
while( n_column > 0 )
@@ -752,7 +759,7 @@ uint32_t psxgpu_device::update_screen(screen_device &screen, bitmap_ind16 &bitma
n_line = n_lines;
while( n_line > 0 )
{
- draw_scanline16( bitmap, n_x + n_left, n_y + n_top, n_columns, p_p_vram[ ( n_y + n_displaystarty ) & 1023 ] + n_x + n_displaystartx, nullptr );
+ draw_scanline16( bitmap, n_x + n_left, n_y + n_top, n_columns, p_p_vram[ ( n_y + n_displaystarty ) & 1023 ] + n_x + n_displaystartx, pens() );
n_y++;
n_line--;
}
@@ -3794,17 +3801,6 @@ void psxgpu_device::lightgun_set( int n_x, int n_y )
n_lightgun_y = n_y;
}
-PALETTE_INIT_MEMBER( psxgpu_device, psx )
-{
- uint32_t n_colour;
-
- for( n_colour = 0; n_colour < 0x10000; n_colour++ )
- {
- palette.set_pen_color( n_colour, pal555(n_colour,0, 5, 10) );
- }
-}
-
-
//-------------------------------------------------
// device_add_mconfig - add device configuration
//-------------------------------------------------
@@ -3817,8 +3813,4 @@ MACHINE_CONFIG_START(psxgpu_device::device_add_mconfig)
MCFG_SCREEN_VISIBLE_AREA( 0, 639, 0, 479 )
MCFG_SCREEN_UPDATE_DEVICE( DEVICE_SELF, psxgpu_device, update_screen )
((screen_device *)device)->register_vblank_callback(vblank_state_delegate(&psxgpu_device::vblank, this));
- MCFG_SCREEN_PALETTE("palette")
-
- MCFG_PALETTE_ADD( "palette", 65536 )
- MCFG_PALETTE_INIT_OWNER(psxgpu_device, psx)
MACHINE_CONFIG_END
diff --git a/src/devices/video/psx.h b/src/devices/video/psx.h
index 9693f390223..cd7928c1c99 100644
--- a/src/devices/video/psx.h
+++ b/src/devices/video/psx.h
@@ -12,8 +12,6 @@
#pragma once
-#include "emupal.h"
-
#define PSXGPU_DEBUG_VIEWER ( 0 )
@@ -50,7 +48,7 @@ DECLARE_DEVICE_TYPE(CXD8561BQ, cxd8561bq_device)
DECLARE_DEVICE_TYPE(CXD8561CQ, cxd8561cq_device)
DECLARE_DEVICE_TYPE(CXD8654Q, cxd8654q_device)
-class psxgpu_device : public device_t, public device_video_interface
+class psxgpu_device : public device_t, public device_video_interface, public device_palette_interface
{
public:
// configuration helpers
@@ -76,6 +74,9 @@ protected:
virtual void device_reset() override;
virtual void device_add_mconfig(machine_config &config) override;
+ // device_palette_interface overrides
+ virtual uint32_t palette_entries() const override { return 32*32*32*2; }
+
int vramSize;
private:
@@ -296,24 +297,23 @@ private:
uint16_t p_n_greensubtrans[ MAX_LEVEL * MAX_LEVEL ];
uint16_t p_n_bluesubtrans[ MAX_LEVEL * MAX_LEVEL ];
- uint16_t p_n_g0r0[ 0x10000 ];
- uint16_t p_n_b0[ 0x10000 ];
- uint16_t p_n_r1[ 0x10000 ];
- uint16_t p_n_b1g1[ 0x10000 ];
+ uint32_t p_n_g0r0[ 0x10000 ];
+ uint32_t p_n_b0[ 0x10000 ];
+ uint32_t p_n_r1[ 0x10000 ];
+ uint32_t p_n_b1g1[ 0x10000 ];
devcb_write_line m_vblank_handler;
void vblank(screen_device &screen, bool vblank_state);
- DECLARE_PALETTE_INIT( psx );
- uint32_t update_screen(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
+ uint32_t update_screen(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
#if defined(PSXGPU_DEBUG_VIEWER) && PSXGPU_DEBUG_VIEWER
void DebugMeshInit();
void DebugMesh( int n_coordx, int n_coordy );
void DebugMeshEnd();
void DebugCheckKeys();
- int DebugMeshDisplay( bitmap_ind16 &bitmap, const rectangle &cliprect );
- int DebugTextureDisplay( bitmap_ind16 &bitmap );
+ int DebugMeshDisplay( bitmap_rgb32 &bitmap, const rectangle &cliprect );
+ int DebugTextureDisplay( bitmap_rgb32 &bitmap );
psx_gpu_debug m_debug;
#endif
diff --git a/src/emu/romload.cpp b/src/emu/romload.cpp
index ff680b173a1..4945de6a197 100644
--- a/src/emu/romload.cpp
+++ b/src/emu/romload.cpp
@@ -1173,6 +1173,10 @@ chd_error rom_load_manager::open_disk_diff(emu_options &options, const rom_entry
void rom_load_manager::process_disk_entries(const char *regiontag, const rom_entry *parent_region, const rom_entry *romp, const char *locationtag)
{
+ /* remove existing disk entries for this region */
+ m_chd_list.erase(std::remove_if(m_chd_list.begin(), m_chd_list.end(),
+ [regiontag](std::unique_ptr<open_chd> &chd){ return !strcmp(chd->region(), regiontag); }), m_chd_list.end());
+
/* loop until we hit the end of this region */
for ( ; !ROMENTRY_ISREGIONEND(romp); romp++)
{
diff --git a/src/mame/audio/orbit.cpp b/src/mame/audio/orbit.cpp
index 47d5eee7051..646a1cbf793 100644
--- a/src/mame/audio/orbit.cpp
+++ b/src/mame/audio/orbit.cpp
@@ -7,7 +7,6 @@
*************************************************************************/
#include "emu.h"
#include "includes/orbit.h"
-#include "sound/discrete.h"
/*************************************
*
@@ -15,24 +14,24 @@
*
*************************************/
-WRITE8_MEMBER(orbit_state::orbit_note_w)
+WRITE8_MEMBER(orbit_state::note_w)
{
m_discrete->write(space, ORBIT_NOTE_FREQ, (~data) & 0xff);
}
-WRITE8_MEMBER(orbit_state::orbit_note_amp_w)
+WRITE8_MEMBER(orbit_state::note_amp_w)
{
m_discrete->write(space, ORBIT_ANOTE1_AMP, data & 0x0f);
m_discrete->write(space, ORBIT_ANOTE2_AMP, data >> 4);
}
-WRITE8_MEMBER(orbit_state::orbit_noise_amp_w)
+WRITE8_MEMBER(orbit_state::noise_amp_w)
{
m_discrete->write(space, ORBIT_NOISE1_AMP, data & 0x0f);
m_discrete->write(space, ORBIT_NOISE2_AMP, data >> 4);
}
-WRITE8_MEMBER(orbit_state::orbit_noise_rst_w)
+WRITE8_MEMBER(orbit_state::noise_rst_w)
{
m_discrete->write(space, ORBIT_NOISE_EN, 0);
}
diff --git a/src/mame/drivers/comebaby.cpp b/src/mame/drivers/comebaby.cpp
index 2729e4e236f..65bf27731f4 100644
--- a/src/mame/drivers/comebaby.cpp
+++ b/src/mame/drivers/comebaby.cpp
@@ -238,7 +238,7 @@ INPUT_PORTS_END
MACHINE_CONFIG_START(comebaby_state::comebaby)
/* basic machine hardware */
- MCFG_DEVICE_ADD("maincpu", PENTIUM, (66666666*19)/2) /* Actually a Celeron */
+ MCFG_DEVICE_ADD("maincpu", PENTIUM2, (66666666*19)/2) /* Actually a Celeron */
MCFG_DEVICE_PROGRAM_MAP(comebaby_map)
MCFG_DEVICE_IO_MAP(comebaby_io)
diff --git a/src/mame/drivers/dccons.cpp b/src/mame/drivers/dccons.cpp
index 66e8a137146..7735b9f98bc 100644
--- a/src/mame/drivers/dccons.cpp
+++ b/src/mame/drivers/dccons.cpp
@@ -621,12 +621,13 @@ MACHINE_CONFIG_START(dc_cons_state::dc)
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
- MCFG_DEVICE_ADD("aica", AICA, 0)
+
+ MCFG_DEVICE_ADD("aica", AICA, (XTAL(33'868'800)*2)/3) // 67.7376MHz(2*33.8688MHz), div 3 for audio block
MCFG_AICA_MASTER
MCFG_AICA_IRQ_CB(WRITELINE(*this, dc_state, aica_irq))
MCFG_AICA_MAIN_IRQ_CB(WRITELINE(*this, dc_state, sh4_aica_irq))
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
- MCFG_SOUND_ROUTE(0, "rspeaker", 1.0)
+ MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
MCFG_AICARTC_ADD("aicartc", XTAL(32'768))
diff --git a/src/mame/drivers/dec8.cpp b/src/mame/drivers/dec8.cpp
index ab40ed28395..710e5bbe002 100644
--- a/src/mame/drivers/dec8.cpp
+++ b/src/mame/drivers/dec8.cpp
@@ -1086,7 +1086,7 @@ static INPUT_PORTS_START( breywood )
INPUT_PORTS_END
-/* verified from HD6309 code - 'makyosen' coinage needs further checking when its REAL MCU is available */
+/* verified from HD6309 code */
static INPUT_PORTS_START( gondo )
PORT_START("IN0")
PLAYER1_JOYSTICK
@@ -2756,8 +2756,8 @@ ROM_START( makyosen )
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "ds05.h5", 0x8000, 0x8000, CRC(e6e28ca9) SHA1(3b1f8219331db1910bfb428f8964f8fc1063df6f) )
- ROM_REGION( 0x1000, "mcu", 0 ) /* ID8751H (fake) MCU based on 'gondo' one */
- ROM_LOAD( "ds-a.b1", 0x0000, 0x1000, BAD_DUMP CRC(f61b77cf) SHA1(2d3549876ea08623ce9da1d637853cb4c740300a)) // ds.b1
+ ROM_REGION( 0x1000, "mcu", 0 ) /* ID8751H MCU */
+ ROM_LOAD( "ds-a.b1", 0x0000, 0x1000, CRC(08f36e35) SHA1(e8913da71704a89fad41d5bfba45682119166681))
ROM_REGION( 0x08000, "gfx1", 0 ) /* characters */
ROM_LOAD( "ds14.b18", 0x00000, 0x08000, CRC(00cbe9c8) SHA1(de7b640de8fd54ee79194945c96d5768d09f483b) )
diff --git a/src/mame/drivers/funworld.cpp b/src/mame/drivers/funworld.cpp
index dac8e165478..efb12ddad11 100644
--- a/src/mame/drivers/funworld.cpp
+++ b/src/mame/drivers/funworld.cpp
@@ -48,6 +48,7 @@
* Pool 10 (Italian, set 6), C.M.C., 1996.
* Pool 10 (Italian, set 7), C.M.C., 1997.
* Pool 10 (Italian, set 8), C.M.C., 1997.
+ * Pool 10 (Italian, set 9), C.M.C., 1997.
* Pool 10 (Italian, Dino 4 hardware, encrypted), C.M.C., 1997.
* Royal (Pool 10 hack), unknown, 2001.
* Tortuga Family (Italian), C.M.C., 1997.
@@ -4497,6 +4498,25 @@ ROM_START( pool10i )
ROM_LOAD( "82s147.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) )
ROM_END
+ROM_START( pool10j )
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "cmcpool10.u2", 0x8000, 0x8000, CRC(f7fa2b12) SHA1(743563e51327b00dd638bcb2233e833ce74e62a0) )
+
+ ROM_REGION( 0x10000, "gfx1", 0 )
+ ROM_LOAD( "cmcpool10.u21", 0x0000, 0x8000, CRC(99c8c074) SHA1(f8082b08e895cbcd028a2b7cd961a7a2c8b2762c) )
+ ROM_LOAD( "cmcpool10.u20", 0x8000, 0x8000, CRC(9abedd0c) SHA1(f184a82e8ec2387069d631bcb77e890acd44b3f5) )
+
+ ROM_REGION( 0x0800, "nvram", 0 ) /* default NVRAM */
+ ROM_LOAD( "pool10j_nvram.bin", 0x0000, 0x0800, CRC(48684b02) SHA1(6f2fbd0e2621e31b881edd8056ff93ee78f331ab) )
+
+ ROM_REGION( 0x0200, "proms", 0 )
+ ROM_LOAD( "am27s29pc.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) )
+
+ ROM_REGION( 0x0600, "plds", 0 ) // all read protected
+ ROM_LOAD( "palce16v8h.u5", 0x0000, 0x0117, NO_DUMP )
+ ROM_LOAD( "palce20v8h.u22", 0x0200, 0x0157, NO_DUMP )
+ ROM_LOAD( "palce20v8h.u23", 0x0400, 0x0157, NO_DUMP )
+ROM_END
/*
Royal...
@@ -7103,6 +7123,7 @@ GAMEL( 1997, pool10f, pool10, cuoreuno, cuoreuno, funworld_state, empty_ini
GAMEL( 1996, pool10g, pool10, cuoreuno, cuoreuno, funworld_state, empty_init, ROT0, "C.M.C.", "Pool 10 (Italian, set 6)", 0, layout_jollycrd )
GAMEL( 1996, pool10h, pool10, cuoreuno, pool10, funworld_state, empty_init, ROT0, "C.M.C.", "Pool 10 (Italian, set 7)", 0, layout_jollycrd )
GAMEL( 1997, pool10i, pool10, cuoreuno, pool10, funworld_state, empty_init, ROT0, "C.M.C.", "Pool 10 (Italian, set 8)", 0, layout_jollycrd )
+GAMEL( 1996, pool10j, pool10, cuoreuno, pool10, funworld_state, empty_init, ROT0, "bootleg (R.B.)", "Pool 10 (Italian, set 9)", 0, layout_jollycrd )
GAMEL( 2001, royal, pool10, royalcd1, royal, funworld_state, empty_init, ROT0, "<unknown>", "Royal (Pool 10 hack)", 0, layout_jollycrd )
GAMEL( 1997, tortufam, 0, cuoreuno, cuoreuno, funworld_state, empty_init, ROT0, "C.M.C.", "Tortuga Family (Italian)", 0, layout_jollycrd )
GAMEL( 1996, potgame, 0, cuoreuno, cuoreuno, funworld_state, empty_init, ROT0, "C.M.C.", "Pot Game (Italian)", 0, layout_jollycrd )
diff --git a/src/mame/drivers/goldstar.cpp b/src/mame/drivers/goldstar.cpp
index 8eab017dd26..57be173c3e8 100644
--- a/src/mame/drivers/goldstar.cpp
+++ b/src/mame/drivers/goldstar.cpp
@@ -16649,11 +16649,13 @@ GAME( 199?, fl7_2k16, fl7_50, flaming7, flaming7, wingco_state, init_flami
GAME( 199?, fl7_tw, fl7_50, flam7_tw, flaming7, wingco_state, init_flam7_tw, ROT0, "Cyberdyne Systems", "Flaming 7 (Taiwanese Hardware, unknown version)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_GRAPHICS ) // needs proper reels gfx roms decryption.
+// --- Wing W-6 hardware ---
+GAME( 1986, feverch, 0, feverch, feverch, unkch_state, empty_init, ROT0, "Wing Co., Ltd.", "Fever Chance (W-6)", MACHINE_NOT_WORKING ) // inputs, reels, etc..
+
+
// --- Wing W-8 hardware ---
GAME( 1990, bonusch, 0, bonusch, bonusch, unkch_state, empty_init, ROT0, "Wing Co., Ltd.", "Bonus Chance (W-8)", MACHINE_NOT_WORKING ) // M80C51F MCU
-GAME( 1986, feverch, 0, feverch, feverch, unkch_state, empty_init, ROT0, "Wing Co., Ltd.", "Fever Chance", MACHINE_NOT_WORKING ) // inputs, reels, etc..
-
// --- Magical Odds hardware ---
GAME( 1992, magodds, 0, magodds, magodds, wingco_state, empty_init, ROT0, "Pal Company / Micro Manufacturing Inc.", "Magical Odds (set 1)", MACHINE_WRONG_COLORS | MACHINE_IMPERFECT_GRAPHICS )
diff --git a/src/mame/drivers/hikaru.cpp b/src/mame/drivers/hikaru.cpp
index 2904d7d047f..677636d5e2a 100644
--- a/src/mame/drivers/hikaru.cpp
+++ b/src/mame/drivers/hikaru.cpp
@@ -531,9 +531,14 @@ MACHINE_CONFIG_START(hikaru_state::hikaru)
// SPEAKER(config, "lspeaker").front_left();
// SPEAKER(config, "rspeaker").front_right();
-// MCFG_DEVICE_ADD("aica", AICA, 0)
+
+// MCFG_DEVICE_ADD("aica", AICA, (XTAL(33'868'800)*2)/3) // 67.7376MHz(2*33.8688MHz), div 3 for audio block // 33.8688MHz on Board
+// MCFG_SOUND_ROUTE(0, "lspeaker", 2.0)
+// MCFG_SOUND_ROUTE(1, "rspeaker", 2.0)
+
+// MCFG_DEVICE_ADD("aica_pcb", AICA, (XTAL(33'868'800)*2)/3) // AICA PCB
// MCFG_SOUND_ROUTE(0, "lspeaker", 2.0)
-// MCFG_SOUND_ROUTE(0, "rspeaker", 2.0)
+// MCFG_SOUND_ROUTE(1, "rspeaker", 2.0)
MACHINE_CONFIG_END
diff --git a/src/mame/drivers/hng64.cpp b/src/mame/drivers/hng64.cpp
index 6db4675d2b9..6c4df6876cc 100644
--- a/src/mame/drivers/hng64.cpp
+++ b/src/mame/drivers/hng64.cpp
@@ -1558,7 +1558,6 @@ MACHINE_CONFIG_START(hng64_state::hng64)
hng64_network(config);
MCFG_DEVICE_ADD("iomcu", TMP87PH40AN, 8000000)
- MCFG_DEVICE_DISABLE() // work in progress
MACHINE_CONFIG_END
@@ -1566,9 +1565,18 @@ MACHINE_CONFIG_END
#define ROM_LOAD_HNG64_BIOS(bios,name,offset,length,hash) \
ROMX_LOAD(name, offset, length, hash, ROM_BIOS(bios))
-// all BIOS roms are said to be from 'fighting' type PCB, it is unknown if the actual MIPS BIOS differs on the others, or only the MCU internal ROM
+/* All main BIOS roms are said to be from 'fighting' type PCB, it is unknown if the actual MIPS BIOS differs on the others, but it appears unlikely.
+
+ The IO MCU was dumped from a TMP87PH40AN type chip taken from an unknown IO board type.
+
+ Some boards instead use a TMP87CH40N but in all cases they're stickered SNK-IOJ1.00A so the content is possibly the same on all types.
+
+ This needs further studying of the MCU code as it is known that the different IO boards return a different ident value.
+*/
+
#define HNG64_BIOS \
- ROM_REGION32_BE( 0x0100000, "user1", 0 ) /* 512k for R4300 BIOS code */ \
+ /* R4300 BIOS code (main CPU) */ \
+ ROM_REGION32_BE( 0x0100000, "user1", 0 ) \
ROM_SYSTEM_BIOS( 0, "japan", "Japan" ) \
ROM_LOAD_HNG64_BIOS( 0, "brom1.bin", 0x00000, 0x080000, CRC(a30dd3de) SHA1(3e2fd0a56214e6f5dcb93687e409af13d065ea30) ) \
ROM_SYSTEM_BIOS( 1, "us", "USA" ) \
@@ -1577,12 +1585,14 @@ MACHINE_CONFIG_END
ROM_LOAD_HNG64_BIOS( 2, "bios_export.bin", 0x00000, 0x080000, CRC(bbf07ec6) SHA1(5656aa077f6a6d43953f15b5123eea102a9d5313) ) \
ROM_SYSTEM_BIOS( 3, "korea", "Korea" ) \
ROM_LOAD_HNG64_BIOS( 3, "bios_korea.bin", 0x00000, 0x080000, CRC(ac953e2e) SHA1(f502188ef252b7c9d04934c4b525730a116de48b) ) \
- ROM_REGION( 0x0100000, "user2", 0 ) /* KL5C80 BIOS */ \
+ /* KL5C80 BIOS (network CPU) */ \
+ ROM_REGION( 0x0100000, "user2", 0 ) \
ROM_LOAD ( "from1.bin", 0x000000, 0x080000, CRC(6b933005) SHA1(e992747f46c48b66e5509fe0adf19c91250b00c7) ) \
+ /* FPGA (unknown) */ \
ROM_REGION( 0x0100000, "fpga", 0 ) /* FPGA data */ \
ROM_LOAD ( "rom1.bin", 0x000000, 0x01ff32, CRC(4a6832dc) SHA1(ae504f7733c2f40450157cd1d3b85bc83fac8569) ) \
+ /* TMP87PH40AN (I/O MCU) */ \
ROM_REGION( 0x10000, "iomcu", 0 ) /* "64Bit I/O Controller Ver 1.0 1997.06.29(C)SNK" internal ID string */ \
- /* this was dumped from a TMP87PH40AN type chip. Some boards use a TMP87CH40N, in all cases they're stickered SNK-IOJ1.00A so likely the same content */ \
ROM_LOAD ( "tmp87ph40an.bin", 0x8000, 0x8000, CRC(b70df21f) SHA1(5b742e8a0bbf4c0ae4f4398d34c7058fb24acc92) )
diff --git a/src/mame/drivers/model3.cpp b/src/mame/drivers/model3.cpp
index a60f59cdf7d..1a2e67bff50 100644
--- a/src/mame/drivers/model3.cpp
+++ b/src/mame/drivers/model3.cpp
@@ -1332,7 +1332,7 @@ void model3_state::model3_init(int step)
// copy the 68k vector table into RAM
memcpy(m_soundram, memregion("audiocpu")->base()+0x80000, 16);
- machine().device("audiocpu")->reset();
+ m_audiocpu->reset();
m_m3_step = step; // step = BCD hardware rev. 0x10 for 1.0, 0x15 for 1.5, 0x20 for 2.0, etc.
tap_reset();
diff --git a/src/mame/drivers/modena.cpp b/src/mame/drivers/modena.cpp
new file mode 100644
index 00000000000..d0336b61ed2
--- /dev/null
+++ b/src/mame/drivers/modena.cpp
@@ -0,0 +1,175 @@
+// license:BSD-3-Clause
+// copyright-holders:Sandro Ronco
+/**************************************************************************************************
+
+ Mephisto Modena
+
+**************************************************************************************************/
+
+
+#include "emu.h"
+#include "cpu/m6502/m65c02.h"
+#include "machine/nvram.h"
+#include "machine/mmboard.h"
+#include "machine/timer.h"
+#include "speaker.h"
+
+#include "mephisto_modena.lh"
+
+
+class mephisto_modena_state : public driver_device
+{
+public:
+ mephisto_modena_state(const machine_config &mconfig, device_type type, const char *tag)
+ : driver_device(mconfig, type, tag)
+ , m_maincpu(*this, "maincpu")
+ , m_board(*this, "board")
+ , m_beeper(*this, "beeper")
+ , m_keys(*this, "KEY")
+ , m_digits(*this, "digit%u", 0U)
+ , m_leds1(*this, "led%u", 100U)
+ , m_leds2(*this, "led%u", 0U)
+ , m_leds3(*this, "led%u", 8U)
+ { }
+
+ DECLARE_READ8_MEMBER(modena_input_r);
+ DECLARE_WRITE8_MEMBER(modena_digits_w);
+ DECLARE_WRITE8_MEMBER(modena_io_w);
+ DECLARE_WRITE8_MEMBER(modena_led_w);
+ TIMER_DEVICE_CALLBACK_MEMBER(nmi_on) { m_maincpu->set_input_line(M6502_NMI_LINE, ASSERT_LINE); }
+ TIMER_DEVICE_CALLBACK_MEMBER(nmi_off) { m_maincpu->set_input_line(M6502_NMI_LINE, CLEAR_LINE); }
+
+ void modena(machine_config &config);
+ void modena_mem(address_map &map);
+protected:
+ virtual void machine_reset() override;
+ virtual void machine_start() override;
+
+private:
+ required_device<cpu_device> m_maincpu;
+ required_device<mephisto_board_device> m_board;
+ required_device<beep_device> m_beeper;
+ required_ioport m_keys;
+ output_finder<4> m_digits;
+ output_finder<8> m_leds1;
+ output_finder<8> m_leds2;
+ output_finder<8> m_leds3;
+ uint8_t m_digits_idx;
+ uint8_t m_io_ctrl;
+};
+
+
+READ8_MEMBER(mephisto_modena_state::modena_input_r)
+{
+ if (m_board->mux_r(space, offset) == 0xff)
+ return m_keys->read();
+ else
+ return m_board->input_r(space, offset) ^ 0xff;
+}
+
+WRITE8_MEMBER(mephisto_modena_state::modena_led_w)
+{
+ m_board->mux_w(space, offset, data);
+
+ if (m_io_ctrl & 0x0e)
+ {
+ for(int i=0; i<8; i++)
+ {
+ if (BIT(m_io_ctrl, 1))
+ m_leds1[i] = BIT(data, i) ? 0 : 1;
+ if (BIT(m_io_ctrl, 2))
+ m_leds2[i] = BIT(data, i) ? 0 : 1;
+ if (BIT(m_io_ctrl, 3))
+ m_leds3[i] = BIT(data, i) ? 0 : 1;
+ }
+ }
+}
+
+WRITE8_MEMBER(mephisto_modena_state::modena_io_w)
+{
+ m_io_ctrl = data;
+ m_beeper->set_state(BIT(data, 6));
+}
+
+WRITE8_MEMBER(mephisto_modena_state::modena_digits_w)
+{
+ m_digits[m_digits_idx] = data ^ ((m_io_ctrl & 0x10) ? 0xff : 0x00);
+ m_digits_idx = (m_digits_idx + 1) & 3;
+}
+
+void mephisto_modena_state::modena_mem(address_map &map)
+{
+ map(0x0000, 0x1fff).ram().share("nvram");
+ map(0x4000, 0x4000).w(FUNC(mephisto_modena_state::modena_digits_w));
+ map(0x5000, 0x5000).w(FUNC(mephisto_modena_state::modena_led_w));
+ map(0x6000, 0x6000).w(FUNC(mephisto_modena_state::modena_io_w));
+ map(0x7000, 0x7fff).r(FUNC(mephisto_modena_state::modena_input_r));
+ map(0x8000, 0xffff).rom().region("maincpu", 0);
+}
+
+
+static INPUT_PORTS_START( modena )
+ PORT_START("KEY")
+ PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("BOOK") PORT_CODE(KEYCODE_B)
+ PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("INFO") PORT_CODE(KEYCODE_I)
+ PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("MEMORY") PORT_CODE(KEYCODE_M)
+ PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("POSITION") PORT_CODE(KEYCODE_O)
+ PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("LEVEL") PORT_CODE(KEYCODE_L)
+ PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("FUNCTION") PORT_CODE(KEYCODE_F)
+ PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("ENTER") PORT_CODE(KEYCODE_ENTER)
+ PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("CLEAR") PORT_CODE(KEYCODE_BACKSPACE)
+INPUT_PORTS_END
+
+
+void mephisto_modena_state::machine_start()
+{
+ m_digits.resolve();
+ m_leds1.resolve();
+ m_leds2.resolve();
+ m_leds3.resolve();
+ save_item(NAME(m_digits_idx));
+ save_item(NAME(m_io_ctrl));
+}
+
+void mephisto_modena_state::machine_reset()
+{
+ m_digits_idx = 0;
+ m_io_ctrl = 0;
+}
+
+
+MACHINE_CONFIG_START(mephisto_modena_state::modena)
+ MCFG_DEVICE_ADD("maincpu", M65C02, XTAL(4'194'304)) // W65C02SP
+ MCFG_DEVICE_PROGRAM_MAP(modena_mem)
+ MCFG_TIMER_DRIVER_ADD_PERIODIC("nmi_on", mephisto_modena_state, nmi_on, attotime::from_hz(XTAL(4'194'304) / (1 << 13)))
+ MCFG_TIMER_START_DELAY(attotime::from_hz(XTAL(4'194'304) / (1 << 13)) - attotime::from_usec(975)) // active for 975us
+ MCFG_TIMER_DRIVER_ADD_PERIODIC("nmi_off", mephisto_modena_state, nmi_off, attotime::from_hz(XTAL(4'194'304) / (1 << 13)))
+
+ MCFG_NVRAM_ADD_0FILL("nvram")
+
+ MCFG_MEPHISTO_BUTTONS_BOARD_ADD("board")
+ MCFG_MEPHISTO_BOARD_DISABLE_LEDS(true)
+ config.set_default_layout(layout_mephisto_modena);
+
+ /* sound hardware */
+ SPEAKER(config, "mono").front_center();
+ MCFG_DEVICE_ADD("beeper", BEEP, 3250)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+MACHINE_CONFIG_END
+
+
+ROM_START(modena)
+ ROM_REGION(0x8000, "maincpu", 0)
+ ROM_SYSTEM_BIOS( 0, "v1", "v1" )
+ ROMX_LOAD("modena 12aug1992.bin", 0x0000, 0x8000, CRC(dd7b4920) SHA1(4606b9d1f8a30180aabedfc0ed3cca0c96618524), ROM_BIOS(0))
+ ROM_SYSTEM_BIOS( 1, "v1alt", "v1alt" )
+ ROMX_LOAD("27c256,457f.bin", 0x0000, 0x8000, CRC(2889082c) SHA1(b63f0d856793b4f87471837e2219ce2a42fe18de), ROM_BIOS(1))
+ROM_END
+
+
+/***************************************************************************
+ Game driver(s)
+***************************************************************************/
+
+/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
+CONS( 1992, modena, 0, 0, modena, modena, mephisto_modena_state, empty_init, "Hegener & Glaser", "Mephisto Modena", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
diff --git a/src/mame/drivers/naomi.cpp b/src/mame/drivers/naomi.cpp
index b394f9b94cd..c22823d8c85 100644
--- a/src/mame/drivers/naomi.cpp
+++ b/src/mame/drivers/naomi.cpp
@@ -2923,11 +2923,11 @@ MACHINE_CONFIG_START(dc_state::naomi_aw_base)
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
- MCFG_DEVICE_ADD("aica", AICA, 0)
+
+ MCFG_DEVICE_ADD("aica", AICA, (XTAL(33'868'800)*2)/3) // 67.7376MHz(2*33.8688MHz), div 3 for audio block
MCFG_AICA_MASTER
MCFG_AICA_IRQ_CB(WRITELINE(*this, dc_state, aica_irq))
MCFG_AICA_MAIN_IRQ_CB(WRITELINE(*this, dc_state, sh4_aica_irq))
-
MCFG_SOUND_ROUTE(0, "lspeaker", 2.0)
MCFG_SOUND_ROUTE(1, "rspeaker", 2.0)
diff --git a/src/mame/drivers/next.cpp b/src/mame/drivers/next.cpp
index cb511a505a9..738f81d1838 100644
--- a/src/mame/drivers/next.cpp
+++ b/src/mame/drivers/next.cpp
@@ -625,7 +625,7 @@ READ32_MEMBER( next_state::fdc_control_r )
// reason. The kernel otoh behaves as expected.
if(fdc) {
- floppy_image_device *fdev = machine().device<floppy_connector>(":fdc:0")->get_device();
+ floppy_image_device *fdev = floppy0->get_device();
if(fdev->exists()) {
uint32_t variant = fdev->get_variant();
switch(variant) {
diff --git a/src/mame/drivers/orbit.cpp b/src/mame/drivers/orbit.cpp
index 072c58717cb..1bbdbbb2b53 100644
--- a/src/mame/drivers/orbit.cpp
+++ b/src/mame/drivers/orbit.cpp
@@ -24,7 +24,6 @@ Atari Orbit Driver
#include "cpu/m6800/m6800.h"
#include "machine/watchdog.h"
-#include "sound/discrete.h"
#include "speaker.h"
@@ -50,10 +49,10 @@ TIMER_CALLBACK_MEMBER(orbit_state::irq_off)
}
-INTERRUPT_GEN_MEMBER(orbit_state::orbit_interrupt)
+INTERRUPT_GEN_MEMBER(orbit_state::interrupt)
{
- device.execute().set_input_line(0, ASSERT_LINE);
- machine().scheduler().timer_set(m_screen->time_until_vblank_end(), timer_expired_delegate(FUNC(orbit_state::irq_off),this));
+ m_maincpu->set_input_line(0, ASSERT_LINE);
+ m_irq_off_timer->adjust(m_screen->time_until_vblank_end());
}
@@ -79,7 +78,7 @@ WRITE_LINE_MEMBER(orbit_state::coin_lockout_w)
*
*************************************/
-void orbit_state::orbit_map(address_map &map)
+void orbit_state::main_map(address_map &map)
{
map.global_mask(0x7fff);
map(0x0000, 0x00ff).mirror(0x0700).ram();
@@ -88,13 +87,13 @@ void orbit_state::orbit_map(address_map &map)
map(0x1800, 0x1800).mirror(0x07ff).portr("DSW1");
map(0x2000, 0x2000).mirror(0x07ff).portr("DSW2");
map(0x2800, 0x2800).mirror(0x07ff).portr("BUTTONS");
- map(0x3000, 0x33bf).mirror(0x0400).ram().w(FUNC(orbit_state::orbit_playfield_w)).share("playfield_ram");
- map(0x33c0, 0x33ff).mirror(0x0400).ram().share("sprite_ram");
- map(0x3800, 0x3800).mirror(0x00ff).w(FUNC(orbit_state::orbit_note_w));
- map(0x3900, 0x3900).mirror(0x00ff).w(FUNC(orbit_state::orbit_noise_amp_w));
- map(0x3a00, 0x3a00).mirror(0x00ff).w(FUNC(orbit_state::orbit_note_amp_w));
+ map(0x3000, 0x33bf).mirror(0x0400).ram().w(FUNC(orbit_state::playfield_w)).share(m_playfield_ram);
+ map(0x33c0, 0x33ff).mirror(0x0400).ram().share(m_sprite_ram);
+ map(0x3800, 0x3800).mirror(0x00ff).w(FUNC(orbit_state::note_w));
+ map(0x3900, 0x3900).mirror(0x00ff).w(FUNC(orbit_state::noise_amp_w));
+ map(0x3a00, 0x3a00).mirror(0x00ff).w(FUNC(orbit_state::note_amp_w));
map(0x3c00, 0x3c0f).mirror(0x00f0).w(m_latch, FUNC(f9334_device::write_a0));
- map(0x3e00, 0x3e00).mirror(0x00ff).w(FUNC(orbit_state::orbit_noise_rst_w));
+ map(0x3e00, 0x3e00).mirror(0x00ff).w(FUNC(orbit_state::noise_rst_w));
map(0x3f00, 0x3f00).mirror(0x00ff).w("watchdog", FUNC(watchdog_timer_device::reset_w));
map(0x6000, 0x7fff).rom();
}
@@ -249,6 +248,8 @@ GFXDECODE_END
void orbit_state::machine_start()
{
+ m_irq_off_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(orbit_state::irq_off), this));
+
save_item(NAME(m_flip_screen));
}
@@ -267,13 +268,13 @@ void orbit_state::machine_reset()
MACHINE_CONFIG_START(orbit_state::orbit)
/* basic machine hardware */
- MCFG_DEVICE_ADD("maincpu", M6800, MASTER_CLOCK / 16)
- MCFG_DEVICE_PROGRAM_MAP(orbit_map)
- MCFG_DEVICE_VBLANK_INT_DRIVER("screen", orbit_state, orbit_interrupt)
+ MCFG_DEVICE_ADD(m_maincpu, M6800, MASTER_CLOCK / 16)
+ MCFG_DEVICE_PROGRAM_MAP(main_map)
+ MCFG_DEVICE_VBLANK_INT_DRIVER("screen", orbit_state, interrupt)
MCFG_TIMER_DRIVER_ADD_SCANLINE("32v", orbit_state, nmi_32v, "screen", 0, 32)
- MCFG_DEVICE_ADD("latch", F9334, 0) // M6
+ MCFG_DEVICE_ADD(m_latch, F9334, 0) // M6
/* BIT0 => UNUSED */
/* BIT1 => LOCKOUT */
/* BIT2 => NMI ENABLE */
@@ -285,25 +286,25 @@ MACHINE_CONFIG_START(orbit_state::orbit)
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(*this, orbit_state, coin_lockout_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(OUTPUT("led0"))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(OUTPUT("led1"))
- MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE("discrete", discrete_device, write_line<ORBIT_WARNING_EN>))
+ MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(m_discrete, discrete_device, write_line<ORBIT_WARNING_EN>))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */
- MCFG_SCREEN_ADD("screen", RASTER)
+ MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_RAW_PARAMS(MASTER_CLOCK*2, 384*2, 0, 256*2, 261*2, 0, 240*2)
- MCFG_SCREEN_UPDATE_DRIVER(orbit_state, screen_update_orbit)
- MCFG_SCREEN_PALETTE("palette")
+ MCFG_SCREEN_UPDATE_DRIVER(orbit_state, screen_update)
+ MCFG_SCREEN_PALETTE(m_palette)
- MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_orbit)
+ MCFG_DEVICE_ADD(m_gfxdecode, GFXDECODE, m_palette, gfx_orbit)
- MCFG_PALETTE_ADD_MONOCHROME("palette")
+ MCFG_PALETTE_ADD_MONOCHROME(m_palette)
/* sound hardware */
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
- MCFG_DEVICE_ADD("discrete", DISCRETE, orbit_discrete)
+ MCFG_DEVICE_ADD(m_discrete, DISCRETE, orbit_discrete)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
MACHINE_CONFIG_END
diff --git a/src/mame/drivers/peyper.cpp b/src/mame/drivers/peyper.cpp
index 7fe9539902c..8c26e7116ed 100644
--- a/src/mame/drivers/peyper.cpp
+++ b/src/mame/drivers/peyper.cpp
@@ -18,7 +18,6 @@
Ator (Video Dens)
Others not emulated (need roms):
- Night Fever (Sonic)
Storm (Sonic)
Sir Lancelot (Peyper, 1994)
@@ -756,9 +755,6 @@ void peyper_state::init_wolfman()
}
-/*-------------------------------------------------------------------
-/ Night Fever (1979)
-/-------------------------------------------------------------------*/
/*-------------------------------------------------------------------
/ Odin (1985)
diff --git a/src/mame/drivers/play_1.cpp b/src/mame/drivers/play_1.cpp
index c5e144b5517..8bb6a204a5e 100644
--- a/src/mame/drivers/play_1.cpp
+++ b/src/mame/drivers/play_1.cpp
@@ -532,6 +532,15 @@ ROM_START(lastlap)
ROM_END
/*-------------------------------------------------------------------
+/ Third World (??/78)
+/-------------------------------------------------------------------*/
+ROM_START(thrdwrld)
+ ROM_REGION(0x800, "roms", 0)
+ ROM_LOAD("3rdwrlda.bin", 0x0000, 0x0400, CRC(253f1b93) SHA1(7ff5267d0dfe6ae19ec6b0412902f4ce83f23ed1))
+ ROM_LOAD("3rdwrldb.bin", 0x0400, 0x0400, CRC(5e2ba9c0) SHA1(abd285aa5702c7fb84257b4341f64ff83c1fc0ce))
+ROM_END
+
+/*-------------------------------------------------------------------
/ Chance (09/78)
/-------------------------------------------------------------------*/
ROM_START(chance)
@@ -550,10 +559,21 @@ ROM_START(party)
ROM_LOAD("party_b.bin", 0x0400, 0x0400, CRC(5e2ba9c0) SHA1(abd285aa5702c7fb84257b4341f64ff83c1fc0ce))
ROM_END
+/*-------------------------------------------------------------------
+/ Night Fever (??/79)
+/-------------------------------------------------------------------*/
+ROM_START(ngtfever)
+ ROM_REGION(0x800, "roms", 0)
+ ROM_LOAD("nfevera.bin", 0x0000, 0x0400, CRC(253f1b93) SHA1(7ff5267d0dfe6ae19ec6b0412902f4ce83f23ed1))
+ ROM_LOAD("nfeverb.bin", 0x0400, 0x0400, CRC(5e2ba9c0) SHA1(abd285aa5702c7fb84257b4341f64ff83c1fc0ce))
+ROM_END
+
-/* Big Town, Last Lap and Party all reportedly share the same roms with different playfield/machine artworks */
+/* Big Town, Last Lap, Night Fever, Party and Third World all reportedly share the same roms with different playfield/machine artworks */
GAME(1978, bigtown, 0, play_1, play_1, play_1_state, empty_init, ROT0, "Playmatic", "Big Town", MACHINE_MECHANICAL | MACHINE_NOT_WORKING )
GAME(1978, lastlap, bigtown, play_1, play_1, play_1_state, empty_init, ROT0, "Playmatic", "Last Lap", MACHINE_MECHANICAL | MACHINE_NOT_WORKING )
GAME(1979, party, bigtown, play_1, play_1, play_1_state, empty_init, ROT0, "Playmatic", "Party", MACHINE_MECHANICAL | MACHINE_NOT_WORKING )
+GAME(1979, ngtfever, bigtown, play_1, play_1, play_1_state, empty_init, ROT0, "Sonic", "Night Fever", MACHINE_MECHANICAL | MACHINE_NOT_WORKING )
+GAME(1978, thrdwrld, bigtown, play_1, play_1, play_1_state, empty_init, ROT0, "Sonic", "Third World", MACHINE_MECHANICAL | MACHINE_NOT_WORKING )
GAME(1978, spcgambl, 0, play_1, spcgambl, play_1_state, empty_init, ROT0, "Playmatic", "Space Gambler", MACHINE_MECHANICAL | MACHINE_NOT_WORKING )
GAME(1978, chance, 0, chance, chance, play_1_state, empty_init, ROT0, "Playmatic", "Chance", MACHINE_MECHANICAL | MACHINE_NOT_WORKING )
diff --git a/src/mame/drivers/playch10.cpp b/src/mame/drivers/playch10.cpp
index be7dd33b3ef..d6f1c6b2b65 100644
--- a/src/mame/drivers/playch10.cpp
+++ b/src/mame/drivers/playch10.cpp
@@ -1748,7 +1748,6 @@ GAME( 1987, pc_miket, playch10, playchnv, playch10, playch10_state, init_pceboar
/* F-Board Games */
GAME( 1987, pc_rcpam, playch10, playch10, playch10, playch10_state, init_pcfboard, ROT0, "Rare", "R.C. Pro-Am (PlayChoice-10)", 0 )
-GAME( 1987, pc_rrngr, playch10, playch10, playch10, playch10_state, init_pcfboard, ROT0, "Capcom USA (Nintendo of America license)", "Chip'n Dale: Rescue Rangers (PlayChoice-10)", 0 )
GAME( 1988, pc_ddrgn, playch10, playch10, playch10, playch10_state, init_pcfboard, ROT0, "Technos Japan", "Double Dragon (PlayChoice-10)", 0 )
GAME( 1989, pc_ngaid, playch10, playch10, playch10, playch10_state, init_pcfboard, ROT0, "Tecmo (Nintendo of America license)", "Ninja Gaiden (PlayChoice-10)", 0 )
GAME( 1989, pc_tmnt, playch10, playch10, playch10, playch10_state, init_pcfboard, ROT0, "Konami (Nintendo of America license)", "Teenage Mutant Ninja Turtles (PlayChoice-10)", 0 )
@@ -1756,6 +1755,7 @@ GAME( 1989, pc_ftqst, playch10, playch10, playch10, playch10_state, init_pcfboar
GAME( 1989, pc_bstar, playch10, playch10, playch10, playch10_state, init_pcfboard_2, ROT0, "SNK (Nintendo of America license)", "Baseball Stars: Be a Champ! (PlayChoice-10)", MACHINE_IMPERFECT_GRAPHICS )
GAME( 1989, pc_tbowl, playch10, playch10, playch10, playch10_state, init_pcfboard, ROT0, "Tecmo (Nintendo of America license)", "Tecmo Bowl (PlayChoice-10)", 0 )
GAME( 1990, pc_virus, pc_drmro, playch10, playch10, playch10_state, init_virus, ROT0, "Nintendo", "Virus (Dr. Mario prototype, PlayChoice-10)", 0 )
+GAME( 1990, pc_rrngr, playch10, playch10, playch10, playch10_state, init_pcfboard, ROT0, "Capcom USA (Nintendo of America license)", "Chip'n Dale: Rescue Rangers (PlayChoice-10)", 0 )
GAME( 1990, pc_drmro, playch10, playch10, playch10, playch10_state, init_pcfboard, ROT0, "Nintendo", "Dr. Mario (PlayChoice-10)", 0 )
GAME( 1990, pc_bload, playch10, playch10, playch10, playch10_state, init_virus, ROT0, "Jaleco (Nintendo of America license)", "Bases Loaded (Prototype, PlayChoice-10)", 0 )
GAME( 1990, pc_ynoid, playch10, playch10, playch10, playch10_state, init_pcfboard, ROT0, "Capcom USA (Nintendo of America license)", "Yo! Noid (PlayChoice-10)", 0 )
diff --git a/src/mame/drivers/polgar.cpp b/src/mame/drivers/polgar.cpp
index d89775b73f6..3874f3a056a 100644
--- a/src/mame/drivers/polgar.cpp
+++ b/src/mame/drivers/polgar.cpp
@@ -14,15 +14,12 @@
#include "machine/nvram.h"
#include "machine/mmboard.h"
#include "machine/ram.h"
-#include "machine/timer.h"
#include "video/hd44780.h"
-#include "screen.h"
#include "speaker.h"
#include "mephisto_lcd.lh"
#include "mephisto_academy.lh"
#include "mephisto_milano.lh"
-#include "mephisto_modena.lh"
class mephisto_polgar_state : public driver_device
@@ -31,7 +28,6 @@ public:
mephisto_polgar_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_keys(*this, "KEY")
- , m_digits(*this, "digit%u", 0U)
{ }
DECLARE_READ8_MEMBER(polgar_keys_r);
@@ -39,10 +35,8 @@ public:
void polgar10(machine_config &config);
void polgar(machine_config &config);
void polgar_mem(address_map &map);
- virtual void sound_start() override { m_digits.resolve(); }
protected:
- optional_ioport m_keys;
- output_finder<4> m_digits;
+ required_ioport m_keys;
};
class mephisto_risc_state : public mephisto_polgar_state
@@ -107,43 +101,6 @@ private:
uint8_t m_led_latch;
};
-class mephisto_modena_state : public mephisto_polgar_state
-{
-public:
- mephisto_modena_state(const machine_config &mconfig, device_type type, const char *tag)
- : mephisto_polgar_state(mconfig, type, tag)
- , m_maincpu(*this, "maincpu")
- , m_board(*this, "board")
- , m_beeper(*this, "beeper")
- , m_leds1(*this, "led%u", 100U)
- , m_leds2(*this, "led%u", 0U)
- , m_leds3(*this, "led%u", 8U)
- { }
-
- DECLARE_READ8_MEMBER(modena_input_r);
- DECLARE_WRITE8_MEMBER(modena_digits_w);
- DECLARE_WRITE8_MEMBER(modena_io_w);
- DECLARE_WRITE8_MEMBER(modena_led_w);
- TIMER_DEVICE_CALLBACK_MEMBER(nmi_on) { m_maincpu->set_input_line(M6502_NMI_LINE, ASSERT_LINE); }
- TIMER_DEVICE_CALLBACK_MEMBER(nmi_off) { m_maincpu->set_input_line(M6502_NMI_LINE, CLEAR_LINE); }
-
- void modena(machine_config &config);
- void modena_mem(address_map &map);
-protected:
- virtual void machine_reset() override;
- virtual void machine_start() override;
-
-private:
- required_device<cpu_device> m_maincpu;
- required_device<mephisto_board_device> m_board;
- required_device<beep_device> m_beeper;
- output_finder<8> m_leds1;
- output_finder<8> m_leds2;
- output_finder<8> m_leds3;
- uint8_t m_digits_idx;
- uint8_t m_io_ctrl;
-};
-
class mephisto_academy_state : public mephisto_polgar_state
{
public:
@@ -301,55 +258,6 @@ void mephisto_milano_state::milano_mem(address_map &map)
}
-READ8_MEMBER(mephisto_modena_state::modena_input_r)
-{
- if (m_board->mux_r(space, offset) == 0xff)
- return m_keys->read();
- else
- return m_board->input_r(space, offset) ^ 0xff;
-}
-
-WRITE8_MEMBER(mephisto_modena_state::modena_led_w)
-{
- m_board->mux_w(space, offset, data);
-
- if (m_io_ctrl & 0x0e)
- {
- for(int i=0; i<8; i++)
- {
- if (BIT(m_io_ctrl, 1))
- m_leds1[i] = BIT(data, i) ? 0 : 1;
- if (BIT(m_io_ctrl, 2))
- m_leds2[i] = BIT(data, i) ? 0 : 1;
- if (BIT(m_io_ctrl, 3))
- m_leds3[i] = BIT(data, i) ? 0 : 1;
- }
- }
-}
-
-WRITE8_MEMBER(mephisto_modena_state::modena_io_w)
-{
- m_io_ctrl = data;
- m_beeper->set_state(BIT(data, 6));
-}
-
-WRITE8_MEMBER(mephisto_modena_state::modena_digits_w)
-{
- m_digits[m_digits_idx] = data ^ ((m_io_ctrl & 0x10) ? 0xff : 0x00);
- m_digits_idx = (m_digits_idx + 1) & 3;
-}
-
-void mephisto_modena_state::modena_mem(address_map &map)
-{
- map(0x0000, 0x1fff).ram().share("nvram");
- map(0x4000, 0x4000).w(FUNC(mephisto_modena_state::modena_digits_w));
- map(0x5000, 0x5000).w(FUNC(mephisto_modena_state::modena_led_w));
- map(0x6000, 0x6000).w(FUNC(mephisto_modena_state::modena_io_w));
- map(0x7000, 0x7fff).r(FUNC(mephisto_modena_state::modena_input_r));
- map(0x8000, 0xffff).rom();
-}
-
-
INTERRUPT_GEN_MEMBER(mephisto_academy_state::academy_irq)
{
if (m_enable_nmi)
@@ -406,18 +314,6 @@ static INPUT_PORTS_START( polgar )
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("CL") PORT_CODE(KEYCODE_BACKSPACE)
INPUT_PORTS_END
-static INPUT_PORTS_START( modena )
- PORT_START("KEY")
- PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("BOOK") PORT_CODE(KEYCODE_B)
- PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("INFO") PORT_CODE(KEYCODE_I)
- PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("MEMORY") PORT_CODE(KEYCODE_M)
- PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("POSITION") PORT_CODE(KEYCODE_O)
- PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("LEVEL") PORT_CODE(KEYCODE_L)
- PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("FUNCTION") PORT_CODE(KEYCODE_F)
- PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("ENTER") PORT_CODE(KEYCODE_ENTER)
- PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("CLEAR") PORT_CODE(KEYCODE_BACKSPACE)
-INPUT_PORTS_END
-
void mephisto_risc_state::machine_start()
{
m_disable_boot_rom_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(mephisto_risc_state::disable_boot_rom), this));
@@ -451,26 +347,11 @@ void mephisto_milano_state::machine_reset()
m_led_latch = 0;
}
-void mephisto_modena_state::machine_start()
-{
- m_leds1.resolve();
- m_leds2.resolve();
- m_leds3.resolve();
- save_item(NAME(m_digits_idx));
- save_item(NAME(m_io_ctrl));
-}
-
void mephisto_academy_state::machine_start()
{
m_leds.resolve();
}
-void mephisto_modena_state::machine_reset()
-{
- m_digits_idx = 0;
- m_io_ctrl = 0;
-}
-
void mephisto_academy_state::machine_reset()
{
m_enable_nmi = true;
@@ -555,30 +436,6 @@ MACHINE_CONFIG_START(mephisto_academy_state::academy)
config.set_default_layout(layout_mephisto_academy);
MACHINE_CONFIG_END
-MACHINE_CONFIG_START(mephisto_modena_state::modena)
- polgar(config);
- MCFG_DEVICE_MODIFY("maincpu") // W65C02SP
- MCFG_DEVICE_CLOCK(XTAL(4'194'304))
- MCFG_DEVICE_PROGRAM_MAP(modena_mem)
- MCFG_DEVICE_PERIODIC_INT_REMOVE()
- MCFG_TIMER_DRIVER_ADD_PERIODIC("nmi_on", mephisto_modena_state, nmi_on, attotime::from_hz(XTAL(4'194'304) / (1 << 13)))
- MCFG_TIMER_START_DELAY(attotime::from_hz(XTAL(4'194'304) / (1 << 13)) - attotime::from_usec(975)) // active for 975us
- MCFG_TIMER_DRIVER_ADD_PERIODIC("nmi_off", mephisto_modena_state, nmi_off, attotime::from_hz(XTAL(4'194'304) / (1 << 13)))
-
- MCFG_DEVICE_REMOVE("board")
- MCFG_DEVICE_REMOVE("display")
- MCFG_MEPHISTO_BUTTONS_BOARD_ADD("board")
- MCFG_MEPHISTO_BOARD_DISABLE_LEDS(true)
- config.set_default_layout(layout_mephisto_modena);
-
- MCFG_DEVICE_REMOVE("outlatch")
-
- /* sound hardware */
- SPEAKER(config, "mono").front_center();
- MCFG_DEVICE_ADD("beeper", BEEP, 3250)
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
-MACHINE_CONFIG_END
-
ROM_START(polgar)
ROM_REGION(0x10000, "maincpu", 0)
@@ -641,14 +498,6 @@ ROM_START(nshort)
ROM_LOAD("nshort.bin", 0x00000, 0x10000, CRC(4bd51e23) SHA1(3f55cc1c55dae8818b7e9384b6b8d43dc4f0a1af))
ROM_END
-ROM_START(modena)
- ROM_REGION(0x10000, "maincpu", 0)
- ROM_SYSTEM_BIOS( 0, "v1", "v1" )
- ROMX_LOAD("modena 12aug1992.bin", 0x8000, 0x8000, CRC(dd7b4920) SHA1(4606b9d1f8a30180aabedfc0ed3cca0c96618524), ROM_BIOS(0))
- ROM_SYSTEM_BIOS( 1, "v1alt", "v1alt" )
- ROMX_LOAD("27c256,457f.bin", 0x8000, 0x8000, CRC(2889082c) SHA1(b63f0d856793b4f87471837e2219ce2a42fe18de), ROM_BIOS(1))
-ROM_END
-
/***************************************************************************
Game driver(s)
@@ -664,4 +513,3 @@ CONS( 1994, mrisc2, mrisc, 0, mrisc, polgar, mephisto_risc_state,
CONS( 1989, academy, 0, 0, academy, polgar, mephisto_academy_state, empty_init, "Hegener & Glaser", "Mephisto Academy", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
CONS( 1991, milano, 0, 0, milano, polgar, mephisto_milano_state, empty_init, "Hegener & Glaser", "Mephisto Milano", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
CONS( 1993, nshort, milano, 0, milano, polgar, mephisto_milano_state, empty_init, "Hegener & Glaser", "Mephisto Nigel Short", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
-CONS( 1992, modena, 0, 0, modena, modena, mephisto_modena_state, empty_init, "Hegener & Glaser", "Mephisto Modena", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
diff --git a/src/mame/drivers/segas32.cpp b/src/mame/drivers/segas32.cpp
index 4ba45a8caf4..816fe716bcc 100644
--- a/src/mame/drivers/segas32.cpp
+++ b/src/mame/drivers/segas32.cpp
@@ -1579,6 +1579,7 @@ static INPUT_PORTS_START( f1en )
PORT_MODIFY("slavepcb:SERVICE12_A")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY("slavepcb:SERVICE34_A")
diff --git a/src/mame/drivers/seta.cpp b/src/mame/drivers/seta.cpp
index 3ae176449c5..afd51713a74 100644
--- a/src/mame/drivers/seta.cpp
+++ b/src/mame/drivers/seta.cpp
@@ -1919,6 +1919,12 @@ void seta_state::blandia_map(address_map &map)
map(0xf00000, 0xf00001).nopw(); // ? Sound IRQ Ack
}
+void seta_state::blandia_x1_map(address_map &map)
+{
+ map(0x00000, 0xbffff).rom();
+ map(0xc0000, 0xfffff).bankr("x1_bank");
+}
+
/***************************************************************************
Blandia (proto), Gundhara, J.J.Squawkers, Rezon, War of Aero, Zing Zing Zip
@@ -2043,6 +2049,12 @@ void seta_state::zombraid_map(address_map &map)
map(0xf00002, 0xf00003).r(FUNC(seta_state::zombraid_gun_r));
}
+void seta_state::zombraid_x1_map(address_map &map)
+{
+ map(0x00000, 0x7ffff).rom();
+ map(0x80000, 0xfffff).bankr("x1_bank");
+}
+
READ16_MEMBER(seta_state::zingzipbl_unknown_r)
{
return 0x0000;
@@ -2204,7 +2216,7 @@ WRITE16_MEMBER(seta_state::keroppi_prize_w)
if ((data & 0x0010) && !m_keroppi_prize_hop)
{
m_keroppi_prize_hop = 1;
- machine().scheduler().timer_set(attotime::from_seconds(3), timer_expired_delegate(FUNC(seta_state::keroppi_prize_hop_callback),this), 0x20); /* 3 seconds */
+ m_keroppi_prize_hop_timer->adjust(attotime::from_seconds(3), 0x20); /* 3 seconds */
}
}
@@ -2233,6 +2245,8 @@ void seta_state::keroppi_map(address_map &map)
MACHINE_START_MEMBER(seta_state,keroppi)
{
+ m_keroppi_prize_hop_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(seta_state::keroppi_prize_hop_callback), this));
+
m_keroppi_prize_hop = 0;
m_keroppi_protection_count = 0;
}
@@ -8256,6 +8270,7 @@ MACHINE_CONFIG_START(seta_state::blandia)
MCFG_DEVICE_ADD("x1snd", X1_010, 16000000) /* 16 MHz */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+ MCFG_DEVICE_ADDRESS_MAP(0, blandia_x1_map)
MACHINE_CONFIG_END
MACHINE_CONFIG_START(seta_state::blandiap)
@@ -8293,6 +8308,7 @@ MACHINE_CONFIG_START(seta_state::blandiap)
MCFG_DEVICE_ADD("x1snd", X1_010, 16000000) /* 16 MHz */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+ MCFG_DEVICE_ADDRESS_MAP(0, blandia_x1_map)
MACHINE_CONFIG_END
@@ -8627,6 +8643,7 @@ MACHINE_CONFIG_START(seta_state::eightfrc)
MCFG_DEVICE_ADD("x1snd", X1_010, 16000000) /* 16 MHz */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+ MCFG_DEVICE_ADDRESS_MAP(0, blandia_x1_map)
MACHINE_CONFIG_END
@@ -8747,7 +8764,7 @@ MACHINE_CONFIG_END
Zombie Raid
***************************************************************************/
-MACHINE_START_MEMBER(seta_state,zombraid){ m_gun_recoil.resolve(); }
+MACHINE_START_MEMBER(seta_state,zombraid) { m_gun_recoil.resolve(); }
MACHINE_CONFIG_START(seta_state::zombraid)
gundhara(config);
@@ -8762,6 +8779,9 @@ MACHINE_CONFIG_START(seta_state::zombraid)
MCFG_DEVICE_ADD("adc", ADC0834, 0)
MCFG_ADC083X_INPUT_CB(seta_state, zombraid_adc_cb)
+
+ MCFG_DEVICE_MODIFY("x1snd")
+ MCFG_DEVICE_ADDRESS_MAP(0, zombraid_x1_map)
MACHINE_CONFIG_END
/***************************************************************************
@@ -10435,11 +10455,9 @@ ROM_START( blandia )
ROM_LOAD( "ux001012.u068", 0x040000, 0x080000, CRC(f29959f6) SHA1(edccea3d0bf972a07edd6339e18792d089033bff) )
/* The c0000-fffff region is bankswitched */
- ROM_REGION( 0x240000, "x1snd", 0 ) /* Samples */
- ROM_LOAD( "ux001013.u69", 0x000000, 0x0c0000, CRC(5cd273cd) SHA1(602e1f10454e2b1c941f2e6983872bb9ca77a542) )
- // skip c0000-fffff (banked region)
- ROM_CONTINUE( 0x100000, 0x040000 )
- ROM_LOAD( "ux001014.u70", 0x140000, 0x080000, CRC(86b49b4e) SHA1(045b352950d848907af4c22b817d154b2cfff382) )
+ ROM_REGION( 0x200000, "x1snd", 0 ) /* Samples */
+ ROM_LOAD( "ux001013.u69", 0x000000, 0x100000, CRC(5cd273cd) SHA1(602e1f10454e2b1c941f2e6983872bb9ca77a542) )
+ ROM_LOAD( "ux001014.u70", 0x100000, 0x080000, CRC(86b49b4e) SHA1(045b352950d848907af4c22b817d154b2cfff382) )
ROM_END
ROM_START( blandiap )
@@ -10476,23 +10494,23 @@ ROM_START( blandiap )
ROM_LOAD( "v2-3.bin", 0x0a0000, 0x020000, CRC(80ad0c3b) SHA1(00fcbcf7805784d7298b92136e7f256d65029c44) )
/* The c0000-fffff region is bankswitched */
- ROM_REGION( 0x240000, "x1snd", 0 ) /* Samples */
+ ROM_REGION( 0x200000, "x1snd", 0 ) /* Samples */
ROM_LOAD( "s-0.bin", 0x000000, 0x020000, CRC(a5fde408) SHA1(89efcd37ef6c5b313169d74a962a7c074a09b12a) )
- ROM_CONTINUE( 0x140000, 0x020000 )
+ ROM_CONTINUE( 0x100000, 0x020000 )
ROM_LOAD( "s-1.bin", 0x020000, 0x020000, CRC(3083f9c4) SHA1(f5d2297c3d680eb1f128fa42a3a7f61badb9853a) )
- ROM_CONTINUE( 0x160000, 0x020000 )
+ ROM_CONTINUE( 0x120000, 0x020000 )
ROM_LOAD( "s-2.bin", 0x040000, 0x020000, CRC(a591c9ef) SHA1(83e665e342c42fd3582c83becfacc27a3a3e5a54) )
- ROM_CONTINUE( 0x180000, 0x020000 )
+ ROM_CONTINUE( 0x140000, 0x020000 )
ROM_LOAD( "s-3.bin", 0x060000, 0x020000, CRC(68826c9d) SHA1(a860b7b2140a5a506bf25110c08c6ea59db25743) )
- ROM_CONTINUE( 0x1a0000, 0x020000 )
+ ROM_CONTINUE( 0x160000, 0x020000 )
ROM_LOAD( "s-4.bin", 0x080000, 0x020000, CRC(1c7dc8c2) SHA1(006459a23de83fe48e11bdd6ebe23ef6a18a87e8) )
- ROM_CONTINUE( 0x1c0000, 0x020000 )
+ ROM_CONTINUE( 0x180000, 0x020000 )
ROM_LOAD( "s-5.bin", 0x0a0000, 0x020000, CRC(4bb0146a) SHA1(1e3c1739ea3c85296573426e55f25dce11f0ed2b) )
- ROM_CONTINUE( 0x1e0000, 0x020000 )
- ROM_LOAD( "s-6.bin", 0x100000, 0x020000, CRC(9f8f34ee) SHA1(60abb70ae87595ebae23df68d62f3b0ed4a2e768) ) // skip c0000-fffff (banked region)
- ROM_CONTINUE( 0x200000, 0x020000 ) // this half is 0
- ROM_LOAD( "s-7.bin", 0x120000, 0x020000, CRC(e077dd39) SHA1(a6f0881a026161710adc132bcf7cb95c4c8f2528) )
- ROM_CONTINUE( 0x220000, 0x020000 ) // this half is 0
+ ROM_CONTINUE( 0x1a0000, 0x020000 )
+ ROM_LOAD( "s-6.bin", 0x0c0000, 0x020000, CRC(9f8f34ee) SHA1(60abb70ae87595ebae23df68d62f3b0ed4a2e768) )
+ ROM_CONTINUE( 0x1c0000, 0x020000 ) // this half is 0
+ ROM_LOAD( "s-7.bin", 0x0e0000, 0x020000, CRC(e077dd39) SHA1(a6f0881a026161710adc132bcf7cb95c4c8f2528) )
+ ROM_CONTINUE( 0x1e0000, 0x020000 ) // this half is 0
ROM_END
ROM_START( blockcar )
@@ -11044,11 +11062,9 @@ ROM_START( eightfrc )
ROM_REGION( 0x100000, "gfx3", 0 ) /* Layer 2 */
ROM_LOAD( "u68.bin", 0x000000, 0x100000, CRC(c17aad22) SHA1(eabbae2142cad3eef6a94d542ea03221c8228e94) )
- ROM_REGION( 0x240000, "x1snd", 0 ) /* Samples */
- ROM_LOAD( "u70.bin", 0x000000, 0x0c0000, CRC(dfdb67a3) SHA1(0fed6fb498dcfc1276facd0ecd2dfde45ff671f2) )
- // skip c0000-fffff (banked region)
- ROM_CONTINUE( 0x100000, 0x040000 )
- ROM_LOAD( "u69.bin", 0x140000, 0x100000, CRC(82ec08f1) SHA1(f17300d3cf990ef5c11056fd922f8cae0b2c918f) )
+ ROM_REGION( 0x200000, "x1snd", 0 ) /* Samples */
+ ROM_LOAD( "u70.bin", 0x000000, 0x100000, CRC(dfdb67a3) SHA1(0fed6fb498dcfc1276facd0ecd2dfde45ff671f2) )
+ ROM_LOAD( "u69.bin", 0x100000, 0x100000, CRC(82ec08f1) SHA1(f17300d3cf990ef5c11056fd922f8cae0b2c918f) )
ROM_END
ROM_START( kiwame )
@@ -11260,11 +11276,9 @@ ROM_START( zombraid )
ROM_LOAD ( "fy001010.68", 0x000000, 0x200000, CRC(8b40ed7a) SHA1(05fcd7947a8419cab5ed2305fba9a671911e4850) )
ROM_LOAD16_BYTE( "fy001009.67", 0x200000, 0x100000, CRC(6bcca641) SHA1(49c9106e6f23e25e5b5917af11fc48d34457c61a) )
- ROM_REGION( 0x480000, "x1snd", 0 ) /* Samples */
- ROM_LOAD( "fy001012.b", 0x000000, 0x080000, CRC(fd30e102) SHA1(ae02f94f69aa301b0c37921ca1117e3ad20467b5) )
- // skip 80000-fffff (banked region)
- ROM_CONTINUE( 0x100000, 0x180000 )
- ROM_LOAD( "fy001011.a", 0x280000, 0x200000, CRC(e3c431de) SHA1(1030adacbbfabc00231417e09f3de40e3052f65c) )
+ ROM_REGION( 0x400000, "x1snd", 0 ) /* Samples */
+ ROM_LOAD( "fy001012.b", 0x000000, 0x200000, CRC(fd30e102) SHA1(ae02f94f69aa301b0c37921ca1117e3ad20467b5) )
+ ROM_LOAD( "fy001011.a", 0x200000, 0x200000, CRC(e3c431de) SHA1(1030adacbbfabc00231417e09f3de40e3052f65c) )
ROM_REGION(0x10000, "nvram", 0)
ROM_LOAD( "nvram.bin", 0x0000, 0x10000, CRC(1a4b2ee8) SHA1(9a14fb2089fef9d13e0a5fe0a83eb7bae51fe1ae) )
@@ -11319,16 +11333,15 @@ ROM_START( zombraidp ) /* Prototype or test board version. Data matches release
ROM_LOAD16_BYTE( "u152_master_scn_2-2_c00e.u152", 0x200000, 0x080000, CRC(0870ad58) SHA1(20e076fa665c24db0e316598a0a5d7fae9fc2f2a) )
ROM_LOAD16_BYTE( "u153_master_scn_2-5_e1da.u153", 0x300000, 0x080000, CRC(814ac66a) SHA1(1fd13a0bf73b9bdede82a865789413308d989c3a) )
- ROM_REGION( 0x480000, "x1snd", 0 ) /* Samples */
+ ROM_REGION( 0x400000, "x1snd", 0 ) /* Samples */
ROM_LOAD( "u156_master_snd_0_f630.u156", 0x000000, 0x080000, CRC(bfc467bd) SHA1(a234cb8e0259a21b7bad40a72d99bf379a4b4046) ) /* These 8 roms dated 7/17/95 */
- // skip 80000-fffff (banked region)
- ROM_LOAD( "u157_master_snd_1_c20a.u157", 0x100000, 0x080000, CRC(b449a8ba) SHA1(3248a767132f60dec848fdc21a76481caa428cd2) )
- ROM_LOAD( "u158_master_snd_2_5c69.u158", 0x180000, 0x080000, CRC(ed6de791) SHA1(416c39c03a9ac2214702eaea7716e9aa74c8c228) )
- ROM_LOAD( "u159_master_snd_3_0727.u159", 0x200000, 0x080000, CRC(794cec21) SHA1(5c44286ea14c0e6a7a4588e523015f83d64dd1a7) )
- ROM_LOAD( "u160_master_snd_4_5a70.u160", 0x280000, 0x080000, CRC(e81ace66) SHA1(f4984e855c222e1cf3287538f536f7b0275f03d5) )
- ROM_LOAD( "u161_master_snd_5_599c.u161", 0x300000, 0x080000, CRC(1793dd13) SHA1(1b5b3c50e6df399c3e334c08be5313eef7d7ed95) )
- ROM_LOAD( "u162_master_snd_6_6d2e.u162", 0x380000, 0x080000, CRC(2ece241f) SHA1(1ebe4dd788799ec10c2eddf02f9bdaee8457993b) )
- ROM_LOAD( "u163_master_snd_7_c733.u163", 0x400000, 0x080000, CRC(d90f78b2) SHA1(e847eba6a4d6c1a3044041a9d32b6b534fb45307) )
+ ROM_LOAD( "u157_master_snd_1_c20a.u157", 0x080000, 0x080000, CRC(b449a8ba) SHA1(3248a767132f60dec848fdc21a76481caa428cd2) )
+ ROM_LOAD( "u158_master_snd_2_5c69.u158", 0x100000, 0x080000, CRC(ed6de791) SHA1(416c39c03a9ac2214702eaea7716e9aa74c8c228) )
+ ROM_LOAD( "u159_master_snd_3_0727.u159", 0x180000, 0x080000, CRC(794cec21) SHA1(5c44286ea14c0e6a7a4588e523015f83d64dd1a7) )
+ ROM_LOAD( "u160_master_snd_4_5a70.u160", 0x200000, 0x080000, CRC(e81ace66) SHA1(f4984e855c222e1cf3287538f536f7b0275f03d5) )
+ ROM_LOAD( "u161_master_snd_5_599c.u161", 0x280000, 0x080000, CRC(1793dd13) SHA1(1b5b3c50e6df399c3e334c08be5313eef7d7ed95) )
+ ROM_LOAD( "u162_master_snd_6_6d2e.u162", 0x300000, 0x080000, CRC(2ece241f) SHA1(1ebe4dd788799ec10c2eddf02f9bdaee8457993b) )
+ ROM_LOAD( "u163_master_snd_7_c733.u163", 0x380000, 0x080000, CRC(d90f78b2) SHA1(e847eba6a4d6c1a3044041a9d32b6b534fb45307) )
ROM_REGION(0x10000, "nvram", 0)
ROM_LOAD( "nvram.bin", 0x0000, 0x10000, CRC(1a4b2ee8) SHA1(9a14fb2089fef9d13e0a5fe0a83eb7bae51fe1ae) )
@@ -11367,16 +11380,15 @@ ROM_START( zombraidpj ) /* Prototype or test board version. Data matches releas
ROM_LOAD16_BYTE( "u152_master_scn_2-2_c00e.u152", 0x200000, 0x080000, CRC(0870ad58) SHA1(20e076fa665c24db0e316598a0a5d7fae9fc2f2a) )
ROM_LOAD16_BYTE( "u153_master_scn_2-5_e1da.u153", 0x300000, 0x080000, CRC(814ac66a) SHA1(1fd13a0bf73b9bdede82a865789413308d989c3a) )
- ROM_REGION( 0x480000, "x1snd", 0 ) /* Samples */
+ ROM_REGION( 0x400000, "x1snd", 0 ) /* Samples */
ROM_LOAD( "u156_master_snd_0_f630.u156", 0x000000, 0x080000, CRC(bfc467bd) SHA1(a234cb8e0259a21b7bad40a72d99bf379a4b4046) ) /* These 8 roms dated 7/17/95 */
- // skip 80000-fffff (banked region)
- ROM_LOAD( "u157_master_snd_1_c20a.u157", 0x100000, 0x080000, CRC(b449a8ba) SHA1(3248a767132f60dec848fdc21a76481caa428cd2) )
- ROM_LOAD( "u158_master_snd_2_5c69.u158", 0x180000, 0x080000, CRC(ed6de791) SHA1(416c39c03a9ac2214702eaea7716e9aa74c8c228) )
- ROM_LOAD( "u159_master_snd_3_0727.u159", 0x200000, 0x080000, CRC(794cec21) SHA1(5c44286ea14c0e6a7a4588e523015f83d64dd1a7) )
- ROM_LOAD( "u160_master_snd_4_5a70.u160", 0x280000, 0x080000, CRC(e81ace66) SHA1(f4984e855c222e1cf3287538f536f7b0275f03d5) )
- ROM_LOAD( "u161_master_snd_5_599c.u161", 0x300000, 0x080000, CRC(1793dd13) SHA1(1b5b3c50e6df399c3e334c08be5313eef7d7ed95) )
- ROM_LOAD( "u162_master_snd_6_6d2e.u162", 0x380000, 0x080000, CRC(2ece241f) SHA1(1ebe4dd788799ec10c2eddf02f9bdaee8457993b) )
- ROM_LOAD( "u163_master_snd_7_c733.u163", 0x400000, 0x080000, CRC(d90f78b2) SHA1(e847eba6a4d6c1a3044041a9d32b6b534fb45307) )
+ ROM_LOAD( "u157_master_snd_1_c20a.u157", 0x080000, 0x080000, CRC(b449a8ba) SHA1(3248a767132f60dec848fdc21a76481caa428cd2) )
+ ROM_LOAD( "u158_master_snd_2_5c69.u158", 0x100000, 0x080000, CRC(ed6de791) SHA1(416c39c03a9ac2214702eaea7716e9aa74c8c228) )
+ ROM_LOAD( "u159_master_snd_3_0727.u159", 0x180000, 0x080000, CRC(794cec21) SHA1(5c44286ea14c0e6a7a4588e523015f83d64dd1a7) )
+ ROM_LOAD( "u160_master_snd_4_5a70.u160", 0x200000, 0x080000, CRC(e81ace66) SHA1(f4984e855c222e1cf3287538f536f7b0275f03d5) )
+ ROM_LOAD( "u161_master_snd_5_599c.u161", 0x280000, 0x080000, CRC(1793dd13) SHA1(1b5b3c50e6df399c3e334c08be5313eef7d7ed95) )
+ ROM_LOAD( "u162_master_snd_6_6d2e.u162", 0x300000, 0x080000, CRC(2ece241f) SHA1(1ebe4dd788799ec10c2eddf02f9bdaee8457993b) )
+ ROM_LOAD( "u163_master_snd_7_c733.u163", 0x380000, 0x080000, CRC(d90f78b2) SHA1(e847eba6a4d6c1a3044041a9d32b6b534fb45307) )
ROM_REGION(0x10000, "nvram", 0)
ROM_LOAD( "nvram.bin", 0x0000, 0x10000, CRC(1a4b2ee8) SHA1(9a14fb2089fef9d13e0a5fe0a83eb7bae51fe1ae) )
@@ -11958,7 +11970,12 @@ void seta_state::init_metafox()
}
-void seta_state::init_blandia()
+void seta_state::init_bankx1()
+{
+ m_x1_bank->configure_entries(0, 8, memregion("x1snd")->base(), 0x40000);
+}
+
+void seta_state::rearrange_gfx()
{
/* rearrange the gfx data so it can be decoded in the same way as the other set */
int rom_size = 0x80000;
@@ -11984,13 +12001,18 @@ void seta_state::init_blandia()
std::copy( buf.begin(), buf.end(), &rom[0] );
}
+void seta_state::init_blandia()
+{
+ rearrange_gfx();
+ init_bankx1();
+}
void seta_state::init_eightfrc()
{
m_maincpu->space(AS_PROGRAM).nop_read(0x500004, 0x500005); // watchdog??
+ init_bankx1();
}
-
void seta_state::init_kiwame()
{
uint16_t *RAM = (uint16_t *) memregion("maincpu")->base();
@@ -12002,7 +12024,6 @@ void seta_state::init_kiwame()
RAM[0x66/2] = 0x0dca;
}
-
void seta_state::init_rezon()
{
m_maincpu->space(AS_PROGRAM).nop_read(0x500006, 0x500007); // irq ack?
@@ -12016,6 +12037,13 @@ void seta_state::init_pairlove()
save_pointer(NAME(m_pairslove_protram_old), 0x200/2);
}
+void seta_state::init_zombraid()
+{
+ /* bank 1 is never explicitly selected, 0 is used in its place */
+ m_x1_bank->configure_entry(0, memregion("x1snd")->base() + 0x80000);
+ m_x1_bank->configure_entries(1, 7, memregion("x1snd")->base() + 0x80000, 0x80000);
+}
+
void seta_state::init_wiggie()
{
uint8_t temp[16];
@@ -12050,7 +12078,7 @@ void seta_state::init_crazyfgt()
// fixed priorities?
- init_blandia();
+ rearrange_gfx();
}
void jockeyc_state::init_inttoote()
@@ -12116,7 +12144,7 @@ GAME( 1991, stg, 0, drgnunit, stg, seta_state, empty_ini
GAME( 1991, pairlove, 0, pairlove, pairlove, seta_state, init_pairlove, ROT270, "Athena", "Pairs Love", 0 )
GAME( 1992, blandia, 0, blandia, blandia, seta_state, init_blandia, ROT0, "Allumer", "Blandia", MACHINE_IMPERFECT_GRAPHICS )
-GAME( 1992, blandiap, blandia, blandiap, blandia, seta_state, empty_init, ROT0, "Allumer", "Blandia (prototype)", MACHINE_IMPERFECT_GRAPHICS )
+GAME( 1992, blandiap, blandia, blandiap, blandia, seta_state, init_bankx1, ROT0, "Allumer", "Blandia (prototype)", MACHINE_IMPERFECT_GRAPHICS )
GAME( 1992, blockcar, 0, blockcar, blockcar, seta_state, empty_init, ROT90, "Visco", "Block Carnival / Thunder & Lightning 2" , 0) // Title: DSW
GAME( 1992, blockcarb, blockcar, blockcarb, blockcar, seta_state, empty_init, ROT90, "bootleg", "Block Carnival / Thunder & Lightning 2 (bootleg)", MACHINE_IMPERFECT_SOUND)
@@ -12179,8 +12207,8 @@ GAME( 1995, gundharac, gundhara, gundhara, gundhara, seta_state, empty_ini
GAME( 1995, sokonuke, 0, extdwnhl, sokonuke, seta_state, empty_init, ROT0, "Sammy Industries", "Sokonuke Taisen Game (Japan)", MACHINE_IMPERFECT_SOUND )
-GAME( 1995, zombraid, 0, zombraid, zombraid, seta_state, empty_init, ROT0, "American Sammy", "Zombie Raid (9/28/95, US)", MACHINE_NO_COCKTAIL )
-GAME( 1995, zombraidp, zombraid, zombraid, zombraid, seta_state, empty_init, ROT0, "American Sammy", "Zombie Raid (9/28/95, US, prototype PCB)", MACHINE_NO_COCKTAIL ) // actual code is same as the released version
-GAME( 1995, zombraidpj,zombraid, zombraid, zombraid, seta_state, empty_init, ROT0, "Sammy Industries Co.,Ltd.", "Zombie Raid (9/28/95, Japan, prototype PCB)", MACHINE_NO_COCKTAIL ) // just 3 bytes different from above
+GAME( 1995, zombraid, 0, zombraid, zombraid, seta_state, init_zombraid, ROT0, "American Sammy", "Zombie Raid (9/28/95, US)", MACHINE_NO_COCKTAIL )
+GAME( 1995, zombraidp, zombraid, zombraid, zombraid, seta_state, init_zombraid, ROT0, "American Sammy", "Zombie Raid (9/28/95, US, prototype PCB)", MACHINE_NO_COCKTAIL ) // actual code is same as the released version
+GAME( 1995, zombraidpj,zombraid, zombraid, zombraid, seta_state, init_zombraid, ROT0, "Sammy Industries Co.,Ltd.", "Zombie Raid (9/28/95, Japan, prototype PCB)", MACHINE_NO_COCKTAIL ) // just 3 bytes different from above
GAME( 1996, crazyfgt, 0, crazyfgt, crazyfgt, seta_state, init_crazyfgt, ROT0, "Subsino", "Crazy Fight", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
diff --git a/src/mame/drivers/seta2.cpp b/src/mame/drivers/seta2.cpp
index 7fb2fb8694e..eea00517916 100644
--- a/src/mame/drivers/seta2.cpp
+++ b/src/mame/drivers/seta2.cpp
@@ -131,19 +131,44 @@ reelquak:
***************************************************************************/
-WRITE16_MEMBER(seta2_state::sound_bank_w)
+void seta2_state::machine_start()
{
- if (ACCESSING_BITS_0_7)
+ if (memregion( "x1snd" ) != nullptr)
{
- uint8_t *ROM = memregion( "x1snd" )->base();
- int banks = (memregion( "x1snd" )->bytes() - 0x100000) / 0x20000;
- if (data >= banks)
+ uint32_t const max = memregion( "x1snd" )->bytes() / 0x20000;
+ for (int i = 0; i < 8; i++)
{
- logerror("CPU #0 PC %06X: invalid sound bank %04X\n",m_maincpu->pc(),data);
- data %= banks;
+ if (m_x1_bank[i] != nullptr)
+ {
+ uint32_t ind = 0;
+ while (ind < 256)
+ {
+ m_x1_bank[i]->configure_entries(ind, max, memregion( "x1snd" )->base(), 0x20000); // TODO : Mirrored?
+ ind += max;
+ }
+ }
}
- memcpy(ROM + offset * 0x20000, ROM + 0x100000 + data * 0x20000, 0x20000);
}
+
+ m_leds.resolve();
+ m_lamps.resolve();
+}
+
+WRITE8_MEMBER(seta2_state::sound_bank_w)
+{
+ m_x1_bank[offset & 7]->set_entry(data);
+}
+
+void seta2_state::x1_map(address_map &map)
+{
+ map(0x00000, 0x1ffff).bankr("x1_bank_1");
+ map(0x20000, 0x3ffff).bankr("x1_bank_2");
+ map(0x40000, 0x5ffff).bankr("x1_bank_3");
+ map(0x60000, 0x7ffff).bankr("x1_bank_4");
+ map(0x80000, 0x9ffff).bankr("x1_bank_5");
+ map(0xa0000, 0xbffff).bankr("x1_bank_6");
+ map(0xc0000, 0xdffff).bankr("x1_bank_7");
+ map(0xe0000, 0xfffff).bankr("x1_bank_8");
}
@@ -179,7 +204,7 @@ void seta2_state::grdians_map(address_map &map)
map(0xc40000, 0xc4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette
map(0xc50000, 0xc5ffff).ram(); // cleared
map(0xc60000, 0xc6003f).w(FUNC(seta2_state::vregs_w)).share("vregs"); // Video Registers
- map(0xe00010, 0xe0001f).w(FUNC(seta2_state::sound_bank_w)); // Samples Banks
+ map(0xe00010, 0xe0001f).w(FUNC(seta2_state::sound_bank_w)).umask16(0x00ff); // Samples Banks
map(0xfffc00, 0xffffff).rw(m_tmp68301, FUNC(tmp68301_device::regs_r), FUNC(tmp68301_device::regs_w)); // TMP68301 Registers
}
@@ -218,7 +243,7 @@ void seta2_state::gundamex_map(address_map &map)
map(0xc40000, 0xc4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette
map(0xc50000, 0xc5ffff).ram(); // cleared
map(0xc60000, 0xc6003f).w(FUNC(seta2_state::vregs_w)).share("vregs"); // Video Registers
- map(0xe00010, 0xe0001f).w(FUNC(seta2_state::sound_bank_w)); // Samples Banks
+ map(0xe00010, 0xe0001f).w(FUNC(seta2_state::sound_bank_w)).umask16(0x00ff); // Samples Banks
map(0xfffc00, 0xffffff).rw(m_tmp68301, FUNC(tmp68301_device::regs_r), FUNC(tmp68301_device::regs_w)); // TMP68301 Registers
}
@@ -277,7 +302,7 @@ void seta2_state::mj4simai_map(address_map &map)
map(0x600200, 0x600201).nopw(); // Leds? Coins?
map(0x600300, 0x600301).portr("DSW1"); // DSW 1
map(0x600302, 0x600303).portr("DSW2"); // DSW 2
- map(0x600300, 0x60030f).w(FUNC(seta2_state::sound_bank_w)); // Samples Banks
+ map(0x600300, 0x60030f).w(FUNC(seta2_state::sound_bank_w)).umask16(0x00ff); // Samples Banks
map(0xb00000, 0xb03fff).rw("x1snd", FUNC(x1_010_device::word_r), FUNC(x1_010_device::word_w)); // Sound
map(0xc00000, 0xc3ffff).ram().share("spriteram"); // Sprites
map(0xc40000, 0xc4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette
@@ -301,7 +326,7 @@ void seta2_state::myangel_map(address_map &map)
map(0x700200, 0x700201).nopw(); // Leds? Coins?
map(0x700300, 0x700301).portr("DSW1"); // DSW 1
map(0x700302, 0x700303).portr("DSW2"); // DSW 2
- map(0x700310, 0x70031f).w(FUNC(seta2_state::sound_bank_w)); // Samples Banks
+ map(0x700310, 0x70031f).w(FUNC(seta2_state::sound_bank_w)).umask16(0x00ff); // Samples Banks
map(0xb00000, 0xb03fff).rw("x1snd", FUNC(x1_010_device::word_r), FUNC(x1_010_device::word_w)); // Sound
map(0xc00000, 0xc3ffff).ram().share("spriteram"); // Sprites
map(0xc40000, 0xc4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette
@@ -325,7 +350,7 @@ void seta2_state::myangel2_map(address_map &map)
map(0x600200, 0x600201).nopw(); // Leds? Coins?
map(0x600300, 0x600301).portr("DSW1"); // DSW 1
map(0x600302, 0x600303).portr("DSW2"); // DSW 2
- map(0x600300, 0x60030f).w(FUNC(seta2_state::sound_bank_w)); // Samples Banks
+ map(0x600300, 0x60030f).w(FUNC(seta2_state::sound_bank_w)).umask16(0x00ff); // Samples Banks
map(0xb00000, 0xb03fff).rw("x1snd", FUNC(x1_010_device::word_r), FUNC(x1_010_device::word_w)); // Sound
map(0xd00000, 0xd3ffff).ram().share("spriteram"); // Sprites
map(0xd40000, 0xd4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette
@@ -366,7 +391,7 @@ void seta2_state::pzlbowl_map(address_map &map)
map(0x200000, 0x20ffff).ram(); // RAM
map(0x400300, 0x400301).portr("DSW1"); // DSW 1
map(0x400302, 0x400303).portr("DSW2"); // DSW 2
- map(0x400300, 0x40030f).w(FUNC(seta2_state::sound_bank_w)); // Samples Banks
+ map(0x400300, 0x40030f).w(FUNC(seta2_state::sound_bank_w)).umask16(0x00ff); // Samples Banks
map(0x500000, 0x500001).portr("P1"); // P1
map(0x500002, 0x500003).portr("P2"); // P2
map(0x500004, 0x500005).rw(FUNC(seta2_state::pzlbowl_coins_r), FUNC(seta2_state::pzlbowl_coin_counter_w)); // Coins + Protection?
@@ -407,7 +432,7 @@ void seta2_state::penbros_map(address_map &map)
map(0x300000, 0x30ffff).ram();
map(0x500300, 0x500301).portr("DSW1");
map(0x500302, 0x500303).portr("DSW2");
- map(0x500300, 0x50030f).w(FUNC(seta2_state::sound_bank_w));
+ map(0x500300, 0x50030f).w(FUNC(seta2_state::sound_bank_w)).umask16(0x00ff);
map(0xb60000, 0xb6003f).w(FUNC(seta2_state::vregs_w)).share("vregs");
map(0xfffc00, 0xffffff).rw(m_tmp68301, FUNC(tmp68301_device::regs_r), FUNC(tmp68301_device::regs_w));
}
@@ -471,7 +496,7 @@ void seta2_state::reelquak_map(address_map &map)
map(0x400200, 0x400201).w(FUNC(seta2_state::reelquak_coin_w)); // Coin Counters / IRQ Ack
map(0x400300, 0x400301).portr("DSW1"); // DSW 1
map(0x400302, 0x400303).portr("DSW2"); // DSW 2
- map(0x400300, 0x40030f).w(FUNC(seta2_state::sound_bank_w)); // Samples Banks
+ map(0x400300, 0x40030f).w(FUNC(seta2_state::sound_bank_w)).umask16(0x00ff); // Samples Banks
map(0xb00000, 0xb03fff).rw("x1snd", FUNC(x1_010_device::word_r), FUNC(x1_010_device::word_w)); // Sound
map(0xc00000, 0xc3ffff).ram().share("spriteram"); // Sprites
map(0xc40000, 0xc4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette
@@ -521,7 +546,7 @@ void seta2_state::samshoot_map(address_map &map)
map(0x400000, 0x400001).portr("DSW1"); // DSW 1
map(0x400002, 0x400003).portr("BUTTONS"); // Buttons
- map(0x400300, 0x40030f).w(FUNC(seta2_state::sound_bank_w)); // Samples Banks
+ map(0x400300, 0x40030f).w(FUNC(seta2_state::sound_bank_w)).umask16(0x00ff); // Samples Banks
map(0x500000, 0x500001).portr("GUN1"); // P1
map(0x580000, 0x580001).portr("GUN2"); // P2
@@ -713,7 +738,7 @@ void seta2_state::telpacfl_map(address_map &map)
map(0xb60000, 0xb6003f).w(FUNC(seta2_state::vregs_w)).share("vregs"); // Video Registers
map(0xd00006, 0xd00007).r("watchdog", FUNC(watchdog_timer_device::reset16_r));
// AM_RANGE(0xe00000, 0xe00001) AM_WRITE
- map(0xe00010, 0xe0001f).w(FUNC(seta2_state::sound_bank_w)); // Samples Banks
+ map(0xe00010, 0xe0001f).w(FUNC(seta2_state::sound_bank_w)).umask16(0x00ff); // Samples Banks
map(0xfffc00, 0xffffff).rw(m_tmp68301, FUNC(tmp68301_device::regs_r), FUNC(tmp68301_device::regs_w)); // TMP68301 Registers
}
@@ -2579,6 +2604,7 @@ MACHINE_CONFIG_START(seta2_state::seta2)
MCFG_DEVICE_ADD("x1snd", X1_010, XTAL(50'000'000)/3) // clock?
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+ MCFG_DEVICE_ADDRESS_MAP(0, x1_map)
MACHINE_CONFIG_END
@@ -3166,9 +3192,8 @@ ROM_START( grdians )
ROM_LOAD( "u21.bin", 0x1e00000, 0x200000, CRC(6f95e466) SHA1(28482fad16a3ac9302f152d81552e6f84a44f3e4) )
ROM_CONTINUE( 0x1c00000, 0x200000 )
- ROM_REGION( 0x200000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "u32.bin", 0x100000, 0x100000, CRC(cf0f3017) SHA1(8376d3a674f71aec72f52c72758fbc53d9feb1a1) )
+ ROM_REGION( 0x100000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "u32.bin", 0x000000, 0x100000, CRC(cf0f3017) SHA1(8376d3a674f71aec72f52c72758fbc53d9feb1a1) )
ROM_END
/***************************************************************************
@@ -3226,9 +3251,8 @@ ROM_START( gundamex )
ROM_LOAD( "ka001008.u23", 0x1400000, 0x200000, CRC(db55a60a) SHA1(03d118c7284ca86219891c473e2a89489710ea27) )
ROM_FILL( 0x1800000, 0x600000, 0x00 ) // 6bpp instead of 8bpp
- ROM_REGION( 0x300000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "ka001015.u28", 0x100000, 0x200000, CRC(ada2843b) SHA1(09d06026031bc7558da511c3c0e29187ea0a0099) )
+ ROM_REGION( 0x200000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "ka001015.u28", 0x000000, 0x200000, CRC(ada2843b) SHA1(09d06026031bc7558da511c3c0e29187ea0a0099) )
ROM_REGION16_BE( 0x80, "eeprom", 0 )
ROM_LOAD( "eeprom.bin", 0x0000, 0x0080, CRC(80f8e248) SHA1(1a9787811e56d95f7acbedfb00225b6e7df265eb) )
@@ -3265,9 +3289,8 @@ ROM_START( mj4simai )
ROM_LOAD( "cha-02.u22", 0x1400000, 0x400000, CRC(f6346860) SHA1(4eebd3fa315b97964fa39b88224f9de7622ba881) )
ROM_FILL( 0x1800000, 0x800000, 0x00 ) // 6bpp instead of 8bpp
- ROM_REGION( 0x500000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "cha-07.u32", 0x100000, 0x400000, CRC(817519ee) SHA1(ed09740cdbf61a328f7b50eb569cf498fb749416) )
+ ROM_REGION( 0x400000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "cha-07.u32", 0x000000, 0x400000, CRC(817519ee) SHA1(ed09740cdbf61a328f7b50eb569cf498fb749416) )
ROM_END
/***************************************************************************
@@ -3302,9 +3325,8 @@ ROM_START( myangel )
ROM_LOAD( "kq1-cg7.u21", 0xc00000, 0x200000, CRC(9f48382c) SHA1(80dfc33a55123b5d3cdb3ed97b43a527f0254d61) )
ROM_LOAD( "kq1-cg5.u17", 0xe00000, 0x200000, CRC(a4bc4516) SHA1(0eb11fa54d16bba1b96f9dd943a68949a3bb9a2f) )
- ROM_REGION( 0x300000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "kq1-snd.u32", 0x100000, 0x200000, CRC(8ca1b449) SHA1(f54096fb5400843af4879135c96760485b6cb319) )
+ ROM_REGION( 0x200000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "kq1-snd.u32", 0x000000, 0x200000, CRC(8ca1b449) SHA1(f54096fb5400843af4879135c96760485b6cb319) )
ROM_END
/***************************************************************************
@@ -3339,9 +3361,8 @@ ROM_START( myangel2 )
ROM_LOAD( "kqs1-cg7.u21", 0x1200000, 0x200000, CRC(2c977904) SHA1(2589447f2471cdc414266b34aff552044c680d93) )
ROM_LOAD( "kqs1-cg3.u17", 0x1400000, 0x400000, CRC(de3b2191) SHA1(d7d6ea07b665cfd834747d3c0776b968ce03bc6a) )
- ROM_REGION( 0x500000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "kqs1-snd.u32", 0x100000, 0x400000, CRC(792a6b49) SHA1(341b4e8f248b5032217733bada32e353c67e3888) )
+ ROM_REGION( 0x400000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "kqs1-snd.u32", 0x000000, 0x400000, CRC(792a6b49) SHA1(341b4e8f248b5032217733bada32e353c67e3888) )
ROM_END
/***************************************************************************
@@ -3461,9 +3482,8 @@ ROM_START( pzlbowl )
ROM_LOAD( "kuc-u40.i00", 0x800000, 0x400000, CRC(7e49a2cf) SHA1(d24683addbc54515c33fb620ac500e6702bd9e17) )
ROM_LOAD( "kuc-u41.i00", 0xc00000, 0x400000, CRC(2febf19b) SHA1(8081ac590c0463529777b5e4817305a1a6f6ea41) )
- ROM_REGION( 0x500000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "kus-u18.i00", 0x100000, 0x400000, CRC(e2b1dfcf) SHA1(fb0b8be119531a1a27efa46ed7b86b05a37ed585) )
+ ROM_REGION( 0x400000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "kus-u18.i00", 0x000000, 0x400000, CRC(e2b1dfcf) SHA1(fb0b8be119531a1a27efa46ed7b86b05a37ed585) )
ROM_END
/***************************************************************************
@@ -3547,9 +3567,8 @@ ROM_START( penbros ) // Genuine P0-142A PCB & original ROM labels
ROM_LOAD( "a-blast_jpn_u40.u40", 0x800000, 0x400000, CRC(dc9e0a96) SHA1(c2c8ccf9039ee0e179b08fdd2d37f29899349cda) )
ROM_FILL( 0xc00000, 0x400000, 0x00 ) // 6bpp instead of 8bpp
- ROM_REGION( 0x300000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "a-blast_jpn_u18.u18", 0x100000, 0x200000, CRC(de4e65e2) SHA1(82d4e590c714b3e9bf0ffaf1500deb24fd315595) )
+ ROM_REGION( 0x200000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "a-blast_jpn_u18.u18", 0x000000, 0x200000, CRC(de4e65e2) SHA1(82d4e590c714b3e9bf0ffaf1500deb24fd315595) )
ROM_END
ROM_START( ablast ) // Genuine P0-142A PCB & original ROM labels
@@ -3563,9 +3582,8 @@ ROM_START( ablast ) // Genuine P0-142A PCB & original ROM labels
ROM_LOAD( "a-blast_twn_u40.u40", 0x800000, 0x400000, CRC(db94847d) SHA1(fd2e29a45bb0acbd9e709256c7fc27bdd64a6634) )
ROM_FILL( 0xc00000, 0x400000, 0x00 ) // 6bpp instead of 8bpp
- ROM_REGION( 0x300000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "a-blast_twn_u18.u18", 0x100000, 0x200000, CRC(de4e65e2) SHA1(82d4e590c714b3e9bf0ffaf1500deb24fd315595) )
+ ROM_REGION( 0x200000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "a-blast_twn_u18.u18", 0x000000, 0x200000, CRC(de4e65e2) SHA1(82d4e590c714b3e9bf0ffaf1500deb24fd315595) )
ROM_END
ROM_START( ablastb ) // bootleg PCB with standard 68000 instead of TMP68301 and 4 FPGAs (3 A40MX04 and 1 A54SX16A)
@@ -3682,9 +3700,8 @@ ROM_START( reelquak )
ROM_LOAD( "kf-001-007_t44.u18", 0x400000, 0x200000, CRC(9daec83d) SHA1(07de144898deac5058d05466f29682d7840323b7) )
ROM_LOAD( "kf-001-008_t45.u17", 0x600000, 0x200000, CRC(f6ef6e41) SHA1(c3e838dd4dc340f44abdf45ec0b90de24f50dda9) )
- ROM_REGION( 0x300000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "kf-001-009_t46.u32", 0x100000, 0x200000, CRC(2a9641f9) SHA1(efb9df78f1877eddf29c4dae2461546adb9cea8f) )
+ ROM_REGION( 0x200000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "kf-001-009_t46.u32", 0x000000, 0x200000, CRC(2a9641f9) SHA1(efb9df78f1877eddf29c4dae2461546adb9cea8f) )
ROM_REGION( 0x117, "plds", 0 )
ROM_LOAD( "gal16v8_kf-001.u38", 0x000, 0x117, NO_DUMP )
@@ -3777,9 +3794,8 @@ ROM_START( endrichs )
ROM_LOAD( "kfc-u18-c00.u18", 0x400000, 0x200000, CRC(561ac136) SHA1(96da493157405a5d3d72b8cc3004abd3fa3eadfa) )
ROM_LOAD( "kfc-u17-c00.u17", 0x600000, 0x200000, CRC(34660029) SHA1(cf09b97422497d739f71e6ff8b9974fca0329928) )
- ROM_REGION( 0x300000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "kfs-u32-c00.u32", 0x100000, 0x200000, CRC(e9ffbecf) SHA1(3cc9ab3f4be1a305235603a68ca1e15797fb27cb) ) // Yes, it's actually "KFS" here
+ ROM_REGION( 0x200000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "kfs-u32-c00.u32", 0x000000, 0x200000, CRC(e9ffbecf) SHA1(3cc9ab3f4be1a305235603a68ca1e15797fb27cb) ) // Yes, it's actually "KFS" here
ROM_REGION( 0x117, "plds", 0 )
ROM_LOAD( "gal16v8_kf-001.u38", 0x000, 0x117, NO_DUMP )
@@ -3828,9 +3844,8 @@ ROM_START( staraudi )
ROM_REGION( 0x200000, "flash", ROMREGION_ERASE )
ROM_LOAD( "lh28f016sat_flash.u08", 0x000000, 0x200000, CRC(002255bd) SHA1(5e94c29e9a785fe49229f57bc94234ac79dd2f3b) )
- ROM_REGION( 0x500000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "su1_snd.u32", 0x100000, 0x400000, CRC(d5376010) SHA1(89fab1fbb45c7cf8acb63c31ecafdeb3482c2fec) ) // BAD, inconsistent reads: FIXED BITS (xxxxxxxx00000000)
+ ROM_REGION( 0x400000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "su1_snd.u32", 0x000000, 0x400000, CRC(d5376010) SHA1(89fab1fbb45c7cf8acb63c31ecafdeb3482c2fec) ) // BAD, inconsistent reads: FIXED BITS (xxxxxxxx00000000)
ROM_END
void staraudi_state::driver_start()
@@ -3838,7 +3853,7 @@ void staraudi_state::driver_start()
seta2_state::driver_start();
// bad sound rom: replace the missing (zero) sample with the previous one
- uint8_t *samples = memregion("x1snd")->base() + 0x100000;
+ uint8_t *samples = memregion("x1snd")->base();
for (int i = 0; i < 0x400000; i += 2)
samples[i + 1] = samples[i];
}
@@ -4094,9 +4109,8 @@ ROM_START( deerhunt ) /* Deer Hunting USA V4.3 (11/1/2000) - The "E05" breaks ve
ROM_LOAD( "as0903m01.u40", 0x1000000, 0x800000, CRC(e8ef81b3) SHA1(97666942ca6cca5b8ea6451314a2aaabad9e06ba) )
ROM_LOAD( "as0904m01.u41", 0x1800000, 0x800000, CRC(d0f97fdc) SHA1(776c9d42d03a9f61155521212305e1ed696eaf47) )
- ROM_REGION( 0x500000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "as0905m01.u18", 0x100000, 0x400000, CRC(8d8165bb) SHA1(aca7051613d260734ee787b4c3db552c336bd600) )
+ ROM_REGION( 0x400000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "as0905m01.u18", 0x000000, 0x400000, CRC(8d8165bb) SHA1(aca7051613d260734ee787b4c3db552c336bd600) )
ROM_END
ROM_START( deerhunta ) /* Deer Hunting USA V4.2 (xx/x/2000) */
@@ -4110,9 +4124,8 @@ ROM_START( deerhunta ) /* Deer Hunting USA V4.2 (xx/x/2000) */
ROM_LOAD( "as0903m01.u40", 0x1000000, 0x800000, CRC(e8ef81b3) SHA1(97666942ca6cca5b8ea6451314a2aaabad9e06ba) )
ROM_LOAD( "as0904m01.u41", 0x1800000, 0x800000, CRC(d0f97fdc) SHA1(776c9d42d03a9f61155521212305e1ed696eaf47) )
- ROM_REGION( 0x500000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "as0905m01.u18", 0x100000, 0x400000, CRC(8d8165bb) SHA1(aca7051613d260734ee787b4c3db552c336bd600) )
+ ROM_REGION( 0x400000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "as0905m01.u18", 0x000000, 0x400000, CRC(8d8165bb) SHA1(aca7051613d260734ee787b4c3db552c336bd600) )
ROM_END
ROM_START( deerhuntb ) /* Deer Hunting USA V4.0 (6/15/2000) */
@@ -4126,9 +4139,8 @@ ROM_START( deerhuntb ) /* Deer Hunting USA V4.0 (6/15/2000) */
ROM_LOAD( "as0903m01.u40", 0x1000000, 0x800000, CRC(e8ef81b3) SHA1(97666942ca6cca5b8ea6451314a2aaabad9e06ba) )
ROM_LOAD( "as0904m01.u41", 0x1800000, 0x800000, CRC(d0f97fdc) SHA1(776c9d42d03a9f61155521212305e1ed696eaf47) )
- ROM_REGION( 0x500000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "as0905m01.u18", 0x100000, 0x400000, CRC(8d8165bb) SHA1(aca7051613d260734ee787b4c3db552c336bd600) )
+ ROM_REGION( 0x400000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "as0905m01.u18", 0x000000, 0x400000, CRC(8d8165bb) SHA1(aca7051613d260734ee787b4c3db552c336bd600) )
ROM_END
/* Are there versions 3.x of Deer Hunting USA with labels "AS0906 E03 U06" & "AS0907 E03 U07" ?? */
@@ -4144,9 +4156,8 @@ ROM_START( deerhuntc ) /* These rom labels break label conventions but is correc
ROM_LOAD( "as0903m01.u40", 0x1000000, 0x800000, CRC(e8ef81b3) SHA1(97666942ca6cca5b8ea6451314a2aaabad9e06ba) )
ROM_LOAD( "as0904m01.u41", 0x1800000, 0x800000, CRC(d0f97fdc) SHA1(776c9d42d03a9f61155521212305e1ed696eaf47) )
- ROM_REGION( 0x500000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "as0905m01.u18", 0x100000, 0x400000, CRC(8d8165bb) SHA1(aca7051613d260734ee787b4c3db552c336bd600) )
+ ROM_REGION( 0x400000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "as0905m01.u18", 0x000000, 0x400000, CRC(8d8165bb) SHA1(aca7051613d260734ee787b4c3db552c336bd600) )
ROM_END
ROM_START( deerhuntd ) /* Deer Hunting USA V2.x - No version number is printed to screen but "E02" in EPROM label signifies V2 */
@@ -4160,9 +4171,8 @@ ROM_START( deerhuntd ) /* Deer Hunting USA V2.x - No version number is printed t
ROM_LOAD( "as0903m01.u40", 0x1000000, 0x800000, CRC(e8ef81b3) SHA1(97666942ca6cca5b8ea6451314a2aaabad9e06ba) )
ROM_LOAD( "as0904m01.u41", 0x1800000, 0x800000, CRC(d0f97fdc) SHA1(776c9d42d03a9f61155521212305e1ed696eaf47) )
- ROM_REGION( 0x500000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "as0905m01.u18", 0x100000, 0x400000, CRC(8d8165bb) SHA1(aca7051613d260734ee787b4c3db552c336bd600) )
+ ROM_REGION( 0x400000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "as0905m01.u18", 0x000000, 0x400000, CRC(8d8165bb) SHA1(aca7051613d260734ee787b4c3db552c336bd600) )
ROM_END
ROM_START( deerhunte ) /* Deer Hunting USA V1.x - No version number is printed to screen but "E01" in EPROM label signifies V1 */
@@ -4176,9 +4186,8 @@ ROM_START( deerhunte ) /* Deer Hunting USA V1.x - No version number is printed t
ROM_LOAD( "as0903m01.u40", 0x1000000, 0x800000, CRC(e8ef81b3) SHA1(97666942ca6cca5b8ea6451314a2aaabad9e06ba) )
ROM_LOAD( "as0904m01.u41", 0x1800000, 0x800000, CRC(d0f97fdc) SHA1(776c9d42d03a9f61155521212305e1ed696eaf47) )
- ROM_REGION( 0x500000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "as0905m01.u18", 0x100000, 0x400000, CRC(8d8165bb) SHA1(aca7051613d260734ee787b4c3db552c336bd600) )
+ ROM_REGION( 0x400000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "as0905m01.u18", 0x000000, 0x400000, CRC(8d8165bb) SHA1(aca7051613d260734ee787b4c3db552c336bd600) )
ROM_END
ROM_START( turkhunt ) /* V1.0 is currently the only known version */
@@ -4192,9 +4201,8 @@ ROM_START( turkhunt ) /* V1.0 is currently the only known version */
ROM_LOAD( "asx903m01.u40", 0x1000000, 0x800000, CRC(5f86c322) SHA1(5a72adb99eea176199f172384cb051e2b045ab94) )
ROM_LOAD( "asx904m01.u41", 0x1800000, 0x800000, CRC(c77e0b66) SHA1(0eba30e62e4bd38c198fa6cb69fb94d002ded77a) )
- ROM_REGION( 0x500000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "asx905m01.u18", 0x100000, 0x400000, CRC(8d9dd9a9) SHA1(1fc2f3688d2c24c720dca7357bca6bf5f4016c53) )
+ ROM_REGION( 0x400000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "asx905m01.u18", 0x000000, 0x400000, CRC(8d9dd9a9) SHA1(1fc2f3688d2c24c720dca7357bca6bf5f4016c53) )
ROM_END
ROM_START( wschamp ) /* Wing Shooting Championship V2.00 (01/23/2002) */
@@ -4208,9 +4216,8 @@ ROM_START( wschamp ) /* Wing Shooting Championship V2.00 (01/23/2002) */
ROM_LOAD( "as1003m01.u40", 0x1000000, 0x800000, CRC(89618858) SHA1(a8bd07f233482e8f5a256af7ff9577648eb58ef4) )
ROM_LOAD( "as1004m01.u41", 0x1800000, 0x800000, CRC(500c0909) SHA1(73ff27d46b9285f34a50a81c21c54437f21e1939) )
- ROM_REGION( 0x500000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "as1005m01.u18", 0x100000, 0x400000, CRC(e4b137b8) SHA1(4d8d15073c51f7d383282cc5755ae5b2eab6226c) )
+ ROM_REGION( 0x400000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "as1005m01.u18", 0x000000, 0x400000, CRC(e4b137b8) SHA1(4d8d15073c51f7d383282cc5755ae5b2eab6226c) )
ROM_END
ROM_START( wschampa ) /* Wing Shooting Championship V1.01 */
@@ -4224,9 +4231,8 @@ ROM_START( wschampa ) /* Wing Shooting Championship V1.01 */
ROM_LOAD( "as1003m01.u40", 0x1000000, 0x800000, CRC(89618858) SHA1(a8bd07f233482e8f5a256af7ff9577648eb58ef4) )
ROM_LOAD( "as1004m01.u41", 0x1800000, 0x800000, CRC(500c0909) SHA1(73ff27d46b9285f34a50a81c21c54437f21e1939) )
- ROM_REGION( 0x500000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "as1005m01.u18", 0x100000, 0x400000, CRC(e4b137b8) SHA1(4d8d15073c51f7d383282cc5755ae5b2eab6226c) )
+ ROM_REGION( 0x400000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "as1005m01.u18", 0x000000, 0x400000, CRC(e4b137b8) SHA1(4d8d15073c51f7d383282cc5755ae5b2eab6226c) )
ROM_END
ROM_START( wschampb ) /* Wing Shooting Championship V1.00, dumps match listed checksum but shows as "NG" on boot screen - need to verify correct at some point if possible */
@@ -4240,9 +4246,8 @@ ROM_START( wschampb ) /* Wing Shooting Championship V1.00, dumps match listed ch
ROM_LOAD( "as1003m01.u40", 0x1000000, 0x800000, CRC(89618858) SHA1(a8bd07f233482e8f5a256af7ff9577648eb58ef4) )
ROM_LOAD( "as1004m01.u41", 0x1800000, 0x800000, CRC(500c0909) SHA1(73ff27d46b9285f34a50a81c21c54437f21e1939) )
- ROM_REGION( 0x500000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "as1005m01.u18", 0x100000, 0x400000, CRC(e4b137b8) SHA1(4d8d15073c51f7d383282cc5755ae5b2eab6226c) )
+ ROM_REGION( 0x400000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "as1005m01.u18", 0x000000, 0x400000, CRC(e4b137b8) SHA1(4d8d15073c51f7d383282cc5755ae5b2eab6226c) )
ROM_END
ROM_START( trophyh ) /* Version 1.00 - v: Thu Mar 28 12:35:50 2002 JST-9 - on a B0-010A PCB with all MASK ROMs */
@@ -4256,9 +4261,8 @@ ROM_START( trophyh ) /* Version 1.00 - v: Thu Mar 28 12:35:50 2002 JST-9 - on a
ROM_LOAD( "as1103m01.u40", 0x1000000, 0x800000, CRC(adf8a54e) SHA1(bb28bf219d18082246f7964851a5c49b9c0ba7f5) )
ROM_LOAD( "as1104m01.u41", 0x1800000, 0x800000, CRC(387882e9) SHA1(0fdd0c77dabd1066c6f3bd64e357236a76f524ab) )
- ROM_REGION( 0x500000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "as1105m01.u18", 0x100000, 0x400000, CRC(633d0df8) SHA1(3401c424f5c207ef438a9269e0c0e7d482771fed) )
+ ROM_REGION( 0x400000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "as1105m01.u18", 0x000000, 0x400000, CRC(633d0df8) SHA1(3401c424f5c207ef438a9269e0c0e7d482771fed) )
ROM_END
ROM_START( trophyht ) /* V1.00 Location Test - v: Tue Feb 26 18:18:43 2002 JST-9 - on a P0-145-1 main PCB with a P1-115A flash ROM board */
@@ -4288,9 +4292,8 @@ ROM_START( trophyht ) /* V1.00 Location Test - v: Tue Feb 26 18:18:43 2002 JST-9
ROM_LOAD( "as1103m01.u40", 0x1000000, 0x800000, CRC(adf8a54e) SHA1(bb28bf219d18082246f7964851a5c49b9c0ba7f5) ) /* Load these in until the flash ROMs are dumped */
ROM_LOAD( "as1104m01.u41", 0x1800000, 0x800000, CRC(387882e9) SHA1(0fdd0c77dabd1066c6f3bd64e357236a76f524ab) ) /* Load these in until the flash ROMs are dumped */
- ROM_REGION( 0x500000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "as1105m01.u18", 0x100000, 0x400000, CRC(633d0df8) SHA1(3401c424f5c207ef438a9269e0c0e7d482771fed) ) /* unlabeled 27C322 with same data as AS1105M01 MASK rom */
+ ROM_REGION( 0x400000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "as1105m01.u18", 0x000000, 0x400000, CRC(633d0df8) SHA1(3401c424f5c207ef438a9269e0c0e7d482771fed) ) /* unlabeled 27C322 with same data as AS1105M01 MASK rom */
ROM_END
/***************************************************************************
@@ -4329,10 +4332,9 @@ ROM_START( telpacfl )
ROM_FILL ( 0x400000, 0x200000, 0 ) // wipe out the bad rom
// Empty sockets: 23C16000 (@ U17-20, U22-23)
- ROM_REGION( 0x200000, "x1snd", 0 ) // Samples
- // Leave 1MB empty (addressable by the chip)
- ROM_LOAD( "mp3_sound0__u111_v1.0.u111", 0x100000, 0x080000, CRC(711c915e) SHA1(d654a0c158cf54aab5faca913583c5620388aa46) )
- ROM_LOAD( "mp3_sound1__u112_v1.0.u112", 0x180000, 0x080000, CRC(27fd83cd) SHA1(d0261b2c5354ea17061e71bcea747d70efc18a49) )
+ ROM_REGION( 0x100000, "x1snd", 0 ) // Samples
+ ROM_LOAD( "mp3_sound0__u111_v1.0.u111", 0x000000, 0x080000, CRC(711c915e) SHA1(d654a0c158cf54aab5faca913583c5620388aa46) )
+ ROM_LOAD( "mp3_sound1__u112_v1.0.u112", 0x080000, 0x080000, CRC(27fd83cd) SHA1(d0261b2c5354ea17061e71bcea747d70efc18a49) )
ROM_REGION( 0x117 * 2, "plds", 0 )
ROM_LOAD( "kc-001c.u51", 0x000, 0x117, NO_DUMP )
diff --git a/src/mame/drivers/snk.cpp b/src/mame/drivers/snk.cpp
index e46fc7ed140..bd890c5c771 100644
--- a/src/mame/drivers/snk.cpp
+++ b/src/mame/drivers/snk.cpp
@@ -5001,6 +5001,59 @@ ROM_START( ikaria )
ROM_LOAD( "15.rom", 0x18000, 0x8000, CRC(65a61c99) SHA1(767694c919180de208b6211b593db68fc5a66ff1) )
ROM_LOAD( "13.rom", 0x20000, 0x8000, CRC(315383d7) SHA1(1c1c5931e3447c4dcbd54fc8ae383b03cb5fbf5b) )
ROM_LOAD( "16.rom", 0x28000, 0x8000, CRC(e9b03e07) SHA1(124e5328a965ea2af28c4d74934a82394a2ffd72) )
+
+ ROM_REGION( 0x0800, "plds", 0 )
+ ROM_LOAD( "ampal16r6a-a5004.1", 0x0000, 0x0104, CRC(a2e9a162) SHA1(35abf667725abea74d36c76552387e7a1debe75a) )
+ ROM_LOAD( "pal20l8a-a5004.2", 0x0200, 0x0144, CRC(28f2c404) SHA1(d0832ef9e6be6449018f9b224d5f7203820a5135) )
+ ROM_LOAD( "ampal16l8a-a5004.3", 0x0400, 0x0104, CRC(540351f2) SHA1(d9c3aebb839935c8b49678693b87cc2bca2a674d) )
+ ROM_LOAD( "ampal16l8a-a5004.4", 0x0600, 0x0104, CRC(540351f2) SHA1(d9c3aebb839935c8b49678693b87cc2bca2a674d) )
+ROM_END
+
+ROM_START( ikaria2 )
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "p1.l4", 0x0000, 0x4000, CRC(9605f856) SHA1(48fcf3a9a9c60428adc8973c051cf6b3098e37b7) ) // 27128
+ ROM_LOAD( "p2.bin", 0x4000, 0x8000, CRC(b585e931) SHA1(6eaf7592b2c42c5992c9fbece62640ad647f86ef) )
+
+ ROM_REGION( 0x10000, "sub", 0 )
+ ROM_LOAD( "p3", 0x0000, 0x4000, CRC(8a9bd1f0) SHA1(dbf855e328daeddd38c64b7af2d303426d13bf3b) )
+ ROM_LOAD( "p4", 0x4000, 0x8000, CRC(f4101cb4) SHA1(cee0eb1cae9f584fb5a866d3a8725f6a3feba912) )
+
+ ROM_REGION( 0x10000, "audiocpu", 0 )
+ ROM_LOAD( "ik5", 0x0000, 0x4000, CRC(863448fa) SHA1(19cad05dc9c4495f36e0d8627927ea6d0a971824) )
+ ROM_LOAD( "ik6", 0x4000, 0x8000, CRC(9b16aa57) SHA1(69866ce41c587721702c92ac2e9ba3f6645004cf) )
+
+ ROM_REGION( 0x0c00, "proms", 0 )
+ ROM_LOAD( "7122er.prm", 0x000, 0x400, CRC(b9bf2c2c) SHA1(8eb62152dcb04f463baf6ec2a66148eb947403ef) )
+ ROM_LOAD( "7122eg.prm", 0x400, 0x400, CRC(0703a770) SHA1(62861ef4987003d4965ef5018ccdf7157981d939) )
+ ROM_LOAD( "7122eb.prm", 0x800, 0x400, CRC(0a11cdde) SHA1(faae17398341317e7afbd06b903b8e9e65967bf1) )
+
+ ROM_REGION( 0x4000, "tx_tiles", 0 )
+ ROM_LOAD( "7.rom", 0x00000, 0x4000, CRC(a7eb4917) SHA1(6c07323cc243df4c5c30bc0daedbff3887309f65) )
+
+ ROM_REGION( 0x20000, "bg_tiles", 0 )
+ ROM_LOAD( "17.rom", 0x00000, 0x8000, CRC(e0dba976) SHA1(5a8f14f7a199b5fb1862debda0bceee42cddac59) )
+ ROM_LOAD( "18.rom", 0x08000, 0x8000, CRC(24947d5f) SHA1(ffd18074ced8171c9da56c839e8289afc29af2c9) )
+ ROM_LOAD( "19.rom", 0x10000, 0x8000, CRC(9ee59e91) SHA1(fe51d13ab73cb596a233669e304b2be66f9becae) )
+ ROM_LOAD( "20.rom", 0x18000, 0x8000, CRC(5da7ec1a) SHA1(4b212c1dfe4c18eced90ee3a783e7edf8d23c906) )
+
+ ROM_REGION( 0x18000, "sp16_tiles", 0 )
+ ROM_LOAD( "8.rom", 0x00000, 0x8000, CRC(9827c14a) SHA1(b54dcee95c6f6e46c187a117b4e7aaf1c0ece6c6) )
+ ROM_LOAD( "9.rom", 0x08000, 0x8000, CRC(545c790c) SHA1(7738738f4a1343b04efd029ecaefac74010451f0) )
+ ROM_LOAD( "10.rom", 0x10000, 0x8000, CRC(ec9ba07e) SHA1(6b492b2cd7b8cca948ce39c3450f1cc153f41d90) )
+
+ ROM_REGION( 0x30000, "sp32_tiles", 0 )
+ ROM_LOAD( "11.rom", 0x00000, 0x8000, CRC(5c75ea8f) SHA1(4e8ee56a2dbeb9ac2dd74bc584dba29433d91ae0) )
+ ROM_LOAD( "14.rom", 0x08000, 0x8000, CRC(3293fde4) SHA1(3e2f0fa00c22f1c0c1427d8d3de57dd9ec7682a9) )
+ ROM_LOAD( "12.rom", 0x10000, 0x8000, CRC(95138498) SHA1(8ac3d2cd793312434b9ffb8c47c30473f713e0e8) )
+ ROM_LOAD( "15.rom", 0x18000, 0x8000, CRC(65a61c99) SHA1(767694c919180de208b6211b593db68fc5a66ff1) )
+ ROM_LOAD( "13.rom", 0x20000, 0x8000, CRC(315383d7) SHA1(1c1c5931e3447c4dcbd54fc8ae383b03cb5fbf5b) )
+ ROM_LOAD( "16.rom", 0x28000, 0x8000, CRC(e9b03e07) SHA1(124e5328a965ea2af28c4d74934a82394a2ffd72) )
+
+ ROM_REGION( 0x0800, "plds", 0 )
+ ROM_LOAD( "ampal16r6a-a5004.1", 0x0000, 0x0104, CRC(a2e9a162) SHA1(35abf667725abea74d36c76552387e7a1debe75a) )
+ ROM_LOAD( "pal20l8a-a5004.2", 0x0200, 0x0144, CRC(28f2c404) SHA1(d0832ef9e6be6449018f9b224d5f7203820a5135) )
+ ROM_LOAD( "ampal16l8a-a5004.3", 0x0400, 0x0104, CRC(540351f2) SHA1(d9c3aebb839935c8b49678693b87cc2bca2a674d) )
+ ROM_LOAD( "ampal16l8a-a5004.4", 0x0600, 0x0104, CRC(540351f2) SHA1(d9c3aebb839935c8b49678693b87cc2bca2a674d) )
ROM_END
ROM_START( ikarinc )
@@ -6566,7 +6619,8 @@ GAME( 1988, fitegolf2, fitegolf, fitegolf2, fitegolfu, snk_state, empty_init, RO
GAME( 1988, countryc, 0, countryc, countryc, snk_state, empty_init, ROT0, "SNK", "Country Club", 0 )
GAME( 1986, ikari, 0, ikari, ikari, snk_state, empty_init, ROT270, "SNK", "Ikari Warriors (US JAMMA)", 0 ) // distributed by Tradewest(?)
-GAME( 1986, ikaria, ikari, ikari, ikaria, snk_state, empty_init, ROT270, "SNK", "Ikari Warriors (US)", 0 ) // distributed by Tradewest(?)
+GAME( 1986, ikaria, ikari, ikari, ikaria, snk_state, empty_init, ROT270, "SNK", "Ikari Warriors (US, set 1)", 0 ) // distributed by Tradewest(?)
+GAME( 1986, ikaria2, ikari, ikari, ikaria, snk_state, empty_init, ROT270, "SNK", "Ikari Warriors (US, set 2)", 0 ) // distributed by Tradewest(?)
GAME( 1986, ikarinc, ikari, ikari, ikarinc, snk_state, empty_init, ROT270, "SNK", "Ikari Warriors (US No Continues)", 0 ) // distributed by Tradewest(?)
GAME( 1986, ikarijp, ikari, ikari, ikarinc, snk_state, empty_init, ROT270, "SNK", "Ikari (Japan No Continues)", 0 )
GAME( 1986, ikarijpb, ikari, ikari, ikarijpb, snk_state, empty_init, ROT270, "bootleg", "Ikari (Joystick hack bootleg)", 0 )
diff --git a/src/mame/drivers/super80.cpp b/src/mame/drivers/super80.cpp
index 53879d334aa..e113b2daab3 100644
--- a/src/mame/drivers/super80.cpp
+++ b/src/mame/drivers/super80.cpp
@@ -761,7 +761,7 @@ MACHINE_CONFIG_START(super80_state::super80)
MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_h", super80_state, timer_h, attotime::from_hz(100)) // half-speed
// software list
- MCFG_SOFTWARE_LIST_ADD("cass_list", "super80_cass")
+ SOFTWARE_LIST(config, "cass_list").set_original("super80_cass").set_filter("DEF");
MACHINE_CONFIG_END
MACHINE_CONFIG_START(super80_state::super80d)
@@ -846,9 +846,13 @@ MACHINE_CONFIG_START(super80_state::super80v)
/* cassette */
MCFG_CASSETTE_ADD( "cassette" )
MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED | CASSETTE_SPEAKER_ENABLED)
+ MCFG_CASSETTE_INTERFACE("super80_cass")
MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_p", super80_state, timer_p, attotime::from_hz(40000)) // cass read
MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_k", super80_state, timer_k, attotime::from_hz(300)) // keyb scan
+
+ // software list
+ SOFTWARE_LIST(config, "cass_list").set_original("super80_cass").set_filter("V");
MACHINE_CONFIG_END
MACHINE_CONFIG_START(super80_state::super80r)
diff --git a/src/mame/drivers/system1.cpp b/src/mame/drivers/system1.cpp
index b8b20d9108b..b21125b0a31 100644
--- a/src/mame/drivers/system1.cpp
+++ b/src/mame/drivers/system1.cpp
@@ -2986,6 +2986,33 @@ ROM_START( flickyo )
ROM_LOAD( "pr-5317.76", 0x0000, 0x0100, CRC(648350b8) SHA1(c7986aa9127ef5b50b845434cb4e81dff9861cd2) )
ROM_END
+// Coverted from and running on a Up n' Down board.
+ROM_START( flickyup )
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "2764-ic29", 0x0000, 0x2000, CRC(59ba3107) SHA1(2d37f00b8a81b97e45aa78ae75449663c35acece) ) /* encrypted */
+ ROM_LOAD( "2764-ic30", 0x2000, 0x2000, CRC(5c84216f) SHA1(8147a51e5d5aee788f1aab8e9032a5813e5c43a1) ) /* encrypted */
+ ROM_LOAD( "2764-ic31", 0x4000, 0x2000, CRC(106132fa) SHA1(669d9cbc1f18649a7d7a8cb462b76a6c34362ed3) ) /* encrypted */
+ ROM_LOAD( "2764-ic32", 0x6000, 0x2000, CRC(c5ea7f58) SHA1(0adcbee77dad813fe168ad383e579c94bc31635f) ) /* encrypted */
+
+ ROM_REGION( 0x10000, "soundcpu", 0 )
+ ROM_LOAD( "epr-5869.120", 0x0000, 0x2000, CRC(6d220d4e) SHA1(fe02a7a94a1ad046fc775a7f67f460c8d0f6dca6) ) /* 2764-ic3 */
+
+ ROM_REGION( 0xc000, "tiles", 0 )
+ ROM_LOAD( "epr-5868.62", 0x0000, 0x2000, CRC(7402256b) SHA1(5bd660ac24a2d0d8ad983e948674a82a2d2e8b49) ) /* 2764-ic82 */
+ ROM_LOAD( "epr-5867.61", 0x2000, 0x2000, CRC(2f5ce930) SHA1(4bc3bc6eb8f03926d3710c9f96fcc1b116e918d3) ) /* 2764-ic65 */
+ ROM_LOAD( "epr-5866.64", 0x4000, 0x2000, CRC(967f1d9a) SHA1(652be7848526c6e61db4a502f75d1689d2ff2f59) ) /* 2764-ic81 */
+ ROM_LOAD( "epr-5865.63", 0x6000, 0x2000, CRC(03d9a34c) SHA1(e158db3e0b86f2b8ad34cefc2714cb0a942efde7) ) /* 2764-ic64 */
+ ROM_LOAD( "epr-5864.66", 0x8000, 0x2000, CRC(e659f358) SHA1(cf59f1fb0f9fb77d5ac36be52b6ee946ee85d6de) ) /* 2764-ic80 */
+ ROM_LOAD( "epr-5863.65", 0xa000, 0x2000, CRC(a496ca15) SHA1(8c629a853486bbe049b1deecdc00f9e16b87698f) ) /* 2764-ic63 */
+
+ ROM_REGION( 0x8000, "sprites", 0 )
+ ROM_LOAD( "epr-5855.117", 0x0000, 0x4000, CRC(b5f894a1) SHA1(2c72dc16739dad155fcd572e1add067a7647f5bd) ) /* 27128-ic86 */
+ ROM_LOAD( "epr-5856.110", 0x4000, 0x4000, CRC(266af78f) SHA1(dcbfce550d10a1f2b3ce3e7e081fc008cb575708) ) /* 27128-ic93 */
+
+ ROM_REGION( 0x0100, "proms", 0 )
+ ROM_LOAD( "pr-5317.76", 0x0000, 0x0100, CRC(648350b8) SHA1(c7986aa9127ef5b50b845434cb4e81dff9861cd2) ) /* location ic106 */
+ROM_END
+
ROM_START( wmatch )
ROM_REGION( 0x10000, "maincpu", 0 )
@@ -5486,6 +5513,7 @@ GAME( 1984, mrvikingj, mrviking, sys1ppisx_315_5041,mrvikingj, system1_state, i
GAME( 1984, swat, 0, sys1ppix_315_5048, swat, system1_state, init_bank00, ROT270, "Coreland / Sega", "SWAT (315-5048)", MACHINE_SUPPORTS_SAVE )
GAME( 1984, flickyo, flicky, sys1ppix_315_5051, flicky, system1_state, init_bank00, ROT0, "Sega", "Flicky (64k Version, 315-5051, set 1)", MACHINE_SUPPORTS_SAVE )
GAME( 1984, flickys1, flicky, sys1ppix_315_5051, flickys1, system1_state, init_bank00, ROT0, "Sega", "Flicky (64k Version, 315-5051, set 2)", MACHINE_SUPPORTS_SAVE )
+GAME( 1984, flickyup, flicky, sys1ppix_315_5051, flicky, system1_state, init_bank00, ROT0, "Sega", "Flicky (64k Version, on Up'n Down boardset)", MACHINE_SUPPORTS_SAVE )
GAME( 1984, wmatch, 0, sys1ppisx_315_5064,wmatch, system1_state, init_bank00, ROT270, "Sega", "Water Match (315-5064)", MACHINE_SUPPORTS_SAVE )
GAME( 1984, bullfgt, 0, sys1ppix_315_5065, bullfgt, system1_state, init_bank00, ROT0, "Coreland / Sega", "Bullfight (315-5065)", MACHINE_SUPPORTS_SAVE )
GAME( 1985, nprinces, seganinj, sys1ppix_315_5051, seganinj, system1_state, init_bank00, ROT0, "bootleg?", "Ninja Princess (315-5051, 64k Ver. bootleg?)", MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/tmnt.cpp b/src/mame/drivers/tmnt.cpp
index 06efd649ee6..c1de05b6525 100644
--- a/src/mame/drivers/tmnt.cpp
+++ b/src/mame/drivers/tmnt.cpp
@@ -4268,7 +4268,7 @@ GAME( 1991, tmht22pe, tmnt2, tmnt2, ssriders, tmnt_state, empty_init,
GAME( 1991, tmht24pe, tmnt2, tmnt2, ssridr4p, tmnt_state, empty_init, ROT0, "Konami", "Teenage Mutant Hero Turtles - Turtles in Time (4 Players ver EAA)", MACHINE_SUPPORTS_SAVE )
GAME( 1991, tmnt22pu, tmnt2, tmnt2, ssriders, tmnt_state, empty_init, ROT0, "Konami", "Teenage Mutant Ninja Turtles - Turtles in Time (2 Players ver UDA)", MACHINE_SUPPORTS_SAVE )
-GAME( 1993, qgakumon, 0, tmnt2, qgakumon, tmnt_state, empty_init, ROT0, "Konami", "Quiz Gakumon no Susume (Japan ver. JA2 Type L)", MACHINE_SUPPORTS_SAVE )
+GAME( 1993, qgakumon, 0, tmnt2, qgakumon, tmnt_state, empty_init, ROT0, "Konami", "Quiz Gakumon no Susume (Japan ver. JA1 Type H)", MACHINE_SUPPORTS_SAVE )
GAME( 1991, ssriders, 0, ssriders, ssridr4p, tmnt_state, empty_init, ROT0, "Konami", "Sunset Riders (4 Players ver EAC)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
GAME( 1991, ssriderseaa, ssriders, ssriders, ssridr4p, tmnt_state, empty_init, ROT0, "Konami", "Sunset Riders (4 Players ver EAA)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/trs80m3.cpp b/src/mame/drivers/trs80m3.cpp
index 3b55eab2995..db8b3b44b6d 100644
--- a/src/mame/drivers/trs80m3.cpp
+++ b/src/mame/drivers/trs80m3.cpp
@@ -23,7 +23,6 @@ EA:
- UART status (read and write) on a Model III/4
E9:
-- UART Configuration jumpers (read) on a Model III/4
- Set baud rate (Model III/4)
E8:
@@ -34,19 +33,18 @@ Model 4 - C0-CF = hard drive (optional)
- 90-93 write sound (optional)
- 80-8F hires graphics (optional)
+Shift and Right-arrow will enable 32 cpl.
+
About the RTC - The time is incremented while ever the cursor is flashing. It is stored in a series
of bytes in the computer's work area. The bytes are in a certain order, this is:
- seconds, minutes, hours, year, day, month. On a model 1, the seconds are stored at
- 0x4041, while on the model 4 it is 0x4217. A reboot always sets the time to zero.
+ seconds, minutes, hours, year, day, month. The seconds are stored at 0x4217.
+ A reboot always sets the time to zero.
Model 4 memory organisation -
Mode 0: ROM=0-37E7 and 37EA-3FFF; Printer=37E8-37E9; Keyboard=3800-3BFF; Video=3C00-3FFF
Mode 1: Keyboard and Video as above; 0-3FFF read=ROM and write=RAM
Mode 2: Keyboard=F400-F7FF; Video=F800-FFFF; the rest is RAM
Mode 3: All RAM
- In the "maincpu" memory map, the first 64k is given to the ROM, keyboard, printer and video,
- while the second 64k is RAM that is switched in as needed. The area from 4800-FFFF
- is considered a "black hole", any writes to there will disappear.
The video is organised as 2 banks of 0x400 bytes, except in Mode 2 where it becomes contiguous.
Model 4P - is the same as Model 4 except:
@@ -96,7 +94,7 @@ void trs80m3_state::m3_io(address_map &map)
map(0xe0, 0xe3).rw(FUNC(trs80m3_state::port_e0_r), FUNC(trs80m3_state::port_e0_w));
map(0xe4, 0xe4).rw(FUNC(trs80m3_state::port_e4_r), FUNC(trs80m3_state::port_e4_w));
map(0xe8, 0xe8).rw(FUNC(trs80m3_state::port_e8_r), FUNC(trs80m3_state::port_e8_w));
- map(0xe9, 0xe9).portr("E9").w(m_brg, FUNC(com8116_device::stt_str_w));
+ map(0xe9, 0xe9).w(m_brg, FUNC(com8116_device::stt_str_w));
map(0xea, 0xea).rw(FUNC(trs80m3_state::port_ea_r), FUNC(trs80m3_state::port_ea_w));
map(0xeb, 0xeb).rw(m_uart, FUNC(ay31015_device::receive), FUNC(ay31015_device::transmit));
map(0xec, 0xef).rw(FUNC(trs80m3_state::port_ec_r), FUNC(trs80m3_state::port_ec_w));
@@ -208,8 +206,8 @@ void trs80m3_state::cp500_io(address_map &map)
static INPUT_PORTS_START( trs80m4p )
PORT_START("LINE0")
- PORT_BIT(0x01, 0x00, IPT_KEYBOARD) PORT_NAME("@") PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('@')
- PORT_BIT(0x02, 0x00, IPT_KEYBOARD) PORT_NAME("A") PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A')
+ PORT_BIT(0x01, 0x00, IPT_KEYBOARD) PORT_NAME("@") PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('@')
+ PORT_BIT(0x02, 0x00, IPT_KEYBOARD) PORT_NAME("A") PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A')
PORT_BIT(0x04, 0x00, IPT_KEYBOARD) PORT_NAME("B") PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B')
PORT_BIT(0x08, 0x00, IPT_KEYBOARD) PORT_NAME("C") PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C')
PORT_BIT(0x10, 0x00, IPT_KEYBOARD) PORT_NAME("D") PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D')
@@ -241,64 +239,49 @@ static INPUT_PORTS_START( trs80m4p )
PORT_BIT(0x01, 0x00, IPT_KEYBOARD) PORT_NAME("X") PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X')
PORT_BIT(0x02, 0x00, IPT_KEYBOARD) PORT_NAME("Y") PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')
PORT_BIT(0x04, 0x00, IPT_KEYBOARD) PORT_NAME("Z") PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z')
- PORT_BIT(0xF8, 0x00, IPT_UNUSED)
+ PORT_BIT(0xF8, 0x00, IPT_UNUSED) // these bits were tested and do nothing useful
PORT_START("LINE4")
- PORT_BIT(0x01, 0x00, IPT_KEYBOARD) PORT_NAME("0") PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(UCHAR_MAMEKEY(0_PAD))
- PORT_BIT(0x02, 0x00, IPT_KEYBOARD) PORT_NAME("1") PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') PORT_CHAR(UCHAR_MAMEKEY(1_PAD))
- PORT_BIT(0x04, 0x00, IPT_KEYBOARD) PORT_NAME("2") PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') PORT_CHAR(UCHAR_MAMEKEY(2_PAD))
- PORT_BIT(0x08, 0x00, IPT_KEYBOARD) PORT_NAME("3") PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') PORT_CHAR(UCHAR_MAMEKEY(3_PAD))
- PORT_BIT(0x10, 0x00, IPT_KEYBOARD) PORT_NAME("4") PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') PORT_CHAR(UCHAR_MAMEKEY(4_PAD))
- PORT_BIT(0x20, 0x00, IPT_KEYBOARD) PORT_NAME("5") PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') PORT_CHAR(UCHAR_MAMEKEY(5_PAD))
- PORT_BIT(0x40, 0x00, IPT_KEYBOARD) PORT_NAME("6") PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') PORT_CHAR(UCHAR_MAMEKEY(6_PAD))
- PORT_BIT(0x80, 0x00, IPT_KEYBOARD) PORT_NAME("7") PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') PORT_CHAR(UCHAR_MAMEKEY(7_PAD))
+ PORT_BIT(0x01, 0x00, IPT_KEYBOARD) PORT_NAME("0") PORT_CODE(KEYCODE_0) PORT_CODE(KEYCODE_0_PAD) PORT_CHAR('0')
+ PORT_BIT(0x02, 0x00, IPT_KEYBOARD) PORT_NAME("1") PORT_CODE(KEYCODE_1) PORT_CODE(KEYCODE_1_PAD) PORT_CHAR('1') PORT_CHAR('!')
+ PORT_BIT(0x04, 0x00, IPT_KEYBOARD) PORT_NAME("2") PORT_CODE(KEYCODE_2) PORT_CODE(KEYCODE_2_PAD) PORT_CHAR('2') PORT_CHAR('"')
+ PORT_BIT(0x08, 0x00, IPT_KEYBOARD) PORT_NAME("3") PORT_CODE(KEYCODE_3) PORT_CODE(KEYCODE_3_PAD) PORT_CHAR('3') PORT_CHAR('#')
+ PORT_BIT(0x10, 0x00, IPT_KEYBOARD) PORT_NAME("4") PORT_CODE(KEYCODE_4) PORT_CODE(KEYCODE_4_PAD) PORT_CHAR('4') PORT_CHAR('$')
+ PORT_BIT(0x20, 0x00, IPT_KEYBOARD) PORT_NAME("5") PORT_CODE(KEYCODE_5) PORT_CODE(KEYCODE_5_PAD) PORT_CHAR('5') PORT_CHAR('%')
+ PORT_BIT(0x40, 0x00, IPT_KEYBOARD) PORT_NAME("6") PORT_CODE(KEYCODE_6) PORT_CODE(KEYCODE_6_PAD) PORT_CHAR('6') PORT_CHAR('&')
+ PORT_BIT(0x80, 0x00, IPT_KEYBOARD) PORT_NAME("7") PORT_CODE(KEYCODE_7) PORT_CODE(KEYCODE_7_PAD) PORT_CHAR('7') PORT_CHAR('\'')
PORT_START("LINE5")
- PORT_BIT(0x01, 0x00, IPT_KEYBOARD) PORT_NAME("8") PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') PORT_CHAR(UCHAR_MAMEKEY(8_PAD))
- PORT_BIT(0x02, 0x00, IPT_KEYBOARD) PORT_NAME("9") PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') PORT_CHAR(UCHAR_MAMEKEY(9_PAD))
+ PORT_BIT(0x01, 0x00, IPT_KEYBOARD) PORT_NAME("8") PORT_CODE(KEYCODE_8) PORT_CODE(KEYCODE_8_PAD) PORT_CHAR('8') PORT_CHAR('(')
+ PORT_BIT(0x02, 0x00, IPT_KEYBOARD) PORT_NAME("9") PORT_CODE(KEYCODE_9) PORT_CODE(KEYCODE_9_PAD) PORT_CHAR('9') PORT_CHAR(')')
PORT_BIT(0x04, 0x00, IPT_KEYBOARD) PORT_NAME(": *") PORT_CODE(KEYCODE_MINUS) PORT_CHAR(':') PORT_CHAR('*')
PORT_BIT(0x08, 0x00, IPT_KEYBOARD) PORT_NAME("; +") PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR('+')
PORT_BIT(0x10, 0x00, IPT_KEYBOARD) PORT_NAME(", <") PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<')
PORT_BIT(0x20, 0x00, IPT_KEYBOARD) PORT_NAME("- =") PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('-') PORT_CHAR('=')
- PORT_BIT(0x40, 0x00, IPT_KEYBOARD) PORT_NAME(". >") PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD))
+ PORT_BIT(0x40, 0x00, IPT_KEYBOARD) PORT_NAME(". >") PORT_CODE(KEYCODE_STOP) PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR('.') PORT_CHAR('>')
PORT_BIT(0x80, 0x00, IPT_KEYBOARD) PORT_NAME("/ ?") PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?')
PORT_START("LINE6")
- PORT_BIT(0x01, 0x00, IPT_KEYBOARD) PORT_NAME("Enter") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) PORT_CHAR(UCHAR_MAMEKEY(ENTER_PAD))
- PORT_BIT(0x02, 0x00, IPT_KEYBOARD) PORT_NAME("Clear") PORT_CODE(KEYCODE_HOME) PORT_CHAR(UCHAR_MAMEKEY(F8)) // 3rd line, 1st key from right
- PORT_BIT(0x04, 0x00, IPT_KEYBOARD) PORT_NAME("Break") PORT_CODE(KEYCODE_END) PORT_CHAR(UCHAR_MAMEKEY(F9)) // 1st line, 1st key from right
- PORT_BIT(0x08, 0x00, IPT_KEYBOARD) PORT_NAME(UTF8_UP) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP))
- PORT_BIT(0x10, 0x00, IPT_KEYBOARD) PORT_NAME("Down") PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN))
+ PORT_BIT(0x01, 0x00, IPT_KEYBOARD) PORT_NAME("Enter") PORT_CODE(KEYCODE_ENTER) PORT_CODE(KEYCODE_ENTER_PAD) PORT_CHAR(13)
+ PORT_BIT(0x02, 0x00, IPT_KEYBOARD) PORT_NAME("Clear") PORT_CODE(KEYCODE_HOME) PORT_CHAR(UCHAR_MAMEKEY(F8))
+ PORT_BIT(0x04, 0x00, IPT_KEYBOARD) PORT_NAME("Break") PORT_CODE(KEYCODE_END) PORT_CHAR(UCHAR_MAMEKEY(F9))
+ PORT_BIT(0x08, 0x00, IPT_KEYBOARD) PORT_NAME(UTF8_UP) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP))
+ PORT_BIT(0x10, 0x00, IPT_KEYBOARD) PORT_NAME("Down") PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN))
/* backspace do the same as cursor left */
PORT_BIT(0x20, 0x00, IPT_KEYBOARD) PORT_NAME("Left") PORT_CODE(KEYCODE_LEFT) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(UCHAR_MAMEKEY(LEFT))
- PORT_BIT(0x40, 0x00, IPT_KEYBOARD) PORT_NAME("Right") PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT))
- PORT_BIT(0x80, 0x00, IPT_KEYBOARD) PORT_NAME("Space") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
+ PORT_BIT(0x40, 0x00, IPT_KEYBOARD) PORT_NAME("Right") PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT))
+ PORT_BIT(0x80, 0x00, IPT_KEYBOARD) PORT_NAME("Space") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
PORT_START("LINE7")
- PORT_BIT(0x01, 0x00, IPT_KEYBOARD) PORT_NAME("Left Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
- /* These keys are only on a Model 4. The one marked CTL seems to be another shift key (4 in total). */
+ PORT_BIT(0x01, 0x00, IPT_KEYBOARD) PORT_NAME("Left Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
PORT_BIT(0x02, 0x00, IPT_KEYBOARD) PORT_NAME("Right Shift") PORT_CODE(KEYCODE_RSHIFT)
+ // These keys are only on a Model 4. These bits do nothing on Model 3.
PORT_BIT(0x04, 0x00, IPT_KEYBOARD) PORT_NAME("CTL") PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_SHIFT_2)
- PORT_BIT(0x08, 0x00, IPT_KEYBOARD) PORT_NAME("Caps") PORT_CODE(KEYCODE_CAPSLOCK)
- PORT_BIT(0x10, 0x00, IPT_KEYBOARD) PORT_NAME("F1") PORT_CODE(KEYCODE_F1)
+ PORT_BIT(0x08, 0x00, IPT_KEYBOARD) PORT_NAME("Caps") PORT_CODE(KEYCODE_CAPSLOCK) // When activated, lowercase entry is possible
+ PORT_BIT(0x10, 0x00, IPT_KEYBOARD) PORT_NAME("F1") PORT_CODE(KEYCODE_F1) // prints tic character
PORT_BIT(0x20, 0x00, IPT_KEYBOARD) PORT_NAME("F2") PORT_CODE(KEYCODE_F2)
PORT_BIT(0x40, 0x00, IPT_KEYBOARD) PORT_NAME("F3") PORT_CODE(KEYCODE_F3)
PORT_BIT(0x80, 0x00, IPT_UNUSED)
-
- PORT_START("E9") // these are the power-on uart settings
- PORT_BIT(0x07, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_DIPNAME( 0x88, 0x08, "Parity")
- PORT_DIPSETTING( 0x08, DEF_STR(None))
- PORT_DIPSETTING( 0x00, "Odd")
- PORT_DIPSETTING( 0x80, "Even")
- PORT_DIPNAME( 0x10, 0x10, "Stop Bits")
- PORT_DIPSETTING( 0x10, "2")
- PORT_DIPSETTING( 0x00, "1")
- PORT_DIPNAME( 0x60, 0x60, "Bits")
- PORT_DIPSETTING( 0x00, "5")
- PORT_DIPSETTING( 0x20, "6")
- PORT_DIPSETTING( 0x40, "7")
- PORT_DIPSETTING( 0x60, "8")
INPUT_PORTS_END
static INPUT_PORTS_START( trs80m3 )
@@ -378,11 +361,6 @@ MACHINE_CONFIG_START(trs80m3_state::model3)
MCFG_FLOPPY_DRIVE_SOUND(true)
MCFG_FLOPPY_DRIVE_ADD("fdc:1", trs80_floppies, "sssd", trs80m3_state::floppy_formats)
MCFG_FLOPPY_DRIVE_SOUND(true)
- // Optional external unit
- MCFG_FLOPPY_DRIVE_ADD("fdc:2", trs80_floppies, "", trs80m3_state::floppy_formats)
- MCFG_FLOPPY_DRIVE_SOUND(true)
- MCFG_FLOPPY_DRIVE_ADD("fdc:3", trs80_floppies, "", trs80m3_state::floppy_formats)
- MCFG_FLOPPY_DRIVE_SOUND(true)
MCFG_DEVICE_ADD(m_centronics, CENTRONICS, centronics_devices, "printer")
MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE("cent_status_in", input_buffer_device, write_bit7))
@@ -404,8 +382,6 @@ MACHINE_CONFIG_START(trs80m3_state::model3)
//MCFG_AY31015_WRITE_DAV_CB(WRITELINE( , , ))
MCFG_AY31015_AUTO_RDAV(true)
MCFG_DEVICE_ADD("rs232", RS232_PORT, default_rs232_devices, nullptr)
-
- MCFG_MACHINE_RESET_OVERRIDE(trs80m3_state, trs80m3)
MACHINE_CONFIG_END
MACHINE_CONFIG_START(trs80m3_state::model4)
@@ -448,8 +424,6 @@ MACHINE_CONFIG_START(trs80m3_state::cp500)
model3(config);
MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_IO_MAP(cp500_io)
-
- MCFG_MACHINE_RESET_OVERRIDE(trs80m3_state, cp500)
MACHINE_CONFIG_END
/***************************************************************************
@@ -547,5 +521,5 @@ void trs80m3_state::init_trs80m4p()
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
COMP( 1980, trs80m3, 0, trs80l2, model3, trs80m3, trs80m3_state, init_trs80m3, "Tandy Radio Shack", "TRS-80 Model III", 0 )
COMP( 1980, trs80m4, trs80m3, 0, model4, trs80m3, trs80m3_state, init_trs80m4, "Tandy Radio Shack", "TRS-80 Model 4", 0 )
-COMP( 1983, trs80m4p, trs80m3, 0, model4p, trs80m4p, trs80m3_state, init_trs80m4p, "Tandy Radio Shack", "TRS-80 Model 4P", 0 )
+COMP( 1983, trs80m4p, trs80m3, 0, model4p, trs80m4p, trs80m3_state, init_trs80m4p, "Tandy Radio Shack", "TRS-80 Model 4P", MACHINE_NOT_WORKING )
COMP( 1982, cp500, trs80m3, 0, cp500, trs80m3, trs80m3_state, init_trs80m3, "Prológica", "CP-500 (PVIII REV.3)", 0 )
diff --git a/src/mame/drivers/twincobr.cpp b/src/mame/drivers/twincobr.cpp
index d4cb0c1a534..30745ba6d95 100644
--- a/src/mame/drivers/twincobr.cpp
+++ b/src/mame/drivers/twincobr.cpp
@@ -716,6 +716,11 @@ MACHINE_CONFIG_START(twincobr_state::twincobr)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
MACHINE_CONFIG_END
+MACHINE_CONFIG_START(twincobr_state::twincobrw)
+ twincobr(config);
+ MCFG_DEVICE_MODIFY("maincpu")
+ MCFG_DEVICE_CLOCK(XTAL(10'000'000)) /* The export versions have a dedicated OSC for the M68000 on the top right of the board */
+MACHINE_CONFIG_END
MACHINE_CONFIG_START(twincobr_state::fshark)
twincobr(config);
@@ -1303,14 +1308,14 @@ void twincobr_state::init_twincobr()
}
-GAME( 1987, fshark, 0, fshark, fshark, twincobr_state, init_twincobr, ROT270, "Toaplan / Taito Corporation", "Flying Shark (World)", 0 )
-GAME( 1987, skyshark, fshark, fshark, skyshark, twincobr_state, init_twincobr, ROT270, "Toaplan / Taito America Corporation (Romstar license)", "Sky Shark (US, set 1)", 0 )
-GAME( 1987, skysharka, fshark, fshark, skyshark, twincobr_state, init_twincobr, ROT270, "Toaplan / Taito America Corporation (Romstar license)", "Sky Shark (US, set 2)", 0 )
-GAME( 1987, hishouza, fshark, fshark, hishouza, twincobr_state, init_twincobr, ROT270, "Toaplan / Taito Corporation", "Hishou Zame (Japan)", 0 )
-GAME( 1987, fsharkbt, fshark, fsharkbt, skyshark, twincobr_state, init_twincobr, ROT270, "bootleg", "Flying Shark (bootleg with 8741)", 0 )
-GAME( 1987, fnshark, fshark, fshark, hishouza, twincobr_state, init_twincobr, ROT270, "bootleg", "Flyin' Shark (bootleg of Hishou Zame)", 0 )
-GAME( 1987, twincobr, 0, twincobr, twincobr, twincobr_state, init_twincobr, ROT270, "Toaplan / Taito Corporation", "Twin Cobra (World)", 0 )
-GAME( 1987, twincobru, twincobr, twincobr, twincobru, twincobr_state, init_twincobr, ROT270, "Toaplan / Taito America Corporation (Romstar license)", "Twin Cobra (US)", 0 )
-GAME( 1987, ktiger, twincobr, twincobr, ktiger, twincobr_state, init_twincobr, ROT270, "Toaplan / Taito Corporation", "Kyukyoku Tiger (Japan)", 0 )
-GAME( 1991, gulfwar2, 0, twincobr, gulfwar2, twincobr_state, init_twincobr, ROT270, "Comad", "Gulf War II (set 1)", 0 )
-GAME( 1991, gulfwar2a, gulfwar2, twincobr, gulfwar2, twincobr_state, init_twincobr, ROT270, "Comad", "Gulf War II (set 2)", 0 )
+GAME( 1987, fshark, 0, fshark, fshark, twincobr_state, init_twincobr, ROT270, "Toaplan / Taito Corporation", "Flying Shark (World)", 0 )
+GAME( 1987, skyshark, fshark, fshark, skyshark, twincobr_state, init_twincobr, ROT270, "Toaplan / Taito America Corporation (Romstar license)", "Sky Shark (US, set 1)", 0 )
+GAME( 1987, skysharka, fshark, fshark, skyshark, twincobr_state, init_twincobr, ROT270, "Toaplan / Taito America Corporation (Romstar license)", "Sky Shark (US, set 2)", 0 )
+GAME( 1987, hishouza, fshark, fshark, hishouza, twincobr_state, init_twincobr, ROT270, "Toaplan / Taito Corporation", "Hishou Zame (Japan)", 0 )
+GAME( 1987, fsharkbt, fshark, fsharkbt, skyshark, twincobr_state, init_twincobr, ROT270, "bootleg", "Flying Shark (bootleg with 8741)", 0 )
+GAME( 1987, fnshark, fshark, fshark, hishouza, twincobr_state, init_twincobr, ROT270, "bootleg", "Flyin' Shark (bootleg of Hishou Zame)", 0 )
+GAME( 1987, twincobr, 0, twincobrw, twincobr, twincobr_state, init_twincobr, ROT270, "Toaplan / Taito Corporation", "Twin Cobra (World)", 0 )
+GAME( 1987, twincobru, twincobr, twincobrw, twincobru, twincobr_state, init_twincobr, ROT270, "Toaplan / Taito America Corporation (Romstar license)", "Twin Cobra (US)", 0 )
+GAME( 1987, ktiger, twincobr, twincobr, ktiger, twincobr_state, init_twincobr, ROT270, "Toaplan / Taito Corporation", "Kyukyoku Tiger (Japan)", 0 )
+GAME( 1991, gulfwar2, 0, twincobr, gulfwar2, twincobr_state, init_twincobr, ROT270, "Comad", "Gulf War II (set 1)", 0 )
+GAME( 1991, gulfwar2a, gulfwar2, twincobr, gulfwar2, twincobr_state, init_twincobr, ROT270, "Comad", "Gulf War II (set 2)", 0 )
diff --git a/src/mame/drivers/vgmplay.cpp b/src/mame/drivers/vgmplay.cpp
index f71d26c47ed..0c346573764 100644
--- a/src/mame/drivers/vgmplay.cpp
+++ b/src/mame/drivers/vgmplay.cpp
@@ -13,6 +13,7 @@
#include "cpu/h6280/h6280.h"
#include "cpu/m6502/n2a03.h"
#include "sound/2203intf.h"
+#include "sound/2608intf.h"
#include "sound/2612intf.h"
#include "sound/3526intf.h"
#include "sound/3812intf.h"
@@ -31,11 +32,11 @@
#include "sound/rf5c68.h"
#include "sound/segapcm.h"
#include "sound/sn76496.h"
+#include "sound/x1_010.h"
#include "sound/ym2151.h"
#include "sound/ym2413.h"
#include "sound/ymf271.h"
#include "sound/ymz280b.h"
-#include "sound/2608intf.h"
#include "vgmplay.lh"
#include "debugger.h"
@@ -100,7 +101,8 @@ public:
A_RF5C68 = 0x00013c40,
A_RF5C164 = 0x00013c50,
A_RF5C68RAM = 0x00014000,
- A_RF5C164RAM = 0x00024000
+ A_RF5C164RAM = 0x00024000,
+ A_X1_010 = 0x00034000
};
enum io16_t
@@ -134,6 +136,7 @@ public:
DECLARE_READ8_MEMBER(c352_rom_r);
DECLARE_READ8_MEMBER(qsound_rom_r);
DECLARE_READ8_MEMBER(ga20_rom_r);
+ DECLARE_READ8_MEMBER(x1_010_rom_r);
template<int Chip> DECLARE_WRITE8_MEMBER(multipcm_bank_hi_w);
template<int Chip> DECLARE_WRITE8_MEMBER(multipcm_bank_lo_w);
@@ -195,6 +198,8 @@ private:
LED_RF5C68,
LED_RF5C164,
+ LED_X1_010,
+
LED_COUNT
};
@@ -299,6 +304,7 @@ public:
void segapcm_map(address_map &map);
void soundchips16_map(address_map &map);
void soundchips_map(address_map &map);
+ void x1_010_map(address_map &map);
void ymf271_map(address_map &map);
void ymz280b_map(address_map &map);
@@ -338,6 +344,7 @@ private:
required_device<rf5c68_device> m_rf5c164; // TODO : !!RF5C164!!
required_shared_ptr<uint8_t> m_rf5c68_ram;
required_shared_ptr<uint8_t> m_rf5c164_ram;
+ required_device<x1_010_device> m_x1_010;
uint32_t m_okim6295_clock[2];
uint32_t m_okim6295_pin7[2];
@@ -841,6 +848,13 @@ void vgmplay_device::execute_run()
m_pc += 4;
break;
+ case 0xc8: {
+ pulse_act_led(LED_X1_010);
+ m_io->write_byte(A_X1_010 + ((m_file->read_byte(m_pc+1) << 8) | m_file->read_byte(m_pc+2)), m_file->read_byte(m_pc+3));
+ m_pc += 4;
+ break;
+ }
+
case 0xd1: {
pulse_act_led(LED_YMF271);
uint8_t offset = m_file->read_byte(m_pc+1);
@@ -1193,7 +1207,7 @@ offs_t vgmplay_disassembler::disassemble(std::ostream &stream, offs_t pc, const
return 4 | SUPPORTED;
case 0xc2:
- util::stream_format(stream, "rf5c163 %04x = %02x", opcodes.r8(pc+1) | (opcodes.r8(pc+2) << 8), opcodes.r8(pc+3));
+ util::stream_format(stream, "rf5c164 %04x = %02x", opcodes.r8(pc+1) | (opcodes.r8(pc+2) << 8), opcodes.r8(pc+3));
return 4 | SUPPORTED;
case 0xc3:
@@ -1204,6 +1218,10 @@ offs_t vgmplay_disassembler::disassemble(std::ostream &stream, offs_t pc, const
util::stream_format(stream, "qsound %02x = %04x", opcodes.r8(pc+3), opcodes.r8(pc+2) | (opcodes.r8(pc+1) << 8));
return 4 | SUPPORTED;
+ case 0xc8:
+ util::stream_format(stream, "x1-010 %04x = %02x", opcodes.r8(pc+2) | (opcodes.r8(pc+1) << 8), opcodes.r8(pc+3));
+ return 4 | SUPPORTED;
+
case 0xd0:
util::stream_format(stream, "ymf278b r%02x.%02x = %02x", opcodes.r8(pc+1), opcodes.r8(pc+2), opcodes.r8(pc+3));
return 4 | SUPPORTED;
@@ -1335,6 +1353,11 @@ READ8_MEMBER(vgmplay_device::qsound_rom_r)
return rom_r(0, 0x8f, offset);
}
+READ8_MEMBER(vgmplay_device::x1_010_rom_r)
+{
+ return rom_r(0, 0x91, offset);
+}
+
READ8_MEMBER(vgmplay_device::c352_rom_r)
{
return rom_r(0, 0x92, offset);
@@ -1381,6 +1404,7 @@ vgmplay_state::vgmplay_state(const machine_config &mconfig, device_type type, co
, m_rf5c164(*this, "rf5c164")
, m_rf5c68_ram(*this, "rf5c68_ram")
, m_rf5c164_ram(*this, "rf5c164_ram")
+ , m_x1_010(*this, "x1_010")
{
}
@@ -1641,6 +1665,9 @@ void vgmplay_state::machine_start()
if(version >= 0x171 && r8(0xd6)) {
m_c352->set_divider(r8(0xd6) * 4);
}
+ if(version >= 0x171 && r32(0xd8)) {
+ m_x1_010->set_unscaled_clock(r32(0xd8));
+ }
if(version >= 0x171 && r32(0xdc)) {
m_c352->set_unscaled_clock(r32(0xdc));
}
@@ -1863,6 +1890,7 @@ void vgmplay_state::soundchips_map(address_map &map)
map(vgmplay_device::A_RF5C164, vgmplay_device::A_RF5C164+0xf).w(m_rf5c164, FUNC(rf5c68_device::rf5c68_w));
map(vgmplay_device::A_RF5C68RAM, vgmplay_device::A_RF5C68RAM+0xffff).w(m_rf5c68, FUNC(rf5c68_device::rf5c68_mem_w));
map(vgmplay_device::A_RF5C164RAM, vgmplay_device::A_RF5C164RAM+0xffff).w(m_rf5c164, FUNC(rf5c68_device::rf5c68_mem_w));
+ map(vgmplay_device::A_X1_010, vgmplay_device::A_X1_010+0x1fff).w(m_x1_010, FUNC(x1_010_device::write));
}
void vgmplay_state::segapcm_map(address_map &map)
@@ -1930,6 +1958,11 @@ void vgmplay_state::ga20_map(address_map &map)
map(0, 0xfffff).r("vgmplay", FUNC(vgmplay_device::ga20_rom_r));
}
+void vgmplay_state::x1_010_map(address_map &map)
+{
+ map(0, 0xfffff).r("vgmplay", FUNC(vgmplay_device::x1_010_rom_r));
+}
+
void vgmplay_state::nescpu_map(address_map &map)
{
map(0, 0xffff).ram().share("nesapu_ram");
@@ -2124,6 +2157,11 @@ MACHINE_CONFIG_START(vgmplay_state::vgmplay)
m_rf5c164->set_addrmap(0, &vgmplay_state::rf5c164_map);
m_rf5c164->add_route(0, "lspeaker", 1);
m_rf5c164->add_route(1, "rspeaker", 1);
+
+ X1_010(config, m_x1_010, 16000000);
+ m_x1_010->set_addrmap(0, &vgmplay_state::x1_010_map);
+ m_x1_010->add_route(0, "lspeaker", 1);
+ m_x1_010->add_route(1, "rspeaker", 1);
MACHINE_CONFIG_END
ROM_START( vgmplay )
diff --git a/src/mame/includes/next.h b/src/mame/includes/next.h
index bfbf7baa4a0..7e96ce0b044 100644
--- a/src/mame/includes/next.h
+++ b/src/mame/includes/next.h
@@ -31,6 +31,7 @@ public:
net(*this, "net"),
mo(*this, "mo"),
fdc(*this, "fdc"),
+ floppy0(*this, "fdc:0"),
vram(*this, "vram") { }
void next_base(machine_config &config);
@@ -63,6 +64,7 @@ private:
required_device<mb8795_device> net;
required_device<nextmo_device> mo;
optional_device<n82077aa_device> fdc; // 040 only
+ optional_device<floppy_connector> floppy0; // 040 only
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
diff --git a/src/mame/includes/orbit.h b/src/mame/includes/orbit.h
index 40869199c3e..6f48ad78feb 100644
--- a/src/mame/includes/orbit.h
+++ b/src/mame/includes/orbit.h
@@ -44,25 +44,27 @@ public:
void orbit(machine_config &config);
+protected:
+ virtual void machine_start() override;
+ virtual void machine_reset() override;
+ virtual void video_start() override;
+
private:
DECLARE_WRITE_LINE_MEMBER(coin_lockout_w);
- DECLARE_WRITE8_MEMBER(orbit_playfield_w);
+ DECLARE_WRITE8_MEMBER(playfield_w);
TILE_GET_INFO_MEMBER(get_tile_info);
- uint32_t screen_update_orbit(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
- INTERRUPT_GEN_MEMBER(orbit_interrupt);
+ uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
+ INTERRUPT_GEN_MEMBER(interrupt);
TIMER_CALLBACK_MEMBER(irq_off);
TIMER_DEVICE_CALLBACK_MEMBER(nmi_32v);
- DECLARE_WRITE8_MEMBER(orbit_note_w);
- DECLARE_WRITE8_MEMBER(orbit_note_amp_w);
- DECLARE_WRITE8_MEMBER(orbit_noise_amp_w);
- DECLARE_WRITE8_MEMBER(orbit_noise_rst_w);
+ DECLARE_WRITE8_MEMBER(note_w);
+ DECLARE_WRITE8_MEMBER(note_amp_w);
+ DECLARE_WRITE8_MEMBER(noise_amp_w);
+ DECLARE_WRITE8_MEMBER(noise_rst_w);
- virtual void machine_start() override;
- virtual void machine_reset() override;
- virtual void video_start() override;
- void orbit_map(address_map &map);
+ void main_map(address_map &map);
- void draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect );
+ void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect);
void update_misc_flags(address_space &space, uint8_t val);
/* memory pointers */
@@ -74,6 +76,7 @@ private:
/* video-related */
tilemap_t *m_bg_tilemap;
int m_flip_screen;
+ emu_timer *m_irq_off_timer;
/* devices */
required_device<f9334_device> m_latch;
diff --git a/src/mame/includes/seta.h b/src/mame/includes/seta.h
index 23d86b54401..0d42fb06b8a 100644
--- a/src/mame/includes/seta.h
+++ b/src/mame/includes/seta.h
@@ -69,6 +69,7 @@ public:
m_vctrl(*this,"vctrl_%u", 0U),
m_paletteram(*this,"paletteram%u", 1U),
m_subbank(*this,"subbank"),
+ m_x1_bank(*this,"x1_bank"),
m_gun_recoil(*this,"Player%u_Gun_Recoil", 1U),
m_leds(*this, "led%u", 0U),
m_gfxdecode(*this, "gfxdecode"),
@@ -130,9 +131,11 @@ public:
void init_arbalest();
void init_wiggie();
void init_blandia();
+ void init_bankx1();
void init_kiwame();
void init_eightfrc();
void init_pairlove();
+ void init_zombraid();
DECLARE_CUSTOM_INPUT_MEMBER(usclssic_trackball_x_r);
DECLARE_CUSTOM_INPUT_MEMBER(usclssic_trackball_y_r);
@@ -171,6 +174,7 @@ protected:
optional_shared_ptr_array<uint16_t, 2> m_paletteram;
optional_memory_bank m_subbank;
+ optional_memory_bank m_x1_bank;
output_finder<2> m_gun_recoil;
output_finder<48> m_leds;
@@ -196,6 +200,7 @@ protected:
uint8_t m_usclssic_port_select;
int m_keroppi_prize_hop;
int m_keroppi_protection_count;
+ emu_timer *m_keroppi_prize_hop_timer;
uint8_t m_twineagl_xram[8];
int m_twineagl_tilebank[4];
@@ -300,12 +305,14 @@ protected:
void usclssic_set_pens();
void draw_tilemap_palette_effect(bitmap_ind16 &bitmap, const rectangle &cliprect, tilemap_t *tilemap, int scrollx, int scrolly, int gfxnum, int flipscreen);
void seta_layers_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int sprite_bank_size, int sprite_setac );
+ void rearrange_gfx();
void uPD71054_timer_init( );
DECLARE_WRITE_LINE_MEMBER(pit_out0);
DECLARE_WRITE_LINE_MEMBER(utoukond_ym3438_interrupt);
void atehate_map(address_map &map);
void blandia_map(address_map &map);
+ void blandia_x1_map(address_map &map);
void blandiap_map(address_map &map);
void blockcar_map(address_map &map);
void blockcarb_map(address_map &map);
@@ -350,6 +357,7 @@ protected:
void wrofaero_map(address_map &map);
void zingzipbl_map(address_map &map);
void zombraid_map(address_map &map);
+ void zombraid_x1_map(address_map &map);
};
class setaroul_state : public seta_state
diff --git a/src/mame/includes/seta2.h b/src/mame/includes/seta2.h
index 27dad1d9c63..1c9380fdbf5 100644
--- a/src/mame/includes/seta2.h
+++ b/src/mame/includes/seta2.h
@@ -35,6 +35,7 @@ public:
m_rtc(*this, "rtc"),
m_dispenser(*this, "dispenser"),
+ m_x1_bank(*this,"x1_bank_%u", 1U),
m_nvram(*this, "nvram"),
m_spriteram(*this, "spriteram", 0),
m_tileram(*this, "tileram", 0),
@@ -65,7 +66,7 @@ public:
DECLARE_WRITE16_MEMBER(vregs_w);
DECLARE_READ32_MEMBER(oki_read);
DECLARE_WRITE32_MEMBER(oki_write);
- DECLARE_WRITE16_MEMBER(sound_bank_w);
+ DECLARE_WRITE8_MEMBER(sound_bank_w);
protected:
@@ -113,8 +114,9 @@ protected:
void reelquak_map(address_map &map);
void samshoot_map(address_map &map);
void telpacfl_map(address_map &map);
+ void x1_map(address_map &map);
- virtual void machine_start() override { m_leds.resolve(); m_lamps.resolve(); }
+ virtual void machine_start() override;
virtual void video_start() override;
required_device<cpu_device> m_maincpu;
@@ -130,6 +132,7 @@ protected:
optional_device<upd4992_device> m_rtc;
optional_device<ticket_dispenser_device> m_dispenser;
+ optional_memory_bank_array<8> m_x1_bank;
optional_shared_ptr<uint16_t> m_nvram;
optional_shared_ptr<uint16_t> m_spriteram;
optional_shared_ptr<uint16_t> m_tileram;
diff --git a/src/mame/includes/trs80m3.h b/src/mame/includes/trs80m3.h
index 446b03757cf..bbce370cea8 100644
--- a/src/mame/includes/trs80m3.h
+++ b/src/mame/includes/trs80m3.h
@@ -44,8 +44,6 @@ public:
, m_fdc(*this, "fdc")
, m_floppy0(*this, "fdc:0")
, m_floppy1(*this, "fdc:1")
- , m_floppy2(*this, "fdc:2")
- , m_floppy3(*this, "fdc:3")
, m_speaker(*this, "speaker")
, m_cassette(*this, "cassette")
, m_io_config(*this, "CONFIG")
@@ -98,8 +96,6 @@ private:
DECLARE_WRITE_LINE_MEMBER(intrq_w);
DECLARE_WRITE_LINE_MEMBER(drq_w);
DECLARE_QUICKLOAD_LOAD_MEMBER(trs80_cmd);
- DECLARE_MACHINE_RESET(trs80m3);
- DECLARE_MACHINE_RESET(cp500);
uint32_t screen_update_trs80m3(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
void cp500_io(address_map &map);
@@ -126,6 +122,7 @@ private:
uint8_t m_size_store;
bool m_a11_flipflop;
uint16_t m_timeout;
+ bool m_wait;
floppy_image_device *m_floppy;
virtual void machine_start() override;
virtual void machine_reset() override;
@@ -142,8 +139,6 @@ private:
optional_device<fd1793_device> m_fdc;
optional_device<floppy_connector> m_floppy0;
optional_device<floppy_connector> m_floppy1;
- optional_device<floppy_connector> m_floppy2;
- optional_device<floppy_connector> m_floppy3;
required_device<speaker_sound_device> m_speaker;
required_device<cassette_image_device> m_cassette;
optional_ioport m_io_config;
diff --git a/src/mame/includes/twincobr.h b/src/mame/includes/twincobr.h
index f05c2e882d0..6d92b8bc539 100644
--- a/src/mame/includes/twincobr.h
+++ b/src/mame/includes/twincobr.h
@@ -32,6 +32,7 @@ public:
{ }
void twincobr(machine_config &config);
+ void twincobrw(machine_config &config);
void fsharkbt(machine_config &config);
void fshark(machine_config &config);
diff --git a/src/mame/layout/vgmplay.lay b/src/mame/layout/vgmplay.lay
index 81a719488a3..30efd5be8c9 100644
--- a/src/mame/layout/vgmplay.lay
+++ b/src/mame/layout/vgmplay.lay
@@ -28,6 +28,7 @@
23: GA20
24: RF5C68
25: RF5C164
+ 26: X1-010
-->
<element name="backdrop"><rect><color red="0.0" green="0.0" blue="0.0" /></rect></element>
@@ -63,6 +64,7 @@
<element name="act_label_ga20"><text string="GA20" align="1"><color red="1.0" green="1.0" blue="1.0" /></text></element>
<element name="act_label_rf5c68"><text string="RF5C68" align="1"><color red="1.0" green="1.0" blue="1.0" /></text></element>
<element name="act_label_rf5c164"><text string="RF5C164" align="1"><color red="1.0" green="1.0" blue="1.0" /></text></element>
+ <element name="act_label_x1_010"><text string="X1-010" align="1"><color red="1.0" green="1.0" blue="1.0" /></text></element>
<element name="static_black2"><rect><color red="0.2" green="0.21" blue="0.23" /></rect></element>
@@ -123,6 +125,7 @@
<cpanel name="led_act_24" element="act_led"><bounds x="46" y="1" width="2" height="2" /></cpanel>
<cpanel name="led_act_25" element="act_led"><bounds x="46" y="4" width="2" height="2" /></cpanel>
+ <cpanel name="led_act_26" element="act_led"><bounds x="46" y="7" width="2" height="2" /></cpanel>
<cpanel element="act_label_ay8910"><bounds x="4" y="1.2" width="10" height="1.6" /></cpanel>
<cpanel element="act_label_sn76496"><bounds x="4" y="4.2" width="10" height="1.6" /></cpanel>
@@ -153,6 +156,7 @@
<cpanel element="act_label_rf5c68"><bounds x="49" y="1.2" width="10" height="1.6" /></cpanel>
<cpanel element="act_label_rf5c164"><bounds x="49" y="4.2" width="10" height="1.6" /></cpanel>
+ <cpanel element="act_label_x1_010"><bounds x="49" y="7.2" width="10" height="1.6" /></cpanel>
</group>
<view name="Internal Layout">
diff --git a/src/mame/machine/inder_vid.cpp b/src/mame/machine/inder_vid.cpp
index c993a03b010..de434e7ffb3 100644
--- a/src/mame/machine/inder_vid.cpp
+++ b/src/mame/machine/inder_vid.cpp
@@ -24,14 +24,14 @@ inder_vid_device::inder_vid_device(const machine_config &mconfig, const char *ta
void inder_vid_device::megaphx_tms_map(address_map &map)
{
- map(0x00000000, 0x003fffff).ram().share("vram"); // vram?
+ map(0x00000000, 0x003fffff).ram().share(m_vram); // vram?
map(0x04000000, 0x0400000f).w("ramdac", FUNC(ramdac_device::index_w)).umask16(0x00ff);
map(0x04000010, 0x0400001f).rw("ramdac", FUNC(ramdac_device::pal_r), FUNC(ramdac_device::pal_w)).umask16(0x00ff);
map(0x04000030, 0x0400003f).w("ramdac", FUNC(ramdac_device::index_r_w)).umask16(0x00ff);
map(0x04000090, 0x0400009f).nopw();
map(0x7fc00000, 0x7fffffff).ram().mirror(0x80000000);
- map(0xc0000000, 0xc00001ff).rw("tms", FUNC(tms34010_device::io_register_r), FUNC(tms34010_device::io_register_w));
+ map(0xc0000000, 0xc00001ff).rw(m_tms, FUNC(tms34010_device::io_register_r), FUNC(tms34010_device::io_register_w));
}
@@ -92,27 +92,19 @@ TMS340X0_FROM_SHIFTREG_CB_MEMBER(inder_vid_device::from_shiftreg)
m_shiftfull = 0;
}
-WRITE_LINE_MEMBER(inder_vid_device::m68k_gen_int)
-{
- cpu_device *maincpu = (cpu_device*)machine().device("maincpu");
- if (state) maincpu->set_input_line(4, ASSERT_LINE);
- else maincpu->set_input_line(4, CLEAR_LINE);
-}
-
-
void inder_vid_device::ramdac_map(address_map &map)
{
map(0x000, 0x3ff).rw("ramdac", FUNC(ramdac_device::ramdac_pal_r), FUNC(ramdac_device::ramdac_rgb888_w));
}
MACHINE_CONFIG_START(inder_vid_device::device_add_mconfig)
- MCFG_DEVICE_ADD("tms", TMS34010, XTAL(40'000'000))
+ MCFG_DEVICE_ADD(m_tms, TMS34010, XTAL(40'000'000))
MCFG_DEVICE_PROGRAM_MAP(megaphx_tms_map)
MCFG_TMS340X0_HALT_ON_RESET(true) /* halt on reset */
MCFG_TMS340X0_PIXEL_CLOCK(XTAL(40'000'000)/12) /* pixel clock */
MCFG_TMS340X0_PIXELS_PER_CLOCK(2) /* pixels per clock */
MCFG_TMS340X0_SCANLINE_RGB32_CB(inder_vid_device, scanline) /* scanline updater (RGB32) */
- MCFG_TMS340X0_OUTPUT_INT_CB(WRITELINE(*this, inder_vid_device, m68k_gen_int))
+ MCFG_TMS340X0_OUTPUT_INT_CB(INPUTLINE(":maincpu", 4))
MCFG_TMS340X0_TO_SHIFTREG_CB(inder_vid_device, to_shiftreg) /* write to shiftreg function */
MCFG_TMS340X0_FROM_SHIFTREG_CB(inder_vid_device, from_shiftreg) /* read from shiftreg function */
@@ -120,7 +112,7 @@ MACHINE_CONFIG_START(inder_vid_device::device_add_mconfig)
MCFG_SCREEN_RAW_PARAMS(XTAL(40'000'000)/12, 424, 0, 338-1, 262, 0, 246-1)
MCFG_SCREEN_UPDATE_DEVICE("tms", tms34010_device, tms340x0_rgb32)
- MCFG_PALETTE_ADD("palette", 256)
+ MCFG_PALETTE_ADD(m_palette, 256)
MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
MCFG_RAMDAC_SPLIT_READ(1)
@@ -130,6 +122,7 @@ MACHINE_CONFIG_END
void inder_vid_device::device_start()
{
+ save_item(NAME(m_shiftfull));
}
void inder_vid_device::device_reset()
diff --git a/src/mame/machine/inder_vid.h b/src/mame/machine/inder_vid.h
index 9f6080a0c03..4e55570bb2d 100644
--- a/src/mame/machine/inder_vid.h
+++ b/src/mame/machine/inder_vid.h
@@ -49,8 +49,6 @@ private:
int m_shiftfull; // this might be a driver specific hack for a TMS bug.
- DECLARE_WRITE_LINE_MEMBER(m68k_gen_int);
-
TMS340X0_TO_SHIFTREG_CB_MEMBER(to_shiftreg);
TMS340X0_FROM_SHIFTREG_CB_MEMBER(from_shiftreg);
TMS340X0_SCANLINE_RGB32_CB_MEMBER(scanline);
diff --git a/src/mame/machine/pcecommn.cpp b/src/mame/machine/pcecommn.cpp
index 99128b8afba..d24ef961712 100644
--- a/src/mame/machine/pcecommn.cpp
+++ b/src/mame/machine/pcecommn.cpp
@@ -20,7 +20,7 @@
/* todo: how many input ports does the PCE have? */
WRITE8_MEMBER(pce_common_state::pce_joystick_w)
{
- machine().device<h6280_device>("maincpu")->io_set_buffer(data);
+ m_maincpu->io_set_buffer(data);
/* bump counter on a low-to-high transition of bit 1 */
if((!m_joystick_data_select) && (data & JOY_CLOCK))
{
diff --git a/src/mame/machine/trs80m3.cpp b/src/mame/machine/trs80m3.cpp
index 50ed486a217..0fdd073f562 100644
--- a/src/mame/machine/trs80m3.cpp
+++ b/src/mame/machine/trs80m3.cpp
@@ -86,7 +86,9 @@ READ8_MEMBER( trs80m3_state::port_e4_r )
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
- return ~(m_nmi_mask & m_nmi_data);
+ u8 data = m_nmi_data;
+ m_nmi_data = 0;
+ return ~(m_nmi_mask & data);
}
READ8_MEMBER( trs80m3_state::port_e8_r )
@@ -375,13 +377,12 @@ WRITE8_MEMBER( trs80m3_state::port_ec_w )
WRITE8_MEMBER( trs80m3_state::port_f4_w )
{
m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, BIT(data, 6) ? ASSERT_LINE : CLEAR_LINE);
+ m_wait = BIT(data, 6);
m_floppy = nullptr;
if (BIT(data, 0)) m_floppy = m_floppy0->get_device();
if (BIT(data, 1)) m_floppy = m_floppy1->get_device();
- if (BIT(data, 2)) m_floppy = m_floppy2->get_device();
- if (BIT(data, 3)) m_floppy = m_floppy3->get_device();
m_fdc->set_floppy(m_floppy);
@@ -389,7 +390,7 @@ WRITE8_MEMBER( trs80m3_state::port_f4_w )
{
m_floppy->mon_w(0);
m_floppy->ss_w(BIT(data, 4));
- m_timeout = 160;
+ m_timeout = 1600;
}
m_fdc->dden_w(!BIT(data, 7));
@@ -431,6 +432,17 @@ INTERRUPT_GEN_MEMBER(trs80m3_state::rtc_interrupt)
if (m_floppy)
m_floppy->mon_w(1); // motor off
}
+ // Also, if cpu is in wait, unlock it and trigger NMI
+ if (m_wait)
+ {
+ m_wait = false;
+ m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, CLEAR_LINE);
+ if (BIT(m_nmi_mask, 6))
+ {
+ m_nmi_data |= 0x40;
+ m_maincpu->set_input_line(INPUT_LINE_NMI, HOLD_LINE);
+ }
+ }
}
// The floppy sector has been read. Enable CPU and NMI.
@@ -438,23 +450,25 @@ WRITE_LINE_MEMBER(trs80m3_state::intrq_w)
{
if (state)
{
- //m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, CLEAR_LINE);
+ m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, CLEAR_LINE);
+ m_wait = false;
if (BIT(m_nmi_mask, 7))
{
- m_nmi_data = 0x80;
+ m_nmi_data |= 0x80;
//m_maincpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero);
m_maincpu->set_input_line(INPUT_LINE_NMI, HOLD_LINE);
}
}
- else
- m_nmi_data = 0;
}
// The next byte from floppy is available. Enable CPU so it can get the byte.
WRITE_LINE_MEMBER(trs80m3_state::drq_w)
{
if (state)
+ {
m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, CLEAR_LINE);
+ m_wait = false;
+ }
}
@@ -508,8 +522,9 @@ void trs80m3_state::machine_start()
{
m_mode = 0;
m_reg_load = 1;
- m_nmi_data = 0xff;
+ m_nmi_data = 0;
m_timeout = 1;
+ m_wait = 0;
m_cassette_data_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(trs80m3_state::cassette_data_callback),this));
m_cassette_data_timer->adjust( attotime::zero, 0, attotime::from_hz(11025) );
@@ -557,14 +572,10 @@ void trs80m3_state::machine_start()
void trs80m3_state::machine_reset()
{
- m_cassette_data = 0;
-}
-
-MACHINE_RESET_MEMBER(trs80m3_state, trs80m3)
-{
- address_space &mem = m_maincpu->space(AS_PROGRAM);
+ m_a11_flipflop = 0; // for cp500
m_cassette_data = 0;
m_size_store = 0xff;
+ address_space &mem = m_maincpu->space(AS_PROGRAM);
if (m_model4 & 4)
port_9c_w(mem, 0, 1); // 4P - enable rom
@@ -572,12 +583,6 @@ MACHINE_RESET_MEMBER(trs80m3_state, trs80m3)
port_84_w(mem, 0, 0); // 4 & 4P - switch in devices
}
-MACHINE_RESET_MEMBER(trs80m3_state, cp500)
-{
- m_a11_flipflop = 0;
- MACHINE_RESET_CALL_MEMBER( trs80m3 );
-}
-
/***************************************************************************
PARAMETERS
diff --git a/src/mame/mame.lst b/src/mame/mame.lst
index 8fdd2018171..a8919f9ec85 100644
--- a/src/mame/mame.lst
+++ b/src/mame/mame.lst
@@ -13054,6 +13054,7 @@ pool10f // (c) 1997 C.M.C.
pool10g // (c) 1996 C.M.C.
pool10h // (c) 1996 C.M.C.
pool10i // (c) 1997 C.M.C.
+pool10j // (c) 1997 C.M.C.
potgame // (c) 1996 C.M.C.
powercrd // (c) 1993 Fun World
rcdino4 // 1998 unknown
@@ -21591,6 +21592,9 @@ vs2v991 // 1999.?? Virtual Striker 2 ver.99.1
@source:modellot.cpp
modellot //
+@source:modena.cpp
+modena // 1992 Mephisto Modena
+
@source:mogura.cpp
mogura // GX141 (c) 1991
@@ -31886,8 +31890,10 @@ plan80 //
bigtown //
chance //
lastlap //
+ngtfever //
party //
spcgambl //
+thrdwrld //
@source:play_2.cpp
antar //
@@ -32186,7 +32192,6 @@ mrisc // 1992 Mephisto RISC 1MB
mrisc2 // 1994 Mephisto RISC II
academy // 1989 Mephisto Academy
milano // 1991 Mephisto Milano
-modena // 1992 Mephisto Modena
nshort // 1993 Mephisto Nigel Short
@source:policetr.cpp
@@ -35157,6 +35162,7 @@ hal21 // A4031 (c) 1985
hal21j // (c) 1985 (Japan)
ikari // A5004 'IW' (c) 1986
ikaria // A5004 'IW' (c) 1986
+ikaria2 // A5004 'IW' (c) 1986
ikarijp // A5004 'IW' (c) 1986 (Japan)
ikarijpb // bootleg
ikarinc // A5004 'IW' (c) 1986
@@ -36133,6 +36139,7 @@ flickya // (c) 1984 (S1)
flickyo // (c) 1984 (S1)
flickys1 // (c) 1984 (S1)
flickys2 // (c) 1984 (S1)
+flickyup // (c) 1984 (Converted from Up'n Down)
gardia // 834-6119 (S2?)
gardiab // bootleg
gardiaj //
diff --git a/src/mame/mess.flt b/src/mame/mess.flt
index 5a83f1f3e76..f022750873e 100644
--- a/src/mame/mess.flt
+++ b/src/mame/mess.flt
@@ -423,6 +423,7 @@ mmd1.cpp
mmodular.cpp
mod8.cpp
modellot.cpp
+modena.cpp
molecular.cpp
monty.cpp
mpf1.cpp
diff --git a/src/mame/video/apple2.cpp b/src/mame/video/apple2.cpp
index 907eaf35b21..be61550aa25 100644
--- a/src/mame/video/apple2.cpp
+++ b/src/mame/video/apple2.cpp
@@ -361,8 +361,8 @@ void a2_video_device::lores_update(screen_device &screen, bitmap_ind16 &bitmap,
}
/* perform adjustments */
- beginrow = std::max(beginrow, cliprect.min_y - (cliprect.min_y % 8));
- endrow = std::min(endrow, cliprect.max_y - (cliprect.max_y % 8) + 7);
+ beginrow = std::max(beginrow, cliprect.min_y);
+ endrow = std::min(endrow, cliprect.max_y);
if (!(m_sysconfig & 0x03))
{
@@ -379,13 +379,23 @@ void a2_video_device::lores_update(screen_device &screen, bitmap_ind16 &bitmap,
/* and now draw */
for (y = 0; y < 4; y++)
{
- for (x = 0; x < 14; x++)
- bitmap.pix16(row + y, col * 14 + x) = (code >> 0) & 0x0F;
+ if ((row + y) <= endrow)
+ {
+ for (x = 0; x < 14; x++)
+ {
+ bitmap.pix16(row + y, col * 14 + x) = (code >> 0) & 0x0F;
+ }
+ }
}
for (y = 4; y < 8; y++)
{
- for (x = 0; x < 14; x++)
- bitmap.pix16(row + y, col * 14 + x) = (code >> 4) & 0x0F;
+ if ((row + y) <= endrow)
+ {
+ for (x = 0; x < 14; x++)
+ {
+ bitmap.pix16(row + y, col * 14 + x) = (code >> 4) & 0x0F;
+ }
+ }
}
}
}
@@ -408,17 +418,25 @@ void a2_video_device::lores_update(screen_device &screen, bitmap_ind16 &bitmap,
/* and now draw */
for (y = 0; y < 4; y++)
{
- for (x = 0; x < 14; x++)
+ if ((row + y) <= endrow)
{
- bitmap.pix16(row + y, col * 14 + x) = bits & (1 << (x % 4)) ? fg : 0;
+ for (x = 0; x < 14; x++)
+ {
+ bitmap.pix16(row + y, col * 14 + x) = bits & (1 << (x % 4)) ? fg : 0;
+ }
}
}
bits = (code >> 4) & 0x0F;
for (y = 4; y < 8; y++)
{
- for (x = 0; x < 14; x++)
- bitmap.pix16(row + y, col * 14 + x) = bits & (1 << (x % 4)) ? fg : 0;
+ if ((row + y) <= endrow)
+ {
+ for (x = 0; x < 14; x++)
+ {
+ bitmap.pix16(row + y, col * 14 + x) = bits & (1 << (x % 4)) ? fg : 0;
+ }
+ }
}
}
}
diff --git a/src/mame/video/orbit.cpp b/src/mame/video/orbit.cpp
index 1a892d7ff27..642929e56d7 100644
--- a/src/mame/video/orbit.cpp
+++ b/src/mame/video/orbit.cpp
@@ -9,7 +9,7 @@ Atari Orbit video emulation
#include "emu.h"
#include "includes/orbit.h"
-WRITE8_MEMBER(orbit_state::orbit_playfield_w)
+WRITE8_MEMBER(orbit_state::playfield_w)
{
m_playfield_ram[offset] = data;
m_bg_tilemap->mark_tile_dirty(offset);
@@ -36,13 +36,11 @@ void orbit_state::video_start()
}
-void orbit_state::draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect )
+void orbit_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect)
{
const uint8_t* p = m_sprite_ram;
- int i;
-
- for (i = 0; i < 16; i++)
+ for (int i = 0; i < 16; i++)
{
int code = *p++;
int vpos = *p++;
@@ -77,7 +75,7 @@ void orbit_state::draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect
}
-uint32_t orbit_state::screen_update_orbit(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
+uint32_t orbit_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
m_flip_screen = ioport("DSW2")->read() & 8;
diff --git a/src/mame/video/seta.cpp b/src/mame/video/seta.cpp
index 7bd302266c7..dc66f28e994 100644
--- a/src/mame/video/seta.cpp
+++ b/src/mame/video/seta.cpp
@@ -262,34 +262,9 @@ WRITE8_MEMBER(seta_state::seta_vregs_w)
if (new_bank != m_samples_bank)
{
- if (!m_x1.found()) // triplfun no longer has the hardware, but still writes here
- return;
-
- uint8_t *rom = memregion("x1snd")->base();
- int samples_len = memregion("x1snd")->bytes();
- int addr;
-
m_samples_bank = new_bank;
-
- if (samples_len == 0x240000) /* blandia, eightfrc */
- {
- addr = 0x40000 * new_bank;
- if (new_bank >= 3) addr += 0x40000;
-
- if ( (samples_len > 0x100000) && ((addr+0x40000) <= samples_len) )
- memcpy(&rom[0xc0000],&rom[addr],0x40000);
- else
- logerror("PC %06X - Invalid samples bank %02X !\n", m_maincpu->pc(), new_bank);
- }
- else if (samples_len == 0x480000) /* zombraid */
- {
- /* bank 1 is never explicitly selected, 0 is used in its place */
- if (new_bank == 0) new_bank = 1;
- addr = 0x80000 * new_bank;
- if (new_bank > 0) addr += 0x80000;
-
- memcpy(&rom[0x80000],&rom[addr],0x80000);
- }
+ if (m_x1_bank != nullptr)
+ m_x1_bank->set_entry(m_samples_bank);
}
}
@@ -480,6 +455,8 @@ VIDEO_START_MEMBER(seta_state,seta_no_layers)
while (m_global_offsets->gamename && strcmp(machine().system().name, m_global_offsets->gamename))
m_global_offsets++;
m_samples_bank = -1; // set the samples bank to an out of range value at start-up
+ if (m_x1_bank != nullptr)
+ m_x1_bank->set_entry(0); // TODO : Unknown init
// position kludges
m_seta001->set_fg_xoffsets(m_global_offsets->sprite_offs[1], m_global_offsets->sprite_offs[0]);
diff --git a/src/tools/imgtool/main.cpp b/src/tools/imgtool/main.cpp
index 50c65845ddb..5c55535932e 100644
--- a/src/tools/imgtool/main.cpp
+++ b/src/tools/imgtool/main.cpp
@@ -106,7 +106,23 @@ static int parse_options(int argc, char *argv[], int minunnamed, int maxunnamed,
if (i < minunnamed)
goto error; /* Too few unnamed */
- resolution->find(name)->set_value(value);
+ util::option_resolution::entry *entry = resolution->find(name);
+ if (entry->option_type() == util::option_guide::entry::option_type::ENUM_BEGIN)
+ {
+ const util::option_guide::entry *enum_value;
+ for (enum_value = entry->enum_value_begin(); enum_value != entry->enum_value_end(); enum_value++)
+ {
+ if (!strcmp (enum_value->identifier(), value))
+ {
+ entry->set_value(enum_value->parameter());
+ break;
+ }
+ }
+ if (enum_value == entry->enum_value_end())
+ goto error;
+ }
+ else
+ entry->set_value(value);
}
}
}