diff options
Diffstat (limited to 'src')
253 files changed, 8038 insertions, 3589 deletions
diff --git a/src/devices/bus/a2bus/a2midi.cpp b/src/devices/bus/a2bus/a2midi.cpp index 5d746f1beb3..dc2f41457fe 100644 --- a/src/devices/bus/a2bus/a2midi.cpp +++ b/src/devices/bus/a2bus/a2midi.cpp @@ -95,14 +95,9 @@ uint8_t a2bus_midi_device::read_c0nx(address_space &space, uint8_t offset) { return m_ptm->read(space, offset & 7); } - else if (offset == 8) + else if (offset == 8 || offset == 9) { - return m_acia->status_r(space, 0); - } - else if (offset == 9) - { - uint8_t ret = m_acia->data_r(space, 0); - return ret; + return m_acia->read(space, offset & 1); } return 0; @@ -118,13 +113,9 @@ void a2bus_midi_device::write_c0nx(address_space &space, uint8_t offset, uint8_t { m_ptm->write(space, offset & 7, data); } - else if (offset == 8) - { - m_acia->control_w(space, 0, data); - } - else if (offset == 9) + else if (offset == 8 || offset == 9) { - m_acia->data_w(space, 0, data); + m_acia->write(space, offset & 1, data); } } diff --git a/src/devices/bus/c64/midi_maplin.cpp b/src/devices/bus/c64/midi_maplin.cpp index 1550d761055..5e5b751ecc6 100644 --- a/src/devices/bus/c64/midi_maplin.cpp +++ b/src/devices/bus/c64/midi_maplin.cpp @@ -107,11 +107,8 @@ uint8_t c64_maplin_midi_cartridge_device::c64_cd_r(address_space &space, offs_t switch (offset & 0xff) { case 0: - data = m_acia->status_r(space, 0); - break; - case 1: - data = m_acia->data_r(space, 0); + data = m_acia->read(space, offset & 1); break; } } @@ -131,11 +128,8 @@ void c64_maplin_midi_cartridge_device::c64_cd_w(address_space &space, offs_t off switch (offset & 0xff) { case 0: - m_acia->control_w(space, 0, data); - break; - case 1: - m_acia->data_w(space, 0, data); + m_acia->write(space, offset & 1, data); break; } } diff --git a/src/devices/bus/c64/midi_namesoft.cpp b/src/devices/bus/c64/midi_namesoft.cpp index 6f9a1f855db..db32a283189 100644 --- a/src/devices/bus/c64/midi_namesoft.cpp +++ b/src/devices/bus/c64/midi_namesoft.cpp @@ -105,11 +105,8 @@ uint8_t c64_namesoft_midi_cartridge_device::c64_cd_r(address_space &space, offs_ switch (offset & 0xff) { case 2: - data = m_acia->status_r(space, 0); - break; - case 3: - data = m_acia->data_r(space, 0); + data = m_acia->read(space, offset & 1); break; } } @@ -129,11 +126,8 @@ void c64_namesoft_midi_cartridge_device::c64_cd_w(address_space &space, offs_t o switch (offset & 0xff) { case 0: - m_acia->control_w(space, 0, data); - break; - case 1: - m_acia->data_w(space, 0, data); + m_acia->write(space, offset & 1, data); break; } } diff --git a/src/devices/bus/c64/midi_passport.cpp b/src/devices/bus/c64/midi_passport.cpp index cc7761906bb..34c77eeef28 100644 --- a/src/devices/bus/c64/midi_passport.cpp +++ b/src/devices/bus/c64/midi_passport.cpp @@ -135,12 +135,8 @@ uint8_t c64_passport_midi_cartridge_device::c64_cd_r(address_space &space, offs_ data = m_ptm->read(space, offset & 0x07); break; - case 8: - data = m_acia->status_r(space, 0); - break; - - case 9: - data = m_acia->data_r(space, 0); + case 8: case 9: + data = m_acia->read(space, offset & 0x01); break; } } @@ -164,12 +160,8 @@ void c64_passport_midi_cartridge_device::c64_cd_w(address_space &space, offs_t o m_ptm->write(space, offset & 0x07, data); break; - case 8: - m_acia->control_w(space, 0, data); - break; - - case 9: - m_acia->data_w(space, 0, data); + case 8: case 9: + m_acia->write(space, offset & 0x01, data); break; case 0x30: diff --git a/src/devices/bus/c64/midi_sci.cpp b/src/devices/bus/c64/midi_sci.cpp index efdea06b435..ef4e79e0f53 100644 --- a/src/devices/bus/c64/midi_sci.cpp +++ b/src/devices/bus/c64/midi_sci.cpp @@ -106,11 +106,8 @@ uint8_t c64_sequential_midi_cartridge_device::c64_cd_r(address_space &space, off switch (offset & 0xff) { case 2: - data = m_acia->status_r(space, 0); - break; - case 3: - data = m_acia->data_r(space, 0); + data = m_acia->read(space, offset & 1); break; } } @@ -130,11 +127,8 @@ void c64_sequential_midi_cartridge_device::c64_cd_w(address_space &space, offs_t switch (offset & 0xff) { case 0: - m_acia->control_w(space, 0, data); - break; - case 1: - m_acia->data_w(space, 0, data); + m_acia->write(space, offset & 1, data); break; } } diff --git a/src/devices/bus/c64/midi_siel.cpp b/src/devices/bus/c64/midi_siel.cpp index 3b6feec98fc..d4b56e90535 100644 --- a/src/devices/bus/c64/midi_siel.cpp +++ b/src/devices/bus/c64/midi_siel.cpp @@ -107,11 +107,8 @@ uint8_t c64_siel_midi_cartridge_device::c64_cd_r(address_space &space, offs_t of switch (offset & 0xff) { case 6: - data = m_acia->status_r(space, 0); - break; - case 7: - data = m_acia->data_r(space, 0); + data = m_acia->read(space, offset & 1); break; } } @@ -131,11 +128,8 @@ void c64_siel_midi_cartridge_device::c64_cd_w(address_space &space, offs_t offse switch (offset & 0xff) { case 4: - m_acia->control_w(space, 0, data); - break; - case 5: - m_acia->data_w(space, 0, data); + m_acia->write(space, offset & 1, data); break; } } diff --git a/src/devices/bus/cbmiec/interpod.cpp b/src/devices/bus/cbmiec/interpod.cpp index d645e065513..7cceb9ed970 100644 --- a/src/devices/bus/cbmiec/interpod.cpp +++ b/src/devices/bus/cbmiec/interpod.cpp @@ -112,8 +112,7 @@ const tiny_rom_entry *interpod_device::device_rom_region() const static ADDRESS_MAP_START( interpod_mem, AS_PROGRAM, 8, interpod_device ) AM_RANGE(0x0000, 0x007f) AM_MIRROR(0x3b80) AM_DEVICE(R6532_TAG, mos6532_new_device, ram_map) AM_RANGE(0x0400, 0x041f) AM_MIRROR(0x3be0) AM_DEVICE(R6532_TAG, mos6532_new_device, io_map) - AM_RANGE(0x2000, 0x2000) AM_MIRROR(0x9ffe) AM_DEVREADWRITE(MC6850_TAG, acia6850_device, status_r, control_w) - AM_RANGE(0x2001, 0x2001) AM_MIRROR(0x9ffe) AM_DEVREADWRITE(MC6850_TAG, acia6850_device, data_r, data_w) + AM_RANGE(0x2000, 0x2001) AM_MIRROR(0x9ffe) AM_DEVREADWRITE(MC6850_TAG, acia6850_device, read, write) AM_RANGE(0x4000, 0x47ff) AM_MIRROR(0xb800) AM_ROM AM_REGION(R6502_TAG, 0) AM_RANGE(0x8000, 0x800f) AM_MIRROR(0x5ff0) AM_DEVREADWRITE(R6522_TAG, via6522_device, read, write) ADDRESS_MAP_END diff --git a/src/devices/bus/cbus/pc9801_118.cpp b/src/devices/bus/cbus/pc9801_118.cpp index d28ab186c2c..57d99ff4d29 100644 --- a/src/devices/bus/cbus/pc9801_118.cpp +++ b/src/devices/bus/cbus/pc9801_118.cpp @@ -137,7 +137,7 @@ void pc9801_118_device::device_validity_check(validity_checker &valid) const void pc9801_118_device::install_device(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler) { - int buswidth = machine().firstcpu->space_config(AS_IO)->m_databus_width; + int buswidth = machine().firstcpu->space_config(AS_IO)->m_data_width; switch(buswidth) { case 8: diff --git a/src/devices/bus/cbus/pc9801_26.cpp b/src/devices/bus/cbus/pc9801_26.cpp index 7b16eea2d65..b9e2d84eb3d 100644 --- a/src/devices/bus/cbus/pc9801_26.cpp +++ b/src/devices/bus/cbus/pc9801_26.cpp @@ -130,7 +130,7 @@ void pc9801_26_device::device_validity_check(validity_checker &valid) const void pc9801_26_device::install_device(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler) { - int buswidth = machine().firstcpu->space_config(AS_IO)->m_databus_width; + int buswidth = machine().firstcpu->space_config(AS_IO)->m_data_width; switch(buswidth) { case 8: diff --git a/src/devices/bus/cbus/pc9801_86.cpp b/src/devices/bus/cbus/pc9801_86.cpp index 547ddb634a6..7736bf93d95 100644 --- a/src/devices/bus/cbus/pc9801_86.cpp +++ b/src/devices/bus/cbus/pc9801_86.cpp @@ -148,7 +148,7 @@ void pc9801_86_device::device_validity_check(validity_checker &valid) const void pc9801_86_device::install_device(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler) { - int buswidth = machine().firstcpu->space_config(AS_IO)->m_databus_width; + int buswidth = machine().firstcpu->space_config(AS_IO)->m_data_width; switch(buswidth) { case 8: diff --git a/src/devices/bus/cbus/pc9801_amd98.cpp b/src/devices/bus/cbus/pc9801_amd98.cpp index 11e92d8e292..ecb8b9343d8 100644 --- a/src/devices/bus/cbus/pc9801_amd98.cpp +++ b/src/devices/bus/cbus/pc9801_amd98.cpp @@ -125,7 +125,7 @@ void pc9801_amd98_device::device_validity_check(validity_checker &valid) const void pc9801_amd98_device::install_device(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler) { - int buswidth = machine().firstcpu->space_config(AS_IO)->m_databus_width; + int buswidth = machine().firstcpu->space_config(AS_IO)->m_data_width; switch(buswidth) { case 8: diff --git a/src/devices/bus/hp_dio/hp_dio.cpp b/src/devices/bus/hp_dio/hp_dio.cpp index 52b2a01d13a..6948beed7e9 100644 --- a/src/devices/bus/hp_dio/hp_dio.cpp +++ b/src/devices/bus/hp_dio/hp_dio.cpp @@ -147,7 +147,7 @@ void dio16_device::device_start() m_maincpu = subdevice<cpu_device>(m_cputag); m_prgspace = &m_maincpu->space(AS_PROGRAM); - m_prgwidth = m_maincpu->space_config(AS_PROGRAM)->m_databus_width; + m_prgwidth = m_maincpu->space_config(AS_PROGRAM)->m_data_width; } //------------------------------------------------- diff --git a/src/devices/bus/isa/isa.cpp b/src/devices/bus/isa/isa.cpp index 29acc810fd5..413911ee0f7 100644 --- a/src/devices/bus/isa/isa.cpp +++ b/src/devices/bus/isa/isa.cpp @@ -232,9 +232,9 @@ void isa8_device::device_start() else // use host CPU's program and I/O spaces directly { m_iospace = &m_maincpu->space(AS_IO); - m_iowidth = m_maincpu->space_config(AS_IO)->m_databus_width; + m_iowidth = m_maincpu->space_config(AS_IO)->m_data_width; m_memspace = &m_maincpu->space(AS_PROGRAM); - m_memwidth = m_maincpu->space_config(AS_PROGRAM)->m_databus_width; + m_memwidth = m_maincpu->space_config(AS_PROGRAM)->m_data_width; } } diff --git a/src/devices/bus/msx_cart/msx_audio.cpp b/src/devices/bus/msx_cart/msx_audio.cpp index 75c0ccd7598..fba7b1efc2b 100644 --- a/src/devices/bus/msx_cart/msx_audio.cpp +++ b/src/devices/bus/msx_cart/msx_audio.cpp @@ -205,10 +205,8 @@ void msx_cart_msx_audio_nms1205_device::device_start() address_space &space = machine().device<cpu_device>("maincpu")->space(AS_IO); space.install_write_handler(0xc0, 0xc1, write8_delegate(FUNC(y8950_device::write), m_y8950.target())); space.install_read_handler(0xc0, 0xc1, read8_delegate(FUNC(y8950_device::read), m_y8950.target())); - space.install_write_handler(0x00, 0x00, write8_delegate(FUNC(acia6850_device::control_w), m_acia6850.target())); - space.install_write_handler(0x01, 0x01, write8_delegate(FUNC(acia6850_device::data_w), m_acia6850.target())); - space.install_read_handler(0x04,0x04, read8_delegate(FUNC(acia6850_device::status_r), m_acia6850.target())); - space.install_read_handler(0x05,0x05, read8_delegate(FUNC(acia6850_device::data_r), m_acia6850.target())); + space.install_write_handler(0x00, 0x01, write8_delegate(FUNC(acia6850_device::write), m_acia6850.target())); + space.install_read_handler(0x04, 0x05, read8_delegate(FUNC(acia6850_device::read), m_acia6850.target())); } diff --git a/src/devices/bus/nubus/nubus.cpp b/src/devices/bus/nubus/nubus.cpp index d94154244ae..9a3fbdca25e 100644 --- a/src/devices/bus/nubus/nubus.cpp +++ b/src/devices/bus/nubus/nubus.cpp @@ -125,7 +125,7 @@ void nubus_device::add_nubus_card(device_nubus_card_interface *card) void nubus_device::install_device(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler, uint32_t mask) { m_maincpu = machine().device<cpu_device>(m_cputag); - int buswidth = m_maincpu->space_config(AS_PROGRAM)->m_databus_width; + int buswidth = m_maincpu->space_config(AS_PROGRAM)->m_data_width; switch(buswidth) { case 32: @@ -142,7 +142,7 @@ void nubus_device::install_device(offs_t start, offs_t end, read8_delegate rhand void nubus_device::install_device(offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler, uint32_t mask) { m_maincpu = machine().device<cpu_device>(m_cputag); - int buswidth = m_maincpu->space_config(AS_PROGRAM)->m_databus_width; + int buswidth = m_maincpu->space_config(AS_PROGRAM)->m_data_width; switch(buswidth) { case 32: @@ -159,7 +159,7 @@ void nubus_device::install_device(offs_t start, offs_t end, read16_delegate rhan void nubus_device::install_device(offs_t start, offs_t end, read32_delegate rhandler, write32_delegate whandler, uint32_t mask) { m_maincpu = machine().device<cpu_device>(m_cputag); - int buswidth = m_maincpu->space_config(AS_PROGRAM)->m_databus_width; + int buswidth = m_maincpu->space_config(AS_PROGRAM)->m_data_width; switch(buswidth) { case 32: @@ -176,7 +176,7 @@ void nubus_device::install_device(offs_t start, offs_t end, read32_delegate rhan void nubus_device::install_readonly_device(offs_t start, offs_t end, read32_delegate rhandler, uint32_t mask) { m_maincpu = machine().device<cpu_device>(m_cputag); - int buswidth = m_maincpu->space_config(AS_PROGRAM)->m_databus_width; + int buswidth = m_maincpu->space_config(AS_PROGRAM)->m_data_width; switch(buswidth) { case 32: @@ -193,7 +193,7 @@ void nubus_device::install_readonly_device(offs_t start, offs_t end, read32_dele void nubus_device::install_writeonly_device(offs_t start, offs_t end, write32_delegate whandler, uint32_t mask) { m_maincpu = machine().device<cpu_device>(m_cputag); - int buswidth = m_maincpu->space_config(AS_PROGRAM)->m_databus_width; + int buswidth = m_maincpu->space_config(AS_PROGRAM)->m_data_width; switch(buswidth) { case 32: diff --git a/src/devices/bus/ss50/interface.cpp b/src/devices/bus/ss50/interface.cpp new file mode 100644 index 00000000000..3d51f76ba53 --- /dev/null +++ b/src/devices/bus/ss50/interface.cpp @@ -0,0 +1,222 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + SWTPC SS-50 I/O port interface + + The SS-50 bus is actually two buses in one: a 50-pin master bus + used by RAM boards and such, and a 30-pin I/O bus derived from it + either on the motherboard or a dedicated interface board, which + provides each of eight "interface" cards with its specific chip + select line and only a few address lines for register selection. + This 30-pin bus is what is emulated here. + + As originally introduced in the 6800 Computer System, the + interface bus only included two register select lines, just enough + to drive one MC6820 PIA. No defined signals were placed on the + first two lines, which cards were permitted to use for any + purpose. The original MP-B motherboard also quite wastefully + reserved 8K (technically 4K) of address space to map a maximum of + 32 read/write registers. The later MC6809-oriented systems not + only reduced the I/O segment to a selectable 1K, but appropriated + the two formerly undefined lines for two additional register + select lines, making it possible to use more complex interface + cards but breaking compatibility with some earlier ones. + + An unusual feature of the SS-50 bus is the presence of five baud + rate frequencies, selected from among the (inverted) outputs of + a MC14411 Bit Rate Generator. The 6800 Computer System provided + only rates between 110 and 1200 (multiplied by 16), and also used + the MC14411's master frequency to generate the CPU clocks. The + MP-09 CPU board retained the MC14411 at first, but provided an + independent XTAL for the MC6809 and jumpers to select higher + baud rates. Later the MC14411 was removed from the CPU board so + the five baud rate lines on the 50-pin bus could be reused to + provide 20-bit addressing and DMA. This was accomplished by + adding a separate MP-ID Interface Driver Board to decode I/O + accesses (and optionally slow them down to allow old 1 MHz + peripherals to be used with a faster CPU), generate the baud + rates (whose selection was changed yet again) from a dedicated + MC14411, and provide a few I/O functions of its own. + +*********************************************************************** + + +-+ + |o| RS2 (originally UD3) + |o| RS3 (originally UD4) + |o| -16V (originally -12V) + |o| +16V (originally +12V) + |o| GND + |o| GND + |o| INDEX + |o| /FIRQ (6800: /NMI) + |o| /IRQ + |o| RS0 + |o| RS1 + |o| D0 + |o| D1 + |o| D2 + |o| D3 + |o| D4 + |o| D5 + |o| D6 + |o| D7 + |o| E (6800: Ï•2) + |o| R/W + |o| +8V (unregulated) + |o| +8V (unregulated) + |o| 600b/1200b (originally 1200b) + |o| 4800b (originally 600b) + |o| 300b + |o| 150b/9600b (originally 150b) + |o| 110b + |o| /RESET + |o| I/O # + +-+ + +**********************************************************************/ + +#include "emu.h" +#include "bus/ss50/interface.h" + +#include "bus/ss50/mpc.h" +//#include "bus/ss50/mpl.h" +//#include "bus/ss50/mpr.h" +#include "bus/ss50/mps.h" +//#include "bus/ss50/mpt.h" + +//************************************************************************** +// GLOBAL VARIABLES +//************************************************************************** + +// device type definition +DEFINE_DEVICE_TYPE(SS50_INTERFACE, ss50_interface_port_device, "ss50_interface", "SS-50 Interface Port") + +//************************************************************************** +// SS-50 INTERFACE PORT DEVICE +//************************************************************************** + +//------------------------------------------------- +// ss50_interface_port_device - construction +//------------------------------------------------- + +ss50_interface_port_device::ss50_interface_port_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, SS50_INTERFACE, tag, owner, clock), + device_slot_interface(mconfig, *this), + m_irq_cb(*this), + m_firq_cb(*this), + m_card(nullptr) +{ +} + +//------------------------------------------------- +// device_resolve_objects - resolve objects that +// may be needed for other devices to set +// initial conditions at start time +//------------------------------------------------- + +void ss50_interface_port_device::device_resolve_objects() +{ + logerror("Resolving objects...\n"); + + m_irq_cb.resolve_safe(); + m_firq_cb.resolve_safe(); + + m_card = dynamic_cast<ss50_card_interface *>(get_card_device()); + if (m_card != nullptr) + m_card->m_slot = this; +} + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void ss50_interface_port_device::device_start() +{ +} + +//------------------------------------------------- +// read - interface read access (pre-decoded) +//------------------------------------------------- + +READ8_MEMBER(ss50_interface_port_device::read) +{ + if (m_card == nullptr) + { + logerror("%s: Read from unspecified interface (RS = %X)\n", machine().describe_context(), offset); + return space.unmap(); + } + + return m_card->register_read(space, offset); +} + +//------------------------------------------------- +// write - interface write access (pre-decoded) +//------------------------------------------------- + +WRITE8_MEMBER(ss50_interface_port_device::write) +{ + if (m_card == nullptr) + { + logerror("%s: Write to unspecified interface (RS = %X, D = %02X)\n", machine().describe_context(), offset, data); + return; + } + + m_card->register_write(space, offset, data); +} + +//------------------------------------------------- +// fN_w - baud rate clocks for serial interfaces +//------------------------------------------------- + +WRITE_LINE_MEMBER(ss50_interface_port_device::f110_w) +{ + if (m_card != nullptr) + m_card->f110_w(state); +} + +WRITE_LINE_MEMBER(ss50_interface_port_device::f150_9600_w) +{ + if (m_card != nullptr) + m_card->f150_9600_w(state); +} + +WRITE_LINE_MEMBER(ss50_interface_port_device::f300_w) +{ + if (m_card != nullptr) + m_card->f300_w(state); +} + +WRITE_LINE_MEMBER(ss50_interface_port_device::f600_4800_w) +{ + if (m_card != nullptr) + m_card->f600_4800_w(state); +} + +WRITE_LINE_MEMBER(ss50_interface_port_device::f600_1200_w) +{ + if (m_card != nullptr) + m_card->f600_1200_w(state); +} + +//************************************************************************** +// SS-50 CARD INTERFACE +//************************************************************************** + +//------------------------------------------------- +// ss50_card_interface - construction +//------------------------------------------------- + +ss50_card_interface::ss50_card_interface(const machine_config &mconfig, device_t &device) + : device_slot_card_interface(mconfig, device), + m_slot(nullptr) +{ +} + +SLOT_INTERFACE_START(ss50_default_2rs_devices) + SLOT_INTERFACE("mpc", SS50_MPC) + //SLOT_INTERFACE("mpl", SS50_MPL) + //SLOT_INTERFACE("mpn", SS50_MPN) + SLOT_INTERFACE("mps", SS50_MPS) + //SLOT_INTERFACE("mpt", SS50_MPT) +SLOT_INTERFACE_END diff --git a/src/devices/bus/ss50/interface.h b/src/devices/bus/ss50/interface.h new file mode 100644 index 00000000000..2e35b0abf2f --- /dev/null +++ b/src/devices/bus/ss50/interface.h @@ -0,0 +1,110 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + SWTPC SS-50 I/O port interface + +**********************************************************************/ + +#pragma once + +#ifndef MAME_DEVICES_BUS_SS50_INTERFACE_H +#define MAME_DEVICES_BUS_SS50_INTERFACE_H + +//************************************************************************** +// CONFIGURATION MACROS +//************************************************************************** + +#define MCFG_SS50_INTERFACE_PORT_ADD(_tag, _slot_intf, _def_slot) \ + MCFG_DEVICE_ADD(_tag, SS50_INTERFACE, 0) \ + MCFG_DEVICE_SLOT_INTERFACE(ss50_##_slot_intf, _def_slot, false) + +#define MCFG_SS50_INTERFACE_IRQ_CALLBACK(_devcb) \ + devcb = &ss50_interface_port_device::set_irq_cb(*device, DEVCB_##_devcb); + +#define MCFG_SS50_INTERFACE_FIRQ_CALLBACK(_devcb) \ + devcb = &ss50_interface_port_device::set_firq_cb(*device, DEVCB_##_devcb); + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// forward declarations +class ss50_card_interface; + +// ======================> ss50_interface_port_device + +class ss50_interface_port_device : public device_t, public device_slot_interface +{ + friend class ss50_card_interface; + +public: + // construction/destruction + ss50_interface_port_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + + // static configuration + template<class Object> static devcb_base &set_irq_cb(device_t &device, Object &&object) { return downcast<ss50_interface_port_device &>(device).m_irq_cb.set_callback(std::forward<Object>(object)); } + template<class Object> static devcb_base &set_firq_cb(device_t &device, Object &&object) { return downcast<ss50_interface_port_device &>(device).m_firq_cb.set_callback(std::forward<Object>(object)); } + + // memory accesses + DECLARE_READ8_MEMBER(read); + DECLARE_WRITE8_MEMBER(write); + + // baud rates + DECLARE_WRITE_LINE_MEMBER(f110_w); + DECLARE_WRITE_LINE_MEMBER(f150_9600_w); + DECLARE_WRITE_LINE_MEMBER(f300_w); + DECLARE_WRITE_LINE_MEMBER(f600_4800_w); + DECLARE_WRITE_LINE_MEMBER(f600_1200_w); + +protected: + // device-specific overrides + virtual void device_resolve_objects() override; + virtual void device_start() override; + +private: + // output callbacks + devcb_write_line m_irq_cb; + devcb_write_line m_firq_cb; + + ss50_card_interface *m_card; +}; + + +// ======================> ss50_card_interface + +class ss50_card_interface : public device_slot_card_interface +{ + friend class ss50_interface_port_device; + +protected: + // construction/destruction + ss50_card_interface(const machine_config &mconfig, device_t &device); + + // required overrides + virtual DECLARE_READ8_MEMBER(register_read) = 0; + virtual DECLARE_WRITE8_MEMBER(register_write) = 0; + + // optional overrides + virtual DECLARE_WRITE_LINE_MEMBER(f110_w) { } + virtual DECLARE_WRITE_LINE_MEMBER(f150_9600_w) { } + virtual DECLARE_WRITE_LINE_MEMBER(f300_w) { } + virtual DECLARE_WRITE_LINE_MEMBER(f600_4800_w) { } + virtual DECLARE_WRITE_LINE_MEMBER(f600_1200_w) { } + + // IRQ/FIRQ/NMI outputs + DECLARE_WRITE_LINE_MEMBER(write_irq) { m_slot->m_irq_cb(state); } + DECLARE_WRITE_LINE_MEMBER(write_firq) { m_slot->m_firq_cb(state); } + +private: + ss50_interface_port_device *m_slot; +}; + + +// device type definition +extern const device_type SS50_INTERFACE; + +SLOT_INTERFACE_EXTERN(ss50_default_2rs_devices); +//SLOT_INTERFACE_EXTERN(ss50_default_4rs_devices); + +#endif diff --git a/src/devices/bus/ss50/mpc.cpp b/src/devices/bus/ss50/mpc.cpp new file mode 100644 index 00000000000..7f587d6bb62 --- /dev/null +++ b/src/devices/bus/ss50/mpc.cpp @@ -0,0 +1,216 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + SWTPC MP-C Serial Control Interface + +**********************************************************************/ + +#include "emu.h" +#include "bus/ss50/mpc.h" +#include "bus/ss50/interface.h" + +#include "bus/rs232/rs232.h" +#include "machine/6821pia.h" +#include "machine/input_merger.h" + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> ss50_mpc_device + +class ss50_mpc_device : public device_t, public ss50_card_interface +{ +public: + // construction/destruction + ss50_mpc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, SS50_MPC, tag, owner, clock), + ss50_card_interface(mconfig, *this), + m_pia(*this, "pia"), + m_loopback(*this, "loopback"), + m_baud_jumper(*this, "BAUD"), + m_cd4024ae_count(0), + m_cd4024ae_clock(false), + m_cd4024ae_reset(true), + m_count_select(false) + { + } + +protected: + // device-specific overrides + virtual ioport_constructor device_input_ports() const override; + virtual void device_add_mconfig(machine_config &config) override; + virtual void device_start() override; + + // interface-specific overrides + virtual DECLARE_READ8_MEMBER(register_read) override; + virtual DECLARE_WRITE8_MEMBER(register_write) override; + virtual DECLARE_WRITE_LINE_MEMBER(f110_w) override; + virtual DECLARE_WRITE_LINE_MEMBER(f300_w) override; + +private: + DECLARE_WRITE_LINE_MEMBER(serial_input_w); + DECLARE_WRITE_LINE_MEMBER(reader_control_w); + DECLARE_READ_LINE_MEMBER(count_r); + DECLARE_WRITE_LINE_MEMBER(count_reset_w); + DECLARE_WRITE_LINE_MEMBER(count_select_w); + DECLARE_WRITE_LINE_MEMBER(clock_input_w); + + required_device<pia6821_device> m_pia; + required_device<input_merger_device> m_loopback; + required_ioport m_baud_jumper; + + u8 m_cd4024ae_count; + bool m_cd4024ae_clock; + bool m_cd4024ae_reset; + bool m_count_select; +}; + + +static INPUT_PORTS_START( mpc ) + PORT_START("BAUD") + PORT_DIPNAME(1, 0, "Baud Rate") + PORT_DIPSETTING(1, "110") + PORT_DIPSETTING(0, "300") + + PORT_START("STOP") + PORT_DIPNAME(1, 0, "Stop Bits") + PORT_DIPSETTING(0, "1") + PORT_DIPSETTING(1, "2") +INPUT_PORTS_END + + +//------------------------------------------------- +// input_ports - device-specific input ports +//------------------------------------------------- + +ioport_constructor ss50_mpc_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(mpc); +} + + +static DEVICE_INPUT_DEFAULTS_START( terminal ) + DEVICE_INPUT_DEFAULTS("RS232_RXBAUD", 0xff, RS232_BAUD_300) + DEVICE_INPUT_DEFAULTS("RS232_TXBAUD", 0xff, RS232_BAUD_300) + DEVICE_INPUT_DEFAULTS("RS232_STARTBITS", 0xff, RS232_STARTBITS_1) + DEVICE_INPUT_DEFAULTS("RS232_DATABITS", 0xff, RS232_DATABITS_8) + DEVICE_INPUT_DEFAULTS("RS232_PARITY", 0xff, RS232_PARITY_NONE) + DEVICE_INPUT_DEFAULTS("RS232_STOPBITS", 0xff, RS232_STOPBITS_1) +DEVICE_INPUT_DEFAULTS_END + + +//------------------------------------------------- +// device_add_mconfig - add device-specific +// machine configuration +//------------------------------------------------- + +MACHINE_CONFIG_MEMBER(ss50_mpc_device::device_add_mconfig) + MCFG_DEVICE_ADD("pia", PIA6821, 0) // actually MC6820 + MCFG_PIA_WRITEPA_HANDLER(DEVWRITELINE("outgate", input_merger_device, in_w<0>)) MCFG_DEVCB_BIT(0) + MCFG_PIA_CB2_HANDLER(WRITELINE(ss50_mpc_device, reader_control_w)) + MCFG_PIA_READPB_HANDLER(IOPORT("STOP")) MCFG_DEVCB_BIT(6) + MCFG_DEVCB_CHAIN_INPUT(READLINE(ss50_mpc_device, count_r)) MCFG_DEVCB_BIT(7) + MCFG_PIA_WRITEPB_HANDLER(WRITELINE(ss50_mpc_device, count_select_w)) MCFG_DEVCB_BIT(2) + MCFG_DEVCB_CHAIN_OUTPUT(WRITELINE(ss50_mpc_device, count_reset_w)) MCFG_DEVCB_BIT(0) + //MCFG_PIA_IRQA_HANDLER(WRITELINE(ss50_mpc_device, pia_irq_w)) + //MCFG_PIA_IRQB_HANDLER(WRITELINE(ss50_mpc_device, pia_irq_w)) + + MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal") + MCFG_RS232_RXD_HANDLER(WRITELINE(ss50_mpc_device, serial_input_w)) + MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("terminal", terminal) + + MCFG_INPUT_MERGER_ALL_HIGH("outgate") + MCFG_INPUT_MERGER_OUTPUT_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd)) + + MCFG_INPUT_MERGER_ANY_HIGH("loopback") + MCFG_INPUT_MERGER_OUTPUT_HANDLER(DEVWRITELINE("outgate", input_merger_device, in_w<1>)) +MACHINE_CONFIG_END + + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void ss50_mpc_device::device_start() +{ + save_item(NAME(m_cd4024ae_count)); + save_item(NAME(m_cd4024ae_clock)); + save_item(NAME(m_cd4024ae_reset)); + save_item(NAME(m_count_select)); +} + +WRITE_LINE_MEMBER(ss50_mpc_device::serial_input_w) +{ + m_pia->set_a_input(state << 7, 0x7f); + m_loopback->in_w<0>(state); +} + + +WRITE_LINE_MEMBER(ss50_mpc_device::reader_control_w) +{ + m_loopback->in_w<1>(state); +} + +READ_LINE_MEMBER(ss50_mpc_device::count_r) +{ + return BIT(m_cd4024ae_count, m_count_select ? 4 : 3); +} + +WRITE_LINE_MEMBER(ss50_mpc_device::count_reset_w) +{ + m_cd4024ae_reset = bool(state); + if (state) + m_cd4024ae_count = 0; +} + +WRITE_LINE_MEMBER(ss50_mpc_device::count_select_w) +{ + m_count_select = bool(state); +} + +WRITE_LINE_MEMBER(ss50_mpc_device::clock_input_w) +{ + if (m_cd4024ae_clock != bool(state)) + { + m_cd4024ae_clock = bool(state); + if (!state && !m_cd4024ae_reset) + m_cd4024ae_count++; + } +} + + +//------------------------------------------------- +// register_read - read from a port register +//------------------------------------------------- + +READ8_MEMBER(ss50_mpc_device::register_read) +{ + return m_pia->read(space, offset & 3, 0); +} + +//------------------------------------------------- +// register_write - write to a port register +//------------------------------------------------- + +WRITE8_MEMBER(ss50_mpc_device::register_write) +{ + m_pia->write(space, offset & 3, data); +} + +WRITE_LINE_MEMBER(ss50_mpc_device::f110_w) +{ + if (m_baud_jumper->read()) + clock_input_w(state); +} + +WRITE_LINE_MEMBER(ss50_mpc_device::f300_w) +{ + if (!m_baud_jumper->read()) + clock_input_w(state); +} + + +// device type definition +DEFINE_DEVICE_TYPE(SS50_MPC, ss50_mpc_device, "ss50_mpc", "MP-C Serial Control Interface") diff --git a/src/devices/bus/ss50/mpc.h b/src/devices/bus/ss50/mpc.h new file mode 100644 index 00000000000..2e769932b0c --- /dev/null +++ b/src/devices/bus/ss50/mpc.h @@ -0,0 +1,14 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + SWTPC MP-C Serial Control Interface + +**********************************************************************/ + +#ifndef MAME_DEVICE_BUS_SS50_MPC_H +#define MAME_DEVICE_BUS_SS50_MPC_H + +extern const device_type SS50_MPC; + +#endif // MAME_DEVICE_BUS_SS50_MPC_H diff --git a/src/devices/bus/ss50/mps.cpp b/src/devices/bus/ss50/mps.cpp new file mode 100644 index 00000000000..11b9051063d --- /dev/null +++ b/src/devices/bus/ss50/mps.cpp @@ -0,0 +1,183 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + SWTPC MP-S Serial Interface + +**********************************************************************/ + +#include "emu.h" +#include "bus/ss50/mps.h" +#include "bus/ss50/interface.h" + +#include "bus/rs232/rs232.h" +#include "machine/6850acia.h" + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> ss50_mps_device + +class ss50_mps_device : public device_t, public ss50_card_interface +{ +public: + // construction/destruction + ss50_mps_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, SS50_MPS, tag, owner, clock), + ss50_card_interface(mconfig, *this), + m_acia(*this, "acia"), + m_irq_jumper(*this, "IRQ"), + m_rate_jumper(*this, "BAUD") + { + } + +protected: + // device-specific overrides + virtual ioport_constructor device_input_ports() const override; + virtual void device_add_mconfig(machine_config &config) override; + virtual void device_start() override { } + + // interface-specific overrides + virtual DECLARE_READ8_MEMBER(register_read) override; + virtual DECLARE_WRITE8_MEMBER(register_write) override; + virtual DECLARE_WRITE_LINE_MEMBER(f110_w) override; + virtual DECLARE_WRITE_LINE_MEMBER(f150_9600_w) override; + virtual DECLARE_WRITE_LINE_MEMBER(f300_w) override; + virtual DECLARE_WRITE_LINE_MEMBER(f600_4800_w) override; + virtual DECLARE_WRITE_LINE_MEMBER(f600_1200_w) override; + +private: + DECLARE_WRITE_LINE_MEMBER(acia_irq_w); + + required_device<acia6850_device> m_acia; + required_ioport m_irq_jumper; + required_ioport m_rate_jumper; +}; + + +static INPUT_PORTS_START( mps ) + PORT_START("IRQ") + PORT_DIPNAME(1, 0, "IRQ") + PORT_DIPSETTING(1, DEF_STR(Off)) + PORT_DIPSETTING(0, DEF_STR(On)) + + PORT_START("BAUD") + PORT_DIPNAME(0x1f, 0x0f, "Baud Rate") + PORT_DIPSETTING(0x1e, "110") + PORT_DIPSETTING(0x1d, "150") + PORT_DIPSETTING(0x1b, "300") + PORT_DIPSETTING(0x17, "600") + PORT_DIPSETTING(0x0f, "1200") +INPUT_PORTS_END + + +//------------------------------------------------- +// input_ports - device-specific input ports +//------------------------------------------------- + +ioport_constructor ss50_mps_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(mps); +} + + +static DEVICE_INPUT_DEFAULTS_START( terminal ) + DEVICE_INPUT_DEFAULTS("RS232_RXBAUD", 0xff, RS232_BAUD_1200) + DEVICE_INPUT_DEFAULTS("RS232_TXBAUD", 0xff, RS232_BAUD_1200) + DEVICE_INPUT_DEFAULTS("RS232_STARTBITS", 0xff, RS232_STARTBITS_1) + DEVICE_INPUT_DEFAULTS("RS232_DATABITS", 0xff, RS232_DATABITS_8) + DEVICE_INPUT_DEFAULTS("RS232_PARITY", 0xff, RS232_PARITY_NONE) + DEVICE_INPUT_DEFAULTS("RS232_STOPBITS", 0xff, RS232_STOPBITS_1) +DEVICE_INPUT_DEFAULTS_END + + +//------------------------------------------------- +// device_add_mconfig - add device-specific +// machine configuration +//------------------------------------------------- + +MACHINE_CONFIG_MEMBER(ss50_mps_device::device_add_mconfig) + MCFG_DEVICE_ADD("acia", ACIA6850, 0) + MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd)) + //MCFG_ACIA6850_RTS_HANDLER(WRITELINE(ss50_mps_device, reader_control_w)) + MCFG_ACIA6850_IRQ_HANDLER(WRITELINE(ss50_mps_device, acia_irq_w)) + + MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal") + MCFG_RS232_RXD_HANDLER(DEVWRITELINE("acia", acia6850_device, write_rxd)) + MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("terminal", terminal) +MACHINE_CONFIG_END + + +//------------------------------------------------- +// register_read - read from a port register +//------------------------------------------------- + +READ8_MEMBER(ss50_mps_device::register_read) +{ + return m_acia->read(space, offset & 1, 0); +} + +//------------------------------------------------- +// register_write - write to a port register +//------------------------------------------------- + +WRITE8_MEMBER(ss50_mps_device::register_write) +{ + m_acia->write(space, offset & 1, data); +} + +WRITE_LINE_MEMBER(ss50_mps_device::f110_w) +{ + if (!BIT(m_rate_jumper->read(), 0)) + { + m_acia->write_txc(state); + m_acia->write_rxc(state); + } +} + +WRITE_LINE_MEMBER(ss50_mps_device::f150_9600_w) +{ + if (!BIT(m_rate_jumper->read(), 1)) + { + m_acia->write_txc(state); + m_acia->write_rxc(state); + } +} + +WRITE_LINE_MEMBER(ss50_mps_device::f300_w) +{ + if (!BIT(m_rate_jumper->read(), 2)) + { + m_acia->write_txc(state); + m_acia->write_rxc(state); + } +} + +WRITE_LINE_MEMBER(ss50_mps_device::f600_4800_w) +{ + if (!BIT(m_rate_jumper->read(), 3)) + { + m_acia->write_txc(state); + m_acia->write_rxc(state); + } +} + +WRITE_LINE_MEMBER(ss50_mps_device::f600_1200_w) +{ + if (!BIT(m_rate_jumper->read(), 4)) + { + m_acia->write_txc(state); + m_acia->write_rxc(state); + } +} + +WRITE_LINE_MEMBER(ss50_mps_device::acia_irq_w) +{ + if (!m_irq_jumper->read()) + write_irq(state); +} + + +// device type definition +DEFINE_DEVICE_TYPE(SS50_MPS, ss50_mps_device, "ss50_mps", "MP-S Serial Interface") diff --git a/src/devices/bus/ss50/mps.h b/src/devices/bus/ss50/mps.h new file mode 100644 index 00000000000..29733f7eeda --- /dev/null +++ b/src/devices/bus/ss50/mps.h @@ -0,0 +1,14 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + SWTPC MP-S Serial Interface + +**********************************************************************/ + +#ifndef MAME_DEVICE_BUS_SS50_MPS_H +#define MAME_DEVICE_BUS_SS50_MPS_H + +extern const device_type SS50_MPS; + +#endif // MAME_DEVICE_BUS_SS50_MPS_H diff --git a/src/devices/bus/vme/vme.cpp b/src/devices/bus/vme/vme.cpp index c27f4a44da4..69bc9d90fb8 100644 --- a/src/devices/bus/vme/vme.cpp +++ b/src/devices/bus/vme/vme.cpp @@ -266,7 +266,7 @@ void vme_device::device_start() LOG(" - using owner memory spaces for %s\n", m_cputag); m_maincpu = owner()->subdevice<cpu_device>(m_cputag); m_prgspace = &m_maincpu->space(AS_PROGRAM); - m_prgwidth = m_maincpu->space_config(AS_PROGRAM)->m_databus_width; + m_prgwidth = m_maincpu->space_config(AS_PROGRAM)->m_data_width; LOG(" - Done at %d width\n", m_prgwidth); } } diff --git a/src/devices/cpu/e132xs/32xsdasm.cpp b/src/devices/cpu/e132xs/32xsdasm.cpp index 2060350c5b8..339c7b9c0b0 100644 --- a/src/devices/cpu/e132xs/32xsdasm.cpp +++ b/src/devices/cpu/e132xs/32xsdasm.cpp @@ -391,32 +391,31 @@ u32 hyperstone_disassembler::opcode_alignment() const return 2; } +hyperstone_disassembler::hyperstone_disassembler(config *conf) : m_config(conf) +{ +} + /*****************************/ /* Main disassembly function */ /*****************************/ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) { - uint16_t op; - uint8_t op_num; - - uint8_t source_code, dest_code, source_bit, dest_bit; - char source[5] = "\0", dest[5] = "\0"; uint32_t flags = 0; - op = opcodes.r16(pc); + uint16_t op = opcodes.r16(pc); size = 2; - source_code = SOURCECODE(op); - dest_code = DESTCODE(op); - source_bit = SOURCEBIT(op); - dest_bit = DESTBIT(op); + uint8_t source_code = SOURCECODE(op); + uint8_t dest_code = DESTCODE(op); + uint8_t source_bit = SOURCEBIT(op); + uint8_t dest_bit = DESTBIT(op); - global_fp = 0; - int h_flag = 0; + global_fp = m_config->get_fp(); + int h_flag = m_config->get_h(); - op_num = (op & 0xff00) >> 8; + uint8_t op_num = (op & 0xff00) >> 8; switch( op_num ) { diff --git a/src/devices/cpu/e132xs/32xsdasm.h b/src/devices/cpu/e132xs/32xsdasm.h index 6c5b0fa4482..0ee99457c55 100644 --- a/src/devices/cpu/e132xs/32xsdasm.h +++ b/src/devices/cpu/e132xs/32xsdasm.h @@ -15,7 +15,14 @@ class hyperstone_disassembler : public util::disasm_interface { public: - hyperstone_disassembler() = default; + struct config { + virtual ~config() = default; + + virtual u8 get_fp() const = 0; + virtual bool get_h() const = 0; + }; + + hyperstone_disassembler(config *conf); virtual ~hyperstone_disassembler() = default; virtual u32 opcode_alignment() const override; @@ -26,8 +33,11 @@ private: static const char *const G_REG[]; static const char *const SETxx[]; - int size, global_fp; + config *m_config; + int size; + u8 global_fp; + void LL_format(char *source, char *dest, uint16_t op); void LR_format(char *source, char *dest, uint16_t op); void RR_format(char *source, char *dest, uint16_t op, unsigned h_flag); diff --git a/src/devices/cpu/e132xs/32xsdefs.h b/src/devices/cpu/e132xs/32xsdefs.h index a4a5ff876df..86b0018b909 100644 --- a/src/devices/cpu/e132xs/32xsdefs.h +++ b/src/devices/cpu/e132xs/32xsdefs.h @@ -54,15 +54,15 @@ /* Trap numbers */ #define TRAPNO_IO2 48 #define TRAPNO_IO1 49 -#define TRAPNO_INT4 50 -#define TRAPNO_INT3 51 -#define TRAPNO_INT2 52 -#define TRAPNO_INT1 53 +#define TRAPNO_INT4 50 +#define TRAPNO_INT3 51 +#define TRAPNO_INT2 52 +#define TRAPNO_INT1 53 #define TRAPNO_IO3 54 #define TRAPNO_TIMER 55 #define TRAPNO_RESERVED1 56 #define TRAPNO_TRACE_EXCEPTION 57 -#define TRAPNO_PARITY_ERROR 58 +#define TRAPNO_PARITY_ERROR 58 #define TRAPNO_EXTENDED_OVERFLOW 59 #define TRAPNO_RANGE_ERROR 60 #define TRAPNO_PRIVILEGE_ERROR TRAPNO_RANGE_ERROR @@ -125,27 +125,6 @@ /* Internal registers */ -#define SREG decode.src_value -#define SREGF decode.next_src_value -#define DREG decode.dst_value -#define DREGF decode.next_dst_value -#define EXTRA_U decode.extra.u -#define EXTRA_S decode.extra.s - -#define SET_SREG( _data_ ) (decode.src_is_local ? set_local_register(decode.src, (uint32_t)_data_) : set_global_register(decode.src, (uint32_t)_data_)) -#define SET_SREGF( _data_ ) (decode.src_is_local ? set_local_register(decode.src + 1, (uint32_t)_data_) : set_global_register(decode.src + 1, (uint32_t)_data_)) -#define SET_DREG( _data_ ) (decode.dst_is_local ? set_local_register(decode.dst, (uint32_t)_data_) : set_global_register(decode.dst, (uint32_t)_data_)) -#define SET_DREGF( _data_ ) (decode.dst_is_local ? set_local_register(decode.dst + 1, (uint32_t)_data_) : set_global_register(decode.dst + 1, (uint32_t)_data_)) - -#define SRC_IS_PC (!decode.src_is_local && decode.src == PC_REGISTER) -#define DST_IS_PC (!decode.dst_is_local && decode.dst == PC_REGISTER) -#define SRC_IS_SR (!decode.src_is_local && decode.src == SR_REGISTER) -#define DST_IS_SR (!decode.dst_is_local && decode.dst == SR_REGISTER) -#define SAME_SRC_DST decode.same_src_dst -#define SAME_SRC_DSTF decode.same_src_dstf -#define SAME_SRCF_DST decode.same_srcf_dst - - #define OP m_op #define PC m_global_regs[0] //Program Counter #define SR m_global_regs[1] //Status Register @@ -175,6 +154,9 @@ #define T_MASK 0x00010000 #define P_MASK 0x00020000 #define S_MASK 0x00040000 +#define ILC_MASK 0x00180000 + +#define S_SHIFT 18 /* SR flags */ #define GET_C ( SR & C_MASK) // bit 0 //CARRY @@ -220,17 +202,11 @@ #define SET_LOW_SR(val) (SR = (SR & 0xffff0000) | ((val) & 0x0000ffff)) // when SR is addressed, only low 16 bits can be changed -#define CHECK_C(x) (SR = (SR & ~0x00000001) | (uint32_t)((x & 0x100000000L) >> 32)) -#define CHECK_VADD(x,y,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & 0x80000000) >> 29)) -#define CHECK_VADD3(x,y,w,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & ((w) ^ (z)) & 0x80000000) >> 29)) -#define CHECK_VSUB(x,y,z) (SR = (SR & ~0x00000008) | (((z ^ y) & (y ^ x) & 0x80000000) >> 29)) - - /* FER flags */ #define GET_ACCRUED (FER & 0x0000001f) //bits 4 - 0 //Floating-Point Accrued Exceptions #define GET_ACTUAL (FER & 0x00001f00) //bits 12 - 8 //Floating-Point Actual Exceptions //other bits are reversed, in particular 7 - 5 for the operating system. -//the user program can only changes the above 2 flags +//the user program can only change the above 2 flags #endif // MAME_CPU_E132XS_XS32DEFS_H diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp index 73725ec8a25..d22d84aead2 100644 --- a/src/devices/cpu/e132xs/e132xs.cpp +++ b/src/devices/cpu/e132xs/e132xs.cpp @@ -33,6 +33,7 @@ TODO: - some wrong cycle counts - verify register wrapping with sregf/dregf on hardware + CHANGELOG: Pierpaolo Prazzoli @@ -143,15 +144,18 @@ #include "emu.h" #include "e132xs.h" +#include "e132xsfe.h" #include "debugger.h" #include "32xsdefs.h" -#include "32xsdasm.h" //#define VERBOSE 1 #include "logmacro.h" +/* size of the execution code cache */ +#define CACHE_SIZE (32 * 1024 * 1024) + //************************************************************************** // INTERNAL ADDRESS MAP //************************************************************************** @@ -195,10 +199,31 @@ ADDRESS_MAP_END hyperstone_device::hyperstone_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, uint32_t prg_data_width, uint32_t io_data_width, address_map_constructor internal_map) - : cpu_device(mconfig, type, tag, owner, clock), - m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32, 0, internal_map), - m_io_config("io", ENDIANNESS_BIG, io_data_width, 15), - m_icount(0) + : cpu_device(mconfig, type, tag, owner, clock) + , m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32, 0, internal_map) + , m_io_config("io", ENDIANNESS_BIG, io_data_width, 15) + , m_icount(0) + , m_cache(CACHE_SIZE + sizeof(hyperstone_device)) + , m_drcuml(nullptr) + , m_drcfe(nullptr) + , m_drcoptions(0) + , m_cache_dirty(0) + , m_entry(nullptr) + , m_nocode(nullptr) + , m_out_of_cycles(nullptr) + , m_drc_arg0(0) + , m_drc_arg1(0) + , m_drc_arg2(0) + , m_drc_arg3(0) + , m_mem_read8(nullptr) + , m_mem_write8(nullptr) + , m_mem_read16(nullptr) + , m_mem_write16(nullptr) + , m_mem_read32(nullptr) + , m_mem_write32(nullptr) + , m_io_read32(nullptr) + , m_io_write32(nullptr) + , m_enable_drc(false) { } @@ -374,46 +399,26 @@ uint32_t hyperstone_device::get_emu_code_addr(uint8_t num) /* num is OP */ return addr; } -void hyperstone_device::hyperstone_set_trap_entry(int which) -{ - switch( which ) - { - case E132XS_ENTRY_MEM0: - m_trap_entry = 0x00000000; - break; - - case E132XS_ENTRY_MEM1: - m_trap_entry = 0x40000000; - break; - - case E132XS_ENTRY_MEM2: - m_trap_entry = 0x80000000; - break; - - case E132XS_ENTRY_MEM3: - m_trap_entry = 0xffffff00; - break; - - case E132XS_ENTRY_IRAM: - m_trap_entry = 0xc0000000; - break; - - default: - LOG("Set entry point to a reserved value: %d\n", which); - break; - } -} +/*static*/ const uint32_t hyperstone_device::s_trap_entries[8] = { + 0x00000000, // MEM0 + 0x40000000, // MEM1 + 0x80000000, // MEM2 + 0xc0000000, // IRAM + 0, + 0, + 0, + 0xffffff00, // MEM3 +}; -uint32_t hyperstone_device::compute_tr() +void hyperstone_device::compute_tr() { uint64_t cycles_since_base = total_cycles() - m_tr_base_cycles; uint64_t clocks_since_base = cycles_since_base >> m_clck_scale; - return m_tr_base_value + (clocks_since_base / m_tr_clocks_per_tick); + m_tr_result = m_tr_base_value + (clocks_since_base / m_tr_clocks_per_tick); } void hyperstone_device::update_timer_prescale() { - uint32_t prevtr = compute_tr(); TPR &= ~0x80000000; m_clck_scale = (TPR >> 26) & m_clock_scale_mask; m_clock_cycles_1 = 1 << m_clck_scale; @@ -422,7 +427,7 @@ void hyperstone_device::update_timer_prescale() m_clock_cycles_4 = 4 << m_clck_scale; m_clock_cycles_6 = 6 << m_clck_scale; m_tr_clocks_per_tick = ((TPR >> 16) & 0xff) + 2; - m_tr_base_value = prevtr; + m_tr_base_value = m_tr_result; m_tr_base_cycles = total_cycles(); } @@ -472,10 +477,13 @@ TIMER_CALLBACK_MEMBER( hyperstone_device::timer_callback ) /* update the values if necessary */ if (update) + { update_timer_prescale(); + } /* see if the timer is right for firing */ - if (!((compute_tr() - TCR) & 0x80000000)) + compute_tr(); + if (!((m_tr_result - TCR) & 0x80000000)) m_timer_int_pending = 1; /* adjust ourselves for the next time */ @@ -525,7 +533,8 @@ uint32_t hyperstone_device::get_global_register(uint8_t code) /* it is common to poll this in a loop */ if (m_icount > m_tr_clocks_per_tick / 2) m_icount -= m_tr_clocks_per_tick / 2; - return compute_tr(); + compute_tr(); + return m_tr_result; } return m_global_regs[code & 0x1f]; } @@ -579,7 +588,10 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val) case TPR_REGISTER: m_global_regs[code] = val; if (!(val & 0x80000000)) /* change immediately */ + { + compute_tr(); update_timer_prescale(); + } adjust_timer_interrupt(); return; case TCR_REGISTER: @@ -610,10 +622,14 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val) m_intblock = 1; return; case MCR_REGISTER: + { // bits 14..12 EntryTableMap - hyperstone_set_trap_entry((val & 0x7000) >> 12); + const int which = (val & 0x7000) >> 12; + assert(which < 4 || which == 7); + m_trap_entry = s_trap_entries[which]; m_global_regs[code] = val; return; + } case 28: case 29: case 30: @@ -634,10 +650,8 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val) #define SIGN_BIT(val) ((val & 0x80000000) >> 31) #define SIGN_TO_N(val) ((val & 0x80000000) >> 29) -static constexpr int32_t immediate_values[32] = +/*static*/ const int32_t hyperstone_device::s_immediate_values[16] = { - 0, 1, 2, 3, 4, 5, 6, 7, - 8, 9, 10, 11, 12, 13, 14, 15, 16, 0, 0, 0, 32, 64, 128, int32_t(0x80000000), -8, -7, -6, -5, -4, -3, -2, -1 }; @@ -651,7 +665,7 @@ do if (m_delay_slot) \ { \ PC = m_delay_pc; \ - m_delay_slot = false; \ + m_delay_slot = 0; \ } \ } while (0) @@ -670,8 +684,7 @@ uint32_t hyperstone_device::decode_immediate_s() switch (nybble) { case 0: - default: - return immediate_values[0x10 + nybble]; + return 16; case 1: { m_instruction_length = (3<<19); @@ -693,6 +706,8 @@ uint32_t hyperstone_device::decode_immediate_s() PC += 2; return extra_u; } + default: + return s_immediate_values[nybble]; } } @@ -764,7 +779,7 @@ void hyperstone_device::ignore_pcrel() } } -void hyperstone_device::execute_br() +void hyperstone_device::hyperstone_br() { const int32_t offset = decode_pcrel(); check_delay_PC(); @@ -777,24 +792,18 @@ void hyperstone_device::execute_br() void hyperstone_device::execute_trap(uint32_t addr) { - uint8_t reg; - uint32_t oldSR; - reg = GET_FP + GET_FL; - + const uint8_t reg = GET_FP + GET_FL; SET_ILC(m_instruction_length); - - oldSR = SR; + const uint32_t oldSR = SR; SET_FL(6); SET_FP(reg); - set_local_register(0, (PC & 0xfffffffe) | GET_S); - set_local_register(1, oldSR); + m_local_regs[(0 + reg) & 0x3f] = (PC & ~1) | GET_S; + m_local_regs[(1 + reg) & 0x3f] = oldSR; - SET_M(0); - SET_T(0); - SET_L(1); - SET_S(1); + SR &= ~(M_MASK | T_MASK); + SR |= (L_MASK | S_MASK); PC = addr; @@ -829,8 +838,8 @@ void hyperstone_device::execute_exception(uint32_t addr) SET_ILC(m_instruction_length); const uint32_t oldSR = SR; - SET_FP(reg); SET_FL(2); + SET_FP(reg); m_local_regs[(0 + reg) & 0x3f] = (PC & ~1) | GET_S; m_local_regs[(1 + reg) & 0x3f] = oldSR; @@ -1008,6 +1017,12 @@ void hyperstone_device::device_start() void hyperstone_device::init(int scale_mask) { +#if ENABLE_E132XS_DRC + m_enable_drc = allow_drc(); +#else + m_enable_drc = false; +#endif + memset(m_global_regs, 0, sizeof(uint32_t) * 32); memset(m_local_regs, 0, sizeof(uint32_t) * 64); m_op = 0; @@ -1021,6 +1036,7 @@ void hyperstone_device::init(int scale_mask) m_tr_base_cycles = 0; m_tr_base_value = 0; + m_tr_result = 0; m_tr_clocks_per_tick = 0; m_timer_int_pending = 0; @@ -1041,6 +1057,38 @@ void hyperstone_device::init(int scale_mask) m_fl_lut[i] = (i ? i : 16); } + uint32_t umlflags = 0; + m_drcuml = std::make_unique<drcuml_state>(*this, m_cache, umlflags, 1, 32, 1); + + // add UML symbols- + m_drcuml->symbol_add(&m_global_regs[0], sizeof(uint32_t), "pc"); + m_drcuml->symbol_add(&m_global_regs[1], sizeof(uint32_t), "sr"); + m_drcuml->symbol_add(&m_icount, sizeof(m_icount), "icount"); + + char buf[4]; + for (int i=0; i < 32; i++) + { + sprintf(buf, "g%d", i); + m_drcuml->symbol_add(&m_global_regs[i], sizeof(uint32_t), buf); + } + + for (int i=0; i < 64; i++) + { + sprintf(buf, "l%d", i); + m_drcuml->symbol_add(&m_local_regs[i], sizeof(uint32_t), buf); + } + + m_drcuml->symbol_add(&m_drc_arg0, sizeof(uint32_t), "arg0"); + m_drcuml->symbol_add(&m_drc_arg1, sizeof(uint32_t), "arg1"); + m_drcuml->symbol_add(&m_drc_arg2, sizeof(uint32_t), "arg2"); + m_drcuml->symbol_add(&m_drc_arg3, sizeof(uint32_t), "arg3"); + + /* initialize the front-end helper */ + m_drcfe = std::make_unique<e132xs_frontend>(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE); + + /* mark the cache dirty so it is updated on next execute */ + m_cache_dirty = true; + // register our state for the debugger state_add(STATE_GENPC, "GENPC", m_global_regs[0]).noshow(); state_add(STATE_GENPCBASE, "CURPC", m_global_regs[0]).noshow(); @@ -1274,7 +1322,7 @@ void hyperstone_device::device_reset() m_tr_clocks_per_tick = 2; - hyperstone_set_trap_entry(E132XS_ENTRY_MEM3); /* default entry point @ MEM3 */ + m_trap_entry = s_trap_entries[E132XS_ENTRY_MEM3]; // default entry point @ MEM3 set_global_register(BCR_REGISTER, ~0); set_global_register(MCR_REGISTER, ~0); @@ -1299,6 +1347,14 @@ void hyperstone_device::device_reset() void hyperstone_device::device_stop() { + if (m_drcfe != nullptr) + { + m_drcfe = nullptr; + } + if (m_drcuml != nullptr) + { + m_drcuml = nullptr; + } } @@ -1356,7 +1412,17 @@ void hyperstone_device::state_string_export(const device_state_entry &entry, std util::disasm_interface *hyperstone_device::create_disassembler() { - return new hyperstone_disassembler; + return new hyperstone_disassembler(this); +} + +u8 hyperstone_device::get_fp() const +{ + return GET_FP; +} + +bool hyperstone_device::get_h() const +{ + return GET_H; } /* Opcodes */ @@ -1499,6 +1565,12 @@ void hyperstone_device::hyperstone_do() void hyperstone_device::execute_run() { + if (m_enable_drc) + { + execute_run_drc(); + return; + } + if (m_intblock < 0) m_intblock = 0; @@ -1515,7 +1587,7 @@ void hyperstone_device::execute_run() m_instruction_length = (1<<19); - switch ((OP >> 8) & 0x00ff) + switch (m_op >> 8) { case 0x00: hyperstone_chk<GLOBAL, GLOBAL>(); break; case 0x01: hyperstone_chk<GLOBAL, LOCAL>(); break; @@ -1729,8 +1801,8 @@ void hyperstone_device::execute_run() case 0xd1: hyperstone_ldwr<LOCAL>(); break; case 0xd2: hyperstone_lddr<GLOBAL>(); break; case 0xd3: hyperstone_lddr<LOCAL>(); break; - case 0xd4: hypesrtone_ldwp<GLOBAL>(); break; - case 0xd5: hypesrtone_ldwp<LOCAL>(); break; + case 0xd4: hyperstone_ldwp<GLOBAL>(); break; + case 0xd5: hyperstone_ldwp<LOCAL>(); break; case 0xd6: hyperstone_lddp<GLOBAL>(); break; case 0xd7: hyperstone_lddp<LOCAL>(); break; case 0xd8: hyperstone_stwr<GLOBAL>(); break; @@ -1741,35 +1813,35 @@ void hyperstone_device::execute_run() case 0xdd: hyperstone_stwp<LOCAL>(); break; case 0xde: hyperstone_stdp<GLOBAL>(); break; case 0xdf: hyperstone_stdp<LOCAL>(); break; - case 0xe0: hyperstone_dbv(); break; - case 0xe1: hyperstone_dbnv(); break; - case 0xe2: hyperstone_dbe(); break; - case 0xe3: hyperstone_dbne(); break; - case 0xe4: hyperstone_dbc(); break; - case 0xe5: hyperstone_dbnc(); break; - case 0xe6: hyperstone_dbse(); break; - case 0xe7: hyperstone_dbht(); break; - case 0xe8: hyperstone_dbn(); break; - case 0xe9: hyperstone_dbnn(); break; - case 0xea: hyperstone_dble(); break; - case 0xeb: hyperstone_dbgt(); break; + case 0xe0: hyperstone_db<COND_V, IS_SET>(); break; + case 0xe1: hyperstone_db<COND_V, IS_CLEAR>(); break; + case 0xe2: hyperstone_db<COND_Z, IS_SET>(); break; + case 0xe3: hyperstone_db<COND_Z, IS_CLEAR>(); break; + case 0xe4: hyperstone_db<COND_C, IS_SET>(); break; + case 0xe5: hyperstone_db<COND_C, IS_CLEAR>(); break; + case 0xe6: hyperstone_db<COND_CZ, IS_SET>(); break; + case 0xe7: hyperstone_db<COND_CZ, IS_CLEAR>(); break; + case 0xe8: hyperstone_db<COND_N, IS_SET>(); break; + case 0xe9: hyperstone_db<COND_N, IS_CLEAR>(); break; + case 0xea: hyperstone_db<COND_NZ, IS_SET>(); break; + case 0xeb: hyperstone_db<COND_NZ, IS_CLEAR>(); break; case 0xec: hyperstone_dbr(); break; case 0xed: hyperstone_frame(); break; - case 0xee: hyperstone_call_global(); break; - case 0xef: hyperstone_call_local(); break; - case 0xf0: hyperstone_bv(); break; - case 0xf1: hyperstone_bnv(); break; - case 0xf2: hyperstone_be(); break; - case 0xf3: hyperstone_bne(); break; - case 0xf4: hyperstone_bc(); break; - case 0xf5: hyperstone_bnc(); break; - case 0xf6: hyperstone_bse(); break; - case 0xf7: hyperstone_bht(); break; - case 0xf8: hyperstone_bn(); break; - case 0xf9: hyperstone_bnn(); break; - case 0xfa: hyperstone_ble(); break; - case 0xfb: hyperstone_bgt(); break; - case 0xfc: execute_br(); break; + case 0xee: hyperstone_call<GLOBAL>(); break; + case 0xef: hyperstone_call<LOCAL>(); break; + case 0xf0: hyperstone_b<COND_V, IS_SET>(); break; + case 0xf1: hyperstone_b<COND_V, IS_CLEAR>(); break; + case 0xf2: hyperstone_b<COND_Z, IS_SET>(); break; + case 0xf3: hyperstone_b<COND_Z, IS_CLEAR>(); break; + case 0xf4: hyperstone_b<COND_C, IS_SET>(); break; + case 0xf5: hyperstone_b<COND_C, IS_CLEAR>(); break; + case 0xf6: hyperstone_b<COND_CZ, IS_SET>(); break; + case 0xf7: hyperstone_b<COND_CZ, IS_CLEAR>(); break; + case 0xf8: hyperstone_b<COND_N, IS_SET>(); break; + case 0xf9: hyperstone_b<COND_N, IS_CLEAR>(); break; + case 0xfa: hyperstone_b<COND_NZ, IS_SET>(); break; + case 0xfb: hyperstone_b<COND_NZ, IS_CLEAR>(); break; + case 0xfc: hyperstone_br(); break; case 0xfd: hyperstone_trap(); break; case 0xfe: hyperstone_trap(); break; case 0xff: hyperstone_trap(); break; diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index 81575c4f0cf..acfeea49159 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -5,6 +5,10 @@ #pragma once +#include "cpu/drcfe.h" +#include "cpu/drcuml.h" +#include "cpu/drcumlsh.h" +#include "32xsdasm.h" /* A note about clock multipliers and dividers: @@ -22,17 +26,53 @@ -/* Functions */ +/*************************************************************************** + CONSTANTS +***************************************************************************/ + +/* map variables */ +#define MAPVAR_PC M0 +#define MAPVAR_CYCLES M1 + +/* compilation boundaries -- how far back/forward does the analysis extend? */ +#define COMPILE_BACKWARDS_BYTES 128 +#define COMPILE_FORWARDS_BYTES 512 +#define COMPILE_MAX_INSTRUCTIONS ((COMPILE_BACKWARDS_BYTES/4) + (COMPILE_FORWARDS_BYTES/4)) +#define COMPILE_MAX_SEQUENCE 64 + +/* exit codes */ +#define EXECUTE_OUT_OF_CYCLES 0 +#define EXECUTE_MISSING_CODE 1 +#define EXECUTE_UNMAPPED_CODE 2 +#define EXECUTE_RESET_CACHE 3 + +#define E132XS_STRICT_VERIFY 0x0001 /* verify all instructions */ + +#define SINGLE_INSTRUCTION_MODE (1) + +#define ENABLE_E132XS_DRC (0) //************************************************************************** // TYPE DEFINITIONS //************************************************************************** +class e132xs_frontend; + // ======================> hyperstone_device // Used by core CPU interface -class hyperstone_device : public cpu_device +class hyperstone_device : public cpu_device, public hyperstone_disassembler::config { + friend class e132xs_frontend; + +public: + inline void ccfunc_unimplemented(); + inline void ccfunc_print(); + inline void ccfunc_total_cycles(); + void update_timer_prescale(); + void compute_tr(); + void adjust_timer_interrupt(); + protected: enum { @@ -114,6 +154,45 @@ protected: IS_SIGNED = 1 }; + enum branch_condition + { + COND_V = 0, + COND_Z = 1, + COND_C = 2, + COND_CZ = 3, + COND_N = 4, + COND_NZ = 5 + }; + + enum condition_set + { + IS_CLEAR = 0, + IS_SET = 1 + }; + + enum + { + EXCEPTION_IO2 = 48, + EXCEPTION_IO1 = 49, + EXCEPTION_INT4 = 50, + EXCEPTION_INT3 = 51, + EXCEPTION_INT2 = 52, + EXCEPTION_INT1 = 53, + EXCEPTION_IO3 = 54, + EXCEPTION_TIMER = 55, + EXCEPTION_RESERVED1 = 56, + EXCEPTION_TRACE = 57, + EXCEPTION_PARITY_ERROR = 58, + EXCEPTION_EXTENDED_OVERFLOW = 59, + EXCEPTION_RANGE_ERROR = 60, + EXCEPTION_PRIVILEGE_ERROR = EXCEPTION_RANGE_ERROR, + EXCEPTION_FRAME_ERROR = EXCEPTION_RANGE_ERROR, + EXCEPTION_RESERVED2 = 61, + EXCEPTION_RESET = 62, // reserved if not mapped @ MEM3 + EXCEPTION_ERROR_ENTRY = 63, // for instruction code of all ones + EXCEPTION_COUNT + }; + // construction/destruction hyperstone_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, uint32_t prg_data_width, uint32_t io_data_width, address_map_constructor internal_map); @@ -137,6 +216,8 @@ protected: // device_disasm_interface overrides virtual util::disasm_interface *create_disassembler() override; + virtual u8 get_fp() const override; + virtual bool get_h() const override; // device_state_interface overrides virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; @@ -166,12 +247,15 @@ protected: uint64_t m_tr_base_cycles; uint32_t m_tr_base_value; + uint32_t m_tr_result; uint32_t m_tr_clocks_per_tick; uint8_t m_timer_int_pending; emu_timer *m_timer; + uint64_t m_numcycles; + uint32_t m_delay_pc; - bool m_delay_slot; + uint32_t m_delay_slot; uint32_t m_opcodexor; @@ -182,6 +266,10 @@ protected: int m_icount; uint8_t m_fl_lut[16]; + static const uint32_t s_trap_entries[8]; + static const int32_t s_immediate_values[16]; + + uint32_t get_trap_addr(uint8_t trapno); private: // internal functions @@ -192,25 +280,22 @@ private: uint32_t get_global_register(uint8_t code); - uint32_t get_trap_addr(uint8_t trapno); uint32_t get_emu_code_addr(uint8_t num); - void hyperstone_set_trap_entry(int which); - uint32_t compute_tr(); - void update_timer_prescale(); - void adjust_timer_interrupt(); TIMER_CALLBACK_MEMBER(timer_callback); - void execute_br(); + uint32_t decode_const(); + uint32_t decode_immediate_s(); + void ignore_immediate_s(); + int32_t decode_pcrel(); + void ignore_pcrel(); + + void hyperstone_br(); void execute_trap(uint32_t addr); void execute_int(uint32_t addr); void execute_exception(uint32_t addr); void execute_software(); - void ignore_immediate_s(); - uint32_t decode_immediate_s(); - uint32_t decode_const(); - template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_chk(); template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_movd(); template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void hyperstone_divsu(); @@ -268,7 +353,7 @@ private: template <reg_bank SRC_GLOBAL> void hyperstone_ldwr(); template <reg_bank SRC_GLOBAL> void hyperstone_lddr(); - template <reg_bank SRC_GLOBAL> void hypesrtone_ldwp(); + template <reg_bank SRC_GLOBAL> void hyperstone_ldwp(); template <reg_bank SRC_GLOBAL> void hyperstone_lddp(); template <reg_bank SRC_GLOBAL> void hyperstone_stwr(); @@ -276,36 +361,12 @@ private: template <reg_bank SRC_GLOBAL> void hyperstone_stwp(); template <reg_bank SRC_GLOBAL> void hyperstone_stdp(); - void hyperstone_dbv(); - void hyperstone_dbnv(); - void hyperstone_dbe(); - void hyperstone_dbne(); - void hyperstone_dbc(); - void hyperstone_dbnc(); - void hyperstone_dbse(); - void hyperstone_dbht(); - void hyperstone_dbn(); - void hyperstone_dbnn(); - void hyperstone_dble(); - void hyperstone_dbgt(); + template <branch_condition CONDITION, condition_set COND_SET> void hyperstone_b(); + template <branch_condition CONDITION, condition_set COND_SET> void hyperstone_db(); void hyperstone_dbr(); void hyperstone_frame(); - void hyperstone_call_global(); - void hyperstone_call_local(); - - void hyperstone_bv(); - void hyperstone_bnv(); - void hyperstone_be(); - void hyperstone_bne(); - void hyperstone_bc(); - void hyperstone_bnc(); - void hyperstone_bse(); - void hyperstone_bht(); - void hyperstone_bn(); - void hyperstone_bnn(); - void hyperstone_ble(); - void hyperstone_bgt(); + template <hyperstone_device::reg_bank SRC_GLOBAL> void hyperstone_call(); void hyperstone_trap(); void hyperstone_extend(); @@ -313,155 +374,155 @@ private: void hyperstone_reserved(); void hyperstone_do(); - int32_t decode_pcrel(); - void ignore_pcrel(); + drc_cache m_cache; + std::unique_ptr<drcuml_state> m_drcuml; + std::unique_ptr<e132xs_frontend> m_drcfe; + uint32_t m_drcoptions; + uint8_t m_cache_dirty; + + uml::parameter m_regmap[16]; + + uml::code_handle *m_entry; + uml::code_handle *m_nocode; + uml::code_handle *m_out_of_cycles; + + uint32_t m_drc_arg0; + uint32_t m_drc_arg1; + uint32_t m_drc_arg2; + uint32_t m_drc_arg3; + uint32_t m_branch_dest; + + uml::code_handle *m_mem_read8; + uml::code_handle *m_mem_write8; + uml::code_handle *m_mem_read16; + uml::code_handle *m_mem_write16; + uml::code_handle *m_mem_read32; + uml::code_handle *m_mem_write32; + uml::code_handle *m_io_read32; + uml::code_handle *m_io_write32; + uml::code_handle *m_exception[EXCEPTION_COUNT]; + + bool m_enable_drc; + + /* internal compiler state */ + struct compiler_state + { + uint32_t m_cycles; /* accumulated cycles */ + uint8_t m_checkints; /* need to check interrupts before next instruction */ + uml::code_label m_labelnum; /* index for local labels */ + }; -#if 0 void execute_run_drc(); void flush_drc_cache(); void code_flush_cache(); void code_compile_block(offs_t pc); - inline void ccfunc_unimplemented(); + //void load_fast_iregs(drcuml_block *block); + //void save_fast_iregs(drcuml_block *block); void static_generate_entry_point(); void static_generate_nocode_handler(); void static_generate_out_of_cycles(); - void static_generate_memory_accessor(int size, int iswrite, const char *name, code_handle *&handleptr); - void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception); + void static_generate_exception(uint32_t exception, const char *name); + void static_generate_memory_accessor(int size, int iswrite, bool isio, const char *name, uml::code_handle *&handleptr); + void generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param); void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast); void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op); bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); -#endif - -#if 0 - void generate_op00(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op01(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op02(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op03(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op04(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op05(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op06(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op07(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op08(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op09(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op0a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op0c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op0e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op10(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op11(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op14(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op15(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op16(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op17(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op18(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op19(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op1a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op1c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op1e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op20(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op21(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op22(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op23(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op24(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op25(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op26(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op27(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op28(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op29(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op2a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op2c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op2e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op30(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op31(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op32(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op33(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op34(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op35(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op36(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op37(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op38(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op39(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op3a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op3c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op3e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op40(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op41(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op42(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op43(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op44(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op45(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op46(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op47(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op48(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op49(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op4a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op4c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op4e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op50(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op51(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op52(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op53(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op54(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op55(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op56(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op57(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op58(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op59(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op5a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op5c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op5e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op60(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op61(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op62(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op63(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op65(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op66(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op67(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op68(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op69(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op6a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op6c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op6e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op70(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op71(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op72(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op73(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op74(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op75(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op76(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op77(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op78(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op79(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op7a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op7c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op7e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op80(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op81(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op82(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op83(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op84(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op85(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op86(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op87(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op88(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op89(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op8a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op8c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op8e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op90(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op91(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op92(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op93(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op94(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op95(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op96(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op97(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op98(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op99(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op9a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op9c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op9e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opaa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opab(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opac(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opad(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opae(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opaf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opba(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opbc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opbe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opca(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opcc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opce(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opda(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opdc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opde(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opea(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opeb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opec(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_oped(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opee(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opef(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opfa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opfc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opfe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opff(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); -#endif + + void generate_get_trap_addr(drcuml_block *block, uml::code_label &label, uint32_t trapno); + void generate_check_delay_pc(drcuml_block *block); + void generate_decode_const(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_decode_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_ignore_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_decode_pcrel(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_ignore_pcrel(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + void generate_set_global_register(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + void generate_trap(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr); + void generate_int(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr); + void generate_exception(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr); + void generate_software(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_chk(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_movd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void generate_divsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_xm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_mask(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_sum(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_sums(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_cmp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_mov(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_add(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_adds(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_cmpb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_subc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_sub(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_subs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_addc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_neg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_negs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_and(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_andn(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_or(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_xor(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_not(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_cmpi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_movi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_addi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_addsi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_cmpbi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_andni(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_ori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_xori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <shift_type HI_N> void generate_shrdi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_shrd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_shr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_shri(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <shift_type HI_N> void generate_sardi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_sard(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_sar(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_sari(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <shift_type HI_N> void generate_shldi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_shld(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_shl(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_shli(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_testlz(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_rol(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_ldxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_ldxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_stxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_stxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void generate_mulsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_mul(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_set(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + template <reg_bank SRC_GLOBAL> void generate_ldwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank SRC_GLOBAL> void generate_lddr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank SRC_GLOBAL> void generate_ldwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank SRC_GLOBAL> void generate_lddp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + template <reg_bank SRC_GLOBAL> void generate_stwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank SRC_GLOBAL> void generate_stdr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank SRC_GLOBAL> void generate_stwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <reg_bank SRC_GLOBAL> void generate_stdp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + template <branch_condition CONDITION, condition_set COND_SET> void generate_b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_br(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <branch_condition CONDITION, condition_set COND_SET> void generate_db(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_dbr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + void generate_frame(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template <hyperstone_device::reg_bank SRC_GLOBAL> void generate_call(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + void generate_trap_op(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_extend(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + void generate_reserved(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_do(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); }; // device type definition @@ -662,4 +723,5 @@ protected: virtual void device_start() override; }; + #endif // MAME_CPU_E132XS_E132XS_H diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp new file mode 100644 index 00000000000..d6c2bed25b1 --- /dev/null +++ b/src/devices/cpu/e132xs/e132xsdrc.cpp @@ -0,0 +1,973 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz + +#include "e132xs.h" +#include "e132xsfe.h" +#include "32xsdefs.h" + +using namespace uml; + +#define DRC_PC mem(m_global_regs) +#define DRC_SR mem(&m_global_regs[1]) + +void hyperstone_device::execute_run_drc() +{ + drcuml_state *drcuml = m_drcuml.get(); + int execute_result; + + /* reset the cache if dirty */ + if (m_cache_dirty) + { + code_flush_cache(); + m_cache_dirty = false; + } + + + /* execute */ + do + { + /* run as much as we can */ + execute_result = drcuml->execute(*m_entry); + + /* if we need to recompile, do it */ + if (execute_result == EXECUTE_MISSING_CODE) + { + code_compile_block(m_global_regs[0]); + } + else if (execute_result == EXECUTE_UNMAPPED_CODE) + { + fatalerror("Attempted to execute unmapped code at PC=%08X\n", m_global_regs[0]); + } + else if (execute_result == EXECUTE_RESET_CACHE) + { + code_flush_cache(); + } + } while (execute_result != EXECUTE_OUT_OF_CYCLES); +} + + +/*************************************************************************** + C FUNCTION CALLBACKS +***************************************************************************/ + +/*------------------------------------------------- + cfunc_unimplemented - handler for + unimplemented opcdes +-------------------------------------------------*/ + +inline void hyperstone_device::ccfunc_unimplemented() +{ + fatalerror("PC=%08X: Unimplemented op %08X\n", PC, m_drc_arg0); +} + +inline void hyperstone_device::ccfunc_print() +{ + printf("%c: %08X\n", (char)m_drc_arg0, m_drc_arg1); +} + +static void cfunc_unimplemented(void *param) +{ + ((hyperstone_device *)param)->ccfunc_unimplemented(); +} + +static void cfunc_adjust_timer_interrupt(void *param) +{ + ((hyperstone_device *)param)->adjust_timer_interrupt(); +} + +static void cfunc_compute_tr(void *param) +{ + ((hyperstone_device *)param)->compute_tr(); +} + +static void cfunc_update_timer_prescale(void *param) +{ + ((hyperstone_device *)param)->update_timer_prescale(); +} + +/* +static void cfunc_print(void *param) +{ + ((hyperstone_device *)param)->ccfunc_print(); +} +*/ + +/*------------------------------------------------- + ccfunc_total_cycles - compute the total number + of cycles executed so far +-------------------------------------------------*/ + +void hyperstone_device::ccfunc_total_cycles() +{ + m_numcycles = total_cycles(); +} + +static void cfunc_total_cycles(void *param) +{ + ((hyperstone_device *)param)->ccfunc_total_cycles(); +} + +/*************************************************************************** + CACHE MANAGEMENT +***************************************************************************/ + +/*------------------------------------------------- + flush_drc_cache - outward-facing accessor to + code_flush_cache +-------------------------------------------------*/ + +void hyperstone_device::flush_drc_cache() +{ + if (!m_enable_drc) + return; + m_cache_dirty = true; +} + +/*------------------------------------------------- + code_flush_cache - flush the cache and + regenerate static code +-------------------------------------------------*/ + +void hyperstone_device::code_flush_cache() +{ + /* empty the transient cache contents */ + m_drcuml->reset(); + + try + { + /* generate the entry point and out-of-cycles handlers */ + static_generate_entry_point(); + static_generate_nocode_handler(); + static_generate_out_of_cycles(); + + static_generate_exception(EXCEPTION_IO2, "io2"); + static_generate_exception(EXCEPTION_IO1, "io1"); + static_generate_exception(EXCEPTION_INT4, "int4"); + static_generate_exception(EXCEPTION_INT3, "int3"); + static_generate_exception(EXCEPTION_INT2, "int2"); + static_generate_exception(EXCEPTION_INT1, "int1"); + static_generate_exception(EXCEPTION_IO3, "io3"); + static_generate_exception(EXCEPTION_TIMER, "timer"); + static_generate_exception(EXCEPTION_RESERVED1, "reserved1"); + static_generate_exception(EXCEPTION_TRACE, "trace"); + static_generate_exception(EXCEPTION_PARITY_ERROR, "parity_error"); + static_generate_exception(EXCEPTION_EXTENDED_OVERFLOW, "extended_overflow"); + static_generate_exception(EXCEPTION_RANGE_ERROR, "range_error"); + static_generate_exception(EXCEPTION_RESERVED2, "reserved2"); + static_generate_exception(EXCEPTION_RESET, "reset"); + static_generate_exception(EXCEPTION_ERROR_ENTRY, "error_entry"); + + /* add subroutines for memory accesses */ + static_generate_memory_accessor(1, false, false, "read8", m_mem_read8); + static_generate_memory_accessor(1, true, false, "write8", m_mem_write8); + static_generate_memory_accessor(2, false, false, "read16", m_mem_read16); + static_generate_memory_accessor(2, true, false, "write16", m_mem_write16); + static_generate_memory_accessor(4, false, false, "read32", m_mem_read32); + static_generate_memory_accessor(4, true, false, "write32", m_mem_write32); + static_generate_memory_accessor(4, false, true, "ioread32", m_io_read32); + static_generate_memory_accessor(4, true, true, "iowrite32", m_io_write32); + } + + catch (drcuml_block::abort_compilation &) + { + fatalerror("Unable to generate static E132XS code\n"); fflush(stdout); + } +} + +/* Return the entry point for a determinated trap */ +void hyperstone_device::generate_get_trap_addr(drcuml_block *block, uml::code_label &label, uint32_t trapno) +{ + int no_mem3; + UML_MOV(block, I0, trapno); + UML_CMP(block, mem(&m_trap_entry), 0xffffff00); + UML_JMPc(block, uml::COND_NE, no_mem3 = label++); + UML_SUB(block, I0, 63, I0); + + UML_LABEL(block, no_mem3); + UML_SHL(block, I0, I0, 2); + UML_OR(block, I0, I0, mem(&m_trap_entry)); +} + +/*------------------------------------------------- + code_compile_block - compile a block of the + given mode at the specified pc +-------------------------------------------------*/ + +void hyperstone_device::code_compile_block(offs_t pc) +{ + drcuml_state *drcuml = m_drcuml.get(); + compiler_state compiler = { 0 }; + const opcode_desc *seqhead, *seqlast; + const opcode_desc *desclist; + int override = false; + drcuml_block *block; + + g_profiler.start(PROFILER_DRC_COMPILE); + + /* get a description of this sequence */ + desclist = m_drcfe->describe_code(pc); + + bool succeeded = false; + while (!succeeded) + { + try + { + /* start the block */ + block = drcuml->begin_block(4096); + + /* loop until we get through all instruction sequences */ + for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next()) + { + const opcode_desc *curdesc; + uint32_t nextpc; + + /* add a code log entry */ + if (drcuml->logging()) + block->append_comment("-------------------------"); + + /* determine the last instruction in this sequence */ + for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next()) + if (seqlast->flags & OPFLAG_END_SEQUENCE) + break; + assert(seqlast != nullptr); + + /* if we don't have a hash for this mode/pc, or if we are overriding all, add one */ + if (override || !drcuml->hash_exists(0, seqhead->pc)) + UML_HASH(block, 0, seqhead->pc); + + /* if we already have a hash, and this is the first sequence, assume that we */ + /* are recompiling due to being out of sync and allow future overrides */ + else if (seqhead == desclist) + { + override = true; + UML_HASH(block, 0, seqhead->pc); + } + + /* otherwise, redispatch to that fixed PC and skip the rest of the processing */ + else + { + UML_LABEL(block, seqhead->pc | 0x80000000); + UML_HASHJMP(block, 0, seqhead->pc, *m_nocode); + continue; + } + + /* validate this code block if we're not pointing into ROM */ + if (m_program->get_write_ptr(seqhead->physpc) != nullptr) + generate_checksum_block(block, &compiler, seqhead, seqlast); + + /* label this instruction, if it may be jumped to locally */ + if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET) + UML_LABEL(block, seqhead->pc | 0x80000000); + + /* iterate over instructions in the sequence and compile them */ + for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next()) + { + generate_sequence_instruction(block, &compiler, curdesc); + } + + /* if we need to return to the start, do it */ + if (seqlast->flags & OPFLAG_RETURN_TO_START) + nextpc = pc; + + /* otherwise we just go to the next instruction */ + else + { + nextpc = seqlast->pc + seqlast->length; + } + + /* count off cycles and go there */ + generate_update_cycles(block, &compiler, nextpc); // <subtract cycles> + + /* if the last instruction can change modes, use a variable mode; otherwise, assume the same mode */ + if (seqlast->next() == nullptr || seqlast->next()->pc != nextpc) + { + UML_HASHJMP(block, 0, nextpc, *m_nocode); // hashjmp <mode>,nextpc,nocode + } + } + + /* end the sequence */ + block->end(); + g_profiler.stop(); + succeeded = true; + } + catch (drcuml_block::abort_compilation &) + { + code_flush_cache(); + } + } +} + +/*************************************************************************** + STATIC CODEGEN +***************************************************************************/ + +/*------------------------------------------------- + epc - compute the exception PC from a + descriptor +-------------------------------------------------*/ + +static inline uint32_t epc(const opcode_desc *desc) +{ + return (desc->flags & OPFLAG_IN_DELAY_SLOT) ? (desc->pc - 3) : desc->pc; +} + + +/*------------------------------------------------- + alloc_handle - allocate a handle if not + already allocated +-------------------------------------------------*/ + +static inline void alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const char *name) +{ + if (*handleptr == nullptr) + *handleptr = drcuml->handle_alloc(name); +} + + + +/*------------------------------------------------- + static_generate_exception - generate an + exception handler +-------------------------------------------------*/ + +void hyperstone_device::static_generate_exception(uint32_t exception, const char *name) +{ + code_handle *&exception_handle = m_exception[exception]; + drcuml_state *drcuml = m_drcuml.get(); + drcuml_block *block = drcuml->begin_block(1024); + + /* add a global entry for this */ + alloc_handle(drcuml, &exception_handle, name); + UML_HANDLE(block, *exception_handle); + + uml::code_label label = 1; + generate_get_trap_addr(block, label, exception); + UML_ROLAND(block, I1, DRC_SR, 7, 0x7f); + UML_ROLAND(block, I2, DRC_SR, 11, 0xf); + UML_TEST(block, I2, 0xf); + UML_MOVc(block, uml::COND_Z, I2, 16); + UML_ADD(block, I1, I1, I2); + + UML_AND(block, DRC_SR, DRC_SR, 0xffe7ffff); + UML_OR(block, DRC_SR, DRC_SR, mem(&m_instruction_length)); + + UML_MOV(block, I4, DRC_SR); + UML_ROLINS(block, DRC_SR, 2, 21, 0x01e00000); + UML_ROLINS(block, DRC_SR, I1, 25, 0xfe000000); + + UML_AND(block, I3, I1, 0x3f); + UML_AND(block, I1, DRC_PC, ~1); + UML_ROLAND(block, I2, DRC_SR, 14, 1); + UML_OR(block, I1, I1, I2); + UML_STORE(block, (void *)m_local_regs, I3, I1, SIZE_DWORD, SCALE_x4); + UML_ADD(block, I3, I3, 1); + UML_AND(block, I3, I3, 0x3f); + UML_STORE(block, (void *)m_local_regs, I3, I4, SIZE_DWORD, SCALE_x4); + + UML_AND(block, DRC_SR, DRC_SR, ~(M_MASK | T_MASK)); + UML_OR(block, DRC_SR, DRC_SR, (L_MASK | S_MASK)); + + UML_MOV(block, DRC_PC, I0); + UML_SUB(block, mem(&m_icount), mem(&m_icount), 2); + UML_EXHc(block, COND_S, *m_out_of_cycles, 0); + + UML_HASHJMP(block, 0, I0, *m_nocode);// hashjmp <mode>,i0,nocode + + block->end(); +} + + + +/*------------------------------------------------- + generate_entry_point - generate a + static entry point +-------------------------------------------------*/ + +void hyperstone_device::static_generate_entry_point() +{ + drcuml_state *drcuml = m_drcuml.get(); + drcuml_block *block; + + /* begin generating */ + block = drcuml->begin_block(20); + + /* forward references */ + alloc_handle(drcuml, &m_nocode, "nocode"); + + alloc_handle(drcuml, &m_entry, "entry"); + UML_HANDLE(block, *m_entry); + + /* load fast integer registers */ + //load_fast_iregs(block); + + /* generate a hash jump via the current mode and PC */ + UML_HASHJMP(block, 0, mem(&m_global_regs[0]), *m_nocode); + block->end(); +} + + +/*------------------------------------------------- + static_generate_nocode_handler - generate an + exception handler for "out of code" +-------------------------------------------------*/ + +void hyperstone_device::static_generate_nocode_handler() +{ + drcuml_state *drcuml = m_drcuml.get(); + drcuml_block *block; + + /* begin generating */ + block = drcuml->begin_block(10); + + /* generate a hash jump via the current mode and PC */ + alloc_handle(drcuml, &m_nocode, "nocode"); + UML_HANDLE(block, *m_nocode); + UML_GETEXP(block, I0); + UML_MOV(block, mem(&PC), I0); + //save_fast_iregs(block); + UML_EXIT(block, EXECUTE_MISSING_CODE); + + block->end(); +} + + +/*------------------------------------------------- + static_generate_out_of_cycles - generate an + out of cycles exception handler +-------------------------------------------------*/ + +void hyperstone_device::static_generate_out_of_cycles() +{ + drcuml_state *drcuml = m_drcuml.get(); + drcuml_block *block; + + /* begin generating */ + block = drcuml->begin_block(10); + + /* generate a hash jump via the current mode and PC */ + alloc_handle(drcuml, &m_out_of_cycles, "out_of_cycles"); + UML_HANDLE(block, *m_out_of_cycles); + UML_GETEXP(block, I0); + UML_MOV(block, mem(&m_global_regs[0]), I0); + //save_fast_iregs(block); + UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); + + block->end(); +} + +/*------------------------------------------------------------------ + static_generate_memory_accessor +------------------------------------------------------------------*/ + +void hyperstone_device::static_generate_memory_accessor(int size, int iswrite, bool isio, const char *name, code_handle *&handleptr) +{ + /* on entry, address is in I0; data for writes is in I1 */ + /* on exit, read result is in I1 */ + /* routine trashes I0-I1 */ + drcuml_state *drcuml = m_drcuml.get(); + drcuml_block *block; + + /* begin generating */ + block = drcuml->begin_block(1024); + + /* add a global entry for this */ + alloc_handle(drcuml, &handleptr, name); + UML_HANDLE(block, *handleptr); + + // write: + switch (size) + { + case 1: + if (iswrite) + UML_WRITE(block, I0, I1, SIZE_BYTE, SPACE_PROGRAM); + else + UML_READ(block, I1, I0, SIZE_BYTE, SPACE_PROGRAM); + break; + + case 2: + if (iswrite) + UML_WRITE(block, I0, I1, SIZE_WORD, SPACE_PROGRAM); + else + UML_READ(block, I1, I0, SIZE_WORD, SPACE_PROGRAM); + break; + + case 4: + if (iswrite) + UML_WRITE(block, I0, I1, SIZE_DWORD, isio ? SPACE_IO : SPACE_PROGRAM); + else + UML_READ(block, I1, I0, SIZE_DWORD, isio ? SPACE_IO : SPACE_PROGRAM); + break; + } + UML_RET(block); + + block->end(); +} + + + +/*************************************************************************** + CODE GENERATION +***************************************************************************/ + +/*------------------------------------------------- + generate_update_cycles - generate code to + subtract cycles from the icount and generate + an exception if out +-------------------------------------------------*/ + +void hyperstone_device::generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param) +{ + /* account for cycles */ + if (compiler->m_cycles > 0) + { + UML_SUB(block, mem(&m_icount), mem(&m_icount), MAPVAR_CYCLES); + UML_MAPVAR(block, MAPVAR_CYCLES, 0); + UML_EXHc(block, COND_S, *m_out_of_cycles, param); + } + compiler->m_cycles = 0; +} + +/*------------------------------------------------- + generate_checksum_block - generate code to + validate a sequence of opcodes +-------------------------------------------------*/ + +void hyperstone_device::generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast) +{ + const opcode_desc *curdesc; + if (m_drcuml->logging()) + { + block->append_comment("[Validation for %08X]", seqhead->pc); + } + /* loose verify or single instruction: just compare and fail */ + if (!(m_drcoptions & E132XS_STRICT_VERIFY) || seqhead->next() == nullptr) + { + if (!(seqhead->flags & OPFLAG_VIRTUAL_NOOP)) + { + uint32_t sum = seqhead->opptr.w[0]; + void *base = m_direct->read_ptr(seqhead->physpc); + UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x2); + + if (seqhead->delay.first() != nullptr && seqhead->physpc != seqhead->delay.first()->physpc) + { + base = m_direct->read_ptr(seqhead->delay.first()->physpc); + assert(base != nullptr); + UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x2); + UML_ADD(block, I0, I0, I1); + + sum += seqhead->delay.first()->opptr.w[0]; + } + + UML_CMP(block, I0, sum); + UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); + } + } + else /* full verification; sum up everything */ + { + void *base = m_direct->read_ptr(seqhead->physpc); + UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x2); + uint32_t sum = seqhead->opptr.w[0]; + for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) + if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) + { + base = m_direct->read_ptr(curdesc->physpc); + assert(base != nullptr); + UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x2); + UML_ADD(block, I0, I0, I1); + sum += curdesc->opptr.w[0]; + + if (curdesc->delay.first() != nullptr && (curdesc == seqlast || (curdesc->next() != nullptr && curdesc->next()->physpc != curdesc->delay.first()->physpc))) + { + base = m_direct->read_ptr(curdesc->delay.first()->physpc); + assert(base != nullptr); + UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x2); + UML_ADD(block, I0, I0, I1); + + sum += curdesc->delay.first()->opptr.w[0]; + } + } + UML_CMP(block, I0, sum); + UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); + } +} + + +/*------------------------------------------------- + log_add_disasm_comment - add a comment + including disassembly of a MIPS instruction +-------------------------------------------------*/ + +void hyperstone_device::log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op) +{ + if (m_drcuml->logging()) + { + block->append_comment("%08X: %08x", pc, op); + } +} + + +/*------------------------------------------------------------------ + generate_delay_slot_and_branch +------------------------------------------------------------------*/ + +void hyperstone_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + compiler_state compiler_temp = *compiler; + + /* fetch the target register if dynamic, in case it is modified by the delay slot */ + if (desc->targetpc == BRANCH_TARGET_DYNAMIC) + { + UML_MOV(block, mem(&m_branch_dest), I0); + } + + /* update the cycles and jump through the hash table to the target */ + if (desc->targetpc != BRANCH_TARGET_DYNAMIC) + { + generate_update_cycles(block, &compiler_temp, desc->targetpc); + if (desc->flags & OPFLAG_INTRABLOCK_BRANCH) + UML_JMP(block, desc->targetpc | 0x80000000); + else + UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); + } + else + { + generate_update_cycles(block, &compiler_temp, mem(&m_branch_dest)); + UML_HASHJMP(block, 0, mem(&m_branch_dest), *m_nocode); + } + + /* update the label */ + compiler->m_labelnum = compiler_temp.m_labelnum; + + /* reset the mapvar to the current cycles */ + UML_MAPVAR(block, MAPVAR_CYCLES, compiler->m_cycles); +} + + +/*------------------------------------------------- + generate_sequence_instruction - generate code + for a single instruction in a sequence +-------------------------------------------------*/ + +void hyperstone_device::generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + offs_t expc; + + /* add an entry for the log */ + if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) + log_add_disasm_comment(block, desc->pc, desc->opptr.w[0]); + + /* set the PC map variable */ + expc = (desc->flags & OPFLAG_IN_DELAY_SLOT) ? desc->pc - 3 : desc->pc; + UML_MAPVAR(block, MAPVAR_PC, expc); + + /* accumulate total cycles */ + compiler->m_cycles += desc->cycles; + + /* update the icount map variable */ + UML_MAPVAR(block, MAPVAR_CYCLES, compiler->m_cycles); + + /* if we are debugging, call the debugger */ + if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0) + { + UML_MOV(block, DRC_PC, desc->pc); + //save_fast_iregs(block); + UML_DEBUG(block, desc->pc); + } + + if (!(desc->flags & OPFLAG_VIRTUAL_NOOP)) + { + /* compile the instruction */ + if (!generate_opcode(block, compiler, desc)) + { + UML_MOV(block, DRC_PC, desc->pc); + UML_MOV(block, mem(&m_drc_arg0), desc->opptr.w[0]); + UML_CALLC(block, cfunc_unimplemented, this); + } + } +} + +#include "e132xsdrc_ops.hxx" + +bool hyperstone_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + uint32_t op = (uint32_t)desc->opptr.w[0]; + + UML_MOV(block, I0, op); + UML_AND(block, I7, DRC_SR, H_MASK); + UML_ADD(block, DRC_PC, DRC_PC, 2); + UML_MOV(block, mem(&m_instruction_length), (1 << 19)); + + switch (op >> 8) + { + case 0x00: generate_chk<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x01: generate_chk<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x02: generate_chk<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x03: generate_chk<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x04: generate_movd<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x05: generate_movd<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x06: generate_movd<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x07: generate_movd<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x08: generate_divsu<GLOBAL, GLOBAL, IS_UNSIGNED>(block, compiler, desc); break; + case 0x09: generate_divsu<GLOBAL, LOCAL, IS_UNSIGNED>(block, compiler, desc); break; + case 0x0a: generate_divsu<LOCAL, GLOBAL, IS_UNSIGNED>(block, compiler, desc); break; + case 0x0b: generate_divsu<LOCAL, LOCAL, IS_UNSIGNED>(block, compiler, desc); break; + case 0x0c: generate_divsu<GLOBAL, GLOBAL, IS_SIGNED>(block, compiler, desc); break; + case 0x0d: generate_divsu<GLOBAL, LOCAL, IS_SIGNED>(block, compiler, desc); break; + case 0x0e: generate_divsu<LOCAL, GLOBAL, IS_SIGNED>(block, compiler, desc); break; + case 0x0f: generate_divsu<LOCAL, LOCAL, IS_SIGNED>(block, compiler, desc); break; + case 0x10: generate_xm<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x11: generate_xm<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x12: generate_xm<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x13: generate_xm<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x14: generate_mask<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x15: generate_mask<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x16: generate_mask<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x17: generate_mask<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x18: generate_sum<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x19: generate_sum<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x1a: generate_sum<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x1b: generate_sum<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x1c: generate_sums<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x1d: generate_sums<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x1e: generate_sums<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x1f: generate_sums<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x20: generate_cmp<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x21: generate_cmp<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x22: generate_cmp<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x23: generate_cmp<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x24: generate_mov<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x25: generate_mov<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x26: generate_mov<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x27: generate_mov<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x28: generate_add<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x29: generate_add<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x2a: generate_add<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x2b: generate_add<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x2c: generate_adds<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x2d: generate_adds<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x2e: generate_adds<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x2f: generate_adds<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x30: generate_cmpb<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x31: generate_cmpb<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x32: generate_cmpb<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x33: generate_cmpb<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x34: generate_andn<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x35: generate_andn<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x36: generate_andn<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x37: generate_andn<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x38: generate_or<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x39: generate_or<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x3a: generate_or<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x3b: generate_or<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x3c: generate_xor<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x3d: generate_xor<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x3e: generate_xor<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x3f: generate_xor<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x40: generate_subc<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x41: generate_subc<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x42: generate_subc<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x43: generate_subc<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x44: generate_not<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x45: generate_not<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x46: generate_not<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x47: generate_not<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x48: generate_sub<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x49: generate_sub<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x4a: generate_sub<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x4b: generate_sub<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x4c: generate_subs<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x4d: generate_subs<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x4e: generate_subs<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x4f: generate_subs<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x50: generate_addc<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x51: generate_addc<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x52: generate_addc<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x53: generate_addc<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x54: generate_and<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x55: generate_and<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x56: generate_and<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x57: generate_and<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x58: generate_neg<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x59: generate_neg<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x5a: generate_neg<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x5b: generate_neg<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x5c: generate_negs<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x5d: generate_negs<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x5e: generate_negs<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x5f: generate_negs<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x60: generate_cmpi<GLOBAL, SIMM>(block, compiler, desc); break; + case 0x61: generate_cmpi<GLOBAL, LIMM>(block, compiler, desc); break; + case 0x62: generate_cmpi<LOCAL, SIMM>(block, compiler, desc); break; + case 0x63: generate_cmpi<LOCAL, LIMM>(block, compiler, desc); break; + case 0x64: generate_movi<GLOBAL, SIMM>(block, compiler, desc); break; + case 0x65: generate_movi<GLOBAL, LIMM>(block, compiler, desc); break; + case 0x66: generate_movi<LOCAL, SIMM>(block, compiler, desc); break; + case 0x67: generate_movi<LOCAL, LIMM>(block, compiler, desc); break; + case 0x68: generate_addi<GLOBAL, SIMM>(block, compiler, desc); break; + case 0x69: generate_addi<GLOBAL, LIMM>(block, compiler, desc); break; + case 0x6a: generate_addi<LOCAL, SIMM>(block, compiler, desc); break; + case 0x6b: generate_addi<LOCAL, LIMM>(block, compiler, desc); break; + case 0x6c: generate_addsi<GLOBAL, SIMM>(block, compiler, desc); break; + case 0x6d: generate_addsi<GLOBAL, LIMM>(block, compiler, desc); break; + case 0x6e: generate_addsi<LOCAL, SIMM>(block, compiler, desc); break; + case 0x6f: generate_addsi<LOCAL, LIMM>(block, compiler, desc); break; + case 0x70: generate_cmpbi<GLOBAL, SIMM>(block, compiler, desc); break; + case 0x71: generate_cmpbi<GLOBAL, LIMM>(block, compiler, desc); break; + case 0x72: generate_cmpbi<LOCAL, SIMM>(block, compiler, desc); break; + case 0x73: generate_cmpbi<LOCAL, LIMM>(block, compiler, desc); break; + case 0x74: generate_andni<GLOBAL, SIMM>(block, compiler, desc); break; + case 0x75: generate_andni<GLOBAL, LIMM>(block, compiler, desc); break; + case 0x76: generate_andni<LOCAL, SIMM>(block, compiler, desc); break; + case 0x77: generate_andni<LOCAL, LIMM>(block, compiler, desc); break; + case 0x78: generate_ori<GLOBAL, SIMM>(block, compiler, desc); break; + case 0x79: generate_ori<GLOBAL, LIMM>(block, compiler, desc); break; + case 0x7a: generate_ori<LOCAL, SIMM>(block, compiler, desc); break; + case 0x7b: generate_ori<LOCAL, LIMM>(block, compiler, desc); break; + case 0x7c: generate_xori<GLOBAL, SIMM>(block, compiler, desc); break; + case 0x7d: generate_xori<GLOBAL, LIMM>(block, compiler, desc); break; + case 0x7e: generate_xori<LOCAL, SIMM>(block, compiler, desc); break; + case 0x7f: generate_xori<LOCAL, LIMM>(block, compiler, desc); break; + case 0x80: generate_shrdi<N_LO>(block, compiler, desc); break; + case 0x81: generate_shrdi<N_HI>(block, compiler, desc); break; + case 0x82: generate_shrd(block, compiler, desc); break; + case 0x83: generate_shr(block, compiler, desc); break; + case 0x84: generate_sardi<N_LO>(block, compiler, desc); break; + case 0x85: generate_sardi<N_HI>(block, compiler, desc); break; + case 0x86: generate_sard(block, compiler, desc); break; + case 0x87: generate_sar(block, compiler, desc); break; + case 0x88: generate_shldi<N_LO>(block, compiler, desc); break; + case 0x89: generate_shldi<N_HI>(block, compiler, desc); break; + case 0x8a: generate_shld(block, compiler, desc); break; + case 0x8b: generate_shl(block, compiler, desc); break; + case 0x8c: generate_reserved(block, compiler, desc); break; + case 0x8d: generate_reserved(block, compiler, desc); break; + case 0x8e: generate_testlz(block, compiler, desc); break; + case 0x8f: generate_rol(block, compiler, desc); break; + case 0x90: generate_ldxx1<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x91: generate_ldxx1<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x92: generate_ldxx1<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x93: generate_ldxx1<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x94: generate_ldxx2<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x95: generate_ldxx2<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x96: generate_ldxx2<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x97: generate_ldxx2<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x98: generate_stxx1<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x99: generate_stxx1<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x9a: generate_stxx1<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x9b: generate_stxx1<LOCAL, LOCAL>(block, compiler, desc); break; + case 0x9c: generate_stxx2<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0x9d: generate_stxx2<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0x9e: generate_stxx2<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0x9f: generate_stxx2<LOCAL, LOCAL>(block, compiler, desc); break; + case 0xa0: generate_shri<N_LO, GLOBAL>(block, compiler, desc); break; + case 0xa1: generate_shri<N_HI, GLOBAL>(block, compiler, desc); break; + case 0xa2: generate_shri<N_LO, LOCAL>(block, compiler, desc); break; + case 0xa3: generate_shri<N_HI, LOCAL>(block, compiler, desc); break; + case 0xa4: generate_sari<N_LO, GLOBAL>(block, compiler, desc); break; + case 0xa5: generate_sari<N_HI, GLOBAL>(block, compiler, desc); break; + case 0xa6: generate_sari<N_LO, LOCAL>(block, compiler, desc); break; + case 0xa7: generate_sari<N_HI, LOCAL>(block, compiler, desc); break; + case 0xa8: generate_shli<N_LO, GLOBAL>(block, compiler, desc); break; + case 0xa9: generate_shli<N_HI, GLOBAL>(block, compiler, desc); break; + case 0xaa: generate_shli<N_LO, LOCAL>(block, compiler, desc); break; + case 0xab: generate_shli<N_HI, LOCAL>(block, compiler, desc); break; + case 0xac: generate_reserved(block, compiler, desc); break; + case 0xad: generate_reserved(block, compiler, desc); break; + case 0xae: generate_reserved(block, compiler, desc); break; + case 0xaf: generate_reserved(block, compiler, desc); break; + case 0xb0: generate_mulsu<GLOBAL, GLOBAL, IS_UNSIGNED>(block, compiler, desc); break; + case 0xb1: generate_mulsu<GLOBAL, LOCAL, IS_UNSIGNED>(block, compiler, desc); break; + case 0xb2: generate_mulsu<LOCAL, GLOBAL, IS_UNSIGNED>(block, compiler, desc); break; + case 0xb3: generate_mulsu<LOCAL, LOCAL, IS_UNSIGNED>(block, compiler, desc); break; + case 0xb4: generate_mulsu<GLOBAL, GLOBAL, IS_SIGNED>(block, compiler, desc); break; + case 0xb5: generate_mulsu<GLOBAL, LOCAL, IS_SIGNED>(block, compiler, desc); break; + case 0xb6: generate_mulsu<LOCAL, GLOBAL, IS_SIGNED>(block, compiler, desc); break; + case 0xb7: generate_mulsu<LOCAL, LOCAL, IS_SIGNED>(block, compiler, desc); break; + case 0xb8: generate_set<N_LO, GLOBAL>(block, compiler, desc); break; + case 0xb9: generate_set<N_HI, GLOBAL>(block, compiler, desc); break; + case 0xba: generate_set<N_LO, LOCAL>(block, compiler, desc); break; + case 0xbb: generate_set<N_HI, LOCAL>(block, compiler, desc); break; + case 0xbc: generate_mul<GLOBAL, GLOBAL>(block, compiler, desc); break; + case 0xbd: generate_mul<GLOBAL, LOCAL>(block, compiler, desc); break; + case 0xbe: generate_mul<LOCAL, GLOBAL>(block, compiler, desc); break; + case 0xbf: generate_mul<LOCAL, LOCAL>(block, compiler, desc); break; + case 0xc0: generate_software(block, compiler, desc); break; // fadd + case 0xc1: generate_software(block, compiler, desc); break; // faddd + case 0xc2: generate_software(block, compiler, desc); break; // fsub + case 0xc3: generate_software(block, compiler, desc); break; // fsubd + case 0xc4: generate_software(block, compiler, desc); break; // fmul + case 0xc5: generate_software(block, compiler, desc); break; // fmuld + case 0xc6: generate_software(block, compiler, desc); break; // fdiv + case 0xc7: generate_software(block, compiler, desc); break; // fdivd + case 0xc8: generate_software(block, compiler, desc); break; // fcmp + case 0xc9: generate_software(block, compiler, desc); break; // fcmpd + case 0xca: generate_software(block, compiler, desc); break; // fcmpu + case 0xcb: generate_software(block, compiler, desc); break; // fcmpud + case 0xcc: generate_software(block, compiler, desc); break; // fcvt + case 0xcd: generate_software(block, compiler, desc); break; // fcvtd + case 0xce: generate_extend(block, compiler, desc); break; + case 0xcf: generate_do(block, compiler, desc); break; + case 0xd0: generate_ldwr<GLOBAL>(block, compiler, desc); break; + case 0xd1: generate_ldwr<LOCAL>(block, compiler, desc); break; + case 0xd2: generate_lddr<GLOBAL>(block, compiler, desc); break; + case 0xd3: generate_lddr<LOCAL>(block, compiler, desc); break; + case 0xd4: generate_ldwp<GLOBAL>(block, compiler, desc); break; + case 0xd5: generate_ldwp<LOCAL>(block, compiler, desc); break; + case 0xd6: generate_lddp<GLOBAL>(block, compiler, desc); break; + case 0xd7: generate_lddp<LOCAL>(block, compiler, desc); break; + case 0xd8: generate_stwr<GLOBAL>(block, compiler, desc); break; + case 0xd9: generate_stwr<LOCAL>(block, compiler, desc); break; + case 0xda: generate_stdr<GLOBAL>(block, compiler, desc); break; + case 0xdb: generate_stdr<LOCAL>(block, compiler, desc); break; + case 0xdc: generate_stwp<GLOBAL>(block, compiler, desc); break; + case 0xdd: generate_stwp<LOCAL>(block, compiler, desc); break; + case 0xde: generate_stdp<GLOBAL>(block, compiler, desc); break; + case 0xdf: generate_stdp<LOCAL>(block, compiler, desc); break; + case 0xe0: generate_db<COND_V, IS_SET>(block, compiler, desc); break; + case 0xe1: generate_db<COND_V, IS_CLEAR>(block, compiler, desc); break; + case 0xe2: generate_db<COND_Z, IS_SET>(block, compiler, desc); break; + case 0xe3: generate_db<COND_Z, IS_CLEAR>(block, compiler, desc); break; + case 0xe4: generate_db<COND_C, IS_SET>(block, compiler, desc); break; + case 0xe5: generate_db<COND_C, IS_CLEAR>(block, compiler, desc); break; + case 0xe6: generate_db<COND_CZ, IS_SET>(block, compiler, desc); break; + case 0xe7: generate_db<COND_CZ, IS_CLEAR>(block, compiler, desc); break; + case 0xe8: generate_db<COND_N, IS_SET>(block, compiler, desc); break; + case 0xe9: generate_db<COND_N, IS_CLEAR>(block, compiler, desc); break; + case 0xea: generate_db<COND_NZ, IS_SET>(block, compiler, desc); break; + case 0xeb: generate_db<COND_NZ, IS_CLEAR>(block, compiler, desc); break; + case 0xec: generate_dbr(block, compiler, desc); break; + case 0xed: generate_frame(block, compiler, desc); break; + case 0xee: generate_call<GLOBAL>(block, compiler, desc); break; + case 0xef: generate_call<LOCAL>(block, compiler, desc); break; + case 0xf0: generate_b<COND_V, IS_SET>(block, compiler, desc); break; + case 0xf1: generate_b<COND_V, IS_CLEAR>(block, compiler, desc); break; + case 0xf2: generate_b<COND_Z, IS_SET>(block, compiler, desc); break; + case 0xf3: generate_b<COND_Z, IS_CLEAR>(block, compiler, desc); break; + case 0xf4: generate_b<COND_C, IS_SET>(block, compiler, desc); break; + case 0xf5: generate_b<COND_C, IS_CLEAR>(block, compiler, desc); break; + case 0xf6: generate_b<COND_CZ, IS_SET>(block, compiler, desc); break; + case 0xf7: generate_b<COND_CZ, IS_CLEAR>(block, compiler, desc); break; + case 0xf8: generate_b<COND_N, IS_SET>(block, compiler, desc); break; + case 0xf9: generate_b<COND_N, IS_CLEAR>(block, compiler, desc); break; + case 0xfa: generate_b<COND_NZ, IS_SET>(block, compiler, desc); break; + case 0xfb: generate_b<COND_NZ, IS_CLEAR>(block, compiler, desc); break; + case 0xfc: generate_br(block, compiler, desc); break; + case 0xfd: generate_trap_op(block, compiler, desc); break; + case 0xfe: generate_trap_op(block, compiler, desc); break; + case 0xff: generate_trap_op(block, compiler, desc); break; + } + + UML_AND(block, DRC_SR, DRC_SR, ~ILC_MASK); + UML_OR(block, DRC_SR, DRC_SR, mem(&m_instruction_length)); + + int done; + UML_AND(block, I0, DRC_SR, (T_MASK | P_MASK)); + UML_CMP(block, I0, (T_MASK | P_MASK)); + UML_JMPc(block, uml::COND_NE, done = compiler->m_labelnum++); + UML_TEST(block, mem(&m_delay_slot), 1); + UML_EXHc(block, uml::COND_E, *m_exception[EXCEPTION_TRACE], 0); + + UML_LABEL(block, done); + UML_XOR(block, DRC_SR, DRC_SR, I7); + return true; +}
\ No newline at end of file diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx new file mode 100644 index 00000000000..e829cf070a1 --- /dev/null +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -0,0 +1,1466 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz + +#include "e132xs.h" + +constexpr uint32_t WRITE_ONLY_REGMASK = (1 << BCR_REGISTER) | (1 << TPR_REGISTER) | (1 << FCR_REGISTER) | (1 << MCR_REGISTER); + +void hyperstone_device::generate_check_delay_pc(drcuml_block *block) +{ + /* if PC is used in a delay instruction, the delayed PC should be used */ + UML_TEST(block, mem(&m_delay_slot), 1); + UML_MOVc(block, uml::COND_NZ, DRC_PC, mem(&m_delay_pc)); + UML_MOVc(block, uml::COND_NZ, mem(&m_delay_slot), 0); +} + +void hyperstone_device::generate_decode_const(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + const uint16_t imm_1 = READ_OP(desc->pc + 2); + + if (imm_1 & 0x8000) + { + const uint16_t imm_2 = READ_OP(desc->pc + 4); + + uint32_t imm = imm_2; + imm |= ((imm_1 & 0x3fff) << 16); + + if (imm_1 & 0x4000) + imm |= 0xc0000000; + + UML_MOV(block, mem(&m_instruction_length), (3<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 4); + UML_MOV(block, I1, imm); + } + else + { + uint32_t imm = imm_1 & 0x3fff; + + if (imm_1 & 0x4000) + imm |= 0xffffc000; + + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 2); + UML_MOV(block, I1, imm); + } +} + +void hyperstone_device::generate_decode_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + uint16_t op = desc->opptr.w[0]; + + switch (op & 0xf) + { + case 0: + UML_MOV(block, I1, 16); + return; + case 1: + { + uint32_t extra_u = (READ_OP(desc->pc + 2) << 16) | READ_OP(desc->pc + 4); + UML_MOV(block, mem(&m_instruction_length), (3<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 4); + UML_MOV(block, I1, extra_u); + return; + } + case 2: + { + uint32_t extra_u = READ_OP(desc->pc + 2); + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 2); + UML_MOV(block, I1, extra_u); + return; + } + case 3: + { + uint32_t extra_u = 0xffff0000 | READ_OP(desc->pc + 2); + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 2); + UML_MOV(block, I1, extra_u); + return; + } + default: + UML_MOV(block, I1, s_immediate_values[op & 0xf]); + return; + } +} + +void hyperstone_device::generate_ignore_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_decode_pcrel(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_ignore_pcrel(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_set_global_register(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + // Expects register index in I4, value in I5, clobbers I6 + int extended; + UML_CMP(block, I4, 16); + UML_JMPc(block, uml::COND_AE, extended = compiler->m_labelnum++); + + int generic_store, set_sr, done; + UML_CMP(block, I4, 1); + UML_JMPc(block, uml::COND_A, generic_store = compiler->m_labelnum++); + UML_JMPc(block, uml::COND_E, set_sr = compiler->m_labelnum++); + UML_AND(block, DRC_PC, I5, ~1); + generate_delay_slot_and_branch(block, compiler, desc); + UML_JMP(block, done = compiler->m_labelnum++); + + UML_LABEL(block, set_sr); + UML_ROLINS(block, DRC_SR, I5, 0, 0x0000ffff); + UML_AND(block, DRC_SR, DRC_SR, ~0x40); + UML_TEST(block, mem(&m_intblock), ~0); + UML_MOVc(block, uml::COND_Z, mem(&m_intblock), 1); + UML_JMP(block, done); + + UML_LABEL(block, generic_store); + UML_STORE(block, (void *)m_global_regs, I4, I5, SIZE_DWORD, SCALE_x4); + UML_JMP(block, done); + + int above_bcr; + UML_LABEL(block, extended); + UML_CMP(block, I4, 17); + UML_JMPc(block, uml::COND_BE, generic_store); + UML_CMP(block, I4, BCR_REGISTER); + UML_JMPc(block, uml::COND_A, above_bcr = compiler->m_labelnum++); + UML_JMPc(block, uml::COND_E, generic_store); + + // SP or UB + UML_AND(block, I5, I5, ~3); + UML_JMP(block, generic_store); + + int set_tpr, set_tcr, set_tr, set_fcr; + UML_LABEL(block, above_bcr); + UML_CMP(block, I4, TCR_REGISTER); + UML_JMPc(block, uml::COND_B, set_tpr = compiler->m_labelnum++); + UML_JMPc(block, uml::COND_E, set_tcr = compiler->m_labelnum++); + // Above TCR + UML_CMP(block, I4, WCR_REGISTER); + UML_JMPc(block, uml::COND_B, set_tr = compiler->m_labelnum++); + UML_JMPc(block, uml::COND_E, generic_store); // WCR + // Above WCR + UML_CMP(block, I4, FCR_REGISTER); + UML_JMPc(block, uml::COND_B, done); // ISR - read only + UML_JMPc(block, uml::COND_E, set_fcr = compiler->m_labelnum++); + UML_CMP(block, I4, MCR_REGISTER); + UML_JMPc(block, uml::COND_A, generic_store); // regs 28..31 + // Set MCR + UML_ROLAND(block, I6, I5, 20, 0x7); + UML_LOAD(block, I6, (void *)s_trap_entries, I6, SIZE_DWORD, SCALE_x4); + UML_MOV(block, mem(&m_trap_entry), I6); + UML_JMP(block, generic_store); + + int skip_compute_tr; + UML_LABEL(block, set_tpr); + UML_STORE(block, (void *)m_global_regs, I4, I5, SIZE_DWORD, SCALE_x4); + UML_TEST(block, I5, 0x80000000); + UML_JMPc(block, uml::COND_NZ, skip_compute_tr = compiler->m_labelnum++); + UML_CALLC(block, cfunc_compute_tr, this); + UML_CALLC(block, cfunc_update_timer_prescale, this); + UML_LABEL(block, skip_compute_tr); + UML_CALLC(block, cfunc_adjust_timer_interrupt, this); + UML_JMP(block, done); + + UML_LABEL(block, set_tcr); + UML_LOAD(block, I6, (void *)m_global_regs, I4, SIZE_DWORD, SCALE_x4); + UML_CMP(block, I6, I5); + UML_JMPc(block, uml::COND_E, done); + UML_STORE(block, (void *)m_global_regs, I4, I5, SIZE_DWORD, SCALE_x4); + UML_CALLC(block, cfunc_adjust_timer_interrupt, this); + UML_CMP(block, mem(&m_intblock), 1); + UML_MOVc(block, uml::COND_L, mem(&m_intblock), 1); + UML_JMP(block, done); + + UML_LABEL(block, set_tr); + UML_STORE(block, (void *)m_global_regs, I4, I5, SIZE_DWORD, SCALE_x4); + UML_MOV(block, mem(&m_tr_base_value), I5); + UML_CALLC(block, cfunc_total_cycles, this); + UML_DMOV(block, mem(&m_tr_base_cycles), mem(&m_numcycles)); + UML_CALLC(block, cfunc_adjust_timer_interrupt, this); + UML_JMP(block, done); + + int skip_adjust_timer; + UML_LABEL(block, set_fcr); + UML_LOAD(block, I6, (void *)m_global_regs, I4, SIZE_DWORD, SCALE_x4); + UML_XOR(block, I6, I6, I5); + UML_TEST(block, I6, 0x80000000); + UML_JMPc(block, uml::COND_Z, skip_adjust_timer = compiler->m_labelnum++); + UML_CALLC(block, cfunc_adjust_timer_interrupt, this); + UML_LABEL(block, skip_adjust_timer); + UML_STORE(block, (void *)m_global_regs, I4, I5, SIZE_DWORD, SCALE_x4); + UML_CMP(block, mem(&m_intblock), 1); + UML_MOVc(block, uml::COND_L, mem(&m_intblock), 1); + // Fall through to done + + UML_LABEL(block, done); +} + +void hyperstone_device::generate_trap(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr) +{ +} + +void hyperstone_device::generate_int(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr) +{ +} + +void hyperstone_device::generate_exception(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr) +{ +} + +void hyperstone_device::generate_software(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_chk(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_movd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + generate_check_delay_pc(block); + + uint16_t op = desc->opptr.w[0]; + const uint32_t src_code = op & 0xf; + const uint32_t srcf_code = src_code + 1; + const uint32_t dst_code = (op & 0xf0) >> 4; + const uint32_t dstf_code = dst_code + 1; + + int done = compiler->m_labelnum++; + if (DST_GLOBAL && (dst_code == PC_REGISTER)) + { + if (SRC_GLOBAL && src_code < 2) + { + printf("Denoted PC or SR in RET instruction. PC = %08X\n", desc->pc); + return; + } + + UML_AND(block, I1, DRC_SR, (S_MASK | L_MASK)); + UML_LOAD(block, I2, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); + UML_LOAD(block, I3, (void *)m_global_regs, srcf_code, SIZE_DWORD, SCALE_x4); + UML_AND(block, DRC_PC, I2, ~1); + UML_AND(block, DRC_SR, I3, 0xffe3ffff); + UML_ROLINS(block, DRC_SR, I2, S_SHIFT, S_MASK); + + UML_TEST(block, mem(&m_intblock), ~0); + UML_MOVc(block, uml::COND_Z, mem(&m_intblock), 1); + + UML_MOV(block, mem(&m_instruction_length), 0); + + int no_exception; + UML_AND(block, I2, DRC_SR, (S_MASK | L_MASK)); + UML_AND(block, I3, I1, I2); + UML_TEST(block, I3, S_MASK); + UML_JMPc(block, uml::COND_NZ, no_exception = compiler->m_labelnum++); // If S is set and unchanged, there won't be an exception. + + UML_XOR(block, I3, I1, I2); + UML_AND(block, I4, I3, I2); + UML_TEST(block, I4, S_MASK); + UML_EXHc(block, uml::COND_NZ, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0); // If S is newly set, it's a privilege error. + + UML_TEST(block, I3, L_MASK); + UML_JMPc(block, uml::COND_Z, no_exception); // If L is unchanged, there won't be an exception. + UML_TEST(block, I1, L_MASK); + UML_JMPc(block, uml::COND_NZ, no_exception); // If L was previously set, there won't be an exception. + UML_TEST(block, I2, S_MASK); + UML_EXHc(block, uml::COND_Z, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0); // If L is newly set and we are not in Supervisor mode, it's a privilege error. + + int diff_in_range; + UML_LABEL(block, no_exception); + UML_MOV(block, I0, mem(&SP)); + UML_ROLAND(block, I1, I0, 30, 0x7f); + UML_ROLAND(block, I2, DRC_SR, 7, 0x7f); + UML_SUB(block, I3, I2, I1); + UML_CMP(block, I3, -64); + UML_JMPc(block, uml::COND_L, done); + UML_CMP(block, I3, 64); + UML_JMPc(block, uml::COND_L, diff_in_range = compiler->m_labelnum++); + UML_OR(block, I3, I3, 0x80); + UML_SEXT(block, I3, I3, SIZE_BYTE); + UML_LABEL(block, diff_in_range); + + int pop_next; + UML_LABEL(block, pop_next = compiler->m_labelnum++); + UML_CMP(block, I3, 0); + UML_JMPc(block, uml::COND_GE, done); + UML_SUB(block, I0, I0, 4); + UML_CALLH(block, *m_mem_read32); + UML_ROLAND(block, I2, I0, 30, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + UML_ADD(block, I3, I3, 1); + UML_TEST(block, I3, ~0); + UML_JMP(block, pop_next); + } + else if (SRC_GLOBAL && (src_code == SR_REGISTER)) // Rd doesn't denote PC and Rs denotes SR + { + UML_OR(block, DRC_SR, DRC_SR, Z_MASK); + UML_AND(block, DRC_SR, DRC_SR, ~N_MASK); + if (DST_GLOBAL) + { + UML_MOV(block, I4, dst_code); + UML_MOV(block, I5, 0); + generate_set_global_register(block, compiler, desc); + UML_MOV(block, I4, dstf_code); + UML_MOV(block, I5, 0); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I0, I0, dst_code); + UML_AND(block, I0, I0, 0x3f); + UML_STORE(block, (void *)m_local_regs, I0, 0, SIZE_DWORD, SCALE_x4); + UML_ADD(block, I0, I0, 1); + UML_AND(block, I0, I0, 0x3f); + UML_STORE(block, (void *)m_local_regs, I0, 0, SIZE_DWORD, SCALE_x4); + } + } + else // Rd doesn't denote PC and Rs doesn't denote SR + { + if (!SRC_GLOBAL || !DST_GLOBAL) + { + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + } + + if (SRC_GLOBAL) + { + UML_LOAD(block, I0, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); + UML_LOAD(block, I1, (void *)m_global_regs, srcf_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I0, I3, src_code); + UML_AND(block, I0, I0, 0x3f); + UML_LOAD(block, I0, (void *)m_local_regs, I0, SIZE_DWORD, SCALE_x4); + UML_ADD(block, I1, I3, srcf_code); + UML_AND(block, I1, I1, 0x3f); + UML_LOAD(block, I1, (void *)m_local_regs, I0, SIZE_DWORD, SCALE_x4); + } + + UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK)); + + UML_OR(block, I2, I0, I1); + UML_TEST(block, I2, ~0); + UML_SETc(block, uml::COND_Z, I2); + UML_ROLINS(block, DRC_SR, I2, 0, Z_MASK); + + UML_TEST(block, I0, 0x80000000); + UML_SETc(block, uml::COND_NZ, I2); + UML_ROLINS(block, DRC_SR, I2, 0, N_MASK); + + if (DST_GLOBAL) + { + UML_MOV(block, I4, dst_code); + UML_MOV(block, I5, I0); + generate_set_global_register(block, compiler, desc); + UML_MOV(block, I4, dstf_code); + UML_MOV(block, I5, I1); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ADD(block, I2, I3, dst_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I0, SIZE_DWORD, SCALE_x4); + UML_ADD(block, I2, I3, dstf_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + } + + UML_LABEL(block, done); +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL, hyperstone_device::sign_mode SIGNED> +void hyperstone_device::generate_divsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_xm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_mask(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + uint16_t op = desc->opptr.w[0]; + const uint32_t src_code = op & 0xf; + const uint32_t dst_code = (op & 0xf0) >> 4; + + generate_decode_const(block, compiler, desc); + generate_check_delay_pc(block); + + if (!SRC_GLOBAL || !DST_GLOBAL) + { + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + } + + if (SRC_GLOBAL) + { + UML_LOAD(block, I2, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I2, I3, src_code); + UML_AND(block, I2, I2, 0x3f); + UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); + } + + UML_AND(block, I1, I2, I1); + + int skip_mask; + UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK); + UML_TEST(block, I1, ~0); + UML_JMPc(block, uml::COND_NZ, skip_mask = compiler->m_labelnum++); + UML_OR(block, DRC_SR, DRC_SR, Z_MASK); + UML_LABEL(block, skip_mask); + + if (DST_GLOBAL) + { + UML_MOV(block, I4, dst_code); + UML_MOV(block, I5, I2); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ADD(block, I0, I3, dst_code); + UML_AND(block, I0, I0, 0x3f); + UML_STORE(block, (void *)m_local_regs, I0, I1, SIZE_DWORD, SCALE_x4); + } +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_sum(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + uint16_t op = desc->opptr.w[0]; + const uint32_t src_code = op & 0xf; + const uint32_t dst_code = (op & 0xf0) >> 4; + + generate_decode_const(block, compiler, desc); + generate_check_delay_pc(block); + + if (!SRC_GLOBAL || !DST_GLOBAL) + { + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + } + + if (SRC_GLOBAL) + { + UML_LOAD(block, I2, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I2, I3, src_code); + UML_AND(block, I2, I2, 0x3f); + UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); + } + + UML_DADD(block, I5, I1, I2); + + UML_AND(block, DRC_SR, DRC_SR, ~(C_MASK | V_MASK | Z_MASK | N_MASK)); + UML_DTEST(block, I5, 0x100000000U); + UML_SETc(block, uml::COND_NZ, I6); + UML_ROLINS(block, DRC_SR, I6, 0, C_MASK); + + UML_XOR(block, I1, I5, I2); + UML_XOR(block, I6, I5, I1); + UML_AND(block, I1, I1, I6); + UML_TEST(block, I1, 0x80000000); + UML_SETc(block, uml::COND_NZ, I6); + UML_ROLINS(block, DRC_SR, I6, 0, V_MASK); + + UML_TEST(block, I5, ~0); + UML_SETc(block, uml::COND_Z, I6); + UML_ROLINS(block, DRC_SR, I6, 0, Z_MASK); + + UML_TEST(block, I5, 0x80000000); + UML_SETc(block, uml::COND_NZ, I6); + UML_ROLINS(block, DRC_SR, I6, 0, N_MASK); + + if (DST_GLOBAL) + { + UML_MOV(block, I4, dst_code); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ADD(block, I0, I3, dst_code); + UML_AND(block, I2, I0, 0x3f); + UML_STORE(block, (void *)m_local_regs, I0, I1, SIZE_DWORD, SCALE_x4); + } +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_sums(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_cmp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_mov(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + uint16_t op = desc->opptr.w[0]; + const uint32_t src_code = op & 0xf; + const uint32_t dst_code = (op & 0xf0) >> 4; + + generate_check_delay_pc(block); + + if (DST_GLOBAL) + { + int no_exception; + UML_TEST(block, DRC_SR, H_MASK); + UML_JMPc(block, uml::COND_Z, no_exception = compiler->m_labelnum++); + UML_TEST(block, DRC_SR, S_MASK); + UML_JMPc(block, uml::COND_NZ, no_exception); + UML_EXH(block, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0); + UML_LABEL(block, no_exception); + } + + if (!SRC_GLOBAL || !DST_GLOBAL) + UML_ROLAND(block, I1, DRC_SR, 7, 0x7f); + + if (SRC_GLOBAL) + { + UML_TEST(block, DRC_SR, H_MASK); + UML_MOVc(block, uml::COND_NZ, I1, 16 + src_code); + UML_MOVc(block, uml::COND_Z, I1, src_code); + UML_LOAD(block, I5, (void *)m_global_regs, I1, SIZE_DWORD, SCALE_x4); + UML_SHL(block, I2, 1, I1); + UML_TEST(block, I2, WRITE_ONLY_REGMASK); + UML_MOVc(block, uml::COND_NZ, I5, 0); + } + else + { + UML_ADD(block, I2, I1, src_code); + UML_AND(block, I2, I2, 0x3f); + UML_LOAD(block, I5, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); + } + + UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK)); + UML_TEST(block, I3, ~0); + UML_SETc(block, uml::COND_Z, I2); + UML_ROLINS(block, DRC_SR, I2, 0, Z_MASK); + UML_ROLINS(block, DRC_SR, I3, 3, N_MASK); + + if (DST_GLOBAL) + { + UML_TEST(block, DRC_SR, H_MASK); + UML_MOVc(block, uml::COND_NZ, I4, 16 + dst_code); + UML_MOVc(block, uml::COND_Z, I4, dst_code); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ADD(block, I2, I1, dst_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I5, SIZE_DWORD, SCALE_x4); + } +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_add(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_adds(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_cmpb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_subc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_sub(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_subs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_addc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_neg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_negs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_and(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_andn(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_or(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_xor(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_not(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG> +void hyperstone_device::generate_cmpi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + uint16_t op = desc->opptr.w[0]; + const uint32_t dst_code = (op & 0xf0) >> 4; + + if (IMM_LONG) + { + generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 + } + else + { + UML_AND(block, I1, I0, 0xf); + } + + generate_check_delay_pc(block); + + if (DST_GLOBAL) + { + UML_LOAD(block, I2, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I3, dst_code); + UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); + } + + UML_AND(block, DRC_SR, DRC_SR, ~(V_MASK | Z_MASK | N_MASK | C_MASK)); + UML_DSUB(block, I0, I2, I1); + + int no_v; + UML_XOR(block, I0, I0, I2); + UML_XOR(block, I3, I1, I2); + UML_AND(block, I0, I0, I3); + UML_TEST(block, I0, 0x80000000); + UML_JMPc(block, uml::COND_Z, no_v = compiler->m_labelnum++); + UML_OR(block, DRC_SR, DRC_SR, V_MASK); + UML_LABEL(block, no_v); + + int no_n; + UML_MOV(block, I3, 0); + UML_CMP(block, I2, I1); + UML_MOVc(block, uml::COND_E, I3, Z_MASK); + UML_MOVc(block, uml::COND_B, I3, C_MASK); + UML_JMPc(block, uml::COND_L, no_n = compiler->m_labelnum++); + UML_OR(block, I3, I3, N_MASK); + UML_LABEL(block, no_n); + UML_OR(block, DRC_SR, DRC_SR, I3); + + UML_CMP(block, I2, I1); + +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG> +void hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + uint16_t op = desc->opptr.w[0]; + const uint32_t dst_code = (op & 0xf0) >> 4; + + if (IMM_LONG) + { + generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 + } + else + { + UML_AND(block, I1, I0, 0xf); + } + + generate_check_delay_pc(block); + + int done, no_exception; + if (DST_GLOBAL) + { + UML_TEST(block, DRC_SR, H_MASK); + UML_JMPc(block, uml::COND_Z, no_exception = compiler->m_labelnum++); + UML_TEST(block, DRC_SR, S_MASK); + UML_JMPc(block, uml::COND_NZ, no_exception); + UML_EXH(block, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0); + UML_JMP(block, done = compiler->m_labelnum++); + UML_LABEL(block, no_exception); + } + + UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK)); + + int no_z; + UML_TEST(block, I1, ~0); + UML_JMPc(block, uml::COND_NZ, no_z = compiler->m_labelnum++); + UML_OR(block, DRC_SR, DRC_SR, Z_MASK); + UML_LABEL(block, no_z); + + int no_n; + UML_TEST(block, I1, 0x80000000); + UML_JMPc(block, uml::COND_Z, no_n = compiler->m_labelnum++); + UML_OR(block, DRC_SR, DRC_SR, N_MASK); + UML_LABEL(block, no_n); + +#if MISSIONCRAFT_FLAGS + UML_AND(block, DRC_SR, DRC_SR, ~V_MASK); +#endif + + if (DST_GLOBAL) + { + UML_TEST(block, DRC_SR, H_MASK); + UML_MOVc(block, uml::COND_NZ, I4, dst_code + 16); + UML_MOVc(block, uml::COND_Z, I4, dst_code); + UML_MOV(block, I5, I1); + generate_set_global_register(block, compiler, desc); + + UML_TEST(block, I0, 0xf0); + UML_JMPc(block, uml::COND_NZ, done); + UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); + generate_delay_slot_and_branch(block, compiler, desc); + + UML_LABEL(block, done); + } + else + { + UML_ROLAND(block, I2, DRC_SR, 7, 0x7f); + UML_ADD(block, I0, I2, dst_code); + UML_AND(block, I0, I0, 0x3f); + UML_STORE(block, (void *)m_local_regs, I0, I1, SIZE_DWORD, SCALE_x4); + } +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG> +void hyperstone_device::generate_addi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG> +void hyperstone_device::generate_addsi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG> +void hyperstone_device::generate_cmpbi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG> +void hyperstone_device::generate_andni(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG> +void hyperstone_device::generate_ori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + uint16_t op = desc->opptr.w[0]; + const uint32_t dst_code = (op & 0xf0) >> 4; + + if (IMM_LONG) + { + generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 + } + else + { + UML_AND(block, I1, I0, 0xf); + } + + generate_check_delay_pc(block); + + if (DST_GLOBAL) + { + UML_LOAD(block, I2, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I3, dst_code); + UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); + } + + UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK); + UML_OR(block, I5, I2, I1); + + if (DST_GLOBAL) + { + UML_MOV(block, I4, dst_code); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ADD(block, I4, I2, dst_code); + UML_AND(block, I4, I4, 0x3f); + UML_STORE(block, (void *)m_local_regs, I4, I5, SIZE_DWORD, SCALE_x4); + } +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG> +void hyperstone_device::generate_xori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::shift_type HI_N> +void hyperstone_device::generate_shrdi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_shrd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_shr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::shift_type HI_N, hyperstone_device::reg_bank DST_GLOBAL> +void hyperstone_device::generate_shri(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::shift_type HI_N> +void hyperstone_device::generate_sardi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_sard(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_sar(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::shift_type HI_N, hyperstone_device::reg_bank DST_GLOBAL> +void hyperstone_device::generate_sari(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::shift_type HI_N> +void hyperstone_device::generate_shldi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_shld(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_shl(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::shift_type HI_N, hyperstone_device::reg_bank DST_GLOBAL> +void hyperstone_device::generate_shli(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_testlz(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_rol(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_ldxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + const uint16_t op = desc->opptr.w[0]; + uint16_t next_1 = READ_OP(desc->pc + 2); + const uint16_t sub_type = (next_1 & 0x3000) >> 12; + + uint32_t extra_s; + if (next_1 & 0x8000) + { + const uint16_t next_2 = READ_OP(desc->pc + 4); + + extra_s = next_2; + extra_s |= ((next_1 & 0xfff) << 16); + + if (next_1 & 0x4000) + extra_s |= 0xf0000000; + + UML_MOV(block, mem(&m_instruction_length), (3<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 4); + } + else + { + extra_s = next_1 & 0xfff; + + if (next_1 & 0x4000) + extra_s |= 0xfffff000; + + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 2); + } + + generate_check_delay_pc(block); + + const uint32_t src_code = op & 0xf; + const uint32_t srcf_code = src_code + 1; + const uint32_t dst_code = (op & 0xf0) >> 4; + + if (!DST_GLOBAL || dst_code != SR_REGISTER) + { + if (DST_GLOBAL) + UML_LOAD(block, I4, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); + else + UML_LOAD(block, I4, (void *)m_local_regs, dst_code, SIZE_DWORD, SCALE_x4); + UML_ADD(block, I6, I4, extra_s); + } + else + { + UML_MOV(block, I6, extra_s); + } + + switch (sub_type) + { + case 0: // LDBS.A + UML_MOV(block, I0, I6); + UML_CALLH(block, *m_mem_read8); + + if (SRC_GLOBAL) + { + UML_MOV(block, I4, src_code); + UML_SEXT(block, I5, I1, SIZE_BYTE); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I0, src_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + break; + + case 1: // LDBU.A + UML_MOV(block, I0, I6); + UML_CALLH(block, *m_mem_read8); + + if (SRC_GLOBAL) + { + UML_MOV(block, I4, src_code); + UML_MOV(block, I5, I1); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I0, src_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + break; + + case 2: + UML_AND(block, I6, I6, ~1); + UML_MOV(block, I0, I6); + UML_CALLH(block, *m_mem_read16); + + if (SRC_GLOBAL) + { + UML_MOV(block, I4, src_code); + if (extra_s & 1) // LDHS.A + UML_SEXT(block, I5, I1, SIZE_WORD); + else // LDHU.A + UML_MOV(block, I5, I1); + + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I0, src_code); + UML_AND(block, I2, I2, 0x3f); + if (extra_s & 1) + { + UML_SEXT(block, I5, I1, SIZE_WORD); + UML_STORE(block, (void *)m_local_regs, I2, I5, SIZE_DWORD, SCALE_x4); + } + else + { + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + } + break; + + case 3: + { + uint32_t switch_val = extra_s & 3; + UML_AND(block, I6, I6, ~3); + switch (switch_val) + { + case 0: // LDW.A + UML_MOV(block, I0, I6); + UML_CALLH(block, *m_mem_read32); + + if (SRC_GLOBAL) + { + UML_MOV(block, I5, I1); + UML_MOV(block, I4, src_code); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I0, src_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + break; + case 1: // LDD.A + UML_MOV(block, I0, I6); + UML_CALLH(block, *m_mem_read32); + + if (SRC_GLOBAL) + { + UML_MOV(block, I5, I1); + UML_MOV(block, I4, src_code); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I3, src_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + + UML_ADD(block, I0, I6, 4); + UML_CALLH(block, *m_mem_read32); + + if (SRC_GLOBAL) + { + UML_MOV(block, I5, I1); + UML_MOV(block, I4, srcf_code); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ADD(block, I2, I3, srcf_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + break; + case 2: // LDW.IOA + UML_MOV(block, I0, I6); + UML_CALLH(block, *m_io_read32); + + if (SRC_GLOBAL) + { + UML_MOV(block, I5, I1); + UML_MOV(block, I4, src_code); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I0, src_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + break; + + case 3: // LDD.IOA + UML_MOV(block, I0, I6); + UML_CALLH(block, *m_io_read32); + + if (SRC_GLOBAL) + { + UML_MOV(block, I5, I1); + UML_MOV(block, I4, src_code); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I3, src_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + + UML_ADD(block, I0, I6, 4); + UML_CALLH(block, *m_io_read32); + + if (SRC_GLOBAL) + { + UML_MOV(block, I5, I1); + UML_MOV(block, I4, srcf_code); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ADD(block, I2, I3, srcf_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + break; + } + break; + } + } +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_ldxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_stxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +/* + const uint16_t op = desc->opptr.w[0]; + uint16_t next_1 = READ_OP(desc->pc + 2); + const uint16_t sub_type = (next_1 & 0x3000) >> 12; + + uint32_t extra_s; + if (next_1 & 0x8000) + { + const uint16_t next_2 = READ_OP(desc->pc + 4); + + extra_s = next_2; + extra_s |= ((next_1 & 0xfff) << 16); + + if (next_1 & 0x4000) + extra_s |= 0xf0000000; + + UML_MOV(block, mem(&m_instruction_length), (3<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 4); + } + else + { + extra_s = next_1 & 0xfff; + + if (next_1 & 0x4000) + extra_s |= 0xfffff000; + + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 2); + } + + generate_check_delay_pc(block); +*/ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_stxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL, hyperstone_device::sign_mode SIGNED> +void hyperstone_device::generate_mulsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_mul(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::shift_type HI_N, hyperstone_device::reg_bank DST_GLOBAL> +void hyperstone_device::generate_set(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_ldwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_lddr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_ldwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_lddp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_stwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_stdr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_stwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_stdp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::branch_condition CONDITION, hyperstone_device::condition_set COND_SET> +void hyperstone_device::generate_b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_br(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template <hyperstone_device::branch_condition CONDITION, hyperstone_device::condition_set COND_SET> +void hyperstone_device::generate_db(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_dbr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_frame(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + const uint16_t op = desc->opptr.w[0]; + + generate_check_delay_pc(block); + + UML_ROLAND(block, I1, DRC_SR, 7, 0x7f); + UML_SUB(block, I1, I1, op & 0xf); + UML_ROLINS(block, DRC_SR, I1, 25, 0xfe000000); // SET_FP(GET_FP - SRC_CODE) + UML_ROLINS(block, DRC_SR, op, 17, 0x01e00000); // SET_FL(DST_CODE) + UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); // SET_M(0) + + UML_MOV(block, I0, mem(&SP)); + UML_ADD(block, I1, I1, (op & 0xf0) >> 4); + UML_ROLAND(block, I2, I0, 30, 0x7f); + UML_ADD(block, I2, I2, (64 - 10)); + UML_SUB(block, I3, I2, I1); + UML_SEXT(block, I3, I3, SIZE_BYTE); // difference = ((SP & 0x1fc) >> 2) + (64 - 10) - ((GET_FP - SRC_CODE) + GET_FL) + + int diff_in_range, done; + UML_CMP(block, I3, -64); + UML_JMPc(block, uml::COND_L, done = compiler->m_labelnum++); + UML_CMP(block, I3, 64); + UML_JMPc(block, uml::COND_L, diff_in_range = compiler->m_labelnum++); + UML_OR(block, I3, I3, 0xffffff80); + UML_LABEL(block, diff_in_range); + + UML_CMP(block, I0, mem(&UB)); + UML_SETc(block, uml::COND_GE, I4); + UML_CMP(block, I3, 0); + UML_JMPc(block, uml::COND_GE, done); + + int push_next; + UML_LABEL(block, push_next = compiler->m_labelnum++); + UML_ROLAND(block, I2, I0, 30, 0x3f); + UML_LOAD(block, I1, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); + UML_CALLH(block, *m_mem_write32); + UML_ADD(block, I0, I0, 4); + UML_ADD(block, I3, I3, 1); + UML_TEST(block, I3, ~0); + UML_JMPc(block, uml::COND_NZ, push_next); + + UML_TEST(block, I4, ~0); + UML_EXHc(block, uml::COND_NZ, *m_exception[EXCEPTION_FRAME_ERROR], 0); + + UML_LABEL(block, done); +} + +template <hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::generate_call(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + uint16_t op = desc->opptr.w[0]; + uint16_t imm_1 = READ_OP(desc->pc + 2); + + int32_t extra_s = 0; + + if (imm_1 & 0x8000) + { + uint16_t imm_2 = READ_OP(desc->pc + 4); + + extra_s = imm_2; + extra_s |= ((imm_1 & 0x3fff) << 16); + + if (imm_1 & 0x4000) + extra_s |= 0xc0000000; + + UML_MOV(block, mem(&m_instruction_length), (3<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 4); + } + else + { + extra_s = imm_1 & 0x3fff; + + if (imm_1 & 0x4000) + extra_s |= 0xffffc000; + + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 2); + } + + UML_MOV(block, I1, extra_s); + + generate_check_delay_pc(block); + + const uint32_t src_code = op & 0xf; + uint32_t dst_code = (op & 0xf0) >> 4; + + if (!dst_code) + dst_code = 16; + + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + + if (SRC_GLOBAL) + { + if (src_code == SR_REGISTER) + UML_MOV(block, I2, 0); + else + UML_LOAD(block, I2, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I4, I3, src_code); + UML_AND(block, I5, I4, 0x3f); + UML_LOAD(block, I2, (void *)m_local_regs, I5, SIZE_DWORD, SCALE_x4); + } + + UML_AND(block, I4, DRC_PC, ~1); + UML_ROLINS(block, I4, DRC_SR, 32-S_SHIFT, 1); + + UML_ADD(block, I1, I3, dst_code); + UML_AND(block, I6, I1, 0x3f); + UML_STORE(block, (void *)m_local_regs, I6, I4, SIZE_DWORD, SCALE_x4); + + UML_ADD(block, I4, I6, 1); + UML_AND(block, I5, I4, 0x3f); + UML_STORE(block, (void *)m_local_regs, I5, DRC_SR, SIZE_DWORD, SCALE_x4); + + UML_ROLINS(block, DRC_SR, I1, 25, 0xfe000000); + UML_ROLINS(block, DRC_SR, 6, 21, 0x01e00000); + UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); + + UML_ADD(block, DRC_PC, I2, extra_s & ~1); + UML_MOV(block, mem(&m_intblock), 2); + + //TODO: add interrupt locks, errors, .... +} + + + +void hyperstone_device::generate_trap_op(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_extend(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_reserved(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_do(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + diff --git a/src/devices/cpu/e132xs/e132xsfe.cpp b/src/devices/cpu/e132xs/e132xsfe.cpp new file mode 100644 index 00000000000..be54f9342d3 --- /dev/null +++ b/src/devices/cpu/e132xs/e132xsfe.cpp @@ -0,0 +1,1302 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz +/*************************************************************************** + + e132xsfe.cpp + + Front end for Hyperstone recompiler + +***************************************************************************/ + +#include "emu.h" +#include "e132xsfe.h" +#include "32xsdefs.h" + +#define FE_FP ((m_cpu->m_global_regs[1] & 0xfe000000) >> 25) +#define FE_FL (m_cpu->m_fl_lut[((m_cpu->m_global_regs[1] >> 21) & 0xf)]) +#define DST_CODE ((op & 0xf0) >> 4) +#define SRC_CODE (op & 0x0f) +#define SR_CODE (1 << 1) + +/*************************************************************************** + INSTRUCTION PARSERS +***************************************************************************/ + +e132xs_frontend::e132xs_frontend(hyperstone_device *e132xs, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) + : drc_frontend(*e132xs, window_start, window_end, max_sequence) + , m_cpu(e132xs) +{ +} + +inline uint32_t e132xs_frontend::imm_length(opcode_desc &desc, uint16_t op) +{ + uint8_t nybble = op & 0x0f; + switch (nybble) + { + case 0: + default: + return 2; + case 1: + return 6; + case 2: + case 3: + return 4; + } +} + +inline uint16_t e132xs_frontend::read_word(opcode_desc &desc) +{ + return m_cpu->m_direct->read_word(desc.physpc, m_cpu->m_opcodexor); +} + +inline uint16_t e132xs_frontend::read_imm1(opcode_desc &desc) +{ + return m_cpu->m_direct->read_word(desc.physpc + 2, m_cpu->m_opcodexor); +} + +inline uint16_t e132xs_frontend::read_imm2(opcode_desc &desc) +{ + return m_cpu->m_direct->read_word(desc.physpc + 4, m_cpu->m_opcodexor); +} + +inline uint32_t e132xs_frontend::read_ldstxx_imm(opcode_desc &desc) +{ + const uint16_t imm1 = read_imm1(desc); + uint32_t extra_s; + if (imm1 & 0x8000) + { + extra_s = read_imm2(desc); + extra_s |= ((imm1 & 0xfff) << 16); + + if (imm1 & 0x4000) + extra_s |= 0xf0000000; + } + else + { + extra_s = imm1 & 0xfff; + + if (imm1 & 0x4000) + extra_s |= 0xfffff000; + } + return extra_s; +} + +inline uint32_t e132xs_frontend::read_limm(opcode_desc &desc, uint16_t op) +{ + static const int32_t immediate_values[16] = + { + 16, 0, 0, 0, 32, 64, 128, int32_t(0x80000000), + -8, -7, -6, -5, -4, -3, -2, -1 + }; + + uint8_t nybble = op & 0xf; + switch (nybble) + { + case 0: + return 16; + case 1: + return (read_imm1(desc) << 16) | read_imm2(desc); + case 2: + return read_imm1(desc); + case 3: + return 0xffff0000 | read_imm1(desc); + default: + return immediate_values[nybble]; + } +} + +inline int32_t e132xs_frontend::decode_pcrel(opcode_desc &desc, uint16_t op) +{ + if (op & 0x80) + { + uint16_t next = read_imm1(desc); + + desc.length = 4; + + int32_t offset = (op & 0x7f) << 16; + offset |= (next & 0xfffe); + + if (next & 1) + offset |= 0xff800000; + + return offset; + } + else + { + int32_t offset = op & 0x7e; + if (op & 1) + offset |= 0xffffff80; + return offset; + } +} + +inline int32_t e132xs_frontend::decode_call(opcode_desc &desc) +{ + const uint16_t imm_1 = read_imm1(desc); + int32_t extra_s = 0; + if (imm_1 & 0x8000) + { + desc.length = 6; + extra_s = read_imm2(desc); + extra_s |= ((imm_1 & 0x3fff) << 16); + + if (imm_1 & 0x4000) + extra_s |= 0xc0000000; + } + else + { + desc.length = 4; + extra_s = imm_1 & 0x3fff; + if (imm_1 & 0x4000) + extra_s |= 0xffffc000; + } + return extra_s; +} + + +/*------------------------------------------------- + describe - build a description of a single + instruction +-------------------------------------------------*/ + +bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) +{ + uint16_t op = desc.opptr.w[0] = read_word(desc); + + /* most instructions are 2 bytes and a single cycle */ + desc.length = 2; + desc.cycles = m_cpu->m_clock_cycles_1; + + const uint32_t fp = FE_FP; + const uint32_t gdst_code = DST_CODE; + const uint32_t gdstf_code = gdst_code + 1; + const uint32_t gsrc_code = SRC_CODE; + const uint32_t gsrcf_code = gsrc_code + 1; + const uint32_t ldst_code = (gdst_code + fp) & 0x1f; + const uint32_t ldstf_code = (gdstf_code + fp) & 0x1f; + const uint32_t lsrc_code = (gsrc_code + fp) & 0x1f; + const uint32_t lsrcf_code = (gsrcf_code + fp) & 0x1f; + const uint32_t ldst_group = 1 + (((DST_CODE + fp) & 0x20) >> 5); + const uint32_t ldstf_group = 1 + (((DST_CODE + fp + 1) & 0x20) >> 5); + const uint32_t lsrc_group = 1 + (((SRC_CODE + fp) & 0x20) >> 5); + const uint32_t lsrcf_group = 1 + ((SRC_CODE + fp + 1) >> 5); + + switch (op >> 8) + { + case 0x00: // chk global,global + desc.regin[0] |= 1 << gdst_code; + desc.regin[0] |= 1 << gsrc_code; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x01: // chk global,local + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x02: // chk local,global + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[0] |= 1 << gsrc_code; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x03: // chk local,local + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x04: // movd global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gsrcf_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdstf_code; + if (gdst_code == 0) + { + desc.regout[1] = 0xffffffff; + desc.regout[2] = 0xffffffff; + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION; + } + else + { + desc.cycles = m_cpu->m_clock_cycles_2; + } + desc.regout[0] |= SR_CODE; + break; + case 0x05: // movd global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[lsrcf_group] |= 1 << lsrcf_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdstf_code; + if (gdst_code == 0) + { + desc.regout[1] = 0xffffffff; + desc.regout[2] = 0xffffffff; + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION; + } + else + { + desc.cycles = m_cpu->m_clock_cycles_2; + } + desc.regout[0] |= SR_CODE; + break; + case 0x06: // movd local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gsrcf_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = m_cpu->m_clock_cycles_2; + break; + case 0x07: // movd local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[lsrcf_group] |= 1 << lsrcf_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = m_cpu->m_clock_cycles_2; + break; + case 0x08: // divu global,global + case 0x0c: // divs global,global + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regin[0] |= 1 << gdstf_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = 36 << m_cpu->m_clck_scale; + break; + case 0x09: // divu global,local + case 0x0d: // divs global,local + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regin[0] |= 1 << gdstf_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = 36 << m_cpu->m_clck_scale; + break; + case 0x0a: // divu local,global + case 0x0e: // divs local,global + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[ldstf_group] |= 1 << ldstf_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = 36 << m_cpu->m_clck_scale; + break; + case 0x0b: // divu local,local + case 0x0f: // divs local,local + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[ldstf_group] |= 1 << ldstf_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = 36 << m_cpu->m_clck_scale; + break; + case 0x10: // xm global,global + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin[0] |= 1 << gsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x11: // xm global,local + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x12: // xm local,global + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x13: // xm local,local + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x14: // mask global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x15: // mask global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x16: // mask local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x17: // mask local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x18: // sum global,global + case 0x1c: // sums global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + if (op & 0x4 && gsrc_code != SR_REGISTER) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x19: // sum global,local + case 0x1d: // sums global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + if (op & 0x4) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x1a: // sum local,global + case 0x1e: // sums local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + if (op & 0x4 && gsrc_code != SR_REGISTER) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x1b: // sum local,local + case 0x1f: // sums local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + if (op & 0x4) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x20: // cmp global,global + case 0x30: // cmpb global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x21: // cmp global,local + case 0x31: // cmpb global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x22: // cmp local,global + case 0x32: // cmpb local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x23: // cmp local,local + case 0x33: // cmpb local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x24: // mov global,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << (gsrc_code + 16); + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x25: // mov global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x26: // mov local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << (gsrc_code + 16); + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x27: // mov local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x28: // add global,global + case 0x2c: // adds global,global + case 0x48: // sub global,global + case 0x4c: // subs global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs + break; + case 0x29: // add global,local + case 0x2d: // adds global,local + case 0x49: // sub global,local + case 0x4d: // subs global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs + break; + case 0x2a: // add local,global + case 0x2e: // adds local,global + case 0x4a: // sub local,global + case 0x4e: // subs local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs + break; + case 0x2b: // add local,local + case 0x2f: // adds local,local + case 0x4b: // sub local,local + case 0x4f: // subs local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs + break; + case 0x34: // andn global,global + case 0x38: // or global,global + case 0x3c: // xor global,global + case 0x54: // and global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x35: // andn global,local + case 0x39: // or global,local + case 0x3d: // xor global,local + case 0x55: // and global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x36: // andn local,global + case 0x3a: // or local,global + case 0x3e: // xor local,global + case 0x56: // and local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x37: // andn local,local + case 0x3b: // or local,local + case 0x3f: // xor local,local + case 0x57: // and local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x40: // subc global,global + case 0x50: // addc global,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x41: // subc global,local + case 0x51: // addc global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x42: // subc local,global + case 0x52: // addc local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x43: // subc local,local + case 0x53: // addc local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x44: // not global,global + case 0x58: // neg global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x45: // not global,local + case 0x59: // neg global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x46: // not local,global + case 0x5a: // neg local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x47: // not local,local + case 0x5b: // neg local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x5c: // negs global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x5d: // negs global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x5e: // negs local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x5f: // negs local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x60: // cmpi global,simm + case 0x70: // cmpbi global,simm + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x61: // cmpi global,limm + case 0x71: // cmpbi global,limm + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.length = imm_length(desc, op); + break; + case 0x62: // cmpi local,simm + case 0x72: // cmpbi local,simm + desc.regin[0] |= SR_CODE; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x63: // cmpi local,limm + case 0x73: // cmpbi local,limm + desc.regin[0] |= SR_CODE; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.length = imm_length(desc, op); + break; + case 0x64: // movi global,simm + desc.regin[0] |= SR_CODE; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << (gdst_code + 16); + desc.regout[0] |= SR_CODE; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + if (gdst_code == PC_REGISTER) + { + desc.targetpc = op & 0xf; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } + break; + case 0x65: // movi global,limm + desc.regin[0] |= SR_CODE; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << (gdst_code + 16); + desc.regout[0] |= SR_CODE; + desc.length = imm_length(desc, op); + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + if (gdst_code == PC_REGISTER) + { + desc.targetpc = read_limm(desc, op); + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } + break; + case 0x66: // movi local,simm + desc.regin[0] |= SR_CODE; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x67: // movi local,limm + desc.regin[0] |= SR_CODE; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.length = imm_length(desc, op); + break; + case 0x68: // addi global,simm + case 0x6c: // addsi global,simm + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi + if (gdst_code == PC_REGISTER) + { + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } + break; + case 0x69: // addi global,limm + case 0x6d: // addsi global,limm + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.length = imm_length(desc, op); + if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi + if (gdst_code == PC_REGISTER) + { + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } + break; + case 0x6a: // addi local,simm + case 0x6e: // addsi local,simm + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi + break; + case 0x6b: // addi local,limm + case 0x6f: // addsi local,limm + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.length = imm_length(desc, op); + if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi + break; + case 0x74: // andni global,simm + case 0x78: // ori global,simm + case 0x7c: // xori global,simm + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + if (gdst_code == PC_REGISTER) + { + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } + break; + case 0x75: // andni global,limm + case 0x79: // ori global,limm + case 0x7d: // xori global,limm + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.length = imm_length(desc, op); + if (gdst_code == PC_REGISTER) + { + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } + break; + case 0x76: // andni local,simm + case 0x7a: // ori local,simm + case 0x7e: // xori local,simm + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x77: // andni local,limm + case 0x7b: // ori local,limm + case 0x7f: // xori local,limm + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.length = imm_length(desc, op); + break; + case 0x80: case 0x81: // shrdi + case 0x84: case 0x85: // sardi + case 0x88: case 0x89: // shldi + desc.regin[0] |= SR_CODE; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = m_cpu->m_clock_cycles_2; + break; + case 0x82: // shrd + case 0x86: // sard + case 0x8a: // shld + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = m_cpu->m_clock_cycles_2; + break; + case 0x83: // shr + case 0x87: // sar + case 0x8b: // shl + case 0x8f: // rol + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x8c: case 0x8d: // reserved + return false; + case 0x8e: // testlz + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + break; + case 0x90: // ldxx1 global,global + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_READS_MEMORY; + if (gdst_code == PC_REGISTER) + { + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } + break; + } + case 0x91: // ldxx1 global,local + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regout[lsrc_group] |= 1 << lsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[lsrcf_group] |= 1 << lsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_READS_MEMORY; + if (gdst_code == PC_REGISTER) + { + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } + break; + } + case 0x92: // ldxx1 local,global + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= 1 << gsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_READS_MEMORY; + break; + } + case 0x93: // ldxx1 local,local + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[lsrc_group] |= 1 << lsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[lsrcf_group] |= 1 << lsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_READS_MEMORY; + break; + } + case 0x94: // ldxx2 global,global + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_READS_MEMORY; + if (gdst_code == PC_REGISTER) + { + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } + break; + } + case 0x95: // ldxx2 global,local + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[lsrc_group] |= 1 << lsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[lsrcf_group] |= 1 << lsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_READS_MEMORY; + if (gdst_code == PC_REGISTER) + { + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } + break; + } + case 0x96: // ldxx2 local,global + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= 1 << gsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_READS_MEMORY; + break; + } + case 0x97: // ldxx2 local,local + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[lsrc_group] |= 1 << lsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[lsrcf_group] |= 1 << lsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_READS_MEMORY; + break; + } + case 0x98: // stxx1 global,global + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= 1 << gdst_code; + desc.regin[0] |= 1 << gsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + } + case 0x99: // stxx1 global,local + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regin[lsrc_group] |= 1 << lsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[lsrcf_group] |= 1 << lsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + } + case 0x9a: // stxx1 local,global + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[0] |= 1 << gsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + } + case 0x9b: // stxx1 local,local + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[lsrc_group] |= 1 << lsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[lsrcf_group] |= 1 << lsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + } + case 0x9c: // stxx2 global,global + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= 1 << gdst_code; + desc.regin[0] |= 1 << gsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code; + desc.regout[0] |= 1 << gdst_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + } + case 0x9d: // stxx2 global,local + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regin[lsrc_group] |= 1 << lsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[lsrcf_group] |= 1 << lsrcf_code; + desc.regout[0] |= 1 << gdst_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + } + case 0x9e: // stxx2 local,global + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[0] |= 1 << gsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code; + desc.regout[ldst_group] |= 1 << ldst_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + } + case 0x9f: // stxx2 local,local + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[lsrc_group] |= 1 << lsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[lsrcf_group] |= 1 << lsrcf_code; + desc.regout[ldst_group] |= 1 << ldst_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + } + case 0xa0: // shri global (lo n) + case 0xa1: // shri global (hi n) + case 0xa4: // sari global (lo n) + case 0xa5: // sari global (hi n) + case 0xa8: // shli global (lo n) + case 0xa9: // shli global (hi n) + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0xa2: // shri local (lo n) + case 0xa3: // shri local (hi n) + case 0xa6: // sari local (lo n) + case 0xa7: // sari local (hi n) + case 0xaa: // shli local (lo n) + case 0xab: // shli local (hi n) + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0xac: case 0xad: case 0xae: case 0xaf: // reserved + return false; + case 0xb0: // mulu global,global + case 0xb4: // muls global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = m_cpu->m_clock_cycles_4; + break; + case 0xb1: // mulu global,local + case 0xb5: // muls global,local + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = m_cpu->m_clock_cycles_4; + break; + case 0xb2: // mulu local,global + case 0xb6: // muls local,global + desc.regin[0] |= 1 << gsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = m_cpu->m_clock_cycles_4; + break; + case 0xb3: // mulu local,local + case 0xb7: // muls local,local + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = m_cpu->m_clock_cycles_4; + break; + case 0xb8: // set global (lo n) + case 0xb9: // set global (hi n) + desc.regin[0] |= SR_CODE; + desc.regout[0] |= 1 << gdst_code; + break; + case 0xba: // set local (lo n) + case 0xbb: // set local (hi n) + desc.regout[ldst_group] |= 1 << ldst_code; + break; + case 0xbc: // mul global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.cycles = 3 << m_cpu->m_clck_scale; + break; + case 0xbd: // muls global,local + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.cycles = 3 << m_cpu->m_clck_scale; + break; + case 0xbe: // muls local,global + desc.regin[0] |= 1 << gsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.cycles = 3 << m_cpu->m_clck_scale; + break; + case 0xbf: // mulu local,local + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.cycles = 3 << m_cpu->m_clck_scale; + break; + case 0xc0: case 0xc1: case 0xc2: case 0xc3: // software + case 0xc4: case 0xc5: case 0xc6: case 0xc7: // software + case 0xc8: case 0xc9: case 0xca: case 0xcb: // software + case 0xcc: case 0xcd: // software + { + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[lsrcf_group] |= 1 << lsrcf_code; + + const uint32_t reg = FE_FP + FE_FL; + desc.regout[1 + (((reg + 0) & 0x20) >> 5)] |= 1 << ((reg + 0) & 0x1f); + desc.regout[1 + (((reg + 1) & 0x20) >> 5)] |= 1 << ((reg + 1) & 0x1f); + desc.regout[1 + (((reg + 2) & 0x20) >> 5)] |= 1 << ((reg + 2) & 0x1f); + desc.regout[1 + (((reg + 3) & 0x20) >> 5)] |= 1 << ((reg + 3) & 0x1f); + desc.regout[1 + (((reg + 4) & 0x20) >> 5)] |= 1 << ((reg + 4) & 0x1f); + + desc.regout[0] |= SR_CODE; + + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + break; + } + case 0xce: // extend - 4 bytes + desc.regin[0] |= SR_CODE; + desc.regin[0] |= (3 << 14); // global regs 14, 15 + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= (3 << 14); // global regs 14, 15 + break; + case 0xcf: // do + return false; + case 0xd0: // ldwr global + case 0xd4: // ldwp global + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= 1 << gsrc_code; + if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; + desc.flags |= OPFLAG_READS_MEMORY; + break; + case 0xd1: // ldwr local + case 0xd5: // ldwp local + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[lsrc_group] |= 1 << lsrc_code; + if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; + desc.flags |= OPFLAG_READS_MEMORY; + break; + case 0xd2: // lddr global + case 0xd6: // lddp global + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= 1 << gsrc_code; + desc.regout[0] |= 1 << gsrcf_code; + if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; + desc.flags |= OPFLAG_READS_MEMORY; + break; + case 0xd3: // lddr local + case 0xd7: // lddp local + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[lsrc_group] |= 1 << lsrc_code; + desc.regout[lsrcf_group] |= 1 << lsrcf_code; + if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; + desc.flags |= OPFLAG_READS_MEMORY; + break; + case 0xd8: // stwr global + case 0xdc: // stwp global + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[0] |= 1 << gsrc_code; + if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + case 0xd9: // stwr local + case 0xdd: // stwp local + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[lsrc_group] |= 1 << lsrc_code; + if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + case 0xda: // stdr global + case 0xde: // stdp global + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gsrcf_code; + if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + case 0xdb: // stdr local + case 0xdf: // stdp local + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[lsrcf_group] |= 1 << lsrcf_code; + if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + case 0xe0: case 0xe1: case 0xe2: case 0xe3: // dbv, dbnv, dbe, dbne - could be 4 bytes (pcrel) + case 0xe4: case 0xe5: case 0xe6: case 0xe7: // dbc, dbnc, dbse, dbht - could be 4 bytes (pcrel) + case 0xe8: case 0xe9: case 0xea: case 0xeb: // dbn, dbnn, dblt, dbgt - could be 4 bytes (pcrel) + desc.regin[0] |= SR_CODE; + desc.targetpc = desc.pc + decode_pcrel(desc, op); + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.delayslots = 1; + break; + case 0xec: // dbr - could be 4 bytes (pcrel) + desc.targetpc = desc.pc + decode_pcrel(desc, op); + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.delayslots = 1; + break; + case 0xed: // frame + desc.regin[0] |= SR_CODE; + desc.regin[1] = 0xffffffff; + desc.regin[2] = 0xffffffff; + desc.regout[0] |= SR_CODE; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_END_SEQUENCE; + break; + case 0xee: // call global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.targetpc = desc.pc + decode_call(desc); + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + break; + case 0xef: // call local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.targetpc = desc.pc + decode_call(desc); + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + break; + case 0xf0: case 0xf1: case 0xf2: case 0xf3: // bv, bnv, be, bne + case 0xf4: case 0xf5: case 0xf6: case 0xf7: // bc, bnc, bse, bht + case 0xf8: case 0xf9: case 0xfa: case 0xfb: // bn, bnn, blt, bgt + desc.regin[0] |= SR_CODE; + desc.targetpc = desc.pc + decode_pcrel(desc, op); + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + break; + case 0xfc: // br + desc.targetpc = desc.pc + decode_pcrel(desc, op); + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + break; + case 0xfd: case 0xfe: case 0xff: // trap + desc.regin[0] |= SR_CODE; + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION; + break; + } + return true; +} diff --git a/src/devices/cpu/e132xs/e132xsfe.h b/src/devices/cpu/e132xs/e132xsfe.h new file mode 100644 index 00000000000..7463fd964d0 --- /dev/null +++ b/src/devices/cpu/e132xs/e132xsfe.h @@ -0,0 +1,34 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz +#ifndef MAME_CPU_E132XS_E132XSFE_H +#define MAME_CPU_E132XS_E132XSFE_H + +#pragma once + +#include "e132xs.h" +#include "cpu/drcfe.h" + +class e132xs_frontend : public drc_frontend +{ +public: + e132xs_frontend(hyperstone_device *e132xs, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + void flush(); + +protected: + // required overrides + virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override; + +private: + inline uint32_t imm_length(opcode_desc &desc, uint16_t op); + inline uint16_t read_word(opcode_desc &desc); + inline uint16_t read_imm1(opcode_desc &desc); + inline uint16_t read_imm2(opcode_desc &desc); + inline uint32_t read_ldstxx_imm(opcode_desc &desc); + inline uint32_t read_limm(opcode_desc &desc, uint16_t op); + inline int32_t decode_pcrel(opcode_desc &desc, uint16_t op); + inline int32_t decode_call(opcode_desc &desc); + + hyperstone_device *m_cpu; +}; + +#endif /* MAME_CPU_E132XS_E132XSFE_H */ diff --git a/src/devices/cpu/e132xs/e132xsop.hxx b/src/devices/cpu/e132xs/e132xsop.hxx index acaa1d99aa9..9d55b78d233 100644 --- a/src/devices/cpu/e132xs/e132xsop.hxx +++ b/src/devices/cpu/e132xs/e132xsop.hxx @@ -51,7 +51,7 @@ void hyperstone_device::hyperstone_movd() const uint32_t old_s = SR & S_MASK; const uint32_t old_l = SR & L_MASK; PC = sreg & ~1; - SR = (sregf & 0xffe00000) | ((sreg & 0x01) << 18 ) | (sregf & 0x3ffff); + SR = (sregf & 0xffe3ffff) | ((sreg & 0x01) << 18); if (m_intblock < 1) m_intblock = 1; @@ -81,6 +81,8 @@ void hyperstone_device::hyperstone_movd() } else if (SRC_GLOBAL && (src_code == SR_REGISTER)) // Rd doesn't denote PC and Rs denotes SR { + SR |= Z_MASK; + SR &= ~N_MASK; if (DST_GLOBAL) { set_global_register(dst_code, 0); @@ -91,13 +93,16 @@ void hyperstone_device::hyperstone_movd() m_local_regs[dst_code] = 0; m_local_regs[dstf_code] = 0; } - SR |= Z_MASK; - SR &= ~N_MASK; m_icount -= m_clock_cycles_2; } else // Rd doesn't denote PC and Rs doesn't denote SR { + SR &= ~(Z_MASK | N_MASK); + if (concat_64(sreg, sregf) == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(sreg); + if (DST_GLOBAL) { set_global_register(dst_code, sreg); @@ -109,11 +114,6 @@ void hyperstone_device::hyperstone_movd() m_local_regs[dstf_code] = sregf; } - SR &= ~(Z_MASK | N_MASK); - if (concat_64(sreg, sregf) == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(sreg); - m_icount -= m_clock_cycles_2; } } @@ -152,12 +152,12 @@ void hyperstone_device::hyperstone_divsu() { /* TODO: add quotient overflow */ const uint32_t quotient = SIGNED ? (uint32_t)((int64_t)dividend / (int32_t)sreg) : (dividend / sreg); - (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = SIGNED ? (uint32_t)((int64_t)dividend % (int32_t)sreg) : (dividend % sreg); - (DST_GLOBAL ? m_global_regs : m_local_regs)[dstf_code] = (uint32_t)quotient; SR &= ~(V_MASK | Z_MASK | N_MASK); if (quotient == 0) SR |= Z_MASK; SR |= SIGN_TO_N(quotient); + (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = SIGNED ? (uint32_t)((int64_t)dividend % (int32_t)sreg) : (dividend % sreg); + (DST_GLOBAL ? m_global_regs : m_local_regs)[dstf_code] = (uint32_t)quotient; } m_icount -= 36 << m_clck_scale; @@ -219,20 +219,19 @@ template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SR void hyperstone_device::hyperstone_mask() { const uint32_t extra_u = decode_const(); - check_delay_PC(); - const uint32_t dreg = (SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]) & extra_u; - if (DST_GLOBAL) - set_global_register(DST_CODE, dreg); - else - m_local_regs[(DST_CODE + GET_FP) & 0x3f] = dreg; if (dreg == 0) SR |= Z_MASK; else SR &= ~Z_MASK; + if (DST_GLOBAL) + set_global_register(DST_CODE, dreg); + else + m_local_regs[(DST_CODE + GET_FP) & 0x3f] = dreg; + m_icount -= m_clock_cycles_1; } @@ -240,28 +239,28 @@ template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SR void hyperstone_device::hyperstone_sum() { const uint32_t extra_u = decode_const(); - check_delay_PC(); - const uint32_t fp = GET_FP; const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f); const uint32_t sreg = SRC_GLOBAL ? ((src_code == SR_REGISTER) ? GET_C : m_global_regs[src_code]) : m_local_regs[src_code]; const uint64_t tmp = uint64_t(sreg) + uint64_t(extra_u); - SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK); + SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK); SR |= (tmp & 0x100000000) >> 32; SR |= ((sreg ^ tmp) & (extra_u ^ tmp) & 0x80000000) >> 28; const uint32_t dreg = sreg + extra_u; + + if (dreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) set_global_register(DST_CODE, dreg); else m_local_regs[(DST_CODE + fp) & 0x3f] = dreg; - if (dreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); m_icount -= m_clock_cycles_1; } @@ -278,22 +277,25 @@ void hyperstone_device::hyperstone_sums() const int32_t sreg = int32_t(SRC_GLOBAL ? ((src_code == SR_REGISTER) ? GET_C : m_global_regs[src_code]) : m_local_regs[src_code]); const int64_t tmp = int64_t(sreg) + int64_t(extra_s); + + SR &= ~(Z_MASK | N_MASK | V_MASK); SR |= ((sreg ^ tmp) & (extra_s ^ tmp) & 0x80000000) >> 28; //#if SETCARRYS -// CHECK_C(tmp); +// SR |= (tmp & 0x100000000) >> 32; //#endif const int32_t res = sreg + extra_s; - if (DST_GLOBAL) - set_global_register(DST_CODE, res); - else - m_local_regs[(DST_CODE + fp) & 0x3f] = res; if (res == 0) SR |= Z_MASK; SR |= SIGN_TO_N(res); + if (DST_GLOBAL) + set_global_register(DST_CODE, res); + else + m_local_regs[(DST_CODE + fp) & 0x3f] = res; + m_icount -= m_clock_cycles_1; if ((SR & V_MASK) && src_code != SR_REGISTER) @@ -318,15 +320,14 @@ void hyperstone_device::hyperstone_cmp() SR &= ~(Z_MASK | N_MASK | V_MASK | C_MASK); SR |= ((tmp ^ dreg) & (dreg ^ sreg) & 0x80000000) >> 28; - if (dreg == sreg) + if (dreg < sreg) + SR |= C_MASK; + else if (dreg == sreg) SR |= Z_MASK; if (int32_t(dreg) < int32_t(sreg)) SR |= N_MASK; - if (dreg < sreg) - SR |= C_MASK; - m_icount -= m_clock_cycles_1; } @@ -346,6 +347,11 @@ void hyperstone_device::hyperstone_mov() const uint32_t src_code = SRC_GLOBAL ? (SRC_CODE + (h ? 16 : 0)) : ((SRC_CODE + fp) & 0x3f); const uint32_t sreg = SRC_GLOBAL ? ((WRITE_ONLY_REGMASK & (1 << src_code)) ? 0 : get_global_register(src_code)) : m_local_regs[src_code]; + SR &= ~(Z_MASK | N_MASK); + if (sreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(sreg); + if (DST_GLOBAL) { const uint32_t dst_code = DST_CODE + (h ? 16 : 0); @@ -358,11 +364,6 @@ void hyperstone_device::hyperstone_mov() { m_local_regs[(DST_CODE + fp) & 0x3f] = sreg; } - - SR &= ~(Z_MASK | N_MASK); - if (sreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(sreg); } m_icount -= m_clock_cycles_1; @@ -388,6 +389,11 @@ void hyperstone_device::hyperstone_add() SR |= ((sreg ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28; dreg += sreg; + + if (dreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) { set_global_register(dst_code, dreg); @@ -400,10 +406,6 @@ void hyperstone_device::hyperstone_add() m_local_regs[dst_code] = dreg; } - if (dreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); - m_icount -= m_clock_cycles_1; } @@ -424,19 +426,20 @@ void hyperstone_device::hyperstone_adds() SR |= ((sreg ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28; //#if SETCARRYS -// CHECK_C(tmp); +// SR |= (tmp & 0x100000000) >> 32; //#endif const int32_t res = sreg + dreg; - if (DST_GLOBAL) - set_global_register(dst_code, res); - else - m_local_regs[dst_code] = res; if (res == 0) SR |= Z_MASK; SR |= SIGN_TO_N(res); + if (DST_GLOBAL) + set_global_register(dst_code, res); + else + m_local_regs[dst_code] = res; + m_icount -= m_clock_cycles_1; if (SR & V_MASK) @@ -473,16 +476,17 @@ void hyperstone_device::hyperstone_andn() const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f); const uint32_t sreg = SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]; const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] & ~sreg; - if (DST_GLOBAL) - set_global_register(dst_code, dreg); - else - m_local_regs[dst_code] = dreg; if (dreg == 0) SR |= Z_MASK; else SR &= ~Z_MASK; + if (DST_GLOBAL) + set_global_register(dst_code, dreg); + else + m_local_regs[dst_code] = dreg; + m_icount -= m_clock_cycles_1; } @@ -494,16 +498,17 @@ void hyperstone_device::hyperstone_or() const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f); const uint32_t sreg = SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]; const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] | sreg; - if (DST_GLOBAL) - set_global_register(dst_code, dreg); - else - m_local_regs[dst_code] = dreg; if (dreg == 0) SR |= Z_MASK; else SR &= ~Z_MASK; + if (DST_GLOBAL) + set_global_register(dst_code, dreg); + else + m_local_regs[dst_code] = dreg; + m_icount -= m_clock_cycles_1; } @@ -515,16 +520,17 @@ void hyperstone_device::hyperstone_xor() const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f); const uint32_t sreg = SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]; const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] ^ sreg; - if (DST_GLOBAL) - set_global_register(dst_code, dreg); - else - m_local_regs[dst_code] = dreg; if (dreg == 0) SR |= Z_MASK; else SR &= ~Z_MASK; + if (DST_GLOBAL) + set_global_register(dst_code, dreg); + else + m_local_regs[dst_code] = dreg; + m_icount -= m_clock_cycles_1; } @@ -563,15 +569,15 @@ void hyperstone_device::hyperstone_subc() dreg -= sreg_c; } + if (old_z && dreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) set_global_register(DST_CODE, dreg); else m_local_regs[dst_code] = dreg; - if (old_z && dreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); - m_icount -= m_clock_cycles_1; } @@ -581,16 +587,17 @@ void hyperstone_device::hyperstone_not() check_delay_PC(); const uint32_t dreg = ~(SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]); - if (DST_GLOBAL) - set_global_register(DST_CODE, dreg); - else - m_local_regs[(DST_CODE + GET_FP) & 0x3f] = dreg; if (dreg == 0) SR |= Z_MASK; else SR &= ~Z_MASK; + if (DST_GLOBAL) + set_global_register(DST_CODE, dreg); + else + m_local_regs[(DST_CODE + GET_FP) & 0x3f] = dreg; + m_icount -= m_clock_cycles_1; } @@ -609,11 +616,15 @@ void hyperstone_device::hyperstone_sub() const uint64_t tmp = uint64_t(dreg) - uint64_t(sreg); SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK); - SR |= (tmp & 0x100000000) >> 32; SR |= ((tmp ^ dreg) & (dreg ^ sreg) & 0x80000000) >> 28; dreg -= sreg; + + if (dreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) { set_global_register(dst_code, dreg); @@ -626,10 +637,6 @@ void hyperstone_device::hyperstone_sub() m_local_regs[dst_code] = dreg; } - if (dreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); - m_icount -= m_clock_cycles_1; } @@ -649,21 +656,22 @@ void hyperstone_device::hyperstone_subs() SR &= ~(V_MASK | Z_MASK | N_MASK); //#ifdef SETCARRYS -// CHECK_C(tmp); +// SR |= (tmp & 0x100000000) >> 32; //#endif SR |= ((tmp ^ dreg) & (dreg ^ sreg) & 0x80000000) >> 28; const int32_t res = dreg - sreg; - if (DST_GLOBAL) - set_global_register(dst_code, res); - else - m_local_regs[dst_code] = res; if (res == 0) SR |= Z_MASK; SR |= SIGN_TO_N(res); + if (DST_GLOBAL) + set_global_register(dst_code, res); + else + m_local_regs[dst_code] = res; + m_icount -= m_clock_cycles_1; if (SR & V_MASK) @@ -693,27 +701,27 @@ void hyperstone_device::hyperstone_addc() if (SRC_GLOBAL && (src_code == SR_REGISTER)) { tmp = uint64_t(dreg) + uint64_t(c); - SR |= ((dreg ^ tmp) & (c ^ tmp) & 0x80000000) >> 28; + SR |= ((dreg ^ tmp) & tmp & 0x80000000) >> 28; dreg += c; } else { tmp = uint64_t(sreg) + uint64_t(dreg) + uint64_t(c); - SR |= ((sreg ^ tmp) & (dreg ^ tmp) & (c ^ tmp) & 0x80000000) >> 28; + SR |= ((sreg ^ tmp) & (dreg ^ tmp) & tmp & 0x80000000) >> 28; dreg += sreg + c; } SR |= (tmp & 0x100000000) >> 32; + if (dreg == 0 && old_z) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) set_global_register(dst_code, dreg); else m_local_regs[dst_code] = dreg; - if (dreg == 0 && old_z) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); - m_icount -= m_clock_cycles_1; } @@ -725,16 +733,17 @@ void hyperstone_device::hyperstone_and() const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f); const uint32_t sreg = SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]; const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] & sreg; - if (DST_GLOBAL) - set_global_register(dst_code, dreg); - else - m_local_regs[dst_code] = dreg; if (dreg == 0) SR |= Z_MASK; else SR &= ~Z_MASK; + if (DST_GLOBAL) + set_global_register(dst_code, dreg); + else + m_local_regs[dst_code] = dreg; + m_icount -= m_clock_cycles_1; } @@ -754,15 +763,16 @@ void hyperstone_device::hyperstone_neg() SR |= (tmp & sreg & 0x80000000) >> 28; const uint32_t dreg = -sreg; - if (DST_GLOBAL) - set_global_register(DST_CODE, dreg); - else - m_local_regs[(DST_CODE + fp) & 0x3f] = dreg; if (dreg == 0) SR |= Z_MASK; SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) + set_global_register(DST_CODE, dreg); + else + m_local_regs[(DST_CODE + fp) & 0x3f] = dreg; + m_icount -= m_clock_cycles_1; } @@ -783,19 +793,20 @@ void hyperstone_device::hyperstone_negs() SR |= V_MASK; //#if SETCARRYS -// CHECK_C(tmp); +// SR |= (tmp & 0x100000000) >> 32; //#endif const int32_t res = -sreg; - if (DST_GLOBAL) - set_global_register(DST_CODE, res); - else - m_local_regs[(DST_CODE + fp) & 0x3f] = res; if (res == 0) SR |= Z_MASK; SR |= SIGN_TO_N(res); + if (DST_GLOBAL) + set_global_register(DST_CODE, res); + else + m_local_regs[(DST_CODE + fp) & 0x3f] = res; + m_icount -= m_clock_cycles_1; if (GET_V) @@ -814,7 +825,7 @@ void hyperstone_device::hyperstone_cmpi() check_delay_PC(); if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f); const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code]; @@ -823,15 +834,14 @@ void hyperstone_device::hyperstone_cmpi() uint64_t tmp = (uint64_t)dreg - (uint64_t)imm; SR |= ((tmp ^ dreg) & (dreg ^ imm) & 0x80000000) >> 28; - if (dreg == imm) + if (dreg < imm) + SR |= C_MASK; + else if (dreg == imm) SR |= Z_MASK; if ((int32_t)dreg < (int32_t)imm) SR |= N_MASK; - if (dreg < imm) - SR |= C_MASK; - m_icount -= m_clock_cycles_1; } @@ -844,7 +854,7 @@ void hyperstone_device::hyperstone_movi() check_delay_PC(); if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; const bool h = (SR & H_MASK) != 0; if (DST_GLOBAL && h && !(SR & S_MASK)) @@ -853,6 +863,15 @@ void hyperstone_device::hyperstone_movi() } else { + SR &= ~(Z_MASK | N_MASK); + if (imm == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(imm); + +#if MISSIONCRAFT_FLAGS + SR &= ~V_MASK; // or V undefined ? +#endif + if (DST_GLOBAL) { const uint32_t dst_code = DST_CODE + (h ? 16 : 0); @@ -865,15 +884,6 @@ void hyperstone_device::hyperstone_movi() { m_local_regs[(DST_CODE + GET_FP) & 0x3f] = imm; } - - SR &= ~(Z_MASK | N_MASK); - if (imm == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(imm); - -#if MISSIONCRAFT_FLAGS - SR &= ~V_MASK; // or V undefined ? -#endif } m_icount -= m_clock_cycles_1; @@ -893,7 +903,7 @@ void hyperstone_device::hyperstone_addi() if (!N_OP_MASK) imm = GET_C & (((SR & Z_MASK) ? 0 : 1) | (dreg & 0x01)); else if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK); @@ -903,6 +913,11 @@ void hyperstone_device::hyperstone_addi() SR |= ((imm ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28; dreg += imm; + + if (dreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) { set_global_register(dst_code, dreg); @@ -915,10 +930,6 @@ void hyperstone_device::hyperstone_addi() m_local_regs[dst_code] = dreg; } - if (dreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); - m_icount -= m_clock_cycles_1; } @@ -941,7 +952,7 @@ void hyperstone_device::hyperstone_addsi() } else { - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; } } else @@ -960,20 +971,20 @@ void hyperstone_device::hyperstone_addsi() SR |= ((imm ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28; //#if SETCARRYS -// CHECK_C(tmp); +// SR |= (tmp & 0x100000000) >> 32; //#endif const int32_t res = imm + (int32_t)dreg; + if (res == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(res); + if (DST_GLOBAL) set_global_register(dst_code, res); else m_local_regs[dst_code] = res; - if (res == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(res); - m_icount -= m_clock_cycles_1; if (SR & V_MASK) @@ -1012,7 +1023,7 @@ void hyperstone_device::hyperstone_cmpbi() } else { - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; } } @@ -1049,13 +1060,19 @@ void hyperstone_device::hyperstone_andni() if (N_OP_MASK == 0x10f) imm = 0x7fffffff; // bit 31 = 0, others = 1 else if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; uint32_t dreg; if (DST_GLOBAL) { const uint32_t dst_code = DST_CODE; dreg = m_global_regs[dst_code] & ~imm; + + if (dreg == 0) + SR |= Z_MASK; + else + SR &= ~Z_MASK; + set_global_register(dst_code, dreg); } else @@ -1063,12 +1080,12 @@ void hyperstone_device::hyperstone_andni() const uint32_t dst_code = (DST_CODE + GET_FP) & 0x3f; dreg = m_local_regs[dst_code] & ~imm; m_local_regs[dst_code] = dreg; - } - if (dreg == 0) - SR |= Z_MASK; - else - SR &= ~Z_MASK; + if (dreg == 0) + SR |= Z_MASK; + else + SR &= ~Z_MASK; + } m_icount -= m_clock_cycles_1; } @@ -1083,24 +1100,30 @@ void hyperstone_device::hyperstone_ori() check_delay_PC(); if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; - uint32_t dreg; + imm = m_op & 0x0f; + if (DST_GLOBAL) { const uint32_t dst_code = DST_CODE; - dreg = m_global_regs[dst_code] | imm; + const uint32_t dreg = m_global_regs[dst_code] | imm; + + if (dreg) + SR &= ~Z_MASK; + else + SR |= Z_MASK; + set_global_register(dst_code, dreg); } else { const uint32_t dst_code = (DST_CODE + GET_FP) & 0x3f; - dreg = m_local_regs[dst_code] |= imm; - } + const uint32_t dreg = m_local_regs[dst_code] |= imm; - if (dreg) - SR &= ~Z_MASK; - else - SR |= Z_MASK; + if (dreg) + SR &= ~Z_MASK; + else + SR |= Z_MASK; + } m_icount -= m_clock_cycles_1; } @@ -1115,24 +1138,30 @@ void hyperstone_device::hyperstone_xori() check_delay_PC(); if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; uint32_t dreg; if (DST_GLOBAL) { const uint32_t dst_code = DST_CODE; dreg = m_global_regs[dst_code] ^ imm; + + if (dreg) + SR &= ~Z_MASK; + else + SR |= Z_MASK; + set_global_register(dst_code, dreg); } else { const uint32_t dst_code = (DST_CODE + GET_FP) & 0x3f; dreg = m_local_regs[dst_code] ^= imm; - } - if (dreg) - SR &= ~Z_MASK; - else - SR |= Z_MASK; + if (dreg) + SR &= ~Z_MASK; + else + SR |= Z_MASK; + } m_icount -= m_clock_cycles_1; } @@ -1164,13 +1193,13 @@ void hyperstone_device::hyperstone_shrdi() high_order = extract_64hi(val); - m_local_regs[dst_code] = high_order; - m_local_regs[dstf_code] = extract_64lo(val); - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(high_order); + m_local_regs[dst_code] = high_order; + m_local_regs[dstf_code] = extract_64lo(val); + m_icount -= m_clock_cycles_2; } @@ -1203,13 +1232,13 @@ void hyperstone_device::hyperstone_shrd() val >>= n; } - m_local_regs[dst_code] = (uint32_t)(val >> 32); - m_local_regs[dstf_code] = (uint32_t)val; - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(m_local_regs[dst_code]); + m_local_regs[dst_code] = (uint32_t)(val >> 32); + m_local_regs[dstf_code] = (uint32_t)val; + m_icount -= m_clock_cycles_2; } @@ -1229,11 +1258,12 @@ void hyperstone_device::hyperstone_shr() dreg >>= n; - m_local_regs[dst_code] = dreg; if (dreg == 0) SR |= Z_MASK; SR |= SIGN_TO_N(dreg); + m_local_regs[dst_code] = dreg; + m_icount -= m_clock_cycles_1; } @@ -1261,13 +1291,13 @@ void hyperstone_device::hyperstone_sardi() val |= 0xffffffff00000000U << (32 - n); } - m_local_regs[dst_code] = (uint32_t)(val >> 32); - m_local_regs[dstf_code] = (uint32_t)val; - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(m_local_regs[dst_code]); + m_local_regs[dst_code] = (uint32_t)(val >> 32); + m_local_regs[dstf_code] = (uint32_t)val; + m_icount -= m_clock_cycles_2; } @@ -1306,12 +1336,13 @@ void hyperstone_device::hyperstone_sard() } } - m_local_regs[dst_code] = (uint32_t)(val >> 32); - m_local_regs[dstf_code] = (uint32_t)val; if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(m_local_regs[dst_code]); + m_local_regs[dst_code] = (uint32_t)(val >> 32); + m_local_regs[dstf_code] = (uint32_t)val; + m_icount -= m_clock_cycles_2; } @@ -1339,12 +1370,12 @@ void hyperstone_device::hyperstone_sar() ret |= 0xffffffff << (32 - n); } - m_local_regs[dst_code] = ret; - if (ret == 0) SR |= Z_MASK; SR |= SIGN_TO_N(ret); + m_local_regs[dst_code] = ret; + m_icount -= m_clock_cycles_1; } @@ -1378,13 +1409,13 @@ void hyperstone_device::hyperstone_shldi() high_order = extract_64hi(val); - m_local_regs[dst_code] = high_order; - m_local_regs[dstf_code] = extract_64lo(val); - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(high_order); + m_local_regs[dst_code] = high_order; + m_local_regs[dstf_code] = extract_64lo(val); + m_icount -= m_clock_cycles_2; } @@ -1423,13 +1454,13 @@ void hyperstone_device::hyperstone_shld() val <<= n; - m_local_regs[dst_code] = extract_64hi(val); - m_local_regs[dstf_code] = extract_64lo(val); - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(m_local_regs[dst_code]); + m_local_regs[dst_code] = extract_64hi(val); + m_local_regs[dstf_code] = extract_64lo(val); + m_icount -= m_clock_cycles_2; } @@ -1453,12 +1484,12 @@ void hyperstone_device::hyperstone_shl() if (((base & mask) && (!(ret & 0x80000000))) || (((base & mask) ^ mask) && (ret & 0x80000000))) SR |= V_MASK; - m_local_regs[dst_code & 0x3f] = ret; - if (ret == 0) SR |= Z_MASK; SR |= SIGN_TO_N(ret); + m_local_regs[dst_code & 0x3f] = ret; + m_icount -= m_clock_cycles_1; } @@ -1508,12 +1539,12 @@ void hyperstone_device::hyperstone_rol() SR &= ~(Z_MASK | C_MASK | N_MASK); #endif - m_local_regs[dst_code] = val; - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(val); + m_local_regs[dst_code] = val; + m_icount -= m_clock_cycles_1; } @@ -1553,167 +1584,84 @@ void hyperstone_device::hyperstone_ldxx1() const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f); const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f); + const uint32_t dreg = ((DST_GLOBAL && dst_code == SR_REGISTER) ? 0 : (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code]); - if (DST_GLOBAL && dst_code == SR_REGISTER) + switch (sub_type) { - switch (sub_type) - { - case 0: // LDBS.A - if (SRC_GLOBAL) - set_global_register(src_code, (int32_t)(int8_t)READ_B(extra_s)); - else - m_local_regs[src_code] = (int32_t)(int8_t)READ_B(extra_s); - break; - - case 1: // LDBU.A - if (SRC_GLOBAL) - m_global_regs[src_code] = READ_B(extra_s); - else - m_local_regs[src_code] = READ_B(extra_s); - break; + case 0: // LDBS.D + if (SRC_GLOBAL) + set_global_register(src_code, (int32_t)(int8_t)READ_B(dreg + extra_s)); + else + m_local_regs[src_code] = (int32_t)(int8_t)READ_B(dreg + extra_s); + break; - case 2: - if (SRC_GLOBAL) - { - if (extra_s & 1) // LDHS.A - set_global_register(src_code, (int32_t)(int16_t)READ_HW(extra_s)); - else // LDHU.A - set_global_register(src_code, READ_HW(extra_s)); - } - else - { - if (extra_s & 1) // LDHS.A - m_local_regs[src_code] = (int32_t)(int16_t)READ_HW(extra_s); - else // LDHU.A - m_local_regs[src_code] = READ_HW(extra_s); - } - break; + case 1: // LDBU.D + if (SRC_GLOBAL) + set_global_register(src_code, READ_B(dreg + extra_s)); + else + m_local_regs[src_code] = READ_B(dreg + extra_s); + break; - case 3: - switch (extra_s & 3) - { - case 0: // LDW.A - if (SRC_GLOBAL) - set_global_register(src_code, READ_W(extra_s)); - else - m_local_regs[src_code] = READ_W(extra_s); - break; - case 1: // LDD.A - if (SRC_GLOBAL) - { - set_global_register(src_code, READ_W(extra_s)); - set_global_register(srcf_code, READ_W(extra_s + 4)); - } - else - { - m_local_regs[src_code] = READ_W(extra_s); - m_local_regs[srcf_code] = READ_W(extra_s + 4); - } - m_icount -= m_clock_cycles_1; // extra cycle - break; - case 2: // LDW.IOA - if (SRC_GLOBAL) - set_global_register(src_code, IO_READ_W(extra_s)); - else - m_local_regs[src_code] = IO_READ_W(extra_s); - break; - case 3: // LDD.IOA - if (SRC_GLOBAL) - { - set_global_register(src_code, IO_READ_W(extra_s)); - set_global_register(srcf_code, IO_READ_W(extra_s + 4)); - } - else - { - m_local_regs[src_code] = IO_READ_W(extra_s); - m_local_regs[srcf_code] = IO_READ_W(extra_s + 4); - } - m_icount -= m_clock_cycles_1; // extra cycle - break; - } - break; - } - } - else - { - const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code]; - switch (sub_type) - { - case 0: // LDBS.D - if (SRC_GLOBAL) - set_global_register(src_code, (int32_t)(int8_t)READ_B(dreg + extra_s)); + case 2: + if (SRC_GLOBAL) + { + if (extra_s & 1) + set_global_register(src_code, (int32_t)(int16_t)READ_HW(dreg + (extra_s & ~1))); else - m_local_regs[src_code] = (int32_t)(int8_t)READ_B(dreg + extra_s); - break; - - case 1: // LDBU.D - if (SRC_GLOBAL) - set_global_register(src_code, READ_B(dreg + extra_s)); + set_global_register(src_code, READ_HW(dreg + (extra_s & ~1))); + } + else + { + if (extra_s & 1) + m_local_regs[src_code] = (int32_t)(int16_t)READ_HW(dreg + (extra_s & ~1)); else - m_local_regs[src_code] = READ_B(dreg + extra_s); - break; + m_local_regs[src_code] = READ_HW(dreg + (extra_s & ~1)); + } + break; - case 2: - if (SRC_GLOBAL) - { - if (extra_s & 1) - set_global_register(src_code, (int32_t)(int16_t)READ_HW(dreg + (extra_s & ~1))); + case 3: + switch (extra_s & 3) + { + case 0: // LDW.D + if (SRC_GLOBAL) + set_global_register(src_code, READ_W(dreg + extra_s)); else - set_global_register(src_code, READ_HW(dreg + (extra_s & ~1))); - } - else - { - if (extra_s & 1) - m_local_regs[src_code] = (int32_t)(int16_t)READ_HW(dreg + (extra_s & ~1)); + m_local_regs[src_code] = READ_W(dreg + extra_s); + break; + case 1: // LDD.D + if (SRC_GLOBAL) + { + set_global_register(src_code, READ_W(dreg + (extra_s & ~1))); + set_global_register(srcf_code, READ_W(dreg + (extra_s & ~1) + 4)); + } else - m_local_regs[src_code] = READ_HW(dreg + (extra_s & ~1)); - } - break; - - case 3: - switch (extra_s & 3) - { - case 0: // LDW.D - if (SRC_GLOBAL) - set_global_register(src_code, READ_W(dreg + extra_s)); - else - m_local_regs[src_code] = READ_W(dreg + extra_s); - break; - case 1: // LDD.D - if (SRC_GLOBAL) - { - set_global_register(src_code, READ_W(dreg + (extra_s & ~1))); - set_global_register(srcf_code, READ_W(dreg + (extra_s & ~1) + 4)); - } - else - { - m_local_regs[src_code] = READ_W(dreg + (extra_s & ~1)); - m_local_regs[srcf_code] = READ_W(dreg + (extra_s & ~1) + 4); - } - m_icount -= m_clock_cycles_1; // extra cycle - break; - case 2: // LDW.IOD - if (SRC_GLOBAL) - set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3))); - else - m_local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3)); - break; - case 3: // LDD.IOD - if (SRC_GLOBAL) - { - set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3))); - set_global_register(srcf_code, IO_READ_W(dreg + (extra_s & ~3) + 4)); - } - else - { - m_local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3)); - m_local_regs[srcf_code] = IO_READ_W(dreg + (extra_s & ~3) + 4); - } - m_icount -= m_clock_cycles_1; // extra cycle - break; - } - break; - } + { + m_local_regs[src_code] = READ_W(dreg + (extra_s & ~1)); + m_local_regs[srcf_code] = READ_W(dreg + (extra_s & ~1) + 4); + } + m_icount -= m_clock_cycles_1; // extra cycle + break; + case 2: // LDW.IOD + if (SRC_GLOBAL) + set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3))); + else + m_local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3)); + break; + case 3: // LDD.IOD + if (SRC_GLOBAL) + { + set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3))); + set_global_register(srcf_code, IO_READ_W(dreg + (extra_s & ~3) + 4)); + } + else + { + m_local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3)); + m_local_regs[srcf_code] = IO_READ_W(dreg + (extra_s & ~3) + 4); + } + m_icount -= m_clock_cycles_1; // extra cycle + break; + } + break; } m_icount -= m_clock_cycles_1; @@ -1899,110 +1847,56 @@ void hyperstone_device::hyperstone_stxx1() const uint32_t fp = GET_FP; const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f); const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f); - const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code]; + const uint32_t dreg = ((DST_GLOBAL && dst_code == SR_REGISTER) ? 0 : (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code]); const uint32_t sreg = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[src_code]); - if (DST_GLOBAL && dst_code == SR_REGISTER) + switch (sub_type) { - switch (sub_type) - { - case 0: // STBS.A - // TODO: missing trap on range error - WRITE_B(extra_s, (uint8_t)sreg); - break; - - case 1: // STBU.A - WRITE_B(extra_s, (uint8_t)sreg); - break; - - case 2: // STHS.A, STHU.A - WRITE_HW(extra_s, (uint16_t)sreg); - // TODO: missing trap on range error with STHS.A - break; - - case 3: - switch (extra_s & 3) + case 0: // STBS.D + // TODO: missing trap on range error + WRITE_B(dreg + extra_s, (uint8_t)sreg); + break; + + case 1: // STBU.D + WRITE_B(dreg + extra_s, (uint8_t)sreg); + break; + + case 2: // STHS.D, STHU.D + WRITE_HW(dreg + (extra_s & ~1), (uint16_t)sreg); + // TODO: missing trap on range error with STHS.D + break; + + case 3: + switch (extra_s & 3) + { + case 0: // STW.D + WRITE_W(dreg + (extra_s & ~1), sreg); + break; + case 1: // STD.D { - case 0: // STW.A - WRITE_W(extra_s & ~1, sreg); - break; - case 1: // STD.A - { - const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); - const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); - extra_s &= ~1; - WRITE_W(extra_s, sreg); - WRITE_W(extra_s + 4, sregf); - m_icount -= m_clock_cycles_1; // extra cycle - break; - } - case 2: // STW.IOA - IO_WRITE_W(extra_s & ~3, sreg); - break; - case 3: // STD.IOA - { - const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); - const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); - extra_s &= ~3; - IO_WRITE_W(extra_s, sreg); - IO_WRITE_W(extra_s + 4, sregf); - m_icount -= m_clock_cycles_1; // extra cycle - break; - } + const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); + const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); + extra_s &= ~1; + WRITE_W(dreg + extra_s, sreg); + WRITE_W(dreg + extra_s + 4, sregf); + m_icount -= m_clock_cycles_1; // extra cycle + break; } - break; - } - } - else - { - switch (sub_type) - { - case 0: // STBS.D - // TODO: missing trap on range error - WRITE_B(dreg + extra_s, (uint8_t)sreg); - break; - - case 1: // STBU.D - WRITE_B(dreg + extra_s, (uint8_t)sreg); - break; - - case 2: // STHS.D, STHU.D - WRITE_HW(dreg + (extra_s & ~1), (uint16_t)sreg); - // TODO: missing trap on range error with STHS.D - break; - - case 3: - switch (extra_s & 3) + case 2: // STW.IOD + IO_WRITE_W(dreg + (extra_s & ~3), sreg); + break; + case 3: // STD.IOD { - case 0: // STW.D - WRITE_W(dreg + (extra_s & ~1), sreg); - break; - case 1: // STD.D - { - const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); - const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); - extra_s &= ~1; - WRITE_W(dreg + extra_s, sreg); - WRITE_W(dreg + extra_s + 4, sregf); - m_icount -= m_clock_cycles_1; // extra cycle - break; - } - case 2: // STW.IOD - IO_WRITE_W(dreg + (extra_s & ~3), sreg); - break; - case 3: // STD.IOD - { - const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); - const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); - extra_s &= ~3; - IO_WRITE_W(dreg + extra_s, sreg); - IO_WRITE_W(dreg + extra_s + 4, sregf); - m_icount -= m_clock_cycles_1; // extra cycle - break; - } + const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); + const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); + extra_s &= ~3; + IO_WRITE_W(dreg + extra_s, sreg); + IO_WRITE_W(dreg + extra_s + 4, sregf); + m_icount -= m_clock_cycles_1; // extra cycle + break; } - break; - } + } + break; } m_icount -= m_clock_cycles_1; @@ -2129,15 +2023,15 @@ void hyperstone_device::hyperstone_shri() val >>= n; + if (val == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(val); + if (DST_GLOBAL) set_global_register(dst_code, val); else m_local_regs[dst_code] = val; - if (val == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(val); - m_icount -= m_clock_cycles_1; } @@ -2163,15 +2057,15 @@ void hyperstone_device::hyperstone_sari() val |= 0xffffffff << (32 - n); } + if (val == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(val); + if (DST_GLOBAL) set_global_register(dst_code, val); else m_local_regs[dst_code] = val; - if (val == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(val); - m_icount -= m_clock_cycles_1; } @@ -2192,15 +2086,15 @@ void hyperstone_device::hyperstone_shli() if (((val & mask) && (!(val2 & 0x80000000))) || (((val & mask) ^ mask) && (val2 & 0x80000000))) SR |= V_MASK; + if (val2 == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(val2); + if (DST_GLOBAL) set_global_register(dst_code, val2); else m_local_regs[dst_code] = val2; - if (val2 == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(val2); - m_icount -= m_clock_cycles_1; } @@ -2226,14 +2120,14 @@ void hyperstone_device::hyperstone_mulsu() const uint32_t high_order = (uint32_t)(double_word >> 32); - (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = high_order; - (DST_GLOBAL ? m_global_regs : m_local_regs)[dstf_code] = (uint32_t)double_word; - SR &= ~(Z_MASK | N_MASK); if (double_word == 0) SR |= Z_MASK; SR |= SIGN_TO_N(high_order); + (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = high_order; + (DST_GLOBAL ? m_global_regs : m_local_regs)[dstf_code] = (uint32_t)double_word; + if(SIGNED == IS_SIGNED && (sreg >= 0xffff8000 && sreg <= 0x7fff) && (dreg >= 0xffff8000 && dreg <= 0x7fff)) m_icount -= m_clock_cycles_4; else if(SIGNED == IS_UNSIGNED && sreg <= 0xffff && dreg <= 0xffff) @@ -2321,13 +2215,13 @@ void hyperstone_device::hyperstone_mul() const uint32_t sreg = (SRC_GLOBAL ? m_global_regs : m_local_regs)[src_code]; const uint32_t result = sreg * dreg; - (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = result; - SR &= ~(Z_MASK | N_MASK); if (result == 0) SR |= Z_MASK; SR |= SIGN_TO_N(result); + (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = result; + if ((sreg >= 0xffff8000 && sreg <= 0x7fff) && (dreg >= 0xffff8000 && dreg <= 0x7fff)) m_icount -= 3 << m_clck_scale; else @@ -2504,7 +2398,7 @@ void hyperstone_device::hyperstone_lddr() } template <hyperstone_device::reg_bank SRC_GLOBAL> -void hyperstone_device::hypesrtone_ldwp() +void hyperstone_device::hyperstone_ldwp() { check_delay_PC(); @@ -2636,228 +2530,41 @@ void hyperstone_device::hyperstone_stdp() m_icount -= m_clock_cycles_2; } -void hyperstone_device::hyperstone_dbv() -{ - if (SR & V_MASK) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbnv() +template <hyperstone_device::branch_condition CONDITION, hyperstone_device::condition_set COND_SET> +void hyperstone_device::hyperstone_db() { - if (SR & V_MASK) + static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK }; + if (COND_SET) { - ignore_pcrel(); - check_delay_PC(); - } - else - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbe() -{ - if (SR & Z_MASK) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbne() -{ - if (SR & Z_MASK) - { - ignore_pcrel(); - check_delay_PC(); - } - else - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbc() -{ - if (SR & C_MASK) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbnc() -{ - if (SR & C_MASK) - { - ignore_pcrel(); - check_delay_PC(); - } - else - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbse() -{ - if (SR & (C_MASK | Z_MASK)) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbht() -{ - if (SR & (C_MASK | Z_MASK)) - { - ignore_pcrel(); - check_delay_PC(); - } - else - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbn() -{ - if (SR & N_MASK) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbnn() -{ - if (SR & N_MASK) - { - ignore_pcrel(); - check_delay_PC(); - } - else - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dble() -{ - if (SR & (N_MASK | Z_MASK)) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbgt() -{ - if (SR & (N_MASK | Z_MASK)) - { - ignore_pcrel(); - check_delay_PC(); + if (SR & condition_masks[CONDITION]) + { + const int32_t offset = decode_pcrel(); + check_delay_PC(); + m_delay_slot = 1; + m_delay_pc = PC + offset; + m_intblock = 3; + } + else + { + ignore_pcrel(); + check_delay_PC(); + } } else { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; + if (SR & condition_masks[CONDITION]) + { + ignore_pcrel(); + check_delay_PC(); + } + else + { + const int32_t offset = decode_pcrel(); + check_delay_PC(); + m_delay_slot = 1; + m_delay_pc = PC + offset; + m_intblock = 3; + } } m_icount -= m_clock_cycles_1; @@ -2868,7 +2575,7 @@ void hyperstone_device::hyperstone_dbr() const int32_t offset = decode_pcrel(); check_delay_PC(); - m_delay_slot = true; + m_delay_slot = 1; m_delay_pc = PC + offset; m_intblock = 3; } @@ -2904,8 +2611,7 @@ void hyperstone_device::hyperstone_frame() if (tmp_flag) { - uint32_t addr = get_trap_addr(TRAPNO_FRAME_ERROR); - execute_exception(addr); + execute_exception(get_trap_addr(TRAPNO_FRAME_ERROR)); } } @@ -2913,14 +2619,15 @@ void hyperstone_device::hyperstone_frame() m_icount -= m_clock_cycles_1; } -void hyperstone_device::hyperstone_call_global() +template <hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::hyperstone_call() { uint16_t imm_1 = READ_OP(PC); PC += 2; int32_t extra_s = 0; - if (E_BIT(imm_1)) + if (imm_1 & 0x8000) { uint16_t imm_2 = READ_OP(PC); @@ -2930,7 +2637,7 @@ void hyperstone_device::hyperstone_call_global() extra_s = imm_2; extra_s |= ((imm_1 & 0x3fff) << 16); - if (S_BIT_CONST(imm_1)) + if (imm_1 & 0x4000) extra_s |= 0xc0000000; } else @@ -2939,24 +2646,21 @@ void hyperstone_device::hyperstone_call_global() SET_ILC(2<<19); - if (S_BIT_CONST(imm_1)) + if (imm_1 & 0x4000) extra_s |= 0xffffc000; } check_delay_PC(); - uint32_t src_code = SRC_CODE; + uint32_t fp = GET_FP; + uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f); uint32_t dst_code = DST_CODE; - uint32_t sreg = m_global_regs[src_code]; - - if (src_code == SR_REGISTER) - sreg = 0; + uint32_t sreg = (SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[src_code]; if (!DST_CODE) dst_code = 16; - uint32_t fp = GET_FP; uint32_t dreg_index = dst_code + fp; m_local_regs[dreg_index & 0x3f] = (PC & ~1) | GET_S; m_local_regs[(dreg_index + 1) & 0x3f] = SR; @@ -2975,231 +2679,34 @@ void hyperstone_device::hyperstone_call_global() m_icount -= m_clock_cycles_1; } -void hyperstone_device::hyperstone_call_local() -{ - uint16_t imm_1 = READ_OP(PC); - PC += 2; - - int32_t extra_s = 0; - - if (E_BIT(imm_1)) - { - uint16_t imm_2 = READ_OP(PC); - - PC += 2; - SET_ILC(3<<19); - - extra_s = imm_2; - extra_s |= ((imm_1 & 0x3fff) << 16); - - if (S_BIT_CONST(imm_1)) - extra_s |= 0xc0000000; - } - else - { - extra_s = imm_1 & 0x3fff; - - SET_ILC(2<<19); - - if (S_BIT_CONST(imm_1)) - extra_s |= 0xffffc000; - } - - check_delay_PC(); - - uint32_t src_code = SRC_CODE; - uint32_t dst_code = DST_CODE; - - if (!DST_CODE) - dst_code = 16; - - uint32_t fp = GET_FP; - extra_s = (extra_s & ~1) + m_local_regs[(src_code + fp) & 0x3f]; - - uint32_t dreg_index = dst_code + fp; - m_local_regs[dreg_index & 0x3f] = (PC & ~1) | GET_S; - m_local_regs[(dreg_index + 1) & 0x3f] = SR; - - SET_FP(fp + dst_code); - SET_FL(6); //default value for call - SR &= ~M_MASK; - - PC = extra_s; - - m_intblock = 2; - - //TODO: add interrupt locks, errors, .... - - //TODO: no 1! - m_icount -= m_clock_cycles_1; -} - - - -void hyperstone_device::hyperstone_bv() -{ - if (SR & V_MASK) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bnv() +template <hyperstone_device::branch_condition CONDITION, hyperstone_device::condition_set COND_SET> +void hyperstone_device::hyperstone_b() { - if (SR & V_MASK) - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } - else + static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK }; + if (COND_SET) { - execute_br(); - } -} - -void hyperstone_device::hyperstone_be() -{ - if (SR & Z_MASK) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bne() -{ - if (SR & Z_MASK) - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } - else - { - execute_br(); - } -} - -void hyperstone_device::hyperstone_bc() -{ - if (SR & C_MASK) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bnc() -{ - if (SR & C_MASK) - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } - else - { - execute_br(); - } -} - -void hyperstone_device::hyperstone_bse() -{ - if (SR & (C_MASK | Z_MASK)) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bht() -{ - if (SR & (C_MASK | Z_MASK)) - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } - else - { - execute_br(); - } -} - -void hyperstone_device::hyperstone_bn() -{ - if (SR & N_MASK) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bnn() -{ - if (SR & N_MASK) - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } - else - { - execute_br(); - } -} - -void hyperstone_device::hyperstone_ble() -{ - if (SR & (N_MASK | Z_MASK)) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bgt() -{ - if (SR & (N_MASK | Z_MASK)) - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; + if (SR & condition_masks[CONDITION]) + { + hyperstone_br(); + } + else + { + ignore_pcrel(); + check_delay_PC(); + m_icount -= m_clock_cycles_1; + } } else { - execute_br(); + if (SR & condition_masks[CONDITION]) + { + ignore_pcrel(); + check_delay_PC(); + m_icount -= m_clock_cycles_1; + } + else + { + hyperstone_br(); + } } } diff --git a/src/devices/cpu/i386/i386.cpp b/src/devices/cpu/i386/i386.cpp index 637af658c6e..15379c18d7b 100644 --- a/src/devices/cpu/i386/i386.cpp +++ b/src/devices/cpu/i386/i386.cpp @@ -3171,36 +3171,13 @@ uint64_t i386_device::debug_virttophys(symbol_table &table, int params, const ui return result; } -uint64_t i386_debug_segbase(symbol_table &table, void *ref, int params, const uint64_t *param) -{ - i386_device *i386 = (i386_device *)(ref); - return i386->debug_segbase(table, params, param); -} - -uint64_t i386_debug_seglimit(symbol_table &table, void *ref, int params, const uint64_t *param) -{ - i386_device *i386 = (i386_device *)(ref); - return i386->debug_seglimit(table, params, param); -} - -uint64_t i386_debug_segofftovirt(symbol_table &table, void *ref, int params, const uint64_t *param) -{ - i386_device *i386 = (i386_device *)(ref); - return i386->debug_segofftovirt(table, params, param); -} - -static uint64_t i386_debug_virttophys(symbol_table &table, void *ref, int params, const uint64_t *param) -{ - i386_device *i386 = (i386_device *)(ref); - return i386->debug_virttophys(table, params, param); -} - void i386_device::device_debug_setup() { - debug()->symtable().add("segbase", (void *)this, 1, 1, i386_debug_segbase); - debug()->symtable().add("seglimit", (void *)this, 1, 1, i386_debug_seglimit); - debug()->symtable().add("segofftovirt", (void *)this, 2, 2, i386_debug_segofftovirt); - debug()->symtable().add("virttophys", (void *)this, 1, 1, i386_debug_virttophys); + using namespace std::placeholders; + debug()->symtable().add("segbase", 1, 1, std::bind(&i386_device::debug_segbase, this, _1, _2, _3)); + debug()->symtable().add("seglimit", 1, 1, std::bind(&i386_device::debug_seglimit, this, _1, _2, _3)); + debug()->symtable().add("segofftovirt", 2, 2, std::bind(&i386_device::debug_segofftovirt, this, _1, _2, _3)); + debug()->symtable().add("virttophys", 1, 1, std::bind(&i386_device::debug_virttophys, this, _1, _2, _3)); } /*************************************************************************/ diff --git a/src/devices/cpu/i8089/i8089.cpp b/src/devices/cpu/i8089/i8089.cpp index 075cc92fb18..d688555d26b 100644 --- a/src/devices/cpu/i8089/i8089.cpp +++ b/src/devices/cpu/i8089/i8089.cpp @@ -40,7 +40,7 @@ i8089_device::i8089_device(const machine_config &mconfig, const char *tag, devic m_ch1(*this, "1"), m_ch2(*this, "2"), m_write_sintr1(*this), - m_write_sintr2(*this), m_databus_width(0), m_mem(nullptr), m_io(nullptr), + m_write_sintr2(*this), m_data_width(0), m_mem(nullptr), m_io(nullptr), m_sysbus(0), m_scb(0), m_soc(0), m_initialized(false), @@ -117,8 +117,8 @@ void i8089_device::device_start() void i8089_device::device_config_complete() { - m_program_config = address_space_config("program", ENDIANNESS_LITTLE, m_databus_width, 20); - m_io_config = address_space_config("io", ENDIANNESS_LITTLE, m_databus_width, 16); + m_program_config = address_space_config("program", ENDIANNESS_LITTLE, m_data_width, 20); + m_io_config = address_space_config("io", ENDIANNESS_LITTLE, m_data_width, 16); } //------------------------------------------------- diff --git a/src/devices/cpu/i8089/i8089.h b/src/devices/cpu/i8089/i8089.h index 812ae99a733..1659afd54d9 100644 --- a/src/devices/cpu/i8089/i8089.h +++ b/src/devices/cpu/i8089/i8089.h @@ -22,8 +22,8 @@ // INTERFACE CONFIGURATION MACROS //************************************************************************** -#define MCFG_I8089_DATABUS_WIDTH(_databus_width) \ - i8089_device::set_databus_width(*device, _databus_width); +#define MCFG_I8089_DATA_WIDTH(_data_width) \ + i8089_device::set_data_width(*device, _data_width); #define MCFG_I8089_SINTR1(_sintr1) \ devcb = &downcast<i8089_device *>(device)->set_sintr1_callback(DEVCB_##_sintr1); @@ -54,7 +54,7 @@ public: template <class Object> devcb_base &set_sintr2_callback(Object &&sintr2) { return m_write_sintr2.set_callback(std::forward<Object>(sintr2)); } // static configuration helpers - static void set_databus_width(device_t &device, uint8_t databus_width) { downcast<i8089_device &>(device).m_databus_width = databus_width; } + static void set_data_width(device_t &device, uint8_t data_width) { downcast<i8089_device &>(device).m_data_width = data_width; } // input lines DECLARE_WRITE_LINE_MEMBER( ca_w ); @@ -112,7 +112,7 @@ private: void initialize(); - uint8_t m_databus_width; + uint8_t m_data_width; address_space *m_mem; address_space *m_io; diff --git a/src/devices/cpu/m6502/m4510.cpp b/src/devices/cpu/m6502/m4510.cpp index 5848f66970d..f3241497eb6 100644 --- a/src/devices/cpu/m6502/m4510.cpp +++ b/src/devices/cpu/m6502/m4510.cpp @@ -19,10 +19,10 @@ m4510_device::m4510_device(const machine_config &mconfig, const char *tag, devic map_enable(0), nomap(false) { - program_config.m_addrbus_width = 20; + program_config.m_addr_width = 20; program_config.m_logaddr_width = 16; program_config.m_page_shift = 13; - sprogram_config.m_addrbus_width = 20; + sprogram_config.m_addr_width = 20; sprogram_config.m_logaddr_width = 16; sprogram_config.m_page_shift = 13; } diff --git a/src/devices/cpu/m6502/m6504.cpp b/src/devices/cpu/m6502/m6504.cpp index c6a20579333..0d7322b5fed 100644 --- a/src/devices/cpu/m6502/m6504.cpp +++ b/src/devices/cpu/m6502/m6504.cpp @@ -16,8 +16,8 @@ DEFINE_DEVICE_TYPE(M6504, m6504_device, "m6504", "M6504") m6504_device::m6504_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : m6502_device(mconfig, M6504, tag, owner, clock) { - program_config.m_addrbus_width = 13; - sprogram_config.m_addrbus_width = 13; + program_config.m_addr_width = 13; + sprogram_config.m_addr_width = 13; } void m6504_device::device_start() diff --git a/src/devices/cpu/m6502/m6507.cpp b/src/devices/cpu/m6502/m6507.cpp index d64b08c54c9..b6d44ae4c21 100644 --- a/src/devices/cpu/m6502/m6507.cpp +++ b/src/devices/cpu/m6502/m6507.cpp @@ -16,8 +16,8 @@ DEFINE_DEVICE_TYPE(M6507, m6507_device, "m6507", "M6507") m6507_device::m6507_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : m6502_device(mconfig, M6507, tag, owner, clock) { - program_config.m_addrbus_width = 13; - sprogram_config.m_addrbus_width = 13; + program_config.m_addr_width = 13; + sprogram_config.m_addr_width = 13; } void m6507_device::device_start() diff --git a/src/devices/cpu/m6502/m6509.cpp b/src/devices/cpu/m6502/m6509.cpp index e1af60eac4b..828d3459b88 100644 --- a/src/devices/cpu/m6502/m6509.cpp +++ b/src/devices/cpu/m6502/m6509.cpp @@ -17,9 +17,9 @@ DEFINE_DEVICE_TYPE(M6509, m6509_device, "m6509", "M6509") m6509_device::m6509_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : m6502_device(mconfig, M6509, tag, owner, clock), XPC(0), bank_i(0), bank_y(0) { - program_config.m_addrbus_width = 20; + program_config.m_addr_width = 20; program_config.m_logaddr_width = 20; - sprogram_config.m_addrbus_width = 20; + sprogram_config.m_addr_width = 20; sprogram_config.m_logaddr_width = 20; } diff --git a/src/devices/cpu/mcs40/mcs40.cpp b/src/devices/cpu/mcs40/mcs40.cpp index be4b60cde75..4b1cf6a8e2e 100644 --- a/src/devices/cpu/mcs40/mcs40.cpp +++ b/src/devices/cpu/mcs40/mcs40.cpp @@ -86,7 +86,7 @@ mcs40_cpu_device_base::mcs40_cpu_device_base( device_type type, const char *tag, device_t *owner, - uint32_t clock, + u32 clock, bool extended_cm, unsigned rom_width, unsigned stack_ptr_mask, @@ -828,7 +828,7 @@ inline void mcs40_cpu_device_base::update_4289_f_l(u8 val) -i4004_cpu_device::i4004_cpu_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock) +i4004_cpu_device::i4004_cpu_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) : mcs40_cpu_device_base(mconfig, I4004, tag, owner, clock, false, 12U, 0x3U, 16U, 0x7U) { } @@ -877,7 +877,7 @@ bool i4004_cpu_device::is_io_op(u8 opr) i4004_cpu_device::cycle i4004_cpu_device::do_cycle1(u8 opr, u8 opa, pmem &program_op) { - static constexpr uint8_t kbp_table[] = { 0x0, 0x1, 0x2, 0xf, 0x3, 0xf, 0xf, 0xf, 0x4, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf }; + static constexpr u8 kbp_table[] = { 0x0, 0x1, 0x2, 0xf, 0x3, 0xf, 0xf, 0xf, 0x4, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf }; switch (opr) { @@ -1138,7 +1138,7 @@ u8 i4004_cpu_device::do_io(u8 opr, u8 opa) -i4040_cpu_device::i4040_cpu_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock) +i4040_cpu_device::i4040_cpu_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) : i4004_cpu_device(mconfig, I4040, tag, owner, clock, true, 13U, 0x7U, 24U, 0xfU) { } diff --git a/src/devices/cpu/mcs40/mcs40.h b/src/devices/cpu/mcs40/mcs40.h index 0e5b0c61126..3a7605fc366 100644 --- a/src/devices/cpu/mcs40/mcs40.h +++ b/src/devices/cpu/mcs40/mcs40.h @@ -178,7 +178,7 @@ protected: device_type type, char const *tag, device_t *owner, - uint32_t clock, + u32 clock, bool extended_cm, unsigned rom_width, unsigned stack_ptr_mask, @@ -364,7 +364,7 @@ public: template <unsigned N, typename Obj> static devcb_base &set_cm_ram_cb(device_t &device, Obj &&cb) { return downcast<i4004_cpu_device &>(device).set_cm_ram_cb<N>(std::forward<Obj>(cb)); } - i4004_cpu_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock); + i4004_cpu_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock); protected: using mcs40_cpu_device_base::mcs40_cpu_device_base; @@ -404,7 +404,7 @@ public: template <typename Obj> static devcb_base &set_stp_ack_cb(device_t &device, Obj &&cb) { return downcast<i4040_cpu_device &>(device).set_stp_ack_cb(std::forward<Obj>(cb)); } - i4040_cpu_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock); + i4040_cpu_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock); protected: // device_disasm_interface implementation diff --git a/src/devices/cpu/mcs40/mcs40dasm.h b/src/devices/cpu/mcs40/mcs40dasm.h index 937b71d9358..c7124f2beee 100644 --- a/src/devices/cpu/mcs40/mcs40dasm.h +++ b/src/devices/cpu/mcs40/mcs40dasm.h @@ -28,6 +28,9 @@ public: virtual u32 opcode_alignment() const override; virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; + virtual u32 interface_flags() const override { return PAGED; } + virtual u32 page_address_bits() const override { return 12; } + private: enum class format { diff --git a/src/devices/cpu/powerpc/ppcdrc.cpp b/src/devices/cpu/powerpc/ppcdrc.cpp index ac587dc3259..30ebb6740cb 100644 --- a/src/devices/cpu/powerpc/ppcdrc.cpp +++ b/src/devices/cpu/powerpc/ppcdrc.cpp @@ -996,7 +996,7 @@ void ppc_device::static_generate_memory_accessor(int mode, int size, int iswrite /* on entry, address is in I0; data for writes is in I1; masks are in I2 */ /* on exit, read result is in I0 */ /* routine trashes I0-I3 */ - int fastxor = BYTE8_XOR_BE(0) >> (int)(space_config(AS_PROGRAM)->m_databus_width < 64); + int fastxor = BYTE8_XOR_BE(0) >> (int)(space_config(AS_PROGRAM)->m_data_width < 64); drcuml_block *block; int translate_type; int tlbreturn = 0; diff --git a/src/devices/cpu/sm510/sm510.h b/src/devices/cpu/sm510/sm510.h index f9972a0c6e7..5d44799864d 100644 --- a/src/devices/cpu/sm510/sm510.h +++ b/src/devices/cpu/sm510/sm510.h @@ -17,7 +17,7 @@ #define MCFG_SM510_READ_K_CB(_devcb) \ devcb = &sm510_base_device::set_read_k_callback(*device, DEVCB_##_devcb); // when in halt state, any K input going High can wake up the CPU, -// driver is required to use execute_set_input(SM510_INPUT_LINE_K, state) +// driver is required to use set_input_line(SM510_INPUT_LINE_K, state) #define SM510_INPUT_LINE_K 0 // 1-bit BA(aka alpha) input pin (pull-up) diff --git a/src/devices/cpu/tms1000/tms1000.cpp b/src/devices/cpu/tms1000/tms1000.cpp index 813f1da99f8..ce21213a1d2 100644 --- a/src/devices/cpu/tms1000/tms1000.cpp +++ b/src/devices/cpu/tms1000/tms1000.cpp @@ -8,7 +8,7 @@ TODO: - add TMS1270 (10 O pins, how does that work?) - add TMS1200C (has L input pins like TMS1600) - - add HALT input pin for TMS1000C + - add TMS1000C-specific mpla */ @@ -34,6 +34,13 @@ DEFINE_DEVICE_TYPE(TMS1700, tms1700_cpu_device, "tms1700", "TMS1700") // 28-p DEFINE_DEVICE_TYPE(TMS1730, tms1730_cpu_device, "tms1730", "TMS1730") // 20-pin DIP, same die as TMS1700, package has less pins: 6 R pins, 5 O pins (output PLA is still 8-bit, O1,O3,O5 unused) // CMOS versions (3-level stack, HALT pin) +// - RAM at top-left, ROM at top-right(rotate CCW) +// - ROM ordering is different: +// * row select is linear (0-63) +// * bit select is 7-0 instead of 0-7 +// * page select doesn't flip in the middle +// - 32-term mpla at bottom-right, different order +// - 32-term opla at bottom-left, ordered O7-O0(0 or 1), and A8,4,2,1,S DEFINE_DEVICE_TYPE(TMS1000C, tms1000c_cpu_device, "tms1000c", "TMS1000C") // 28-pin SDIP, 10 R pins // 2nd source Motorola chips @@ -122,6 +129,17 @@ MACHINE_CONFIG_MEMBER(tms1000_cpu_device::device_add_mconfig) MCFG_PLA_FILEFORMAT(BERKELEY) MACHINE_CONFIG_END +MACHINE_CONFIG_MEMBER(tms1000c_cpu_device::device_add_mconfig) + + // microinstructions PLA, output PLA + //MCFG_PLA_ADD("mpla", 8, 16, 32) + MCFG_PLA_ADD("mpla", 8, 16, 30) + MCFG_PLA_FILEFORMAT(BERKELEY) + MCFG_PLA_ADD("opla", 5, 8, 32) + MCFG_PLA_FILEFORMAT(BERKELEY) +MACHINE_CONFIG_END + + // disasm util::disasm_interface *tms1000_cpu_device::create_disassembler() { diff --git a/src/devices/cpu/tms1000/tms1000.h b/src/devices/cpu/tms1000/tms1000.h index 9e969dfc356..d5f53c890b6 100644 --- a/src/devices/cpu/tms1000/tms1000.h +++ b/src/devices/cpu/tms1000/tms1000.h @@ -69,6 +69,8 @@ public: protected: // overrides + virtual void device_add_mconfig(machine_config &config) override; + virtual void op_br() override { op_br3(); } // 3-level stack virtual void op_call() override { op_call3(); } // " virtual void op_retn() override { op_retn3(); } // " diff --git a/src/devices/cpu/tms1000/tms1100.cpp b/src/devices/cpu/tms1000/tms1100.cpp index 70c38bc72c1..8f329a3c725 100644 --- a/src/devices/cpu/tms1000/tms1100.cpp +++ b/src/devices/cpu/tms1000/tms1100.cpp @@ -4,6 +4,9 @@ TMS1000 family - TMS1100, TMS1170, TMS1300, TMS1370 + TODO: + - add TMS1100C when needed + */ #include "emu.h" diff --git a/src/devices/cpu/tms1000/tms1k_base.cpp b/src/devices/cpu/tms1000/tms1k_base.cpp index eb389fc6bc9..bfbf6eab8af 100644 --- a/src/devices/cpu/tms1000/tms1k_base.cpp +++ b/src/devices/cpu/tms1000/tms1k_base.cpp @@ -5,7 +5,7 @@ TMS1000 family - base/shared TODO: - - INIT pin + - accurate INIT pin (currently, just use INPUT_LINE_RESET) The TMS0980 and TMS1000-family MCU cores are very similar. The TMS0980 has a @@ -144,6 +144,7 @@ void tms1k_base_device::device_start() m_r = 0; m_o = 0; m_o_index = 0; + m_halt = false; m_cki_bus = 0; m_c4 = 0; m_p = 0; @@ -183,6 +184,7 @@ void tms1k_base_device::device_start() save_item(NAME(m_r)); save_item(NAME(m_o)); save_item(NAME(m_o_index)); + save_item(NAME(m_halt)); save_item(NAME(m_cki_bus)); save_item(NAME(m_c4)); save_item(NAME(m_p)); @@ -224,6 +226,14 @@ void tms1k_base_device::device_start() m_icountptr = &m_icount; } +device_memory_interface::space_config_vector tms1k_base_device::memory_space_config() const +{ + return space_config_vector { + std::make_pair(AS_PROGRAM, &m_program_config), + std::make_pair(AS_DATA, &m_data_config) + }; +} + //------------------------------------------------- @@ -259,13 +269,6 @@ void tms1k_base_device::device_reset() m_power_off(0); } -device_memory_interface::space_config_vector tms1k_base_device::memory_space_config() const -{ - return space_config_vector { - std::make_pair(AS_PROGRAM, &m_program_config), - std::make_pair(AS_DATA, &m_data_config) - }; -} //------------------------------------------------- @@ -305,6 +308,15 @@ void tms1k_base_device::read_opcode() // i/o handling //------------------------------------------------- +void tms1k_base_device::execute_set_input(int line, int state) +{ + if (line != TMS1XXX_INPUT_LINE_HALT) + return; + + // HALT pin (CMOS only) + m_halt = bool(state); +} + void tms1k_base_device::write_o_output(u8 index) { // a hardcoded table is supported if the output pla is unknown @@ -597,9 +609,17 @@ void tms1k_base_device::op_sbl() void tms1k_base_device::execute_run() { - do + while (m_icount > 0) { m_icount--; + + if (m_halt) + { + // not running (output pins remain unchanged) + m_icount = 0; + return; + } + switch (m_subcycle) { case 0: @@ -722,6 +742,7 @@ void tms1k_base_device::execute_run() // execute: br/call 1/2 break; } + m_subcycle = (m_subcycle + 1) % 6; - } while (m_icount > 0); + } } diff --git a/src/devices/cpu/tms1000/tms1k_base.h b/src/devices/cpu/tms1000/tms1k_base.h index 7ddff2bb68f..b5e75ec77d2 100644 --- a/src/devices/cpu/tms1000/tms1k_base.h +++ b/src/devices/cpu/tms1000/tms1k_base.h @@ -38,6 +38,9 @@ #define MCFG_TMS1XXX_POWER_OFF_CB(_devcb) \ devcb = &tms1k_base_device::set_power_off_callback(*device, DEVCB_##_devcb); +// HALT input pin on CMOS chips (use set_input_line) +#define TMS1XXX_INPUT_LINE_HALT 0 + // pinout reference @@ -105,6 +108,7 @@ protected: virtual u32 execute_min_cycles() const override { return 1; } virtual u32 execute_max_cycles() const override { return 6; } virtual u32 execute_input_lines() const override { return 1; } + virtual void execute_set_input(int line, int state) override; virtual void execute_run() override; // device_memory_interface overrides @@ -214,50 +218,51 @@ protected: optional_device<pla_device> m_opla; optional_device<pla_device> m_spla; - u8 m_pc; // 6 or 7-bit program counter - u32 m_sr; // 6 or 7-bit subroutine return register(s) - u8 m_pa; // 4-bit page address register - u8 m_pb; // 4-bit page buffer register - u16 m_ps; // 4-bit page subroutine register(s) - u8 m_a; // 4-bit accumulator - u8 m_x; // 2,3,or 4-bit RAM X register - u8 m_y; // 4-bit RAM Y register - u8 m_ca; // chapter address register - u8 m_cb; // chapter buffer register - u16 m_cs; // chapter subroutine register(s) - u16 m_r; - u16 m_o; - u8 m_cki_bus; - u8 m_c4; - u8 m_p; // 4-bit adder p(lus)-input - u8 m_n; // 4-bit adder n(egative)-input - u8 m_adder_out; // adder result - u8 m_carry_in; // adder carry-in bit - u8 m_carry_out; // adder carry-out bit - u8 m_status; - u8 m_status_latch; - u8 m_eac; // end around carry bit - u8 m_clatch; // call latch bit(s) - u8 m_add; // add latch bit - u8 m_bl; // branch latch bit - - u8 m_ram_in; - u8 m_dam_in; - int m_ram_out; // signed! - u8 m_ram_address; - u16 m_rom_address; - u16 m_opcode; - u32 m_fixed; - u32 m_micro; - int m_subcycle; - int m_icount; - u8 m_o_index; - - u8 m_o_pins; // how many O pins - u8 m_r_pins; // how many R pins - u8 m_pc_bits; // how many program counter bits - u8 m_byte_bits; // how many bits per 'byte' - u8 m_x_bits; // how many X register bits + u8 m_pc; // 6 or 7-bit program counter + u32 m_sr; // 6 or 7-bit subroutine return register(s) + u8 m_pa; // 4-bit page address register + u8 m_pb; // 4-bit page buffer register + u16 m_ps; // 4-bit page subroutine register(s) + u8 m_a; // 4-bit accumulator + u8 m_x; // 2,3,or 4-bit RAM X register + u8 m_y; // 4-bit RAM Y register + u8 m_ca; // chapter address register + u8 m_cb; // chapter buffer register + u16 m_cs; // chapter subroutine register(s) + u16 m_r; + u16 m_o; + u8 m_cki_bus; + u8 m_c4; + u8 m_p; // 4-bit adder p(lus)-input + u8 m_n; // 4-bit adder n(egative)-input + u8 m_adder_out; // adder result + u8 m_carry_in; // adder carry-in bit + u8 m_carry_out; // adder carry-out bit + u8 m_status; + u8 m_status_latch; + u8 m_eac; // end around carry bit + u8 m_clatch; // call latch bit(s) + u8 m_add; // add latch bit + u8 m_bl; // branch latch bit + + u8 m_ram_in; + u8 m_dam_in; + int m_ram_out; // signed! + u8 m_ram_address; + u16 m_rom_address; + u16 m_opcode; + u32 m_fixed; + u32 m_micro; + int m_subcycle; + int m_icount; + u8 m_o_index; + bool m_halt; // halt pin state + + u8 m_o_pins; // how many O pins + u8 m_r_pins; // how many R pins + u8 m_pc_bits; // how many program counter bits + u8 m_byte_bits; // how many bits per 'byte' + u8 m_x_bits; // how many X register bits address_space *m_program; address_space *m_data; diff --git a/src/devices/cpu/tms9900/tms9900.cpp b/src/devices/cpu/tms9900/tms9900.cpp index 72631d68ae1..89f2e1e70a6 100644 --- a/src/devices/cpu/tms9900/tms9900.cpp +++ b/src/devices/cpu/tms9900/tms9900.cpp @@ -176,9 +176,9 @@ enum twice their number. Accordingly, the TMS9900 has a CRU bitmask 0x0fff. ****************************************************************************/ -tms99xx_device::tms99xx_device(const machine_config &mconfig, device_type type, const char *tag, int databus_width, int prg_addr_bits, int cru_addr_bits, device_t *owner, uint32_t clock) +tms99xx_device::tms99xx_device(const machine_config &mconfig, device_type type, const char *tag, int data_width, int prg_addr_bits, int cru_addr_bits, device_t *owner, uint32_t clock) : cpu_device(mconfig, type, tag, owner, clock), - m_program_config("program", ENDIANNESS_BIG, databus_width, prg_addr_bits), + m_program_config("program", ENDIANNESS_BIG, data_width, prg_addr_bits), m_io_config("cru", ENDIANNESS_BIG, 8, cru_addr_bits), m_prgspace(nullptr), m_cru(nullptr), diff --git a/src/devices/cpu/tms9900/tms9900.h b/src/devices/cpu/tms9900/tms9900.h index e7a4c3ebd2a..61a0fc46b69 100644 --- a/src/devices/cpu/tms9900/tms9900.h +++ b/src/devices/cpu/tms9900/tms9900.h @@ -64,7 +64,7 @@ public: protected: tms99xx_device(const machine_config &mconfig, device_type type, - const char *tag, int databus_width, int prg_addr_bits, int cru_addr_bits, + const char *tag, int data_width, int prg_addr_bits, int cru_addr_bits, device_t *owner, uint32_t clock); // device-level overrides diff --git a/src/devices/cpu/uml.h b/src/devices/cpu/uml.h index 1b60d46cd8b..be32dedd724 100644 --- a/src/devices/cpu/uml.h +++ b/src/devices/cpu/uml.h @@ -73,20 +73,20 @@ namespace uml COND_NV, // requires V COND_U, // requires U COND_NU, // requires U - COND_A, // requires CZ - COND_BE, // requires CZ - COND_G, // requires SVZ - COND_LE, // requires SVZ - COND_L, // requires SV - COND_GE, // requires SV + COND_A, // requires CZ, unsigned + COND_BE, // requires CZ, unsigned + COND_G, // requires SVZ, signed + COND_LE, // requires SVZ, signed + COND_L, // requires SV, signed + COND_GE, // requires SV, signed COND_MAX, // basic condition code aliases COND_E = COND_Z, COND_NE = COND_NZ, - COND_B = COND_C, - COND_AE = COND_NC + COND_B = COND_C, // unsigned + COND_AE = COND_NC // unsigned }; // floating point rounding modes diff --git a/src/devices/machine/6850acia.cpp b/src/devices/machine/6850acia.cpp index ccbda9e9878..0671dd04ecc 100644 --- a/src/devices/machine/6850acia.cpp +++ b/src/devices/machine/6850acia.cpp @@ -277,6 +277,19 @@ READ8_MEMBER( acia6850_device::data_r ) return m_rdr; } +WRITE8_MEMBER( acia6850_device::write ) +{ + if (BIT(offset, 0)) + data_w(space, 0, data); + else + control_w(space, 0, data); +} + +READ8_MEMBER( acia6850_device::read ) +{ + return BIT(offset, 0) ? data_r(space, 0) : status_r(space, 0); +} + DECLARE_WRITE_LINE_MEMBER( acia6850_device::write_cts ) { if (state) diff --git a/src/devices/machine/6850acia.h b/src/devices/machine/6850acia.h index 8ec75cf5e6e..119dc330ceb 100644 --- a/src/devices/machine/6850acia.h +++ b/src/devices/machine/6850acia.h @@ -38,6 +38,8 @@ public: DECLARE_READ8_MEMBER( status_r ); DECLARE_WRITE8_MEMBER( data_w ); DECLARE_READ8_MEMBER( data_r ); + DECLARE_WRITE8_MEMBER( write ); + DECLARE_READ8_MEMBER( read ); DECLARE_WRITE_LINE_MEMBER( write_cts ); DECLARE_WRITE_LINE_MEMBER( write_dcd ); diff --git a/src/devices/machine/bankdev.cpp b/src/devices/machine/bankdev.cpp index 7abd6e9f5c2..c9b2c5fcfe5 100644 --- a/src/devices/machine/bankdev.cpp +++ b/src/devices/machine/bankdev.cpp @@ -10,8 +10,8 @@ address_map_bank_device::address_map_bank_device( const machine_config &mconfig, : device_t(mconfig, ADDRESS_MAP_BANK, tag, owner, clock), device_memory_interface(mconfig, *this), m_endianness(ENDIANNESS_NATIVE), - m_databus_width(0), - m_addrbus_width(32), + m_data_width(0), + m_addr_width(32), m_stride(1), m_program(nullptr), m_offset(0) @@ -83,7 +83,7 @@ READ64_MEMBER(address_map_bank_device::read64) void address_map_bank_device::device_config_complete() { - m_program_config = address_space_config( "program", m_endianness, m_databus_width, m_addrbus_width ); + m_program_config = address_space_config( "program", m_endianness, m_data_width, m_addr_width ); } void address_map_bank_device::device_start() diff --git a/src/devices/machine/bankdev.h b/src/devices/machine/bankdev.h index c51c46bc686..6c6e036aaa5 100644 --- a/src/devices/machine/bankdev.h +++ b/src/devices/machine/bankdev.h @@ -9,11 +9,11 @@ #define MCFG_ADDRESS_MAP_BANK_ENDIANNESS(_endianness) \ address_map_bank_device::set_endianness(*device, _endianness); -#define MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(_databus_width) \ - address_map_bank_device::set_databus_width(*device, _databus_width); +#define MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(_data_width) \ + address_map_bank_device::set_data_width(*device, _data_width); -#define MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(_addrbus_width) \ - address_map_bank_device::set_addrbus_width(*device, _addrbus_width); +#define MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(_addr_width) \ + address_map_bank_device::set_addr_width(*device, _addr_width); #define MCFG_ADDRESS_MAP_BANK_STRIDE(_stride) \ address_map_bank_device::set_stride(*device, _stride); @@ -28,8 +28,8 @@ public: // static configuration helpers static void set_endianness(device_t &device, endianness_t endianness) { downcast<address_map_bank_device &>(device).m_endianness = endianness; } - static void set_databus_width(device_t &device, uint8_t databus_width) { downcast<address_map_bank_device &>(device).m_databus_width = databus_width; } - static void set_addrbus_width(device_t &device, uint8_t addrbus_width) { downcast<address_map_bank_device &>(device).m_addrbus_width = addrbus_width; } + static void set_data_width(device_t &device, uint8_t data_width) { downcast<address_map_bank_device &>(device).m_data_width = data_width; } + static void set_addr_width(device_t &device, uint8_t addr_width) { downcast<address_map_bank_device &>(device).m_addr_width = addr_width; } static void set_stride(device_t &device, uint32_t stride) { downcast<address_map_bank_device &>(device).m_stride = stride; } DECLARE_ADDRESS_MAP(amap8, 8); @@ -59,8 +59,8 @@ protected: private: // internal state endianness_t m_endianness; - uint8_t m_databus_width; - uint8_t m_addrbus_width; + uint8_t m_data_width; + uint8_t m_addr_width; uint32_t m_stride; address_space_config m_program_config; address_space *m_program; diff --git a/src/devices/machine/mc68681.cpp b/src/devices/machine/mc68681.cpp index f288a76971c..a75d9acbade 100644 --- a/src/devices/machine/mc68681.cpp +++ b/src/devices/machine/mc68681.cpp @@ -26,7 +26,7 @@ #include "emu.h" #include "mc68681.h" -#define VERBOSE 1 +//#define VERBOSE 1 //#define LOG_OUTPUT_FUNC printf #include "logmacro.h" diff --git a/src/devices/sound/fmopl.cpp b/src/devices/sound/fmopl.cpp index a9c15478779..2e1be1b4266 100644 --- a/src/devices/sound/fmopl.cpp +++ b/src/devices/sound/fmopl.cpp @@ -309,11 +309,37 @@ struct OPL_CH SLOT.eg_sel_rr = eg_rate_select[SLOT.rr + SLOT.ksr ]; } } + + /* CSM Key Control */ + void CSMKeyControll() + { + SLOT[SLOT1].KEYON(4); + SLOT[SLOT2].KEYON(4); + + /* The key off should happen exactly one sample later - not implemented correctly yet */ + + SLOT[SLOT1].KEYOFF(~4); + SLOT[SLOT2].KEYOFF(~4); + } }; /* OPL state */ -struct FM_OPL +class FM_OPL { +protected: + FM_OPL() +#if BUILD_Y8950 + : deltat(nullptr, [] (YM_DELTAT *p) { p->~YM_DELTAT(); }) +#endif + { + } + +public: + ~FM_OPL() + { + UnLockTable(); + } + /* FM channel slots */ OPL_CH P_CH[9]; /* OPL/OPL2 chips have 9 channels*/ @@ -349,7 +375,7 @@ struct FM_OPL #if BUILD_Y8950 /* Delta-T ADPCM unit (Y8950) */ - YM_DELTAT *deltat; + std::unique_ptr<YM_DELTAT, void (*)(YM_DELTAT *)> deltat; /* Keyboard and I/O ports interface */ uint8_t portDirection; @@ -908,39 +934,183 @@ struct FM_OPL } - void WriteReg(int r, int v); void ResetChip(); void postload(); + void clock_changed(uint32_t c, uint32_t r) + { + clock = c; + rate = r; - /* lock/unlock for common table */ - static int LockTable(device_t *device) + /* init global tables */ + initialize(); + } + + int Write(int a, int v) { - num_lock++; - if(num_lock>1) return 0; + if( !(a&1) ) + { /* address port */ + address = v & 0xff; + } + else + { /* data port */ + if (UpdateHandler) UpdateHandler(UpdateParam, 0); + WriteReg(address, v); + } + return status>>7; + } - /* first time */ + unsigned char Read(int a) + { + if( !(a&1) ) + { + /* status port */ - /* allocate total level table (128kb space) */ - if( !init_tables() ) + #if BUILD_Y8950 + + if(type&OPL_TYPE_ADPCM) /* Y8950 */ + { + return (status & (statusmask|0x80)) | (deltat->PCM_BSY&1); + } + + #endif + + /* OPL and OPL2 */ + return status & (statusmask|0x80); + } + +#if BUILD_Y8950 + /* data port */ + switch(address) { - num_lock--; - return -1; + case 0x05: /* KeyBoard IN */ + if(type&OPL_TYPE_KEYBOARD) + { + if(keyboardhandler_r) + return keyboardhandler_r(keyboard_param); + else + device->logerror("Y8950: read unmapped KEYBOARD port\n"); + } + return 0; + + case 0x0f: /* ADPCM-DATA */ + if(type&OPL_TYPE_ADPCM) + { + uint8_t val; + + val = deltat->ADPCM_Read(); + /*logerror("Y8950: read ADPCM value read=%02x\n",val);*/ + return val; + } + return 0; + + case 0x19: /* I/O DATA */ + if(type&OPL_TYPE_IO) + { + if(porthandler_r) + return porthandler_r(port_param); + else + device->logerror("Y8950:read unmapped I/O port\n"); + } + return 0; + case 0x1a: /* PCM-DATA */ + if(type&OPL_TYPE_ADPCM) + { + device->logerror("Y8950 A/D conversion is accessed but not implemented !\n"); + return 0x80; /* 2's complement PCM data - result from A/D conversion */ + } + return 0; } +#endif - return 0; + return 0xff; } - static void UnLockTable() + + int TimerOver(int c) { - if(num_lock) num_lock--; - if(num_lock) return; + if( c ) + { /* Timer B */ + STATUS_SET(0x20); + } + else + { /* Timer A */ + STATUS_SET(0x40); + /* CSM mode key,TL controll */ + if( mode & 0x80 ) + { /* CSM mode total level latch and auto key on */ + int ch; + if(UpdateHandler) UpdateHandler(UpdateParam,0); + for(ch=0; ch<9; ch++) + P_CH[ch].CSMKeyControll(); + } + } + /* reload timer */ + if (timer_handler) (timer_handler)(TimerParam,c,TimerBase * T[c]); + return status>>7; + } - /* last time */ - CloseTable(); + + /* Create one of virtual YM3812/YM3526/Y8950 */ + /* 'clock' is chip clock in Hz */ + /* 'rate' is sampling rate */ + static FM_OPL *Create(device_t *device, uint32_t clock, uint32_t rate, int type) + { + if (LockTable(device) == -1) + return nullptr; + + /* calculate OPL state size */ + size_t state_size = sizeof(FM_OPL); +#if BUILD_Y8950 + if (type & OPL_TYPE_ADPCM) + state_size+= sizeof(YM_DELTAT); +#endif + + /* allocate memory block */ + char *ptr = reinterpret_cast<char *>(::operator new(state_size)); + std::fill_n(ptr, state_size, 0); + + FM_OPL *const OPL = new(ptr) FM_OPL; + + ptr += sizeof(FM_OPL); + +#if BUILD_Y8950 + if (type & OPL_TYPE_ADPCM) + { + OPL->deltat.reset(reinterpret_cast<YM_DELTAT *>(ptr)); + ptr += sizeof(YM_DELTAT); + } +#endif + + OPL->device = device; + OPL->type = type; + OPL->clock_changed(clock, rate); + + return OPL; + } + + + /* Optional handlers */ + + void SetTimerHandler(OPL_TIMERHANDLER handler, device_t *device) + { + timer_handler = handler; + TimerParam = device; + } + void SetIRQHandler(OPL_IRQHANDLER handler, device_t *device) + { + IRQHandler = handler; + IRQParam = device; + } + void SetUpdateHandler(OPL_UPDATEHANDLER handler, device_t *device) + { + UpdateHandler = handler; + UpdateParam = device; } private: + void WriteReg(int r, int v); + uint32_t volume_calc(OPL_SLOT const &OP) const { return OP.TLL + uint32_t(OP.volume) + (LFO_AM & OP.AMmask); @@ -961,6 +1131,33 @@ private: } + /* lock/unlock for common table */ + static int LockTable(device_t *device) + { + num_lock++; + if(num_lock>1) return 0; + + /* first time */ + + /* allocate total level table (128kb space) */ + if( !init_tables() ) + { + num_lock--; + return -1; + } + + return 0; + } + + static void UnLockTable() + { + if(num_lock) num_lock--; + if(num_lock) return; + + /* last time */ + CloseTable(); + } + static int init_tables(); static void CloseTable() @@ -1781,13 +1978,11 @@ void FM_OPL::ResetChip() #if BUILD_Y8950 if(type&OPL_TYPE_ADPCM) { - YM_DELTAT *DELTAT = deltat; - - DELTAT->freqbase = freqbase; - DELTAT->output_pointer = &output_deltat[0]; - DELTAT->portshift = 5; - DELTAT->output_range = 1<<23; - DELTAT->ADPCM_Reset(0,YM_DELTAT::EMULATION_MODE_NORMAL,device); + deltat->freqbase = freqbase; + deltat->output_pointer = &output_deltat[0]; + deltat->portshift = 5; + deltat->output_range = 1<<23; + deltat->ADPCM_Reset(0,YM_DELTAT::EMULATION_MODE_NORMAL,device); } #endif } @@ -1936,197 +2131,6 @@ static void OPL_save_state(FM_OPL *OPL, device_t *device) device->machine().save().register_postload(save_prepost_delegate(FUNC(FM_OPL::postload), OPL)); } -static void OPL_clock_changed(FM_OPL *OPL, uint32_t clock, uint32_t rate) -{ - OPL->clock = clock; - OPL->rate = rate; - - /* init global tables */ - OPL->initialize(); -} - - -/* Create one of virtual YM3812/YM3526/Y8950 */ -/* 'clock' is chip clock in Hz */ -/* 'rate' is sampling rate */ -static FM_OPL *OPLCreate(device_t *device, uint32_t clock, uint32_t rate, int type) -{ - char *ptr; - FM_OPL *OPL; - int state_size; - - if (FM_OPL::LockTable(device) == -1) return nullptr; - - /* calculate OPL state size */ - state_size = sizeof(FM_OPL); - -#if BUILD_Y8950 - if (type&OPL_TYPE_ADPCM) state_size+= sizeof(YM_DELTAT); -#endif - - /* allocate memory block */ - ptr = (char *)auto_alloc_array_clear(device->machine(), uint8_t, state_size); - - OPL = (FM_OPL *)ptr; - - ptr += sizeof(FM_OPL); - -#if BUILD_Y8950 - if (type&OPL_TYPE_ADPCM) - { - OPL->deltat = (YM_DELTAT *)ptr; - } - ptr += sizeof(YM_DELTAT); -#endif - - OPL->device = device; - OPL->type = type; - OPL_clock_changed(OPL, clock, rate); - - return OPL; -} - -/* Destroy one of virtual YM3812 */ -static void OPLDestroy(FM_OPL *OPL) -{ - FM_OPL::UnLockTable(); - auto_free(OPL->device->machine(), OPL); -} - -/* Optional handlers */ - -static void OPLSetTimerHandler(FM_OPL *OPL,OPL_TIMERHANDLER timer_handler,device_t *device) -{ - OPL->timer_handler = timer_handler; - OPL->TimerParam = device; -} -static void OPLSetIRQHandler(FM_OPL *OPL,OPL_IRQHANDLER IRQHandler,device_t *device) -{ - OPL->IRQHandler = IRQHandler; - OPL->IRQParam = device; -} -static void OPLSetUpdateHandler(FM_OPL *OPL,OPL_UPDATEHANDLER UpdateHandler,device_t *device) -{ - OPL->UpdateHandler = UpdateHandler; - OPL->UpdateParam = device; -} - -static int OPLWrite(FM_OPL *OPL,int a,int v) -{ - if( !(a&1) ) - { /* address port */ - OPL->address = v & 0xff; - } - else - { /* data port */ - if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0); - OPL->WriteReg(OPL->address,v); - } - return OPL->status>>7; -} - -static unsigned char OPLRead(FM_OPL *OPL,int a) -{ - if( !(a&1) ) - { - /* status port */ - - #if BUILD_Y8950 - - if(OPL->type&OPL_TYPE_ADPCM) /* Y8950 */ - { - return (OPL->status & (OPL->statusmask|0x80)) | (OPL->deltat->PCM_BSY&1); - } - - #endif - - /* OPL and OPL2 */ - return OPL->status & (OPL->statusmask|0x80); - } - -#if BUILD_Y8950 - /* data port */ - switch(OPL->address) - { - case 0x05: /* KeyBoard IN */ - if(OPL->type&OPL_TYPE_KEYBOARD) - { - if(OPL->keyboardhandler_r) - return OPL->keyboardhandler_r(OPL->keyboard_param); - else - OPL->device->logerror("Y8950: read unmapped KEYBOARD port\n"); - } - return 0; - - case 0x0f: /* ADPCM-DATA */ - if(OPL->type&OPL_TYPE_ADPCM) - { - uint8_t val; - - val = OPL->deltat->ADPCM_Read(); - /*logerror("Y8950: read ADPCM value read=%02x\n",val);*/ - return val; - } - return 0; - - case 0x19: /* I/O DATA */ - if(OPL->type&OPL_TYPE_IO) - { - if(OPL->porthandler_r) - return OPL->porthandler_r(OPL->port_param); - else - OPL->device->logerror("Y8950:read unmapped I/O port\n"); - } - return 0; - case 0x1a: /* PCM-DATA */ - if(OPL->type&OPL_TYPE_ADPCM) - { - OPL->device->logerror("Y8950 A/D conversion is accessed but not implemented !\n"); - return 0x80; /* 2's complement PCM data - result from A/D conversion */ - } - return 0; - } -#endif - - return 0xff; -} - -/* CSM Key Controll */ -static inline void CSMKeyControll(OPL_CH *CH) -{ - CH->SLOT[SLOT1].KEYON(4); - CH->SLOT[SLOT2].KEYON(4); - - /* The key off should happen exactly one sample later - not implemented correctly yet */ - - CH->SLOT[SLOT1].KEYOFF(~4); - CH->SLOT[SLOT2].KEYOFF(~4); -} - - -static int OPLTimerOver(FM_OPL *OPL,int c) -{ - if( c ) - { /* Timer B */ - OPL->STATUS_SET(0x20); - } - else - { /* Timer A */ - OPL->STATUS_SET(0x40); - /* CSM mode key,TL controll */ - if( OPL->mode & 0x80 ) - { /* CSM mode total level latch and auto key on */ - int ch; - if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0); - for(ch=0; ch<9; ch++) - CSMKeyControll( &OPL->P_CH[ch] ); - } - } - /* reload timer */ - if (OPL->timer_handler) (OPL->timer_handler)(OPL->TimerParam,c,OPL->TimerBase * OPL->T[c]); - return OPL->status>>7; -} - #define MAX_OPL_CHIPS 2 @@ -2135,13 +2139,13 @@ static int OPLTimerOver(FM_OPL *OPL,int c) void ym3812_clock_changed(void *chip, uint32_t clock, uint32_t rate) { - OPL_clock_changed((FM_OPL *)chip, clock, rate); + reinterpret_cast<FM_OPL *>(chip)->clock_changed(clock, rate); } void * ym3812_init(device_t *device, uint32_t clock, uint32_t rate) { /* emulator create */ - FM_OPL *YM3812 = OPLCreate(device,clock,rate,OPL_TYPE_YM3812); + FM_OPL *YM3812 = FM_OPL::Create(device,clock,rate,OPL_TYPE_YM3812); if (YM3812) { OPL_save_state(YM3812, device); @@ -2155,7 +2159,7 @@ void ym3812_shutdown(void *chip) FM_OPL *YM3812 = (FM_OPL *)chip; /* emulator shutdown */ - OPLDestroy(YM3812); + delete YM3812; } void ym3812_reset_chip(void *chip) { @@ -2166,35 +2170,32 @@ void ym3812_reset_chip(void *chip) int ym3812_write(void *chip, int a, int v) { FM_OPL *YM3812 = (FM_OPL *)chip; - return OPLWrite(YM3812, a, v); + return YM3812->Write(a, v); } unsigned char ym3812_read(void *chip, int a) { FM_OPL *YM3812 = (FM_OPL *)chip; /* YM3812 always returns bit2 and bit1 in HIGH state */ - return OPLRead(YM3812, a) | 0x06 ; + return YM3812->Read(a) | 0x06 ; } int ym3812_timer_over(void *chip, int c) { FM_OPL *YM3812 = (FM_OPL *)chip; - return OPLTimerOver(YM3812, c); + return YM3812->TimerOver(c); } void ym3812_set_timer_handler(void *chip, OPL_TIMERHANDLER timer_handler, device_t *device) { - FM_OPL *YM3812 = (FM_OPL *)chip; - OPLSetTimerHandler(YM3812, timer_handler, device); + reinterpret_cast<FM_OPL *>(chip)->SetTimerHandler(timer_handler, device); } void ym3812_set_irq_handler(void *chip,OPL_IRQHANDLER IRQHandler,device_t *device) { - FM_OPL *YM3812 = (FM_OPL *)chip; - OPLSetIRQHandler(YM3812, IRQHandler, device); + reinterpret_cast<FM_OPL *>(chip)->SetIRQHandler(IRQHandler, device); } void ym3812_set_update_handler(void *chip,OPL_UPDATEHANDLER UpdateHandler,device_t *device) { - FM_OPL *YM3812 = (FM_OPL *)chip; - OPLSetUpdateHandler(YM3812, UpdateHandler, device); + reinterpret_cast<FM_OPL *>(chip)->SetUpdateHandler(UpdateHandler, device); } @@ -2268,13 +2269,13 @@ void ym3812_update_one(void *chip, OPLSAMPLE *buffer, int length) void ym3526_clock_changed(void *chip, uint32_t clock, uint32_t rate) { - OPL_clock_changed((FM_OPL *)chip, clock, rate); + reinterpret_cast<FM_OPL *>(chip)->clock_changed(clock, rate); } void *ym3526_init(device_t *device, uint32_t clock, uint32_t rate) { /* emulator create */ - FM_OPL *YM3526 = OPLCreate(device,clock,rate,OPL_TYPE_YM3526); + FM_OPL *YM3526 = FM_OPL::Create(device,clock,rate,OPL_TYPE_YM3526); if (YM3526) { OPL_save_state(YM3526, device); @@ -2287,7 +2288,7 @@ void ym3526_shutdown(void *chip) { FM_OPL *YM3526 = (FM_OPL *)chip; /* emulator shutdown */ - OPLDestroy(YM3526); + delete YM3526; } void ym3526_reset_chip(void *chip) { @@ -2298,35 +2299,32 @@ void ym3526_reset_chip(void *chip) int ym3526_write(void *chip, int a, int v) { FM_OPL *YM3526 = (FM_OPL *)chip; - return OPLWrite(YM3526, a, v); + return YM3526->Write(a, v); } unsigned char ym3526_read(void *chip, int a) { FM_OPL *YM3526 = (FM_OPL *)chip; /* YM3526 always returns bit2 and bit1 in HIGH state */ - return OPLRead(YM3526, a) | 0x06 ; + return YM3526->Read(a) | 0x06 ; } int ym3526_timer_over(void *chip, int c) { FM_OPL *YM3526 = (FM_OPL *)chip; - return OPLTimerOver(YM3526, c); + return YM3526->TimerOver(c); } void ym3526_set_timer_handler(void *chip, OPL_TIMERHANDLER timer_handler, device_t *device) { - FM_OPL *YM3526 = (FM_OPL *)chip; - OPLSetTimerHandler(YM3526, timer_handler, device); + reinterpret_cast<FM_OPL *>(chip)->SetTimerHandler(timer_handler, device); } void ym3526_set_irq_handler(void *chip,OPL_IRQHANDLER IRQHandler,device_t *device) { - FM_OPL *YM3526 = (FM_OPL *)chip; - OPLSetIRQHandler(YM3526, IRQHandler, device); + reinterpret_cast<FM_OPL *>(chip)->SetIRQHandler(IRQHandler, device); } void ym3526_set_update_handler(void *chip,OPL_UPDATEHANDLER UpdateHandler,device_t *device) { - FM_OPL *YM3526 = (FM_OPL *)chip; - OPLSetUpdateHandler(YM3526, UpdateHandler, device); + reinterpret_cast<FM_OPL *>(chip)->SetUpdateHandler(UpdateHandler, device); } @@ -2413,7 +2411,7 @@ static void Y8950_deltat_status_reset(void *chip, uint8_t changebits) void *y8950_init(device_t *device, uint32_t clock, uint32_t rate) { /* emulator create */ - FM_OPL *Y8950 = OPLCreate(device,clock,rate,OPL_TYPE_Y8950); + FM_OPL *Y8950 = FM_OPL::Create(device,clock,rate,OPL_TYPE_Y8950); if (Y8950) { Y8950->deltat->status_set_handler = Y8950_deltat_status_set; @@ -2436,7 +2434,7 @@ void y8950_shutdown(void *chip) { FM_OPL *Y8950 = (FM_OPL *)chip; /* emulator shutdown */ - OPLDestroy(Y8950); + delete Y8950; } void y8950_reset_chip(void *chip) { @@ -2447,34 +2445,31 @@ void y8950_reset_chip(void *chip) int y8950_write(void *chip, int a, int v) { FM_OPL *Y8950 = (FM_OPL *)chip; - return OPLWrite(Y8950, a, v); + return Y8950->Write(a, v); } unsigned char y8950_read(void *chip, int a) { FM_OPL *Y8950 = (FM_OPL *)chip; - return OPLRead(Y8950, a); + return Y8950->Read(a); } int y8950_timer_over(void *chip, int c) { FM_OPL *Y8950 = (FM_OPL *)chip; - return OPLTimerOver(Y8950, c); + return Y8950->TimerOver(c); } void y8950_set_timer_handler(void *chip, OPL_TIMERHANDLER timer_handler, device_t *device) { - FM_OPL *Y8950 = (FM_OPL *)chip; - OPLSetTimerHandler(Y8950, timer_handler, device); + reinterpret_cast<FM_OPL *>(chip)->SetTimerHandler(timer_handler, device); } void y8950_set_irq_handler(void *chip,OPL_IRQHANDLER IRQHandler,device_t *device) { - FM_OPL *Y8950 = (FM_OPL *)chip; - OPLSetIRQHandler(Y8950, IRQHandler, device); + reinterpret_cast<FM_OPL *>(chip)->SetIRQHandler(IRQHandler, device); } void y8950_set_update_handler(void *chip,OPL_UPDATEHANDLER UpdateHandler,device_t *device) { - FM_OPL *Y8950 = (FM_OPL *)chip; - OPLSetUpdateHandler(Y8950, UpdateHandler, device); + reinterpret_cast<FM_OPL *>(chip)->SetUpdateHandler(UpdateHandler, device); } void y8950_set_delta_t_memory(void *chip, void * deltat_mem_ptr, int deltat_mem_size ) @@ -2496,7 +2491,7 @@ void y8950_update_one(void *chip, OPLSAMPLE *buffer, int length) int i; FM_OPL *OPL = (FM_OPL *)chip; uint8_t rhythm = OPL->rhythm&0x20; - YM_DELTAT *DELTAT = OPL->deltat; + YM_DELTAT &DELTAT = *OPL->deltat; OPLSAMPLE *buf = buffer; for( i=0; i < length ; i++ ) @@ -2509,8 +2504,8 @@ void y8950_update_one(void *chip, OPLSAMPLE *buffer, int length) OPL->advance_lfo(); /* deltaT ADPCM */ - if( DELTAT->portstate&0x80 ) - DELTAT->ADPCM_CALC(); + if( DELTAT.portstate&0x80 ) + DELTAT.ADPCM_CALC(); /* FM part */ OPL->CALC_CH(OPL->P_CH[0]); diff --git a/src/devices/sound/rf5c400.cpp b/src/devices/sound/rf5c400.cpp index 39440c66991..4fc6a364c7a 100644 --- a/src/devices/sound/rf5c400.cpp +++ b/src/devices/sound/rf5c400.cpp @@ -181,7 +181,7 @@ void rf5c400_device::device_start() m_stream = stream_alloc(0, 2, clock() / 384); - m_rommask = m_rom.length() - 1; + m_rommask = (m_rom.length()/2) - 1; } //------------------------------------------------- @@ -258,7 +258,7 @@ void rf5c400_device::sound_stream_update(sound_stream &stream, stream_sample_t * { env_phase = PHASE_DECAY; env_level = 1.0; - if (channel->decay & 0x0080) + if ((channel->decay & 0x0080) || (channel->decay == 0x100)) { env_step = 0.0; } diff --git a/src/devices/sound/ymz770.cpp b/src/devices/sound/ymz770.cpp index 86f2710f2fa..ae7a995ce21 100644 --- a/src/devices/sound/ymz770.cpp +++ b/src/devices/sound/ymz770.cpp @@ -107,6 +107,7 @@ void ymz770_device::device_start() save_item(NAME(m_sequences[ch].timer), ch); save_item(NAME(m_sequences[ch].stopchan), ch); save_item(NAME(m_sequences[ch].loop), ch); + save_item(NAME(m_sequences[ch].bank), ch); save_item(NAME(m_sequences[ch].is_playing), ch); } } @@ -140,6 +141,7 @@ void ymz770_device::device_reset() sequence.timer = 0; sequence.stopchan = 0; sequence.loop = 0; + sequence.bank = 0; sequence.is_playing = false; } } @@ -517,7 +519,7 @@ void ymz774_device::internal_reg_write(uint8_t reg, uint8_t data) case 0x60: // sequence num H and L case 0x68: sq = (reg >> 1) & 7; - if (sq & 1) + if (reg & 1) m_sequences[sq].sequence = (m_sequences[sq].sequence & 0xff00) | data; else m_sequences[sq].sequence = (m_sequences[sq].sequence & 0x00ff) | ((data & 0x0f) << 8); // TODO check if total number really upto 0x1000 @@ -544,7 +546,7 @@ void ymz774_device::internal_reg_write(uint8_t reg, uint8_t data) case 0x88: // timer H and L case 0x90: sq = (reg >> 1) & 7; - if (sq & 1) + if (reg & 1) m_sequences[sq].timer = (m_sequences[sq].timer & 0xff00) | data; else m_sequences[sq].timer = (m_sequences[sq].timer & 0x00ff) | (data << 8); @@ -555,7 +557,7 @@ void ymz774_device::internal_reg_write(uint8_t reg, uint8_t data) case 0xa0: // stop channel mask H and L, what it for ? stop chanels immediatelly or when sequence ends (so far assuming later) ? case 0xa8: sq = (reg >> 1) & 7; - if (sq & 1) + if (reg & 1) m_sequences[sq].stopchan = (m_sequences[sq].stopchan & 0xff00) | data; else m_sequences[sq].stopchan = (m_sequences[sq].stopchan & 0x00ff) | (data << 8); @@ -626,7 +628,13 @@ void ymz774_device::sequencer() case 0xfe: // timer delay sequence.delay = sequence.timer * 32; // possible needed -1 or +(32-1) break; + case 0xf0: + sequence.bank = data & 1; + break; default: + { + uint8_t temp = m_bank; + m_bank = sequence.bank; if (m_bank == 0 && reg >= 0x60 && reg < 0xb0) // if we hit SEQ registers need to add this sequence offset { int sqn = i; @@ -636,6 +644,8 @@ void ymz774_device::sequencer() } else internal_reg_write(reg, data); + m_bank = temp; + } break; } } diff --git a/src/devices/sound/ymz770.h b/src/devices/sound/ymz770.h index 0393b5f706e..b640d780ef5 100644 --- a/src/devices/sound/ymz770.h +++ b/src/devices/sound/ymz770.h @@ -101,6 +101,7 @@ protected: uint16_t stopchan; uint8_t loop; uint8_t *data; + uint8_t bank; bool is_playing; }; diff --git a/src/emu/addrmap.cpp b/src/emu/addrmap.cpp index 9eee69f986f..5f717f3f79a 100644 --- a/src/emu/addrmap.cpp +++ b/src/emu/addrmap.cpp @@ -605,7 +605,7 @@ void address_map::map_validity_check(validity_checker &valid, int spacenum) cons { // it's safe to assume here that the device has a memory interface and a config for this space const address_space_config &spaceconfig = *m_device->memory().space_config(spacenum); - int datawidth = spaceconfig.m_databus_width; + int datawidth = spaceconfig.m_data_width; int alignunit = spaceconfig.alignment(); bool detected_overlap = DETECT_OVERLAPPING_MEMORY ? false : true; @@ -620,7 +620,7 @@ void address_map::map_validity_check(validity_checker &valid, int spacenum) cons if (m_databits != datawidth) osd_printf_error("Wrong memory handlers provided for %s space! (width = %d, memory = %08x)\n", spaceconfig.m_name, datawidth, m_databits); - offs_t globalmask = 0xffffffffUL >> (32 - spaceconfig.m_addrbus_width); + offs_t globalmask = 0xffffffffUL >> (32 - spaceconfig.m_addr_width); if (m_globalmask != 0) globalmask = m_globalmask; diff --git a/src/emu/debug/debugbuf.cpp b/src/emu/debug/debugbuf.cpp index 779b91f84ac..bd24f475340 100644 --- a/src/emu/debug/debugbuf.cpp +++ b/src/emu/debug/debugbuf.cpp @@ -176,7 +176,7 @@ void debug_disasm_buffer::debug_data_buffer::data_get(offs_t pc, offs_t size, st void debug_disasm_buffer::debug_data_buffer::setup_methods() { address_space *space = m_space ? m_space : m_back->get_underlying_space(); - int shift = space->addrbus_shift(); + int shift = space->addr_shift(); int alignment = m_intf->opcode_alignment(); endianness_t endian = space->endianness(); diff --git a/src/emu/debug/debugcmd.cpp b/src/emu/debug/debugcmd.cpp index 0c7715b523b..38bff17b8c4 100644 --- a/src/emu/debug/debugcmd.cpp +++ b/src/emu/debug/debugcmd.cpp @@ -100,15 +100,15 @@ debugger_commands::debugger_commands(running_machine& machine, debugger_cpu& cpu , m_cpu(cpu) , m_console(console) { - m_global_array = auto_alloc_array_clear(m_machine, global_entry, MAX_GLOBALS); + m_global_array = std::make_unique<global_entry []>(MAX_GLOBALS); symbol_table *symtable = m_cpu.get_global_symtable(); /* add a few simple global functions */ using namespace std::placeholders; - symtable->add("min", nullptr, 2, 2, std::bind(&debugger_commands::execute_min, this, _1, _2, _3, _4)); - symtable->add("max", nullptr, 2, 2, std::bind(&debugger_commands::execute_max, this, _1, _2, _3, _4)); - symtable->add("if", nullptr, 3, 3, std::bind(&debugger_commands::execute_if, this, _1, _2, _3, _4)); + symtable->add("min", 2, 2, std::bind(&debugger_commands::execute_min, this, _1, _2, _3)); + symtable->add("max", 2, 2, std::bind(&debugger_commands::execute_max, this, _1, _2, _3)); + symtable->add("if", 3, 3, std::bind(&debugger_commands::execute_if, this, _1, _2, _3)); /* add all single-entry save state globals */ for (int itemnum = 0; itemnum < MAX_GLOBALS; itemnum++) @@ -128,7 +128,10 @@ debugger_commands::debugger_commands(running_machine& machine, debugger_cpu& cpu sprintf(symname, ".%s", strrchr(name, '/') + 1); m_global_array[itemnum].base = base; m_global_array[itemnum].size = valsize; - symtable->add(symname, &m_global_array, std::bind(&debugger_commands::global_get, this, _1, _2), std::bind(&debugger_commands::global_set, this, _1, _2, _3)); + symtable->add( + symname, + std::bind(&debugger_commands::global_get, this, _1, &m_global_array[itemnum]), + std::bind(&debugger_commands::global_set, this, _1, &m_global_array[itemnum], _2)); } } @@ -293,7 +296,7 @@ debugger_commands::debugger_commands(running_machine& machine, debugger_cpu& cpu execute_min - return the minimum of two values -------------------------------------------------*/ -u64 debugger_commands::execute_min(symbol_table &table, void *ref, int params, const u64 *param) +u64 debugger_commands::execute_min(symbol_table &table, int params, const u64 *param) { return (param[0] < param[1]) ? param[0] : param[1]; } @@ -303,7 +306,7 @@ u64 debugger_commands::execute_min(symbol_table &table, void *ref, int params, c execute_max - return the maximum of two values -------------------------------------------------*/ -u64 debugger_commands::execute_max(symbol_table &table, void *ref, int params, const u64 *param) +u64 debugger_commands::execute_max(symbol_table &table, int params, const u64 *param) { return (param[0] > param[1]) ? param[0] : param[1]; } @@ -313,7 +316,7 @@ u64 debugger_commands::execute_max(symbol_table &table, void *ref, int params, c execute_if - if (a) return b; else return c; -------------------------------------------------*/ -u64 debugger_commands::execute_if(symbol_table &table, void *ref, int params, const u64 *param) +u64 debugger_commands::execute_if(symbol_table &table, int params, const u64 *param) { return param[0] ? param[1] : param[2]; } @@ -328,9 +331,8 @@ u64 debugger_commands::execute_if(symbol_table &table, void *ref, int params, co global_get - symbol table getter for globals -------------------------------------------------*/ -u64 debugger_commands::global_get(symbol_table &table, void *ref) +u64 debugger_commands::global_get(symbol_table &table, global_entry *global) { - global_entry *global = (global_entry *)ref; switch (global->size) { case 1: return *(u8 *)global->base; @@ -346,9 +348,8 @@ u64 debugger_commands::global_get(symbol_table &table, void *ref) global_set - symbol table setter for globals -------------------------------------------------*/ -void debugger_commands::global_set(symbol_table &table, void *ref, u64 value) +void debugger_commands::global_set(symbol_table &table, global_entry *global, u64 value) { - global_entry *global = (global_entry *)ref; switch (global->size) { case 1: *(u8 *)global->base = value; break; @@ -761,7 +762,7 @@ void debugger_commands::execute_tracesym(int ref, const std::vector<std::string> void debugger_commands::execute_quit(int ref, const std::vector<std::string> ¶ms) { - osd_printf_error("Exited via the debugger\n"); + osd_printf_warning("Exited via the debugger\n"); m_machine.schedule_exit(); } @@ -1669,7 +1670,7 @@ void debugger_commands::execute_save(int ref, const std::vector<std::string> &pa /* now write the data out */ auto dis = space->machine().disable_side_effect(); - switch (space->addrbus_shift()) + switch (space->addr_shift()) { case -3: for (offs_t i = offset; i != endoffset; i++) @@ -1748,10 +1749,10 @@ void debugger_commands::execute_load(int ref, const std::vector<std::string> &pa f.seekg(0, std::ios::end); length = f.tellg(); f.seekg(0); - if (space->addrbus_shift() < 0) - length >>= -space->addrbus_shift(); - else if (space->addrbus_shift() > 0) - length <<= space->addrbus_shift(); + if (space->addr_shift() < 0) + length >>= -space->addr_shift(); + else if (space->addr_shift() > 0) + length <<= space->addr_shift(); } // determine the addresses to read @@ -1759,7 +1760,7 @@ void debugger_commands::execute_load(int ref, const std::vector<std::string> &pa offset = offset & space->addrmask(); offs_t i = 0; // now read the data in, ignore endoffset and load entire file if length has been set to zero (offset-1) - switch (space->addrbus_shift()) + switch (space->addr_shift()) { case -3: for (i = offset; f.good() && (i <= endoffset || endoffset == offset - 1); i++) @@ -1850,7 +1851,7 @@ void debugger_commands::execute_dump(int ref, const std::vector<std::string> &pa if (!validate_cpu_space_parameter((params.size() > 6) ? params[6].c_str() : nullptr, ref, space)) return; - int shift = space->addrbus_shift(); + int shift = space->addr_shift(); u64 granularity = shift > 0 ? 2 : 1 << -shift; /* further validation */ @@ -2453,7 +2454,7 @@ void debugger_commands::execute_find(int ref, const std::vector<std::string> &pa /* further validation */ endoffset = (offset + length - 1) & space->addrmask(); offset = offset & space->addrmask(); - cur_data_size = space->addrbus_shift() > 0 ? 2 : 1 << -space->addrbus_shift(); + cur_data_size = space->addr_shift() > 0 ? 2 : 1 << -space->addr_shift(); if (cur_data_size == 0) cur_data_size = 1; diff --git a/src/emu/debug/debugcmd.h b/src/emu/debug/debugcmd.h index 7eca669908e..98b6d8ae03d 100644 --- a/src/emu/debug/debugcmd.h +++ b/src/emu/debug/debugcmd.h @@ -37,8 +37,10 @@ public: private: struct global_entry { - void * base; - u32 size; + global_entry() { } + + void * base = nullptr; + u32 size = 0; }; @@ -79,12 +81,12 @@ private: u64 cheat_byte_swap(const cheat_system *cheatsys, u64 value); u64 cheat_read_extended(const cheat_system *cheatsys, address_space &space, offs_t address); - u64 execute_min(symbol_table &table, void *ref, int params, const u64 *param); - u64 execute_max(symbol_table &table, void *ref, int params, const u64 *param); - u64 execute_if(symbol_table &table, void *ref, int params, const u64 *param); + u64 execute_min(symbol_table &table, int params, const u64 *param); + u64 execute_max(symbol_table &table, int params, const u64 *param); + u64 execute_if(symbol_table &table, int params, const u64 *param); - u64 global_get(symbol_table &table, void *ref); - void global_set(symbol_table &table, void *ref, u64 value); + u64 global_get(symbol_table &table, global_entry *global); + void global_set(symbol_table &table, global_entry *global, u64 value); int mini_printf(char *buffer, const char *format, int params, u64 *param); @@ -162,7 +164,7 @@ private: debugger_cpu& m_cpu; debugger_console& m_console; - global_entry *m_global_array; + std::unique_ptr<global_entry []> m_global_array; cheat_system m_cheat; static const size_t MAX_GLOBALS; diff --git a/src/emu/debug/debugcpu.cpp b/src/emu/debug/debugcpu.cpp index c5f5a532599..eab6f7771e7 100644 --- a/src/emu/debug/debugcpu.cpp +++ b/src/emu/debug/debugcpu.cpp @@ -49,6 +49,7 @@ debugger_cpu::debugger_cpu(running_machine &machine) , m_breakcpu(nullptr) , m_symtable(nullptr) , m_execution_state(EXECUTION_STATE_STOPPED) + , m_stop_when_not_device(nullptr) , m_bpindex(1) , m_wpindex(1) , m_rpindex(1) @@ -72,10 +73,10 @@ debugger_cpu::debugger_cpu(running_machine &machine) m_symtable->add("wpdata", symbol_table::READ_ONLY, &m_wpdata); using namespace std::placeholders; - m_symtable->add("cpunum", nullptr, std::bind(&debugger_cpu::get_cpunum, this, _1, _2)); - m_symtable->add("beamx", (void *)first_screen, std::bind(&debugger_cpu::get_beamx, this, _1, _2)); - m_symtable->add("beamy", (void *)first_screen, std::bind(&debugger_cpu::get_beamy, this, _1, _2)); - m_symtable->add("frame", (void *)first_screen, std::bind(&debugger_cpu::get_frame, this, _1, _2)); + m_symtable->add("cpunum", std::bind(&debugger_cpu::get_cpunum, this, _1)); + m_symtable->add("beamx", std::bind(&debugger_cpu::get_beamx, this, _1, first_screen)); + m_symtable->add("beamy", std::bind(&debugger_cpu::get_beamy, this, _1, first_screen)); + m_symtable->add("frame", std::bind(&debugger_cpu::get_frame, this, _1, first_screen)); /* add the temporary variables to the global symbol table */ for (int regnum = 0; regnum < NUM_TEMP_VARIABLES; regnum++) @@ -1341,9 +1342,8 @@ expression_error::error_code debugger_cpu::expression_validate(void *param, cons get_beamx - get beam horizontal position -------------------------------------------------*/ -u64 debugger_cpu::get_beamx(symbol_table &table, void *ref) +u64 debugger_cpu::get_beamx(symbol_table &table, screen_device *screen) { - screen_device *screen = reinterpret_cast<screen_device *>(ref); return (screen != nullptr) ? screen->hpos() : 0; } @@ -1352,9 +1352,8 @@ u64 debugger_cpu::get_beamx(symbol_table &table, void *ref) get_beamy - get beam vertical position -------------------------------------------------*/ -u64 debugger_cpu::get_beamy(symbol_table &table, void *ref) +u64 debugger_cpu::get_beamy(symbol_table &table, screen_device *screen) { - screen_device *screen = reinterpret_cast<screen_device *>(ref); return (screen != nullptr) ? screen->vpos() : 0; } @@ -1363,9 +1362,8 @@ u64 debugger_cpu::get_beamy(symbol_table &table, void *ref) get_frame - get current frame number -------------------------------------------------*/ -u64 debugger_cpu::get_frame(symbol_table &table, void *ref) +u64 debugger_cpu::get_frame(symbol_table &table, screen_device *screen) { - screen_device *screen = reinterpret_cast<screen_device *>(ref); return (screen != nullptr) ? screen->frame_number() : 0; } @@ -1375,7 +1373,7 @@ u64 debugger_cpu::get_frame(symbol_table &table, void *ref) 'cpunum' symbol -------------------------------------------------*/ -u64 debugger_cpu::get_cpunum(symbol_table &table, void *ref) +u64 debugger_cpu::get_cpunum(symbol_table &table) { execute_interface_iterator iter(m_machine.root_device()); return iter.indexof(m_visiblecpu->execute()); @@ -1538,22 +1536,34 @@ device_debug::device_debug(device_t &device) // add global symbol for cycles and totalcycles if (m_exec != nullptr) { - m_symtable.add("cycles", nullptr, get_cycles); - m_symtable.add("totalcycles", nullptr, get_totalcycles); - m_symtable.add("lastinstructioncycles", nullptr, get_lastinstructioncycles); + m_symtable.add("cycles", get_cycles); + m_symtable.add("totalcycles", get_totalcycles); + m_symtable.add("lastinstructioncycles", get_lastinstructioncycles); } // add entries to enable/disable unmap reporting for each space if (m_memory != nullptr) { if (m_memory->has_space(AS_PROGRAM)) - m_symtable.add("logunmap", (void *)&m_memory->space(AS_PROGRAM), get_logunmap, set_logunmap); + m_symtable.add( + "logunmap", + [&space = m_memory->space(AS_PROGRAM)] (symbol_table &table) { return space.log_unmap(); }, + [&space = m_memory->space(AS_PROGRAM)] (symbol_table &table, u64 value) { return space.set_log_unmap(bool(value)); }); if (m_memory->has_space(AS_DATA)) - m_symtable.add("logunmapd", (void *)&m_memory->space(AS_DATA), get_logunmap, set_logunmap); + m_symtable.add( + "logunmap", + [&space = m_memory->space(AS_DATA)] (symbol_table &table) { return space.log_unmap(); }, + [&space = m_memory->space(AS_DATA)] (symbol_table &table, u64 value) { return space.set_log_unmap(bool(value)); }); if (m_memory->has_space(AS_IO)) - m_symtable.add("logunmapi", (void *)&m_memory->space(AS_IO), get_logunmap, set_logunmap); + m_symtable.add( + "logunmap", + [&space = m_memory->space(AS_IO)] (symbol_table &table) { return space.log_unmap(); }, + [&space = m_memory->space(AS_IO)] (symbol_table &table, u64 value) { return space.set_log_unmap(bool(value)); }); if (m_memory->has_space(AS_OPCODES)) - m_symtable.add("logunmapo", (void *)&m_memory->space(AS_OPCODES), get_logunmap, set_logunmap); + m_symtable.add( + "logunmap", + [&space = m_memory->space(AS_OPCODES)] (symbol_table &table) { return space.log_unmap(); }, + [&space = m_memory->space(AS_OPCODES)] (symbol_table &table, u64 value) { return space.set_log_unmap(bool(value)); }); } // add all registers into it @@ -1563,8 +1573,13 @@ device_debug::device_debug(device_t &device) // TODO: floating point registers if (!entry->is_float()) { + using namespace std::placeholders; strmakelower(tempstr.assign(entry->symbol())); - m_symtable.add(tempstr.c_str(), (void *)(uintptr_t)entry->index(), get_state, entry->writeable() ? set_state : nullptr, entry->format_string()); + m_symtable.add( + tempstr.c_str(), + std::bind(&device_debug::get_state, _1, entry->index()), + entry->writeable() ? std::bind(&device_debug::set_state, _1, entry->index(), _2) : symbol_table::setter_func(nullptr), + entry->format_string()); } } } @@ -1575,8 +1590,8 @@ device_debug::device_debug(device_t &device) m_flags = DEBUG_FLAG_OBSERVING | DEBUG_FLAG_HISTORY; // if no curpc, add one - if (m_state != nullptr && m_symtable.find("curpc") == nullptr) - m_symtable.add("curpc", nullptr, get_current_pc); + if (m_state && !m_symtable.find("curpc")) + m_symtable.add("curpc", get_current_pc); } // set up trace @@ -2875,7 +2890,7 @@ void device_debug::hotspot_check(address_space &space, offs_t address) // current instruction pointer //------------------------------------------------- -u64 device_debug::get_current_pc(symbol_table &table, void *ref) +u64 device_debug::get_current_pc(symbol_table &table) { device_t *device = reinterpret_cast<device_t *>(table.globalref()); return device->safe_pcbase(); @@ -2887,7 +2902,7 @@ u64 device_debug::get_current_pc(symbol_table &table, void *ref) // 'cycles' symbol //------------------------------------------------- -u64 device_debug::get_cycles(symbol_table &table, void *ref) +u64 device_debug::get_cycles(symbol_table &table) { device_t *device = reinterpret_cast<device_t *>(table.globalref()); return device->debug()->m_exec->cycles_remaining(); @@ -2899,7 +2914,7 @@ u64 device_debug::get_cycles(symbol_table &table, void *ref) // 'totalcycles' symbol //------------------------------------------------- -u64 device_debug::get_totalcycles(symbol_table &table, void *ref) +u64 device_debug::get_totalcycles(symbol_table &table) { device_t *device = reinterpret_cast<device_t *>(table.globalref()); return device->debug()->m_total_cycles; @@ -2911,7 +2926,7 @@ u64 device_debug::get_totalcycles(symbol_table &table, void *ref) // 'lastinstructioncycles' symbol //------------------------------------------------- -u64 device_debug::get_lastinstructioncycles(symbol_table &table, void *ref) +u64 device_debug::get_lastinstructioncycles(symbol_table &table) { device_t *device = reinterpret_cast<device_t *>(table.globalref()); device_debug *debug = device->debug(); @@ -2920,38 +2935,14 @@ u64 device_debug::get_lastinstructioncycles(symbol_table &table, void *ref) //------------------------------------------------- -// get_logunmap - getter callback for the logumap -// symbols -//------------------------------------------------- - -u64 device_debug::get_logunmap(symbol_table &table, void *ref) -{ - address_space &space = *reinterpret_cast<address_space *>(table.globalref()); - return space.log_unmap(); -} - - -//------------------------------------------------- -// set_logunmap - setter callback for the logumap -// symbols -//------------------------------------------------- - -void device_debug::set_logunmap(symbol_table &table, void *ref, u64 value) -{ - address_space &space = *reinterpret_cast<address_space *>(table.globalref()); - space.set_log_unmap(value ? true : false); -} - - -//------------------------------------------------- // get_state - getter callback for a device's // state symbols //------------------------------------------------- -u64 device_debug::get_state(symbol_table &table, void *ref) +u64 device_debug::get_state(symbol_table &table, int index) { device_t *device = reinterpret_cast<device_t *>(table.globalref()); - return device->debug()->m_state->state_int(reinterpret_cast<uintptr_t>(ref)); + return device->debug()->m_state->state_int(index); } @@ -2960,10 +2951,10 @@ u64 device_debug::get_state(symbol_table &table, void *ref) // state symbols //------------------------------------------------- -void device_debug::set_state(symbol_table &table, void *ref, u64 value) +void device_debug::set_state(symbol_table &table, int index, u64 value) { device_t *device = reinterpret_cast<device_t *>(table.globalref()); - device->debug()->m_state->set_state_int(reinterpret_cast<uintptr_t>(ref), value); + device->debug()->m_state->set_state_int(index, value); } diff --git a/src/emu/debug/debugcpu.h b/src/emu/debug/debugcpu.h index e00ac9576cc..388e497cb0a 100644 --- a/src/emu/debug/debugcpu.h +++ b/src/emu/debug/debugcpu.h @@ -288,14 +288,12 @@ private: void hotspot_check(address_space &space, offs_t address); // symbol get/set callbacks - static u64 get_current_pc(symbol_table &table, void *ref); - static u64 get_cycles(symbol_table &table, void *ref); - static u64 get_totalcycles(symbol_table &table, void *ref); - static u64 get_lastinstructioncycles(symbol_table &table, void *ref); - static u64 get_logunmap(symbol_table &table, void *ref); - static void set_logunmap(symbol_table &table, void *ref, u64 value); - static u64 get_state(symbol_table &table, void *ref); - static void set_state(symbol_table &table, void *ref, u64 value); + static u64 get_current_pc(symbol_table &table); + static u64 get_cycles(symbol_table &table); + static u64 get_totalcycles(symbol_table &table); + static u64 get_lastinstructioncycles(symbol_table &table); + static u64 get_state(symbol_table &table, int index); + static void set_state(symbol_table &table, int index, u64 value); // basic device information device_t & m_device; // device we are attached to @@ -585,10 +583,10 @@ private: device_t* expression_get_device(const char *tag); /* variable getters/setters */ - u64 get_cpunum(symbol_table &table, void *ref); - u64 get_beamx(symbol_table &table, void *ref); - u64 get_beamy(symbol_table &table, void *ref); - u64 get_frame(symbol_table &table, void *ref); + u64 get_cpunum(symbol_table &table); + u64 get_beamx(symbol_table &table, screen_device *screen); + u64 get_beamy(symbol_table &table, screen_device *screen); + u64 get_frame(symbol_table &table, screen_device *screen); /* internal helpers */ void on_vblank(screen_device &device, bool vblank_state); diff --git a/src/emu/debug/debugvw.h b/src/emu/debug/debugvw.h index d456eacdbeb..374af7f384e 100644 --- a/src/emu/debug/debugvw.h +++ b/src/emu/debug/debugvw.h @@ -158,7 +158,7 @@ public: void set_visible_position(debug_view_xy pos); void set_cursor_position(debug_view_xy pos); void set_cursor_visible(bool visible = true); - void set_source(const debug_view_source &source); + virtual void set_source(const debug_view_source &source); // helpers void process_char(int character) { view_char(character); } diff --git a/src/emu/debug/dvdisasm.cpp b/src/emu/debug/dvdisasm.cpp index 9ad6cb968c2..2292e766132 100644 --- a/src/emu/debug/dvdisasm.cpp +++ b/src/emu/debug/dvdisasm.cpp @@ -231,7 +231,7 @@ bool debug_view_disasm::generate_with_pc(debug_disasm_buffer &buffer, offs_t pc) { // Consider that instructions are 64 bytes max const debug_view_disasm_source &source = downcast<const debug_view_disasm_source &>(*m_source); - int shift = source.m_space.addrbus_shift(); + int shift = source.m_space.addr_shift(); offs_t backwards_offset; if(shift < 0) @@ -559,3 +559,13 @@ void debug_view_disasm::set_selected_address(offs_t address) break; } } + +//------------------------------------------------- +// set_source - set the current subview +//------------------------------------------------- + +void debug_view_disasm::set_source(const debug_view_source &source) +{ + debug_view::set_source(source); + m_dasm.clear(); +} diff --git a/src/emu/debug/dvdisasm.h b/src/emu/debug/dvdisasm.h index dcf756117b8..ef9e4209f1b 100644 --- a/src/emu/debug/dvdisasm.h +++ b/src/emu/debug/dvdisasm.h @@ -80,6 +80,7 @@ public: void set_backward_steps(u32 steps); void set_disasm_width(u32 width); void set_selected_address(offs_t address); + virtual void set_source(const debug_view_source &source) override; protected: // view overrides diff --git a/src/emu/debug/express.cpp b/src/emu/debug/express.cpp index 9661d80a35a..06e12e09800 100644 --- a/src/emu/debug/express.cpp +++ b/src/emu/debug/express.cpp @@ -114,7 +114,7 @@ public: // construction/destruction integer_symbol_entry(symbol_table &table, const char *name, symbol_table::read_write rw, u64 *ptr = nullptr); integer_symbol_entry(symbol_table &table, const char *name, u64 constval); - integer_symbol_entry(symbol_table &table, const char *name, void *ref, symbol_table::getter_func getter, symbol_table::setter_func setter, const std::string &format); + integer_symbol_entry(symbol_table &table, const char *name, symbol_table::getter_func getter, symbol_table::setter_func setter, const std::string &format); // symbol access virtual bool is_lval() const override; @@ -122,10 +122,6 @@ public: virtual void set_value(u64 newvalue) override; private: - // internal helpers - static u64 internal_getter(symbol_table &table, void *symref); - static void internal_setter(symbol_table &table, void *symref, u64 value); - // internal state symbol_table::getter_func m_getter; symbol_table::setter_func m_setter; @@ -138,7 +134,7 @@ class function_symbol_entry : public symbol_entry { public: // construction/destruction - function_symbol_entry(symbol_table &table, const char *name, void *ref, int minparams, int maxparams, symbol_table::execute_func execute); + function_symbol_entry(symbol_table &table, const char *name, int minparams, int maxparams, symbol_table::execute_func execute); // symbol access virtual bool is_lval() const override; @@ -203,13 +199,12 @@ const char *expression_error::code_string() const // symbol_entry - constructor //------------------------------------------------- -symbol_entry::symbol_entry(symbol_table &table, symbol_type type, const char *name, const std::string &format, void *ref) +symbol_entry::symbol_entry(symbol_table &table, symbol_type type, const char *name, const std::string &format) : m_next(nullptr), m_table(table), m_type(type), m_name(name), - m_format(format), - m_ref(ref) + m_format(format) { } @@ -233,25 +228,31 @@ symbol_entry::~symbol_entry() //------------------------------------------------- integer_symbol_entry::integer_symbol_entry(symbol_table &table, const char *name, symbol_table::read_write rw, u64 *ptr) - : symbol_entry(table, SMT_INTEGER, name, "", (ptr == nullptr) ? &m_value : ptr), - m_getter(internal_getter), - m_setter((rw == symbol_table::READ_ONLY) ? nullptr : internal_setter), + : symbol_entry(table, SMT_INTEGER, name, ""), + m_getter(ptr + ? symbol_table::getter_func([ptr] (symbol_table &table) { return *ptr; }) + : symbol_table::getter_func([this] (symbol_table &table) { return m_value; })), + m_setter((rw == symbol_table::READ_ONLY) + ? symbol_table::setter_func(nullptr) + : ptr + ? symbol_table::setter_func([ptr] (symbol_table &table, u64 value) { *ptr = value; }) + : symbol_table::setter_func([this] (symbol_table &table, u64 value) { m_value = value; })), m_value(0) { } integer_symbol_entry::integer_symbol_entry(symbol_table &table, const char *name, u64 constval) - : symbol_entry(table, SMT_INTEGER, name, "", &m_value), - m_getter(internal_getter), + : symbol_entry(table, SMT_INTEGER, name, ""), + m_getter([this] (symbol_table &table) { return m_value; }), m_setter(nullptr), m_value(constval) { } -integer_symbol_entry::integer_symbol_entry(symbol_table &table, const char *name, void *ref, symbol_table::getter_func getter, symbol_table::setter_func setter, const std::string &format) - : symbol_entry(table, SMT_INTEGER, name, format, ref), +integer_symbol_entry::integer_symbol_entry(symbol_table &table, const char *name, symbol_table::getter_func getter, symbol_table::setter_func setter, const std::string &format) + : symbol_entry(table, SMT_INTEGER, name, format), m_getter(getter), m_setter(setter), m_value(0) @@ -275,7 +276,7 @@ bool integer_symbol_entry::is_lval() const u64 integer_symbol_entry::value() const { - return m_getter(m_table, m_ref); + return m_getter(m_table); } @@ -286,34 +287,12 @@ u64 integer_symbol_entry::value() const void integer_symbol_entry::set_value(u64 newvalue) { if (m_setter != nullptr) - m_setter(m_table, m_ref, newvalue); + m_setter(m_table, newvalue); else throw emu_fatalerror("Symbol '%s' is read-only", m_name.c_str()); } -//------------------------------------------------- -// internal_getter - internal helper for -// returning the value of a variable -//------------------------------------------------- - -u64 integer_symbol_entry::internal_getter(symbol_table &table, void *symref) -{ - return *(u64 *)symref; -} - - -//------------------------------------------------- -// internal_setter - internal helper for setting -// the value of a variable -//------------------------------------------------- - -void integer_symbol_entry::internal_setter(symbol_table &table, void *symref, u64 value) -{ - *(u64 *)symref = value; -} - - //************************************************************************** // FUNCTION SYMBOL ENTRY @@ -323,8 +302,8 @@ void integer_symbol_entry::internal_setter(symbol_table &table, void *symref, u6 // function_symbol_entry - constructor //------------------------------------------------- -function_symbol_entry::function_symbol_entry(symbol_table &table, const char *name, void *ref, int minparams, int maxparams, symbol_table::execute_func execute) - : symbol_entry(table, SMT_FUNCTION, name, "", ref), +function_symbol_entry::function_symbol_entry(symbol_table &table, const char *name, int minparams, int maxparams, symbol_table::execute_func execute) + : symbol_entry(table, SMT_FUNCTION, name, ""), m_minparams(minparams), m_maxparams(maxparams), m_execute(execute) @@ -372,7 +351,7 @@ u64 function_symbol_entry::execute(int numparams, const u64 *paramlist) throw emu_fatalerror("Function '%s' requires at least %d parameters", m_name.c_str(), m_minparams); if (numparams > m_maxparams) throw emu_fatalerror("Function '%s' accepts no more than %d parameters", m_name.c_str(), m_maxparams); - return m_execute(m_table, m_ref, numparams, paramlist); + return m_execute(m_table, numparams, paramlist); } @@ -435,10 +414,10 @@ void symbol_table::add(const char *name, u64 value) // add - add a new register symbol //------------------------------------------------- -void symbol_table::add(const char *name, void *ref, getter_func getter, setter_func setter, const std::string &format_string) +void symbol_table::add(const char *name, getter_func getter, setter_func setter, const std::string &format_string) { m_symlist.erase(name); - m_symlist.emplace(name, std::make_unique<integer_symbol_entry>(*this, name, ref, getter, setter, format_string)); + m_symlist.emplace(name, std::make_unique<integer_symbol_entry>(*this, name, getter, setter, format_string)); } @@ -446,10 +425,10 @@ void symbol_table::add(const char *name, void *ref, getter_func getter, setter_f // add - add a new function symbol //------------------------------------------------- -void symbol_table::add(const char *name, void *ref, int minparams, int maxparams, execute_func execute) +void symbol_table::add(const char *name, int minparams, int maxparams, execute_func execute) { m_symlist.erase(name); - m_symlist.emplace(name, std::make_unique<function_symbol_entry>(*this, name, ref, minparams, maxparams, execute)); + m_symlist.emplace(name, std::make_unique<function_symbol_entry>(*this, name, minparams, maxparams, execute)); } diff --git a/src/emu/debug/express.h b/src/emu/debug/express.h index 19381786d1b..8084cf84e8f 100644 --- a/src/emu/debug/express.h +++ b/src/emu/debug/express.h @@ -114,7 +114,7 @@ protected: }; // construction/destruction - symbol_entry(symbol_table &table, symbol_type type, const char *name, const std::string &format, void *ref); + symbol_entry(symbol_table &table, symbol_type type, const char *name, const std::string &format); public: virtual ~symbol_entry(); @@ -138,7 +138,6 @@ protected: symbol_type m_type; // type of symbol std::string m_name; // name of the symbol std::string m_format; // format of symbol (or empty if unspecified) - void * m_ref; // internal reference }; @@ -150,11 +149,11 @@ class symbol_table { public: // callback functions for getting/setting a symbol value - typedef std::function<u64(symbol_table &table, void *symref)> getter_func; - typedef std::function<void(symbol_table &table, void *symref, u64 value)> setter_func; + typedef std::function<u64(symbol_table &table)> getter_func; + typedef std::function<void(symbol_table &table, u64 value)> setter_func; // callback functions for function execution - typedef std::function<u64(symbol_table &table, void *symref, int numparams, const u64 *paramlist)> execute_func; + typedef std::function<u64(symbol_table &table, int numparams, const u64 *paramlist)> execute_func; // callback functions for memory reads/writes typedef std::function<expression_error::error_code(void *cbparam, const char *name, expression_space space)> valid_func; @@ -181,8 +180,8 @@ public: // symbol access void add(const char *name, read_write rw, u64 *ptr = nullptr); void add(const char *name, u64 constvalue); - void add(const char *name, void *ref, getter_func getter, setter_func setter = nullptr, const std::string &format_string = ""); - void add(const char *name, void *ref, int minparams, int maxparams, execute_func execute); + void add(const char *name, getter_func getter, setter_func setter = nullptr, const std::string &format_string = ""); + void add(const char *name, int minparams, int maxparams, execute_func execute); symbol_entry *find(const char *name) const { if (name) { auto search = m_symlist.find(name); if (search != m_symlist.end()) return search->second.get(); else return nullptr; } else return nullptr; } symbol_entry *find_deep(const char *name); diff --git a/src/emu/dimemory.cpp b/src/emu/dimemory.cpp index 43f05f6019c..9a78f88d6c4 100644 --- a/src/emu/dimemory.cpp +++ b/src/emu/dimemory.cpp @@ -30,9 +30,9 @@ address_space_config::address_space_config() : m_name("unknown"), m_endianness(ENDIANNESS_NATIVE), - m_databus_width(0), - m_addrbus_width(0), - m_addrbus_shift(0), + m_data_width(0), + m_addr_width(0), + m_addr_shift(0), m_logaddr_width(0), m_page_shift(0), m_is_octal(false), @@ -53,9 +53,9 @@ address_space_config::address_space_config() address_space_config::address_space_config(const char *name, endianness_t endian, u8 datawidth, u8 addrwidth, s8 addrshift, address_map_constructor internal, address_map_constructor defmap) : m_name(name), m_endianness(endian), - m_databus_width(datawidth), - m_addrbus_width(addrwidth), - m_addrbus_shift(addrshift), + m_data_width(datawidth), + m_addr_width(addrwidth), + m_addr_shift(addrshift), m_logaddr_width(addrwidth), m_page_shift(0), m_is_octal(false), @@ -67,9 +67,9 @@ address_space_config::address_space_config(const char *name, endianness_t endian address_space_config::address_space_config(const char *name, endianness_t endian, u8 datawidth, u8 addrwidth, s8 addrshift, u8 logwidth, u8 pageshift, address_map_constructor internal, address_map_constructor defmap) : m_name(name), m_endianness(endian), - m_databus_width(datawidth), - m_addrbus_width(addrwidth), - m_addrbus_shift(addrshift), + m_data_width(datawidth), + m_addr_width(addrwidth), + m_addr_shift(addrshift), m_logaddr_width(logwidth), m_page_shift(pageshift), m_is_octal(false), @@ -81,9 +81,9 @@ address_space_config::address_space_config(const char *name, endianness_t endian address_space_config::address_space_config(const char *name, endianness_t endian, u8 datawidth, u8 addrwidth, s8 addrshift, address_map_delegate internal, address_map_delegate defmap) : m_name(name), m_endianness(endian), - m_databus_width(datawidth), - m_addrbus_width(addrwidth), - m_addrbus_shift(addrshift), + m_data_width(datawidth), + m_addr_width(addrwidth), + m_addr_shift(addrshift), m_logaddr_width(addrwidth), m_page_shift(0), m_is_octal(false), @@ -97,9 +97,9 @@ address_space_config::address_space_config(const char *name, endianness_t endian address_space_config::address_space_config(const char *name, endianness_t endian, u8 datawidth, u8 addrwidth, s8 addrshift, u8 logwidth, u8 pageshift, address_map_delegate internal, address_map_delegate defmap) : m_name(name), m_endianness(endian), - m_databus_width(datawidth), - m_addrbus_width(addrwidth), - m_addrbus_shift(addrshift), + m_data_width(datawidth), + m_addr_width(addrwidth), + m_addr_shift(addrshift), m_logaddr_width(logwidth), m_page_shift(pageshift), m_is_octal(false), diff --git a/src/emu/emucore.h b/src/emu/emucore.h index 04b67869546..1782ac8726d 100644 --- a/src/emu/emucore.h +++ b/src/emu/emucore.h @@ -433,12 +433,10 @@ inline u64 d2u(double d) // constexpr absolute value of an integer -inline constexpr int iabs(int v) +template <typename T> +constexpr std::enable_if_t<std::is_signed<T>::value, T> iabs(T v) { - if(v < 0) - return -v; - else - return v; + return (v < T(0)) ? -v : v; } #endif /* MAME_EMU_EMUCORE_H */ diff --git a/src/emu/emumem.cpp b/src/emu/emumem.cpp index 41c26352dc7..2b63aa4952b 100644 --- a/src/emu/emumem.cpp +++ b/src/emu/emumem.cpp @@ -414,8 +414,8 @@ private: u64 read_stub_64(address_space &space, offs_t offset, u64 mask); // stubs for reading I/O ports - template<typename _UintType> - _UintType read_stub_ioport(address_space &space, offs_t offset, _UintType mask) { return m_ioport->read(); } + template<typename UintType> + UintType read_stub_ioport(address_space &space, offs_t offset, UintType mask) { return m_ioport->read(); } // internal helper virtual void remove_subunit(int entry) override; @@ -477,8 +477,8 @@ private: void write_stub_64(address_space &space, offs_t offset, u64 data, u64 mask); // stubs for writing I/O ports - template<typename _UintType> - void write_stub_ioport(address_space &space, offs_t offset, _UintType data, _UintType mask) { m_ioport->write(data, mask); } + template<typename UintType> + void write_stub_ioport(address_space &space, offs_t offset, UintType data, UintType mask) { m_ioport->write(data, mask); } // internal helper virtual void remove_subunit(int entry) override; @@ -521,15 +521,15 @@ private: // A proxy class that contains an handler_entry_read or _write and forwards the setter calls -template<typename _HandlerEntry> +template<typename HandlerEntry> class handler_entry_proxy { public: - handler_entry_proxy(std::list<_HandlerEntry *> _handlers, u64 _mask) : handlers(std::move(_handlers)), mask(_mask) {} - handler_entry_proxy(const handler_entry_proxy<_HandlerEntry> &hep) : handlers(hep.handlers), mask(hep.mask) {} + handler_entry_proxy(std::list<HandlerEntry *> _handlers, u64 _mask) : handlers(std::move(_handlers)), mask(_mask) {} + handler_entry_proxy(const handler_entry_proxy<HandlerEntry> &hep) : handlers(hep.handlers), mask(hep.mask) {} // forward delegate callbacks configuration - template<typename _delegate> void set_delegate(_delegate delegate) const { + template<typename Delegate> void set_delegate(Delegate delegate) const { for (const auto & elem : handlers) (elem)->set_delegate(delegate, mask); } @@ -541,7 +541,7 @@ public: } private: - std::list<_HandlerEntry *> handlers; + std::list<HandlerEntry *> handlers; u64 mask; }; @@ -714,8 +714,8 @@ public: private: // internal unmapped handler - template<typename _UintType> - _UintType unmap_r(address_space &space, offs_t offset, _UintType mask) + template<typename UintType> + UintType unmap_r(address_space &space, offs_t offset, UintType mask) { if (m_space.log_unmap() && !m_space.machine().side_effect_disabled()) { @@ -724,32 +724,32 @@ private: ? "%s: unmapped %s memory read from %0*o & %0*o\n" : "%s: unmapped %s memory read from %0*X & %0*X\n", m_space.machine().describe_context(), m_space.name(), - m_space.addrchars(), m_space.byte_to_address(offset * sizeof(_UintType)), - 2 * sizeof(_UintType), mask); + m_space.addrchars(), m_space.byte_to_address(offset * sizeof(UintType)), + 2 * sizeof(UintType), mask); } return m_space.unmap(); } // internal no-op handler - template<typename _UintType> - _UintType nop_r(address_space &space, offs_t offset, _UintType mask) + template<typename UintType> + UintType nop_r(address_space &space, offs_t offset, UintType mask) { return m_space.unmap(); } // internal watchpoint handler - template<typename _UintType> - _UintType watchpoint_r(address_space &space, offs_t offset, _UintType mask) + template<typename UintType> + UintType watchpoint_r(address_space &space, offs_t offset, UintType mask) { - m_space.device().debug()->memory_read_hook(m_space, offset * sizeof(_UintType), mask); + m_space.device().debug()->memory_read_hook(m_space, offset * sizeof(UintType), mask); u16 *oldtable = m_live_lookup; m_live_lookup = &m_table[0]; - _UintType result; - if (sizeof(_UintType) == 1) result = m_space.read_byte(offset); - if (sizeof(_UintType) == 2) result = m_space.read_word(offset << 1, mask); - if (sizeof(_UintType) == 4) result = m_space.read_dword(offset << 2, mask); - if (sizeof(_UintType) == 8) result = m_space.read_qword(offset << 3, mask); + UintType result; + if (sizeof(UintType) == 1) result = m_space.read_byte(offset); + if (sizeof(UintType) == 2) result = m_space.read_word(offset << 1, mask); + if (sizeof(UintType) == 4) result = m_space.read_dword(offset << 2, mask); + if (sizeof(UintType) == 8) result = m_space.read_qword(offset << 3, mask); m_live_lookup = oldtable; return result; } @@ -785,8 +785,8 @@ public: private: // internal handlers - template<typename _UintType> - void unmap_w(address_space &space, offs_t offset, _UintType data, _UintType mask) + template<typename UintType> + void unmap_w(address_space &space, offs_t offset, UintType data, UintType mask) { if (m_space.log_unmap() && !m_space.machine().side_effect_disabled()) { @@ -795,28 +795,28 @@ private: ? "%s: unmapped %s memory write to %0*o = %0*o & %0*o\n" : "%s: unmapped %s memory write to %0*X = %0*X & %0*X\n", m_space.machine().describe_context(), m_space.name(), - m_space.addrchars(), m_space.byte_to_address(offset * sizeof(_UintType)), - 2 * sizeof(_UintType), data, - 2 * sizeof(_UintType), mask); + m_space.addrchars(), m_space.byte_to_address(offset * sizeof(UintType)), + 2 * sizeof(UintType), data, + 2 * sizeof(UintType), mask); } } - template<typename _UintType> - void nop_w(address_space &space, offs_t offset, _UintType data, _UintType mask) + template<typename UintType> + void nop_w(address_space &space, offs_t offset, UintType data, UintType mask) { } - template<typename _UintType> - void watchpoint_w(address_space &space, offs_t offset, _UintType data, _UintType mask) + template<typename UintType> + void watchpoint_w(address_space &space, offs_t offset, UintType data, UintType mask) { - m_space.device().debug()->memory_write_hook(m_space, offset * sizeof(_UintType), data, mask); + m_space.device().debug()->memory_write_hook(m_space, offset * sizeof(UintType), data, mask); u16 *oldtable = m_live_lookup; m_live_lookup = &m_table[0]; - if (sizeof(_UintType) == 1) m_space.write_byte(offset, data); - if (sizeof(_UintType) == 2) m_space.write_word(offset << 1, data, mask); - if (sizeof(_UintType) == 4) m_space.write_dword(offset << 2, data, mask); - if (sizeof(_UintType) == 8) m_space.write_qword(offset << 3, data, mask); + if (sizeof(UintType) == 1) m_space.write_byte(offset, data); + if (sizeof(UintType) == 2) m_space.write_word(offset << 1, data, mask); + if (sizeof(UintType) == 4) m_space.write_dword(offset << 2, data, mask); + if (sizeof(UintType) == 8) m_space.write_qword(offset << 3, data, mask); m_live_lookup = oldtable; } @@ -878,31 +878,31 @@ private: // ======================> address_space_specific // this is a derived class of address_space with specific width, endianness, and table size -template<typename _NativeType, endianness_t _Endian, int _Shift, bool _Large> +template<typename NativeType, endianness_t Endian, int AddrShift, bool Large> class address_space_specific : public address_space { - typedef address_space_specific<_NativeType, _Endian, _Shift, _Large> this_type; + typedef address_space_specific<NativeType, Endian, AddrShift, Large> this_type; // constants describing the native size - static const u32 NATIVE_BYTES = sizeof(_NativeType); - static const u32 NATIVE_STEP = _Shift >= 0 ? NATIVE_BYTES << iabs(_Shift) : NATIVE_BYTES >> iabs(_Shift); - static const u32 NATIVE_MASK = NATIVE_STEP - 1; - static const u32 NATIVE_BITS = 8 * NATIVE_BYTES; + static constexpr u32 NATIVE_BYTES = sizeof(NativeType); + static constexpr u32 NATIVE_STEP = AddrShift >= 0 ? NATIVE_BYTES << iabs(AddrShift) : NATIVE_BYTES >> iabs(AddrShift); + static constexpr u32 NATIVE_MASK = NATIVE_STEP - 1; + static constexpr u32 NATIVE_BITS = 8 * NATIVE_BYTES; // helpers to simplify core code - u32 read_lookup(offs_t address) const { return _Large ? m_read.lookup_live_large(address) : m_read.lookup_live_small(address); } - u32 write_lookup(offs_t address) const { return _Large ? m_write.lookup_live_large(address) : m_write.lookup_live_small(address); } - u32 setoffset_lookup(offs_t address) const { return _Large ? m_setoffset.lookup_live_large(address) : m_setoffset.lookup_live_small(address); } + u32 read_lookup(offs_t address) const { return Large ? m_read.lookup_live_large(address) : m_read.lookup_live_small(address); } + u32 write_lookup(offs_t address) const { return Large ? m_write.lookup_live_large(address) : m_write.lookup_live_small(address); } + u32 setoffset_lookup(offs_t address) const { return Large ? m_setoffset.lookup_live_large(address) : m_setoffset.lookup_live_small(address); } - static inline offs_t offset_to_byte(offs_t offset) { return _Shift < 0 ? offset << iabs(_Shift) : offset >> iabs(_Shift); } + static constexpr offs_t offset_to_byte(offs_t offset) { return AddrShift < 0 ? offset << iabs(AddrShift) : offset >> iabs(AddrShift); } public: // construction/destruction address_space_specific(memory_manager &manager, device_memory_interface &memory, int spacenum) - : address_space(manager, memory, spacenum, _Large), - m_read(*this, _Large), - m_write(*this, _Large), - m_setoffset(*this, _Large) + : address_space(manager, memory, spacenum, Large), + m_read(*this, Large), + m_write(*this, Large), + m_setoffset(*this, Large) { #if (TEST_HANDLER) // test code to verify the read/write handlers are touching the correct bits @@ -911,25 +911,25 @@ public: // install some dummy RAM for the first 16 bytes with well-known values u8 buffer[16]; for (int index = 0; index < 16; index++) - buffer[index ^ ((_Endian == ENDIANNESS_NATIVE) ? 0 : (data_width()/8 - 1))] = index * 0x11; + buffer[index ^ ((Endian == ENDIANNESS_NATIVE) ? 0 : (data_width()/8 - 1))] = index * 0x11; install_ram_generic(0x00, 0x0f, 0x0f, 0, read_or_write::READWRITE, buffer); - printf("\n\naddress_space(%d, %s, %s)\n", NATIVE_BITS, (_Endian == ENDIANNESS_LITTLE) ? "little" : "big", _Large ? "large" : "small"); + printf("\n\naddress_space(%d, %s, %s)\n", NATIVE_BITS, (Endian == ENDIANNESS_LITTLE) ? "little" : "big", Large ? "large" : "small"); // walk through the first 8 addresses for (int address = 0; address < 8; address++) { // determine expected values - u64 expected64 = (u64((address + ((_Endian == ENDIANNESS_LITTLE) ? 7 : 0)) * 0x11) << 56) | - (u64((address + ((_Endian == ENDIANNESS_LITTLE) ? 6 : 1)) * 0x11) << 48) | - (u64((address + ((_Endian == ENDIANNESS_LITTLE) ? 5 : 2)) * 0x11) << 40) | - (u64((address + ((_Endian == ENDIANNESS_LITTLE) ? 4 : 3)) * 0x11) << 32) | - (u64((address + ((_Endian == ENDIANNESS_LITTLE) ? 3 : 4)) * 0x11) << 24) | - (u64((address + ((_Endian == ENDIANNESS_LITTLE) ? 2 : 5)) * 0x11) << 16) | - (u64((address + ((_Endian == ENDIANNESS_LITTLE) ? 1 : 6)) * 0x11) << 8) | - (u64((address + ((_Endian == ENDIANNESS_LITTLE) ? 0 : 7)) * 0x11) << 0); - u32 expected32 = (_Endian == ENDIANNESS_LITTLE) ? expected64 : (expected64 >> 32); - u16 expected16 = (_Endian == ENDIANNESS_LITTLE) ? expected32 : (expected32 >> 16); - u8 expected8 = (_Endian == ENDIANNESS_LITTLE) ? expected16 : (expected16 >> 8); + u64 expected64 = (u64((address + ((Endian == ENDIANNESS_LITTLE) ? 7 : 0)) * 0x11) << 56) | + (u64((address + ((Endian == ENDIANNESS_LITTLE) ? 6 : 1)) * 0x11) << 48) | + (u64((address + ((Endian == ENDIANNESS_LITTLE) ? 5 : 2)) * 0x11) << 40) | + (u64((address + ((Endian == ENDIANNESS_LITTLE) ? 4 : 3)) * 0x11) << 32) | + (u64((address + ((Endian == ENDIANNESS_LITTLE) ? 3 : 4)) * 0x11) << 24) | + (u64((address + ((Endian == ENDIANNESS_LITTLE) ? 2 : 5)) * 0x11) << 16) | + (u64((address + ((Endian == ENDIANNESS_LITTLE) ? 1 : 6)) * 0x11) << 8) | + (u64((address + ((Endian == ENDIANNESS_LITTLE) ? 0 : 7)) * 0x11) << 0); + u32 expected32 = (Endian == ENDIANNESS_LITTLE) ? expected64 : (expected64 >> 32); + u16 expected16 = (Endian == ENDIANNESS_LITTLE) ? expected32 : (expected32 >> 16); + u8 expected8 = (Endian == ENDIANNESS_LITTLE) ? expected16 : (expected16 >> 8); u64 result64; u32 result32; @@ -1098,11 +1098,11 @@ public: } // native read - _NativeType read_native(offs_t offset, _NativeType mask) + NativeType read_native(offs_t offset, NativeType mask) { g_profiler.start(PROFILER_MEMREAD); - if (TEST_HANDLER) printf("[r%X,%s]", offset, core_i64_hex_format(mask, sizeof(_NativeType) * 2)); + if (TEST_HANDLER) printf("[r%X,%s]", offset, core_i64_hex_format(mask, sizeof(NativeType) * 2)); // look up the handler offs_t address = offset & m_addrmask; @@ -1111,19 +1111,19 @@ public: // either read directly from RAM, or call the delegate offset = offset_to_byte(handler.offset(address)); - _NativeType result; - if (entry <= STATIC_BANKMAX) result = *reinterpret_cast<_NativeType *>(handler.ramptr(offset)); - else if (sizeof(_NativeType) == 1) result = handler.read8(*this, offset, mask); - else if (sizeof(_NativeType) == 2) result = handler.read16(*this, offset >> 1, mask); - else if (sizeof(_NativeType) == 4) result = handler.read32(*this, offset >> 2, mask); - else if (sizeof(_NativeType) == 8) result = handler.read64(*this, offset >> 3, mask); + NativeType result; + if (entry <= STATIC_BANKMAX) result = *reinterpret_cast<NativeType *>(handler.ramptr(offset)); + else if (sizeof(NativeType) == 1) result = handler.read8(*this, offset, mask); + else if (sizeof(NativeType) == 2) result = handler.read16(*this, offset >> 1, mask); + else if (sizeof(NativeType) == 4) result = handler.read32(*this, offset >> 2, mask); + else if (sizeof(NativeType) == 8) result = handler.read64(*this, offset >> 3, mask); g_profiler.stop(); return result; } // mask-less native read - _NativeType read_native(offs_t offset) + NativeType read_native(offs_t offset) { g_profiler.start(PROFILER_MEMREAD); @@ -1136,19 +1136,19 @@ public: // either read directly from RAM, or call the delegate offset = offset_to_byte(handler.offset(address)); - _NativeType result; - if (entry <= STATIC_BANKMAX) result = *reinterpret_cast<_NativeType *>(handler.ramptr(offset)); - else if (sizeof(_NativeType) == 1) result = handler.read8(*this, offset, 0xff); - else if (sizeof(_NativeType) == 2) result = handler.read16(*this, offset >> 1, 0xffff); - else if (sizeof(_NativeType) == 4) result = handler.read32(*this, offset >> 2, 0xffffffff); - else if (sizeof(_NativeType) == 8) result = handler.read64(*this, offset >> 3, 0xffffffffffffffffU); + NativeType result; + if (entry <= STATIC_BANKMAX) result = *reinterpret_cast<NativeType *>(handler.ramptr(offset)); + else if (sizeof(NativeType) == 1) result = handler.read8(*this, offset, 0xff); + else if (sizeof(NativeType) == 2) result = handler.read16(*this, offset >> 1, 0xffff); + else if (sizeof(NativeType) == 4) result = handler.read32(*this, offset >> 2, 0xffffffff); + else if (sizeof(NativeType) == 8) result = handler.read64(*this, offset >> 3, 0xffffffffffffffffU); g_profiler.stop(); return result; } // native write - void write_native(offs_t offset, _NativeType data, _NativeType mask) + void write_native(offs_t offset, NativeType data, NativeType mask) { g_profiler.start(PROFILER_MEMWRITE); @@ -1161,19 +1161,19 @@ public: offset = offset_to_byte(handler.offset(address)); if (entry <= STATIC_BANKMAX) { - _NativeType *dest = reinterpret_cast<_NativeType *>(handler.ramptr(offset)); + NativeType *dest = reinterpret_cast<NativeType *>(handler.ramptr(offset)); *dest = (*dest & ~mask) | (data & mask); } - else if (sizeof(_NativeType) == 1) handler.write8(*this, offset, data, mask); - else if (sizeof(_NativeType) == 2) handler.write16(*this, offset >> 1, data, mask); - else if (sizeof(_NativeType) == 4) handler.write32(*this, offset >> 2, data, mask); - else if (sizeof(_NativeType) == 8) handler.write64(*this, offset >> 3, data, mask); + else if (sizeof(NativeType) == 1) handler.write8(*this, offset, data, mask); + else if (sizeof(NativeType) == 2) handler.write16(*this, offset >> 1, data, mask); + else if (sizeof(NativeType) == 4) handler.write32(*this, offset >> 2, data, mask); + else if (sizeof(NativeType) == 8) handler.write64(*this, offset >> 3, data, mask); g_profiler.stop(); } // mask-less native write - void write_native(offs_t offset, _NativeType data) + void write_native(offs_t offset, NativeType data) { g_profiler.start(PROFILER_MEMWRITE); @@ -1184,34 +1184,34 @@ public: // either write directly to RAM, or call the delegate offset = offset_to_byte(handler.offset(address)); - if (entry <= STATIC_BANKMAX) *reinterpret_cast<_NativeType *>(handler.ramptr(offset)) = data; - else if (sizeof(_NativeType) == 1) handler.write8(*this, offset, data, 0xff); - else if (sizeof(_NativeType) == 2) handler.write16(*this, offset >> 1, data, 0xffff); - else if (sizeof(_NativeType) == 4) handler.write32(*this, offset >> 2, data, 0xffffffff); - else if (sizeof(_NativeType) == 8) handler.write64(*this, offset >> 3, data, 0xffffffffffffffffU); + if (entry <= STATIC_BANKMAX) *reinterpret_cast<NativeType *>(handler.ramptr(offset)) = data; + else if (sizeof(NativeType) == 1) handler.write8(*this, offset, data, 0xff); + else if (sizeof(NativeType) == 2) handler.write16(*this, offset >> 1, data, 0xffff); + else if (sizeof(NativeType) == 4) handler.write32(*this, offset >> 2, data, 0xffffffff); + else if (sizeof(NativeType) == 8) handler.write64(*this, offset >> 3, data, 0xffffffffffffffffU); g_profiler.stop(); } // generic direct read - template<typename _TargetType, bool _Aligned> - _TargetType read_direct(offs_t address, _TargetType mask) + template<typename TargetType, bool Aligned> + TargetType read_direct(offs_t address, TargetType mask) { - const u32 TARGET_BYTES = sizeof(_TargetType); + const u32 TARGET_BYTES = sizeof(TargetType); const u32 TARGET_BITS = 8 * TARGET_BYTES; // equal to native size and aligned; simple pass-through to the native reader - if (NATIVE_BYTES == TARGET_BYTES && (_Aligned || (address & NATIVE_MASK) == 0)) + if (NATIVE_BYTES == TARGET_BYTES && (Aligned || (address & NATIVE_MASK) == 0)) return read_native(address & ~NATIVE_MASK, mask); // if native size is larger, see if we can do a single masked read (guaranteed if we're aligned) if (NATIVE_BYTES > TARGET_BYTES) { - u32 offsbits = 8 * (offset_to_byte(address) & (NATIVE_BYTES - (_Aligned ? TARGET_BYTES : 1))); - if (_Aligned || (offsbits + TARGET_BITS <= NATIVE_BITS)) + u32 offsbits = 8 * (offset_to_byte(address) & (NATIVE_BYTES - (Aligned ? TARGET_BYTES : 1))); + if (Aligned || (offsbits + TARGET_BITS <= NATIVE_BITS)) { - if (_Endian != ENDIANNESS_LITTLE) offsbits = NATIVE_BITS - TARGET_BITS - offsbits; - return read_native(address & ~NATIVE_MASK, (_NativeType)mask << offsbits) >> offsbits; + if (Endian != ENDIANNESS_LITTLE) offsbits = NATIVE_BITS - TARGET_BITS - offsbits; + return read_native(address & ~NATIVE_MASK, (NativeType)mask << offsbits) >> offsbits; } } @@ -1223,11 +1223,11 @@ public: if (NATIVE_BYTES >= TARGET_BYTES) { // little-endian case - if (_Endian == ENDIANNESS_LITTLE) + if (Endian == ENDIANNESS_LITTLE) { // read lower bits from lower address - _TargetType result = 0; - _NativeType curmask = (_NativeType)mask << offsbits; + TargetType result = 0; + NativeType curmask = (NativeType)mask << offsbits; if (curmask != 0) result = read_native(address, curmask) >> offsbits; // read upper bits from upper address @@ -1242,9 +1242,9 @@ public: { // left-justify the mask to the target type const u32 LEFT_JUSTIFY_TARGET_TO_NATIVE_SHIFT = ((NATIVE_BITS >= TARGET_BITS) ? (NATIVE_BITS - TARGET_BITS) : 0); - _NativeType result = 0; - _NativeType ljmask = (_NativeType)mask << LEFT_JUSTIFY_TARGET_TO_NATIVE_SHIFT; - _NativeType curmask = ljmask >> offsbits; + NativeType result = 0; + NativeType ljmask = (NativeType)mask << LEFT_JUSTIFY_TARGET_TO_NATIVE_SHIFT; + NativeType curmask = ljmask >> offsbits; // read upper bits from lower address if (curmask != 0) result = read_native(address, curmask) << offsbits; @@ -1265,13 +1265,13 @@ public: // compute the maximum number of loops; we do it this way so that there are // a fixed number of loops for the compiler to unroll if it desires const u32 MAX_SPLITS_MINUS_ONE = TARGET_BYTES / NATIVE_BYTES - 1; - _TargetType result = 0; + TargetType result = 0; // little-endian case - if (_Endian == ENDIANNESS_LITTLE) + if (Endian == ENDIANNESS_LITTLE) { // read lowest bits from first address - _NativeType curmask = mask << offsbits; + NativeType curmask = mask << offsbits; if (curmask != 0) result = read_native(address, curmask) >> offsbits; // read middle bits from subsequent addresses @@ -1280,15 +1280,15 @@ public: { address += NATIVE_STEP; curmask = mask >> offsbits; - if (curmask != 0) result |= (_TargetType)read_native(address, curmask) << offsbits; + if (curmask != 0) result |= (TargetType)read_native(address, curmask) << offsbits; offsbits += NATIVE_BITS; } // if we're not aligned and we still have bits left, read uppermost bits from last address - if (!_Aligned && offsbits < TARGET_BITS) + if (!Aligned && offsbits < TARGET_BITS) { curmask = mask >> offsbits; - if (curmask != 0) result |= (_TargetType)read_native(address + NATIVE_STEP, curmask) << offsbits; + if (curmask != 0) result |= (TargetType)read_native(address + NATIVE_STEP, curmask) << offsbits; } } @@ -1297,8 +1297,8 @@ public: { // read highest bits from first address offsbits = TARGET_BITS - (NATIVE_BITS - offsbits); - _NativeType curmask = mask >> offsbits; - if (curmask != 0) result = (_TargetType)read_native(address, curmask) << offsbits; + NativeType curmask = mask >> offsbits; + if (curmask != 0) result = (TargetType)read_native(address, curmask) << offsbits; // read middle bits from subsequent addresses for (u32 index = 0; index < MAX_SPLITS_MINUS_ONE; index++) @@ -1306,11 +1306,11 @@ public: offsbits -= NATIVE_BITS; address += NATIVE_STEP; curmask = mask >> offsbits; - if (curmask != 0) result |= (_TargetType)read_native(address, curmask) << offsbits; + if (curmask != 0) result |= (TargetType)read_native(address, curmask) << offsbits; } // if we're not aligned and we still have bits left, read lowermost bits from the last address - if (!_Aligned && offsbits != 0) + if (!Aligned && offsbits != 0) { offsbits = NATIVE_BITS - offsbits; curmask = mask << offsbits; @@ -1322,24 +1322,24 @@ public: } // generic direct write - template<typename _TargetType, bool _Aligned> - void write_direct(offs_t address, _TargetType data, _TargetType mask) + template<typename TargetType, bool Aligned> + void write_direct(offs_t address, TargetType data, TargetType mask) { - const u32 TARGET_BYTES = sizeof(_TargetType); + const u32 TARGET_BYTES = sizeof(TargetType); const u32 TARGET_BITS = 8 * TARGET_BYTES; // equal to native size and aligned; simple pass-through to the native writer - if (NATIVE_BYTES == TARGET_BYTES && (_Aligned || (address & NATIVE_MASK) == 0)) + if (NATIVE_BYTES == TARGET_BYTES && (Aligned || (address & NATIVE_MASK) == 0)) return write_native(address & ~NATIVE_MASK, data, mask); // if native size is larger, see if we can do a single masked write (guaranteed if we're aligned) if (NATIVE_BYTES > TARGET_BYTES) { - u32 offsbits = 8 * (offset_to_byte(address) & (NATIVE_BYTES - (_Aligned ? TARGET_BYTES : 1))); - if (_Aligned || (offsbits + TARGET_BITS <= NATIVE_BITS)) + u32 offsbits = 8 * (offset_to_byte(address) & (NATIVE_BYTES - (Aligned ? TARGET_BYTES : 1))); + if (Aligned || (offsbits + TARGET_BITS <= NATIVE_BITS)) { - if (_Endian != ENDIANNESS_LITTLE) offsbits = NATIVE_BITS - TARGET_BITS - offsbits; - return write_native(address & ~NATIVE_MASK, (_NativeType)data << offsbits, (_NativeType)mask << offsbits); + if (Endian != ENDIANNESS_LITTLE) offsbits = NATIVE_BITS - TARGET_BITS - offsbits; + return write_native(address & ~NATIVE_MASK, (NativeType)data << offsbits, (NativeType)mask << offsbits); } } @@ -1351,11 +1351,11 @@ public: if (NATIVE_BYTES >= TARGET_BYTES) { // little-endian case - if (_Endian == ENDIANNESS_LITTLE) + if (Endian == ENDIANNESS_LITTLE) { // write lower bits to lower address - _NativeType curmask = (_NativeType)mask << offsbits; - if (curmask != 0) write_native(address, (_NativeType)data << offsbits, curmask); + NativeType curmask = (NativeType)mask << offsbits; + if (curmask != 0) write_native(address, (NativeType)data << offsbits, curmask); // write upper bits to upper address offsbits = NATIVE_BITS - offsbits; @@ -1368,11 +1368,11 @@ public: { // left-justify the mask and data to the target type const u32 LEFT_JUSTIFY_TARGET_TO_NATIVE_SHIFT = ((NATIVE_BITS >= TARGET_BITS) ? (NATIVE_BITS - TARGET_BITS) : 0); - _NativeType ljdata = (_NativeType)data << LEFT_JUSTIFY_TARGET_TO_NATIVE_SHIFT; - _NativeType ljmask = (_NativeType)mask << LEFT_JUSTIFY_TARGET_TO_NATIVE_SHIFT; + NativeType ljdata = (NativeType)data << LEFT_JUSTIFY_TARGET_TO_NATIVE_SHIFT; + NativeType ljmask = (NativeType)mask << LEFT_JUSTIFY_TARGET_TO_NATIVE_SHIFT; // write upper bits to lower address - _NativeType curmask = ljmask >> offsbits; + NativeType curmask = ljmask >> offsbits; if (curmask != 0) write_native(address, ljdata >> offsbits, curmask); // write lower bits to upper address @@ -1390,10 +1390,10 @@ public: const u32 MAX_SPLITS_MINUS_ONE = TARGET_BYTES / NATIVE_BYTES - 1; // little-endian case - if (_Endian == ENDIANNESS_LITTLE) + if (Endian == ENDIANNESS_LITTLE) { // write lowest bits to first address - _NativeType curmask = mask << offsbits; + NativeType curmask = mask << offsbits; if (curmask != 0) write_native(address, data << offsbits, curmask); // write middle bits to subsequent addresses @@ -1407,7 +1407,7 @@ public: } // if we're not aligned and we still have bits left, write uppermost bits to last address - if (!_Aligned && offsbits < TARGET_BITS) + if (!Aligned && offsbits < TARGET_BITS) { curmask = mask >> offsbits; if (curmask != 0) write_native(address + NATIVE_STEP, data >> offsbits, curmask); @@ -1419,7 +1419,7 @@ public: { // write highest bits to first address offsbits = TARGET_BITS - (NATIVE_BITS - offsbits); - _NativeType curmask = mask >> offsbits; + NativeType curmask = mask >> offsbits; if (curmask != 0) write_native(address, data >> offsbits, curmask); // write middle bits to subsequent addresses @@ -1432,7 +1432,7 @@ public: } // if we're not aligned and we still have bits left, write lowermost bits to the last address - if (!_Aligned && offsbits != 0) + if (!Aligned && offsbits != 0) { offsbits = NATIVE_BITS - offsbits; curmask = mask << offsbits; @@ -1452,7 +1452,7 @@ public: const handler_entry_setoffset &handler = m_setoffset.handler_setoffset(entry); offs_t offset = handler.offset(address); - handler.setoffset(*this, offset / sizeof(_NativeType)); + handler.setoffset(*this, offset / sizeof(NativeType)); } // virtual access to these functions @@ -1601,7 +1601,7 @@ void memory_manager::allocate(device_memory_interface &memory) if (spaceconfig) { // allocate one of the appropriate type - bool const large(spaceconfig->addr2byte_end(0xffffffffUL >> (32 - spaceconfig->m_addrbus_width)) >= (1 << 18)); + bool const large(spaceconfig->addr2byte_end(0xffffffffUL >> (32 - spaceconfig->m_addr_width)) >= (1 << 18)); switch (spaceconfig->data_width()) { @@ -1623,7 +1623,7 @@ void memory_manager::allocate(device_memory_interface &memory) break; case 16: - switch (spaceconfig->addrbus_shift()) + switch (spaceconfig->addr_shift()) { case 3: if (spaceconfig->endianness() == ENDIANNESS_LITTLE) @@ -1679,7 +1679,7 @@ void memory_manager::allocate(device_memory_interface &memory) break; case 32: - switch (spaceconfig->addrbus_shift()) + switch (spaceconfig->addr_shift()) { case 0: if (spaceconfig->endianness() == ENDIANNESS_LITTLE) @@ -1735,7 +1735,7 @@ void memory_manager::allocate(device_memory_interface &memory) break; case 64: - switch (spaceconfig->addrbus_shift()) + switch (spaceconfig->addr_shift()) { case 0: if (spaceconfig->endianness() == ENDIANNESS_LITTLE) @@ -1954,24 +1954,24 @@ void memory_manager::bank_reattach() address_space::address_space(memory_manager &manager, device_memory_interface &memory, int spacenum, bool large) : m_config(*memory.space_config(spacenum)), m_device(memory.device()), - m_addrmask(0xffffffffUL >> (32 - m_config.m_addrbus_width)), + m_addrmask(0xffffffffUL >> (32 - m_config.m_addr_width)), m_logaddrmask(0xffffffffUL >> (32 - m_config.m_logaddr_width)), m_unmap(0), m_spacenum(spacenum), m_log_unmap(true), m_name(memory.space_config(spacenum)->name()), - m_addrchars((m_config.m_addrbus_width + 3) / 4), + m_addrchars((m_config.m_addr_width + 3) / 4), m_logaddrchars((m_config.m_logaddr_width + 3) / 4), m_manager(manager), m_machine(memory.device().machine()) { - switch(m_config.addrbus_shift()) { + switch(m_config.addr_shift()) { case 3: m_direct = static_cast<void *>(new direct_read_data< 3>(*this)); break; case 0: m_direct = static_cast<void *>(new direct_read_data< 0>(*this)); break; case -1: m_direct = static_cast<void *>(new direct_read_data<-1>(*this)); break; case -2: m_direct = static_cast<void *>(new direct_read_data<-2>(*this)); break; case -3: m_direct = static_cast<void *>(new direct_read_data<-3>(*this)); break; - default: fatalerror("Unsupported address shift %d\n", m_config.addrbus_shift()); + default: fatalerror("Unsupported address shift %d\n", m_config.addr_shift()); } } @@ -1982,7 +1982,7 @@ address_space::address_space(memory_manager &manager, device_memory_interface &m address_space::~address_space() { - switch(m_config.addrbus_shift()) { + switch(m_config.addr_shift()) { case 3: delete static_cast<direct_read_data< 3> *>(m_direct); break; case 0: delete static_cast<direct_read_data< 0> *>(m_direct); break; case -1: delete static_cast<direct_read_data<-1> *>(m_direct); break; @@ -2014,7 +2014,7 @@ void address_space::check_optimize_all(const char *function, offs_t addrstart, o if (addrend & ~m_addrmask) fatalerror("%s: In range %x-%x mask %x mirror %x select %x, end address is outside of the global address mask %x, did you mean %x ?\n", function, addrstart, addrend, addrmask, addrmirror, addrselect, m_addrmask, addrend & m_addrmask); - offs_t lowbits_mask = (m_config.data_width() >> (3 - m_config.m_addrbus_shift)) - 1; + offs_t lowbits_mask = (m_config.data_width() >> (3 - m_config.m_addr_shift)) - 1; if (addrstart & lowbits_mask) fatalerror("%s: In range %x-%x mask %x mirror %x select %x, start address has low bits set, did you mean %x ?\n", function, addrstart, addrend, addrmask, addrmirror, addrselect, addrstart & ~lowbits_mask); if ((~addrend) & lowbits_mask) @@ -2075,7 +2075,7 @@ void address_space::check_optimize_mirror(const char *function, offs_t addrstart if (addrend & ~m_addrmask) fatalerror("%s: In range %x-%x mirror %x, end address is outside of the global address mask %x, did you mean %x ?\n", function, addrstart, addrend, addrmirror, m_addrmask, addrend & m_addrmask); - offs_t lowbits_mask = (m_config.data_width() >> (3 - m_config.m_addrbus_shift)) - 1; + offs_t lowbits_mask = (m_config.data_width() >> (3 - m_config.m_addr_shift)) - 1; if (addrstart & lowbits_mask) fatalerror("%s: In range %x-%x mirror %x, start address has low bits set, did you mean %x ?\n", function, addrstart, addrend, addrmirror, addrstart & ~lowbits_mask); if ((~addrend) & lowbits_mask) @@ -2125,7 +2125,7 @@ void address_space::check_address(const char *function, offs_t addrstart, offs_t if (addrend & ~m_addrmask) fatalerror("%s: In range %x-%x, end address is outside of the global address mask %x, did you mean %x ?\n", function, addrstart, addrend, m_addrmask, addrend & m_addrmask); - offs_t lowbits_mask = (m_config.data_width() >> (3 - m_config.m_addrbus_shift)) - 1; + offs_t lowbits_mask = (m_config.data_width() >> (3 - m_config.m_addr_shift)) - 1; if (addrstart & lowbits_mask) fatalerror("%s: In range %x-%x, start address has low bits set, did you mean %x ?\n", function, addrstart, addrend, addrstart & ~lowbits_mask); if ((~addrend) & lowbits_mask) @@ -2509,8 +2509,8 @@ void address_space::dump_map(FILE *file, read_or_write readorwrite) const address_table &table = (readorwrite == read_or_write::READ) ? static_cast<address_table &>(read()) : static_cast<address_table &>(write()); // dump generic information - fprintf(file, " Address bits = %d\n", m_config.m_addrbus_width); - fprintf(file, " Data bits = %d\n", m_config.m_databus_width); + fprintf(file, " Address bits = %d\n", m_config.m_addr_width); + fprintf(file, " Data bits = %d\n", m_config.m_data_width); fprintf(file, " Address mask = %X\n", m_addrmask); fprintf(file, "\n"); @@ -3048,7 +3048,7 @@ memory_bank *address_space::bank_find_anonymous(offs_t addrstart, offs_t addrend void address_space::invalidate_read_caches() { - switch(m_config.addrbus_shift()) { + switch(m_config.addr_shift()) { case 3: static_cast<direct_read_data< 3> *>(m_direct)->force_update(); break; case 0: static_cast<direct_read_data< 0> *>(m_direct)->force_update(); break; case -1: static_cast<direct_read_data<-1> *>(m_direct)->force_update(); break; @@ -3059,7 +3059,7 @@ void address_space::invalidate_read_caches() void address_space::invalidate_read_caches(u16 entry) { - switch(m_config.addrbus_shift()) { + switch(m_config.addr_shift()) { case 3: static_cast<direct_read_data< 3> *>(m_direct)->force_update(entry); break; case 0: static_cast<direct_read_data< 0> *>(m_direct)->force_update(entry); break; case -1: static_cast<direct_read_data<-1> *>(m_direct)->force_update(entry); break; @@ -3070,7 +3070,7 @@ void address_space::invalidate_read_caches(u16 entry) void address_space::invalidate_read_caches(offs_t start, offs_t end) { - switch(m_config.addrbus_shift()) { + switch(m_config.addr_shift()) { case 3: static_cast<direct_read_data< 3> *>(m_direct)->remove_intersecting_ranges(start, end); break; case 0: static_cast<direct_read_data< 0> *>(m_direct)->remove_intersecting_ranges(start, end); break; case -1: static_cast<direct_read_data<-1> *>(m_direct)->remove_intersecting_ranges(start, end); break; @@ -4049,7 +4049,7 @@ handler_entry &address_table_write::handler(u32 index) const // direct_read_data - constructor //------------------------------------------------- -template<int addr_shift> direct_read_data<addr_shift>::direct_read_data(address_space &space) +template<int AddrShift> direct_read_data<AddrShift>::direct_read_data(address_space &space) : m_space(space), m_ptr(nullptr), m_addrmask(space.addrmask()), @@ -4064,7 +4064,7 @@ template<int addr_shift> direct_read_data<addr_shift>::direct_read_data(address_ // ~direct_read_data - destructor //------------------------------------------------- -template<int addr_shift> direct_read_data<addr_shift>::~direct_read_data() +template<int AddrShift> direct_read_data<AddrShift>::~direct_read_data() { } @@ -4074,7 +4074,7 @@ template<int addr_shift> direct_read_data<addr_shift>::~direct_read_data() // update the opcode base for the given address //------------------------------------------------- -template<int addr_shift> bool direct_read_data<addr_shift>::set_direct_region(offs_t address) +template<int AddrShift> bool direct_read_data<AddrShift>::set_direct_region(offs_t address) { // find or allocate a matching range direct_range *range = find_range(address, m_entry); @@ -4095,10 +4095,10 @@ template<int addr_shift> bool direct_read_data<addr_shift>::set_direct_region(of const handler_entry_read &handler = m_space.read().handler_read(m_entry); m_addrmask = handler.addrmask(); u32 delta = handler.addrstart() & m_addrmask; - if(addr_shift < 0) - delta = delta << iabs(addr_shift); - else if(addr_shift > 0) - delta = delta >> iabs(addr_shift); + if(AddrShift < 0) + delta = delta << iabs(AddrShift); + else if(AddrShift > 0) + delta = delta >> iabs(AddrShift); m_ptr = base - delta; m_addrstart = maskedbits | range->m_addrstart; @@ -4111,7 +4111,7 @@ template<int addr_shift> bool direct_read_data<addr_shift>::set_direct_region(of // find_range - find a byte address in a range //------------------------------------------------- -template<int addr_shift> typename direct_read_data<addr_shift>::direct_range *direct_read_data<addr_shift>::find_range(offs_t address, u16 &entry) +template<int AddrShift> typename direct_read_data<AddrShift>::direct_range *direct_read_data<AddrShift>::find_range(offs_t address, u16 &entry) { // determine which entry address &= m_space.m_addrmask; @@ -4136,7 +4136,7 @@ template<int addr_shift> typename direct_read_data<addr_shift>::direct_range *di // ranges that intersect the given address range //------------------------------------------------- -template<int addr_shift> void direct_read_data<addr_shift>::remove_intersecting_ranges(offs_t addrstart, offs_t addrend) +template<int AddrShift> void direct_read_data<AddrShift>::remove_intersecting_ranges(offs_t addrstart, offs_t addrend) { // loop over all entries for (auto & elem : m_rangelist) diff --git a/src/emu/emumem.h b/src/emu/emumem.h index 45e1a759138..70f44385d58 100644 --- a/src/emu/emumem.h +++ b/src/emu/emumem.h @@ -114,12 +114,12 @@ typedef device_delegate<void (address_space &, offs_t)> setoffset_delegate; // ======================> direct_read_data // direct_read_data contains state data for direct read access -template<int addr_shift> class direct_read_data +template<int AddrShift> class direct_read_data { friend class address_table; public: - using direct_update_delegate = delegate<offs_t (direct_read_data<addr_shift> &, offs_t)>; + using direct_update_delegate = delegate<offs_t (direct_read_data<AddrShift> &, offs_t)>; // direct_range is an internal class that is part of a list of start/end ranges class direct_range @@ -162,6 +162,8 @@ public: void remove_intersecting_ranges(offs_t start, offs_t end); + static constexpr offs_t offset_to_byte(offs_t offset) { return AddrShift < 0 ? offset << iabs(AddrShift) : offset >> iabs(AddrShift); } + private: // internal helpers bool set_direct_region(offs_t address); @@ -194,27 +196,27 @@ public: // getters const char *name() const { return m_name; } endianness_t endianness() const { return m_endianness; } - int data_width() const { return m_databus_width; } - int addr_width() const { return m_addrbus_width; } - int addrbus_shift() const { return m_addrbus_shift; } + int data_width() const { return m_data_width; } + int addr_width() const { return m_addr_width; } + int addr_shift() const { return m_addr_shift; } // Actual alignment of the bus addresses - int alignment() const { int bytes = m_databus_width / 8; return m_addrbus_shift < 0 ? bytes >> -m_addrbus_shift : bytes << m_addrbus_shift; } + int alignment() const { int bytes = m_data_width / 8; return m_addr_shift < 0 ? bytes >> -m_addr_shift : bytes << m_addr_shift; } // Address delta to byte delta helpers - inline offs_t addr2byte(offs_t address) const { return (m_addrbus_shift < 0) ? (address << -m_addrbus_shift) : (address >> m_addrbus_shift); } - inline offs_t byte2addr(offs_t address) const { return (m_addrbus_shift > 0) ? (address << m_addrbus_shift) : (address >> -m_addrbus_shift); } + inline offs_t addr2byte(offs_t address) const { return (m_addr_shift < 0) ? (address << -m_addr_shift) : (address >> m_addr_shift); } + inline offs_t byte2addr(offs_t address) const { return (m_addr_shift > 0) ? (address << m_addr_shift) : (address >> -m_addr_shift); } // address-to-byte conversion helpers - inline offs_t addr2byte_end(offs_t address) const { return (m_addrbus_shift < 0) ? ((address << -m_addrbus_shift) | ((1 << -m_addrbus_shift) - 1)) : (address >> m_addrbus_shift); } - inline offs_t byte2addr_end(offs_t address) const { return (m_addrbus_shift > 0) ? ((address << m_addrbus_shift) | ((1 << m_addrbus_shift) - 1)) : (address >> -m_addrbus_shift); } + inline offs_t addr2byte_end(offs_t address) const { return (m_addr_shift < 0) ? ((address << -m_addr_shift) | ((1 << -m_addr_shift) - 1)) : (address >> m_addr_shift); } + inline offs_t byte2addr_end(offs_t address) const { return (m_addr_shift > 0) ? ((address << m_addr_shift) | ((1 << m_addr_shift) - 1)) : (address >> -m_addr_shift); } // state const char * m_name; endianness_t m_endianness; - u8 m_databus_width; - u8 m_addrbus_width; - s8 m_addrbus_shift; + u8 m_data_width; + u8 m_addr_width; + s8 m_addr_shift; u8 m_logaddr_width; u8 m_page_shift; bool m_is_octal; // to determine if messages/debugger will show octal or hex @@ -256,18 +258,18 @@ public: int spacenum() const { return m_spacenum; } address_map *map() const { return m_map.get(); } - template<int addr_shift> direct_read_data<addr_shift> *direct() const { - static_assert(addr_shift == 3 || addr_shift == 0 || addr_shift == -1 || addr_shift == -2 || addr_shift == -3, "Unsupported addr_shift in direct()"); - if(addr_shift != m_config.addrbus_shift()) - fatalerror("Requesing direct() with address shift %d while the config says %d\n", addr_shift, m_config.addrbus_shift()); - return static_cast<direct_read_data<addr_shift> *>(m_direct); + template<int AddrShift> direct_read_data<AddrShift> *direct() const { + static_assert(AddrShift == 3 || AddrShift == 0 || AddrShift == -1 || AddrShift == -2 || AddrShift == -3, "Unsupported AddrShift in direct()"); + if(AddrShift != m_config.addr_shift()) + fatalerror("Requesing direct() with address shift %d while the config says %d\n", AddrShift, m_config.addr_shift()); + return static_cast<direct_read_data<AddrShift> *>(m_direct); } int data_width() const { return m_config.data_width(); } int addr_width() const { return m_config.addr_width(); } int alignment() const { return m_config.alignment(); } endianness_t endianness() const { return m_config.endianness(); } - int addrbus_shift() const { return m_config.addrbus_shift(); } + int addr_shift() const { return m_config.addr_shift(); } u64 unmap() const { return m_unmap; } bool is_octal() const { return m_config.m_is_octal; } @@ -819,16 +821,10 @@ private: // backing that address //------------------------------------------------- -template<int addr_shift> inline void *direct_read_data<addr_shift>::read_ptr(offs_t address, offs_t directxor) +template<int AddrShift> inline void *direct_read_data<AddrShift>::read_ptr(offs_t address, offs_t directxor) { - if (address_is_valid(address)) { - if(addr_shift < 0) - return &m_ptr[((address ^ directxor) & m_addrmask) << iabs(addr_shift)]; - else if(addr_shift == 0) - return &m_ptr[(address ^ directxor) & m_addrmask]; - else - return &m_ptr[((address ^ directxor) & m_addrmask) >> iabs(addr_shift)]; - } + if (address_is_valid(address)) + return &m_ptr[offset_to_byte(((address ^ directxor) & m_addrmask))]; return nullptr; } @@ -838,16 +834,12 @@ template<int addr_shift> inline void *direct_read_data<addr_shift>::read_ptr(off // direct_read_data class //------------------------------------------------- -template<int addr_shift> inline u8 direct_read_data<addr_shift>::read_byte(offs_t address, offs_t directxor) +template<int AddrShift> inline u8 direct_read_data<AddrShift>::read_byte(offs_t address, offs_t directxor) { - if(addr_shift <= -1) - fatalerror("Can't direct_read_data::read_byte on a memory space with address shift %d", addr_shift); - if (address_is_valid(address)) { - if(addr_shift == 0) - return m_ptr[(address ^ directxor) & m_addrmask]; - else - return m_ptr[((address ^ directxor) & m_addrmask) >> iabs(addr_shift)]; - } + if(AddrShift <= -1) + fatalerror("Can't direct_read_data::read_byte on a memory space with address shift %d", AddrShift); + if (address_is_valid(address)) + return m_ptr[offset_to_byte((address ^ directxor) & m_addrmask)]; return m_space.read_byte(address); } @@ -857,18 +849,12 @@ template<int addr_shift> inline u8 direct_read_data<addr_shift>::read_byte(offs_ // direct_read_data class //------------------------------------------------- -template<int addr_shift> inline u16 direct_read_data<addr_shift>::read_word(offs_t address, offs_t directxor) +template<int AddrShift> inline u16 direct_read_data<AddrShift>::read_word(offs_t address, offs_t directxor) { - if(addr_shift <= -2) - fatalerror("Can't direct_read_data::read_word on a memory space with address shift %d", addr_shift); - if (address_is_valid(address)) { - if(addr_shift < 0) - return *reinterpret_cast<u16 *>(&m_ptr[((address ^ directxor) & m_addrmask) << iabs(addr_shift)]); - else if(addr_shift == 0) - return *reinterpret_cast<u16 *>(&m_ptr[(address ^ directxor) & m_addrmask]); - else - return *reinterpret_cast<u16 *>(&m_ptr[((address ^ directxor) & m_addrmask) >> iabs(addr_shift)]); - } + if(AddrShift <= -2) + fatalerror("Can't direct_read_data::read_word on a memory space with address shift %d", AddrShift); + if (address_is_valid(address)) + return *reinterpret_cast<u16 *>(&m_ptr[offset_to_byte((address ^ directxor) & m_addrmask)]); return m_space.read_word(address); } @@ -878,18 +864,12 @@ template<int addr_shift> inline u16 direct_read_data<addr_shift>::read_word(offs // direct_read_data class //------------------------------------------------- -template<int addr_shift> inline u32 direct_read_data<addr_shift>::read_dword(offs_t address, offs_t directxor) +template<int AddrShift> inline u32 direct_read_data<AddrShift>::read_dword(offs_t address, offs_t directxor) { - if(addr_shift <= -3) - fatalerror("Can't direct_read_data::read_dword on a memory space with address shift %d", addr_shift); - if (address_is_valid(address)) { - if(addr_shift < 0) - return *reinterpret_cast<u32 *>(&m_ptr[((address ^ directxor) & m_addrmask) << iabs(addr_shift)]); - else if(addr_shift == 0) - return *reinterpret_cast<u32 *>(&m_ptr[(address ^ directxor) & m_addrmask]); - else - return *reinterpret_cast<u32 *>(&m_ptr[((address ^ directxor) & m_addrmask) >> iabs(addr_shift)]); - } + if(AddrShift <= -3) + fatalerror("Can't direct_read_data::read_dword on a memory space with address shift %d", AddrShift); + if (address_is_valid(address)) + return *reinterpret_cast<u32 *>(&m_ptr[offset_to_byte((address ^ directxor) & m_addrmask)]); return m_space.read_dword(address); } @@ -899,16 +879,10 @@ template<int addr_shift> inline u32 direct_read_data<addr_shift>::read_dword(off // direct_read_data class //------------------------------------------------- -template<int addr_shift> inline u64 direct_read_data<addr_shift>::read_qword(offs_t address, offs_t directxor) +template<int AddrShift> inline u64 direct_read_data<AddrShift>::read_qword(offs_t address, offs_t directxor) { - if (address_is_valid(address)) { - if(addr_shift < 0) - return *reinterpret_cast<u64 *>(&m_ptr[((address ^ directxor) & m_addrmask) << iabs(addr_shift)]); - else if(addr_shift == 0) - return *reinterpret_cast<u64 *>(&m_ptr[(address ^ directxor) & m_addrmask]); - else - return *reinterpret_cast<u64 *>(&m_ptr[((address ^ directxor) & m_addrmask) >> iabs(addr_shift)]); - } + if (address_is_valid(address)) + return *reinterpret_cast<u64 *>(&m_ptr[offset_to_byte((address ^ directxor) & m_addrmask)]); return m_space.read_qword(address); } diff --git a/src/emu/romload.cpp b/src/emu/romload.cpp index 659e6b6c210..6d2dcfec2e9 100644 --- a/src/emu/romload.cpp +++ b/src/emu/romload.cpp @@ -1275,7 +1275,7 @@ void rom_load_manager::normalize_flags_for_device(running_machine &machine, cons endian = ENDIANNESS_BIG; /* set the width */ - buswidth = spaceconfig->m_databus_width; + buswidth = spaceconfig->m_data_width; if (buswidth <= 8) width = 1; else if (buswidth <= 16) diff --git a/src/emu/validity.cpp b/src/emu/validity.cpp index dd70af41506..ff29b1b7442 100644 --- a/src/emu/validity.cpp +++ b/src/emu/validity.cpp @@ -514,9 +514,13 @@ void validity_checker::validate_inlines() testi32a = (testi32a & 0x0000ffff) | 0x400000; if (count_leading_zeros(testi32a) != 9) osd_printf_error("Error testing count_leading_zeros\n"); + if (count_leading_zeros(0) != 32) + osd_printf_error("Error testing count_leading_zeros\n"); testi32a = (testi32a | 0xffff0000) & ~0x400000; if (count_leading_ones(testi32a) != 9) osd_printf_error("Error testing count_leading_ones\n"); + if (count_leading_ones(0xffffffff) != 32) + osd_printf_error("Error testing count_leading_ones\n"); } @@ -1921,7 +1925,8 @@ void validity_checker::validate_devices() validate_tag(device.basetag()); // look for duplicates - if (!device_map.insert(device.tag()).second) + bool duplicate = !device_map.insert(device.tag()).second; + if (duplicate) osd_printf_error("Multiple devices with the same tag defined\n"); // check for device-specific validity check @@ -1932,7 +1937,7 @@ void validity_checker::validate_devices() // if it's a slot, iterate over possible cards (don't recurse, or you'll stack infinite tee connectors) device_slot_interface *const slot = dynamic_cast<device_slot_interface *>(&device); - if (slot != nullptr && !slot->fixed()) + if (slot != nullptr && !slot->fixed() && !duplicate) { for (auto &option : slot->option_list()) { diff --git a/src/frontend/mame/cheat.cpp b/src/frontend/mame/cheat.cpp index 06d87596e68..1ac5039fa7f 100644 --- a/src/frontend/mame/cheat.cpp +++ b/src/frontend/mame/cheat.cpp @@ -1069,8 +1069,8 @@ cheat_manager::cheat_manager(running_machine &machine) // create a global symbol table m_symtable.add("frame", symbol_table::READ_ONLY, &m_framecount); - m_symtable.add("frombcd", nullptr, 1, 1, execute_frombcd); - m_symtable.add("tobcd", nullptr, 1, 1, execute_tobcd); + m_symtable.add("frombcd", 1, 1, execute_frombcd); + m_symtable.add("tobcd", 1, 1, execute_tobcd); // we rely on the debugger expression callbacks; if the debugger isn't // enabled, we must jumpstart them manually @@ -1320,7 +1320,7 @@ std::string cheat_manager::quote_expression(const parsed_expression &expression) // execute_frombcd - convert a value from BCD //------------------------------------------------- -uint64_t cheat_manager::execute_frombcd(symbol_table &table, void *ref, int params, const uint64_t *param) +uint64_t cheat_manager::execute_frombcd(symbol_table &table, int params, const uint64_t *param) { uint64_t value(param[0]); uint64_t multiplier(1); @@ -1340,7 +1340,7 @@ uint64_t cheat_manager::execute_frombcd(symbol_table &table, void *ref, int para // execute_tobcd - convert a value to BCD //------------------------------------------------- -uint64_t cheat_manager::execute_tobcd(symbol_table &table, void *ref, int params, const uint64_t *param) +uint64_t cheat_manager::execute_tobcd(symbol_table &table, int params, const uint64_t *param) { uint64_t value(param[0]); uint64_t result(0); diff --git a/src/frontend/mame/cheat.h b/src/frontend/mame/cheat.h index b685dba2c33..d05890c7152 100644 --- a/src/frontend/mame/cheat.h +++ b/src/frontend/mame/cheat.h @@ -327,8 +327,8 @@ public: // global helpers static std::string quote_expression(parsed_expression const &expression); - static uint64_t execute_frombcd(symbol_table &table, void *ref, int params, uint64_t const *param); - static uint64_t execute_tobcd(symbol_table &table, void *ref, int params, uint64_t const *param); + static uint64_t execute_frombcd(symbol_table &table, int params, uint64_t const *param); + static uint64_t execute_tobcd(symbol_table &table, int params, uint64_t const *param); private: // internal helpers diff --git a/src/frontend/mame/clifront.cpp b/src/frontend/mame/clifront.cpp index 91a4df81b3c..a219ec614c7 100644 --- a/src/frontend/mame/clifront.cpp +++ b/src/frontend/mame/clifront.cpp @@ -719,7 +719,15 @@ void cli_frontend::listdevices(const std::vector<std::string> &args) // sort them by tag std::sort(device_list.begin(), device_list.end(), [](device_t *dev1, device_t *dev2) { - return strcmp(dev1->tag(), dev2->tag()) < 0; + // end of string < ':' < '0' + const char *tag1 = dev1->tag(); + const char *tag2 = dev2->tag(); + while (*tag1 == *tag2 && *tag1 != '\0' && *tag2 != '\0') + { + tag1++; + tag2++; + } + return (*tag1 == ':' ? ' ' : *tag1) < (*tag2 == ':' ? ' ' : *tag2); }); // dump the results diff --git a/src/mame/audio/dcs.cpp b/src/mame/audio/dcs.cpp index d065f4a53b4..030d1c15f9f 100644 --- a/src/mame/audio/dcs.cpp +++ b/src/mame/audio/dcs.cpp @@ -2628,8 +2628,8 @@ MACHINE_CONFIG_MEMBER( dcs2_audio_dsio_device::device_add_mconfig ) MCFG_DEVICE_ADD("data_map_bank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(dsio_rambank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(14) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(14) MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000) MCFG_TIMER_DEVICE_ADD("dcs_reg_timer", DEVICE_SELF, dcs_audio_device, dcs_irq) @@ -2669,8 +2669,8 @@ MACHINE_CONFIG_MEMBER( dcs2_audio_denver_device::device_add_mconfig ) MCFG_DEVICE_ADD("data_map_bank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(denver_rambank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(14) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(14) MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000) MCFG_TIMER_DEVICE_ADD("dcs_reg_timer", DEVICE_SELF, dcs_audio_device, dcs_irq) diff --git a/src/mame/drivers/68ksbc.cpp b/src/mame/drivers/68ksbc.cpp index baaf6a043b7..4e6fcc23221 100644 --- a/src/mame/drivers/68ksbc.cpp +++ b/src/mame/drivers/68ksbc.cpp @@ -49,8 +49,7 @@ static ADDRESS_MAP_START(c68ksbc_mem, AS_PROGRAM, 16, c68ksbc_state) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x000000, 0x002fff) AM_ROM AM_RANGE(0x003000, 0x5fffff) AM_RAM - AM_RANGE(0x600000, 0x600001) AM_DEVREADWRITE8("acia", acia6850_device, status_r, control_w, 0x00ff) - AM_RANGE(0x600002, 0x600003) AM_DEVREADWRITE8("acia", acia6850_device, data_r, data_w, 0x00ff) + AM_RANGE(0x600000, 0x600003) AM_DEVREADWRITE8("acia", acia6850_device, read, write, 0x00ff) ADDRESS_MAP_END diff --git a/src/mame/drivers/a7150.cpp b/src/mame/drivers/a7150.cpp index 0b87eaeee8f..4c7440c7e84 100644 --- a/src/mame/drivers/a7150.cpp +++ b/src/mame/drivers/a7150.cpp @@ -471,8 +471,8 @@ static MACHINE_CONFIG_START( a7150 ) MCFG_DEVICE_ADD("video_bankdev", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(k7070_cpu_banked) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(18) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(18) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000) MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_16MHz/3) diff --git a/src/mame/drivers/accomm.cpp b/src/mame/drivers/accomm.cpp index bb57d26d28b..4012236b50e 100644 --- a/src/mame/drivers/accomm.cpp +++ b/src/mame/drivers/accomm.cpp @@ -636,8 +636,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, accomm_state ) AM_RANGE(0x400000, 0x400000) AM_NOP /* MODEM */ AM_RANGE(0x410000, 0x410000) AM_RAM /* Econet ID */ AM_RANGE(0x420000, 0x42000f) AM_DEVREADWRITE("via6522", via6522_device, read, write) /* 6522 VIA (printer etc) */ - AM_RANGE(0x430000, 0x430000) AM_DEVREADWRITE("acia", acia6850_device, status_r, control_w) /* 2641 ACIA (RS423) */ - AM_RANGE(0x430001, 0x430001) AM_DEVREADWRITE("acia", acia6850_device, data_r, data_w) /* 2641 ACIA (RS423) */ + AM_RANGE(0x430000, 0x430001) AM_DEVREADWRITE("acia", acia6850_device, read, write) /* 2641 ACIA (RS423) */ AM_RANGE(0x440000, 0x440000) AM_WRITE(ch00switch_w) /* CH00SWITCH */ AM_RANGE(0x450000, 0x457fff) AM_RAM AM_SHARE("vram") /* Video RAM */ AM_RANGE(0x458000, 0x459fff) AM_READ(read_keyboard1) /* Video ULA */ diff --git a/src/mame/drivers/agat.cpp b/src/mame/drivers/agat.cpp index 546122ead74..62f111e7255 100644 --- a/src/mame/drivers/agat.cpp +++ b/src/mame/drivers/agat.cpp @@ -1026,7 +1026,7 @@ static MACHINE_CONFIG_START( agat7 ) MCFG_DEVICE_ADD(A7_UPPERBANK_TAG, ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(inhbank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x3000) /* keyboard controller -- XXX must be replaced */ diff --git a/src/mame/drivers/alg.cpp b/src/mame/drivers/alg.cpp index 38ce8fedeb1..6e86fc37fe4 100644 --- a/src/mame/drivers/alg.cpp +++ b/src/mame/drivers/alg.cpp @@ -298,8 +298,8 @@ static MACHINE_CONFIG_START( alg_r1 ) MCFG_DEVICE_ADD("overlay", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(overlay_512kb_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(22) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(22) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200000) MCFG_NVRAM_ADD_0FILL("nvram") diff --git a/src/mame/drivers/aliens.cpp b/src/mame/drivers/aliens.cpp index 692eb06e770..3eef3edda85 100644 --- a/src/mame/drivers/aliens.cpp +++ b/src/mame/drivers/aliens.cpp @@ -204,8 +204,8 @@ static MACHINE_CONFIG_START( aliens ) MCFG_DEVICE_ADD("bank0000", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank0000_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(11) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(11) MCFG_ADDRESS_MAP_BANK_STRIDE(0x400) MCFG_WATCHDOG_ADD("watchdog") diff --git a/src/mame/drivers/alphatpx.cpp b/src/mame/drivers/alphatpx.cpp index 12955b408f2..fcb3d9de838 100644 --- a/src/mame/drivers/alphatpx.cpp +++ b/src/mame/drivers/alphatpx.cpp @@ -523,8 +523,8 @@ static MACHINE_CONFIG_START( alphatp3 ) MCFG_DEVICE_ADD("bankdev", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(alphatp3_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(18) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(18) MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000) // video hardware diff --git a/src/mame/drivers/alphatro.cpp b/src/mame/drivers/alphatro.cpp index a95673dba51..aeb128f7bc4 100644 --- a/src/mame/drivers/alphatro.cpp +++ b/src/mame/drivers/alphatro.cpp @@ -759,21 +759,21 @@ static MACHINE_CONFIG_START( alphatro ) MCFG_DEVICE_ADD("lowbank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(rombank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x6000) /* A000 banking */ MCFG_DEVICE_ADD("cartbank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(cartbank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) /* F000 banking */ MCFG_DEVICE_ADD("monbank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(monbank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000) MACHINE_CONFIG_END diff --git a/src/mame/drivers/altair.cpp b/src/mame/drivers/altair.cpp index d718f7f51dd..0eb95a0bc28 100644 --- a/src/mame/drivers/altair.cpp +++ b/src/mame/drivers/altair.cpp @@ -62,8 +62,7 @@ static ADDRESS_MAP_START(io_map, AS_IO, 8, altair_state) ADDRESS_MAP_UNMAP_HIGH ADDRESS_MAP_GLOBAL_MASK(0xff) // TODO: Remove AM_MIRROR() and use SIO address S0-S7 - AM_RANGE( 0x00, 0x00 ) AM_MIRROR(0x10) AM_DEVREADWRITE("acia", acia6850_device, status_r, control_w) - AM_RANGE( 0x01, 0x01 ) AM_MIRROR(0x10) AM_DEVREADWRITE("acia", acia6850_device, data_r, data_w) + AM_RANGE(0x00, 0x01) AM_MIRROR(0x10) AM_DEVREADWRITE("acia", acia6850_device, read, write) ADDRESS_MAP_END /* Input ports */ diff --git a/src/mame/drivers/altos8600.cpp b/src/mame/drivers/altos8600.cpp index aafb96fdab6..af9ddbb1615 100644 --- a/src/mame/drivers/altos8600.cpp +++ b/src/mame/drivers/altos8600.cpp @@ -691,7 +691,7 @@ static MACHINE_CONFIG_START(altos8600) MCFG_CPU_ADD("dmac", I8089, XTAL_5MHz) MCFG_CPU_PROGRAM_MAP(dmac_mem) MCFG_CPU_IO_MAP(dmac_io) - MCFG_I8089_DATABUS_WIDTH(16) + MCFG_I8089_DATA_WIDTH(16) MCFG_I8089_SINTR1(WRITELINE(altos8600_state, sintr1_w)) MCFG_I8089_SINTR2(DEVWRITELINE("pic8259_2", pic8259_device, ir4_w)) diff --git a/src/mame/drivers/amiga.cpp b/src/mame/drivers/amiga.cpp index 1e528d1a402..19851c14393 100644 --- a/src/mame/drivers/amiga.cpp +++ b/src/mame/drivers/amiga.cpp @@ -1393,15 +1393,15 @@ static MACHINE_CONFIG_DERIVED( a1000, amiga_base ) MCFG_DEVICE_ADD("overlay", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(a1000_overlay_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(22) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(22) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200000) MCFG_DEVICE_ADD("bootrom", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(a1000_bootrom_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(19) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(19) MCFG_ADDRESS_MAP_BANK_STRIDE(0x40000) MCFG_SOFTWARE_LIST_ADD("a1000_list", "amiga_a1000") @@ -1430,8 +1430,8 @@ static MACHINE_CONFIG_DERIVED( a2000, amiga_base ) MCFG_DEVICE_ADD("overlay", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(overlay_512kb_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(22) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(22) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200000) // real-time clock @@ -1475,8 +1475,8 @@ static MACHINE_CONFIG_DERIVED( a500, amiga_base ) //MCFG_DEVICE_PROGRAM_MAP(overlay_512kb_map) MCFG_DEVICE_PROGRAM_MAP(overlay_1mb_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(22) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(22) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200000) // cpu slot @@ -1519,8 +1519,8 @@ static MACHINE_CONFIG_DERIVED( cdtv, amiga_base ) MCFG_DEVICE_ADD("overlay", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(overlay_1mb_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(22) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(22) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200000) // standard sram @@ -1582,8 +1582,8 @@ static MACHINE_CONFIG_DERIVED( a3000, amiga_base ) MCFG_DEVICE_ADD("overlay", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(overlay_1mb_map32) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(22) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(22) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200000) // real-time clock @@ -1615,8 +1615,8 @@ static MACHINE_CONFIG_DERIVED( a500p, amiga_base ) MCFG_DEVICE_ADD("overlay", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(overlay_1mb_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(22) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(22) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200000) // real-time clock @@ -1652,8 +1652,8 @@ static MACHINE_CONFIG_DERIVED( a600, amiga_base ) MCFG_DEVICE_ADD("overlay", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(overlay_2mb_map16) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(22) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(22) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200000) MCFG_GAYLE_ADD("gayle", amiga_state::CLK_28M_PAL / 2, a600_state::GAYLE_ID) @@ -1697,8 +1697,8 @@ static MACHINE_CONFIG_DERIVED( a1200, amiga_base ) MCFG_DEVICE_ADD("overlay", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(overlay_2mb_map32) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(22) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(22) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200000) MCFG_DEVICE_MODIFY("screen") @@ -1760,8 +1760,8 @@ static MACHINE_CONFIG_DERIVED( a4000, amiga_base ) MCFG_DEVICE_ADD("overlay", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(overlay_2mb_map32) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(22) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(22) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200000) MCFG_DEVICE_MODIFY("screen") @@ -1835,8 +1835,8 @@ static MACHINE_CONFIG_DERIVED( cd32, amiga_base ) MCFG_DEVICE_ADD("overlay", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(overlay_2mb_map32) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(22) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(22) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200000) MCFG_I2CMEM_ADD("i2cmem") diff --git a/src/mame/drivers/amusco.cpp b/src/mame/drivers/amusco.cpp index 21611946c46..af39e4757e3 100644 --- a/src/mame/drivers/amusco.cpp +++ b/src/mame/drivers/amusco.cpp @@ -131,7 +131,7 @@ protected: virtual void video_start() override; virtual void machine_start() override; private: - uint8_t *m_videoram; + std::unique_ptr<uint8_t []> m_videoram; tilemap_t *m_bg_tilemap; required_device<cpu_device> m_maincpu; @@ -180,9 +180,10 @@ void amusco_state::video_start() m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(amusco_state::get_bg_tile_info),this), TILEMAP_SCAN_ROWS, 8, 10, 74, 24); m_blink_state = false; - m_videoram = auto_alloc_array_clear(machine(), uint8_t, videoram_size); + m_videoram = std::make_unique<uint8_t []>(videoram_size); + std::fill_n(m_videoram.get(), videoram_size, 0); - save_pointer(NAME(m_videoram), videoram_size); + save_pointer(NAME(m_videoram.get()), videoram_size); } void amusco_state::machine_start() diff --git a/src/mame/drivers/apple2.cpp b/src/mame/drivers/apple2.cpp index 14177de9527..0527d461daf 100644 --- a/src/mame/drivers/apple2.cpp +++ b/src/mame/drivers/apple2.cpp @@ -1379,7 +1379,7 @@ static MACHINE_CONFIG_START( apple2_common ) MCFG_DEVICE_ADD(A2_UPPERBANK_TAG, ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(inhbank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x3000) /* soft switches */ diff --git a/src/mame/drivers/apple2e.cpp b/src/mame/drivers/apple2e.cpp index c40acdb7858..dcfde97b251 100644 --- a/src/mame/drivers/apple2e.cpp +++ b/src/mame/drivers/apple2e.cpp @@ -3868,84 +3868,84 @@ static MACHINE_CONFIG_START( apple2e ) MCFG_DEVICE_ADD(A2_0000_TAG, ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(r0000bank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200) /* 0200 banking */ MCFG_DEVICE_ADD(A2_0200_TAG, ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(r0200bank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200) /* 0400 banking */ MCFG_DEVICE_ADD(A2_0400_TAG, ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(r0400bank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x400) /* 0800 banking */ MCFG_DEVICE_ADD(A2_0800_TAG, ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(r0800bank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000) /* 2000 banking */ MCFG_DEVICE_ADD(A2_2000_TAG, ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(r2000bank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000) /* 4000 banking */ MCFG_DEVICE_ADD(A2_4000_TAG, ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(r4000bank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000) /* C100 banking */ MCFG_DEVICE_ADD(A2_C100_TAG, ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(c100bank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200) /* C300 banking */ MCFG_DEVICE_ADD(A2_C300_TAG, ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(c300bank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x100) /* C400 banking */ MCFG_DEVICE_ADD(A2_C400_TAG, ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(c400bank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x400) /* C800 banking */ MCFG_DEVICE_ADD(A2_C800_TAG, ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(c800bank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x800) /* built-in language card emulation */ MCFG_DEVICE_ADD(A2_LCBANK_TAG, ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(lcbank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x3000) /* /INH banking */ MCFG_DEVICE_ADD(A2_UPPERBANK_TAG, ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(inhbank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x3000) /* keyboard controller */ diff --git a/src/mame/drivers/apricot.cpp b/src/mame/drivers/apricot.cpp index 7a2b1d67716..d183210e690 100644 --- a/src/mame/drivers/apricot.cpp +++ b/src/mame/drivers/apricot.cpp @@ -360,7 +360,7 @@ static MACHINE_CONFIG_START( apricot ) MCFG_CPU_ADD("ic71", I8089, XTAL_15MHz / 3) MCFG_CPU_PROGRAM_MAP(apricot_mem) MCFG_CPU_IO_MAP(apricot_io) - MCFG_I8089_DATABUS_WIDTH(16) + MCFG_I8089_DATA_WIDTH(16) MCFG_I8089_SINTR1(DEVWRITELINE("ic31", pic8259_device, ir0_w)) MCFG_I8089_SINTR2(DEVWRITELINE("ic31", pic8259_device, ir1_w)) diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp index 7fa04954cb0..5b9a27577de 100644 --- a/src/mame/drivers/aristmk5.cpp +++ b/src/mame/drivers/aristmk5.cpp @@ -3840,14 +3840,19 @@ ROM_END // Same strings as incasunu but different version ROM_START( incasunua ) ARISTOCRAT_MK5_BIOS - // checksum code not found due to ROMs being corrupted, all files are missing bytes consisting of 0x0D + /* + Checksum code found at 0x000d18 + Checksum is stored in 0x000020-0x000027 + Expected Checksum 0x24e1ed00 + Calculated Checksum 0x24e1ed00 (OK) + */ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) - ROM_LOAD32_WORD( "dhg1577.u7", 0x000000, 0x7f079, BAD_DUMP CRC(ebbd4d54) SHA1(7e5c0da2bc62338dd2148af7fa87745d622b85b9) ) - ROM_LOAD32_WORD( "dhg1577.u11", 0x000002, 0x7ff6c, BAD_DUMP CRC(fb86c7b2) SHA1(62b1897907ceebcd0c2c0a4da002a783174321e7) ) - ROM_LOAD32_WORD( "dhg1577.u8", 0x100000, 0x7fcb7, BAD_DUMP CRC(809c5277) SHA1(2efde9a7887d3ca5cb7fa5aebb0b6fcc9aeb880a) ) - ROM_LOAD32_WORD( "dhg1577.u12", 0x100002, 0x7fc89, BAD_DUMP CRC(dbf26048) SHA1(2fcf1f7d5a0402798b4fe25afd178d8c1db89e3b) ) - ROM_LOAD32_WORD( "dhg1577.u9", 0x200000, 0x7fd47, BAD_DUMP CRC(046e019e) SHA1(4c6e17562cb337c3d79efc095960c4d1f9d87f39) ) - ROM_LOAD32_WORD( "dhg1577.u13", 0x200002, 0x7fd62, BAD_DUMP CRC(7299484f) SHA1(f6b75e5be6ef724504a543702692e455437d7046) ) + ROM_LOAD32_WORD( "dhg1577.u7", 0x000000, 0x80000, CRC(e31e3c81) SHA1(56b00aae1b9385686530e089cad05308e0c0751d) ) + ROM_LOAD32_WORD( "dhg1577.u11", 0x000002, 0x80000, CRC(68d58ad3) SHA1(c521da10b719250e3f115357c6e4ff51377d4335) ) + ROM_LOAD32_WORD( "dhg1577.u8", 0x100000, 0x80000, CRC(475db842) SHA1(3c49fbf45a256222e6a5a0343a7dc96386bb8897) ) + ROM_LOAD32_WORD( "dhg1577.u12", 0x100002, 0x80000, CRC(f1be432e) SHA1(ed4a064e4e8200126bda3f1c25ac5075014c9f94) ) + ROM_LOAD32_WORD( "dhg1577.u9", 0x200000, 0x80000, CRC(a8956bf5) SHA1(d444a3a64968a6275b38babf23089c7d186f30e6) ) + ROM_LOAD32_WORD( "dhg1577.u13", 0x200002, 0x80000, CRC(f7c30ef9) SHA1(44d7213e1220d6b89715408d009ef1484de2696f) ) ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) @@ -4132,12 +4137,17 @@ ROM_END // Loco Loot / Export / A - 30/07/01 ROM_START( locolootu ) ARISTOCRAT_MK5_BIOS - // checksum code not found due to ROMs being corrupted, all files are missing bytes consisting of 0x0D +/* + Checksum code found at 0x000d18 + Checksum is stored at 0x000020-0x000027 + Expected Checksum 0xbd28f614 + Calculated Checksum 0xbd28f614 (OK) +*/ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) - ROM_LOAD32_WORD( "ahg1513.u7", 0x000000, 0x7f06f, BAD_DUMP CRC(c0e769a1) SHA1(df0dedf6dc9412efccd26ad16ab0d316863f9488) ) - ROM_LOAD32_WORD( "ahg1513.u11", 0x000002, 0x7ff6c, BAD_DUMP CRC(f60c2e0b) SHA1(d3ba83eb458ab99d28a910688e63c9dd5ae6570b) ) - ROM_LOAD32_WORD( "ahg1513.u8", 0x100000, 0x7fede, BAD_DUMP CRC(c24cfe7b) SHA1(7f1f02a4e77ad178c7e08362feb1ec4b064e539c) ) - ROM_LOAD32_WORD( "ahg1513.u12", 0x100002, 0x7ff14, BAD_DUMP CRC(73e30f47) SHA1(eb12716f3c384901cd80b2f43760b522150c64b0) ) + ROM_LOAD32_WORD( "ahg1513.u7", 0x000000, 0x80000, CRC(16854250) SHA1(a3b6e112dcce38310ca13eb9e9851901ee213fcf) ) + ROM_LOAD32_WORD( "ahg1513.u11", 0x000002, 0x80000, CRC(0abe509a) SHA1(a5d0b870390e7f4b38d7685c09c079acb198dd42) ) + ROM_LOAD32_WORD( "ahg1513.u8", 0x100000, 0x80000, CRC(bd9d2ad7) SHA1(5e5eaf2521473246fb54175f88521b43b9b86f9f) ) + ROM_LOAD32_WORD( "ahg1513.u12", 0x100002, 0x80000, CRC(5bf7b4b1) SHA1(2282ec8d0ddd1aea715005fba2171468831513f4) ) ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) @@ -4466,36 +4476,6 @@ ROM_START( marmagicua ) ROM_END -// US003 / Multi credit / Multi line -// Margarita Magic / NSW/ACT / A - 07/07/2000 -// EHG1559 / This is a twenty-line game -// The playlines are 1, 5, 10, 15 and 20 -// For 20 credit per line the max bet is 400 -// ROM has NSW/ACT strings but it is for US platform -ROM_START( marmagicub ) - ARISTOCRAT_MK5_BIOS - /* - This ROM set is exactly the same version as the parent, yet is bad in a completely different way! - Comparing the ROM data between this one and the above bad dump, it is highly possible that this set can be repaired as this ROM set came from a good dump until it was stripped of carriage return symbols (0x0D) by a web server - The "_a" suffix is to differentiate the ROMs from the above set and does not correspond to the label, the correct label is simply EHG1559. - checksum code not found due to ROMs being corrupted, all files except the last 2 are missing bytes consisting of 0x0D - */ - ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) - ROM_LOAD32_WORD( "ehg1559_a.u7", 0x000000, 0x7f03e, BAD_DUMP CRC(473afd5b) SHA1(823f8ad8cd5c3676feba8d740b50f25544a6c046) ) - ROM_LOAD32_WORD( "ehg1559_a.u11", 0x000002, 0x7ff66, BAD_DUMP CRC(c66df0dc) SHA1(015e6aed905bfef2f152137aa8aaaeaae41bc90e) ) - ROM_LOAD32_WORD( "ehg1559_a.u8", 0x100000, 0x7fcfe, BAD_DUMP CRC(5d2760d6) SHA1(655da82ae5dca1bb498399d2ee1efad7a3811cba) ) - ROM_LOAD32_WORD( "ehg1559_a.u12", 0x100002, 0x7fce2, BAD_DUMP CRC(56f9dcab) SHA1(2951a7189e5aa6e7338eb11f929fd6eea2541f0d) ) - ROM_LOAD32_WORD( "ehg1559_a.u9", 0x200000, 0x7ff4d, BAD_DUMP CRC(60323004) SHA1(8f188c7109538454a9ad5e14f21ab4ef76115153) ) - ROM_LOAD32_WORD( "ehg1559_a.u13", 0x200002, 0x7ff61, BAD_DUMP CRC(34320e8d) SHA1(b266d9c53cf746f1a164e006f14079bced2887ed) ) - ROM_LOAD32_WORD( "ehg1559.u10", 0x300000, 0x80000, CRC(3db4e373) SHA1(7150242253ae4a1c4f3211e3068f00e8b1ed51b1) ) - ROM_LOAD32_WORD( "ehg1559.u14", 0x300002, 0x80000, CRC(bdfdc0e4) SHA1(0e56f08abc0cdd9dfa5d8e51bb6fe06fa356b3b3) ) - - ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ - ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) - ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) -ROM_END - - // 0400115V / 559/2 / 10 Credit Multiplier/9 Line Multiline // Mine, Mine, Mine / Local / D - 16/01/96 ROM_START( minemine ) @@ -7013,6 +6993,7 @@ GAMEL( 1999, incasun, aristmk5, aristmk5, incasun, aristmk5_s GAMEL( 1999, incasunsp, incasun, aristmk5, incasun, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (0100872V, NSW/ACT, Show Program)", MACHINE_FLAGS, layout_incasun ) // 631/3 B, B - 03/05/99, Rev 15 GAMEL( 2000, incasunnz, incasun, aristmk5, incasunnz, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (0101108V, New Zealand)", MACHINE_FLAGS, layout_incasunnz ) // MV4113, A - 6/3/00, Rev 25 GAMEL( 2000, incasunu, incasun, aristmk5_usa, dolphntrce, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (CHG1458, US)", MACHINE_FLAGS, layout_dolphntrce ) // MV4130/3, A - 05/09/00 +GAMEL( 2000, incasunua, incasun, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (DHG1577, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4130, A - 05/09/00 GAMEL( 1998, indrema5, aristmk5, aristmk5, indrema5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Indian Dreaming (0100845V, NSW/ACT)", MACHINE_FLAGS, layout_indrema5 ) // 628/1, B - 15/12/98, Rev 7 GAMEL( 1996, jumpjoey, aristmk5, aristmk5, cashcham, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Jumpin' Joey (0100383V, NSW/ACT)", MACHINE_FLAGS, layout_cashcham ) // 586/6, C - 13/11/96 GAMEL( 1996, jungjuic, aristmk5, aristmk5, jungjuic, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Jungle Juice (0200240V, New Zealand)", MACHINE_FLAGS, layout_jungjuic ) // 566/3, F - 06/03/96 @@ -7024,6 +7005,7 @@ GAMEL( 1998, kookabuk, aristmk5, aristmk5, aristmk5, aristmk5_s GAMEL( 1997, locoloot, aristmk5, aristmk5, cashcham, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (0100473V, NSW/ACT)", MACHINE_FLAGS, layout_cashcham ) // 599/3, C - 17/06/97, Rev 1.26.13.0 GAMEL( 1997, locoloota, locoloot, aristmk5, locoloota, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (0100472V, NSW/ACT)", MACHINE_FLAGS, layout_locoloota ) // 599/2, C - 17/06/97, Rev 1.26.13.0 GAMEL( 1998, locolootnz, locoloot, aristmk5, cashchamnz, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (0600725V, New Zealand)", MACHINE_FLAGS, layout_cashchamnz ) // MV4064, A - 8/7/98, Rev 24 +GAMEL( 2001, locolootu, locoloot, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (AHG1513, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4134, A - 30/07/01 GAMEL( 1997, lonewolf, aristmk5, aristmk5, wildbill, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Lone Wolf (0100587V, NSW/ACT)", MACHINE_FLAGS, layout_wildbill ) // 621, A - 29/10/97, Rev 1.27.17.0 GAMEL( 1995, luckyclo, aristmk5, aristmk5, wcougar, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Lucky Clover (0300109V, NSW/ACT)", MACHINE_FLAGS, layout_wcougar ) // 570/6, A - 12/10/95 GAMEL( 2000, magimask, aristmk5, aristmk5_usa_touch, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Magic Mask (AHG1549, US)", MACHINE_FLAGS, layout_dolphntrce ) // MV4115_1, A - 09/05/00 @@ -7034,7 +7016,7 @@ GAMEL( 1997, magtcha5a, magtcha5, aristmk5_touch, dimtouch, aristmk5_s GAMEL( 1997, mammothm, aristmk5, aristmk5, kgalah, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Mammoth Money (0100425V, NSW/ACT)", MACHINE_FLAGS, layout_kgalah ) // 595/5, D - 07/04/97, Rev 1.22.14.1 GAMEL( 2000, marmagic, aristmk5, aristmk5, goldenra, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Margarita Magic (01J00101, NSW/ACT)", MACHINE_FLAGS, layout_marmagic ) // JB005, A - 07/07/00, Rev 17 GAMEL( 2000, marmagicu, marmagic, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Margarita Magic (EHG1558, US)", MACHINE_FLAGS, layout_aristmk5_us ) // US003, 07/07/2000 -GAMEL( 2000, marmagicua, marmagic, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Margarita Magic (EHG1559, US, set 1)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // US003, A - 07/07/00 +GAMEL( 2000, marmagicua, marmagic, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Margarita Magic (EHG1559, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // US003, A - 07/07/00 GAMEL( 1997, mgarden, aristmk5, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Magic Garden (AHG1211-99, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4033, B - 10/02/97 (alt title for enchanted forest?) GAMEL( 1996, minemine, aristmk5, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Mine, Mine, Mine (0400115V, NSW/ACT)", MACHINE_FLAGS, layout_swhr2 ) // 559/2, D - 16/01/96, Rev 1.18.3.0 GAMEL( 1996, minemineu, minemine, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Mine, Mine, Mine (VHG0416-99, US)", MACHINE_FLAGS, layout_aristmk5_us ) // 559/2, E - 14/02/96 @@ -7141,9 +7123,6 @@ GAMEL( 2000, bpartya, bparty, aristmk5_usa_touch, bootsctnua, aristmk5_s GAMEL( 1997, cashcra5a, cashcra5, aristmk5, aristmk5_9, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cash Crop (0300447V, NSW/ACT)", MACHINE_FLAGS, layout_dolphntrb ) // 607/2, C - 29/08/97, Rev 7 GAMEL( 2001, dynajacku, dynajack, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dynamite Jack (CHG1562, US)", MACHINE_FLAGS, layout_aristmk5_us ) // US002, A - 11/07/01 GAMEL( 2000, eforsta5ce, eforsta5, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Enchanted Forest - Cash Express (CHG1536, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4108/6, C - 17/01/00 -GAMEL( 2000, incasunua, incasun, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (DHG1577, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4130, A - 05/09/00 -GAMEL( 2001, locolootu, locoloot, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (AHG1513, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4134, A - 30/07/01 -GAMEL( 2000, marmagicub, marmagic, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Margarita Magic (EHG1559, US, set 2)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // US003, A - 07/07/00 GAMEL( 2001, mountmonce, mountmon, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Mountain Money - Cash Express (AHG1629, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4108/5, A - 10/03/01 GAMEL( 2001, mountmonu, mountmon, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Mountain Money (BHG1465, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4108/5, A - 10/03/01 GAMEL( 2001, partygrsb, partygrs, aristmk5_usa_touch, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Party Gras (AHG1568, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4115/6, A - 10/11/2001, 20 lines diff --git a/src/mame/drivers/arsystems.cpp b/src/mame/drivers/arsystems.cpp index 86b05f5e895..986b4aaadd5 100644 --- a/src/mame/drivers/arsystems.cpp +++ b/src/mame/drivers/arsystems.cpp @@ -297,8 +297,8 @@ static MACHINE_CONFIG_START( arcadia ) MCFG_DEVICE_ADD("overlay", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(overlay_512kb_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(22) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(22) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200000) MCFG_NVRAM_ADD_0FILL("nvram") diff --git a/src/mame/drivers/astrocde.cpp b/src/mame/drivers/astrocde.cpp index dd57dfd4b37..0568c4773f7 100644 --- a/src/mame/drivers/astrocde.cpp +++ b/src/mame/drivers/astrocde.cpp @@ -1270,8 +1270,8 @@ static MACHINE_CONFIG_DERIVED( astrocade_16color_base, astrocade_base ) MCFG_DEVICE_ADD("bank4000", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank4000_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_NVRAM_ADD_0FILL("nvram") @@ -1432,7 +1432,7 @@ static MACHINE_CONFIG_DERIVED( profpac, astrocade_16color_base ) MCFG_DEVICE_MODIFY("bank4000") MCFG_DEVICE_PROGRAM_MAP(profpac_bank4000_map) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(20) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20) MACHINE_CONFIG_END diff --git a/src/mame/drivers/atarist.cpp b/src/mame/drivers/atarist.cpp index 3d41bf3293c..d8ea63c8e22 100644 --- a/src/mame/drivers/atarist.cpp +++ b/src/mame/drivers/atarist.cpp @@ -1260,10 +1260,8 @@ static ADDRESS_MAP_START( st_map, AS_PROGRAM, 16, st_state ) AM_RANGE(0xff8a3c, 0xff8a3d) AM_READWRITE(blitter_ctrl_r, blitter_ctrl_w) #endif AM_RANGE(0xfffa00, 0xfffa3f) AM_DEVREADWRITE8(MC68901_TAG, mc68901_device, read, write, 0x00ff) - AM_RANGE(0xfffc00, 0xfffc01) AM_DEVREADWRITE8(MC6850_0_TAG, acia6850_device, status_r, control_w, 0xff00) - AM_RANGE(0xfffc02, 0xfffc03) AM_DEVREADWRITE8(MC6850_0_TAG, acia6850_device, data_r, data_w, 0xff00) - AM_RANGE(0xfffc04, 0xfffc05) AM_DEVREADWRITE8(MC6850_1_TAG, acia6850_device, status_r, control_w, 0xff00) - AM_RANGE(0xfffc06, 0xfffc07) AM_DEVREADWRITE8(MC6850_1_TAG, acia6850_device, data_r, data_w, 0xff00) + AM_RANGE(0xfffc00, 0xfffc03) AM_DEVREADWRITE8(MC6850_0_TAG, acia6850_device, read, write, 0xff00) + AM_RANGE(0xfffc04, 0xfffc07) AM_DEVREADWRITE8(MC6850_1_TAG, acia6850_device, read, write, 0xff00) ADDRESS_MAP_END @@ -1304,10 +1302,8 @@ static ADDRESS_MAP_START( megast_map, AS_PROGRAM, 16, megast_state ) AM_RANGE(0xff8a3c, 0xff8a3d) AM_READWRITE(blitter_ctrl_r, blitter_ctrl_w) AM_RANGE(0xfffa00, 0xfffa3f) AM_DEVREADWRITE8(MC68901_TAG, mc68901_device, read, write, 0x00ff) AM_RANGE(0xfffa40, 0xfffa57) AM_READWRITE(fpu_r, fpu_w) - AM_RANGE(0xfffc00, 0xfffc01) AM_DEVREADWRITE8(MC6850_0_TAG, acia6850_device, status_r, control_w, 0xff00) - AM_RANGE(0xfffc02, 0xfffc03) AM_DEVREADWRITE8(MC6850_0_TAG, acia6850_device, data_r, data_w, 0xff00) - AM_RANGE(0xfffc04, 0xfffc05) AM_DEVREADWRITE8(MC6850_1_TAG, acia6850_device, status_r, control_w, 0xff00) - AM_RANGE(0xfffc06, 0xfffc07) AM_DEVREADWRITE8(MC6850_1_TAG, acia6850_device, data_r, data_w, 0xff00) + AM_RANGE(0xfffc00, 0xfffc03) AM_DEVREADWRITE8(MC6850_0_TAG, acia6850_device, read, write, 0xff00) + AM_RANGE(0xfffc04, 0xfffc07) AM_DEVREADWRITE8(MC6850_1_TAG, acia6850_device, read, write, 0xff00) AM_RANGE(0xfffc20, 0xfffc3f) AM_DEVREADWRITE8(RP5C15_TAG, rp5c15_device, read, write, 0x00ff) ADDRESS_MAP_END diff --git a/src/mame/drivers/avigo.cpp b/src/mame/drivers/avigo.cpp index 8647b452712..9b486dc2ce3 100644 --- a/src/mame/drivers/avigo.cpp +++ b/src/mame/drivers/avigo.cpp @@ -802,13 +802,13 @@ static MACHINE_CONFIG_START( avigo ) MCFG_DEVICE_ADD("bank0", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(avigo_banked_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_DEVICE_ADD("bank1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(avigo_banked_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram", avigo_state, nvram_init) diff --git a/src/mame/drivers/bbc.cpp b/src/mame/drivers/bbc.cpp index 788dd5f22d7..ed6c9312fe2 100644 --- a/src/mame/drivers/bbc.cpp +++ b/src/mame/drivers/bbc.cpp @@ -153,8 +153,7 @@ static ADDRESS_MAP_START( bbca_mem, AS_PROGRAM, 8, bbc_state ) /* fe00-feff SHEILA Address Page */ AM_RANGE(0xfe00, 0xfe00) AM_MIRROR(0x06) AM_DEVREADWRITE("hd6845", hd6845_device, status_r, address_w) /* fe00-fe07 6845 CRTC Video controller */ AM_RANGE(0xfe01, 0xfe01) AM_MIRROR(0x06) AM_DEVREADWRITE("hd6845", hd6845_device, register_r, register_w) - AM_RANGE(0xfe08, 0xfe08) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, status_r, control_w) /* fe08-fe0F 6850 ACIA Serial controller */ - AM_RANGE(0xfe09, 0xfe09) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, data_r, data_w) + AM_RANGE(0xfe08, 0xfe09) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, read, write) /* fe08-fe0f 6850 ACIA Serial controller */ AM_RANGE(0xfe10, 0xfe17) AM_READWRITE(bbc_fe_r, bbc_SerialULA_w) /* fe10-fe17 Serial ULA Serial system chip */ AM_RANGE(0xfe18, 0xfe1f) AM_NOP /* fe18-fe1f INTOFF/STATID # ECONET Interrupt Off / ID No. */ AM_RANGE(0xfe20, 0xfe2f) AM_READWRITE(bbc_fe_r, bbc_videoULA_w) /* R: fe20-fe2f INTON # ECONET Interrupt On */ @@ -179,8 +178,7 @@ static ADDRESS_MAP_START( bbc_base, AS_PROGRAM, 8, bbc_state ) /* fe00-feff SHEILA Address Page */ AM_RANGE(0xfe00, 0xfe00) AM_MIRROR(0x06) AM_DEVREADWRITE("hd6845", hd6845_device, status_r, address_w) /* fe00-fe07 6845 CRTC Video controller */ AM_RANGE(0xfe01, 0xfe01) AM_MIRROR(0x06) AM_DEVREADWRITE("hd6845", hd6845_device, register_r, register_w) - AM_RANGE(0xfe08, 0xfe08) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, status_r, control_w) /* fe08-fe0F 6850 ACIA Serial controller */ - AM_RANGE(0xfe09, 0xfe09) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, data_r, data_w) + AM_RANGE(0xfe08, 0xfe09) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, read, write) /* fe08-fe0f 6850 ACIA Serial controller */ AM_RANGE(0xfe10, 0xfe17) AM_READWRITE(bbc_fe_r, bbc_SerialULA_w) /* fe10-fe17 Serial ULA Serial system chip */ AM_RANGE(0xfe18, 0xfe1f) AM_READ_PORT("STATID") /* fe18-fe1f INTOFF/STATID ECONET Interrupt Off / ID No. */ AM_RANGE(0xfe20, 0xfe2f) AM_READWRITE(bbc_fe_r, bbc_videoULA_w) /* R: fe20-fe2f INTON ECONET Interrupt On */ diff --git a/src/mame/drivers/beezer.cpp b/src/mame/drivers/beezer.cpp index c5f58b7c924..324c40c82b4 100644 --- a/src/mame/drivers/beezer.cpp +++ b/src/mame/drivers/beezer.cpp @@ -467,8 +467,8 @@ static MACHINE_CONFIG_START( beezer ) MCFG_DEVICE_ADD("sysbank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(banked_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(15) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(15) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000) MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", beezer_state, scanline_cb, "screen", 0, 1) diff --git a/src/mame/drivers/bfcobra.cpp b/src/mame/drivers/bfcobra.cpp index c67b8af85e0..7af75c64ae9 100644 --- a/src/mame/drivers/bfcobra.cpp +++ b/src/mame/drivers/bfcobra.cpp @@ -1262,10 +1262,8 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( z80_io_map, AS_IO, 8, bfcobra_state ) ADDRESS_MAP_GLOBAL_MASK(0xff) AM_RANGE(0x00, 0x23) AM_READWRITE(chipset_r, chipset_w) - AM_RANGE(0x24, 0x24) AM_DEVWRITE("acia6850_0", acia6850_device, control_w) - AM_RANGE(0x25, 0x25) AM_DEVWRITE("acia6850_0", acia6850_device, data_w) - AM_RANGE(0x26, 0x26) AM_DEVREAD("acia6850_0", acia6850_device, status_r) - AM_RANGE(0x27, 0x27) AM_DEVREAD("acia6850_0", acia6850_device, data_r) + AM_RANGE(0x24, 0x25) AM_DEVWRITE("acia6850_0", acia6850_device, write) + AM_RANGE(0x26, 0x27) AM_DEVREAD("acia6850_0", acia6850_device, read) AM_RANGE(0x30, 0x30) AM_READ(fdctrl_r) AM_RANGE(0x31, 0x31) AM_READWRITE(fddata_r, fdctrl_w) AM_RANGE(0x40, 0x40) AM_WRITE(rombank_w) @@ -1400,10 +1398,8 @@ static ADDRESS_MAP_START( m6809_prog_map, AS_PROGRAM, 8, bfcobra_state ) AM_RANGE(0x2E00, 0x2E00) AM_READ(int_latch_r) AM_RANGE(0x3001, 0x3001) AM_DEVWRITE("aysnd", ay8910_device, data_w) AM_RANGE(0x3201, 0x3201) AM_DEVWRITE("aysnd", ay8910_device, address_w) - AM_RANGE(0x3404, 0x3404) AM_DEVREADWRITE("acia6850_1", acia6850_device, status_r, control_w) - AM_RANGE(0x3405, 0x3405) AM_DEVREADWRITE("acia6850_1", acia6850_device, data_r, data_w) - AM_RANGE(0x3406, 0x3406) AM_DEVREADWRITE("acia6850_2", acia6850_device, status_r, control_w) - AM_RANGE(0x3407, 0x3407) AM_DEVREADWRITE("acia6850_2", acia6850_device, data_r, data_w) + AM_RANGE(0x3404, 0x3405) AM_DEVREADWRITE("acia6850_1", acia6850_device, read, write) + AM_RANGE(0x3406, 0x3407) AM_DEVREADWRITE("acia6850_2", acia6850_device, read, write) // AM_RANGE(0x3408, 0x3408) AM_NOP // AM_RANGE(0x340A, 0x340A) AM_NOP // AM_RANGE(0x3600, 0x3600) AM_NOP diff --git a/src/mame/drivers/bfmsys85.cpp b/src/mame/drivers/bfmsys85.cpp index 7933bc6866d..d41c9523d39 100644 --- a/src/mame/drivers/bfmsys85.cpp +++ b/src/mame/drivers/bfmsys85.cpp @@ -373,11 +373,8 @@ static ADDRESS_MAP_START( memmap, AS_PROGRAM, 8, bfmsys85_state ) AM_RANGE(0x3001, 0x3001) AM_READNOP //sound latch AM_RANGE(0x3200, 0x3200) AM_DEVWRITE("aysnd", ay8910_device, address_w) - AM_RANGE(0x3402, 0x3402) AM_DEVWRITE("acia6850_0", acia6850_device, control_w) - AM_RANGE(0x3403, 0x3403) AM_DEVWRITE("acia6850_0", acia6850_device, data_w) - - AM_RANGE(0x3406, 0x3406) AM_DEVREAD("acia6850_0", acia6850_device, status_r) - AM_RANGE(0x3407, 0x3407) AM_DEVREAD("acia6850_0", acia6850_device, data_r) + AM_RANGE(0x3402, 0x3403) AM_DEVWRITE("acia6850_0", acia6850_device, write) + AM_RANGE(0x3406, 0x3407) AM_DEVREAD("acia6850_0", acia6850_device, read) AM_RANGE(0x3600, 0x3600) AM_WRITE(mux_enable_w) // mux enable diff --git a/src/mame/drivers/blockhl.cpp b/src/mame/drivers/blockhl.cpp index 3d53d8a2f5a..1aa28bc2aa9 100644 --- a/src/mame/drivers/blockhl.cpp +++ b/src/mame/drivers/blockhl.cpp @@ -279,8 +279,8 @@ static MACHINE_CONFIG_START( blockhl ) MCFG_DEVICE_ADD("bank5800", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank5800_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(12) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(12) MCFG_ADDRESS_MAP_BANK_STRIDE(0x0800) MCFG_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz) diff --git a/src/mame/drivers/bml3.cpp b/src/mame/drivers/bml3.cpp index 18ac954bf63..60f48b3df09 100644 --- a/src/mame/drivers/bml3.cpp +++ b/src/mame/drivers/bml3.cpp @@ -401,8 +401,7 @@ static ADDRESS_MAP_START(bml3_mem, AS_PROGRAM, 8, bml3_state) AM_RANGE(0x4400, 0x9fff) AM_RAM AM_RANGE(0xff40, 0xff46) AM_NOP // lots of unknown reads and writes AM_RANGE(0xffc0, 0xffc3) AM_DEVREADWRITE("pia", pia6821_device, read, write) - AM_RANGE(0xffc4, 0xffc4) AM_DEVREADWRITE("acia", acia6850_device, status_r, control_w) - AM_RANGE(0xffc5, 0xffc5) AM_DEVREADWRITE("acia", acia6850_device, data_r, data_w) + AM_RANGE(0xffc4, 0xffc5) AM_DEVREADWRITE("acia", acia6850_device, read, write) AM_RANGE(0xffc6, 0xffc7) AM_READWRITE(bml3_6845_r,bml3_6845_w) // KBNMI - Keyboard "Break" key non-maskable interrupt AM_RANGE(0xffc8, 0xffc8) AM_READ(bml3_keyb_nmi_r) // keyboard nmi diff --git a/src/mame/drivers/bwing.cpp b/src/mame/drivers/bwing.cpp index 26226d1cb7b..270a84903f0 100644 --- a/src/mame/drivers/bwing.cpp +++ b/src/mame/drivers/bwing.cpp @@ -377,8 +377,8 @@ static MACHINE_CONFIG_START( bwing ) MCFG_DEVICE_ADD("vrambank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(15) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(15) MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000) // video hardware diff --git a/src/mame/drivers/calomega.cpp b/src/mame/drivers/calomega.cpp index ce4405dc98d..142048db837 100644 --- a/src/mame/drivers/calomega.cpp +++ b/src/mame/drivers/calomega.cpp @@ -830,8 +830,7 @@ static ADDRESS_MAP_START( sys903_map, AS_PROGRAM, 8, calomega_state ) AM_RANGE(0x0881, 0x0881) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w) AM_RANGE(0x08c4, 0x08c7) AM_DEVREADWRITE("pia0", pia6821_device, read, write) AM_RANGE(0x08c8, 0x08cb) AM_DEVREADWRITE("pia1", pia6821_device, read, write) - AM_RANGE(0x08d0, 0x08d0) AM_DEVREADWRITE("acia6850_0", acia6850_device, status_r, control_w) - AM_RANGE(0x08d1, 0x08d1) AM_DEVREADWRITE("acia6850_0", acia6850_device, data_r, data_w) + AM_RANGE(0x08d0, 0x08d1) AM_DEVREADWRITE("acia6850_0", acia6850_device, read, write) AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(calomega_videoram_w) AM_SHARE("videoram") AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(calomega_colorram_w) AM_SHARE("colorram") AM_RANGE(0x1800, 0x3fff) AM_ROM diff --git a/src/mame/drivers/cedar_magnet.cpp b/src/mame/drivers/cedar_magnet.cpp index c5cdfb8720e..a9d44f52dd2 100644 --- a/src/mame/drivers/cedar_magnet.cpp +++ b/src/mame/drivers/cedar_magnet.cpp @@ -765,22 +765,22 @@ static MACHINE_CONFIG_START( cedar_magnet ) MCFG_DEVICE_ADD("bank0", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(cedar_bank0) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(18) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(18) MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000) MCFG_DEVICE_ADD("mb_sub_ram", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(cedar_magnet_mainboard_sub_ram_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(18) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(18) MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000) MCFG_DEVICE_ADD("mb_sub_pal", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(cedar_magnet_mainboard_sub_pal_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(8+6) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(8+6) MCFG_ADDRESS_MAP_BANK_STRIDE(0x100) MCFG_DEVICE_ADD("z80pio_ic48", Z80PIO, 4000000/2) diff --git a/src/mame/drivers/chqflag.cpp b/src/mame/drivers/chqflag.cpp index 397f95737b0..23fa7862807 100644 --- a/src/mame/drivers/chqflag.cpp +++ b/src/mame/drivers/chqflag.cpp @@ -332,8 +332,8 @@ static MACHINE_CONFIG_START( chqflag ) MCFG_DEVICE_ADD("bank1000", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank1000_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(13) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(13) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000) MCFG_QUANTUM_TIME(attotime::from_hz(600)) diff --git a/src/mame/drivers/clcd.cpp b/src/mame/drivers/clcd.cpp index 5ac1b9124fd..207da3b035e 100644 --- a/src/mame/drivers/clcd.cpp +++ b/src/mame/drivers/clcd.cpp @@ -771,25 +771,25 @@ static MACHINE_CONFIG_START(clcd) MCFG_DEVICE_ADD("bank1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(clcd_banked_mem) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x400) MCFG_DEVICE_ADD("bank2", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(clcd_banked_mem) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x400) MCFG_DEVICE_ADD("bank3", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(clcd_banked_mem) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x400) MCFG_DEVICE_ADD("bank4", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(clcd_banked_mem) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x400) MCFG_DEVICE_ADD("rtc", MSM58321, XTAL_32_768kHz) diff --git a/src/mame/drivers/cmi.cpp b/src/mame/drivers/cmi.cpp index 32bb6a385c9..19a268bf5bd 100644 --- a/src/mame/drivers/cmi.cpp +++ b/src/mame/drivers/cmi.cpp @@ -1081,10 +1081,8 @@ static ADDRESS_MAP_START( muskeys_map, AS_PROGRAM, 8, cmi_state) AM_RANGE(0x0000, 0x007f) AM_RAM AM_RANGE(0x0080, 0x0083) AM_DEVREADWRITE("cmi10_pia_u21", pia6821_device, read, write) AM_RANGE(0x0090, 0x0093) AM_DEVREADWRITE("cmi10_pia_u20", pia6821_device, read, write) - AM_RANGE(0x00a0, 0x00a0) AM_DEVREADWRITE("acia_mkbd_kbd", acia6850_device, status_r, control_w) - AM_RANGE(0x00a1, 0x00a1) AM_DEVREADWRITE("acia_mkbd_kbd", acia6850_device, data_r, data_w) - AM_RANGE(0x00b0, 0x00b0) AM_DEVREADWRITE("acia_mkbd_cmi", acia6850_device, status_r, control_w) - AM_RANGE(0x00b1, 0x00b1) AM_DEVREADWRITE("acia_mkbd_cmi", acia6850_device, data_r, data_w) + AM_RANGE(0x00a0, 0x00a1) AM_DEVREADWRITE("acia_mkbd_kbd", acia6850_device, read, write) + AM_RANGE(0x00b0, 0x00b1) AM_DEVREADWRITE("acia_mkbd_cmi", acia6850_device, read, write) AM_RANGE(0x4000, 0x47ff) AM_RAM AM_RANGE(0xb000, 0xb400) AM_ROM AM_RANGE(0xf000, 0xffff) AM_ROM diff --git a/src/mame/drivers/coco12.cpp b/src/mame/drivers/coco12.cpp index a80a202b6bb..fe89a51b5fa 100644 --- a/src/mame/drivers/coco12.cpp +++ b/src/mame/drivers/coco12.cpp @@ -407,8 +407,8 @@ MACHINE_CONFIG_START( coco_floating ) MCFG_DEVICE_ADD(FLOATING_TAG, ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(coco_floating_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(16) MACHINE_CONFIG_END diff --git a/src/mame/drivers/coolridr.cpp b/src/mame/drivers/coolridr.cpp index da086c8a82d..4fdeb9a63a0 100644 --- a/src/mame/drivers/coolridr.cpp +++ b/src/mame/drivers/coolridr.cpp @@ -468,21 +468,26 @@ public: struct cool_render_object { - uint8_t* indirect_tiles; - uint32_t* indirect_zoom; + cool_render_object(coolridr_state &s) : state(s), colbase(s.m_colbase) + { + std::copy(std::begin(s.m_spriteblit), std::end(s.m_spriteblit), std::begin(spriteblit)); + } + + std::unique_ptr<uint8_t []> indirect_tiles; + std::unique_ptr<uint32_t []> indirect_zoom; uint32_t spriteblit[12]; - bitmap_ind16* drawbitmap; - //bitmap_ind16* zbitmap; - uint16_t zpri; - uint8_t blittype; - coolridr_state* state; + bitmap_ind16* drawbitmap = nullptr; + //bitmap_ind16* zbitmap = nullptr; + uint16_t zpri = 0; + uint8_t blittype = 0; + coolridr_state& state; uint32_t clipvals[3]; - int screen; + int screen = 0; int colbase; }; - struct cool_render_object **m_cool_render_object_list1; - struct cool_render_object **m_cool_render_object_list2; + std::unique_ptr<std::unique_ptr<cool_render_object> []> m_cool_render_object_list1; + std::unique_ptr<std::unique_ptr<cool_render_object> []> m_cool_render_object_list2; int m_listcount1; int m_listcount2; @@ -1020,11 +1025,11 @@ uint32_t coolridr_state::screen_update_coolridr2(screen_device &screen, bitmap_i } \ if (!indirect_tile_enable && size < DECODECACHE_NUMSPRITETILES) \ { \ - object->state->decode[screen].objcache[use_object].tiles[v*used_hCellCount + h].tempshape_multi_decoded = true; \ + object->state.decode[screen].objcache[use_object].tiles[v*used_hCellCount + h].tempshape_multi_decoded = true; \ if (blankcount==0) \ - object->state->decode[screen].objcache[use_object].tiles[v*used_hCellCount + h].is_blank = true; \ + object->state.decode[screen].objcache[use_object].tiles[v*used_hCellCount + h].is_blank = true; \ else \ - object->state->decode[screen].objcache[use_object].tiles[v*used_hCellCount + h].is_blank = false; \ + object->state.decode[screen].objcache[use_object].tiles[v*used_hCellCount + h].is_blank = false; \ /* if (object->screen==0) printf("marking offset %04x as decoded (sprite number %08x ptr %08x)\n", v*used_hCellCount + h, spriteNumber, ((uint64_t)(void*)tempshape)&0xffffffff);*/ \ } \ } \ @@ -1055,7 +1060,7 @@ uint32_t coolridr_state::screen_update_coolridr2(screen_device &screen, bitmap_i } \ if (!indirect_tile_enable && size < DECODECACHE_NUMSPRITETILES) \ { \ - if (object->state->decode[screen].objcache[use_object].tiles[v*used_hCellCount + h].is_blank == true) \ + if (object->state.decode[screen].objcache[use_object].tiles[v*used_hCellCount + h].is_blank == true) \ continue; \ } \ else \ @@ -1292,7 +1297,7 @@ TODO: fix anything that isn't text. void *coolridr_state::draw_object_threaded(void *param, int threadid) { - cool_render_object *object = reinterpret_cast<cool_render_object *>(param); + const std::unique_ptr<cool_render_object> object(reinterpret_cast<cool_render_object *>(param)); bitmap_ind16* drawbitmap = object->drawbitmap; /************* object->spriteblit[3] *************/ @@ -1317,8 +1322,8 @@ void *coolridr_state::draw_object_threaded(void *param, int threadid) - uint16_t* rearranged_16bit_gfx = object->state->m_rearranged_16bit_gfx.get(); - uint16_t* expanded_10bit_gfx = object->state->m_expanded_10bit_gfx.get(); + uint16_t* rearranged_16bit_gfx = object->state.m_rearranged_16bit_gfx.get(); + uint16_t* expanded_10bit_gfx = object->state.m_expanded_10bit_gfx.get(); int16_t clipminX = CLIPMINX_FULL; int16_t clipmaxX = CLIPMAXX_FULL; @@ -1338,7 +1343,7 @@ void *coolridr_state::draw_object_threaded(void *param, int threadid) if (b1mode) { - // b1colorNumber = object->state->machine().rand()&0xfff; + // b1colorNumber = object->state.machine().rand()&0xfff; } /************* object->spriteblit[3] *************/ @@ -1410,9 +1415,9 @@ void *coolridr_state::draw_object_threaded(void *param, int threadid) // note the road always has 0x8000 bit set in the palette. I *think* this is because they do a gradual blend of some kind between the road types // see the number of transitional road bits which have various values above set - if (blit4blendlevel==object->state->debug_randompal) + if (blit4blendlevel==object->state.debug_randompal) { - b1colorNumber = object->state->machine().rand()&0xfff; + b1colorNumber = object->state.machine().rand()&0xfff; } @@ -1439,18 +1444,7 @@ void *coolridr_state::draw_object_threaded(void *param, int threadid) // if we have no vertical zoom value there's no point in going any further // because there are no known vertical indirect modes if (!vZoom) - { - // abort, but make sure we clean up - if (object->indirect_tiles) - free(object->indirect_tiles); - - if (object->indirect_zoom) - free(object->indirect_zoom); - - free (object); - return nullptr; - } /************* object->spriteblit[9] *************/ @@ -1781,7 +1775,7 @@ void *coolridr_state::draw_object_threaded(void *param, int threadid) if (clipminY>clipmaxY) clipminY = clipmaxY; - //b1colorNumber = object->state->machine().rand()&0xfff; + //b1colorNumber = object->state.machine().rand()&0xfff; } /* DRAW */ @@ -1820,16 +1814,16 @@ void *coolridr_state::draw_object_threaded(void *param, int threadid) for (int k=0;k<DECODECACHE_NUMOBJECTCACHES;k++) { - if(((object->state->decode[screen].objcache[k].lastromoffset == b3romoffset)) && - ((object->state->decode[screen].objcache[k].lastused_flipx == used_flipx)) && - ((object->state->decode[screen].objcache[k].lastused_flipy == used_flipy)) && - ((object->state->decode[screen].objcache[k].lastblit_rotate == blit_rotate)) && - ((object->state->decode[screen].objcache[k].lastb1mode == b1mode)) && - ((object->state->decode[screen].objcache[k].lastb1colorNumber == b1colorNumber)) && - ((object->state->decode[screen].objcache[k].lastb2colorNumber == b2colorNumber)) && - ((object->state->decode[screen].objcache[k].lastused_hCellCount == used_hCellCount)) && - ((object->state->decode[screen].objcache[k].lastused_vCellCount == used_vCellCount)) && - ((object->state->decode[screen].objcache[k].lastb2altpenmask == b2altpenmask))) + if(((object->state.decode[screen].objcache[k].lastromoffset == b3romoffset)) && + ((object->state.decode[screen].objcache[k].lastused_flipx == used_flipx)) && + ((object->state.decode[screen].objcache[k].lastused_flipy == used_flipy)) && + ((object->state.decode[screen].objcache[k].lastblit_rotate == blit_rotate)) && + ((object->state.decode[screen].objcache[k].lastb1mode == b1mode)) && + ((object->state.decode[screen].objcache[k].lastb1colorNumber == b1colorNumber)) && + ((object->state.decode[screen].objcache[k].lastb2colorNumber == b2colorNumber)) && + ((object->state.decode[screen].objcache[k].lastused_hCellCount == used_hCellCount)) && + ((object->state.decode[screen].objcache[k].lastused_vCellCount == used_vCellCount)) && + ((object->state.decode[screen].objcache[k].lastb2altpenmask == b2altpenmask))) { found = k; break; @@ -1838,32 +1832,32 @@ void *coolridr_state::draw_object_threaded(void *param, int threadid) if (found != -1) { - object->state->decode[screen].objcache[found].repeatcount++; + object->state.decode[screen].objcache[found].repeatcount++; use_object = found; } else { - use_object = object->state->decode[screen].current_object; + use_object = object->state.decode[screen].current_object; // dirty the cache for (int i=0;i<DECODECACHE_NUMSPRITETILES;i++) - object->state->decode[screen].objcache[use_object].tiles[i].tempshape_multi_decoded = false; - - object->state->decode[screen].objcache[use_object].lastromoffset = b3romoffset; - object->state->decode[screen].objcache[use_object].lastused_flipx = used_flipx; - object->state->decode[screen].objcache[use_object].lastused_flipy = used_flipy; - object->state->decode[screen].objcache[use_object].lastblit_rotate = blit_rotate; - object->state->decode[screen].objcache[use_object].lastb1mode = b1mode; - object->state->decode[screen].objcache[use_object].lastb1colorNumber = b1colorNumber; - object->state->decode[screen].objcache[use_object].lastb2colorNumber = b2colorNumber; - object->state->decode[screen].objcache[use_object].lastused_hCellCount = used_hCellCount; - object->state->decode[screen].objcache[use_object].lastused_vCellCount = used_vCellCount; - object->state->decode[screen].objcache[use_object].lastb2altpenmask = b2altpenmask; - object->state->decode[screen].objcache[use_object].repeatcount = 0; - - object->state->decode[screen].current_object++; - if (object->state->decode[screen].current_object >= DECODECACHE_NUMOBJECTCACHES) - object->state->decode[screen].current_object = 0; + object->state.decode[screen].objcache[use_object].tiles[i].tempshape_multi_decoded = false; + + object->state.decode[screen].objcache[use_object].lastromoffset = b3romoffset; + object->state.decode[screen].objcache[use_object].lastused_flipx = used_flipx; + object->state.decode[screen].objcache[use_object].lastused_flipy = used_flipy; + object->state.decode[screen].objcache[use_object].lastblit_rotate = blit_rotate; + object->state.decode[screen].objcache[use_object].lastb1mode = b1mode; + object->state.decode[screen].objcache[use_object].lastb1colorNumber = b1colorNumber; + object->state.decode[screen].objcache[use_object].lastb2colorNumber = b2colorNumber; + object->state.decode[screen].objcache[use_object].lastused_hCellCount = used_hCellCount; + object->state.decode[screen].objcache[use_object].lastused_vCellCount = used_vCellCount; + object->state.decode[screen].objcache[use_object].lastb2altpenmask = b2altpenmask; + object->state.decode[screen].objcache[use_object].repeatcount = 0; + + object->state.decode[screen].current_object++; + if (object->state.decode[screen].current_object >= DECODECACHE_NUMOBJECTCACHES) + object->state.decode[screen].current_object = 0; } } @@ -1957,8 +1951,8 @@ void *coolridr_state::draw_object_threaded(void *param, int threadid) if (!indirect_tile_enable && size < DECODECACHE_NUMSPRITETILES) { - tempshape = object->state->decode[screen].objcache[use_object].tiles[v*used_hCellCount + h].tempshape_multi; - current_decoded = object->state->decode[screen].objcache[use_object].tiles[v*used_hCellCount + h].tempshape_multi_decoded; + tempshape = object->state.decode[screen].objcache[use_object].tiles[v*used_hCellCount + h].tempshape_multi; + current_decoded = object->state.decode[screen].objcache[use_object].tiles[v*used_hCellCount + h].tempshape_multi_decoded; /* if (object->screen==0) { @@ -1970,7 +1964,7 @@ void *coolridr_state::draw_object_threaded(void *param, int threadid) else { //if (object->screen==0) printf("using base tempshape\n"); - tempshape = object->state->decode[screen].tempshape; + tempshape = object->state.decode[screen].tempshape; } @@ -2127,14 +2121,6 @@ void *coolridr_state::draw_object_threaded(void *param, int threadid) end: - if (object->indirect_tiles) - free(object->indirect_tiles); - - if (object->indirect_zoom) - free(object->indirect_zoom); - - free (object); - return nullptr; } @@ -2239,13 +2225,7 @@ void coolridr_state::blit_current_sprite(address_space &space) return; } - cool_render_object* testobject = (cool_render_object *)malloc(sizeof(cool_render_object)); - - testobject->state = this; - testobject->colbase = m_colbase; - - for (int i=0;i<12;i++) - testobject->spriteblit[i] = m_spriteblit[i]; + std::unique_ptr<cool_render_object> testobject(new cool_render_object(*this)); // cache some values that are looked up from RAM to be safe.. alternatively we could stall the rendering if they get written to, but they're a direct memory pointer.. int test_indirect_tile_enable = (m_spriteblit[5] & 0x00010000)>>16; @@ -2256,7 +2236,7 @@ void coolridr_state::blit_current_sprite(address_space &space) uint16_t test_hCellCount = (m_spriteblit[6] & 0x00003ff); uint16_t test_vCellCount = (m_spriteblit[6] & 0x03ff0000) >> 16; int bytes = test_vCellCount*test_hCellCount; - testobject->indirect_tiles = (uint8_t*)malloc(bytes); + testobject->indirect_tiles = std::make_unique<uint8_t []>(bytes); for (int i=0;i<bytes;i++) { testobject->indirect_tiles[i] = space.read_byte(test_textlookup + i); @@ -2273,7 +2253,7 @@ void coolridr_state::blit_current_sprite(address_space &space) uint32_t test_blit10 = m_spriteblit[10]; uint16_t test_vCellCount = (m_spriteblit[6] & 0x03ff0000) >> 16; int bytes = test_vCellCount * 4 * 16; - testobject->indirect_zoom = (uint32_t*)malloc(bytes); + testobject->indirect_zoom = std::make_unique<uint32_t []>(bytes/4); for (int i=0;i<bytes/4;i++) { testobject->indirect_zoom[i] = space.read_dword(test_blit10 + i*4); @@ -2320,11 +2300,11 @@ void coolridr_state::blit_current_sprite(address_space &space) #if 0 if (m_usethreads) { - osd_work_item_queue(queue, draw_object_threaded, testobject, WORK_ITEM_FLAG_AUTO_RELEASE); + osd_work_item_queue(queue, draw_object_threaded, testobject.release(), WORK_ITEM_FLAG_AUTO_RELEASE); } else { - draw_object_threaded((void*)testobject,0); + draw_object_threaded(testobject.release(), 0); } #else @@ -2332,7 +2312,7 @@ void coolridr_state::blit_current_sprite(address_space &space) { if (m_listcount1<1000000) { - m_cool_render_object_list1[m_listcount1] = testobject; + m_cool_render_object_list1[m_listcount1] = std::move(testobject); m_listcount1++; } else @@ -2344,7 +2324,7 @@ void coolridr_state::blit_current_sprite(address_space &space) { if (m_listcount2<1000000) { - m_cool_render_object_list2[m_listcount2] = testobject; + m_cool_render_object_list2[m_listcount2] = std::move(testobject); m_listcount2++; } else @@ -2587,16 +2567,12 @@ WRITE32_MEMBER(coolridr_state::sysh1_fb_data_w) m_clipblitterMode[0] = 0xff; /* bubble sort, might be something better to use instead */ - for (int pass = 0 ; pass < ( m_listcount1 - 1 ); pass++) + for (int pass = 0 ; pass < (m_listcount1 - 1); pass++) { for (int elem2 = 0 ; elem2 < m_listcount1 - pass - 1; elem2++) { if (m_cool_render_object_list1[elem2]->zpri > m_cool_render_object_list1[elem2+1]->zpri) - { - cool_render_object* temp = m_cool_render_object_list1[elem2]; - m_cool_render_object_list1[elem2] = m_cool_render_object_list1[elem2+1]; - m_cool_render_object_list1[elem2+1] = temp; - } + std::swap(m_cool_render_object_list1[elem2], m_cool_render_object_list1[elem2+1]); } } @@ -2604,11 +2580,11 @@ WRITE32_MEMBER(coolridr_state::sysh1_fb_data_w) { if (m_usethreads) { - osd_work_item_queue(m_work_queue[0], draw_object_threaded, m_cool_render_object_list1[i], WORK_ITEM_FLAG_AUTO_RELEASE); + osd_work_item_queue(m_work_queue[0], draw_object_threaded, m_cool_render_object_list1[i].release(), WORK_ITEM_FLAG_AUTO_RELEASE); } else { - draw_object_threaded((void*)m_cool_render_object_list1[i],0); + draw_object_threaded((void*)m_cool_render_object_list1[i].release(), 0); } } @@ -2638,17 +2614,13 @@ WRITE32_MEMBER(coolridr_state::sysh1_fb_data_w) m_clipvals[1][2] = 0; m_clipblitterMode[1] = 0xff; - /* bubble sort, might be something better to use instead */ - for (int pass = 0 ; pass < ( m_listcount2 - 1 ); pass++) + /* bubble sort, might be something better to use instead */ + for (int pass = 0 ; pass < (m_listcount2 - 1); pass++) { for (int elem2 = 0 ; elem2 < m_listcount2 - pass - 1; elem2++) { if (m_cool_render_object_list2[elem2]->zpri > m_cool_render_object_list2[elem2+1]->zpri) - { - cool_render_object* temp = m_cool_render_object_list2[elem2]; - m_cool_render_object_list2[elem2] = m_cool_render_object_list2[elem2+1]; - m_cool_render_object_list2[elem2+1] = temp; - } + std::swap(m_cool_render_object_list2[elem2], m_cool_render_object_list2[elem2+1]); } } @@ -2656,11 +2628,11 @@ WRITE32_MEMBER(coolridr_state::sysh1_fb_data_w) { if (m_usethreads) { - osd_work_item_queue(m_work_queue[1], draw_object_threaded, m_cool_render_object_list2[i], WORK_ITEM_FLAG_AUTO_RELEASE); + osd_work_item_queue(m_work_queue[1], draw_object_threaded, m_cool_render_object_list2[i].release(), WORK_ITEM_FLAG_AUTO_RELEASE); } else { - draw_object_threaded((void*)m_cool_render_object_list2[i],0); + draw_object_threaded((void*)m_cool_render_object_list2[i].release(), 0); } } @@ -3666,10 +3638,10 @@ void coolridr_state::machine_start() m_h1_pcg = make_unique_clear<uint8_t[]>(VRAM_SIZE); m_h1_pal = make_unique_clear<uint16_t[]>(VRAM_SIZE); - m_cool_render_object_list1 = auto_alloc_array_clear(machine(), struct cool_render_object*, 1000000); + m_cool_render_object_list1 = std::make_unique<std::unique_ptr<cool_render_object> []>(1000000); m_listcount1 = 0; - m_cool_render_object_list2 = auto_alloc_array_clear(machine(), struct cool_render_object*, 1000000); + m_cool_render_object_list2 = std::make_unique<std::unique_ptr<cool_render_object> []>(1000000); m_listcount2 = 0; m_work_queue[0] = osd_work_queue_alloc(WORK_QUEUE_FLAG_HIGH_FREQ); diff --git a/src/mame/drivers/crgolf.cpp b/src/mame/drivers/crgolf.cpp index df13beed76e..4c5d45d7f80 100644 --- a/src/mame/drivers/crgolf.cpp +++ b/src/mame/drivers/crgolf.cpp @@ -536,8 +536,8 @@ static MACHINE_CONFIG_START( crgolf ) MCFG_DEVICE_ADD("vrambank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vrambank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000) /* technically 0x6000, but powers of 2 makes the memory map / address masking cleaner. */ MCFG_PALETTE_ADD("palette", 0x20) diff --git a/src/mame/drivers/crimfght.cpp b/src/mame/drivers/crimfght.cpp index ed3e8cf900c..b9da7dfa178 100644 --- a/src/mame/drivers/crimfght.cpp +++ b/src/mame/drivers/crimfght.cpp @@ -311,8 +311,8 @@ static MACHINE_CONFIG_START( crimfght ) MCFG_DEVICE_ADD("bank0000", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank0000_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(11) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(11) MCFG_ADDRESS_MAP_BANK_STRIDE(0x400) MCFG_WATCHDOG_ADD("watchdog") diff --git a/src/mame/drivers/cubo.cpp b/src/mame/drivers/cubo.cpp index a5f10ffcbfe..16dc1625f2c 100644 --- a/src/mame/drivers/cubo.cpp +++ b/src/mame/drivers/cubo.cpp @@ -1033,8 +1033,8 @@ static MACHINE_CONFIG_START( cubo ) MCFG_DEVICE_ADD("overlay", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(overlay_2mb_map32) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(22) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(22) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200000) MCFG_I2CMEM_ADD("i2cmem") diff --git a/src/mame/drivers/cultures.cpp b/src/mame/drivers/cultures.cpp index 0cf708fa830..57af8705e75 100644 --- a/src/mame/drivers/cultures.cpp +++ b/src/mame/drivers/cultures.cpp @@ -405,8 +405,8 @@ static MACHINE_CONFIG_START( cultures ) MCFG_DEVICE_ADD("vrambank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vrambank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(15) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(15) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) diff --git a/src/mame/drivers/datum.cpp b/src/mame/drivers/datum.cpp index aee05bd229b..4525617cc4c 100644 --- a/src/mame/drivers/datum.cpp +++ b/src/mame/drivers/datum.cpp @@ -84,8 +84,7 @@ static ADDRESS_MAP_START(datum_mem, AS_PROGRAM, 8, datum_state) ADDRESS_MAP_GLOBAL_MASK (0x7fff) // A15 not used AM_RANGE(0x0000, 0x007f) AM_RAM // inside CPU AM_RANGE(0x1000, 0x13ff) AM_MIRROR(0x0c00) AM_RAM // main ram 2x 2114 - AM_RANGE(0x4000, 0x4000) AM_MIRROR(0x0ffe) AM_DEVREADWRITE("acia", acia6850_device, status_r, control_w) - AM_RANGE(0x4001, 0x4001) AM_MIRROR(0x0ffe) AM_DEVREADWRITE("acia", acia6850_device, data_r, data_w) + AM_RANGE(0x4000, 0x4001) AM_MIRROR(0x0ffe) AM_DEVREADWRITE("acia", acia6850_device, read, write) AM_RANGE(0x5000, 0x5003) AM_MIRROR(0x0ffc) AM_DEVREADWRITE("pia2", pia6821_device, read, write) AM_RANGE(0x6000, 0x6003) AM_MIRROR(0x0ffc) AM_DEVREADWRITE("pia1", pia6821_device, read, write) AM_RANGE(0x7000, 0x77ff) AM_MIRROR(0x0800) AM_ROM AM_REGION("roms", 0) diff --git a/src/mame/drivers/ddenlovr.cpp b/src/mame/drivers/ddenlovr.cpp index 5ebb9394feb..1129d1aef94 100644 --- a/src/mame/drivers/ddenlovr.cpp +++ b/src/mame/drivers/ddenlovr.cpp @@ -4273,8 +4273,8 @@ static MACHINE_CONFIG_START( htengoku ) MCFG_DEVICE_ADD("bankdev", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(htengoku_banked_map) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(20) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20) MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000) MCFG_MACHINE_START_OVERRIDE(ddenlovr_state,dynax) diff --git a/src/mame/drivers/dec0.cpp b/src/mame/drivers/dec0.cpp index a6ffb9f21ba..82e09f425dd 100644 --- a/src/mame/drivers/dec0.cpp +++ b/src/mame/drivers/dec0.cpp @@ -1969,15 +1969,15 @@ static MACHINE_CONFIG_DERIVED( slyspy, dec1 ) MCFG_DEVICE_ADD("pfprotect", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(slyspy_protection_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(18) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(18) MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000) MCFG_DEVICE_ADD("sndprotect", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(slyspy_sound_protection_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(21) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(21) MCFG_ADDRESS_MAP_BANK_STRIDE(0x80000) diff --git a/src/mame/drivers/deco_ld.cpp b/src/mame/drivers/deco_ld.cpp index 7a62b86dfb5..7fb5db179cd 100644 --- a/src/mame/drivers/deco_ld.cpp +++ b/src/mame/drivers/deco_ld.cpp @@ -274,8 +274,7 @@ static ADDRESS_MAP_START( rblaster_map, AS_PROGRAM, 8, deco_ld_state ) AM_RANGE(0x1003, 0x1003) AM_READ_PORT("IN1") AM_RANGE(0x1004, 0x1004) AM_DEVREAD("soundlatch2", generic_latch_8_device, read) AM_WRITE(decold_sound_cmd_w) AM_RANGE(0x1005, 0x1005) AM_READ(sound_status_r) - //AM_RANGE(0x1006, 0x1006) AM_DEVREADWRITE("acia", acia6850_device, status_r, control_w) - //AM_RANGE(0x1007, 0x1007) AM_DEVREADWRITE("acia", acia6850_device, data_r, data_w) + //AM_RANGE(0x1006, 0x1007) AM_DEVREADWRITE("acia", acia6850_device, read, write) AM_RANGE(0x1006, 0x1006) AM_READ(acia_status_hack_r) AM_RANGE(0x1007, 0x1007) AM_DEVREADWRITE("laserdisc", sony_ldp1000_device, status_r, command_w) AM_RANGE(0x1800, 0x1fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") diff --git a/src/mame/drivers/didact.cpp b/src/mame/drivers/didact.cpp index 4e83b8f2e6b..7258d24df52 100644 --- a/src/mame/drivers/didact.cpp +++ b/src/mame/drivers/didact.cpp @@ -1049,10 +1049,7 @@ READ8_MEMBER( can09t_state::read ) { case X0XX: // ACIA LOGPLA("-- ACIA\n"); - if (offset & 1) - byte = m_acia->data_r(space, 0); - else - byte = m_acia->status_r(space, 0); + byte = m_acia->read(space, offset & 1); break; case X1XX: // SYSPIA LOGPLA("-- SYSPIA\n"); @@ -1134,10 +1131,7 @@ WRITE8_MEMBER( can09t_state::write ) { case X0XX: // ACIA LOGPLA("-- ACIA\n"); - if (offset & 1) - m_acia->data_w(space, 0, data); - else - m_acia->control_w(space, 0, data); + m_acia->write(space, offset & 1, data); break; case X1XX: // SYSPIA LOGPLA("-- SYSPIA\n"); @@ -1393,8 +1387,7 @@ static ADDRESS_MAP_START( can09_map, AS_PROGRAM, 8, can09_state ) AM_RANGE(0xe034, 0xe037) AM_DEVREADWRITE(PIA1_TAG, pia6821_device, read, write) #if 0 - AM_RANGE(0xb100, 0xb100) AM_DEVREADWRITE("acia", acia6850_device, status_r, control_w) - AM_RANGE(0xb101, 0xb101) AM_DEVREADWRITE("acia", acia6850_device, data_r, data_w) + AM_RANGE(0xb100, 0xb101) AM_DEVREADWRITE("acia", acia6850_device, read, write) AM_RANGE(0xb110, 0xb113) AM_DEVREADWRITE(PIA1_TAG, pia6821_device, read_alt, write_alt) AM_RANGE(0xb120, 0xb123) AM_DEVREADWRITE(PIA2_TAG, pia6821_device, read_alt, write_alt) AM_RANGE(0xb130, 0xb137) AM_DEVREADWRITE("ptm", ptm6840_device, read, write) diff --git a/src/mame/drivers/discoboy.cpp b/src/mame/drivers/discoboy.cpp index 6bf30e5ad3d..96e4e596a88 100644 --- a/src/mame/drivers/discoboy.cpp +++ b/src/mame/drivers/discoboy.cpp @@ -457,8 +457,8 @@ static MACHINE_CONFIG_START( discoboy ) MCFG_DEVICE_ADD("rambank1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(rambank1_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(13) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(13) MCFG_ADDRESS_MAP_BANK_STRIDE(0x800) /* video hardware */ diff --git a/src/mame/drivers/dynax.cpp b/src/mame/drivers/dynax.cpp index 06e77fc2181..dc4ec3aef85 100644 --- a/src/mame/drivers/dynax.cpp +++ b/src/mame/drivers/dynax.cpp @@ -4300,8 +4300,8 @@ static MACHINE_CONFIG_START( hnoridur ) MCFG_DEVICE_ADD("bankdev", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(hnoridur_banked_map) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(20) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20) MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000) MCFG_NVRAM_ADD_0FILL("nvram") @@ -4363,8 +4363,8 @@ static MACHINE_CONFIG_START( hjingi ) MCFG_DEVICE_ADD("bankdev", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(hjingi_banked_map) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(20) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20) MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000) MCFG_NVRAM_ADD_0FILL("nvram") @@ -4569,7 +4569,7 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( mjangels, yarunara ) MCFG_DEVICE_MODIFY("bankdev") MCFG_DEVICE_PROGRAM_MAP(mjangels_banked_map) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(21) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(21) MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( quiztvqq, mjangels ) @@ -4805,8 +4805,8 @@ static MACHINE_CONFIG_START( tenkai ) MCFG_DEVICE_ADD("bankdev", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(tenkai_banked_map) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(20) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20) MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000) MCFG_MACHINE_START_OVERRIDE(dynax_state,dynax) @@ -4877,8 +4877,8 @@ static MACHINE_CONFIG_START( gekisha ) MCFG_DEVICE_ADD("bankdev", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(gekisha_banked_map) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(17) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(17) MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000) MCFG_MACHINE_START_OVERRIDE(dynax_state,dynax) diff --git a/src/mame/drivers/ec65.cpp b/src/mame/drivers/ec65.cpp index 2fcafbf67fe..cbd2865f5d1 100644 --- a/src/mame/drivers/ec65.cpp +++ b/src/mame/drivers/ec65.cpp @@ -67,8 +67,7 @@ static ADDRESS_MAP_START(ec65_mem, AS_PROGRAM, 8, ec65_state) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x0000, 0xdfff) AM_RAM AM_RANGE(0xe000, 0xe003) AM_DEVREADWRITE(PIA6821_TAG, pia6821_device, read, write) - AM_RANGE(0xe010, 0xe010) AM_DEVREADWRITE(ACIA6850_TAG, acia6850_device, status_r, control_w) - AM_RANGE(0xe011, 0xe011) AM_DEVREADWRITE(ACIA6850_TAG, acia6850_device, data_r, data_w) + AM_RANGE(0xe010, 0xe011) AM_DEVREADWRITE(ACIA6850_TAG, acia6850_device, read, write) AM_RANGE(0xe100, 0xe10f) AM_DEVREADWRITE(VIA6522_0_TAG, via6522_device, read, write) AM_RANGE(0xe110, 0xe11f) AM_DEVREADWRITE(VIA6522_1_TAG, via6522_device, read, write) AM_RANGE(0xe130, 0xe133) AM_DEVREADWRITE(ACIA6551_TAG, mos6551_device, read, write) diff --git a/src/mame/drivers/elwro800.cpp b/src/mame/drivers/elwro800.cpp index 78fdeb8f573..db006dce814 100644 --- a/src/mame/drivers/elwro800.cpp +++ b/src/mame/drivers/elwro800.cpp @@ -620,12 +620,12 @@ static MACHINE_CONFIG_START( elwro800 ) MCFG_DEVICE_ADD("bank1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(elwro800_bank1) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000) MCFG_DEVICE_ADD("bank2", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(elwro800_bank2) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000) MACHINE_CONFIG_END diff --git a/src/mame/drivers/enmirage.cpp b/src/mame/drivers/enmirage.cpp index 7f5d00f250b..1bec1447996 100644 --- a/src/mame/drivers/enmirage.cpp +++ b/src/mame/drivers/enmirage.cpp @@ -125,8 +125,7 @@ static ADDRESS_MAP_START( mirage_map, AS_PROGRAM, 8, enmirage_state ) AM_RANGE(0x0000, 0x7fff) AM_RAMBANK("sndbank") // 32k window on 128k of wave RAM AM_RANGE(0x8000, 0xbfff) AM_RAM // main RAM AM_RANGE(0xc000, 0xdfff) AM_RAM // expansion RAM - AM_RANGE(0xe100, 0xe100) AM_DEVREADWRITE("acia6850", acia6850_device, status_r, control_w) - AM_RANGE(0xe101, 0xe101) AM_DEVREADWRITE("acia6850", acia6850_device, data_r, data_w) + AM_RANGE(0xe100, 0xe101) AM_DEVREADWRITE("acia6850", acia6850_device, read, write) AM_RANGE(0xe200, 0xe2ff) AM_DEVREADWRITE("via6522", via6522_device, read, write) AM_RANGE(0xe400, 0xe4ff) AM_NOP AM_RANGE(0xe800, 0xe803) AM_DEVREADWRITE("wd1772", wd1772_device, read, write) diff --git a/src/mame/drivers/eurocom2.cpp b/src/mame/drivers/eurocom2.cpp index d7051c55b08..e5abeb0124d 100644 --- a/src/mame/drivers/eurocom2.cpp +++ b/src/mame/drivers/eurocom2.cpp @@ -330,8 +330,7 @@ static ADDRESS_MAP_START(eurocom2_map, AS_PROGRAM, 8, eurocom2_state) AM_RANGE(0x0000, 0xefff) AM_RAM AM_SHARE("videoram") AM_RANGE(0xf000, 0xfcef) AM_ROM AM_REGION("maincpu", 0) AM_RANGE(0xfcf0, 0xfcf3) AM_DEVREADWRITE("pia1", pia6821_device, read, write) - AM_RANGE(0xfcf4, 0xfcf4) AM_DEVREADWRITE("acia", acia6850_device, status_r, control_w) - AM_RANGE(0xfcf5, 0xfcf5) AM_DEVREADWRITE("acia", acia6850_device, data_r, data_w) + AM_RANGE(0xfcf4, 0xfcf5) AM_DEVREADWRITE("acia", acia6850_device, read, write) AM_RANGE(0xfcf6, 0xfcf7) AM_WRITE(vico_w) AM_RANGE(0xfcf8, 0xfcfb) AM_DEVREADWRITE("pia2", pia6821_device, read, write) AM_RANGE(0xfd30, 0xfd37) AM_DEVREADWRITE("fdc", fd1793_device, read, write) diff --git a/src/mame/drivers/f1gp.cpp b/src/mame/drivers/f1gp.cpp index e4174b238dd..a2f11028f8f 100644 --- a/src/mame/drivers/f1gp.cpp +++ b/src/mame/drivers/f1gp.cpp @@ -104,8 +104,7 @@ static ADDRESS_MAP_START( f1gp_cpu2_map, AS_PROGRAM, 16, f1gp_state ) AM_RANGE(0x000000, 0x01ffff) AM_ROM AM_RANGE(0xff8000, 0xffbfff) AM_RAM AM_RANGE(0xffc000, 0xffcfff) AM_RAM AM_SHARE("sharedram") - AM_RANGE(0xfff030, 0xfff031) AM_DEVREADWRITE8("acia", acia6850_device, status_r, control_w, 0x00ff) - AM_RANGE(0xfff032, 0xfff033) AM_DEVREADWRITE8("acia", acia6850_device, data_r, data_w, 0x00ff) + AM_RANGE(0xfff030, 0xfff033) AM_DEVREADWRITE8("acia", acia6850_device, read, write, 0x00ff) ADDRESS_MAP_END static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, f1gp_state ) @@ -183,8 +182,7 @@ static ADDRESS_MAP_START( f1gpb_cpu2_map, AS_PROGRAM, 16, f1gp_state ) AM_RANGE(0x000000, 0x01ffff) AM_ROM AM_RANGE(0xff8000, 0xffbfff) AM_RAM AM_RANGE(0xffc000, 0xffcfff) AM_RAM AM_SHARE("sharedram") - AM_RANGE(0xfff030, 0xfff031) AM_DEVREADWRITE8("acia", acia6850_device, status_r, control_w, 0x00ff) - AM_RANGE(0xfff032, 0xfff033) AM_DEVREADWRITE8("acia", acia6850_device, data_r, data_w, 0x00ff) + AM_RANGE(0xfff030, 0xfff033) AM_DEVREADWRITE8("acia", acia6850_device, read, write, 0x00ff) ADDRESS_MAP_END static INPUT_PORTS_START( f1gp ) diff --git a/src/mame/drivers/fidel6502.cpp b/src/mame/drivers/fidel6502.cpp index 1c1dd67351a..46c144b0db0 100644 --- a/src/mame/drivers/fidel6502.cpp +++ b/src/mame/drivers/fidel6502.cpp @@ -1708,8 +1708,8 @@ static MACHINE_CONFIG_START( sc12 ) MCFG_DEVICE_ADD("sc12_map", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(sc12_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(16) MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", fidelbase_state, display_decay_tick, attotime::from_msec(1)) MCFG_DEFAULT_LAYOUT(layout_fidel_sc12) diff --git a/src/mame/drivers/fidel68k.cpp b/src/mame/drivers/fidel68k.cpp index 581aba0581c..d2c94518b55 100644 --- a/src/mame/drivers/fidel68k.cpp +++ b/src/mame/drivers/fidel68k.cpp @@ -275,7 +275,7 @@ WRITE8_MEMBER(fidel68k_state::fdes2265_control_w) READ8_MEMBER(fidel68k_state::fdes2265_input_r) { - // a1-a3,d7: multiplexed inputs (active low) + // a1-a3,d7(d15): multiplexed inputs (active low) return (read_inputs(9) >> offset & 1) ? 0 : 0x80; } diff --git a/src/mame/drivers/fm7.cpp b/src/mame/drivers/fm7.cpp index 5cd069931b0..99e7c8e86ab 100644 --- a/src/mame/drivers/fm7.cpp +++ b/src/mame/drivers/fm7.cpp @@ -2051,7 +2051,7 @@ SLOT_INTERFACE_END MCFG_DEVICE_ADD(tag, ADDRESS_MAP_BANK, 0) \ MCFG_DEVICE_PROGRAM_MAP(fm7_banked_mem) \ MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) \ -MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) \ +MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) \ MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000) diff --git a/src/mame/drivers/force68k.cpp b/src/mame/drivers/force68k.cpp index 0736fdb585d..be6da049d7e 100644 --- a/src/mame/drivers/force68k.cpp +++ b/src/mame/drivers/force68k.cpp @@ -238,12 +238,9 @@ static ADDRESS_MAP_START (force68k_mem, AS_PROGRAM, 16, force68k_state) AM_RANGE (0x080000, 0x083fff) AM_ROM /* System EPROM Area 16Kb DEBUGGER supplied as default on CPU-1B/D */ AM_RANGE (0x084000, 0x09ffff) AM_ROM /* System EPROM Area 112Kb additional space for System ROM */ //AM_RANGE (0x0a0000, 0x0bffff) AM_ROM /* User EPROM/SRAM Area, max 128Kb mapped by a cartslot */ - AM_RANGE (0x0c0040, 0x0c0041) AM_DEVREADWRITE8 ("aciahost", acia6850_device, status_r, control_w, 0x00ff) - AM_RANGE (0x0c0042, 0x0c0043) AM_DEVREADWRITE8 ("aciahost", acia6850_device, data_r, data_w, 0x00ff) - AM_RANGE (0x0c0080, 0x0c0081) AM_DEVREADWRITE8 ("aciaterm", acia6850_device, status_r, control_w, 0xff00) - AM_RANGE (0x0c0082, 0x0c0083) AM_DEVREADWRITE8 ("aciaterm", acia6850_device, data_r, data_w, 0xff00) - AM_RANGE (0x0c0100, 0x0c0101) AM_DEVREADWRITE8 ("aciaremt", acia6850_device, status_r, control_w, 0x00ff) - AM_RANGE (0x0c0102, 0x0c0103) AM_DEVREADWRITE8 ("aciaremt", acia6850_device, data_r, data_w, 0x00ff) + AM_RANGE (0x0c0040, 0x0c0043) AM_DEVREADWRITE8 ("aciahost", acia6850_device, read, write, 0x00ff) + AM_RANGE (0x0c0080, 0x0c0083) AM_DEVREADWRITE8 ("aciaterm", acia6850_device, read, write, 0xff00) + AM_RANGE (0x0c0100, 0x0c0103) AM_DEVREADWRITE8 ("aciaremt", acia6850_device, read, write, 0x00ff) AM_RANGE (0x0c0400, 0x0c042f) AM_DEVREADWRITE8 ("rtc", mm58167_device, read, write, 0x00ff) AM_RANGE (0x0e0000, 0x0e0035) AM_DEVREADWRITE8 ("pit", pit68230_device, read, write, 0x00ff) //AM_RANGE(0x0e0200, 0x0e0380) AM_READWRITE(fpu_r, fpu_w) /* optional FPCP 68881 FPU interface */ diff --git a/src/mame/drivers/funkball.cpp b/src/mame/drivers/funkball.cpp index bd0bc704f68..4a098e8ae35 100644 --- a/src/mame/drivers/funkball.cpp +++ b/src/mame/drivers/funkball.cpp @@ -782,8 +782,8 @@ static MACHINE_CONFIG_START( funkball ) MCFG_DEVICE_ADD("flashbank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(flashbank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(32) MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000) /* video hardware */ diff --git a/src/mame/drivers/gimix.cpp b/src/mame/drivers/gimix.cpp index abab8c71642..4467b925b56 100644 --- a/src/mame/drivers/gimix.cpp +++ b/src/mame/drivers/gimix.cpp @@ -173,15 +173,13 @@ private: static ADDRESS_MAP_START( gimix_banked_mem, AS_PROGRAM, 8, gimix_state) AM_RANGE(0x00000, 0x0dfff) AM_RAMBANK("lower_ram") - AM_RANGE(0x0e000, 0x0e000) AM_DEVREADWRITE("acia1",acia6850_device,status_r,control_w) - AM_RANGE(0x0e001, 0x0e001) AM_DEVREADWRITE("acia1",acia6850_device,data_r,data_w) - AM_RANGE(0x0e004, 0x0e004) AM_DEVREADWRITE("acia2",acia6850_device,status_r,control_w) - AM_RANGE(0x0e005, 0x0e005) AM_DEVREADWRITE("acia2",acia6850_device,data_r,data_w) + AM_RANGE(0x0e000, 0x0e001) AM_DEVREADWRITE("acia1", acia6850_device, read, write) + AM_RANGE(0x0e004, 0x0e005) AM_DEVREADWRITE("acia2", acia6850_device, read, write) //AM_RANGE(0x0e018, 0x0e01b) AM_READWRITE(fdc_r, fdc_w) // FD1797 FDC (PIO) AM_RANGE(0x0e100, 0x0e1ff) AM_RAM //AM_RANGE(0x0e200, 0x0e20f) // 9511A / 9512 Arithmetic Processor - AM_RANGE(0x0e210, 0x0e21f) AM_DEVREADWRITE("timer",ptm6840_device,read,write) - AM_RANGE(0x0e220, 0x0e23f) AM_DEVREADWRITE("rtc",mm58167_device,read,write) + AM_RANGE(0x0e210, 0x0e21f) AM_DEVREADWRITE("timer", ptm6840_device, read, write) + AM_RANGE(0x0e220, 0x0e23f) AM_DEVREADWRITE("rtc", mm58167_device, read, write) AM_RANGE(0x0e240, 0x0e3af) AM_RAM AM_RANGE(0x0e3b0, 0x0e3b3) AM_READWRITE(dma_r, dma_w) // DMA controller (custom?) AM_RANGE(0x0e3b4, 0x0e3b7) AM_READWRITE(fdc_r, fdc_w) // FD1797 FDC @@ -542,7 +540,7 @@ SLOT_INTERFACE_END MCFG_DEVICE_ADD(tag, ADDRESS_MAP_BANK, 0) \ MCFG_DEVICE_PROGRAM_MAP(gimix_banked_mem) \ MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) \ -MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) \ +MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) \ MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000) static MACHINE_CONFIG_START( gimix ) diff --git a/src/mame/drivers/goldnpkr.cpp b/src/mame/drivers/goldnpkr.cpp index b6fc3b92eb2..a17b44474cb 100644 --- a/src/mame/drivers/goldnpkr.cpp +++ b/src/mame/drivers/goldnpkr.cpp @@ -4656,8 +4656,8 @@ static MACHINE_CONFIG_START( megadpkr ) MCFG_DEVICE_ADD("bankdev", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(megadpkr_banked_map) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_CPU_ADD("mcu", M68705P5, CPU_CLOCK) /* unknown */ diff --git a/src/mame/drivers/gstriker.cpp b/src/mame/drivers/gstriker.cpp index b211ccd3cae..e8650a929f6 100644 --- a/src/mame/drivers/gstriker.cpp +++ b/src/mame/drivers/gstriker.cpp @@ -265,8 +265,7 @@ static ADDRESS_MAP_START( twcup94_map, AS_PROGRAM, 16, gstriker_state ) ADDRESS_MAP_END static ADDRESS_MAP_START( gstriker_map, AS_PROGRAM, 16, gstriker_state ) - AM_RANGE(0x200060, 0x200061) AM_DEVREADWRITE8("acia", acia6850_device, status_r, control_w, 0x00ff) - AM_RANGE(0x200062, 0x200063) AM_DEVREADWRITE8("acia", acia6850_device, data_r, data_w, 0x00ff) + AM_RANGE(0x200060, 0x200063) AM_DEVREADWRITE8("acia", acia6850_device, read, write, 0x00ff) AM_IMPORT_FROM(twcup94_map) ADDRESS_MAP_END diff --git a/src/mame/drivers/guab.cpp b/src/mame/drivers/guab.cpp index 56d18f3568c..c9682f5207f 100644 --- a/src/mame/drivers/guab.cpp +++ b/src/mame/drivers/guab.cpp @@ -121,10 +121,8 @@ static ADDRESS_MAP_START( guab_map, AS_PROGRAM, 16, guab_state ) AM_RANGE(0x0c0020, 0x0c0027) AM_DEVREADWRITE8("i8255_2", i8255_device, read, write, 0x00ff) AM_RANGE(0x0c0040, 0x0c0047) AM_DEVREADWRITE8("i8255_3", i8255_device, read, write, 0x00ff) AM_RANGE(0x0c0060, 0x0c0067) AM_DEVREADWRITE8("i8255_4", i8255_device, read, write, 0x00ff) - AM_RANGE(0x0c0080, 0x0c0081) AM_DEVREADWRITE8("acia6850_1", acia6850_device, status_r, control_w, 0x00ff) - AM_RANGE(0x0c0082, 0x0c0083) AM_DEVREADWRITE8("acia6850_1", acia6850_device, data_r, data_w, 0x00ff) - AM_RANGE(0x0c00a0, 0x0c00a1) AM_DEVREADWRITE8("acia6850_2", acia6850_device, status_r, control_w, 0x00ff) - AM_RANGE(0x0c00a2, 0x0c00a3) AM_DEVREADWRITE8("acia6850_2", acia6850_device, data_r, data_w, 0x00ff) + AM_RANGE(0x0c0080, 0x0c0083) AM_DEVREADWRITE8("acia6850_1", acia6850_device, read, write, 0x00ff) + AM_RANGE(0x0c00a0, 0x0c00a3) AM_DEVREADWRITE8("acia6850_2", acia6850_device, read, write, 0x00ff) AM_RANGE(0x0c00c0, 0x0c00cf) AM_DEVREADWRITE8("6840ptm", ptm6840_device, read, write, 0x00ff) AM_RANGE(0x0c00e0, 0x0c00e7) AM_DEVREADWRITE8("fdc", wd1773_device, read, write, 0x00ff) AM_RANGE(0x080000, 0x080fff) AM_RAM diff --git a/src/mame/drivers/hazelgr.cpp b/src/mame/drivers/hazelgr.cpp index cca9a43c63c..b26f5099089 100644 --- a/src/mame/drivers/hazelgr.cpp +++ b/src/mame/drivers/hazelgr.cpp @@ -8,37 +8,97 @@ #include "emu.h" #include "cpu/z80/z80.h" +#include "cpu/z80/z80daisy.h" +#include "machine/clock.h" +#include "machine/z80ctc.h" +#include "machine/z80pio.h" + class haze_state : public driver_device { public: haze_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu") + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") { } -protected: - - // devices +private: required_device<cpu_device> m_maincpu; }; -static ADDRESS_MAP_START( haze_map, AS_PROGRAM, 8, haze_state ) +static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, haze_state ) AM_RANGE(0x0000, 0x17ff) AM_ROM AM_RANGE(0x9000, 0x9fff) AM_RAM ADDRESS_MAP_END +static ADDRESS_MAP_START( io_map, AS_IO, 8, haze_state ) + ADDRESS_MAP_UNMAP_HIGH + ADDRESS_MAP_GLOBAL_MASK(0xff) + AM_RANGE(0x80, 0x83) AM_DEVREADWRITE("ctc1", z80ctc_device, read, write) // irq 17E0 => 0183(ch3) + AM_RANGE(0x90, 0x93) AM_DEVREADWRITE("pio1", z80pio_device, read_alt, write_alt) // 91 irq 17F8 => 0A5E + AM_RANGE(0xa0, 0xa3) AM_DEVREADWRITE("pio2", z80pio_device, read_alt, write_alt) // not programmed to interrupt + AM_RANGE(0xb0, 0xb3) AM_DEVREADWRITE("pio3", z80pio_device, read_alt, write_alt) // not programmed to interrupt + AM_RANGE(0xc0, 0xc3) AM_DEVREADWRITE("pio4", z80pio_device, read_alt, write_alt) // not programmed to interrupt + AM_RANGE(0xc4, 0xc7) AM_DEVREADWRITE("ctc2", z80ctc_device, read, write) // irq 17E8 => 023D(ch0),0366(ch1),02BB(ch2),0378(ch3) + AM_RANGE(0xc8, 0xcb) AM_DEVREADWRITE("ctc3", z80ctc_device, read, write) // irq 17F0 => 030E(ch0),038A(ch1) +ADDRESS_MAP_END + static INPUT_PORTS_START( haze ) + PORT_START("TEST") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START3 ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START4 ) INPUT_PORTS_END +static const z80_daisy_config daisy_chain[] = +{ + { "ctc1" }, + { "ctc2" }, + { "ctc3" }, + { "pio1" }, + { nullptr } +}; + +// All frequencies are guesswork, in an effort to get something to happen static MACHINE_CONFIG_START( haze ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", Z80,2000000) /* ? MHz */ - MCFG_CPU_PROGRAM_MAP(haze_map) + MCFG_CPU_PROGRAM_MAP(mem_map) + MCFG_CPU_IO_MAP(io_map) + MCFG_Z80_DAISY_CHAIN(daisy_chain) + + MCFG_DEVICE_ADD("ctc_clock", CLOCK, 1'000'000) + MCFG_CLOCK_SIGNAL_HANDLER(DEVWRITELINE("ctc1", z80ctc_device, trg3)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("ctc2", z80ctc_device, trg0)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("ctc2", z80ctc_device, trg1)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("ctc2", z80ctc_device, trg2)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("ctc2", z80ctc_device, trg3)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("ctc3", z80ctc_device, trg0)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("ctc3", z80ctc_device, trg1)) + + MCFG_DEVICE_ADD("ctc1", Z80CTC, 1'000'000 ) + MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0)) + + MCFG_DEVICE_ADD("ctc2", Z80CTC, 1'000'000 ) + MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0)) + + MCFG_DEVICE_ADD("ctc3", Z80CTC, 1'000'000 ) + MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0)) + + MCFG_DEVICE_ADD("pio1", Z80PIO, 1'000'000 ) + MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0)) + MCFG_Z80PIO_IN_PA_CB(IOPORT("TEST")) + + MCFG_DEVICE_ADD("pio2", Z80PIO, 1'000'000 ) + + MCFG_DEVICE_ADD("pio3", Z80PIO, 1'000'000 ) + + MCFG_DEVICE_ADD("pio4", Z80PIO, 1'000'000 ) MACHINE_CONFIG_END ROM_START( hg_frd ) diff --git a/src/mame/drivers/hh_tms1k.cpp b/src/mame/drivers/hh_tms1k.cpp index 57ab1b33e11..c160c32da96 100644 --- a/src/mame/drivers/hh_tms1k.cpp +++ b/src/mame/drivers/hh_tms1k.cpp @@ -53,7 +53,7 @@ @MP1312 TMS1100 1983, Gakken FX-Micom R-165/Tandy Radio Shack Science Fair Microcomputer Trainer *MP1359 TMS1100? 1985, Capsela CRC2000 @MP1525 TMS1170 1980, Coleco Head to Head Baseball - *MP1604 ? 1982, Gakken Invader 2000/Tandy Cosmic Fire Away 3000 (? note: VFD-capable) + *MP1604 TMS1370 1982, Gakken Invader 2000/Tandy Cosmic Fire Away 3000 @MP1801 TMS1700 1981, Tiger Ditto/Tandy Pocket Repeat (model 60-2152) @MP2105 TMS1370 1979, Gakken/Entex Poker (6005) @MP2139 TMS1370 1982, Gakken Galaxy Invader 1000/Tandy Cosmic 1000 Fire Away @@ -99,7 +99,7 @@ @M34038 TMS1100 1982, Parker Brothers Lost Treasure M34047 TMS1100 1982, MicroVision cartridge: Super Blockbuster @M34078A TMS1100 1983, Milton Bradley Electronic Arcade Mania - *MP4486A TMS1000C 1983, Vulcan XL 25 + @MP4486A TMS1000C 1983, Vulcan XL 25 @MP6100A TMS0980 1979, Ideal Electronic Detective @MP6101B TMS0980 1979, Parker Brothers Stop Thief *MP6361 ? 1983, Defender Strikes (? note: VFD-capable) @@ -6924,6 +6924,7 @@ public: : hh_tms1k_state(mconfig, type, tag) { } + void prepare_display(); DECLARE_WRITE16_MEMBER(write_r); DECLARE_WRITE16_MEMBER(write_o); DECLARE_READ8_MEMBER(read_k); @@ -6931,6 +6932,11 @@ public: // handlers +void bankshot_state::prepare_display() +{ + display_matrix(7, 11, m_o, m_r & ~3); +} + WRITE16_MEMBER(bankshot_state::write_r) { // R0: speaker out @@ -6940,8 +6946,8 @@ WRITE16_MEMBER(bankshot_state::write_r) m_inp_mux = data >> 2 & 3; // R2-R10: led select - m_r = data & ~3; - display_matrix(7, 11, m_o, m_r); + m_r = data; + prepare_display(); } WRITE16_MEMBER(bankshot_state::write_o) @@ -6949,7 +6955,7 @@ WRITE16_MEMBER(bankshot_state::write_o) // O0-O6: led state // O7: N/C m_o = data & 0x7f; - display_matrix(7, 11, m_o, m_r); + prepare_display(); } READ8_MEMBER(bankshot_state::read_k) @@ -7047,6 +7053,7 @@ public: : hh_tms1k_state(mconfig, type, tag) { } + void prepare_display(); DECLARE_WRITE16_MEMBER(write_r); DECLARE_WRITE16_MEMBER(write_o); DECLARE_READ8_MEMBER(read_k); @@ -7054,6 +7061,11 @@ public: // handlers +void splitsec_state::prepare_display() +{ + display_matrix(7, 8, m_o, m_r); +} + WRITE16_MEMBER(splitsec_state::write_r) { // R8: speaker out @@ -7064,7 +7076,7 @@ WRITE16_MEMBER(splitsec_state::write_r) // R0-R7: led select m_r = data; - display_matrix(7, 8, m_o, m_r); + prepare_display(); } WRITE16_MEMBER(splitsec_state::write_o) @@ -7072,7 +7084,7 @@ WRITE16_MEMBER(splitsec_state::write_o) // O0-O6: led state // O7: N/C m_o = data & 0x7f; - display_matrix(7, 8, m_o, m_r); + prepare_display(); } READ8_MEMBER(splitsec_state::read_k) @@ -8664,6 +8676,172 @@ MACHINE_CONFIG_END /*************************************************************************** + Vulcan XL 25 + * TMS1000SLC MP4486A (die label 1000C/, MP4486A) + * 28 LEDs, 1-bit sound + +***************************************************************************/ + +class xl25_state : public hh_tms1k_state +{ +public: + xl25_state(const machine_config &mconfig, device_type type, const char *tag) + : hh_tms1k_state(mconfig, type, tag) + { } + + void update_halt(); + DECLARE_INPUT_CHANGED_MEMBER(k4_button); + + void prepare_display(); + DECLARE_WRITE16_MEMBER(write_r); + DECLARE_WRITE16_MEMBER(write_o); + DECLARE_READ8_MEMBER(read_k); + +protected: + virtual void machine_reset() override; +}; + +// handlers + +void xl25_state::update_halt() +{ + // O5+K4 go to HALT pin (used when pressing store/recall button) + bool halt = !((m_o & 0x20) || (read_k(machine().dummy_space(), 0) & 4)); + m_maincpu->set_input_line(TMS1XXX_INPUT_LINE_HALT, halt ? ASSERT_LINE : CLEAR_LINE); +} + +void xl25_state::prepare_display() +{ + display_matrix(3, 10, m_o >> 1, m_r); +} + +WRITE16_MEMBER(xl25_state::write_r) +{ + // R0-R9: input mux, led select + m_inp_mux = data; + m_r = data; + prepare_display(); +} + +WRITE16_MEMBER(xl25_state::write_o) +{ + // O1-O3: led data + m_o = data; + prepare_display(); + + // O6: speaker out + m_speaker->level_w(data >> 6 & 1); + + // O5(+K4): MCU halt + update_halt(); +} + +READ8_MEMBER(xl25_state::read_k) +{ + // K: multiplexed inputs + // K4 also goes to MCU halt + return read_inputs(10); +} + + +// config + +static INPUT_PORTS_START( xl25 ) + PORT_START("IN.0") // R0 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_1) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_2) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_3) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.1") // R1 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_4) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_5) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_6) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.2") // R2 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_7) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_8) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_9) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.3") // R3 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_Q) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_W) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_E) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.4") // R4 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_R) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_T) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_Y) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.5") // R5 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_U) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_I) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_O) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.6") // R6 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_A) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_S) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_D) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.7") // R7 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_F) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_G) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_H) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.8") // R8 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_J) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_K) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_L) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.9") // R9 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_Z) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_X) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_C) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) +INPUT_PORTS_END + +INPUT_CHANGED_MEMBER(xl25_state::k4_button) +{ + update_halt(); +} + +void xl25_state::machine_reset() +{ + hh_tms1k_state::machine_reset(); + update_halt(); +} + +static MACHINE_CONFIG_START( xl25 ) + + /* basic machine hardware */ + MCFG_CPU_ADD("maincpu", TMS1000C, 300000) // approximation - RC osc. R=5.6K, C=47pF + MCFG_TMS1XXX_READ_K_CB(READ8(xl25_state, read_k)) + MCFG_TMS1XXX_WRITE_R_CB(WRITE16(xl25_state, write_r)) + MCFG_TMS1XXX_WRITE_O_CB(WRITE16(xl25_state, write_o)) + + MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_tms1k_state, display_decay_tick, attotime::from_msec(1)) + MCFG_DEFAULT_LAYOUT(layout_hh_tms1k_test) + + /* sound hardware */ + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) +MACHINE_CONFIG_END + + + + + +/*************************************************************************** + Game driver(s) ***************************************************************************/ @@ -9428,6 +9606,17 @@ ROM_START( ssports4 ) ROM_END +ROM_START( xl25 ) + ROM_REGION( 0x0400, "maincpu", 0 ) + ROM_LOAD( "mp4486a", 0x0000, 0x0400, CRC(bd84b515) SHA1(377fcc68a517260acd51eb9746cd62914a75d739) ) + + ROM_REGION( 867, "maincpu:mpla", 0 ) + ROM_LOAD( "tms1000_common2_micro.pla", 0, 867, BAD_DUMP CRC(d33da3cf) SHA1(13c4ebbca227818db75e6db0d45b66ba5e207776) ) // placeholder + ROM_REGION( 558, "maincpu:opla", 0 ) + ROM_LOAD( "tms1000c_xl25_output.pla", 0, 558, CRC(06ecc6e0) SHA1(e0fa1b9388948197b4de2edd3cd02fbde1dbabbb) ) +ROM_END + + // YEAR NAME PARENT CMP MACHINE INPUT STATE INIT COMPANY, FULLNAME, FLAGS CONS( 1979, matchnum, 0, 0, matchnum, matchnum, matchnum_state, 0, "A-One LSI", "Match Number", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) @@ -9517,5 +9706,7 @@ CONS( 1980, phpball, 0, 0, phpball, phpball, phpball_state, 0, CONS( 1980, ssports4, 0, 0, ssports4, ssports4, ssports4_state, 0, "U.S. Games", "Super Sports-4", MACHINE_SUPPORTS_SAVE | MACHINE_REQUIRES_ARTWORK ) +CONS( 1983, xl25, 0, 0, xl25, xl25, xl25_state, 0, "Vulcan Electronics", "XL 25", MACHINE_SUPPORTS_SAVE ) + // ***: As far as MAME is concerned, the game is emulated fine. But for it to be playable, it requires interaction // with other, unemulatable, things eg. game board/pieces, playing cards, pen & paper, etc. diff --git a/src/mame/drivers/hp80.cpp b/src/mame/drivers/hp80.cpp index 82e62ae69c9..803c2dfca78 100644 --- a/src/mame/drivers/hp80.cpp +++ b/src/mame/drivers/hp80.cpp @@ -1331,8 +1331,8 @@ static MACHINE_CONFIG_START(hp85) MCFG_DEVICE_ADD("rombank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(rombank_mem_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(21) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(21) MCFG_ADDRESS_MAP_BANK_STRIDE(HP80_OPTROM_SIZE) MCFG_SCREEN_ADD("screen" , RASTER) diff --git a/src/mame/drivers/hp_ipc.cpp b/src/mame/drivers/hp_ipc.cpp index 455a1ff08ff..d3272864dce 100644 --- a/src/mame/drivers/hp_ipc.cpp +++ b/src/mame/drivers/hp_ipc.cpp @@ -716,8 +716,8 @@ static MACHINE_CONFIG_START(hp_ipc) MCFG_DEVICE_ADD("bankdev", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(hp_ipc_mem_inner) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(25) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(25) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000000) // horizontal time = 60 us (min) diff --git a/src/mame/drivers/hunter2.cpp b/src/mame/drivers/hunter2.cpp index 5ea770d3db2..4d77977cf6a 100644 --- a/src/mame/drivers/hunter2.cpp +++ b/src/mame/drivers/hunter2.cpp @@ -413,19 +413,19 @@ static MACHINE_CONFIG_START( hunter2 ) MCFG_DEVICE_ADD("bank1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(hunter2_banked_mem) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_DEVICE_ADD("bank2", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(hunter2_banked_mem) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_DEVICE_ADD("bank3", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(hunter2_banked_mem) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MACHINE_CONFIG_END diff --git a/src/mame/drivers/intellec4.cpp b/src/mame/drivers/intellec4.cpp index 0790425401d..5e3bc8139f6 100644 --- a/src/mame/drivers/intellec4.cpp +++ b/src/mame/drivers/intellec4.cpp @@ -311,15 +311,15 @@ MACHINE_CONFIG_START(intellec4) MCFG_DEVICE_ADD("prgbank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(intellec4_program_banks) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(14) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(14) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000) MCFG_DEVICE_ADD("rpbank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(intellec4_rom_port_banks) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(14) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(14) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000) MCFG_DEVICE_ADD("promprg", INTEL_IMM6_76, 0) diff --git a/src/mame/drivers/itt3030.cpp b/src/mame/drivers/itt3030.cpp index ff6ee087728..0e6bc85a5b3 100644 --- a/src/mame/drivers/itt3030.cpp +++ b/src/mame/drivers/itt3030.cpp @@ -688,8 +688,8 @@ static MACHINE_CONFIG_START( itt3030 ) MCFG_DEVICE_ADD("lowerbank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(lower48_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(20) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20) MCFG_ADDRESS_MAP_BANK_STRIDE(0xc000) MCFG_DEVICE_ADD("crt5027", CRT5027, XTAL_6MHz) diff --git a/src/mame/drivers/jpmsys5.cpp b/src/mame/drivers/jpmsys5.cpp index 67105e2c9eb..68c98346d70 100644 --- a/src/mame/drivers/jpmsys5.cpp +++ b/src/mame/drivers/jpmsys5.cpp @@ -282,14 +282,11 @@ READ16_MEMBER(jpmsys5_state::jpm_upd7759_r) AM_RANGE(0x000000, 0x01ffff) AM_ROM \ AM_RANGE(0x040000, 0x043fff) AM_RAM AM_SHARE("nvram") \ AM_RANGE(0x046000, 0x046001) AM_WRITENOP \ - AM_RANGE(0x046020, 0x046021) AM_DEVREADWRITE8("acia6850_0", acia6850_device, status_r, control_w, 0xff) \ - AM_RANGE(0x046022, 0x046023) AM_DEVREADWRITE8("acia6850_0", acia6850_device, data_r, data_w, 0xff) \ + AM_RANGE(0x046020, 0x046023) AM_DEVREADWRITE8("acia6850_0", acia6850_device, read, write, 0xff) \ AM_RANGE(0x046040, 0x04604f) AM_DEVREADWRITE8("6840ptm", ptm6840_device, read, write, 0xff) \ AM_RANGE(0x046060, 0x046067) AM_DEVREADWRITE8("6821pia", pia6821_device, read, write,0xff) \ - AM_RANGE(0x046080, 0x046081) AM_DEVREADWRITE8("acia6850_1", acia6850_device, status_r, control_w, 0xff) \ - AM_RANGE(0x046082, 0x046083) AM_DEVREADWRITE8("acia6850_1", acia6850_device, data_r, data_w, 0xff) \ - AM_RANGE(0x04608c, 0x04608d) AM_DEVREADWRITE8("acia6850_2", acia6850_device, status_r, control_w, 0xff) \ - AM_RANGE(0x04608e, 0x04608f) AM_DEVREADWRITE8("acia6850_2", acia6850_device, data_r, data_w, 0xff) \ + AM_RANGE(0x046080, 0x046083) AM_DEVREADWRITE8("acia6850_1", acia6850_device, read, write, 0xff) \ + AM_RANGE(0x04608c, 0x04608f) AM_DEVREADWRITE8("acia6850_2", acia6850_device, read, write, 0xff) \ AM_RANGE(0x0460c0, 0x0460c1) AM_WRITENOP \ AM_RANGE(0x048000, 0x04801f) AM_READWRITE(coins_r, coins_w) \ AM_RANGE(0x04c000, 0x04c0ff) AM_READ(mux_r) AM_WRITE(mux_w) diff --git a/src/mame/drivers/jupiter.cpp b/src/mame/drivers/jupiter.cpp index e9b53971e4a..fb40dd79e20 100644 --- a/src/mame/drivers/jupiter.cpp +++ b/src/mame/drivers/jupiter.cpp @@ -110,10 +110,8 @@ static ADDRESS_MAP_START( jupiter2_mem, AS_PROGRAM, 8, jupiter2_state ) // AM_RANGE(0xff90, 0xff93) Hytype Parallel Printer PIA // AM_RANGE(0xffa0, 0xffa7) Persci Floppy Disk Controller // AM_RANGE(0xffb0, 0xffb3) Video PIA - AM_RANGE(0xffc0, 0xffc0) AM_DEVREADWRITE("acia0", acia6850_device, status_r, control_w) // Serial Port 0 ACIA - AM_RANGE(0xffc1, 0xffc1) AM_DEVREADWRITE("acia0", acia6850_device, data_r, data_w) - AM_RANGE(0xffc4, 0xffc4) AM_DEVREADWRITE("acia1", acia6850_device, status_r, control_w) // Serial Port 1 ACIA - AM_RANGE(0xffc5, 0xffc5) AM_DEVREADWRITE("acia1", acia6850_device, data_r, data_w) + AM_RANGE(0xffc0, 0xffc1) AM_DEVREADWRITE("acia0", acia6850_device, read, write) // Serial Port 0 ACIA + AM_RANGE(0xffc4, 0xffc5) AM_DEVREADWRITE("acia1", acia6850_device, read, write) // Serial Port 1 ACIA // AM_RANGE(0xffc8, 0xffc9) Serial Port 2 ACIA // AM_RANGE(0xffcc, 0xffcd) Serial Port 3 ACIA // AM_RANGE(0xffd0, 0xffd1) Serial Port 4 ACIA / Cassette diff --git a/src/mame/drivers/ksys573.cpp b/src/mame/drivers/ksys573.cpp index bd2bf50b7b1..928698f8a99 100644 --- a/src/mame/drivers/ksys573.cpp +++ b/src/mame/drivers/ksys573.cpp @@ -2040,7 +2040,7 @@ static MACHINE_CONFIG_START( konami573 ) MCFG_DEVICE_ADD( "flashbank", ADDRESS_MAP_BANK, 0 ) MCFG_DEVICE_PROGRAM_MAP( flashbank_map ) MCFG_ADDRESS_MAP_BANK_ENDIANNESS( ENDIANNESS_LITTLE ) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH( 16 ) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH( 16 ) MCFG_ADDRESS_MAP_BANK_STRIDE( 0x400000 ) /* video hardware */ diff --git a/src/mame/drivers/laser3k.cpp b/src/mame/drivers/laser3k.cpp index 15c81db8508..147122baf07 100644 --- a/src/mame/drivers/laser3k.cpp +++ b/src/mame/drivers/laser3k.cpp @@ -980,22 +980,22 @@ static MACHINE_CONFIG_START( laser3k ) MCFG_DEVICE_ADD("bank0", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(banks_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_DEVICE_ADD("bank1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(banks_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_DEVICE_ADD("bank2", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(banks_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_DEVICE_ADD("bank3", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(banks_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_RAM_ADD("mainram") diff --git a/src/mame/drivers/lethal.cpp b/src/mame/drivers/lethal.cpp index 08cbdccc65f..228a734aef6 100644 --- a/src/mame/drivers/lethal.cpp +++ b/src/mame/drivers/lethal.cpp @@ -499,8 +499,8 @@ static MACHINE_CONFIG_START( lethalen ) MCFG_DEVICE_ADD("bank4000", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank4000_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_EEPROM_SERIAL_ER5911_8BIT_ADD("eeprom") diff --git a/src/mame/drivers/majorpkr.cpp b/src/mame/drivers/majorpkr.cpp index 69c8bc63c0b..771a3dad155 100644 --- a/src/mame/drivers/majorpkr.cpp +++ b/src/mame/drivers/majorpkr.cpp @@ -995,15 +995,15 @@ static MACHINE_CONFIG_START( majorpkr ) MCFG_DEVICE_ADD("palette_bank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(palettebanks) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(13) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(13) MCFG_ADDRESS_MAP_BANK_STRIDE(0x0800) MCFG_DEVICE_ADD("vram_bank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vrambanks) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(13) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(13) MCFG_ADDRESS_MAP_BANK_STRIDE(0x0800) MCFG_NVRAM_ADD_0FILL("nvram") diff --git a/src/mame/drivers/mc1502.cpp b/src/mame/drivers/mc1502.cpp index dcb17a6c0cc..9c99c957128 100644 --- a/src/mame/drivers/mc1502.cpp +++ b/src/mame/drivers/mc1502.cpp @@ -6,6 +6,11 @@ Driver file for Elektronika MS 1502 + To do: + - fix video errors caused by 465caf8038a120b4c1ffad9df67a1dc7474e5bb1 + "cga: treat as fixed sync monitor (nw)" + - debug video init in BIOS 7.2 + ***************************************************************************/ #include "emu.h" @@ -374,6 +379,10 @@ ROM_START( mc1502 ) ROMX_LOAD( "msv5~2b0.pgm", 0xc000, 0x2000, CRC(f7f370e9) SHA1(e069a35005581a02856853b57dd511ab8e10054b),ROM_BIOS(10)) ROMX_LOAD( "msv5~2b1.pgm", 0xe000, 0x2000, CRC(d50e1c43) SHA1(22724dec0052ee9e52f44f5914f2f5f3fae14612),ROM_BIOS(10)) + // 7.2 + ROM_SYSTEM_BIOS(10, "v72", "v7.2 01/21/96") + ROMX_LOAD( "7.2_1.bin", 0xe000, 0x2000, CRC(80912ad4) SHA1(cc54b77b2db4cc5d614efafd04367d2f06400fc8),ROM_BIOS(11)) + ROM_REGION(0x2000,"gfx1", ROMREGION_ERASE00) ROM_LOAD( "symgen.rom", 0x0000, 0x2000, CRC(b2747a52) SHA1(6766d275467672436e91ac2997ac6b77700eba1e)) ROM_END diff --git a/src/mame/drivers/mekd2.cpp b/src/mame/drivers/mekd2.cpp index 0ac11d44017..39400bce047 100644 --- a/src/mame/drivers/mekd2.cpp +++ b/src/mame/drivers/mekd2.cpp @@ -140,8 +140,7 @@ private: static ADDRESS_MAP_START( mekd2_mem , AS_PROGRAM, 8, mekd2_state) AM_RANGE(0x0000, 0x00ff) AM_RAM // user ram AM_RANGE(0x8004, 0x8007) AM_DEVREADWRITE("pia_u", pia6821_device, read, write) - AM_RANGE(0x8008, 0x8008) AM_DEVREADWRITE("acia", acia6850_device, status_r, control_w) - AM_RANGE(0x8009, 0x8009) AM_DEVREADWRITE("acia", acia6850_device, data_r, data_w) + AM_RANGE(0x8008, 0x8009) AM_DEVREADWRITE("acia", acia6850_device, read, write) AM_RANGE(0x8020, 0x8023) AM_DEVREADWRITE("pia_s", pia6821_device, read, write) AM_RANGE(0xa000, 0xa07f) AM_RAM // system ram AM_RANGE(0xe000, 0xe3ff) AM_ROM AM_MIRROR(0x1c00) /* JBUG ROM */ diff --git a/src/mame/drivers/micro3d.cpp b/src/mame/drivers/micro3d.cpp index d3b77edb0e7..1969a1b1b70 100644 --- a/src/mame/drivers/micro3d.cpp +++ b/src/mame/drivers/micro3d.cpp @@ -34,6 +34,7 @@ #include "machine/mc68681.h" #include "machine/mc68901.h" #include "machine/nvram.h" +#include "machine/z80scc.h" #include "sound/ym2151.h" #include "screen.h" @@ -234,8 +235,8 @@ static ADDRESS_MAP_START( vgbmem, AS_PROGRAM, 16, micro3d_state ) AM_RANGE(0x00e00000, 0x00e0000f) AM_WRITE(micro3d_xfer3dk_w) AM_RANGE(0x02000000, 0x0200ffff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") // clut AM_RANGE(0x02600000, 0x0260000f) AM_WRITE(micro3d_creg_w) - AM_RANGE(0x02c00000, 0x02c0003f) AM_READ(micro3d_ti_uart_r) - AM_RANGE(0x02e00000, 0x02e0003f) AM_WRITE(micro3d_ti_uart_w) + AM_RANGE(0x02c00000, 0x02c0003f) AM_READ8(vgb_uart_r, 0x00ff) + AM_RANGE(0x02e00000, 0x02e0003f) AM_WRITE8(vgb_uart_w, 0x00ff) AM_RANGE(0x03800000, 0x03dfffff) AM_ROM AM_REGION("tms_gfx", 0) AM_RANGE(0x03e00000, 0x03ffffff) AM_ROM AM_REGION("tms34010", 0) AM_RANGE(0xc0000000, 0xc00001ff) AM_DEVREADWRITE("vgb", tms34010_device, io_register_r, io_register_w) @@ -265,7 +266,7 @@ static ADDRESS_MAP_START( drmath_data, AS_DATA, 32, micro3d_state ) AM_RANGE(0x01400000, 0x01400003) AM_READWRITE(micro3d_pipe_r, micro3d_fifo_w) AM_RANGE(0x01600000, 0x01600003) AM_WRITE(drmath_intr2_ack) AM_RANGE(0x01800000, 0x01800003) AM_WRITE(micro3d_alt_fifo_w) - AM_RANGE(0x03fffff0, 0x03fffff7) AM_READWRITE(micro3d_scc_r, micro3d_scc_w) + AM_RANGE(0x03fffff0, 0x03fffff7) AM_DEVREADWRITE8("scc", z80scc_device, ba_cd_inv_r, ba_cd_inv_w, 0x000000ff) ADDRESS_MAP_END /************************************* @@ -313,6 +314,13 @@ static MACHINE_CONFIG_START( micro3d ) MCFG_CPU_PROGRAM_MAP(drmath_prg) MCFG_CPU_DATA_MAP(drmath_data) + MCFG_SCC8530_ADD("scc", XTAL_32MHz / 2 / 2, 0, 0, 0, 0) + MCFG_Z80SCC_OUT_TXDB_CB(DEVWRITELINE("monitor_drmath", rs232_port_device, write_txd)) + + MCFG_RS232_PORT_ADD("monitor_drmath", default_rs232_devices, nullptr) + MCFG_RS232_RXD_HANDLER(DEVWRITELINE("scc", z80scc_device, rxb_w)) + MCFG_RS232_DCD_HANDLER(DEVWRITELINE("scc", z80scc_device, dcdb_w)) MCFG_DEVCB_XOR(1) + MCFG_CPU_ADD("audiocpu", I8051, XTAL_11_0592MHz) MCFG_CPU_PROGRAM_MAP(soundmem_prg) MCFG_CPU_IO_MAP(soundmem_io) @@ -321,7 +329,7 @@ static MACHINE_CONFIG_START( micro3d ) MCFG_DEVICE_ADD("duart", MC68681, XTAL_3_6864MHz) MCFG_MC68681_IRQ_CALLBACK(WRITELINE(micro3d_state, duart_irq_handler)) - MCFG_MC68681_A_TX_CALLBACK(DEVWRITELINE("monitor", rs232_port_device, write_txd)) + MCFG_MC68681_A_TX_CALLBACK(DEVWRITELINE("monitor_host", rs232_port_device, write_txd)) MCFG_MC68681_B_TX_CALLBACK(WRITELINE(micro3d_state, duart_txb)) MCFG_MC68681_INPORT_CALLBACK(READ8(micro3d_state, duart_input_r)) MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(micro3d_state, duart_output_w)) @@ -346,7 +354,14 @@ static MACHINE_CONFIG_START( micro3d ) MCFG_SCREEN_UPDATE_DEVICE("vgb", tms34010_device, tms340x0_ind16) MCFG_SCREEN_PALETTE("palette") - MCFG_RS232_PORT_ADD("monitor", default_rs232_devices, nullptr) + MCFG_DEVICE_ADD("uart", MC2661, XTAL_40MHz / 8) // actually SCN2651 + MCFG_MC2661_TXD_HANDLER(DEVWRITELINE("monitor_vgb", rs232_port_device, write_txd)) + + MCFG_RS232_PORT_ADD("monitor_vgb", default_rs232_devices, nullptr) + MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart", mc2661_device, rx_w)) + MCFG_RS232_DSR_HANDLER(DEVWRITELINE("uart", mc2661_device, dsr_w)) + + MCFG_RS232_PORT_ADD("monitor_host", default_rs232_devices, nullptr) MCFG_RS232_RXD_HANDLER(DEVWRITELINE("duart", mc68681_device, rx_a_w)) MCFG_ADC0844_ADD("adc") diff --git a/src/mame/drivers/milwaukee.cpp b/src/mame/drivers/milwaukee.cpp index 5ef40c5e1e3..457e500f4ce 100644 --- a/src/mame/drivers/milwaukee.cpp +++ b/src/mame/drivers/milwaukee.cpp @@ -7,7 +7,7 @@ Milwaukee Computer MC-1000 series (MC-1000/1100/1200/1300/1400) all the same except for disk options. Chips: SY6502, 2x 6821, 2x MC6850P, 6852, INS8253 -Other: 2x 7-position rotary "dips" to select baud rates on each 6850. +Other: 2x 7-position rotary "dips" to select baud rates on each 6850 (19.2K, 9600, 4800, 2400, 1200, 600, 300). ************************************************************************************************************************************/ @@ -37,10 +37,8 @@ private: static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, milwaukee_state ) AM_RANGE(0x0000, 0xf7ff) AM_RAM //AM_RANGE(0xf800, 0xf87f) expansion i/o - AM_RANGE(0xf880, 0xf880) AM_DEVREADWRITE("acia1", acia6850_device, status_r, control_w) // terminal - AM_RANGE(0xf881, 0xf881) AM_DEVREADWRITE("acia1", acia6850_device, data_r, data_w) - AM_RANGE(0xf882, 0xf882) AM_DEVREADWRITE("acia2", acia6850_device, status_r, control_w) // remote - AM_RANGE(0xf883, 0xf883) AM_DEVREADWRITE("acia2", acia6850_device, data_r, data_w) + AM_RANGE(0xf880, 0xf881) AM_DEVREADWRITE("acia1", acia6850_device, read, write) // terminal + AM_RANGE(0xf882, 0xf883) AM_DEVREADWRITE("acia2", acia6850_device, read, write) // remote AM_RANGE(0xf884, 0xf887) AM_DEVREADWRITE("pia1", pia6821_device, read, write) // centronics AM_RANGE(0xf888, 0xf88b) AM_DEVREADWRITE("pit", pit8253_device, read, write) AM_RANGE(0xf88c, 0xf88f) AM_DEVREADWRITE("pia2", pia6821_device, read, write) // disk controller @@ -52,16 +50,21 @@ static INPUT_PORTS_START( milwaukee ) INPUT_PORTS_END static MACHINE_CONFIG_START( milwaukee ) - MCFG_CPU_ADD("maincpu", M6502, 1'000'000) // can't read crystal, but clock is correct + MCFG_CPU_ADD("maincpu", M6502, XTAL_16MHz / 16) MCFG_CPU_PROGRAM_MAP(mem_map) MCFG_DEVICE_ADD("pit", PIT8253, 0) + MCFG_PIT8253_CLK0(XTAL_16MHz / 16 / 4) // 250 kHz + MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pit", pit8253_device, write_gate0)) MCFG_DEVCB_INVERT + MCFG_PIT8253_CLK1(double(XTAL_16MHz) / 2 / 13 / 2048 / 5) // 60.09 Hz? + MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("pit", pit8253_device, write_clk2)) MCFG_DEVCB_INVERT + MCFG_DEVICE_ADD("pia1", PIA6821, 0) MCFG_DEVICE_ADD("pia2", PIA6821, 0) MCFG_DEVICE_ADD("acia2", ACIA6850, 0) MCFG_DEVICE_ADD("ssda", MC6852, 0) - MCFG_DEVICE_ADD("acia_clock", CLOCK, 153600) + MCFG_DEVICE_ADD("acia_clock", CLOCK, XTAL_16MHz / 2 / 13 / 4) MCFG_CLOCK_SIGNAL_HANDLER(DEVWRITELINE("acia1", acia6850_device, write_txc)) MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("acia1", acia6850_device, write_rxc)) diff --git a/src/mame/drivers/miniframe.cpp b/src/mame/drivers/miniframe.cpp index 965cddbcfad..93d39d9195d 100644 --- a/src/mame/drivers/miniframe.cpp +++ b/src/mame/drivers/miniframe.cpp @@ -230,7 +230,7 @@ static MACHINE_CONFIG_START( miniframe ) MCFG_DEVICE_ADD("ramrombank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(ramrombank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x400000) // floppy diff --git a/src/mame/drivers/mits680b.cpp b/src/mame/drivers/mits680b.cpp index 5a340b98864..5799b966d92 100644 --- a/src/mame/drivers/mits680b.cpp +++ b/src/mame/drivers/mits680b.cpp @@ -50,8 +50,7 @@ READ8_MEMBER( mits680b_state::status_check_r ) static ADDRESS_MAP_START(mem_map, AS_PROGRAM, 8, mits680b_state) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x0000, 0x03ff) AM_RAM // 1024 bytes RAM - AM_RANGE(0xf000, 0xf000) AM_DEVREADWRITE("acia", acia6850_device, status_r, control_w) - AM_RANGE(0xf001, 0xf001) AM_DEVREADWRITE("acia", acia6850_device, data_r, data_w) + AM_RANGE(0xf000, 0xf001) AM_DEVREADWRITE("acia", acia6850_device, read, write) AM_RANGE(0xf002, 0xf002) AM_READ(status_check_r) AM_RANGE(0xff00, 0xffff) AM_ROM AM_REGION("roms", 0) ADDRESS_MAP_END diff --git a/src/mame/drivers/mpu4vid.cpp b/src/mame/drivers/mpu4vid.cpp index 439591fd271..81a3b3c14bf 100644 --- a/src/mame/drivers/mpu4vid.cpp +++ b/src/mame/drivers/mpu4vid.cpp @@ -1180,8 +1180,7 @@ static ADDRESS_MAP_START( mpu4_68k_map, AS_PROGRAM, 16, mpu4vid_state ) /* AM_RANGE(0xa00004, 0xa0000f) AM_READWRITE(mpu4_vid_unmap_r, mpu4_vid_unmap_w) */ AM_RANGE(0xb00000, 0xb0000f) AM_DEVREADWRITE8("scn2674_vid", scn2674_device, read, write,0x00ff) AM_RANGE(0xc00000, 0xc1ffff) AM_READWRITE(mpu4_vid_vidram_r, mpu4_vid_vidram_w) AM_SHARE("vid_vidram") - AM_RANGE(0xff8000, 0xff8001) AM_DEVREADWRITE8("acia6850_1", acia6850_device, status_r, control_w, 0x00ff) - AM_RANGE(0xff8002, 0xff8003) AM_DEVREADWRITE8("acia6850_1", acia6850_device, data_r, data_w, 0x00ff) + AM_RANGE(0xff8000, 0xff8003) AM_DEVREADWRITE8("acia6850_1", acia6850_device, read, write, 0x00ff) AM_RANGE(0xff9000, 0xff900f) AM_DEVREADWRITE8("6840ptm_68k", ptm6840_device, read, write, 0x00ff) AM_RANGE(0xffd000, 0xffd00f) AM_READWRITE8(vidcharacteriser_r, vidcharacteriser_w,0x00ff) ADDRESS_MAP_END @@ -1196,8 +1195,7 @@ static ADDRESS_MAP_START( mpu4oki_68k_map, AS_PROGRAM, 16, mpu4vid_state ) AM_RANGE(0xa00002, 0xa00003) AM_DEVWRITE8("ef9369", ef9369_device, address_w, 0x00ff) AM_RANGE(0xb00000, 0xb0000f) AM_DEVREADWRITE8("scn2674_vid", scn2674_device, read, write,0x00ff) AM_RANGE(0xc00000, 0xc1ffff) AM_READWRITE(mpu4_vid_vidram_r, mpu4_vid_vidram_w) AM_SHARE("vid_vidram") - AM_RANGE(0xff8000, 0xff8001) AM_DEVREADWRITE8("acia6850_1", acia6850_device, status_r, control_w, 0x00ff) - AM_RANGE(0xff8002, 0xff8003) AM_DEVREADWRITE8("acia6850_1", acia6850_device, data_r, data_w, 0x00ff) + AM_RANGE(0xff8000, 0xff8003) AM_DEVREADWRITE8("acia6850_1", acia6850_device, read, write, 0x00ff) AM_RANGE(0xff9000, 0xff900f) AM_DEVREADWRITE8("6840ptm_68k", ptm6840_device, read, write, 0x00ff) AM_RANGE(0xffa040, 0xffa04f) AM_DEVREAD8("ptm_ic3ss", ptm6840_device, read,0x00ff) // 6840PTM on sampled sound board AM_RANGE(0xffa040, 0xffa04f) AM_WRITE8(ic3ss_w,0x00ff) // 6840PTM on sampled sound board @@ -1217,8 +1215,7 @@ static ADDRESS_MAP_START( bwbvid_68k_map, AS_PROGRAM, 16, mpu4vid_state ) /* AM_RANGE(0xa00004, 0xa0000f) AM_READWRITE(mpu4_vid_unmap_r, mpu4_vid_unmap_w) */ AM_RANGE(0xb00000, 0xb0000f) AM_DEVREADWRITE8("scn2674_vid", scn2674_device, read, write,0x00ff) AM_RANGE(0xc00000, 0xc1ffff) AM_READWRITE(mpu4_vid_vidram_r, mpu4_vid_vidram_w) AM_SHARE("vid_vidram") - AM_RANGE(0xe00000, 0xe00001) AM_DEVREADWRITE8("acia6850_1", acia6850_device, status_r, control_w, 0x00ff) - AM_RANGE(0xe00002, 0xe00003) AM_DEVREADWRITE8("acia6850_1", acia6850_device, data_r, data_w, 0x00ff) + AM_RANGE(0xe00000, 0xe00003) AM_DEVREADWRITE8("acia6850_1", acia6850_device, read, write, 0x00ff) AM_RANGE(0xe01000, 0xe0100f) AM_DEVREADWRITE8("6840ptm_68k", ptm6840_device, read, write, 0x00ff) //AM_RANGE(0xa00004, 0xa0000f) AM_READWRITE(bwb_characteriser16_r, bwb_characteriser16_w)//AM_READWRITE(adpcm_r, adpcm_w) CHR ? ADDRESS_MAP_END @@ -1234,8 +1231,7 @@ static ADDRESS_MAP_START( bwbvid5_68k_map, AS_PROGRAM, 16, mpu4vid_state ) /* AM_RANGE(0xa00004, 0xa0000f) AM_READWRITE(mpu4_vid_unmap_r, mpu4_vid_unmap_w) */ AM_RANGE(0xb00000, 0xb0000f) AM_DEVREADWRITE8("scn2674_vid", scn2674_device, read, write,0x00ff) AM_RANGE(0xc00000, 0xc1ffff) AM_READWRITE(mpu4_vid_vidram_r, mpu4_vid_vidram_w) AM_SHARE("vid_vidram") - AM_RANGE(0xe00000, 0xe00001) AM_DEVREADWRITE8("acia6850_1", acia6850_device, status_r, control_w, 0x00ff) - AM_RANGE(0xe00002, 0xe00003) AM_DEVREADWRITE8("acia6850_1", acia6850_device, data_r, data_w, 0x00ff) + AM_RANGE(0xe00000, 0xe00003) AM_DEVREADWRITE8("acia6850_1", acia6850_device, read, write, 0x00ff) AM_RANGE(0xe01000, 0xe0100f) AM_DEVREADWRITE8("6840ptm_68k", ptm6840_device, read, write, 0x00ff) AM_RANGE(0xe02000, 0xe02007) AM_DEVREADWRITE8("pia_ic4ss", pia6821_device, read, write, 0xff00) //Seems odd... AM_RANGE(0xe03000, 0xe0300f) AM_DEVREAD8("ptm_ic3ss", ptm6840_device, read,0xff00) // 6840PTM on sampled sound board @@ -1246,8 +1242,7 @@ ADDRESS_MAP_END /* TODO: Fix up MPU4 map*/ static ADDRESS_MAP_START( mpu4_6809_map, AS_PROGRAM, 8, mpu4_state ) AM_RANGE(0x0000, 0x07ff) AM_RAM AM_SHARE("nvram") - AM_RANGE(0x0800, 0x0800) AM_DEVREADWRITE("acia6850_0", acia6850_device, status_r, control_w) - AM_RANGE(0x0801, 0x0801) AM_DEVREADWRITE("acia6850_0", acia6850_device, data_r, data_w) + AM_RANGE(0x0800, 0x0801) AM_DEVREADWRITE("acia6850_0", acia6850_device, read, write) AM_RANGE(0x0880, 0x0881) AM_NOP //Read/write here AM_RANGE(0x0900, 0x0907) AM_DEVREADWRITE("ptm_ic2", ptm6840_device, read, write) AM_RANGE(0x0a00, 0x0a03) AM_DEVREADWRITE("pia_ic3", pia6821_device, read, write) diff --git a/src/mame/drivers/mquake.cpp b/src/mame/drivers/mquake.cpp index 4f9c087577b..c58c420aa0e 100644 --- a/src/mame/drivers/mquake.cpp +++ b/src/mame/drivers/mquake.cpp @@ -311,8 +311,8 @@ static MACHINE_CONFIG_START( mquake ) MCFG_DEVICE_ADD("overlay", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(overlay_512kb_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(22) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(22) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200000) MCFG_NVRAM_ADD_0FILL("nvram") diff --git a/src/mame/drivers/mstation.cpp b/src/mame/drivers/mstation.cpp index e0e4f67eb3f..c91fb7fefa4 100644 --- a/src/mame/drivers/mstation.cpp +++ b/src/mame/drivers/mstation.cpp @@ -470,13 +470,13 @@ static MACHINE_CONFIG_START( mstation ) MCFG_DEVICE_ADD("bank0", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(mstation_banked_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_DEVICE_ADD("bank1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(mstation_banked_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) /* internal ram */ diff --git a/src/mame/drivers/mtouchxl.cpp b/src/mame/drivers/mtouchxl.cpp index 42f22bd931c..e1fe37ad47e 100644 --- a/src/mame/drivers/mtouchxl.cpp +++ b/src/mame/drivers/mtouchxl.cpp @@ -242,7 +242,7 @@ static MACHINE_CONFIG_START( at486 ) MCFG_DEVICE_ADD("dbank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(dbank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000) /* Flash ROM */ diff --git a/src/mame/drivers/mx2178.cpp b/src/mame/drivers/mx2178.cpp index 28678dc94d3..29d4f11fdcb 100644 --- a/src/mame/drivers/mx2178.cpp +++ b/src/mame/drivers/mx2178.cpp @@ -65,10 +65,8 @@ static ADDRESS_MAP_START(mx2178_io, AS_IO, 8, mx2178_state) ADDRESS_MAP_GLOBAL_MASK(0xff) AM_RANGE(0x00, 0x00) AM_DEVREADWRITE("crtc", mc6845_device, status_r, address_w) AM_RANGE(0x01, 0x01) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w) - AM_RANGE(0x80, 0x80) AM_DEVREADWRITE("acia1", acia6850_device, status_r, control_w) - AM_RANGE(0x81, 0x81) AM_DEVREADWRITE("acia1", acia6850_device, data_r, data_w) - AM_RANGE(0xa0, 0xa0) AM_DEVREADWRITE("acia2", acia6850_device, status_r, control_w) - AM_RANGE(0xa1, 0xa1) AM_DEVREADWRITE("acia2", acia6850_device, data_r, data_w) + AM_RANGE(0x80, 0x81) AM_DEVREADWRITE("acia1", acia6850_device, read, write) + AM_RANGE(0xa0, 0xa1) AM_DEVREADWRITE("acia2", acia6850_device, read, write) ADDRESS_MAP_END diff --git a/src/mame/drivers/mz700.cpp b/src/mame/drivers/mz700.cpp index 197543a235f..70781085a1e 100644 --- a/src/mame/drivers/mz700.cpp +++ b/src/mame/drivers/mz700.cpp @@ -376,8 +376,8 @@ static MACHINE_CONFIG_START( mz700 ) MCFG_DEVICE_ADD("banke", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(mz700_banke) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000) MCFG_MACHINE_RESET_OVERRIDE(mz_state, mz700) @@ -442,8 +442,8 @@ static MACHINE_CONFIG_DERIVED( mz800, mz700 ) MCFG_DEVICE_ADD("bankf", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(mz800_bankf) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000) MCFG_MACHINE_RESET_OVERRIDE(mz_state, mz800) diff --git a/src/mame/drivers/nds.cpp b/src/mame/drivers/nds.cpp index 58c396b7c18..1effc73ba92 100644 --- a/src/mame/drivers/nds.cpp +++ b/src/mame/drivers/nds.cpp @@ -978,13 +978,13 @@ static MACHINE_CONFIG_START( nds ) MCFG_DEVICE_ADD("nds7wram", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(nds7_wram_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000) MCFG_DEVICE_ADD("nds9wram", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(nds9_wram_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000) MACHINE_CONFIG_END diff --git a/src/mame/drivers/nes_vt.cpp b/src/mame/drivers/nes_vt.cpp index c3607c47ede..b54b89cd866 100644 --- a/src/mame/drivers/nes_vt.cpp +++ b/src/mame/drivers/nes_vt.cpp @@ -840,8 +840,8 @@ static MACHINE_CONFIG_START( nes_vt ) MCFG_DEVICE_ADD("prg", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(prg_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(15) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(15) MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000) MCFG_NES_CONTROL_PORT_ADD("ctrl1", nes_control_port1_devices, "joypad") diff --git a/src/mame/drivers/ob68k1a.cpp b/src/mame/drivers/ob68k1a.cpp index a16adabb45a..e8cb1a9ccbd 100644 --- a/src/mame/drivers/ob68k1a.cpp +++ b/src/mame/drivers/ob68k1a.cpp @@ -121,11 +121,9 @@ static ADDRESS_MAP_START( ob68k1a_mem, AS_PROGRAM, 16, ob68k1a_state ) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x000000, 0x01ffff) AM_RAM AM_RANGE(0xfe0000, 0xfeffff) AM_ROM AM_REGION(MC68000L10_TAG, 0) - AM_RANGE(0xffff00, 0xffff01) AM_DEVREADWRITE8(MC6850_0_TAG, acia6850_device, status_r, control_w, 0x00ff) - AM_RANGE(0xffff02, 0xffff03) AM_DEVREADWRITE8(MC6850_0_TAG, acia6850_device, data_r, data_w, 0x00ff) + AM_RANGE(0xffff00, 0xffff03) AM_DEVREADWRITE8(MC6850_0_TAG, acia6850_device, read, write, 0x00ff) AM_RANGE(0xffff10, 0xffff11) AM_WRITE8(com8116_w, 0xff00) - AM_RANGE(0xffff20, 0xffff21) AM_DEVREADWRITE8(MC6850_1_TAG, acia6850_device, status_r, control_w, 0x00ff) - AM_RANGE(0xffff22, 0xffff23) AM_DEVREADWRITE8(MC6850_1_TAG, acia6850_device, data_r, data_w, 0x00ff) + AM_RANGE(0xffff20, 0xffff23) AM_DEVREADWRITE8(MC6850_1_TAG, acia6850_device, read, write, 0x00ff) // AM_RANGE(0xffff40, 0xffff47) AM_DEVREADWRITE8(MC6821_0_TAG, pia6821_device, read, write, 0x00ff) // AM_RANGE(0xffff40, 0xffff47) AM_DEVREADWRITE8(MC6821_1_TAG, pia6821_device, read, write, 0xff00) AM_RANGE(0xffff40, 0xffff47) AM_READWRITE8(pia_r, pia_w, 0xffff) diff --git a/src/mame/drivers/octopus.cpp b/src/mame/drivers/octopus.cpp index 3ec7072d6ce..23340b81a80 100644 --- a/src/mame/drivers/octopus.cpp +++ b/src/mame/drivers/octopus.cpp @@ -1002,7 +1002,7 @@ static MACHINE_CONFIG_START( octopus ) MCFG_DEVICE_ADD("z80_bank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(octopus_mem) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000) MCFG_RAM_ADD("ram") diff --git a/src/mame/drivers/osi.cpp b/src/mame/drivers/osi.cpp index 08ca2ec45db..c05dddff594 100644 --- a/src/mame/drivers/osi.cpp +++ b/src/mame/drivers/osi.cpp @@ -453,8 +453,7 @@ static ADDRESS_MAP_START( osi600_mem, AS_PROGRAM, 8, sb2m600_state ) AM_RANGE(0xa000, 0xbfff) AM_ROM AM_RANGE(0xd000, 0xd3ff) AM_RAM AM_SHARE("video_ram") AM_RANGE(0xdf00, 0xdf00) AM_READWRITE(keyboard_r, keyboard_w) - AM_RANGE(0xf000, 0xf000) AM_DEVREADWRITE("acia_0", acia6850_device, status_r, control_w) - AM_RANGE(0xf001, 0xf001) AM_DEVREADWRITE("acia_0", acia6850_device, data_r, data_w) + AM_RANGE(0xf000, 0xf001) AM_DEVREADWRITE("acia_0", acia6850_device, read, write) AM_RANGE(0xf800, 0xffff) AM_ROM ADDRESS_MAP_END @@ -464,8 +463,7 @@ static ADDRESS_MAP_START( uk101_mem, AS_PROGRAM, 8, uk101_state ) AM_RANGE(0xd000, 0xd3ff) AM_RAM AM_SHARE("video_ram") AM_RANGE(0xd400, 0xd7ff) AM_NOP // bios sets this to spaces at boot AM_RANGE(0xdc00, 0xdfff) AM_READ(keyboard_r) AM_WRITE(keyboard_w) - AM_RANGE(0xf000, 0xf000) AM_MIRROR(0x00fe) AM_DEVREADWRITE("acia_0", acia6850_device, status_r, control_w) - AM_RANGE(0xf001, 0xf001) AM_MIRROR(0x00fe) AM_DEVREADWRITE("acia_0", acia6850_device, data_r, data_w) + AM_RANGE(0xf000, 0xf001) AM_MIRROR(0x00fe) AM_DEVREADWRITE("acia_0", acia6850_device, read, write) AM_RANGE(0xf800, 0xffff) AM_ROM ADDRESS_MAP_END @@ -479,8 +477,7 @@ static ADDRESS_MAP_START( c1p_mem, AS_PROGRAM, 8, c1p_state ) AM_RANGE(0xd400, 0xd7ff) AM_RAM AM_SHARE("color_ram") AM_RANGE(0xd800, 0xd800) AM_WRITE(ctrl_w) AM_RANGE(0xdf00, 0xdf00) AM_READWRITE(keyboard_r, keyboard_w) - AM_RANGE(0xf000, 0xf000) AM_DEVREADWRITE("acia_0", acia6850_device, status_r, control_w) - AM_RANGE(0xf001, 0xf001) AM_DEVREADWRITE("acia_0", acia6850_device, data_r, data_w) + AM_RANGE(0xf000, 0xf001) AM_DEVREADWRITE("acia_0", acia6850_device, read, write) AM_RANGE(0xf7c0, 0xf7c0) AM_WRITE(osi630_sound_w) AM_RANGE(0xf7e0, 0xf7e0) AM_WRITE(osi630_ctrl_w) AM_RANGE(0xf800, 0xffff) AM_ROM @@ -490,8 +487,7 @@ static ADDRESS_MAP_START( c1pmf_mem, AS_PROGRAM, 8, c1pmf_state ) AM_RANGE(0x0000, 0x4fff) AM_RAMBANK("bank1") AM_RANGE(0xa000, 0xbfff) AM_ROM AM_RANGE(0xc000, 0xc003) AM_DEVREADWRITE("pia_0", pia6821_device, read, write) // FDC - AM_RANGE(0xc010, 0xc010) AM_DEVREADWRITE("acia_1", acia6850_device, status_r, control_w) - AM_RANGE(0xc011, 0xc011) AM_DEVREADWRITE("acia_1", acia6850_device, data_r, data_w) + AM_RANGE(0xc010, 0xc011) AM_DEVREADWRITE("acia_1", acia6850_device, read, write) AM_RANGE(0xc704, 0xc707) AM_DEVREADWRITE("pia_1", pia6821_device, read, write) AM_RANGE(0xc708, 0xc70b) AM_DEVREADWRITE("pia_2", pia6821_device, read, write) AM_RANGE(0xc70c, 0xc70f) AM_DEVREADWRITE("pia_3", pia6821_device, read, write) @@ -499,8 +495,7 @@ static ADDRESS_MAP_START( c1pmf_mem, AS_PROGRAM, 8, c1pmf_state ) AM_RANGE(0xd400, 0xd7ff) AM_RAM AM_SHARE("color_ram") AM_RANGE(0xd800, 0xd800) AM_WRITE(ctrl_w) AM_RANGE(0xdf00, 0xdf00) AM_READWRITE(keyboard_r, keyboard_w) - AM_RANGE(0xf000, 0xf000) AM_DEVREADWRITE("acia_0", acia6850_device, status_r, control_w) - AM_RANGE(0xf001, 0xf001) AM_DEVREADWRITE("acia_0", acia6850_device, data_r, data_w) + AM_RANGE(0xf000, 0xf001) AM_DEVREADWRITE("acia_0", acia6850_device, read, write) AM_RANGE(0xf7c0, 0xf7c0) AM_WRITE(osi630_sound_w) AM_RANGE(0xf7e0, 0xf7e0) AM_WRITE(osi630_ctrl_w) AM_RANGE(0xf800, 0xffff) AM_ROM diff --git a/src/mame/drivers/parodius.cpp b/src/mame/drivers/parodius.cpp index c61f742a184..63c6c778fca 100644 --- a/src/mame/drivers/parodius.cpp +++ b/src/mame/drivers/parodius.cpp @@ -238,15 +238,15 @@ static MACHINE_CONFIG_START( parodius ) MCFG_DEVICE_ADD("bank0000", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank0000_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(13) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(13) MCFG_ADDRESS_MAP_BANK_STRIDE(0x0800) MCFG_DEVICE_ADD("bank2000", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank2000_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(12) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(12) MCFG_ADDRESS_MAP_BANK_STRIDE(0x0800) MCFG_WATCHDOG_ADD("watchdog") diff --git a/src/mame/drivers/pasogo.cpp b/src/mame/drivers/pasogo.cpp index baa205f86be..f9eb18c9e66 100644 --- a/src/mame/drivers/pasogo.cpp +++ b/src/mame/drivers/pasogo.cpp @@ -544,7 +544,7 @@ static MACHINE_CONFIG_START( pasogo ) MCFG_DEVICE_ADD("ems", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(emsbank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_IBM5160_MOTHERBOARD_ADD("mb", "maincpu") diff --git a/src/mame/drivers/pc9801.cpp b/src/mame/drivers/pc9801.cpp index be1e38219af..036cccbd006 100644 --- a/src/mame/drivers/pc9801.cpp +++ b/src/mame/drivers/pc9801.cpp @@ -2396,8 +2396,8 @@ static MACHINE_CONFIG_START( pc9801rs ) MCFG_DEVICE_ADD("ipl_bank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(ipl_bank) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(18) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(18) MCFG_ADDRESS_MAP_BANK_STRIDE(0x18000) MCFG_MACHINE_START_OVERRIDE(pc9801_state,pc9801rs) diff --git a/src/mame/drivers/pcxt.cpp b/src/mame/drivers/pcxt.cpp index 42bfd095cbf..0f766aa0473 100644 --- a/src/mame/drivers/pcxt.cpp +++ b/src/mame/drivers/pcxt.cpp @@ -496,8 +496,8 @@ static MACHINE_CONFIG_START( filetto ) MCFG_DEVICE_ADD("bank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(18) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(18) MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000) MACHINE_CONFIG_END diff --git a/src/mame/drivers/pengadvb.cpp b/src/mame/drivers/pengadvb.cpp index 60ccb7c1505..f10f8c72359 100644 --- a/src/mame/drivers/pengadvb.cpp +++ b/src/mame/drivers/pengadvb.cpp @@ -214,29 +214,29 @@ static MACHINE_CONFIG_START( pengadvb ) MCFG_DEVICE_ADD("page0", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank_mem) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(18) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(18) MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000) MCFG_DEVICE_ADD("page1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank_mem) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(18) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(18) MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000) MCFG_DEVICE_ADD("page2", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank_mem) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(18) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(18) MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000) MCFG_DEVICE_ADD("page3", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank_mem) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(18) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(18) MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000) MCFG_DEVICE_ADD("ppi8255", I8255, 0) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index ea1b2206695..d28f0fac442 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -64,6 +64,13 @@ READ32_MEMBER(pgm2_state::unk_startup_r) return 0x00000180; } +READ32_MEMBER(pgm2_state::rtc_r) +{ + // write to FFFFFD20 if bit 18 set (0x40000) probably reset this RTC timer + // TODO: somehow hook here current time/date, which is a bit complicated because value is relative, later to it added "base time" stored in SRAM + return machine().time().seconds(); +} + INTERRUPT_GEN_MEMBER(pgm2_state::igs_interrupt) { m_arm_aic->set_irq(0x47); @@ -131,7 +138,7 @@ static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state ) AM_RANGE(0xfffff430, 0xfffff433) AM_WRITENOP // often AM_RANGE(0xfffff434, 0xfffff437) AM_WRITENOP // often - AM_RANGE(0xfffffd28, 0xfffffd2b) AM_READNOP // often + AM_RANGE(0xfffffd28, 0xfffffd2b) AM_READ(rtc_r) // AM_RANGE(0xfffffa08, 0xfffffa0b) AM_WRITE(table_done_w) // after uploading encryption? table might actually send it or enable external ROM? AM_RANGE(0xfffffa0c, 0xfffffa0f) AM_READ(unk_startup_r) @@ -690,38 +697,6 @@ DRIVER_INIT_MEMBER(pgm2_state,orleg2) decrypter.decrypter_rom(memregion("user1")); machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x20020114, 0x20020117, read32_delegate(FUNC(pgm2_state::orleg2_speedup_r),this)); - - /* HACK! - patch out an ingame assert that ends up being triggered after the 5 element / fire chariot boss due to an invalid value in R3 - todo: why does this happen? ARM core bug? is patching out the assert actually safe? game continues as normal like this, but there could be memory corruption. - */ - uint16_t* rom; - rom = (uint16_t*)memregion("user1")->base(); - int hackaddress = -1; - - if (rom[0x12620 / 2] == 0xd301) // 104 / 103 - { - hackaddress = 0x12620; // RAM: 10012620 - } - else if (rom[0x1257C / 2] == 0xd301) // 101 - { - hackaddress = 0x1257C; - } - - if (hackaddress != -1) - { - rom[(hackaddress + 2) / 2] = 0x2300; - rom[(hackaddress + 4) / 2] = 0x2300; - rom = (uint16_t*)memregion("maincpu")->base(); // BEQ -> BNE for checksum - rom[0x39f2 / 2] = 0x1a00; - - // set a breakpoint on 0x10000000 + hackaddress to see when it triggers - } - else - { - fatalerror("no patch for this set \n"); - } - } DRIVER_INIT_MEMBER(pgm2_state,kov2nl) diff --git a/src/mame/drivers/poly.cpp b/src/mame/drivers/poly.cpp index 51e62ddeb7c..eed42548906 100644 --- a/src/mame/drivers/poly.cpp +++ b/src/mame/drivers/poly.cpp @@ -86,8 +86,7 @@ static ADDRESS_MAP_START(poly_mem, AS_PROGRAM, 8, poly_state) AM_RANGE(0xa000,0xcfff) AM_ROM AM_RANGE(0xd000,0xdfff) AM_RAM AM_RANGE(0xe000,0xe003) AM_DEVREADWRITE("pia0", pia6821_device, read, write) //video control PIA 6821 - AM_RANGE(0xe004,0xe004) AM_DEVREADWRITE("acia", acia6850_device, status_r, control_w) - AM_RANGE(0xe005,0xe005) AM_DEVREADWRITE("acia", acia6850_device, data_r, data_w) + AM_RANGE(0xe004,0xe005) AM_DEVREADWRITE("acia", acia6850_device, read, write) AM_RANGE(0xe006,0xe006) AM_WRITE(baud_rate_w) AM_RANGE(0xe00c,0xe00f) AM_DEVREADWRITE("pia1", pia6821_device, read, write) //keyboard PIA 6821 AM_RANGE(0xe020,0xe027) AM_DEVREADWRITE("ptm", ptm6840_device, read, write) //timer 6840 diff --git a/src/mame/drivers/poly88.cpp b/src/mame/drivers/poly88.cpp index e81f50b85f8..af60dced0a5 100644 --- a/src/mame/drivers/poly88.cpp +++ b/src/mame/drivers/poly88.cpp @@ -15,14 +15,25 @@ Poly-8813 is a disk-based computer with 3 mini-floppy drives. Booting is done by pressing the "Load" button, mounted on the front panel near the power switch. Although user manuals are easy - to obtain, technical information and schematics are not. The bios - makes use of illegal instructions which we do not correctly emulate. - The first of these is at 0x006A (print a character routine), while - the other is at 0x0100 (an internal copy routine). The code at 0x100 - can be replaced by 7E 12 13 23 03 79 B0 C2 00 01 C9, which exactly - fits into the available space. The disk format is known to be - 256 bytes per sector, 10 sectors per track, 35 tracks, single sided, - for a total of 89600 bytes. + to obtain, technical information and drive controller schematics + are not. The disk format is known to be 256 bytes per sector, 10 + sectors per track, 35 tracks, single sided, for a total of 89600 + bytes. + + The Poly-8813 BIOS makes use of undocumented instructions which we + do not currently emulate. These are at 006A (print a character + routine - ED ED 05); another is at 0100 (move memory routine - + ED ED 03); the last is at 087B (disk I/O routine - ED ED 01). The + code at 0100 can be replaced by 7E 12 13 23 03 79 B0 C2 00 01 C9, + which exactly fits into the available space. The routine at 006A is + likewise could be exactly replaced with F5 C5 D5 E5, which enters + a display routine that appears in other assembly listings but seems + to have no entry point here. Since the ED ED opcode is defined as + for CALLN in the NEC V20/V30's 8080 mode, it might be the case that + these are actually hooks patched into the original code for + emulation purposes. (There is also a slim possibility that this + opcode invokes an undocumented feature of the NEC uPD8080AF, which + at least some models of the Poly-88 are known to have used.) ****************************************************************************/ diff --git a/src/mame/drivers/prophet600.cpp b/src/mame/drivers/prophet600.cpp index a03acd14202..6eb4f7f888c 100644 --- a/src/mame/drivers/prophet600.cpp +++ b/src/mame/drivers/prophet600.cpp @@ -241,10 +241,8 @@ static ADDRESS_MAP_START( cpu_map, AS_PROGRAM, 8, prophet600_state ) AM_RANGE(0x2000, 0x27ff) AM_RAM AM_RANGE(0x3000, 0x37ff) AM_RAM AM_RANGE(0x4000, 0x4001) AM_WRITE(dac_w) - AM_RANGE(0x6000, 0x6000) AM_DEVWRITE(UART_TAG, acia6850_device, control_w) - AM_RANGE(0x6001, 0x6001) AM_DEVWRITE(UART_TAG, acia6850_device, data_w) - AM_RANGE(0xe000, 0xe000) AM_DEVREAD(UART_TAG, acia6850_device, status_r) - AM_RANGE(0xe001, 0xe001) AM_DEVREAD(UART_TAG, acia6850_device, data_r) + AM_RANGE(0x6000, 0x6001) AM_DEVWRITE(UART_TAG, acia6850_device, write) + AM_RANGE(0xe000, 0xe001) AM_DEVREAD(UART_TAG, acia6850_device, read) ADDRESS_MAP_END static ADDRESS_MAP_START( io_map, AS_IO, 8, prophet600_state ) diff --git a/src/mame/drivers/proteus3.cpp b/src/mame/drivers/proteus3.cpp index 346553ac360..99caab87a81 100644 --- a/src/mame/drivers/proteus3.cpp +++ b/src/mame/drivers/proteus3.cpp @@ -138,10 +138,8 @@ static ADDRESS_MAP_START(proteus3_mem, AS_PROGRAM, 8, proteus3_state) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x0000, 0x7fff) AM_RAM AM_RANGE(0x8004, 0x8007) AM_DEVREADWRITE("pia", pia6821_device, read, write) - AM_RANGE(0x8008, 0x8008) AM_DEVREADWRITE("acia1", acia6850_device, status_r, control_w) // cassette - AM_RANGE(0x8009, 0x8009) AM_DEVREADWRITE("acia1", acia6850_device, data_r, data_w) - AM_RANGE(0x8010, 0x8010) AM_DEVREADWRITE("acia2", acia6850_device, status_r, control_w) // serial keyboard - AM_RANGE(0x8011, 0x8011) AM_DEVREADWRITE("acia2", acia6850_device, data_r, data_w) // never writes data + AM_RANGE(0x8008, 0x8009) AM_DEVREADWRITE("acia1", acia6850_device, read, write) // cassette + AM_RANGE(0x8010, 0x8011) AM_DEVREADWRITE("acia2", acia6850_device, read, write) // serial keyboard (never writes data) AM_RANGE(0xc000, 0xffff) AM_ROM ADDRESS_MAP_END diff --git a/src/mame/drivers/psychic5.cpp b/src/mame/drivers/psychic5.cpp index 10a710e9de8..c359fdbc64e 100644 --- a/src/mame/drivers/psychic5.cpp +++ b/src/mame/drivers/psychic5.cpp @@ -722,8 +722,8 @@ static MACHINE_CONFIG_START( psychic5 ) MCFG_DEVICE_ADD("vrambank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(psychic5_vrambank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(14) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(14) MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000) MCFG_CPU_ADD("audiocpu", Z80, XTAL_5MHz) @@ -776,8 +776,8 @@ static MACHINE_CONFIG_START( bombsa ) MCFG_DEVICE_ADD("vrambank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bombsa_vrambank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(14) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(14) MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000) MCFG_CPU_ADD("audiocpu", Z80, XTAL_5MHz ) diff --git a/src/mame/drivers/pwrview.cpp b/src/mame/drivers/pwrview.cpp index 68830d1a6d9..413823f8831 100644 --- a/src/mame/drivers/pwrview.cpp +++ b/src/mame/drivers/pwrview.cpp @@ -380,8 +380,8 @@ static MACHINE_CONFIG_START( pwrview ) MCFG_DEVICE_ADD("bios_bank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bios_bank) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(17) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(17) MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000) MACHINE_CONFIG_END diff --git a/src/mame/drivers/rex6000.cpp b/src/mame/drivers/rex6000.cpp index ecf130f3dc8..5e1c6f53e28 100644 --- a/src/mame/drivers/rex6000.cpp +++ b/src/mame/drivers/rex6000.cpp @@ -898,13 +898,13 @@ static MACHINE_CONFIG_START( rex6000 ) MCFG_DEVICE_ADD("bank0", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(rex6000_banked_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000) MCFG_DEVICE_ADD("bank1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(rex6000_banked_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000) MCFG_DEVICE_ADD( "ns16550", NS16550, XTAL_1_8432MHz ) @@ -987,13 +987,13 @@ static MACHINE_CONFIG_START( oz750 ) MCFG_DEVICE_ADD("bank0", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(oz750_banked_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000) MCFG_DEVICE_ADD("bank1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(oz750_banked_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000) /* quickload */ diff --git a/src/mame/drivers/sdk86.cpp b/src/mame/drivers/sdk86.cpp index 0ca083a2898..510a819db78 100644 --- a/src/mame/drivers/sdk86.cpp +++ b/src/mame/drivers/sdk86.cpp @@ -2,7 +2,7 @@ // copyright-holders:Miodrag Milanovic, Jonathan Gevaryahu, Robbbert /*************************************************************************** - Intel SDK-86 + Intel MCS-86 System Design Kit (SDK-86) 12/05/2009 Skeleton driver by Micko 29/11/2009 Some fleshing out by Lord Nightmare @@ -31,6 +31,7 @@ ToDo: #include "cpu/i86/i86.h" #include "machine/clock.h" #include "machine/i8251.h" +#include "machine/i8255.h" #include "machine/i8279.h" #include "sdk86.lh" @@ -65,8 +66,8 @@ static ADDRESS_MAP_START(sdk86_io, AS_IO, 16, sdk86_state) AM_RANGE(0xfff0, 0xfff1) AM_MIRROR(4) AM_DEVREADWRITE8(I8251_TAG, i8251_device, data_r, data_w, 0xff) AM_RANGE(0xfff2, 0xfff3) AM_MIRROR(4) AM_DEVREADWRITE8(I8251_TAG, i8251_device, status_r, control_w, 0xff) AM_RANGE(0xffe8, 0xffeb) AM_MIRROR(4) AM_DEVREADWRITE8("i8279", i8279_device, read, write, 0xff) - // FFF8-FFFF = 2 x 8255A i/o chips. chip 1 uses the odd addresses, chip 2 uses the even addresses. - // ports are A,B,C,control in that order. + AM_RANGE(0xfff8, 0xffff) AM_DEVREADWRITE8("port1", i8255_device, read, write, 0xff00) + AM_RANGE(0xfff8, 0xffff) AM_DEVREADWRITE8("port2", i8255_device, read, write, 0x00ff) ADDRESS_MAP_END /* Input ports */ @@ -155,7 +156,7 @@ static MACHINE_CONFIG_START( sdk86 ) MCFG_RS232_DSR_HANDLER(DEVWRITELINE(I8251_TAG, i8251_device, write_dsr)) MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("terminal", terminal) - MCFG_DEVICE_ADD("usart_clock", CLOCK, 307200) + MCFG_DEVICE_ADD("usart_clock", CLOCK, XTAL_14_7456MHz/3/16) MCFG_CLOCK_SIGNAL_HANDLER(DEVWRITELINE(I8251_TAG, i8251_device, write_txc)) MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE(I8251_TAG, i8251_device, write_rxc)) @@ -166,6 +167,8 @@ static MACHINE_CONFIG_START( sdk86 ) MCFG_I8279_IN_SHIFT_CB(GND) // Shift key MCFG_I8279_IN_CTRL_CB(GND) + MCFG_DEVICE_ADD("port1", I8255A, 0) + MCFG_DEVICE_ADD("port2", I8255A, 0) MACHINE_CONFIG_END /* ROM definition */ @@ -209,4 +212,4 @@ ROM_END /* Driver */ /* YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS */ -COMP( 1979, sdk86, 0, 0, sdk86, sdk86, sdk86_state, 0, "Intel", "SDK-86", MACHINE_NO_SOUND_HW) +COMP( 1979, sdk86, 0, 0, sdk86, sdk86, sdk86_state, 0, "Intel", "MCS-86 System Design Kit", MACHINE_NO_SOUND_HW) diff --git a/src/mame/drivers/simpsons.cpp b/src/mame/drivers/simpsons.cpp index 52fbcf9506b..cf9ecf32def 100644 --- a/src/mame/drivers/simpsons.cpp +++ b/src/mame/drivers/simpsons.cpp @@ -331,15 +331,15 @@ static MACHINE_CONFIG_START( simpsons ) MCFG_DEVICE_ADD("bank0000", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank0000_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(13) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(13) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000) MCFG_DEVICE_ADD("bank2000", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank2000_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(14) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(14) MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000) MCFG_EEPROM_SERIAL_ER5911_8BIT_ADD("eeprom") diff --git a/src/mame/drivers/sitcom.cpp b/src/mame/drivers/sitcom.cpp index 16ede822bb2..a23a0cc3f5e 100644 --- a/src/mame/drivers/sitcom.cpp +++ b/src/mame/drivers/sitcom.cpp @@ -340,8 +340,8 @@ MACHINE_CONFIG_START( sitcom ) MCFG_DEVICE_ADD("bank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(sitcom_bank) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000) MCFG_CLOCK_ADD("100hz", 100) diff --git a/src/mame/drivers/sm7238.cpp b/src/mame/drivers/sm7238.cpp index dc16cb0d642..10a95e6f859 100644 --- a/src/mame/drivers/sm7238.cpp +++ b/src/mame/drivers/sm7238.cpp @@ -362,7 +362,7 @@ static MACHINE_CONFIG_START( sm7238 ) MCFG_DEVICE_ADD("videobank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(videobank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000) MCFG_NVRAM_ADD_0FILL("nvram") diff --git a/src/mame/drivers/socrates.cpp b/src/mame/drivers/socrates.cpp index a9f114dac0b..aa48b8ee051 100644 --- a/src/mame/drivers/socrates.cpp +++ b/src/mame/drivers/socrates.cpp @@ -1454,19 +1454,19 @@ static MACHINE_CONFIG_START( socrates ) MCFG_DEVICE_ADD("rombank1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(socrates_rombank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_DEVICE_ADD("rambank1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(socrates_rambank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_DEVICE_ADD("rambank2", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(socrates_rambank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) /* video hardware */ @@ -1520,25 +1520,25 @@ static MACHINE_CONFIG_START( iqunlimz ) MCFG_DEVICE_ADD("rombank1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(iqunlimz_rombank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_DEVICE_ADD("rombank2", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(iqunlimz_rombank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_DEVICE_ADD("rambank1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(iqunlimz_rambank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_DEVICE_ADD("rambank2", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(iqunlimz_rambank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) /* video hardware */ diff --git a/src/mame/drivers/sun2.cpp b/src/mame/drivers/sun2.cpp index 6579402b176..740804d1665 100644 --- a/src/mame/drivers/sun2.cpp +++ b/src/mame/drivers/sun2.cpp @@ -601,28 +601,28 @@ static MACHINE_CONFIG_START( sun2vme ) MCFG_DEVICE_ADD("type0", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vmetype0space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000000) // MMU Type 1 device space MCFG_DEVICE_ADD("type1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vmetype1space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000000) // MMU Type 2 device space MCFG_DEVICE_ADD("type2", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vmetype2space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000000) // MMU Type 3 device space MCFG_DEVICE_ADD("type3", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vmetype3space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000000) MCFG_SCREEN_ADD("bwtwo", RASTER) @@ -673,28 +673,28 @@ static MACHINE_CONFIG_START( sun2mbus ) MCFG_DEVICE_ADD("type0", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(mbustype0space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000000) // MMU Type 1 device space MCFG_DEVICE_ADD("type1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(mbustype1space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000000) // MMU Type 2 device space MCFG_DEVICE_ADD("type2", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(mbustype2space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000000) // MMU Type 3 device space MCFG_DEVICE_ADD("type3", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(mbustype3space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000000) MCFG_SCREEN_ADD("bwtwo", RASTER) diff --git a/src/mame/drivers/sun3.cpp b/src/mame/drivers/sun3.cpp index f19e4bf33e4..ec0835abfa9 100644 --- a/src/mame/drivers/sun3.cpp +++ b/src/mame/drivers/sun3.cpp @@ -973,28 +973,28 @@ static MACHINE_CONFIG_START( sun3 ) MCFG_DEVICE_ADD("type0", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vmetype0space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) MCFG_ADDRESS_MAP_BANK_STRIDE(0x80000000) // MMU Type 1 device space MCFG_DEVICE_ADD("type1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vmetype1space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) MCFG_ADDRESS_MAP_BANK_STRIDE(0x80000000) // MMU Type 2 device space MCFG_DEVICE_ADD("type2", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vmetype2space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) MCFG_ADDRESS_MAP_BANK_STRIDE(0x80000000) // MMU Type 3 device space MCFG_DEVICE_ADD("type3", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vmetype3space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) MCFG_ADDRESS_MAP_BANK_STRIDE(0x80000000) MCFG_TIMER_DRIVER_ADD_PERIODIC("timer", sun3_state, sun3_timer, attotime::from_hz(100)) @@ -1077,28 +1077,28 @@ static MACHINE_CONFIG_START( sun3_50 ) MCFG_DEVICE_ADD("type0", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vmetype0space_novram_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) MCFG_ADDRESS_MAP_BANK_STRIDE(0x80000000) // MMU Type 1 device space MCFG_DEVICE_ADD("type1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vmetype1space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) MCFG_ADDRESS_MAP_BANK_STRIDE(0x80000000) // MMU Type 2 device space MCFG_DEVICE_ADD("type2", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vmetype2space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) MCFG_ADDRESS_MAP_BANK_STRIDE(0x80000000) // MMU Type 3 device space MCFG_DEVICE_ADD("type3", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vmetype3space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) MCFG_ADDRESS_MAP_BANK_STRIDE(0x80000000) MCFG_SCC8530_ADD(SCC1_TAG, XTAL_4_9152MHz, 0, 0, 0, 0) diff --git a/src/mame/drivers/sun4.cpp b/src/mame/drivers/sun4.cpp index 925905db48a..6470413eafe 100644 --- a/src/mame/drivers/sun4.cpp +++ b/src/mame/drivers/sun4.cpp @@ -1909,14 +1909,14 @@ static MACHINE_CONFIG_START( sun4 ) MCFG_DEVICE_ADD("type0", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(type0space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) MCFG_ADDRESS_MAP_BANK_STRIDE(0x80000000) // MMU Type 1 device space MCFG_DEVICE_ADD("type1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(type1space_s4_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) MCFG_ADDRESS_MAP_BANK_STRIDE(0x80000000) // Keyboard/mouse @@ -1974,14 +1974,14 @@ static MACHINE_CONFIG_START( sun4c ) MCFG_DEVICE_ADD("type0", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(type0space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) MCFG_ADDRESS_MAP_BANK_STRIDE(0x80000000) // MMU Type 1 device space MCFG_DEVICE_ADD("type1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(type1space_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32) MCFG_ADDRESS_MAP_BANK_STRIDE(0x80000000) // Keyboard/mouse diff --git a/src/mame/drivers/surpratk.cpp b/src/mame/drivers/surpratk.cpp index d9bbb1f316a..17a94814974 100644 --- a/src/mame/drivers/surpratk.cpp +++ b/src/mame/drivers/surpratk.cpp @@ -177,8 +177,8 @@ static MACHINE_CONFIG_START( surpratk ) MCFG_DEVICE_ADD("bank0000", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank0000_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(13) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(13) MCFG_ADDRESS_MAP_BANK_STRIDE(0x800) MCFG_WATCHDOG_ADD("watchdog") diff --git a/src/mame/drivers/svi318.cpp b/src/mame/drivers/svi318.cpp index bb8aec7062d..58890dc1278 100644 --- a/src/mame/drivers/svi318.cpp +++ b/src/mame/drivers/svi318.cpp @@ -529,8 +529,8 @@ static MACHINE_CONFIG_START( svi318 ) MCFG_DEVICE_ADD("io", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(svi3x8_io_bank) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(9) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(9) MCFG_ADDRESS_MAP_BANK_STRIDE(0x100) MCFG_DEVICE_ADD("ppi", I8255, 0) diff --git a/src/mame/drivers/swtpc.cpp b/src/mame/drivers/swtpc.cpp index b801b10c34c..cd7acfc2461 100644 --- a/src/mame/drivers/swtpc.cpp +++ b/src/mame/drivers/swtpc.cpp @@ -16,11 +16,7 @@ Note: All commands must be in uppercase. See the SWTBUG manual. ToDo: - - Support selectable baud rate clocks (110, 150, 300, 600, 1200) - - Implement interface bus slots to allow selection of either MP-S - (ACIA) or MP-C or MP-L (PIA) for I/O slot #1 or seven other - fixed-address I/O slots - - Add DC-4 (WD1797 FDC) interface board as I/O slot option + - Add more SS-50 interface slot options - Emulate MP-A2 revision of CPU board, with four 2716 ROM sockets and allowance for extra RAM boards at A000-BFFF and C000-DFFF @@ -44,10 +40,11 @@ Z Goto Prom (0xC000) #include "emu.h" #include "cpu/m6800/m6800.h" -#include "machine/6850acia.h" +#include "machine/input_merger.h" #include "machine/mc14411.h" #include "machine/ram.h" -#include "bus/rs232/rs232.h" +#include "bus/ss50/interface.h" +#include "bus/ss50/mps.h" class swtpc_state : public driver_device { @@ -69,8 +66,14 @@ private: static ADDRESS_MAP_START(mem_map, AS_PROGRAM, 8, swtpc_state) ADDRESS_MAP_UNMAP_HIGH - AM_RANGE(0x8004, 0x8004) AM_MIRROR(2) AM_DEVREADWRITE("acia", acia6850_device, status_r, control_w) - AM_RANGE(0x8005, 0x8005) AM_MIRROR(2) AM_DEVREADWRITE("acia", acia6850_device, data_r, data_w) + AM_RANGE(0x8000, 0x8003) AM_MIRROR(0x1fc0) AM_DEVREADWRITE("io0", ss50_interface_port_device, read, write) + AM_RANGE(0x8004, 0x8007) AM_MIRROR(0x1fc0) AM_DEVREADWRITE("io1", ss50_interface_port_device, read, write) + AM_RANGE(0x8008, 0x800b) AM_MIRROR(0x1fc0) AM_DEVREADWRITE("io2", ss50_interface_port_device, read, write) + AM_RANGE(0x800c, 0x800f) AM_MIRROR(0x1fc0) AM_DEVREADWRITE("io3", ss50_interface_port_device, read, write) + AM_RANGE(0x8010, 0x8013) AM_MIRROR(0x1fc0) AM_DEVREADWRITE("io4", ss50_interface_port_device, read, write) + AM_RANGE(0x8014, 0x8017) AM_MIRROR(0x1fc0) AM_DEVREADWRITE("io5", ss50_interface_port_device, read, write) + AM_RANGE(0x8018, 0x801b) AM_MIRROR(0x1fc0) AM_DEVREADWRITE("io6", ss50_interface_port_device, read, write) + AM_RANGE(0x801c, 0x801f) AM_MIRROR(0x1fc0) AM_DEVREADWRITE("io7", ss50_interface_port_device, read, write) AM_RANGE(0xa000, 0xa07f) AM_RAM // MCM6810 AM_RANGE(0xe000, 0xe3ff) AM_MIRROR(0x1c00) AM_ROM AM_REGION("mcm6830", 0) ADDRESS_MAP_END @@ -79,15 +82,6 @@ ADDRESS_MAP_END static INPUT_PORTS_START( swtpc ) INPUT_PORTS_END -static DEVICE_INPUT_DEFAULTS_START( terminal ) - DEVICE_INPUT_DEFAULTS( "RS232_RXBAUD", 0xff, RS232_BAUD_1200 ) - DEVICE_INPUT_DEFAULTS( "RS232_TXBAUD", 0xff, RS232_BAUD_1200 ) - DEVICE_INPUT_DEFAULTS( "RS232_STARTBITS", 0xff, RS232_STARTBITS_1 ) - DEVICE_INPUT_DEFAULTS( "RS232_DATABITS", 0xff, RS232_DATABITS_8 ) - DEVICE_INPUT_DEFAULTS( "RS232_PARITY", 0xff, RS232_PARITY_NONE ) - DEVICE_INPUT_DEFAULTS( "RS232_STOPBITS", 0xff, RS232_STOPBITS_1 ) -DEVICE_INPUT_DEFAULTS_END - void swtpc_state::machine_start() { @@ -102,20 +96,77 @@ static MACHINE_CONFIG_START( swtpc ) MCFG_CPU_ADD("maincpu", M6800, XTAL_1_8432MHz / 2) MCFG_CPU_PROGRAM_MAP(mem_map) - /* video hardware */ MCFG_DEVICE_ADD("brg", MC14411, XTAL_1_8432MHz) - MCFG_MC14411_F7_CB(DEVWRITELINE("acia", acia6850_device, write_txc)) - MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("acia", acia6850_device, write_rxc)) - // F8, F9, F11, F13 also present on system bus - - MCFG_DEVICE_ADD("acia", ACIA6850, 0) - MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd)) - MCFG_ACIA6850_RTS_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_rts)) - - MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal") - MCFG_RS232_RXD_HANDLER(DEVWRITELINE("acia", acia6850_device, write_rxd)) - MCFG_RS232_CTS_HANDLER(DEVWRITELINE("acia", acia6850_device, write_cts)) - MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("terminal", terminal) + MCFG_MC14411_F7_CB(DEVWRITELINE("io0", ss50_interface_port_device, f600_1200_w)) // 1200b + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io1", ss50_interface_port_device, f600_1200_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io2", ss50_interface_port_device, f600_1200_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io3", ss50_interface_port_device, f600_1200_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io4", ss50_interface_port_device, f600_1200_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io5", ss50_interface_port_device, f600_1200_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io6", ss50_interface_port_device, f600_1200_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io7", ss50_interface_port_device, f600_1200_w)) + MCFG_MC14411_F8_CB(DEVWRITELINE("io0", ss50_interface_port_device, f600_4800_w)) // 600b + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io1", ss50_interface_port_device, f600_4800_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io2", ss50_interface_port_device, f600_4800_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io3", ss50_interface_port_device, f600_4800_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io4", ss50_interface_port_device, f600_4800_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io5", ss50_interface_port_device, f600_4800_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io6", ss50_interface_port_device, f600_4800_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io7", ss50_interface_port_device, f600_4800_w)) + MCFG_MC14411_F9_CB(DEVWRITELINE("io0", ss50_interface_port_device, f300_w)) // 300b + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io1", ss50_interface_port_device, f300_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io2", ss50_interface_port_device, f300_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io3", ss50_interface_port_device, f300_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io4", ss50_interface_port_device, f300_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io5", ss50_interface_port_device, f300_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io6", ss50_interface_port_device, f300_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io7", ss50_interface_port_device, f300_w)) + MCFG_MC14411_F11_CB(DEVWRITELINE("io0", ss50_interface_port_device, f150_9600_w)) // 150b + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io1", ss50_interface_port_device, f150_9600_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io2", ss50_interface_port_device, f150_9600_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io3", ss50_interface_port_device, f150_9600_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io4", ss50_interface_port_device, f150_9600_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io5", ss50_interface_port_device, f150_9600_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io6", ss50_interface_port_device, f150_9600_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io7", ss50_interface_port_device, f150_9600_w)) + MCFG_MC14411_F13_CB(DEVWRITELINE("io0", ss50_interface_port_device, f110_w)) // 110b + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io1", ss50_interface_port_device, f110_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io2", ss50_interface_port_device, f110_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io3", ss50_interface_port_device, f110_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io4", ss50_interface_port_device, f110_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io5", ss50_interface_port_device, f110_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io6", ss50_interface_port_device, f110_w)) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("io7", ss50_interface_port_device, f110_w)) + + MCFG_SS50_INTERFACE_PORT_ADD("io0", default_2rs_devices, nullptr) + MCFG_SS50_INTERFACE_IRQ_CALLBACK(DEVWRITELINE("mainirq", input_merger_device, in_w<0>)) + MCFG_SS50_INTERFACE_FIRQ_CALLBACK(DEVWRITELINE("mainnmi", input_merger_device, in_w<0>)) + MCFG_SS50_INTERFACE_PORT_ADD("io1", default_2rs_devices, "mps") + MCFG_SS50_INTERFACE_IRQ_CALLBACK(DEVWRITELINE("mainirq", input_merger_device, in_w<1>)) + MCFG_SS50_INTERFACE_FIRQ_CALLBACK(DEVWRITELINE("mainnmi", input_merger_device, in_w<1>)) + MCFG_SS50_INTERFACE_PORT_ADD("io2", default_2rs_devices, nullptr) + MCFG_SS50_INTERFACE_IRQ_CALLBACK(DEVWRITELINE("mainirq", input_merger_device, in_w<2>)) + MCFG_SS50_INTERFACE_FIRQ_CALLBACK(DEVWRITELINE("mainnmi", input_merger_device, in_w<2>)) + MCFG_SS50_INTERFACE_PORT_ADD("io3", default_2rs_devices, nullptr) + MCFG_SS50_INTERFACE_IRQ_CALLBACK(DEVWRITELINE("mainirq", input_merger_device, in_w<3>)) + MCFG_SS50_INTERFACE_FIRQ_CALLBACK(DEVWRITELINE("mainnmi", input_merger_device, in_w<3>)) + MCFG_SS50_INTERFACE_PORT_ADD("io4", default_2rs_devices, nullptr) + MCFG_SS50_INTERFACE_IRQ_CALLBACK(DEVWRITELINE("mainirq", input_merger_device, in_w<4>)) + MCFG_SS50_INTERFACE_FIRQ_CALLBACK(DEVWRITELINE("mainnmi", input_merger_device, in_w<4>)) + MCFG_SS50_INTERFACE_PORT_ADD("io5", default_2rs_devices, nullptr) + MCFG_SS50_INTERFACE_IRQ_CALLBACK(DEVWRITELINE("mainirq", input_merger_device, in_w<5>)) + MCFG_SS50_INTERFACE_FIRQ_CALLBACK(DEVWRITELINE("mainnmi", input_merger_device, in_w<5>)) + MCFG_SS50_INTERFACE_PORT_ADD("io6", default_2rs_devices, nullptr) + MCFG_SS50_INTERFACE_IRQ_CALLBACK(DEVWRITELINE("mainirq", input_merger_device, in_w<6>)) + MCFG_SS50_INTERFACE_FIRQ_CALLBACK(DEVWRITELINE("mainnmi", input_merger_device, in_w<6>)) + MCFG_SS50_INTERFACE_PORT_ADD("io7", default_2rs_devices, nullptr) + MCFG_SS50_INTERFACE_IRQ_CALLBACK(DEVWRITELINE("mainirq", input_merger_device, in_w<7>)) + MCFG_SS50_INTERFACE_FIRQ_CALLBACK(DEVWRITELINE("mainnmi", input_merger_device, in_w<7>)) + + MCFG_INPUT_MERGER_ANY_HIGH("mainirq") + MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("maincpu", M6800_IRQ_LINE)) + MCFG_INPUT_MERGER_ANY_HIGH("mainnmi") + MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("maincpu", INPUT_LINE_NMI)) MCFG_RAM_ADD(RAM_TAG) MCFG_RAM_DEFAULT_SIZE("2K") @@ -128,6 +179,9 @@ static MACHINE_CONFIG_DERIVED( swtpcm, swtpc ) MCFG_DEVICE_MODIFY("brg") MCFG_DEVICE_CLOCK(XTAL_1_7971MHz) + + MCFG_DEVICE_MODIFY("io1") + MCFG_SLOT_DEFAULT_OPTION("mpc") MACHINE_CONFIG_END /* ROM definition */ @@ -145,4 +199,4 @@ ROM_END // YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS COMP( 1977, swtpc, 0, 0, swtpc, swtpc, swtpc_state, 0, "Southwest Technical Products Corporation", "SWTPC 6800 Computer System (with SWTBUG)", MACHINE_NO_SOUND_HW ) -COMP( 1975, swtpcm, swtpc, 0, swtpcm, swtpc, swtpc_state, 0, "Southwest Technical Products Corporation", "SWTPC 6800 Computer System (with MIKBUG)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) +COMP( 1975, swtpcm, swtpc, 0, swtpcm, swtpc, swtpc_state, 0, "Southwest Technical Products Corporation", "SWTPC 6800 Computer System (with MIKBUG)", MACHINE_NO_SOUND_HW ) diff --git a/src/mame/drivers/swtpc09.cpp b/src/mame/drivers/swtpc09.cpp index 07c50da26b7..2ef045486fa 100644 --- a/src/mame/drivers/swtpc09.cpp +++ b/src/mame/drivers/swtpc09.cpp @@ -60,9 +60,76 @@ /* Address map is dynamically setup when DAT memory is written to */ /* only ROM from FF00-FFFF and DAT memory at FFF0-FFFF (write only) is guaranteed always*/ -static ADDRESS_MAP_START(swtpc09_mem, AS_PROGRAM, 8, swtpc09_state) - AM_RANGE(0xff00, 0xffef) AM_ROM - AM_RANGE(0xfff0, 0xffff) AM_ROM AM_WRITE(dat_w) +static ADDRESS_MAP_START(mp09_mem, AS_PROGRAM, 8, swtpc09_state) + AM_RANGE(0x0000, 0xffef) AM_READWRITE(main_r, main_w) + AM_RANGE(0xff00, 0xffff) AM_ROM AM_REGION("maincpu", 0xff00) + AM_RANGE(0xff00, 0xff0f) AM_MIRROR(0xf0) AM_WRITEONLY AM_SHARE("dat") +ADDRESS_MAP_END + +static ADDRESS_MAP_START(flex_dmf2_mem, AS_PROGRAM, 8, swtpc09_state) + AM_RANGE(0xe000, 0xe003) AM_MIRROR(0xf0000) AM_NOP + AM_RANGE(0xe004, 0xe005) AM_MIRROR(0xf0000) AM_DEVREADWRITE("acia", acia6850_device, read, write) + AM_RANGE(0xe080, 0xe083) AM_MIRROR(0xf000c) AM_DEVREADWRITE("pia", pia6821_device, read, write) + AM_RANGE(0xe090, 0xe097) AM_MIRROR(0xf0008) AM_DEVREADWRITE("ptm", ptm6840_device, read, write) + AM_RANGE(0xe0a0, 0xefff) AM_MIRROR(0xf0000) AM_NOP + AM_RANGE(0xf000, 0xf01f) AM_MIRROR(0xf0000) AM_READWRITE(m6844_r, m6844_w) + AM_RANGE(0xf020, 0xf023) AM_MIRROR(0xf0000) AM_DEVREADWRITE("fdc", fd1793_device, read, write) + AM_RANGE(0xf024, 0xf03f) AM_MIRROR(0xf0000) AM_READWRITE(dmf2_control_reg_r, dmf2_control_reg_w) + //AM_RANGE(0xf042, 0xf7ff) AM_MIRROR(0xf0000) AM_NOP + AM_RANGE(0xf800, 0xffff) AM_MIRROR(0xf0000) AM_ROM AM_REGION("maincpu", 0xf800) + AM_RANGE(0x00000, 0xfffff) AM_RAM AM_SHARE("mainram") // all the rest is treated as ram, 1MB ram emulated +ADDRESS_MAP_END + +static ADDRESS_MAP_START(flex_dc4_piaide_mem, AS_PROGRAM, 8, swtpc09_state) + AM_RANGE(0xe000, 0xe003) AM_MIRROR(0xf0000) AM_NOP + AM_RANGE(0xe004, 0xe005) AM_MIRROR(0xf0000) AM_DEVREADWRITE("acia", acia6850_device, read, write) + AM_RANGE(0xe014, 0xe014) AM_MIRROR(0xf0000) AM_WRITE(dc4_control_reg_w) + AM_RANGE(0xe018, 0xe01b) AM_MIRROR(0xf0000) AM_DEVREADWRITE("fdc", fd1793_device, read, write) + //AM_RANGE(0xe01c, 0xe05f) AM_MIRROR(0xf0000) AM_NOP + AM_RANGE(0xe060, 0xe063) AM_MIRROR(0xf000c) AM_DEVREADWRITE("piaide", pia6821_device, read, write) + //AM_RANGE(0xe070, 0xe07f) AM_MIRROR(0xf0000) AM_NOP + AM_RANGE(0xe080, 0xe083) AM_MIRROR(0xf000c) AM_DEVREADWRITE("pia", pia6821_device, read, write) + AM_RANGE(0xe090, 0xe097) AM_MIRROR(0xf0008) AM_DEVREADWRITE("ptm", ptm6840_device, read, write) + //AM_RANGE(0xe0a0, 0xe7ff) AM_MIRROR(0xf0000) AM_NOP + AM_RANGE(0xe800, 0xefff) AM_MIRROR(0xf0000) AM_ROM AM_REGION("maincpu", 0xe800) //piaide rom + //AM_RANGE(0xf000, 0xf01f) AM_MIRROR(0xf0000) AM_READWRITE(m6844_r, m6844_w) + //AM_RANGE(0xf020, 0xf023) AM_MIRROR(0xf0000) AM_DEVREADWRITE("fdc", fd1793_device, read, write) + //AM_RANGE(0xf024, 0xf03f) AM_MIRROR(0xf0000) AM_READWRITE(dmf2_control_reg_r, dmf2_control_reg_w) + //AM_RANGE(0xf040, 0xf041) AM_MIRROR(0xf0000) AM_READWRITE(dmf2_dma_address_reg_r, dmf2_dma_address_reg_w) + AM_RANGE(0xf000, 0xf7ff) AM_MIRROR(0xf0000) AM_RAM AM_SHARE("s09ram") // 2k ram for piaide on s09 board + AM_RANGE(0xf800, 0xffff) AM_MIRROR(0xf0000) AM_ROM AM_REGION("maincpu", 0xf800) + AM_RANGE(0x00000, 0xfffff) AM_RAM AM_SHARE("mainram") // all the rest is treated as ram, 1MB ram emulated +ADDRESS_MAP_END + +static ADDRESS_MAP_START(uniflex_dmf2_mem, AS_PROGRAM, 8, swtpc09_state) + AM_RANGE(0xe000, 0xe001) AM_MIRROR(0xf0000) AM_DEVREADWRITE("acia", acia6850_device, read, write) + AM_RANGE(0xe002, 0xe07f) AM_MIRROR(0xf0000) AM_NOP + AM_RANGE(0xe080, 0xe083) AM_MIRROR(0xf000c) AM_DEVREADWRITE("pia", pia6821_device, read, write) + AM_RANGE(0xe090, 0xe097) AM_MIRROR(0xf0008) AM_DEVREADWRITE("ptm", ptm6840_device, read, write) + AM_RANGE(0xe0a0, 0xefff) AM_MIRROR(0xf0000) AM_NOP + AM_RANGE(0xf000, 0xf01f) AM_MIRROR(0xf0000) AM_READWRITE(m6844_r, m6844_w) + AM_RANGE(0xf020, 0xf023) AM_MIRROR(0xf0000) AM_DEVREADWRITE("fdc", fd1793_device, read, write) + AM_RANGE(0xf024, 0xf03f) AM_MIRROR(0xf0000) AM_READWRITE(dmf2_control_reg_r, dmf2_control_reg_w) + //AM_RANGE(0xf042, 0xf7ff) AM_MIRROR(0xf0000) AM_NOP + AM_RANGE(0xf800, 0xffff) AM_MIRROR(0xf0000) AM_ROM AM_REGION("maincpu", 0xf800) + AM_RANGE(0x00000, 0xfffff) AM_RAM AM_SHARE("mainram") // all the rest is treated as ram, 1MB ram emulated +ADDRESS_MAP_END + +static ADDRESS_MAP_START(uniflex_dmf3_mem, AS_PROGRAM, 8, swtpc09_state) + AM_RANGE(0xe000, 0xe001) AM_MIRROR(0xf0000) AM_DEVREADWRITE("acia", acia6850_device, read, write) + AM_RANGE(0xe002, 0xe07f) AM_MIRROR(0xf0000) AM_NOP + AM_RANGE(0xe080, 0xe083) AM_MIRROR(0xf000c) AM_DEVREADWRITE("pia", pia6821_device, read, write) + AM_RANGE(0xe090, 0xe097) AM_MIRROR(0xf0008) AM_DEVREADWRITE("ptm", ptm6840_device, read, write) + AM_RANGE(0xe0a0, 0xefff) AM_MIRROR(0xf0000) AM_NOP + AM_RANGE(0xf000, 0xf01f) AM_MIRROR(0xf0000) AM_READWRITE(m6844_r, m6844_w) + AM_RANGE(0xf020, 0xf023) AM_MIRROR(0xf0000) AM_DEVREADWRITE("fdc", fd1793_device, read, write) + AM_RANGE(0xf024, 0xf024) AM_MIRROR(0xf0000) AM_READWRITE(dmf3_control_reg_r, dmf3_control_reg_w) + AM_RANGE(0xf025, 0xf025) AM_MIRROR(0xf0000) AM_READWRITE(dmf3_dma_address_reg_r, dmf3_dma_address_reg_w) + //AM_RANGE(0xf030, 0xf03f) AM_MIRROR(0xf0000) AM_NOP + AM_RANGE(0xf040, 0xf04f) AM_MIRROR(0xf0000) AM_DEVREADWRITE("via", via6522_device, read, write) + //AM_RANGE(0xf050, 0xf7ff) AM_MIRROR(0xf0000) AM_NOP + AM_RANGE(0xf800, 0xffff) AM_MIRROR(0xf0000) AM_ROM AM_REGION("maincpu", 0xf800) + AM_RANGE(0x00000, 0xfffff) AM_RAM AM_SHARE("mainram") // all the rest is treated as ram, 1MB ram emulated ADDRESS_MAP_END @@ -92,83 +159,58 @@ SLOT_INTERFACE_END /* Machine driver */ /* MPU09, MPID, MPS2 DMF2 */ -static MACHINE_CONFIG_START( swtpc09 ) +static MACHINE_CONFIG_START( swtpc09_base ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", M6809, 1000000) - MCFG_CPU_PROGRAM_MAP(swtpc09_mem) + MCFG_CPU_PROGRAM_MAP(mp09_mem) - /* video hardware */ - MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal") - MCFG_RS232_RXD_HANDLER(DEVWRITELINE("acia", acia6850_device, write_rxd)) - MCFG_RS232_CTS_HANDLER(DEVWRITELINE("acia", acia6850_device, write_cts)) - - MCFG_DEVICE_ADD("ptm", PTM6840, 2000000) - MCFG_PTM6840_EXTERNAL_CLOCKS(50, 0, 50) - MCFG_PTM6840_OUT0_CB(WRITELINE(swtpc09_state, ptm_o1_callback)) - MCFG_PTM6840_OUT2_CB(WRITELINE(swtpc09_state, ptm_o3_callback)) - MCFG_PTM6840_IRQ_CB(WRITELINE(swtpc09_state, ptm_irq)) + MCFG_DEVICE_ADD("bankdev", ADDRESS_MAP_BANK, 0) + MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20) + MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem) MCFG_DEVICE_ADD("pia", PIA6821, 0) MCFG_PIA_READPA_HANDLER(READ8(swtpc09_state, pia0_a_r)) MCFG_PIA_READPA_HANDLER(READ8(swtpc09_state, pia0_ca1_r)) MCFG_PIA_IRQA_HANDLER(WRITELINE(swtpc09_state, pia0_irq_a)) - MCFG_DEVICE_ADD("acia", ACIA6850, 0) - MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd)) - MCFG_ACIA6850_RTS_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_rts)) - MCFG_ACIA6850_IRQ_HANDLER(WRITELINE(swtpc09_state, acia_interrupt)) - - MCFG_DEVICE_ADD("acia_clock", CLOCK, 153600) - MCFG_CLOCK_SIGNAL_HANDLER(DEVWRITELINE("acia", acia6850_device, write_txc)) - MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("acia", acia6850_device, write_rxc)) - - MCFG_FD1793_ADD("fdc", XTAL_1MHz) - MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(swtpc09_state, fdc_intrq_w)) - MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(swtpc09_state, fdc_drq_w)) - - MCFG_FLOPPY_DRIVE_ADD("fdc:0", swtpc09_floppies, "dd", swtpc09_state::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:1", swtpc09_floppies, "dd", swtpc09_state::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:2", swtpc09_floppies, "dd", swtpc09_state::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:3", swtpc09_floppies, "dd", swtpc09_state::floppy_formats) -MACHINE_CONFIG_END - -/* MPU09, MPID, MPS2 DC4 PIAIDE*/ -static MACHINE_CONFIG_START( swtpc09i ) - /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, 1000000) - MCFG_CPU_PROGRAM_MAP(swtpc09_mem) - - /* video hardware */ - MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal") - MCFG_RS232_RXD_HANDLER(DEVWRITELINE("acia", acia6850_device, write_rxd)) - MCFG_RS232_CTS_HANDLER(DEVWRITELINE("acia", acia6850_device, write_cts)) - MCFG_DEVICE_ADD("ptm", PTM6840, 2000000) MCFG_PTM6840_EXTERNAL_CLOCKS(50, 0, 50) MCFG_PTM6840_OUT0_CB(WRITELINE(swtpc09_state, ptm_o1_callback)) MCFG_PTM6840_OUT2_CB(WRITELINE(swtpc09_state, ptm_o3_callback)) MCFG_PTM6840_IRQ_CB(WRITELINE(swtpc09_state, ptm_irq)) - MCFG_DEVICE_ADD("pia", PIA6821, 0) - MCFG_PIA_READPA_HANDLER(READ8(swtpc09_state, pia0_a_r)) - MCFG_PIA_READPA_HANDLER(READ8(swtpc09_state, pia0_ca1_r)) - MCFG_PIA_IRQA_HANDLER(WRITELINE(swtpc09_state, pia0_irq_a)) + MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal") + MCFG_RS232_RXD_HANDLER(DEVWRITELINE("acia", acia6850_device, write_rxd)) + MCFG_RS232_CTS_HANDLER(DEVWRITELINE("acia", acia6850_device, write_cts)) MCFG_DEVICE_ADD("acia", ACIA6850, 0) MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd)) MCFG_ACIA6850_RTS_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_rts)) MCFG_ACIA6850_IRQ_HANDLER(WRITELINE(swtpc09_state, acia_interrupt)) - MCFG_DEVICE_ADD("acia_clock", CLOCK, 153600) - MCFG_CLOCK_SIGNAL_HANDLER(DEVWRITELINE("acia", acia6850_device, write_txc)) + MCFG_DEVICE_ADD("brg", MC14411, XTAL_1_8432MHz) + MCFG_MC14411_F1_CB(DEVWRITELINE("acia", acia6850_device, write_txc)) MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("acia", acia6850_device, write_rxc)) MCFG_FD1793_ADD("fdc", XTAL_1MHz) - MCFG_FLOPPY_DRIVE_ADD("fdc:0", swtpc09_floppies, "dd", swtpc09_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("fdc:1", swtpc09_floppies, "dd", swtpc09_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("fdc:2", swtpc09_floppies, "dd", swtpc09_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("fdc:3", swtpc09_floppies, "dd", swtpc09_state::floppy_formats) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( swtpc09, swtpc09_base ) + MCFG_DEVICE_MODIFY("fdc") + MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(swtpc09_state, fdc_intrq_w)) + MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(swtpc09_state, fdc_drq_w)) +MACHINE_CONFIG_END + +/* MPU09, MPID, MPS2 DC4 PIAIDE*/ +static MACHINE_CONFIG_DERIVED( swtpc09i, swtpc09_base ) + MCFG_DEVICE_MODIFY("bankdev") + MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem) MCFG_DEVICE_ADD("piaide", PIA6821, 0) @@ -181,44 +223,26 @@ static MACHINE_CONFIG_START( swtpc09i ) MACHINE_CONFIG_END -/* MPU09, MPID, MPS2 DMF3 */ -static MACHINE_CONFIG_START( swtpc09d3 ) - /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, 2000000) - MCFG_CPU_PROGRAM_MAP(swtpc09_mem) - - /* video hardware */ - MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal") - MCFG_RS232_RXD_HANDLER(DEVWRITELINE("acia", acia6850_device, write_rxd)) - MCFG_RS232_CTS_HANDLER(DEVWRITELINE("acia", acia6850_device, write_cts)) - - MCFG_DEVICE_ADD("ptm", PTM6840, 2000000) - MCFG_PTM6840_EXTERNAL_CLOCKS(50, 0, 50) - MCFG_PTM6840_OUT0_CB(WRITELINE(swtpc09_state, ptm_o1_callback)) - MCFG_PTM6840_OUT2_CB(WRITELINE(swtpc09_state, ptm_o3_callback)) - MCFG_PTM6840_IRQ_CB(WRITELINE(swtpc09_state, ptm_irq)) +static MACHINE_CONFIG_DERIVED( swtpc09u, swtpc09 ) + MCFG_DEVICE_MODIFY("bankdev") + MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem) +MACHINE_CONFIG_END - MCFG_DEVICE_ADD("pia", PIA6821, 0) - MCFG_PIA_READPA_HANDLER(READ8(swtpc09_state, pia0_a_r)) - MCFG_PIA_READPA_HANDLER(READ8(swtpc09_state, pia0_ca1_r)) - MCFG_PIA_IRQA_HANDLER(WRITELINE(swtpc09_state, pia0_irq_a)) - MCFG_DEVICE_ADD("acia", ACIA6850, 0) - MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd)) - MCFG_ACIA6850_RTS_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_rts)) - MCFG_ACIA6850_IRQ_HANDLER(WRITELINE(swtpc09_state, acia_interrupt)) - MCFG_ACIA6850_IRQ_HANDLER(INPUTLINE("maincpu", M6809_IRQ_LINE)) +/* MPU09, MPID, MPS2 DMF3 */ +static MACHINE_CONFIG_DERIVED( swtpc09d3, swtpc09_base ) + MCFG_CPU_MODIFY("maincpu") + MCFG_CPU_CLOCK(2000000) - MCFG_DEVICE_ADD("acia_clock", CLOCK, 153600) - MCFG_CLOCK_SIGNAL_HANDLER(DEVWRITELINE("acia", acia6850_device, write_txc)) - MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("acia", acia6850_device, write_rxc)) + MCFG_DEVICE_MODIFY("pia") + MCFG_DEVICE_CLOCK(2000000) - MCFG_FD1793_ADD("fdc", XTAL_1MHz) + MCFG_DEVICE_MODIFY("bankdev") + MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem) - MCFG_FLOPPY_DRIVE_ADD("fdc:0", swtpc09_floppies, "dd", swtpc09_state::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:1", swtpc09_floppies, "dd", swtpc09_state::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:2", swtpc09_floppies, "dd", swtpc09_state::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:3", swtpc09_floppies, "dd", swtpc09_state::floppy_formats) + /* video hardware */ + MCFG_DEVICE_MODIFY("acia") + MCFG_ACIA6850_IRQ_HANDLER(INPUTLINE("maincpu", M6809_IRQ_LINE)) MCFG_DEVICE_ADD("via", VIA6522, XTAL_4MHz / 4) MCFG_VIA6522_READPA_HANDLER(READ8(swtpc09_state, dmf3_via_read_porta)) @@ -256,5 +280,5 @@ ROM_END // YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS COMP( 1980, swtpc09, 0, 0, swtpc09, swtpc09, swtpc09_state, swtpc09, "SWTPC", "swtpc S/09 Sbug", MACHINE_NO_SOUND_HW ) COMP( 1980, swtpc09i, swtpc09, 0, swtpc09i, swtpc09, swtpc09_state, swtpc09i, "SWTPC", "swtpc S/09 Sbug + piaide", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW ) -COMP( 1980, swtpc09u, swtpc09, 0, swtpc09, swtpc09, swtpc09_state, swtpc09u, "SWTPC", "swtpc S/09 UNIBug + DMF2", MACHINE_NO_SOUND_HW ) +COMP( 1980, swtpc09u, swtpc09, 0, swtpc09u, swtpc09, swtpc09_state, swtpc09u, "SWTPC", "swtpc S/09 UNIBug + DMF2", MACHINE_NO_SOUND_HW ) COMP( 1980, swtpc09d3, swtpc09, 0, swtpc09d3, swtpc09, swtpc09_state, swtpc09d3, "SWTPC", "swtpc S/09 UNIBug + DMF3", MACHINE_NO_SOUND_HW ) diff --git a/src/mame/drivers/tail2nos.cpp b/src/mame/drivers/tail2nos.cpp index 56b6d9daa1f..f153dc1827e 100644 --- a/src/mame/drivers/tail2nos.cpp +++ b/src/mame/drivers/tail2nos.cpp @@ -52,8 +52,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, tail2nos_state ) AM_RANGE(0xfff004, 0xfff005) AM_READ_PORT("DSW") AM_RANGE(0xfff008, 0xfff009) AM_READ8(sound_semaphore_r, 0x00ff) AM_DEVWRITE8("soundlatch", generic_latch_8_device, write, 0x00ff) AM_RANGE(0xfff020, 0xfff023) AM_DEVWRITE8("gga", vsystem_gga_device, write, 0x00ff) - AM_RANGE(0xfff030, 0xfff031) AM_DEVREADWRITE8("acia", acia6850_device, status_r, control_w, 0x00ff) - AM_RANGE(0xfff032, 0xfff033) AM_DEVREADWRITE8("acia", acia6850_device, data_r, data_w, 0x00ff) + AM_RANGE(0xfff030, 0xfff033) AM_DEVREADWRITE8("acia", acia6850_device, read, write, 0x00ff) ADDRESS_MAP_END static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, tail2nos_state ) diff --git a/src/mame/drivers/taitogn.cpp b/src/mame/drivers/taitogn.cpp index 077264dbd7e..0adb428d762 100644 --- a/src/mame/drivers/taitogn.cpp +++ b/src/mame/drivers/taitogn.cpp @@ -730,7 +730,7 @@ static MACHINE_CONFIG_START( coh3002t ) MCFG_DEVICE_ADD("flashbank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(flashbank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000000) // 5MHz NEC uPD78081 MCU: diff --git a/src/mame/drivers/tandy1t.cpp b/src/mame/drivers/tandy1t.cpp index b8a94e58c69..657dc23b197 100644 --- a/src/mame/drivers/tandy1t.cpp +++ b/src/mame/drivers/tandy1t.cpp @@ -702,8 +702,8 @@ static MACHINE_CONFIG_START( t1000rl ) MCFG_DEVICE_ADD("biosbank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(biosbank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(20) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20) MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000) MCFG_MACHINE_RESET_OVERRIDE(tandy1000_state,tandy1000rl) diff --git a/src/mame/drivers/tavernie.cpp b/src/mame/drivers/tavernie.cpp index 4a341ae4609..afa3ca22b92 100644 --- a/src/mame/drivers/tavernie.cpp +++ b/src/mame/drivers/tavernie.cpp @@ -116,8 +116,7 @@ static ADDRESS_MAP_START(cpu09_mem, AS_PROGRAM, 8, tavernie_state) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x1000, 0x1fff) AM_NOP AM_RANGE(0xeb00, 0xeb03) AM_DEVREADWRITE("pia", pia6821_device, read, write) - AM_RANGE(0xeb04, 0xeb04) AM_DEVREADWRITE("acia", acia6850_device, status_r, control_w) - AM_RANGE(0xeb05, 0xeb05) AM_DEVREADWRITE("acia", acia6850_device, data_r, data_w) + AM_RANGE(0xeb04, 0xeb05) AM_DEVREADWRITE("acia", acia6850_device, read, write) AM_RANGE(0xeb08, 0xeb0f) AM_DEVREADWRITE("ptm", ptm6840_device, read, write) AM_RANGE(0xec00, 0xefff) AM_RAM // 1Kx8 RAM MK4118 AM_RANGE(0xf000, 0xffff) AM_ROM AM_REGION("roms", 0) @@ -132,8 +131,7 @@ static ADDRESS_MAP_START(ivg09_mem, AS_PROGRAM, 8, tavernie_state) AM_RANGE(0xe000, 0xe003) AM_DEVREADWRITE("fdc", fd1795_device, read, write) AM_RANGE(0xe080, 0xe080) AM_WRITE(ds_w) AM_RANGE(0xeb00, 0xeb03) AM_DEVREADWRITE("pia", pia6821_device, read, write) - AM_RANGE(0xeb04, 0xeb04) AM_DEVREADWRITE("acia", acia6850_device, status_r, control_w) - AM_RANGE(0xeb05, 0xeb05) AM_DEVREADWRITE("acia", acia6850_device, data_r, data_w) + AM_RANGE(0xeb04, 0xeb05) AM_DEVREADWRITE("acia", acia6850_device, read, write) AM_RANGE(0xeb08, 0xeb0f) AM_DEVREADWRITE("ptm", ptm6840_device, read, write) AM_RANGE(0xec00, 0xefff) AM_RAM // 1Kx8 RAM MK4118 AM_RANGE(0xf000, 0xffff) AM_ROM AM_REGION("roms", 0) diff --git a/src/mame/drivers/tek405x.cpp b/src/mame/drivers/tek405x.cpp index f0b7cd15401..fe57f3dfdcc 100644 --- a/src/mame/drivers/tek405x.cpp +++ b/src/mame/drivers/tek405x.cpp @@ -180,8 +180,7 @@ static ADDRESS_MAP_START( tek4051_mem, AS_PROGRAM, 8, tek4051_state ) AM_RANGE(0x87b0, 0x87b3) AM_DEVREADWRITE(MC6820_GPIB_TAG, pia6821_device, read, write) AM_RANGE(0x87c0, 0x87c0) AM_MIRROR(0x03) AM_WRITE(lbs_w) // AM_RANGE(0x87c0, 0x87c3) AM_DEVREADWRITE(MC6820_COM_TAG, pia6821_device, read, write) -// AM_RANGE(0x87c4, 0x87c4) AM_MIRROR(0x02) AM_DEVREADWRITE(MC6850_TAG, acia6850_device, status_r, control_w) -// AM_RANGE(0x87c5, 0x87c5) AM_MIRROR(0x02) AM_DEVREADWRITE(MC6850_TAG, acia6850_device, data_r, data_w) +// AM_RANGE(0x87c4, 0x87c5) AM_MIRROR(0x02) AM_DEVREADWRITE(MC6850_TAG, acia6850_device, read, write) // AM_RANGE(0x87c8, 0x87cb) XPC2 // AM_RANGE(0x87cc, 0x87cf) XPC3 // AM_RANGE(0x87d0, 0x87d3) XPC4 diff --git a/src/mame/drivers/terco.cpp b/src/mame/drivers/terco.cpp index 2a742da4177..4bc0bbb4187 100644 --- a/src/mame/drivers/terco.cpp +++ b/src/mame/drivers/terco.cpp @@ -280,8 +280,7 @@ static ADDRESS_MAP_START( t4490_map, AS_PROGRAM, 8, t4490_state ) AM_RANGE(0x0000, 0x1fff) AM_RAM AM_RANGE(0x3000, 0x3fff) AM_ROM AM_REGION("maincpu", 0x3000) AM_RANGE(0x9500, 0x95ff) AM_RAM - AM_RANGE(0x9030, 0x9030) AM_DEVREADWRITE("acia", acia6850_device, status_r, control_w) - AM_RANGE(0x9031, 0x9031) AM_DEVREADWRITE("acia", acia6850_device, data_r, data_w) + AM_RANGE(0x9030, 0x9031) AM_DEVREADWRITE("acia", acia6850_device, read, write) AM_RANGE(0x9034, 0x9037) AM_DEVREADWRITE("pia1", pia6821_device, read, write) AM_RANGE(0x9038, 0x903b) AM_DEVREADWRITE("pia2", pia6821_device, read, write) AM_RANGE(0xa000, 0xffff) AM_ROM AM_REGION("maincpu", 0xa000) diff --git a/src/mame/drivers/thomson.cpp b/src/mame/drivers/thomson.cpp index 7864b3a1d8c..8b5e9086f6d 100644 --- a/src/mame/drivers/thomson.cpp +++ b/src/mame/drivers/thomson.cpp @@ -626,6 +626,12 @@ static MACHINE_CONFIG_START( to7 ) MCFG_CPU_ADD ( "maincpu", M6809, 1000000 ) MCFG_CPU_PROGRAM_MAP ( to7) + MCFG_INPUT_MERGER_ANY_HIGH("mainirq") + MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("maincpu", M6809_IRQ_LINE)) + + MCFG_INPUT_MERGER_ANY_HIGH("mainfirq") + MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("maincpu", M6809_FIRQ_LINE)) + /* video */ MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_REFRESH_RATE ( /*50*/ 1./0.019968 ) @@ -664,7 +670,7 @@ static MACHINE_CONFIG_START( to7 ) MCFG_MC6846_OUT_CP2_CB(DEVWRITELINE("buzzer", dac_bit_interface, write)) MCFG_MC6846_IN_PORT_CB(READ8(thomson_state, to7_timer_port_in)) MCFG_MC6846_OUT_CTO_CB(WRITELINE(thomson_state, to7_set_cassette)) - MCFG_MC6846_IRQ_CB(WRITELINE(thomson_state, thom_dev_irq_0)) + MCFG_MC6846_IRQ_CB(DEVWRITELINE("mainirq", input_merger_device, in_w<0>)) /* floppy */ MCFG_DEVICE_ADD("mc6843", MC6843, 0) @@ -699,16 +705,16 @@ static MACHINE_CONFIG_START( to7 ) MCFG_PIA_WRITEPB_HANDLER(WRITE8(thomson_state, to7_sys_portb_out)) MCFG_PIA_CA2_HANDLER(WRITELINE(thomson_state, to7_set_cassette_motor)) MCFG_PIA_CB2_HANDLER(WRITELINE(thomson_state, to7_sys_cb2_out)) - MCFG_PIA_IRQA_HANDLER(WRITELINE(thomson_state, thom_firq_1)) - MCFG_PIA_IRQB_HANDLER(WRITELINE(thomson_state, thom_firq_1)) + MCFG_PIA_IRQA_HANDLER(DEVWRITELINE("mainfirq", input_merger_device, in_w<1>)) + MCFG_PIA_IRQB_HANDLER(DEVWRITELINE("mainfirq", input_merger_device, in_w<1>)) MCFG_DEVICE_ADD(THOM_PIA_GAME, PIA6821, 0) MCFG_PIA_READPA_HANDLER(READ8(thomson_state, to7_game_porta_in)) MCFG_PIA_READPB_HANDLER(READ8(thomson_state, to7_game_portb_in)) MCFG_PIA_WRITEPB_HANDLER(WRITE8(thomson_state, to7_game_portb_out)) MCFG_PIA_CB2_HANDLER(WRITELINE(thomson_state, to7_game_cb2_out)) - MCFG_PIA_IRQA_HANDLER(WRITELINE(thomson_state, thom_irq_1)) - MCFG_PIA_IRQB_HANDLER(WRITELINE(thomson_state, thom_irq_1)) + MCFG_PIA_IRQA_HANDLER(DEVWRITELINE("mainirq", input_merger_device, in_w<1>)) + MCFG_PIA_IRQB_HANDLER(DEVWRITELINE("mainirq", input_merger_device, in_w<1>)) /* TODO: CONVERT THIS TO A SLOT DEVICE (RF 57-932) */ MCFG_DEVICE_ADD("acia", MOS6551, 0) @@ -1130,7 +1136,7 @@ static MACHINE_CONFIG_DERIVED( mo5, to7 ) MCFG_PIA_WRITEPB_HANDLER(DEVWRITE8("buzzer", dac_bit_interface, write)) MCFG_PIA_CA2_HANDLER(WRITELINE(thomson_state, mo5_set_cassette_motor)) MCFG_PIA_CB2_HANDLER(NOOP) - MCFG_PIA_IRQB_HANDLER(WRITELINE(thomson_state, thom_irq_1)) /* WARNING: differs from TO7 ! */ + MCFG_PIA_IRQB_HANDLER(DEVWRITELINE("mainirq", input_merger_device, in_w<1>)) // WARNING: differs from TO7 ! MCFG_DEVICE_REMOVE("cartslot") MCFG_GENERIC_CARTSLOT_ADD("cartslot", generic_plain_slot, "mo_cart") @@ -1866,7 +1872,7 @@ static MACHINE_CONFIG_DERIVED( to9p, to7 ) MCFG_PIA_WRITEPB_HANDLER(WRITE8(thomson_state, to8_sys_portb_out)) MCFG_PIA_CB2_HANDLER(NOOP) MCFG_PIA_IRQA_HANDLER(NOOP) - MCFG_PIA_IRQB_HANDLER(WRITELINE(thomson_state, thom_firq_1)) + MCFG_PIA_IRQB_HANDLER(DEVWRITELINE("mainfirq", input_merger_device, in_w<1>)) MCFG_CENTRONICS_ADD("centronics", centronics_devices, "printer") MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(thomson_state, write_centronics_busy)) @@ -2221,7 +2227,7 @@ static MACHINE_CONFIG_DERIVED( mo6, to7 ) MCFG_PIA_WRITEPB_HANDLER(DEVWRITE8("buzzer", dac_bit_interface, write)) MCFG_PIA_CA2_HANDLER(WRITELINE(thomson_state, mo5_set_cassette_motor)) MCFG_PIA_CB2_HANDLER(WRITELINE(thomson_state, mo6_sys_cb2_out)) - MCFG_PIA_IRQB_HANDLER(WRITELINE(thomson_state, thom_irq_1)) /* differs from TO */ + MCFG_PIA_IRQB_HANDLER(DEVWRITELINE("mainirq", input_merger_device, in_w<1>)) // differs from TO MCFG_DEVICE_MODIFY(THOM_PIA_GAME) MCFG_PIA_WRITEPA_HANDLER(WRITE8(thomson_state, mo6_game_porta_out)) @@ -2490,7 +2496,7 @@ static MACHINE_CONFIG_DERIVED( mo5nr, to7 ) MCFG_PIA_WRITEPB_HANDLER(DEVWRITE8("buzzer", dac_bit_interface, write)) MCFG_PIA_CA2_HANDLER(WRITELINE(thomson_state, mo5_set_cassette_motor)) MCFG_PIA_CB2_HANDLER(WRITELINE(thomson_state, mo6_sys_cb2_out)) - MCFG_PIA_IRQB_HANDLER(WRITELINE(thomson_state, thom_irq_1)) /* differs from TO */ + MCFG_PIA_IRQB_HANDLER(DEVWRITELINE("mainirq", input_merger_device, in_w<1>)) // differs from TO MCFG_DEVICE_MODIFY(THOM_PIA_GAME) MCFG_PIA_WRITEPA_HANDLER(WRITE8(thomson_state, mo6_game_porta_out)) diff --git a/src/mame/drivers/thunderx.cpp b/src/mame/drivers/thunderx.cpp index a24fafb78b0..e82af57c369 100644 --- a/src/mame/drivers/thunderx.cpp +++ b/src/mame/drivers/thunderx.cpp @@ -643,8 +643,8 @@ static MACHINE_CONFIG_START( scontra ) MCFG_DEVICE_ADD("bank5800", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(scontra_bank5800_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(12) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(12) MCFG_ADDRESS_MAP_BANK_STRIDE(0x0800) MCFG_WATCHDOG_ADD("watchdog") @@ -705,7 +705,7 @@ static MACHINE_CONFIG_DERIVED( thunderx, scontra ) MCFG_DEVICE_MODIFY("bank5800") MCFG_DEVICE_PROGRAM_MAP(thunderx_bank5800_map) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(13) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(13) MCFG_DEVICE_REMOVE("k007232") MACHINE_CONFIG_END diff --git a/src/mame/drivers/ti85.cpp b/src/mame/drivers/ti85.cpp index 840c65baab6..5599e2a7c44 100644 --- a/src/mame/drivers/ti85.cpp +++ b/src/mame/drivers/ti85.cpp @@ -683,25 +683,25 @@ static MACHINE_CONFIG_DERIVED( ti83p, ti81 ) MCFG_DEVICE_ADD("membank1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(ti83p_banked_mem) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_DEVICE_ADD("membank2", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(ti83p_banked_mem) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_DEVICE_ADD("membank3", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(ti83p_banked_mem) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_DEVICE_ADD("membank4", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(ti83p_banked_mem) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_DEVICE_ADD("t6a04", T6A04, 0) diff --git a/src/mame/drivers/tk2000.cpp b/src/mame/drivers/tk2000.cpp index 4e8771a862a..23a9b75be20 100644 --- a/src/mame/drivers/tk2000.cpp +++ b/src/mame/drivers/tk2000.cpp @@ -591,7 +591,7 @@ static MACHINE_CONFIG_START( tk2000 ) MCFG_DEVICE_ADD(A2_UPPERBANK_TAG, ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(inhbank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MCFG_RAM_ADD(RAM_TAG) diff --git a/src/mame/drivers/tnzs.cpp b/src/mame/drivers/tnzs.cpp index 3d3f5804049..c5a73d241d7 100644 --- a/src/mame/drivers/tnzs.cpp +++ b/src/mame/drivers/tnzs.cpp @@ -875,8 +875,8 @@ MACHINE_CONFIG_START( tnzs_mainbank ) MCFG_DEVICE_ADD("mainbank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(mainbank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(17) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(17) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MACHINE_CONFIG_END diff --git a/src/mame/drivers/tosh1000.cpp b/src/mame/drivers/tosh1000.cpp index e3a994fed0c..7130c47de77 100644 --- a/src/mame/drivers/tosh1000.cpp +++ b/src/mame/drivers/tosh1000.cpp @@ -148,8 +148,8 @@ static MACHINE_CONFIG_START( tosh1000 ) MCFG_DEVICE_ADD("bankdev", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(tosh1000_romdos) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(20) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000) MCFG_MACHINE_RESET_OVERRIDE(tosh1000_state, tosh1000) diff --git a/src/mame/drivers/twinkle.cpp b/src/mame/drivers/twinkle.cpp index 5326a791d83..2788dc976b0 100644 --- a/src/mame/drivers/twinkle.cpp +++ b/src/mame/drivers/twinkle.cpp @@ -9,7 +9,7 @@ driver by smf and R. Belmont TODO: dvd check for bmiidx, bmiidxa, bmiidxc & bmiidxca -finish sound board emulation and remove response hle +remove dummy 8mb bank emulate dvd player and video mixing 16seg led font @@ -247,6 +247,8 @@ Notes: #include "sound/rf5c400.h" #include "speaker.h" +#include "bmiidx.lh" + class twinkle_state : public driver_device { public: @@ -256,6 +258,8 @@ public: m_ata(*this, "ata"), m_waveram(*this, "rfsnd"), m_spu_ata_dma(0), + m_spu_ata_dmarq(0), + m_wave_bank(0), m_maincpu(*this, "maincpu"), m_audiocpu(*this, "audiocpu") { @@ -269,14 +273,16 @@ public: uint8_t m_spu_shared[0x400]; // SPU/PSX shared dual-ported RAM uint32_t m_spu_ata_dma; int m_spu_ata_dmarq; + uint32_t m_wave_bank; int m_io_offset; int m_output_last[ 0x100 ]; - int m_last_io_offset; uint8_t m_sector_buffer[ 4096 ]; DECLARE_WRITE8_MEMBER(twinkle_io_w); DECLARE_READ8_MEMBER(twinkle_io_r); DECLARE_WRITE16_MEMBER(twinkle_output_w); + DECLARE_WRITE16_MEMBER(led_w); + DECLARE_WRITE16_MEMBER(key_led_w); DECLARE_WRITE16_MEMBER(serial_w); DECLARE_WRITE8_MEMBER(shared_psx_w); DECLARE_READ8_MEMBER(shared_psx_r); @@ -287,6 +293,8 @@ public: DECLARE_WRITE16_MEMBER(twinkle_waveram_w); DECLARE_READ16_MEMBER(shared_68k_r); DECLARE_WRITE16_MEMBER(shared_68k_w); + DECLARE_WRITE16_MEMBER(spu_led_w); + DECLARE_WRITE16_MEMBER(spu_wavebank_w); DECLARE_READ16_MEMBER(unk_68k_r); DECLARE_WRITE_LINE_MEMBER(spu_ata_irq); DECLARE_WRITE_LINE_MEMBER(spu_ata_dmarq); @@ -304,8 +312,6 @@ public: int m_output_clock; }; -/* RTC */ - #define LED_A1 0x0001 #define LED_A2 0x0002 #define LED_B 0x0004 @@ -332,29 +338,24 @@ public: static const uint16_t asciicharset[]= { - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_J | LED_M, // 0 - LED_B | LED_C, // 1 - LED_A1 | LED_A2 | LED_B | LED_D1 | LED_D2 | LED_E | LED_G1 | LED_G2, // 2 - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_G2, // 3 - LED_B | LED_C | LED_F | LED_G1 | LED_G2 , // 4 - LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_F | LED_G1 | LED_K, // 5 - LED_A1 | LED_A2 | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_G1 | LED_G2, // 6 - LED_A1 | LED_A2 | LED_B | LED_C, // 7 - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F, // 8 - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_F, // 9 - LED_A1 | LED_A2 | LED_B | LED_C | LED_E | LED_F, // A - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_G2 | LED_I | LED_L, // B - LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_E | LED_F, // C - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_I | LED_L, // D - LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_E | LED_F | LED_G1 | LED_G2, // E - LED_A1 | LED_A2 | LED_E | LED_F | LED_G1, // F -// 16 +// 0 + 0, // (default on boot) + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, 0, 0, 0, 0, 0, 0, +// 0x10 0, 0, 0, @@ -365,63 +366,70 @@ static const uint16_t asciicharset[]= 0, 0, 0, -// 32 + 0, + 0, + 0, + 0, + 0, + 0, +// 0x20 0, // space - 0, // ! - 0, // " + LED_D2 | LED_A2 | LED_I | LED_J, // ! + LED_I | LED_B, // " 0, // # 0, // $ 0, // % - 0, // & + LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_H | LED_J | LED_M | LED_K | LED_C, // & 0, // ' - 0, // ( - 0, // ) - 0, // * + LED_J | LED_K, // ( + LED_H | LED_M, // ) + LED_G1 | LED_G2 | LED_H | LED_I | LED_J | LED_K | LED_L | LED_M, // * 0, // + 0, // , - 0, // - + LED_G1 | LED_G2, // - 0, // . - 0, // / -// 48 + LED_J | LED_M, // / +// 0x30 LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_J | LED_M, // 0 LED_B | LED_C, // 1 - LED_A1 | LED_A2 | LED_B | LED_D1 | LED_D2 | LED_E | LED_G1 | LED_G2, // 2 - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_G2, // 3 + LED_A1 | LED_A2 | LED_B | LED_D1 | LED_D2 | LED_E | LED_G1 | LED_G2, // 2 + LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_G1 | LED_G2, // 3 LED_B | LED_C | LED_F | LED_G1 | LED_G2 , // 4 - LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_F | LED_G1 | LED_K, // 5 - LED_A1 | LED_A2 | LED_C | LED_D1 | LED_D2 | LED_E | LED_F, // 6 - LED_A1 | LED_A2 | LED_B | LED_C, // 7 - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F, // 8 - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_F, // 9 + LED_A1 | LED_A2 | LED_C | LED_D1 | LED_D2 | LED_F | LED_G1 | LED_G2, // 5 + LED_A1 | LED_A2 | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_G1 | LED_G2, // 6 + LED_A1 | LED_A2 | LED_B | LED_C | LED_F, // 7 + LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_G1 | LED_G2, // 8 + LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_F | LED_G1 | LED_G2, // 9 0, // : 0, // ; 0, // < 0, // = 0, // > - 0, // ? -// 64 + LED_A1 | LED_A2 | LED_J | LED_D2, // ? +// 0x40 0, // @ - LED_A1 | LED_A2 | LED_B | LED_C | LED_E | LED_F, // A - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_G2 | LED_I | LED_L, // B + LED_A1 | LED_A2 | LED_B | LED_C | LED_E | LED_F | LED_G1 | LED_G2, // A + LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_E | LED_F | LED_G1 | LED_J | LED_K, // B LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_E | LED_F, // C - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_I | LED_L, // D + LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_G1 | LED_G2, // D LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_E | LED_F | LED_G1 | LED_G2, // E - LED_A1 | LED_A2 | LED_E | LED_F | LED_G1, // F + LED_A1 | LED_A2 | LED_E | LED_F | LED_G1 | LED_G2, // F LED_A1 | LED_A2 | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_G2, // G LED_B | LED_C | LED_E | LED_F | LED_G1 | LED_G2, // H - LED_I | LED_L, // I - LED_B | LED_C | LED_D1 | LED_D2 | LED_E, // J + LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_I | LED_L, // I + LED_A1 | LED_A2 | LED_I | LED_L | LED_D2, // J LED_E | LED_F | LED_G1 | LED_J | LED_K, // K LED_D1 | LED_D2 | LED_E | LED_F, // L LED_B | LED_C | LED_E | LED_F | LED_H | LED_J, // M LED_B | LED_C | LED_E | LED_F | LED_H | LED_K, // N LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F, // O - LED_A1 | LED_A2 | LED_B | LED_E | LED_F, // P +// 0x50 + LED_A1 | LED_A2 | LED_B | LED_E | LED_F | LED_G1 | LED_G2, // P LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_K, // Q - LED_A1 | LED_A2 | LED_B | LED_E | LED_F | LED_K, // R + LED_A1 | LED_A2 | LED_B | LED_E | LED_F | LED_K | LED_G1 | LED_G2, // R LED_A1 | LED_A2 | LED_C | LED_D1 | LED_D2 | LED_F | LED_G1 | LED_G2, // S LED_A1 | LED_A2 | LED_I | LED_L, // T - LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F, // O + LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F, // U LED_E | LED_F | LED_M | LED_J, // V LED_B | LED_C | LED_E | LED_F | LED_M | LED_K, // W LED_H | LED_J | LED_K | LED_M, // X @@ -432,33 +440,35 @@ static const uint16_t asciicharset[]= 0, // ] 0, // ^ 0, // _ +// 0x60 0, // ` - LED_A1 | LED_A2 | LED_B | LED_C | LED_E | LED_F, // A - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_G2 | LED_I | LED_L, // B - LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_E | LED_F, // C - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_I | LED_L, // D - LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_E | LED_F | LED_G1 | LED_G2, // E - LED_A1 | LED_A2 | LED_E | LED_F | LED_G1, // F - LED_A1 | LED_A2 | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_G2, // G - LED_B | LED_C | LED_E | LED_F | LED_G1 | LED_G2, // H - LED_I | LED_L, // I - LED_B | LED_C | LED_D1 | LED_D2 | LED_E, // J - LED_E | LED_F | LED_G1 | LED_J | LED_K, // K - LED_D1 | LED_D2 | LED_E | LED_F, // L - LED_B | LED_C | LED_E | LED_F | LED_H | LED_J, // M - LED_B | LED_C | LED_E | LED_F | LED_H | LED_K, // N - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F, // O - LED_A1 | LED_A2 | LED_B | LED_E | LED_F, // P - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_K, // Q - LED_A1 | LED_A2 | LED_B | LED_E | LED_F | LED_K, // R - LED_A1 | LED_A2 | LED_C | LED_D1 | LED_D2 | LED_F | LED_G1 | LED_G2, // S - LED_A1 | LED_A2 | LED_I | LED_L, // T - LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F, // O - LED_E | LED_F | LED_M | LED_J, // V - LED_B | LED_C | LED_E | LED_F | LED_M | LED_K, // W - LED_H | LED_J | LED_K | LED_M, // X - LED_H | LED_J | LED_L, // Y - LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_J | LED_M, // Z + 0, // a + 0, // b + 0, // c + 0, // d + 0, // e + 0, // f + LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_G1 | LED_G2 | LED_H | LED_I | LED_J | LED_K | LED_L | LED_M, // g (16 seg led test) + 0, // h + 0, // i + 0, // j + 0, // k + 0, // l + LED_D2, // m (".") + 0, // n + 0, // o +// 0x70 + 0, // p + LED_J, // q ("'") + 0, // r + 0, // s + 0, // t + LED_M, // u (",") + 0, // v + 0, // w + 0, // x + 0, // y + 0, // z 0, // { 0, // | 0, // } @@ -484,9 +494,25 @@ WRITE8_MEMBER(twinkle_state::twinkle_io_w) case 0x1f: case 0x27: case 0x2f: + if (data != 0xff) + { + osd_printf_warning("unknown io %02x = %02x\n", m_io_offset, data); + } + break; + case 0x37: + output().set_value("1p", (~data >> 0) & 1); + output().set_value("2p", (~data >> 1) & 1); + output().set_value("vefx", (~data >> 2) & 1); + output().set_value("effect", (~data >> 3) & 1); + output().set_value("credit", (~data >> 4) & 1); + + if ((data & 0xe0) != 0xe0) + { + osd_printf_warning("unknown io %02x = %02x\n", m_io_offset, data); + } + break; - /* led */ case 0x3f: case 0x47: case 0x4f: @@ -496,7 +522,7 @@ WRITE8_MEMBER(twinkle_state::twinkle_io_w) case 0x6f: case 0x77: case 0x7f: - output().set_indexed_value( "led", ( m_io_offset - 7 ) / 8, asciicharset[ ( data ^ 0xff ) & 0x7f ] ); + output().set_indexed_value( "led", ( m_io_offset - 0x3f ) / 8, asciicharset[ ( data ^ 0xff ) & 0x7f ] ); break; case 0x87: @@ -517,7 +543,7 @@ WRITE8_MEMBER(twinkle_state::twinkle_io_w) if( ( data & 0xf8 ) != 0xf8 ) { - printf("%02x = %02x\n", m_io_offset, data ); + osd_printf_warning("unknown io %02x = %02x\n", m_io_offset, data); } break; @@ -568,10 +594,7 @@ READ8_MEMBER(twinkle_state::twinkle_io_r) break; default: - if( m_last_io_offset != m_io_offset ) - { - m_last_io_offset = m_io_offset; - } + osd_printf_warning("unknown io 0x%02x\n", m_io_offset); break; } break; @@ -595,7 +618,7 @@ WRITE16_MEMBER(twinkle_state::twinkle_output_w) /* data */ break; case 0x08: - /* ?? */ + // overlay enable? break; case 0x10: { @@ -642,6 +665,45 @@ WRITE16_MEMBER(twinkle_state::twinkle_output_w) } } +WRITE16_MEMBER(twinkle_state::led_w) +{ + output().set_indexed_value("main_led", 0, (~data >> 0) & 1); + output().set_indexed_value("main_led", 1, (~data >> 1) & 1); + output().set_indexed_value("main_led", 2, (~data >> 2) & 1); + output().set_indexed_value("main_led", 3, (~data >> 3) & 1); + output().set_indexed_value("main_led", 4, (~data >> 4) & 1); + output().set_indexed_value("main_led", 5, (~data >> 5) & 1); + output().set_indexed_value("main_led", 6, (~data >> 6) & 1); + output().set_indexed_value("main_led", 7, (~data >> 7) & 1); + output().set_indexed_value("main_led", 8, (~data >> 8) & 1); + + if ((data & 0xfe00) != 0xfe00) + { + osd_printf_warning("led_w unknown %04x\n", data); + } +} + +WRITE16_MEMBER(twinkle_state::key_led_w) +{ + // words are written using a byte write + output().set_indexed_value("key1-", 1, (data >> 0) & 1); + output().set_indexed_value("key1-", 2, (data >> 1) & 1); + output().set_indexed_value("key1-", 3, (data >> 2) & 1); + output().set_indexed_value("key1-", 4, (data >> 3) & 1); + output().set_indexed_value("key1-", 5, (data >> 4) & 1); + output().set_indexed_value("key1-", 6, (data >> 5) & 1); + output().set_indexed_value("key1-", 7, (data >> 6) & 1); + output().set_indexed_value("key2-", 1, (data >> 7) & 1); + output().set_indexed_value("key2-", 2, (data >> 8) & 1); + output().set_indexed_value("key2-", 3, (data >> 9) & 1); + output().set_indexed_value("key2-", 4, (data >> 10) & 1); + output().set_indexed_value("key2-", 5, (data >> 11) & 1); + output().set_indexed_value("key2-", 6, (data >> 12) & 1); + output().set_indexed_value("key2-", 7, (data >> 13) & 1); + output().set_value("unknown3", (data >> 14) & 1); + output().set_value("unknown4", (data >> 15) & 1); +} + WRITE16_MEMBER(twinkle_state::serial_w) { int _do = ( data >> 4 ) & 1; @@ -703,9 +765,9 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 32, twinkle_state ) AM_RANGE(0x1f218000, 0x1f218003) AM_DEVWRITE8("watchdog", watchdog_timer_device, reset_w, 0x000000ff) /* LTC1232 */ AM_RANGE(0x1f220000, 0x1f220003) AM_WRITE8(twinkle_io_w, 0x00ff00ff) AM_RANGE(0x1f220004, 0x1f220007) AM_READ8(twinkle_io_r, 0x00ff00ff) - AM_RANGE(0x1f230000, 0x1f230003) AM_WRITENOP + AM_RANGE(0x1f230000, 0x1f230003) AM_WRITE16(led_w, 0x0000ffff) AM_RANGE(0x1f240000, 0x1f240003) AM_READ_PORT("IN6") - AM_RANGE(0x1f250000, 0x1f250003) AM_WRITENOP + AM_RANGE(0x1f250000, 0x1f250003) AM_WRITE16(key_led_w, 0x0000ffff) AM_RANGE(0x1f260000, 0x1f260003) AM_WRITE16(serial_w, 0x0000ffff) AM_RANGE(0x1f270000, 0x1f270003) AM_WRITE_PORT("OUTSEC") AM_RANGE(0x1f280000, 0x1f280003) AM_READ_PORT("INSEC") @@ -764,7 +826,8 @@ WRITE16_MEMBER(twinkle_state::spu_ata_dma_low_w) WRITE16_MEMBER(twinkle_state::spu_ata_dma_high_w) { - m_spu_ata_dma = (m_spu_ata_dma & 0xffff) | (data << 16); + m_spu_ata_dma = (m_spu_ata_dma & 0xffff) | ((uint32_t)data << 16); + //printf("DMA now %x\n", m_spu_ata_dma); } WRITE_LINE_MEMBER(twinkle_state::spu_ata_dmarq) @@ -781,17 +844,10 @@ WRITE_LINE_MEMBER(twinkle_state::spu_ata_dmarq) { uint16_t data = m_ata->read_dma(); //printf("spu_ata_dmarq %08x %04x\n", m_spu_ata_dma * 2, data); - //waveram[m_spu_ata_dma++] = (data >> 8) | (data << 8); + m_waveram[m_wave_bank+m_spu_ata_dma] = data; //(data >> 8) | (data << 8); + m_spu_ata_dma++; // bp 4a0e ;bmiidx4 checksum // bp 4d62 ;bmiidx4 dma - - // $$$HACK - game DMAs nothing useful to 0x400000 but all sound plays are 0x400000 or above - // so limit sound RAM to 4MB (there's 6 MB on the board) and let the 5c400's address masking - // work for us until we figure out what's actually going on. - if (m_spu_ata_dma < 0x200000) - { - m_waveram[m_spu_ata_dma++] = data; - } } m_ata->write_dmack(CLEAR_LINE); @@ -799,14 +855,26 @@ WRITE_LINE_MEMBER(twinkle_state::spu_ata_dmarq) } } +WRITE16_MEMBER(twinkle_state::spu_wavebank_w) +{ + //printf("%x to wavebank_w, mask %04x\n", data, mem_mask); + + // banks are fairly clearly 8MB, so there's 3 of them in the 24 MB of RAM. + // the games load up the full 24MB of RAM 8 MB at a time, first to bank 1, + // then to bank 2, and finally to bank 3. + // + // neither the 68k nor DMA access wave RAM when the bank is 0. + m_wave_bank = data * (4*1024*1024); +} + READ16_MEMBER(twinkle_state::twinkle_waveram_r) { - return m_waveram[offset]; + return m_waveram[offset+m_wave_bank]; } WRITE16_MEMBER(twinkle_state::twinkle_waveram_w) { - COMBINE_DATA(&m_waveram[offset]); + COMBINE_DATA(&m_waveram[offset+m_wave_bank]); } READ16_MEMBER(twinkle_state::shared_68k_r) @@ -825,27 +893,34 @@ WRITE16_MEMBER(twinkle_state::shared_68k_w) m_spu_shared[offset] = data & 0xff; } -READ16_MEMBER(twinkle_state::unk_68k_r) +WRITE16_MEMBER(twinkle_state::spu_led_w) { - return 0xffff; // must return 0xff for 68000 POST to complete properly + // upper 8 bits are occassionally written as all zeros + output().set_indexed_value("spu_led", 0, (~data >> 0) & 1); + output().set_indexed_value("spu_led", 1, (~data >> 1) & 1); + output().set_indexed_value("spu_led", 2, (~data >> 2) & 1); + output().set_indexed_value("spu_led", 3, (~data >> 3) & 1); + output().set_indexed_value("spu_led", 4, (~data >> 4) & 1); + output().set_indexed_value("spu_led", 5, (~data >> 5) & 1); + output().set_indexed_value("spu_led", 6, (~data >> 6) & 1); + output().set_indexed_value("spu_led", 7, (~data >> 7) & 1); } static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 16, twinkle_state ) AM_RANGE(0x000000, 0x07ffff) AM_ROM AM_RANGE(0x100000, 0x13ffff) AM_RAM - AM_RANGE(0x200000, 0x200001) AM_READ(unk_68k_r) - // 220000 = LEDs? + AM_RANGE(0x200000, 0x200001) AM_READ_PORT("SPU_DSW") + AM_RANGE(0x220000, 0x220001) AM_WRITE(spu_led_w) AM_RANGE(0x230000, 0x230003) AM_WRITE(twinkle_spu_ctrl_w) - AM_RANGE(0x240000, 0x240003) AM_WRITE(spu_ata_dma_low_w) - AM_RANGE(0x250000, 0x250003) AM_WRITE(spu_ata_dma_high_w) - // 260000 = ??? + AM_RANGE(0x240000, 0x240003) AM_WRITE(spu_ata_dma_low_w) AM_READNOP + AM_RANGE(0x250000, 0x250003) AM_WRITE(spu_ata_dma_high_w) AM_READNOP + AM_RANGE(0x260000, 0x260001) AM_WRITE(spu_wavebank_w) AM_READNOP AM_RANGE(0x280000, 0x280fff) AM_READWRITE(shared_68k_r, shared_68k_w) AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE("ata", ata_interface_device, read_cs0, write_cs0) // 34000E = ??? AM_RANGE(0x34000e, 0x34000f) AM_WRITENOP AM_RANGE(0x400000, 0x400fff) AM_DEVREADWRITE("rfsnd", rf5c400_device, rf5c400_r, rf5c400_w) - AM_RANGE(0x800000, 0xbfffff) AM_READWRITE(twinkle_waveram_r, twinkle_waveram_w ) - AM_RANGE(0xfe0000, 0xffffff) AM_RAM // ...and the RAM test checks this last 128k (mirror of the work RAM at 0x100000?) + AM_RANGE(0x800000, 0xffffff) AM_READWRITE(twinkle_waveram_r, twinkle_waveram_w) ADDRESS_MAP_END /* SCSI */ @@ -993,7 +1068,7 @@ static MACHINE_CONFIG_START( twinkle ) MCFG_SOUND_ROUTE( 0, "speakerleft", 0.75 ) MCFG_SOUND_ROUTE( 1, "speakerright", 0.75 ) - MCFG_RF5C400_ADD("rfsnd", 32000000/2) + MCFG_RF5C400_ADD("rfsnd", XTAL_33_8688MHz/2); MCFG_SOUND_ROUTE(0, "speakerleft", 1.0) MCFG_SOUND_ROUTE(1, "speakerright", 1.0) MACHINE_CONFIG_END @@ -1055,6 +1130,16 @@ static INPUT_PORTS_START( twinkle ) PORT_START("OUTSEC") PORT_START("INSEC") + + PORT_START("SPU_DSW") + PORT_DIPUNKNOWN_DIPLOC( 0x01, IP_ACTIVE_LOW, "SPU DSW:1" ) + PORT_DIPUNKNOWN_DIPLOC( 0x02, IP_ACTIVE_LOW, "SPU DSW:2" ) + PORT_DIPUNKNOWN_DIPLOC( 0x04, IP_ACTIVE_LOW, "SPU DSW:3" ) + PORT_DIPUNKNOWN_DIPLOC( 0x08, IP_ACTIVE_LOW, "SPU DSW:4" ) + PORT_DIPUNKNOWN_DIPLOC( 0x10, IP_ACTIVE_LOW, "SPU DSW:5" ) + PORT_DIPUNKNOWN_DIPLOC( 0x20, IP_ACTIVE_LOW, "SPU DSW:6" ) + PORT_DIPUNKNOWN_DIPLOC( 0x40, IP_ACTIVE_LOW, "SPU DSW:7" ) + PORT_DIPUNKNOWN_DIPLOC( 0x80, IP_ACTIVE_LOW, "SPU DSW:8" ) INPUT_PORTS_END static INPUT_PORTS_START( twinklex ) @@ -1087,7 +1172,7 @@ INPUT_PORTS_END ROM_REGION32_LE( 0x080000, "audiocpu", 0 )\ ROM_LOAD16_WORD_SWAP( "863a05.2x", 0x000000, 0x080000, CRC(6f42a09e) SHA1(cab5209f90f47b9ee6e721479913ad74e3ba84b1) )\ \ - ROM_REGION16_LE(0x400000, "rfsnd", ROMREGION_ERASE00) + ROM_REGION16_LE(0x2000000, "rfsnd", ROMREGION_ERASE00) // the first 8mb isn't populated ROM_START( gq863 ) TWINKLE_BIOS @@ -1333,20 +1418,20 @@ ROM_START( bmiidxc2 ) DISK_IMAGE_READONLY( "983hdda01", 0, SHA1(bcbbf55acf8bebc5773ffc5769420a0129f4da57) ) ROM_END -GAME( 1999, gq863, 0, twinkle, twinkle, twinkle_state, 0, ROT0, "Konami", "Twinkle System", MACHINE_IS_BIOS_ROOT ) - -GAME( 1999, bmiidx, gq863, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX (863 JAB)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 1999, bmiidxa, bmiidx, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX (863 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 1999, bmiidxc, gq863, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX with DDR 2nd Club Version (896 JAB)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 1999, bmiidxca, bmiidxc, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX with DDR 2nd Club Version (896 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 1999, bmiidxs, gq863, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX Substream (983 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 1999, bmiidxc2, gq863, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX Substream with DDR 2nd Club Version 2 (984 A01 BM)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 1999, bmiidx2, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 2nd style (GC985 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 2000, bmiidx3, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAC)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 2000, bmiidx3a, bmiidx3, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 2000, bmiidx4, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 4th style (GCA03 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 2001, bmiidx5, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 5th style (GCA17 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 2001, bmiidx6, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAB)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 2001, bmiidx6a, bmiidx6, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 2002, bmiidx7, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 7th style (GCB44 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 2002, bmiidx8, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 8th style (GCC44 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) +GAMEL( 1999, gq863, 0, twinkle, twinkle, twinkle_state, 0, ROT0, "Konami", "Twinkle System", MACHINE_IS_BIOS_ROOT, layout_bmiidx ) + +GAMEL( 1999, bmiidx, gq863, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX (863 JAB)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 1999, bmiidxa, bmiidx, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX (863 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 1999, bmiidxc, gq863, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX with DDR 2nd Club Version (896 JAB)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 1999, bmiidxca, bmiidxc, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX with DDR 2nd Club Version (896 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 1999, bmiidxs, gq863, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX Substream (983 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 1999, bmiidxc2, gq863, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX Substream with DDR 2nd Club Version 2 (984 A01 BM)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS, layout_bmiidx ) +GAMEL( 1999, bmiidx2, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 2nd style (GC985 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 2000, bmiidx3, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAC)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 2000, bmiidx3a, bmiidx3, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 2000, bmiidx4, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 4th style (GCA03 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS, layout_bmiidx ) +GAMEL( 2001, bmiidx5, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 5th style (GCA17 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 2001, bmiidx6, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAB)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS, layout_bmiidx ) +GAMEL( 2001, bmiidx6a, bmiidx6, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS, layout_bmiidx ) +GAMEL( 2002, bmiidx7, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 7th style (GCB44 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS, layout_bmiidx ) +GAMEL( 2002, bmiidx8, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 8th style (GCC44 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS, layout_bmiidx ) diff --git a/src/mame/drivers/unixpc.cpp b/src/mame/drivers/unixpc.cpp index 4f5102e862e..1edc150534c 100644 --- a/src/mame/drivers/unixpc.cpp +++ b/src/mame/drivers/unixpc.cpp @@ -338,7 +338,7 @@ static MACHINE_CONFIG_START( unixpc ) MCFG_DEVICE_ADD("ramrombank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(ramrombank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x400000) // floppy diff --git a/src/mame/drivers/upscope.cpp b/src/mame/drivers/upscope.cpp index ac732c80370..ab10bdd9dd9 100644 --- a/src/mame/drivers/upscope.cpp +++ b/src/mame/drivers/upscope.cpp @@ -265,8 +265,8 @@ static MACHINE_CONFIG_START( upscope ) MCFG_DEVICE_ADD("overlay", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(overlay_512kb_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(22) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(22) MCFG_ADDRESS_MAP_BANK_STRIDE(0x200000) MCFG_NVRAM_ADD_0FILL("nvram") diff --git a/src/mame/drivers/v6809.cpp b/src/mame/drivers/v6809.cpp index 09eab4db5ff..c9a27f1ea2f 100644 --- a/src/mame/drivers/v6809.cpp +++ b/src/mame/drivers/v6809.cpp @@ -117,10 +117,8 @@ static ADDRESS_MAP_START(v6809_mem, AS_PROGRAM, 8, v6809_state) AM_RANGE(0xf000, 0xf000) AM_MIRROR(0xfe) AM_DEVREAD("crtc", mc6845_device, status_r) AM_WRITE(v6809_address_w) AM_RANGE(0xf001, 0xf001) AM_MIRROR(0xfe) AM_DEVREAD("crtc", mc6845_device, register_r) AM_WRITE(v6809_register_w) AM_RANGE(0xf200, 0xf200) AM_MIRROR(0xff) AM_WRITE(videoram_w) - AM_RANGE(0xf500, 0xf500) AM_MIRROR(0x36) AM_DEVREADWRITE("acia0", acia6850_device, status_r, control_w) // modem - AM_RANGE(0xf501, 0xf501) AM_MIRROR(0x36) AM_DEVREADWRITE("acia0", acia6850_device, data_r, data_w) - AM_RANGE(0xf508, 0xf508) AM_MIRROR(0x36) AM_DEVREADWRITE("acia1", acia6850_device, status_r, control_w) // printer - AM_RANGE(0xf509, 0xf509) AM_MIRROR(0x36) AM_DEVREADWRITE("acia1", acia6850_device, data_r, data_w) + AM_RANGE(0xf500, 0xf501) AM_MIRROR(0x36) AM_DEVREADWRITE("acia0", acia6850_device, read, write) // modem + AM_RANGE(0xf508, 0xf509) AM_MIRROR(0x36) AM_DEVREADWRITE("acia1", acia6850_device, read, write) // printer AM_RANGE(0xf600, 0xf603) AM_MIRROR(0x3c) AM_DEVREADWRITE("fdc", mb8876_device, read, write) AM_RANGE(0xf640, 0xf64f) AM_MIRROR(0x30) AM_DEVREADWRITE("rtc", mm58274c_device, read, write) AM_RANGE(0xf680, 0xf683) AM_MIRROR(0x3c) AM_DEVREADWRITE("pia0", pia6821_device, read, write) diff --git a/src/mame/drivers/vcs80.cpp b/src/mame/drivers/vcs80.cpp index 7cc93cef46e..2fbbcf7fa48 100644 --- a/src/mame/drivers/vcs80.cpp +++ b/src/mame/drivers/vcs80.cpp @@ -236,7 +236,7 @@ static MACHINE_CONFIG_START( vcs80 ) MCFG_DEVICE_ADD("bdmem", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vcs80_bd_mem) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000) MACHINE_CONFIG_END diff --git a/src/mame/drivers/vendetta.cpp b/src/mame/drivers/vendetta.cpp index 25f940718f2..838fae4d76b 100644 --- a/src/mame/drivers/vendetta.cpp +++ b/src/mame/drivers/vendetta.cpp @@ -429,15 +429,15 @@ static MACHINE_CONFIG_START( vendetta ) MCFG_DEVICE_ADD("videobank0", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(videobank0_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(13) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(13) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000) MCFG_DEVICE_ADD("videobank1", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(videobank1_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(13) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(13) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000) MCFG_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz) /* verified with PCB */ diff --git a/src/mame/drivers/votrtnt.cpp b/src/mame/drivers/votrtnt.cpp index ae75ba53662..6b4e2d34792 100644 --- a/src/mame/drivers/votrtnt.cpp +++ b/src/mame/drivers/votrtnt.cpp @@ -81,8 +81,7 @@ private: static ADDRESS_MAP_START(6802_mem, AS_PROGRAM, 8, votrtnt_state) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x0000, 0x03ff) AM_MIRROR(0x9c00) AM_RAM /* RAM, 2114*2 (0x400 bytes) mirrored 4x */ - AM_RANGE(0x2000, 0x2000) AM_MIRROR(0x9ffe) AM_DEVREADWRITE("acia", acia6850_device, status_r, control_w) - AM_RANGE(0x2001, 0x2001) AM_MIRROR(0x9ffe) AM_DEVREADWRITE("acia", acia6850_device, data_r, data_w) + AM_RANGE(0x2000, 0x2001) AM_MIRROR(0x9ffe) AM_DEVREADWRITE("acia", acia6850_device, read, write) AM_RANGE(0x4000, 0x4000) AM_MIRROR(0x9fff) AM_DEVWRITE("votrax", votrax_sc01_device, write) AM_RANGE(0x6000, 0x6fff) AM_MIRROR(0x9000) AM_ROM /* ROM in potted block */ ADDRESS_MAP_END diff --git a/src/mame/drivers/vt240.cpp b/src/mame/drivers/vt240.cpp index 483783444fc..6e088eac2f7 100644 --- a/src/mame/drivers/vt240.cpp +++ b/src/mame/drivers/vt240.cpp @@ -653,8 +653,8 @@ static MACHINE_CONFIG_START( vt240 ) MCFG_DEVICE_ADD("bank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(bank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(20) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000) MCFG_SCREEN_ADD("screen", RASTER) diff --git a/src/mame/drivers/wardner.cpp b/src/mame/drivers/wardner.cpp index 939693788e3..834881e7c3f 100644 --- a/src/mame/drivers/wardner.cpp +++ b/src/mame/drivers/wardner.cpp @@ -371,8 +371,8 @@ static MACHINE_CONFIG_START( wardner ) MCFG_DEVICE_ADD("membank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(main_bank_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(18) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(18) MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000) MCFG_CPU_ADD("audiocpu", Z80, XTAL_14MHz/4) /* 3.5MHz */ diff --git a/src/mame/drivers/williams.cpp b/src/mame/drivers/williams.cpp index 9101957e002..2368d868229 100644 --- a/src/mame/drivers/williams.cpp +++ b/src/mame/drivers/williams.cpp @@ -1496,8 +1496,8 @@ static MACHINE_CONFIG_DERIVED( defender, williams ) MCFG_DEVICE_ADD("bankc000", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(defender_bankc000_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(16) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(16) MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000) MCFG_MACHINE_START_OVERRIDE(williams_state,defender) @@ -1659,8 +1659,8 @@ static MACHINE_CONFIG_START( williams2 ) MCFG_DEVICE_ADD("bank8000", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(williams2_bank8000_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(12) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(12) MCFG_ADDRESS_MAP_BANK_STRIDE(0x0800) MCFG_MACHINE_START_OVERRIDE(williams2_state,williams2) diff --git a/src/mame/includes/cave.h b/src/mame/includes/cave.h index d78be9c2fa6..8f9c2d5fa28 100644 --- a/src/mame/includes/cave.h +++ b/src/mame/includes/cave.h @@ -1,5 +1,9 @@ // license:BSD-3-Clause // copyright-holders:Luca Elia +#ifndef MAME_INCLUDES_CAVE_H +#define MAME_INCLUDES_CAVE_H + +#pragma once /*************************************************************************** @@ -14,26 +18,31 @@ #include "sound/okim6295.h" #include "screen.h" -struct sprite_cave +class cave_state : public driver_device { - int priority, flags; +public: + enum + { + MAX_PRIORITY = 4, + MAX_SPRITE_NUM = 0x400 + }; - const uint8_t *pen_data; /* points to top left corner of tile data */ - int line_offset; + struct sprite_cave + { + sprite_cave() { } - pen_t base_pen; - int tile_width, tile_height; - int total_width, total_height; /* in screen coordinates */ - int x, y, xcount0, ycount0; - int zoomx_re, zoomy_re; -}; + int priority = 0, flags = 0; -#define MAX_PRIORITY 4 -#define MAX_SPRITE_NUM 0x400 + const uint8_t *pen_data = nullptr; /* points to top left corner of tile data */ + int line_offset = 0; + + pen_t base_pen = 0; + int tile_width = 0, tile_height = 0; + int total_width = 0, total_height = 0; /* in screen coordinates */ + int x = 0, y = 0, xcount0 = 0, ycount0 = 0; + int zoomx_re = 0, zoomy_re = 0; + }; -class cave_state : public driver_device -{ -public: cave_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_videoregs(*this, "videoregs.%u", 0) @@ -63,8 +72,8 @@ public: optional_shared_ptr_array<uint16_t, 4> m_paletteram; /* video-related */ - struct sprite_cave *m_sprite[4]; - struct sprite_cave *m_sprite_table[4][MAX_PRIORITY][MAX_SPRITE_NUM + 1]; + std::unique_ptr<sprite_cave []> m_sprite[4]; + sprite_cave *m_sprite_table[4][MAX_PRIORITY][MAX_SPRITE_NUM + 1]; struct { @@ -268,10 +277,10 @@ private: void get_sprite_info_donpachi(int chip); void sprite_init_cave(); void cave_sprite_check(int chip, screen_device &screen, const rectangle &clip); - void do_blit_zoom32_cave( int chip, const struct sprite_cave *sprite ); - void do_blit_zoom32_cave_zb( int chip, const struct sprite_cave *sprite ); - void do_blit_32_cave( int chip, const struct sprite_cave *sprite ); - void do_blit_32_cave_zb( int chip, const struct sprite_cave *sprite ); + void do_blit_zoom32_cave( int chip, const sprite_cave *sprite ); + void do_blit_zoom32_cave_zb( int chip, const sprite_cave *sprite ); + void do_blit_32_cave( int chip, const sprite_cave *sprite ); + void do_blit_32_cave_zb( int chip, const sprite_cave *sprite ); void sprite_draw_cave( int chip, int priority ); void sprite_draw_cave_zbuf( int chip, int priority ); void sprite_draw_donpachi( int chip, int priority ); @@ -279,3 +288,5 @@ private: void init_cave(); void show_leds(); }; + +#endif // MAME_INCLUDES_CAVE_H diff --git a/src/mame/includes/micro3d.h b/src/mame/includes/micro3d.h index 04c5f7faa79..528e4b91218 100644 --- a/src/mame/includes/micro3d.h +++ b/src/mame/includes/micro3d.h @@ -13,6 +13,7 @@ #include "cpu/tms34010/tms34010.h" #include "cpu/mcs51/mcs51.h" #include "sound/upd7759.h" +#include "machine/mc2661.h" #include "machine/mc68681.h" @@ -64,7 +65,9 @@ public: m_joystick_y(*this, "JOYSTICK_Y"), m_shared_ram(*this, "shared_ram"), m_mac_sram(*this, "mac_sram"), - m_sprite_vram(*this, "sprite_vram") { } + m_sprite_vram(*this, "sprite_vram"), + m_vgb_uart(*this, "uart") + { } required_device<cpu_device> m_maincpu; required_device<i8051_device> m_audiocpu; @@ -88,11 +91,6 @@ public: /* Sound */ uint8_t m_sound_port_latch[4]; - /* TI UART */ - uint8_t m_ti_uart[9]; - int m_ti_uart_mode_cycle; - int m_ti_uart_sync_cycle; - /* Hardware version-check latch for BOTSS 1.1a */ uint8_t m_botss_latch; @@ -132,10 +130,8 @@ public: int m_drawing_buffer; int m_display_buffer; - DECLARE_WRITE16_MEMBER(micro3d_ti_uart_w); - DECLARE_READ16_MEMBER(micro3d_ti_uart_r); - DECLARE_WRITE32_MEMBER(micro3d_scc_w); - DECLARE_READ32_MEMBER(micro3d_scc_r); + DECLARE_WRITE8_MEMBER(vgb_uart_w); + DECLARE_READ8_MEMBER(vgb_uart_r); DECLARE_WRITE32_MEMBER(micro3d_mac1_w); DECLARE_READ32_MEMBER(micro3d_mac2_r); DECLARE_WRITE32_MEMBER(micro3d_mac2_w); @@ -189,6 +185,9 @@ public: protected: virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + +private: + required_device<mc2661_device> m_vgb_uart; }; #endif // MAME_INCLUDES_MICRO3D_H diff --git a/src/mame/includes/pgm2.h b/src/mame/includes/pgm2.h index da52a01d411..1488486b250 100644 --- a/src/mame/includes/pgm2.h +++ b/src/mame/includes/pgm2.h @@ -42,6 +42,7 @@ public: { } DECLARE_READ32_MEMBER(unk_startup_r); + DECLARE_READ32_MEMBER(rtc_r); DECLARE_WRITE32_MEMBER(fg_videoram_w); DECLARE_WRITE32_MEMBER(bg_videoram_w); diff --git a/src/mame/includes/swtpc09.h b/src/mame/includes/swtpc09.h index 8b558c10b23..3136208398c 100644 --- a/src/mame/includes/swtpc09.h +++ b/src/mame/includes/swtpc09.h @@ -22,7 +22,8 @@ #include "machine/terminal.h" #include "imagedev/harddriv.h" #include "machine/idectrl.h" -#include "machine/clock.h" +#include "machine/bankdev.h" +#include "machine/mc14411.h" #include "bus/rs232/rs232.h" @@ -33,6 +34,7 @@ public: swtpc09_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") + , m_brg(*this, "brg") , m_pia(*this, "pia") , m_ptm(*this, "ptm") , m_acia(*this, "acia") @@ -45,6 +47,7 @@ public: , m_piaide(*this, "piaide") , m_harddisk(*this, "harddisk") , m_ide(*this, "ide") + , m_dat(*this, "dat") { } DECLARE_FLOPPY_FORMATS(floppy_formats); @@ -85,6 +88,8 @@ public: DECLARE_WRITE8_MEMBER ( dc4_control_reg_w ); DECLARE_WRITE8_MEMBER(dat_w); + DECLARE_READ8_MEMBER(main_r); + DECLARE_WRITE8_MEMBER(main_w); DECLARE_DRIVER_INIT( swtpc09 ); DECLARE_DRIVER_INIT( swtpc09i ); @@ -95,10 +100,15 @@ public: DECLARE_WRITE8_MEMBER ( m6844_w ); protected: + virtual void machine_start() override; + void swtpc09_fdc_dma_transfer(); void swtpc09_irq_handler(uint8_t peripheral, uint8_t state); + offs_t dat_translate(offs_t offset) const; + required_device<cpu_device> m_maincpu; + required_device<mc14411_device> m_brg; required_device<pia6821_device> m_pia; required_device<ptm6840_device> m_ptm; required_device<acia6850_device> m_acia; @@ -111,6 +121,7 @@ protected: optional_device<pia6821_device> m_piaide; optional_device<device_t> m_harddisk; optional_device<ide_controller_device> m_ide; + required_shared_ptr<uint8_t> m_dat; uint8_t m_term_data; // terminal keyboard value uint8_t m_pia_counter; // this is the counter on pia porta @@ -124,6 +135,8 @@ protected: uint8_t m_active_interrupt; uint8_t m_interrupt; + address_space *m_banked_space; + // TODO: move this in proper device /* channel_data structure holds info about each 6844 DMA channel */ diff --git a/src/mame/includes/thomson.h b/src/mame/includes/thomson.h index 58223220730..52ca0698b01 100644 --- a/src/mame/includes/thomson.h +++ b/src/mame/includes/thomson.h @@ -20,6 +20,7 @@ #include "imagedev/floppy.h" #include "machine/6821pia.h" #include "machine/6850acia.h" +#include "machine/input_merger.h" #include "machine/mc6843.h" #include "machine/mc6846.h" #include "machine/mc6846.h" @@ -116,6 +117,8 @@ public: m_mc6843(*this, "mc6843"), m_acia6850(*this, "acia6850"), m_screen(*this, "screen"), + m_mainirq(*this, "mainirq"), + m_mainfirq(*this, "mainfirq"), m_io_game_port_directions(*this, "game_port_directions"), m_io_game_port_buttons(*this, "game_port_buttons"), m_io_mouse_x(*this, "mouse_x"), @@ -152,8 +155,6 @@ public: DECLARE_WRITE_LINE_MEMBER( to7_set_cassette_motor ); DECLARE_WRITE_LINE_MEMBER( mo5_set_cassette_motor ); DECLARE_WRITE_LINE_MEMBER( thom_dev_irq_0 ); - DECLARE_WRITE_LINE_MEMBER( thom_irq_1 ); - DECLARE_WRITE_LINE_MEMBER( thom_firq_1 ); DECLARE_WRITE8_MEMBER( to7_cartridge_w ); DECLARE_READ8_MEMBER( to7_cartridge_r ); DECLARE_WRITE8_MEMBER( to7_timer_port_out ); @@ -369,6 +370,8 @@ protected: optional_device<mc6843_device> m_mc6843; optional_device<acia6850_device> m_acia6850; required_device<screen_device> m_screen; + required_device<input_merger_device> m_mainirq; + required_device<input_merger_device> m_mainfirq; required_ioport m_io_game_port_directions; required_ioport m_io_game_port_buttons; required_ioport m_io_mouse_x; @@ -403,9 +406,6 @@ protected: /* buffer storing demodulated bits, only for k7 and with speed hack */ uint32_t m_to7_k7_bitsize; uint8_t* m_to7_k7_bits; - /* several devices on the same irqs */ - uint8_t m_thom_irq; - uint8_t m_thom_firq; /* ------------ cartridge ------------ */ uint8_t m_thom_cart_nb_banks; /* number of 16 KB banks (up to 4) */ uint8_t m_thom_cart_bank; /* current bank */ @@ -513,14 +513,7 @@ protected: int to7_get_cassette(); int mo5_get_cassette(); void mo5_set_cassette( int data ); - void thom_set_irq( int line, int state ); - void thom_set_firq( int line, int state ); void thom_irq_reset(); - void thom_irq_init(); - void thom_irq_0( int state ); - void thom_irq_3( int state ); - void thom_firq_2( int state ); - void thom_irq_4( int state ); void thom_set_caps_led( int led ); void to7_update_cart_bank(); void to7_set_init( int init ); diff --git a/src/mame/includes/wecleman.h b/src/mame/includes/wecleman.h index 2fa3508c51c..35756625ed2 100644 --- a/src/mame/includes/wecleman.h +++ b/src/mame/includes/wecleman.h @@ -1,5 +1,9 @@ // license:BSD-3-Clause // copyright-holders:Luca Elia +#ifndef MAME_INCLUDES_WECLEMAN_H +#define MAME_INCLUDES_WECLEMAN_H + +#pragma once #include "machine/gen_latch.h" #include "machine/timer.h" @@ -68,8 +72,6 @@ public: int m_sound_hw_type; bool m_hotchase_sound_hs; pen_t m_black_pen; - struct sprite *m_sprite_list; - struct sprite **m_spr_ptr_list; DECLARE_READ16_MEMBER(wecleman_protection_r); DECLARE_WRITE16_MEMBER(wecleman_protection_w); DECLARE_WRITE16_MEMBER(irqctrl_w); @@ -114,8 +116,6 @@ public: void hotchase_sprite_decode( int num16_banks, int bank_size ); void get_sprite_info(); void sortsprite(int *idx_array, int *key_array, int size); - template<class _BitmapClass> void do_blit_zoom32(_BitmapClass &bitmap, const rectangle &cliprect, struct sprite *sprite); - template<class _BitmapClass> void sprite_draw(_BitmapClass &bitmap, const rectangle &cliprect); void wecleman_draw_road(bitmap_rgb32 &bitmap, const rectangle &cliprect, int priority); void hotchase_draw_road(bitmap_ind16 &bitmap, const rectangle &cliprect); K051316_CB_MEMBER(hotchase_zoom_callback_1); @@ -136,4 +136,30 @@ public: required_device<palette_device> m_palette; required_device<screen_device> m_screen; required_device<generic_latch_8_device> m_soundlatch; + +private: + struct sprite_t + { + sprite_t() { } + + uint8_t *pen_data = nullptr; /* points to top left corner of tile data */ + int line_offset = 0; + + const pen_t *pal_data = nullptr; + rgb_t pal_base; + + int x_offset = 0, y_offset = 0; + int tile_width = 0, tile_height = 0; + int total_width = 0, total_height = 0; /* in screen coordinates */ + int x = 0, y = 0; + int shadow_mode = 0, flags = 0; + }; + + template<class _BitmapClass> void do_blit_zoom32(_BitmapClass &bitmap, const rectangle &cliprect, const sprite_t &sprite); + template<class _BitmapClass> void sprite_draw(_BitmapClass &bitmap, const rectangle &cliprect); + + std::unique_ptr<sprite_t []> m_sprite_list; + sprite_t **m_spr_ptr_list; }; + +#endif // MAME_INCLUDES_WECLEMAN_H diff --git a/src/mame/layout/bmiidx.lay b/src/mame/layout/bmiidx.lay new file mode 100644 index 00000000000..90a6b8a9282 --- /dev/null +++ b/src/mame/layout/bmiidx.lay @@ -0,0 +1,151 @@ +<?xml version="1.0"?> +<mamelayout version="2"> + <element name="spotlight0"><text string="spot 1" state="1"/></element> + <element name="spotlight1"><text string="spot 2" state="1"/></element> + <element name="spotlight2"><text string="spot 3" state="1"/></element> + <element name="spotlight3"><text string="spot 4" state="1"/></element> + <element name="spotlight4"><text string="spot 5" state="1"/></element> + <element name="spotlight5"><text string="spot 6" state="1"/></element> + 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x="0.1" y="0.4" width="0.8" height="0.2" /><color red="1.0" green="1.0" blue="1.0" /></text> + </element> + + <group name="displays"> + <cpanel element="surround"><bounds x="0" y="0" width="320" height="132" /></cpanel> + + <cpanel name="digit6" element="digit"><bounds x="16" y="16" width="48" height="80" /></cpanel> + <cpanel name="digit5" element="digit"><bounds x="64" y="16" width="48" height="80" /></cpanel> + <cpanel name="digit4" element="digit"><bounds x="112" y="16" width="48" height="80" /></cpanel> + <cpanel name="digit3" element="digit"><bounds x="160" y="16" width="48" height="80" /></cpanel> + <cpanel name="digit2" element="digit"><bounds x="208" y="16" width="48" height="80" /></cpanel> + <cpanel name="digit1" element="digit"><bounds x="256" y="16" width="48" height="80" /></cpanel> + + <cpanel element="label_h"><bounds x="48" y="100" width="16" height="16" /></cpanel> + <cpanel element="label_i"><bounds x="96" y="100" width="16" height="16" /></cpanel> + <cpanel element="label_n"><bounds x="144" y="100" width="16" height="16" /></cpanel> + <cpanel element="label_z"><bounds x="192" y="100" width="16" height="16" /></cpanel> + <cpanel element="label_v"><bounds x="240" y="100" width="16" height="16" /></cpanel> + <cpanel element="label_c"><bounds x="288" y="100" width="16" height="16" /></cpanel> + </group> + + <group name="keypad"> + <bounds x="0" y="0" width="3.5" height="6.5" /> + + <cpanel element="btn_d" inputtag="X0" inputmask="0x01"><bounds x="0.20" y="0.125" width="1.0" height="1.0" /></cpanel> + <cpanel element="btn_e" inputtag="X1" inputmask="0x01"><bounds x="1.25" y="0.125" width="1.0" height="1.0" /></cpanel> + <cpanel element="btn_f" inputtag="X2" inputmask="0x01"><bounds x="2.30" y="0.125" width="1.0" height="1.0" /></cpanel> + <cpanel element="btn_a" inputtag="X0" inputmask="0x02"><bounds x="0.20" y="1.175" width="1.0" height="1.0" /></cpanel> + <cpanel element="btn_b" inputtag="X1" inputmask="0x02"><bounds x="1.25" y="1.175" width="1.0" height="1.0" /></cpanel> + <cpanel element="btn_c" inputtag="X2" inputmask="0x02"><bounds x="2.30" y="1.175" width="1.0" height="1.0" /></cpanel> + <cpanel element="btn_7" inputtag="X0" inputmask="0x04"><bounds x="0.20" y="2.225" width="1.0" height="1.0" /></cpanel> + <cpanel element="btn_8" inputtag="X1" inputmask="0x04"><bounds x="1.25" y="2.225" width="1.0" height="1.0" /></cpanel> + <cpanel element="btn_9" inputtag="X2" inputmask="0x04"><bounds x="2.30" y="2.225" width="1.0" height="1.0" /></cpanel> + <cpanel element="btn_4" inputtag="X0" inputmask="0x08"><bounds x="0.20" y="3.275" width="1.0" height="1.0" /></cpanel> + <cpanel element="btn_5" inputtag="X1" inputmask="0x08"><bounds x="1.25" y="3.275" width="1.0" height="1.0" /></cpanel> + <cpanel element="btn_6" inputtag="X2" inputmask="0x08"><bounds x="2.30" y="3.275" width="1.0" height="1.0" /></cpanel> + <cpanel element="btn_1" inputtag="X0" inputmask="0x10"><bounds x="0.20" y="4.325" width="1.0" height="1.0" /></cpanel> + <cpanel element="btn_2" inputtag="X1" inputmask="0x10"><bounds x="1.25" y="4.325" width="1.0" height="1.0" /></cpanel> + <cpanel element="btn_3" inputtag="X2" inputmask="0x10"><bounds x="2.30" y="4.325" width="1.0" height="1.0" /></cpanel> + <cpanel element="btn_0" inputtag="X0" inputmask="0x20"><bounds x="0.725" y="5.375" width="1.0" height="1.0" /></cpanel> + <cpanel element="btn_rst" inputtag="RESET" inputmask="0x01"><bounds x="1.775" y="5.375" width="1.0" height="1.0" /></cpanel> + </group> + + <view name="LED Displays, Terminal and Keypad"> + <cpanel element="beige"><bounds x="320" y="0" width="172" height="372" /></cpanel> + <group ref="displays"><bounds x="0" y="0" width="320" height="132" /></group> + <group ref="keypad"><bounds x="336" y="16" width="140" height="260" /></group> + <screen index="0"><bounds x="0" y="132" width="320" height="240" /></screen> + </view> + + <view name="LED Displays and Terminal"> + <group ref="displays"><bounds x="0" y="0" width="320" height="132" /></group> + <screen index="0"><bounds x="0" y="132" width="320" height="240" /></screen> + </view> + + <view name="LED Displays and Keypad"> + <cpanel element="beige"><bounds x="0" y="0" width="320" height="424" /></cpanel> + <group ref="displays"><bounds x="0" y="0" width="320" height="132" /></group> + <group ref="keypad"><bounds x="164" y="148" width="140" height="260" /></group> + </view> + + <view name="LED Displays"> + <group ref="displays"><bounds x="0" y="0" width="320" height="132" /></group> </view> </mamelayout> diff --git a/src/mame/machine/bbc.cpp b/src/mame/machine/bbc.cpp index b3ea7af5aae..6a99a712bb2 100644 --- a/src/mame/machine/bbc.cpp +++ b/src/mame/machine/bbc.cpp @@ -484,8 +484,7 @@ READ8_MEMBER(bbc_state::bbcm_r) myo = offset-0x200; if ((myo>=0x00) && (myo<=0x06) && (myo+0x01) & 1) return m_hd6845->status_r(space, myo-0x00); /* Video controller */ if ((myo>=0x01) && (myo<=0x07) && (myo & 1)) return m_hd6845->register_r(space, myo-0x01); - if ((myo>=0x08) && (myo<=0x0e) && (myo+0x01) & 1) return m_acia ? m_acia->status_r(space, myo-0x08) : 0xfe; /* Serial controller */ - if ((myo>=0x09) && (myo<=0x0f) && (myo & 1)) return m_acia ? m_acia->data_r(space, myo-0x09) : 0xfe; + if ((myo>=0x08) && (myo<=0x0f)) return m_acia ? m_acia->read(space, myo & 0x01) : 0xfe; /* Serial controller */ if ((myo>=0x10) && (myo<=0x17)) return 0xfe; /* Serial System Chip */ if ((myo>=0x18) && (myo<=0x1f)) return m_upd7002 ? m_upd7002->read(space, myo-0x18) : 0xfe; /* A to D converter */ if ((myo>=0x20) && (myo<=0x23)) return 0xfe; /* VideoULA */ @@ -519,8 +518,7 @@ WRITE8_MEMBER(bbc_state::bbcm_w) myo=offset-0x200; if ((myo>=0x00) && (myo<=0x06) && (myo+0x01) & 1) m_hd6845->address_w(space, myo-0x00, data); /* Video Controller */ if ((myo>=0x01) && (myo<=0x07) && (myo & 1)) m_hd6845->register_w(space, myo-0x01, data); - if ((myo>=0x08) && (myo<=0x0e) && (myo+0x01) & 1) if (m_acia) m_acia->control_w(space, myo-0x08, data); /* Serial controller */ - if ((myo>=0x09) && (myo<=0x0f) && (myo & 1)) if (m_acia) m_acia->data_w(space, myo-0x09, data); + if ((myo>=0x08) && (myo<=0x0f)) if (m_acia) m_acia->write(space, myo & 0x01, data); /* Serial controller */ if ((myo>=0x10) && (myo<=0x17)) bbc_SerialULA_w(space, myo-0x10, data); /* Serial System Chip */ if ((myo>=0x18) && (myo<=0x1f) && (m_upd7002)) m_upd7002->write(space, myo-0x18, data); /* A to D converter */ if ((myo>=0x20) && (myo<=0x23)) bbc_videoULA_w(space, myo-0x20, data); /* VideoULA */ diff --git a/src/mame/machine/cedar_magnet_sprite.cpp b/src/mame/machine/cedar_magnet_sprite.cpp index 0745fdc37d7..87c1fb4a3b7 100644 --- a/src/mame/machine/cedar_magnet_sprite.cpp +++ b/src/mame/machine/cedar_magnet_sprite.cpp @@ -228,8 +228,8 @@ MACHINE_CONFIG_MEMBER( cedar_magnet_sprite_device::device_add_mconfig ) MCFG_DEVICE_ADD("sp_sub_ram", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(cedar_magnet_sprite_sub_ram_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(18) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(18) MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000) MACHINE_CONFIG_END diff --git a/src/mame/machine/isbc_215g.cpp b/src/mame/machine/isbc_215g.cpp index cfb600e4730..f60eabdc3ec 100644 --- a/src/mame/machine/isbc_215g.cpp +++ b/src/mame/machine/isbc_215g.cpp @@ -354,7 +354,7 @@ MACHINE_CONFIG_MEMBER( isbc_215g_device::device_add_mconfig ) MCFG_CPU_ADD("u84", I8089, XTAL_15MHz / 3) MCFG_CPU_PROGRAM_MAP(isbc_215g_mem) MCFG_CPU_IO_MAP(isbc_215g_io) - MCFG_I8089_DATABUS_WIDTH(16) + MCFG_I8089_DATA_WIDTH(16) MCFG_HARDDISK_ADD("drive0") MCFG_HARDDISK_ADD("drive1") diff --git a/src/mame/machine/micro3d.cpp b/src/mame/machine/micro3d.cpp index a272edf2a4d..dbc18a3018a 100644 --- a/src/mame/machine/micro3d.cpp +++ b/src/mame/machine/micro3d.cpp @@ -84,132 +84,25 @@ WRITE8_MEMBER(micro3d_state::duart_output_w) * *************************************/ -enum +READ8_MEMBER( micro3d_state::vgb_uart_r ) { - RX, TX, STATUS, SYN1, SYN2, DLE, MODE1, MODE2, COMMAND -}; + // the mode and sync registers switched places? + if (offset == 1 || offset == 2) + offset ^= 3; - -WRITE16_MEMBER(micro3d_state::micro3d_ti_uart_w) -{ - switch (offset) - { - case 0x0: - { - m_ti_uart[TX] = data; -#if VGB_MONITOR_DISPLAY - mame_debug_printf("%c",data); -#endif - m_ti_uart[STATUS] |= 1; - break; - } - case 0x1: - { - if (m_ti_uart_mode_cycle == 0) - { - m_ti_uart[MODE1] = data; - m_ti_uart_mode_cycle = 1; - } - else - { - m_ti_uart[MODE2] = data; - m_ti_uart_mode_cycle = 0; - } - break; - } - case 0x2: - { - if (m_ti_uart_sync_cycle == 0) - { - m_ti_uart[SYN1] = data; - m_ti_uart_mode_cycle = 1; - } - else if (m_ti_uart_sync_cycle == 1) - { - m_ti_uart[SYN2] = data; - m_ti_uart_mode_cycle = 2; - } - else - { - m_ti_uart[DLE] = data; - m_ti_uart_mode_cycle = 0; - } - break; - } - case 0x3: - { - m_ti_uart[COMMAND] = data; - m_ti_uart_mode_cycle = 0; - m_ti_uart_sync_cycle = 0; - break; - } - } -} - -READ16_MEMBER(micro3d_state::micro3d_ti_uart_r) -{ - switch (offset) - { - case 0x0: - { - m_ti_uart[STATUS] ^= 2; - return m_ti_uart[RX]; - } - case 0x1: - { - if (m_ti_uart_mode_cycle == 0) - { - m_ti_uart_mode_cycle = 1; - return m_ti_uart[MODE1]; - } - else - { - m_ti_uart_mode_cycle = 0; - return m_ti_uart[MODE2]; - } - } - case 0x2: - { - return m_ti_uart[STATUS]; - } - case 0x3: - { - m_ti_uart_mode_cycle = m_ti_uart_sync_cycle = 0; - return m_ti_uart[COMMAND]; - } - default: - { - logerror("Unknown TI UART access.\n"); - return 0; - } - } + return m_vgb_uart->read(space, offset); } - -/************************************* - * - * Z8530 SCC (Am29000) - * - *************************************/ - -WRITE32_MEMBER(micro3d_state::micro3d_scc_w) +WRITE8_MEMBER( micro3d_state::vgb_uart_w ) { -#if DRMATH_MONITOR_DISPLAY - if (offset == 1) - osd_printf_debug("%c", data); -#endif -} + // the mode and sync registers switched places? + if (offset == 1 || offset == 2) + offset ^= 3; -READ32_MEMBER(micro3d_state::micro3d_scc_r) -{ - if (offset == 1) - return 0xd; - else - return 5; + m_vgb_uart->write(space, offset, data); } - /************************************* * * Math unit @@ -652,8 +545,6 @@ DRIVER_INIT_MEMBER(micro3d_state,botss) void micro3d_state::machine_reset() { - m_ti_uart[STATUS] = 1; - m_vgb->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); m_drmath->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); diff --git a/src/mame/machine/osborne1.cpp b/src/mame/machine/osborne1.cpp index f535aaf2383..29e00df8dfb 100644 --- a/src/mame/machine/osborne1.cpp +++ b/src/mame/machine/osborne1.cpp @@ -53,8 +53,7 @@ READ8_MEMBER( osborne1_state::bank_2xxx_3xxx_r ) } if ((offset & 0xA00) == 0xA00) // Serial { - if (offset & 0x01) data &= m_acia->data_r(space, 0); - else data &= m_acia->status_r(space, 0); + data &= m_acia->read(space, offset & 0x01); } if ((offset & 0xC00) == 0x400) // SCREEN-PAC { @@ -80,8 +79,7 @@ WRITE8_MEMBER( osborne1_state::bank_2xxx_3xxx_w ) m_pia0->write(space, offset & 0x03, data); if ((offset & 0xA00) == 0xA00) // Serial { - if (offset & 0x01) m_acia->data_w(space, 0, data); - else m_acia->control_w(space, 0, data); + m_acia->write(space, offset & 0x01, data); } if ((offset & 0xC00) == 0x400) // SCREEN-PAC { diff --git a/src/mame/machine/swtpc09.cpp b/src/mame/machine/swtpc09.cpp index 9e7773a09fb..e41dbb8e305 100644 --- a/src/mame/machine/swtpc09.cpp +++ b/src/mame/machine/swtpc09.cpp @@ -150,9 +150,8 @@ WRITE8_MEMBER ( swtpc09_state::dmf2_control_reg_w ) /* FDC controller dma transfer */ void swtpc09_state::swtpc09_fdc_dma_transfer() { - uint8_t *RAM = memregion("maincpu")->base(); uint32_t offset; - address_space &space = m_maincpu->space(AS_PROGRAM); + address_space &space = *m_banked_space; offset = (m_fdc_dma_address_reg & 0x0f)<<16; @@ -163,11 +162,11 @@ void swtpc09_state::swtpc09_fdc_dma_transfer() uint8_t data = m_fdc->data_r(space, 0); LOG(("swtpc09_dma_write_mem %05X %02X\n", m_m6844_channel[0].address + offset, data)); - RAM[m_m6844_channel[0].address + offset] = data; + space.write_byte(m_m6844_channel[0].address + offset, data); } else { - uint8_t data = RAM[m_m6844_channel[0].address + offset]; + uint8_t data = space.read_byte(m_m6844_channel[0].address + offset); m_fdc->data_w(space, 0, data); //LOG(("swtpc09_dma_read_mem %04X %02X\n", m_m6844_channel[0].address, data)); @@ -453,128 +452,20 @@ WRITE8_MEMBER( swtpc09_state::piaide_b_w ) /* memory map is created based on system_type flag */ /* this is accommodate the different cards installed */ -WRITE8_MEMBER(swtpc09_state::dat_w) +offs_t swtpc09_state::dat_translate(offs_t offset) const { - uint8_t a16_to_a19, a12_to_a15; - uint8_t *RAM = memregion("maincpu")->base(); - uint32_t physical_address, logical_address; - - address_space &mem = m_maincpu->space(AS_PROGRAM); - - fd1793_device *fdc = machine().device<fd1793_device>("fdc"); - pia6821_device *pia = machine().device<pia6821_device>("pia"); - ptm6840_device *ptm = machine().device<ptm6840_device>("ptm"); - acia6850_device *acia = machine().device<acia6850_device>("acia"); - via6522_device *via = machine().device<via6522_device>("via"); - pia6821_device *piaide = machine().device<pia6821_device>("piaide"); - - a16_to_a19 = data & 0xf0; - a12_to_a15 = ~data & 0x0f; //lower 4 bits are inverted - physical_address = ((a16_to_a19 + a12_to_a15) << 12); - logical_address = offset << 12; - LOG(("swtpc09_dat_bank_unmap Logical address:%04X\n", offset << 12 )); - LOG(("swtpc09_dat_bank_set dat:%02X Logical address:%04X Physical address:%05X\n", data, offset << 12, physical_address )); - - - // unmap page to be changed - mem.unmap_readwrite(offset << 12, (offset << 12)+0x0fff); - - // map in new page - if (a12_to_a15 == 0x0e) // 0xE000 address range to be mapped in at this page - { - if (m_system_type == FLEX_DMF2) // if flex/sbug, map in acia at 0xE004 - { - mem.nop_readwrite(logical_address+0x000, logical_address+0x003); - mem.install_readwrite_handler(logical_address+0x004, logical_address+0x004, read8_delegate(FUNC(acia6850_device::status_r), acia), write8_delegate(FUNC(acia6850_device::control_w),acia)); - mem.install_readwrite_handler(logical_address+0x005, logical_address+0x005, read8_delegate(FUNC(acia6850_device::data_r), acia), write8_delegate(FUNC(acia6850_device::data_w),acia)); - mem.nop_readwrite(logical_address+0x006, logical_address+0x07f); - mem.install_readwrite_handler(logical_address+0x080, logical_address+0x08f, read8_delegate(FUNC(pia6821_device::read), pia), write8_delegate(FUNC(pia6821_device::write), pia)); - mem.install_readwrite_handler(logical_address+0x090, logical_address+0x09f, read8_delegate(FUNC(ptm6840_device::read), ptm), write8_delegate(FUNC(ptm6840_device::write), ptm)); - mem.nop_readwrite(logical_address+0x0a0, logical_address+0xfff); - } - else if (m_system_type == FLEX_DC4_PIAIDE) // if flex/sbug and dc4 and piaide - { - mem.nop_readwrite(logical_address+0x000, logical_address+0x003); - mem.install_readwrite_handler(logical_address+0x004, logical_address+0x004, read8_delegate(FUNC(acia6850_device::status_r), acia), write8_delegate(FUNC(acia6850_device::control_w),acia)); - mem.install_readwrite_handler(logical_address+0x005, logical_address+0x005, read8_delegate(FUNC(acia6850_device::data_r), acia), write8_delegate(FUNC(acia6850_device::data_w),acia)); - mem.install_write_handler(logical_address+0x014, logical_address+0x014, write8_delegate(FUNC(swtpc09_state::dc4_control_reg_w),this)); - mem.install_readwrite_handler(logical_address+0x018, logical_address+0x01b, read8_delegate(FUNC(fd1793_device::read), fdc), write8_delegate(FUNC(fd1793_device::write),fdc)); - //mem.nop_readwrite(logical_address+0x01c, logical_address+0x05f); - mem.install_readwrite_handler(logical_address+0x060, logical_address+0x06f, read8_delegate(FUNC(pia6821_device::read), piaide), write8_delegate(FUNC(pia6821_device::write), piaide)); - //mem.nop_readwrite(logical_address+0x070, logical_address+0x07f); - mem.install_readwrite_handler(logical_address+0x080, logical_address+0x08f, read8_delegate(FUNC(pia6821_device::read), pia), write8_delegate(FUNC(pia6821_device::write), pia)); - mem.install_readwrite_handler(logical_address+0x090, logical_address+0x09f, read8_delegate(FUNC(ptm6840_device::read), ptm), write8_delegate(FUNC(ptm6840_device::write), ptm)); - //mem.nop_readwrite(logical_address+0x0a0, logical_address+0x7ff); - mem.install_rom(logical_address+0x800, logical_address+0xfff, &RAM[0xe800]); //piaide rom - } - else // assume unibug, map in acia at 0xE000 - { - mem.install_readwrite_handler(logical_address+0x000, logical_address+0x000, read8_delegate(FUNC(acia6850_device::status_r), acia), write8_delegate(FUNC(acia6850_device::control_w), acia)); - mem.install_readwrite_handler(logical_address+0x001, logical_address+0x001, read8_delegate(FUNC(acia6850_device::data_r), acia), write8_delegate(FUNC(acia6850_device::data_w), acia)); - mem.nop_readwrite(logical_address+0x002, logical_address+0x07f); - mem.install_readwrite_handler(logical_address+0x080, logical_address+0x08f, read8_delegate(FUNC(pia6821_device::read), pia), write8_delegate(FUNC(pia6821_device::write), pia)); - mem.install_readwrite_handler(logical_address+0x090, logical_address+0x09f, read8_delegate(FUNC(ptm6840_device::read), ptm), write8_delegate(FUNC(ptm6840_device::write), ptm)); - mem.nop_readwrite(logical_address+0x0a0, logical_address+0xfff); - } - } - else if (a12_to_a15 == 0x0f) // 0xF000 address range to be mapped in at this page - { - if (m_system_type == UNIFLEX_DMF2 || m_system_type == FLEX_DMF2) // if DMF2 conroller this is the map - { - mem.install_readwrite_handler(logical_address+0x000, logical_address+0x01f, read8_delegate(FUNC(swtpc09_state::m6844_r),this), write8_delegate(FUNC(swtpc09_state::m6844_w),this)); - mem.install_readwrite_handler(logical_address+0x020, logical_address+0x023, read8_delegate(FUNC(fd1793_device::read), fdc), write8_delegate(FUNC(fd1793_device::write),fdc)); - mem.install_readwrite_handler(logical_address+0x024, logical_address+0x03f, read8_delegate(FUNC(swtpc09_state::dmf2_control_reg_r),this), write8_delegate(FUNC(swtpc09_state::dmf2_control_reg_w),this)); - mem.install_readwrite_handler(logical_address+0x040, logical_address+0x041, read8_delegate(FUNC(swtpc09_state::dmf2_dma_address_reg_r),this), write8_delegate(FUNC(swtpc09_state::dmf2_dma_address_reg_w),this)); - //mem.nop_readwrite(logical_address+0x042, logical_address+0x7ff); - mem.install_rom(logical_address+0x800, logical_address+0xfff, &RAM[0xf800]); - mem.install_write_handler(logical_address+0xff0, logical_address+0xfff, write8_delegate(FUNC(swtpc09_state::dat_w),this)); - } - else if (m_system_type == FLEX_DC4_PIAIDE) // 2k ram for piaide on s09 board - { - //mem.install_readwrite_handler(logical_address+0x000, logical_address+0x01f, read8_delegate(FUNC(swtpc09_state::m6844_r),this), write8_delegate(FUNC(swtpc09_state::m6844_w),this)); - //mem.install_readwrite_handler(logical_address+0x020, logical_address+0x023, read8_delegate(FUNC(fd1793_device::read), fdc), write8_delegate(FUNC(fd1793_device::write),fdc)); - //mem.install_readwrite_handler(logical_address+0x024, logical_address+0x03f, read8_delegate(FUNC(swtpc09_state::dmf2_control_reg_r),this), write8_delegate(FUNC(swtpc09_state::dmf2_control_reg_w),this)); - //mem.install_readwrite_handler(logical_address+0x040, logical_address+0x041, read8_delegate(FUNC(swtpc09_state::dmf2_dma_address_reg_r),this), write8_delegate(FUNC(swtpc09_state::dmf2_dma_address_reg_w),this)); - mem.install_ram(logical_address+0x000, logical_address+0x7ff, &RAM[0xf000]); - mem.install_rom(logical_address+0x800, logical_address+0xfff, &RAM[0xf800]); - mem.install_write_handler(logical_address+0xff0, logical_address+0xfff, write8_delegate(FUNC(swtpc09_state::dat_w),this)); - } - else // assume DMF3 controller - { - mem.install_readwrite_handler(logical_address+0x000, logical_address+0x01f, read8_delegate(FUNC(swtpc09_state::m6844_r),this), write8_delegate(FUNC(swtpc09_state::m6844_w),this)); - mem.install_readwrite_handler(logical_address+0x020, logical_address+0x023, read8_delegate(FUNC(fd1793_device::read), fdc), write8_delegate(FUNC(fd1793_device::write),fdc)); - mem.install_readwrite_handler(logical_address+0x024, logical_address+0x024, read8_delegate(FUNC(swtpc09_state::dmf3_control_reg_r),this), write8_delegate(FUNC(swtpc09_state::dmf3_control_reg_w),this)); - mem.install_readwrite_handler(logical_address+0x025, logical_address+0x025, read8_delegate(FUNC(swtpc09_state::dmf3_dma_address_reg_r),this), write8_delegate(FUNC(swtpc09_state::dmf3_dma_address_reg_w),this)); - //mem.nop_readwrite(logical_address+0x030, logical_address+0x03f); - mem.install_readwrite_handler(logical_address+0x040, logical_address+0x04f, read8_delegate(FUNC(via6522_device::read), via), write8_delegate(FUNC(via6522_device::write), via)); - //mem.nop_readwrite(logical_address+0x050, logical_address+0x7ff); - mem.install_rom(logical_address+0x800, logical_address+0xfff, &RAM[0xf800]); - mem.install_write_handler(logical_address+0xff0, logical_address+0xfff, write8_delegate(FUNC(swtpc09_state::dat_w),this)); - } - } - else if (offset==0x0f) // then we need to leave in top part of ram and dat write - { - mem.install_ram(logical_address, logical_address+0x0eff, &RAM[physical_address]); - mem.install_rom(logical_address+0xf00, logical_address+0xfff, &RAM[0xff00]); - mem.install_write_handler(logical_address+0xff0, logical_address+0xfff, write8_delegate(FUNC(swtpc09_state::dat_w),this)); - - } - else // all the rest is treated as ram, 1MB ram emulated - { - mem.install_ram(logical_address, logical_address+0x0fff, &RAM[physical_address]); - } + // lower 4 bits are inverted + return offs_t(m_dat[offset >> 12] ^ 0x0f) << 12 | (offset & 0x0fff); +} -// unused code to limit to 256k ram -// else if (!(a12_to_a15 & 0x0c) ) // limit ram to 256k || a12_to_a15 == 0x02 -// { -// memory_install_ram(space, logical_address, logical_address+0x0fff, 0, 0, &RAM[physical_address]); -// } -// -// else // all the rest is treated as unallocated -// { -// memory_nop_readwrite(space, logical_address, logical_address+0x0fff, 0, 0); -// } +READ8_MEMBER(swtpc09_state::main_r) +{ + return m_banked_space->read_byte(dat_translate(offset)); +} +WRITE8_MEMBER(swtpc09_state::main_w) +{ + m_banked_space->write_byte(dat_translate(offset), data); } /* MC6844 DMA controller I/O */ @@ -771,18 +662,16 @@ WRITE8_MEMBER( swtpc09_state::m6844_w ) } -DRIVER_INIT_MEMBER( swtpc09_state, swtpc09 ) +void swtpc09_state::machine_start() { - int i; m_pia_counter = 0; // init ptm/pia counter to 0 m_term_data = 0; // terminal keyboard input m_fdc_status = 0; // for floppy controller - m_system_type = FLEX_DMF2; m_interrupt = 0; m_active_interrupt = false; - /* reset the 6844 */ - for (i = 0; i < 4; i++) + // reset the 6844 + for (int i = 0; i < 4; i++) { m_m6844_channel[i].active = 0; m_m6844_channel[i].control = 0x00; @@ -791,72 +680,29 @@ DRIVER_INIT_MEMBER( swtpc09_state, swtpc09 ) m_m6844_interrupt = 0x00; m_m6844_chain = 0x00; + m_banked_space = &subdevice<address_map_bank_device>("bankdev")->space(AS_PROGRAM); + + m_brg->rsa_w(0); + m_brg->rsb_w(1); +} + +DRIVER_INIT_MEMBER( swtpc09_state, swtpc09 ) +{ + m_system_type = FLEX_DMF2; } DRIVER_INIT_MEMBER( swtpc09_state, swtpc09i ) { - int i; - m_pia_counter = 0; // init ptm/pia counter to 0 - m_term_data = 0; // terminal keyboard input - m_fdc_status = 0; // for floppy controller m_system_type = FLEX_DC4_PIAIDE; - m_interrupt = 0; - m_active_interrupt = false; - - /* reset the 6844 */ - for (i = 0; i < 4; i++) - { - m_m6844_channel[i].active = 0; - m_m6844_channel[i].control = 0x00; - } - m_m6844_priority = 0x00; - m_m6844_interrupt = 0x00; - m_m6844_chain = 0x00; - } DRIVER_INIT_MEMBER( swtpc09_state, swtpc09u ) { - int i; - m_pia_counter = 0; //init ptm/pia counter to 0 - m_term_data = 0; //terminal keyboard input - m_fdc_status = 0; // for floppy controller m_system_type = UNIFLEX_DMF2; - m_interrupt = 0; - m_active_interrupt = false; - - /* reset the 6844 */ - for (i = 0; i < 4; i++) - { - m_m6844_channel[i].active = 0; - m_m6844_channel[i].control = 0x00; - } - m_m6844_priority = 0x00; - m_m6844_interrupt = 0x00; - m_m6844_chain = 0x00; - } DRIVER_INIT_MEMBER( swtpc09_state, swtpc09d3 ) { - int i; - m_pia_counter = 0; //init ptm/pia counter to 0 - m_term_data = 0; //terminal keyboard input - m_fdc_status = 0; // for floppy controller m_via_ca1_input = 0; m_system_type = UNIFLEX_DMF3; - m_interrupt = 0; - m_active_interrupt = false; - - - /* reset the 6844 */ - for (i = 0; i < 4; i++) - { - m_m6844_channel[i].active = 0; - m_m6844_channel[i].control = 0x00; - } - m_m6844_priority = 0x00; - m_m6844_interrupt = 0x00; - m_m6844_chain = 0x00; - } diff --git a/src/mame/machine/taitocchip.cpp b/src/mame/machine/taitocchip.cpp index dfd85aa29fa..8b91b163508 100644 --- a/src/mame/machine/taitocchip.cpp +++ b/src/mame/machine/taitocchip.cpp @@ -167,8 +167,8 @@ MACHINE_CONFIG_MEMBER( taito_cchip_device::device_add_mconfig ) MCFG_DEVICE_ADD("upd4464_bank", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(cchip_ram_bank) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(13) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(13) MCFG_ADDRESS_MAP_BANK_STRIDE(0x400) MACHINE_CONFIG_END diff --git a/src/mame/machine/thomson.cpp b/src/mame/machine/thomson.cpp index 5147e0418fa..a5c958f1eb6 100644 --- a/src/mame/machine/thomson.cpp +++ b/src/mame/machine/thomson.cpp @@ -226,100 +226,13 @@ WRITE_LINE_MEMBER( thomson_state::mo5_set_cassette_motor ) /* ------------ IRQs ------------ */ -void thomson_state::thom_set_irq( int line, int state ) -{ - int old = m_thom_irq; - - if ( state ) - m_thom_irq |= 1 << line; - else - m_thom_irq &= ~(1 << line); - - if ( !old && m_thom_irq ) - LOG_IRQ(( "%f thom_set_irq: irq line up %i\n", machine().time().as_double(), line )); - if ( old && !m_thom_irq ) - LOG_IRQ(( "%f thom_set_irq: irq line down %i\n", machine().time().as_double(), line )); - - m_maincpu->set_input_line(M6809_IRQ_LINE, m_thom_irq ? ASSERT_LINE : CLEAR_LINE); -} - - - -void thomson_state::thom_set_firq ( int line, int state ) -{ - int old = m_thom_firq; - - if ( state ) - m_thom_firq |= 1 << line; - else - m_thom_firq &= ~(1 << line); - - if ( !old && m_thom_firq ) - LOG_IRQ(( "%f thom_set_firq: firq line up %i\n", machine().time().as_double(), line )); - if ( old && !m_thom_firq ) - LOG_IRQ(( "%f thom_set_firq: firq line down %i\n", machine().time().as_double(), line )); - - m_maincpu->set_input_line(M6809_FIRQ_LINE, m_thom_firq ? ASSERT_LINE : CLEAR_LINE); -} - - - void thomson_state::thom_irq_reset() { - m_thom_irq = 0; - m_thom_firq = 0; - m_maincpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE ); - m_maincpu->set_input_line(M6809_FIRQ_LINE, CLEAR_LINE ); -} - - - -void thomson_state::thom_irq_init() -{ - save_item(NAME(m_thom_irq)); - save_item(NAME(m_thom_firq)); -} - - - -void thomson_state::thom_irq_0( int state ) -{ - thom_set_irq( 0, state ); -} - -WRITE_LINE_MEMBER( thomson_state::thom_dev_irq_0 ) -{ - thom_irq_0( state ); + m_mainfirq->in_w<2>(0); } -WRITE_LINE_MEMBER( thomson_state::thom_irq_1 ) -{ - thom_set_irq ( 1, state ); -} - -void thomson_state::thom_irq_3( int state ) -{ - thom_set_irq ( 3, state ); -} - -WRITE_LINE_MEMBER( thomson_state::thom_firq_1 ) -{ - thom_set_firq ( 1, state ); -} - -void thomson_state::thom_firq_2( int state ) -{ - thom_set_firq ( 2, state ); -} - -void thomson_state::thom_irq_4( int state ) -{ - thom_set_irq ( 4, state ); -} - - /* current IRQ usage: @@ -614,8 +527,8 @@ MACHINE_CONFIG_MEMBER( to7_io_line_device::device_add_mconfig ) MCFG_PIA_WRITEPA_HANDLER(WRITE8(to7_io_line_device, porta_out)) MCFG_PIA_WRITEPB_HANDLER(DEVWRITE8("cent_data_out", output_latch_device, write)) MCFG_PIA_CB2_HANDLER(DEVWRITELINE("centronics", centronics_device, write_strobe)) - MCFG_PIA_IRQA_HANDLER(DEVWRITELINE("^", thomson_state, thom_firq_1)) - MCFG_PIA_IRQB_HANDLER(DEVWRITELINE("^", thomson_state, thom_firq_1)) + MCFG_PIA_IRQA_HANDLER(DEVWRITELINE("^mainfirq", input_merger_device, in_w<1>)) + MCFG_PIA_IRQB_HANDLER(DEVWRITELINE("^mainfirq", input_merger_device, in_w<1>)) MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, nullptr) MCFG_RS232_RXD_HANDLER(WRITELINE(to7_io_line_device, write_rxd)) @@ -769,10 +682,8 @@ READ8_MEMBER( thomson_state::to7_modem_mea8000_r ) switch (offset) { case 0: - return m_acia->status_r(space, offset ); - case 1: - return m_acia->data_r(space, offset ); + return m_acia->read(space, offset & 1); default: return 0; @@ -793,11 +704,8 @@ WRITE8_MEMBER( thomson_state::to7_modem_mea8000_w ) switch (offset) { case 0: - m_acia->control_w( space, offset, data ); - break; - case 1: - m_acia->data_w( space, offset, data ); + m_acia->write(space, offset & 1, data); break; } } @@ -1087,7 +995,6 @@ MACHINE_START_MEMBER( thomson_state, to7 ) LOG (( "to7: machine start called\n" )); /* subsystems */ - thom_irq_init(); to7_game_init(); to7_floppy_init(mem + 0x20000); to7_modem_init(); @@ -1311,7 +1218,6 @@ MACHINE_START_MEMBER( thomson_state, to770 ) LOG (( "to770: machine start called\n" )); /* subsystems */ - thom_irq_init(); to7_game_init(); to7_floppy_init( mem + 0x20000 ); to7_modem_init(); @@ -1692,7 +1598,6 @@ MACHINE_START_MEMBER( thomson_state, mo5 ) LOG (( "mo5: machine start called\n" )); /* subsystems */ - thom_irq_init(); to7_game_init(); to7_floppy_init( mem + 0x20000 ); to7_modem_init(); @@ -2155,7 +2060,7 @@ void thomson_state::to9_kbd_update_irq() if ( (m_to9_kbd_intr & 3) == 1 && (m_to9_kbd_status & ACIA_6850_TDRE) ) m_to9_kbd_status |= ACIA_6850_irq; /* ready to transmit interrupt */ - thom_irq_3( m_to9_kbd_status & ACIA_6850_irq ); + m_mainirq->in_w<3>( m_to9_kbd_status & ACIA_6850_irq ); } @@ -2635,7 +2540,6 @@ MACHINE_START_MEMBER( thomson_state, to9 ) LOG (( "to9: machine start called\n" )); /* subsystems */ - thom_irq_init(); to7_game_init(); to9_floppy_init( mem + 0xe000, mem + 0x40000 ); to9_kbd_init(); @@ -3332,7 +3236,7 @@ READ8_MEMBER( thomson_state::to8_gatearray_r ) { if ( !machine().side_effect_disabled() ) { - thom_firq_2( 0 ); + m_mainfirq->in_w<2>(0); m_to8_lightpen_intr = 0; } res = count & 0xff; @@ -3579,7 +3483,7 @@ void thomson_state::to8_lightpen_cb( int step ) if ( ! m_to7_lightpen ) return; - thom_firq_2( 1 ); + m_mainfirq->in_w<2>(1); m_to7_lightpen_step = step; m_to8_lightpen_intr = 1; } @@ -3646,7 +3550,6 @@ MACHINE_START_MEMBER( thomson_state, to8 ) LOG (( "to8: machine start called\n" )); /* subsystems */ - thom_irq_init(); to7_game_init(); to8_floppy_init(); to8_kbd_init(); @@ -3797,7 +3700,6 @@ MACHINE_START_MEMBER( thomson_state, to9p ) LOG (( "to9p: machine start called\n" )); /* subsystems */ - thom_irq_init(); to7_game_init(); to8_floppy_init(); to9_kbd_init(); @@ -4287,7 +4189,7 @@ READ8_MEMBER( thomson_state::mo6_gatearray_r ) { if ( !machine().side_effect_disabled() ) { - thom_firq_2( 0 ); + m_mainfirq->in_w<2>(0); m_to8_lightpen_intr = 0; } res = count & 0xff; @@ -4483,7 +4385,6 @@ MACHINE_START_MEMBER( thomson_state, mo6 ) LOG (( "mo6: machine start called\n" )); /* subsystems */ - thom_irq_init(); mo6_game_init(); to7_floppy_init( mem + 0x30000 ); to9_palette_init(); @@ -4707,7 +4608,6 @@ MACHINE_START_MEMBER( thomson_state, mo5nr ) LOG (( "mo5nr: machine start called\n" )); /* subsystems */ - thom_irq_init(); mo5nr_game_init(); to7_floppy_init( mem + 0x30000 ); to9_palette_init(); diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 97ba68a0e33..a3adca7212a 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -1531,7 +1531,6 @@ mammothm // (c) 1997 marmagic // (c) 2000 marmagicu // (c) 2000 marmagicua // (c) 2000 -marmagicub // (c) 2000 minemine // (c) 1996 minemineu // (c) 1996 monmouse // (c) 1997 @@ -14778,6 +14777,7 @@ tbreakup // Tomy tc4 // Coleco tcfball // Tandy Radio Shack tcfballa // Tandy Radio Shack +xl25 // Vulcan zodiac // Coleco @source:hh_ucom4.cpp diff --git a/src/mame/video/cave.cpp b/src/mame/video/cave.cpp index b77c6553450..75d32eafeb2 100644 --- a/src/mame/video/cave.cpp +++ b/src/mame/video/cave.cpp @@ -506,7 +506,7 @@ void cave_state::get_sprite_info_cave(int chip) uint16_t *source; uint16_t *finish; - struct sprite_cave *sprite = m_sprite[chip]; + sprite_cave *sprite = m_sprite[chip].get(); int glob_flipx = m_videoregs[chip][0] & 0x8000; int glob_flipy = m_videoregs[chip][1] & 0x8000; @@ -623,7 +623,7 @@ void cave_state::get_sprite_info_cave(int chip) sprite++; } - m_num_sprites[chip] = sprite - m_sprite[chip]; + m_num_sprites[chip] = sprite - m_sprite[chip].get(); } void cave_state::get_sprite_info_donpachi(int chip) @@ -636,7 +636,7 @@ void cave_state::get_sprite_info_donpachi(int chip) uint16_t *source; uint16_t *finish; - struct sprite_cave *sprite = m_sprite[chip]; + sprite_cave *sprite = m_sprite[chip].get(); int glob_flipx = m_videoregs[chip][0] & 0x8000; int glob_flipy = m_videoregs[chip][1] & 0x8000; @@ -709,7 +709,7 @@ void cave_state::get_sprite_info_donpachi(int chip) sprite++; } - m_num_sprites[chip] = sprite - m_sprite[chip]; + m_num_sprites[chip] = sprite - m_sprite[chip].get(); } @@ -732,8 +732,10 @@ void cave_state::sprite_init_cave() for (int chip = 0; chip < 4; chip++) { m_num_sprites[chip] = m_spriteram[chip].bytes() / 0x10 / 2; - m_sprite[chip] = auto_alloc_array_clear(machine(), struct sprite_cave, m_num_sprites[chip]); - memset(m_sprite_table, 0, sizeof(m_sprite_table)); + m_sprite[chip] = std::make_unique<sprite_cave []>(m_num_sprites[chip]); + for (auto &prio : m_sprite_table[chip]) + for (sprite_cave *&spr : prio) + spr = nullptr; m_spriteram_bank[chip] = m_spriteram_bank_delay[chip] = 0; } @@ -768,8 +770,8 @@ void cave_state::cave_sprite_check(int chip, screen_device &screen, const rectan } { /* check priority & sprite type */ - struct sprite_cave *sprite = m_sprite[chip]; - const struct sprite_cave *finish = &sprite[m_num_sprites[chip]]; + sprite_cave *sprite = m_sprite[chip].get(); + const sprite_cave *const finish = &sprite[m_num_sprites[chip]]; int i[4] = {0,0,0,0}; int priority_check = 0; int spritetype = m_spritetype[1]; @@ -829,7 +831,7 @@ void cave_state::cave_sprite_check(int chip, screen_device &screen, const rectan } } -void cave_state::do_blit_zoom32_cave( int chip, const struct sprite_cave *sprite ) +void cave_state::do_blit_zoom32_cave( int chip, const sprite_cave *sprite ) { /* assumes SPRITE_LIST_RAW_DATA flag is set */ int x1, x2, y1, y2, dx, dy; @@ -961,7 +963,7 @@ void cave_state::do_blit_zoom32_cave( int chip, const struct sprite_cave *sprite } -void cave_state::do_blit_zoom32_cave_zb( int chip, const struct sprite_cave *sprite ) +void cave_state::do_blit_zoom32_cave_zb( int chip, const sprite_cave *sprite ) { /* assumes SPRITE_LIST_RAW_DATA flag is set */ int x1, x2, y1, y2, dx, dy; @@ -1059,7 +1061,7 @@ void cave_state::do_blit_zoom32_cave_zb( int chip, const struct sprite_cave *spr uint32_t *dest = (uint32_t *)(m_blit.baseaddr + m_blit.line_offset * y1); int pitchz = m_blit.line_offset_zbuf * dy / 2; uint16_t *zbf = (uint16_t *)(m_blit.baseaddr_zbuf + m_blit.line_offset_zbuf * y1); - uint16_t pri_sp = (uint16_t)(sprite - m_sprite[chip]) + m_sprite_zbuf_baseval; + uint16_t pri_sp = (uint16_t)(sprite - m_sprite[chip].get()) + m_sprite_zbuf_baseval; int ycount = ycount0; for (y = y1; y != y2; y += dy) @@ -1096,7 +1098,7 @@ void cave_state::do_blit_zoom32_cave_zb( int chip, const struct sprite_cave *spr } } -void cave_state::do_blit_32_cave( int chip, const struct sprite_cave *sprite ) +void cave_state::do_blit_32_cave( int chip, const sprite_cave *sprite ) { /* assumes SPRITE_LIST_RAW_DATA flag is set */ int x1, x2, y1, y2, dx, dy; @@ -1191,7 +1193,7 @@ void cave_state::do_blit_32_cave( int chip, const struct sprite_cave *sprite ) } -void cave_state::do_blit_32_cave_zb( int chip, const struct sprite_cave *sprite ) +void cave_state::do_blit_32_cave_zb( int chip, const sprite_cave *sprite ) { /* assumes SPRITE_LIST_RAW_DATA flag is set */ int x1, x2, y1, y2, dx, dy; @@ -1269,7 +1271,7 @@ void cave_state::do_blit_32_cave_zb( int chip, const struct sprite_cave *sprite uint32_t *dest = (uint32_t *)(m_blit.baseaddr + m_blit.line_offset * y1); int pitchz = m_blit.line_offset_zbuf * dy / 2; uint16_t *zbf = (uint16_t *)(m_blit.baseaddr_zbuf + m_blit.line_offset_zbuf * y1); - uint16_t pri_sp = (uint16_t)(sprite - m_sprite[chip]) + m_sprite_zbuf_baseval; + uint16_t pri_sp = (uint16_t)(sprite - m_sprite[chip].get()) + m_sprite_zbuf_baseval; pen_data += sprite->line_offset * ycount0 + xcount0; for (y = y1; y != y2; y += dy) @@ -1299,7 +1301,7 @@ void cave_state::sprite_draw_cave( int chip, int priority ) int i = 0; while (m_sprite_table[chip][priority][i]) { - const struct sprite_cave *sprite = m_sprite_table[chip][priority][i++]; + const sprite_cave *sprite = m_sprite_table[chip][priority][i++]; if ((sprite->tile_width == sprite->total_width) && (sprite->tile_height == sprite->total_height)) do_blit_32_cave(chip, sprite); else @@ -1312,7 +1314,7 @@ void cave_state::sprite_draw_cave_zbuf( int chip, int priority ) int i = 0; while (m_sprite_table[chip][priority][i]) { - const struct sprite_cave *sprite = m_sprite_table[chip][priority][i++]; + const sprite_cave *sprite = m_sprite_table[chip][priority][i++]; if ((sprite->tile_width == sprite->total_width) && (sprite->tile_height == sprite->total_height)) do_blit_32_cave_zb(chip, sprite); else diff --git a/src/mame/video/fmtowns.cpp b/src/mame/video/fmtowns.cpp index 2055c7aeead..9cb02b6cbb4 100644 --- a/src/mame/video/fmtowns.cpp +++ b/src/mame/video/fmtowns.cpp @@ -958,8 +958,8 @@ void towns_state::towns_crtc_draw_scan_layer_hicolour(bitmap_rgb32 &bitmap,const scroll = ((m_video.towns_crtc_reg[21] & 0xfc00) << 2) | (((m_video.towns_crtc_reg[21] & 0x3ff) << 2)); off += scroll; } - off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]); hzoom = ((m_video.towns_crtc_reg[27] & 0x0f00) >> 8) + 1; + off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]) / hzoom; } else { @@ -970,8 +970,8 @@ void towns_state::towns_crtc_draw_scan_layer_hicolour(bitmap_rgb32 &bitmap,const scroll = ((m_video.towns_crtc_reg[17] & 0xfc00) << 2) | (((m_video.towns_crtc_reg[17] & 0x3ff) << 2)); off += scroll; } - off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]); hzoom = (m_video.towns_crtc_reg[27] & 0x000f) + 1; + off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]) / hzoom; } off += line * linesize; @@ -1150,8 +1150,8 @@ void towns_state::towns_crtc_draw_scan_layer_256(bitmap_rgb32 &bitmap,const rect scroll = ((m_video.towns_crtc_reg[21] & 0xfc00) << 3) | (((m_video.towns_crtc_reg[21] & 0x3ff) << 3)); off += scroll; } - off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]); hzoom = ((m_video.towns_crtc_reg[27] & 0x0f00) >> 8) + 1; + off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]) / hzoom; } else { @@ -1162,8 +1162,8 @@ void towns_state::towns_crtc_draw_scan_layer_256(bitmap_rgb32 &bitmap,const rect scroll = ((m_video.towns_crtc_reg[17] & 0xfc00) << 3) | (((m_video.towns_crtc_reg[17] & 0x3ff) << 3)); off += scroll; } - off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]); hzoom = (m_video.towns_crtc_reg[27] & 0x000f) + 1; + off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]) / hzoom; } off += line * linesize; @@ -1296,8 +1296,8 @@ void towns_state::towns_crtc_draw_scan_layer_16(bitmap_rgb32 &bitmap,const recta scroll = ((m_video.towns_crtc_reg[21] & 0xfc00)<<2) | (((m_video.towns_crtc_reg[21] & 0x3ff)<<2)); off += scroll; } - off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]); hzoom = ((m_video.towns_crtc_reg[27] & 0x0f00) >> 8) + 1; + off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]) / (hzoom * 2); } else { @@ -1308,8 +1308,8 @@ void towns_state::towns_crtc_draw_scan_layer_16(bitmap_rgb32 &bitmap,const recta scroll = ((m_video.towns_crtc_reg[17] & 0xfc00)<<2) | (((m_video.towns_crtc_reg[17] & 0x3ff)<<2)); off += scroll; } - off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]); hzoom = (m_video.towns_crtc_reg[27] & 0x000f) + 1; + off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]) / (hzoom * 2); } off += line * linesize; diff --git a/src/mame/video/pc_t1t.cpp b/src/mame/video/pc_t1t.cpp index 8f4ee89f3db..1a646c54a80 100644 --- a/src/mame/video/pc_t1t.cpp +++ b/src/mame/video/pc_t1t.cpp @@ -133,8 +133,8 @@ MACHINE_CONFIG_MEMBER( pcvideo_t1000_device::device_add_mconfig ) MCFG_DEVICE_ADD("vram", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vram_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(18) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(18) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MACHINE_CONFIG_END @@ -156,8 +156,8 @@ MACHINE_CONFIG_MEMBER( pcvideo_pcjr_device::device_add_mconfig ) MCFG_DEVICE_ADD("vram", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_PROGRAM_MAP(vram_map) MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) - MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) - MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(18) + MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8) + MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(18) MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) MACHINE_CONFIG_END diff --git a/src/mame/video/wecleman.cpp b/src/mame/video/wecleman.cpp index 3e74180e665..0eec8fcfb88 100644 --- a/src/mame/video/wecleman.cpp +++ b/src/mame/video/wecleman.cpp @@ -23,21 +23,6 @@ #define SPRITE_FLIPY 0x02 #define NUM_SPRITES 256 -struct sprite -{ - uint8_t *pen_data; /* points to top left corner of tile data */ - int line_offset; - - const pen_t *pal_data; - rgb_t pal_base; - - int x_offset, y_offset; - int tile_width, tile_height; - int total_width, total_height; /* in screen coordinates */ - int x, y; - int shadow_mode, flags; -}; - /*************************************************************************** @@ -82,12 +67,12 @@ void wecleman_state::get_sprite_info() uint16_t *source = m_spriteram; - struct sprite *sprite = m_sprite_list; - struct sprite *finish = m_sprite_list + NUM_SPRITES; + sprite_t *sprite = m_sprite_list.get(); + sprite_t *const finish = sprite + NUM_SPRITES; int bank, code, gfx, zoom; - for (m_spr_count=0; sprite<finish; source+=0x10/2, sprite++) + for (m_spr_count = 0; sprite < finish; source += 0x10/2, sprite++) { if (source[0x00/2] == 0xffff) break; @@ -170,7 +155,7 @@ void wecleman_state::sortsprite(int *idx_array, int *key_array, int size) // draws a 8bpp palette sprites on a 16bpp direct RGB target (sub-par implementation) template<class _BitmapClass> -void wecleman_state::do_blit_zoom32(_BitmapClass &bitmap, const rectangle &cliprect, struct sprite *sprite) +void wecleman_state::do_blit_zoom32(_BitmapClass &bitmap, const rectangle &cliprect, const sprite_t &sprite) { #define PRECISION_X 20 #define PRECISION_Y 20 @@ -181,10 +166,10 @@ void wecleman_state::do_blit_zoom32(_BitmapClass &bitmap, const rectangle &clipr int x1, x2, y1, y2, dx, dy, sx, sy; int xcount0=0, ycount0=0; - if (sprite->flags & SPRITE_FLIPX) + if (sprite.flags & SPRITE_FLIPX) { - x2 = sprite->x; - x1 = x2 + sprite->total_width; + x2 = sprite.x; + x1 = x2 + sprite.total_width; dx = -1; if (x2 < cliprect.min_x) x2 = cliprect.min_x; if (x1 > cliprect.max_x ) @@ -197,8 +182,8 @@ void wecleman_state::do_blit_zoom32(_BitmapClass &bitmap, const rectangle &clipr } else { - x1 = sprite->x; - x2 = x1 + sprite->total_width; + x1 = sprite.x; + x2 = x1 + sprite.total_width; dx = 1; if (x1 < cliprect.min_x ) { @@ -209,10 +194,10 @@ void wecleman_state::do_blit_zoom32(_BitmapClass &bitmap, const rectangle &clipr if (x1 >= x2) return; } - if (sprite->flags & SPRITE_FLIPY) + if (sprite.flags & SPRITE_FLIPY) { - y2 = sprite->y; - y1 = y2 + sprite->total_height; + y2 = sprite.y; + y1 = y2 + sprite.total_height; dy = -1; if (y2 < cliprect.min_y ) y2 = cliprect.min_y; if (y1 > cliprect.max_y ) @@ -225,8 +210,8 @@ void wecleman_state::do_blit_zoom32(_BitmapClass &bitmap, const rectangle &clipr } else { - y1 = sprite->y; - y2 = y1 + sprite->total_height; + y1 = sprite.y; + y2 = y1 + sprite.total_height; dy = 1; if (y1 < cliprect.min_y ) { @@ -238,14 +223,14 @@ void wecleman_state::do_blit_zoom32(_BitmapClass &bitmap, const rectangle &clipr } // calculate entry point decimals - src_fdy = (sprite->tile_height<<PRECISION_Y) / sprite->total_height; + src_fdy = (sprite.tile_height<<PRECISION_Y) / sprite.total_height; src_f0y = src_fdy * ycount0 + FPY_HALF; - src_fdx = (sprite->tile_width<<PRECISION_X) / sprite->total_width; + src_fdx = (sprite.tile_width<<PRECISION_X) / sprite.total_width; src_f0x = src_fdx * xcount0; // pre-loop assignments and adjustments - pal_base = sprite->pal_data; + pal_base = sprite.pal_data; if (x1 > cliprect.min_x) { @@ -255,13 +240,13 @@ void wecleman_state::do_blit_zoom32(_BitmapClass &bitmap, const rectangle &clipr for (sy = y1; sy != y2; sy += dy) { - uint8_t *row_base = sprite->pen_data + (src_f0y>>PRECISION_Y) * sprite->line_offset; + uint8_t *row_base = sprite.pen_data + (src_f0y>>PRECISION_Y) * sprite.line_offset; src_fpx = src_f0x; typename _BitmapClass::pixel_t *dst_ptr = &bitmap.pix(sy); if (bitmap.format() == BITMAP_FORMAT_RGB32) // Wec Le Mans { - if (!sprite->shadow_mode) + if (!sprite.shadow_mode) { for (sx = x1; sx != x2; sx += dx) { @@ -291,9 +276,9 @@ void wecleman_state::do_blit_zoom32(_BitmapClass &bitmap, const rectangle &clipr } else // Hot Chase { - pen_t base = sprite->pal_base; + pen_t base = sprite.pal_base; - if (!sprite->shadow_mode) + if (!sprite.shadow_mode) { for (sx = x1; sx != x2; sx += dx) { @@ -338,11 +323,11 @@ void wecleman_state::sprite_draw(_BitmapClass &bitmap, const rectangle &cliprect { sortsprite(m_spr_idx_list, m_spr_pri_list, m_spr_count); - for (i=0; i<m_spr_count; i++) do_blit_zoom32(bitmap, cliprect, m_spr_ptr_list[m_spr_idx_list[i]]); + for (i=0; i<m_spr_count; i++) do_blit_zoom32(bitmap, cliprect, *m_spr_ptr_list[m_spr_idx_list[i]]); } else // Hot Chase { - for (i=0; i<m_spr_count; i++) do_blit_zoom32(bitmap, cliprect, m_spr_ptr_list[i]); + for (i=0; i<m_spr_count; i++) do_blit_zoom32(bitmap, cliprect, *m_spr_ptr_list[i]); } } @@ -904,11 +889,11 @@ VIDEO_START_MEMBER(wecleman_state,wecleman) m_cloud_visible = 0; m_black_pen = m_palette->black_pen(); - m_rgb_half = (uint16_t*)(buffer + 0x00000); - m_t32x32pm = (int*)(buffer + 0x10020); - m_spr_ptr_list = (struct sprite **)(buffer + 0x12000); - m_spr_idx_list = (int *)(buffer + 0x12400); - m_spr_pri_list = (int *)(buffer + 0x12800); + m_rgb_half = (uint16_t*)(buffer + 0x00000); + m_t32x32pm = (int*)(buffer + 0x10020); + m_spr_ptr_list = (sprite_t **)(buffer + 0x12000); + m_spr_idx_list = (int *)(buffer + 0x12400); + m_spr_pri_list = (int *)(buffer + 0x12800); for (i=0; i<0x8000; i++) { @@ -924,7 +909,7 @@ VIDEO_START_MEMBER(wecleman_state,wecleman) } } - m_sprite_list = auto_alloc_array_clear(machine(), struct sprite, NUM_SPRITES); + m_sprite_list = std::make_unique<sprite_t []>(NUM_SPRITES); m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(wecleman_state::wecleman_get_bg_tile_info),this), TILEMAP_SCAN_ROWS, @@ -1001,9 +986,9 @@ VIDEO_START_MEMBER(wecleman_state,hotchase) m_spr_offsy = 0; m_black_pen = m_palette->black_pen(); - m_spr_ptr_list = (struct sprite **)buffer; + m_spr_ptr_list = (sprite_t **)buffer; - m_sprite_list = auto_alloc_array_clear(machine(), struct sprite, NUM_SPRITES); + m_sprite_list = std::make_unique<sprite_t []>(NUM_SPRITES); } diff --git a/src/osd/eigccx86.h b/src/osd/eigccx86.h index b67b646451e..b3831d21524 100644 --- a/src/osd/eigccx86.h +++ b/src/osd/eigccx86.h @@ -474,13 +474,12 @@ _count_leading_zeros(uint32_t value) __asm__ ( " bsrl %[value], %[result] ;" " cmovzl %[bias], %[result] ;" - " xorl $31, %[result] ;" : [result] "=&r" (result) // result can be in any register : [value] "rm" (value) // 'value' can be register or memory - , [bias] "rm" (uint32_t(63)) // 'bias' can be register or memory + , [bias] "rm" (~uint32_t(0)) // 'bias' can be register or memory : "cc" // clobbers condition codes ); - return result; + return 31U - result; } @@ -497,13 +496,12 @@ _count_leading_ones(uint32_t value) __asm__ ( " bsrl %[value], %[result] ;" " cmovzl %[bias], %[result] ;" - " xorl $31, %[result] ;" : [result] "=&r" (result) // result can be in any register : [value] "rm" (~value) // 'value' can be register or memory - , [bias] "rm" (uint32_t(63)) // 'bias' can be register or memory + , [bias] "rm" (~uint32_t(0)) // 'bias' can be register or memory : "cc" // clobbers condition codes ); - return result; + return 31U - result; } #endif // MAME_OSD_EIGCCX86_H diff --git a/src/osd/eivc.h b/src/osd/eivc.h index de4ea809a28..3fa34f51b3c 100644 --- a/src/osd/eivc.h +++ b/src/osd/eivc.h @@ -31,7 +31,7 @@ inline uint8_t _count_leading_zeros(uint32_t value) { unsigned long index; - return _BitScanReverse(&index, value) ? (index ^ 31) : 32; + return _BitScanReverse(&index, value) ? (31U - index) : 32U; } #endif @@ -46,7 +46,7 @@ inline uint8_t _count_leading_zeros(uint32_t value) inline uint8_t _count_leading_ones(uint32_t value) { unsigned long index; - return _BitScanReverse(&index, ~value) ? (index ^ 31) : 32; + return _BitScanReverse(&index, ~value) ? (31U - index) : 32U; } #endif diff --git a/src/osd/modules/debugger/debugimgui.cpp b/src/osd/modules/debugger/debugimgui.cpp index 293ac0229df..11e19b261eb 100644 --- a/src/osd/modules/debugger/debugimgui.cpp +++ b/src/osd/modules/debugger/debugimgui.cpp @@ -184,7 +184,6 @@ private: const char* font_name; float font_size; ImVec2 m_text_size; // size of character (assumes monospaced font is in use) - ImguiFontHandle m_font; uint8_t m_key_char; bool m_hide; int m_win_count; // number of active windows, does not decrease, used to ID individual windows @@ -677,7 +676,7 @@ void debug_imgui::draw_view(debug_area* view_ptr, bool exp_change) void debug_imgui::draw_bpoints(debug_area* view_ptr, bool* opened) { - ImGui::SetNextWindowSize(ImVec2(view_ptr->width,view_ptr->height + ImGui::GetTextLineHeight()),ImGuiSetCond_Once); + ImGui::SetNextWindowSize(ImVec2(view_ptr->width,view_ptr->height + ImGui::GetTextLineHeight()),ImGuiCond_Once); if(ImGui::Begin(view_ptr->title.c_str(),opened)) { view_ptr->is_collapsed = false; @@ -723,7 +722,7 @@ void debug_imgui::add_wpoints(int id) void debug_imgui::draw_log(debug_area* view_ptr, bool* opened) { - ImGui::SetNextWindowSize(ImVec2(view_ptr->width,view_ptr->height + ImGui::GetTextLineHeight()),ImGuiSetCond_Once); + ImGui::SetNextWindowSize(ImVec2(view_ptr->width,view_ptr->height + ImGui::GetTextLineHeight()),ImGuiCond_Once); if(ImGui::Begin(view_ptr->title.c_str(),opened)) { view_ptr->is_collapsed = false; @@ -757,7 +756,7 @@ void debug_imgui::draw_disasm(debug_area* view_ptr, bool* opened) { const debug_view_source* src; - ImGui::SetNextWindowSize(ImVec2(view_ptr->width,view_ptr->height + ImGui::GetTextLineHeight()),ImGuiSetCond_Once); + ImGui::SetNextWindowSize(ImVec2(view_ptr->width,view_ptr->height + ImGui::GetTextLineHeight()),ImGuiCond_Once); if(ImGui::Begin(view_ptr->title.c_str(),opened,ImGuiWindowFlags_MenuBar)) { int idx; @@ -844,7 +843,7 @@ void debug_imgui::draw_memory(debug_area* view_ptr, bool* opened) { const debug_view_source* src; - ImGui::SetNextWindowSize(ImVec2(view_ptr->width,view_ptr->height + ImGui::GetTextLineHeight()),ImGuiSetCond_Once); + ImGui::SetNextWindowSize(ImVec2(view_ptr->width,view_ptr->height + ImGui::GetTextLineHeight()),ImGuiCond_Once); if(ImGui::Begin(view_ptr->title.c_str(),opened,ImGuiWindowFlags_MenuBar)) { int idx; @@ -1241,7 +1240,7 @@ void debug_imgui::draw_console() rgb_t base(0xe6, 0xff, 0xff, 0xff); ImGuiWindowFlags flags = ImGuiWindowFlags_MenuBar | ImGuiWindowFlags_NoCollapse | ImGuiWindowFlags_NoScrollbar | ImGuiWindowFlags_NoScrollWithMouse; - ImGui::SetNextWindowSize(ImVec2(view_main_regs->width + view_main_disasm->width,view_main_disasm->height + view_main_console->height + ImGui::GetTextLineHeight()*3),ImGuiSetCond_Once); + ImGui::SetNextWindowSize(ImVec2(view_main_regs->width + view_main_disasm->width,view_main_disasm->height + view_main_console->height + ImGui::GetTextLineHeight()*3),ImGuiCond_Once); if(ImGui::Begin(view_main_console->title.c_str(), nullptr,flags)) { std::string str; @@ -1383,7 +1382,6 @@ void debug_imgui::update() ImGui::PushStyleColor(ImGuiCol_ScrollbarGrabHovered,ImVec4(0.7f,0.7f,0.7f,0.8f)); ImGui::PushStyleColor(ImGuiCol_ScrollbarGrabActive,ImVec4(0.9f,0.9f,0.9f,0.8f)); ImGui::PushStyleColor(ImGuiCol_Border,ImVec4(0.7f,0.7f,0.7f,0.8f)); - ImGui::PushStyleColor(ImGuiCol_ComboBg,ImVec4(0.4f,0.4f,0.4f,0.9f)); m_text_size = ImGui::CalcTextSize("A"); // hopefully you're using a monospaced font... draw_console(); // We'll always have a console window @@ -1425,7 +1423,7 @@ void debug_imgui::update() global_free(to_delete); } - ImGui::PopStyleColor(13); + ImGui::PopStyleColor(12); } void debug_imgui::init_debugger(running_machine &machine) @@ -1478,8 +1476,7 @@ void debug_imgui::init_debugger(running_machine &machine) io.Fonts->AddFontDefault(); else io.Fonts->AddFontFromFileTTF(font_name,font_size); // for now, font name must be a path to a TTF file - m_font = imguiCreate(); - imguiSetFont(m_font); + imguiCreate(); } void debug_imgui::wait_for_debugger(device_t &device, bool firststop) diff --git a/src/osd/modules/render/bgfx/chainentry.cpp b/src/osd/modules/render/bgfx/chainentry.cpp index a53ed759940..4e27cb8c00b 100644 --- a/src/osd/modules/render/bgfx/chainentry.cpp +++ b/src/osd/modules/render/bgfx/chainentry.cpp @@ -12,7 +12,7 @@ #include "emu.h" #include <bgfx/bgfx.h> -#include <bx/fpumath.h> +#include <bx/math.h> #include "chainentry.h" @@ -57,8 +57,6 @@ bgfx_chain_entry::~bgfx_chain_entry() void bgfx_chain_entry::submit(int view, render_primitive* prim, texture_manager& textures, uint16_t screen_count, uint16_t screen_width, uint16_t screen_height, float screen_scale_x, float screen_scale_y, float screen_offset_x, float screen_offset_y, uint32_t rotation_type, bool swap_xy, uint64_t blend, int32_t screen) { - bgfx::setViewSeq(view, true); - if (!setup_view(view, screen_width, screen_height, screen)) { return; @@ -71,7 +69,7 @@ void bgfx_chain_entry::submit(int view, render_primitive* prim, texture_manager& bgfx::TransientVertexBuffer buffer; put_screen_buffer(prim, &buffer); - bgfx::setVertexBuffer(&buffer); + bgfx::setVertexBuffer(0,&buffer); setup_auto_uniforms(prim, textures, screen_count, screen_width, screen_height, screen_scale_x, screen_scale_y, screen_offset_x, screen_offset_y, rotation_type, swap_xy, screen); @@ -260,8 +258,10 @@ bool bgfx_chain_entry::setup_view(int view, uint16_t screen_width, uint16_t scre bgfx::setViewFrameBuffer(view, handle); bgfx::setViewRect(view, 0, 0, width, height); + const bgfx::Caps* caps = bgfx::getCaps(); + float projMat[16]; - bx::mtxOrtho(projMat, 0.0f, 1.0f, 1.0f, 0.0f, 0.0f, 100.0f); + bx::mtxOrtho(projMat, 0.0f, 1.0f, 1.0f, 0.0f, 0.0f, 100.0f, 0.0f, caps->homogeneousDepth); bgfx::setViewTransform(view, nullptr, projMat); m_clear->bind(view); diff --git a/src/osd/modules/render/bgfx/chainmanager.cpp b/src/osd/modules/render/bgfx/chainmanager.cpp index f3b12dfa125..393344016e8 100644 --- a/src/osd/modules/render/bgfx/chainmanager.cpp +++ b/src/osd/modules/render/bgfx/chainmanager.cpp @@ -10,7 +10,7 @@ //============================================================ #include <bx/readerwriter.h> -#include <bx/crtimpl.h> +#include <bx/file.h> #include "emu.h" #include "../frontend/mame/ui/slider.h" @@ -143,7 +143,7 @@ bgfx_chain* chain_manager::load_chain(std::string name, uint32_t screen_index) osd_subst_env(path, util::string_format("%s" PATH_SEPARATOR "chains" PATH_SEPARATOR, m_options.bgfx_path())); path += name; - bx::CrtFileReader reader; + bx::FileReader reader; if (!bx::open(&reader, path.c_str())) { printf("Unable to open chain file %s, falling back to no post processing\n", path.c_str()); diff --git a/src/osd/modules/render/bgfx/effect.cpp b/src/osd/modules/render/bgfx/effect.cpp index 7e0750a73a2..fb3d7d933ba 100644 --- a/src/osd/modules/render/bgfx/effect.cpp +++ b/src/osd/modules/render/bgfx/effect.cpp @@ -36,7 +36,7 @@ bgfx_effect::~bgfx_effect() delete uniform.second; } m_uniforms.clear(); - bgfx::destroyProgram(m_program_handle); + bgfx::destroy(m_program_handle); } void bgfx_effect::submit(int view, uint64_t blend) diff --git a/src/osd/modules/render/bgfx/effectmanager.cpp b/src/osd/modules/render/bgfx/effectmanager.cpp index 8627650aae2..6462ae75f72 100644 --- a/src/osd/modules/render/bgfx/effectmanager.cpp +++ b/src/osd/modules/render/bgfx/effectmanager.cpp @@ -13,7 +13,7 @@ #include <rapidjson/error/en.h> #include <bx/readerwriter.h> -#include <bx/crtimpl.h> +#include <bx/file.h> #include "emu.h" @@ -55,7 +55,7 @@ bgfx_effect* effect_manager::load_effect(std::string name) osd_subst_env(path, util::string_format("%s" PATH_SEPARATOR "effects" PATH_SEPARATOR, m_options.bgfx_path())); path += full_name; - bx::CrtFileReader reader; + bx::FileReader reader; if (!bx::open(&reader, path.c_str())) { printf("Unable to open effect file %s\n", path.c_str()); diff --git a/src/osd/modules/render/bgfx/shadermanager.cpp b/src/osd/modules/render/bgfx/shadermanager.cpp index c4a92e1ff32..7583b58dec5 100644 --- a/src/osd/modules/render/bgfx/shadermanager.cpp +++ b/src/osd/modules/render/bgfx/shadermanager.cpp @@ -9,9 +9,9 @@ // //============================================================ -#include <bx/fpumath.h> +#include <bx/math.h> #include <bx/readerwriter.h> -#include <bx/crtimpl.h> +#include <bx/file.h> #include "emu.h" @@ -23,7 +23,7 @@ shader_manager::~shader_manager() { for (std::pair<std::string, bgfx::ShaderHandle> shader : m_shaders) { - bgfx::destroyShader(shader.second); + bgfx::destroy(shader.second); } m_shaders.clear(); } @@ -96,7 +96,7 @@ bgfx::ShaderHandle shader_manager::load_shader(std::string name) const bgfx::Memory* shader_manager::load_mem(std::string name) { - bx::CrtFileReader reader; + bx::FileReader reader; if (bx::open(&reader, name.c_str())) { uint32_t size(bx::getSize(&reader)); diff --git a/src/osd/modules/render/bgfx/target.cpp b/src/osd/modules/render/bgfx/target.cpp index 74b284dfb1d..a5feee73b2e 100644 --- a/src/osd/modules/render/bgfx/target.cpp +++ b/src/osd/modules/render/bgfx/target.cpp @@ -80,15 +80,15 @@ bgfx_target::~bgfx_target() { for (int page = 0; page < m_page_count; page++) { - bgfx::destroyFrameBuffer(m_targets[page]); - bgfx::destroyTexture(m_textures[page]); + bgfx::destroy(m_targets[page]); + bgfx::destroy(m_textures[page]); } delete [] m_textures; delete [] m_targets; } else { - bgfx::destroyFrameBuffer(m_targets[0]); + bgfx::destroy(m_targets[0]); delete [] m_targets; } } diff --git a/src/osd/modules/render/bgfx/texture.cpp b/src/osd/modules/render/bgfx/texture.cpp index ac2d9008568..ecbf51121ab 100644 --- a/src/osd/modules/render/bgfx/texture.cpp +++ b/src/osd/modules/render/bgfx/texture.cpp @@ -45,5 +45,5 @@ bgfx_texture::bgfx_texture(std::string name, bgfx::TextureFormat::Enum format, u bgfx_texture::~bgfx_texture() { - bgfx::destroyTexture(m_texture); + bgfx::destroy(m_texture); } diff --git a/src/osd/modules/render/bgfx/texturemanager.cpp b/src/osd/modules/render/bgfx/texturemanager.cpp index 3e404635bab..61be4f8f247 100644 --- a/src/osd/modules/render/bgfx/texturemanager.cpp +++ b/src/osd/modules/render/bgfx/texturemanager.cpp @@ -94,7 +94,7 @@ bgfx::TextureHandle texture_manager::handle(std::string name) handle = (iter->second)->texture(); } - assert(handle.idx != bgfx::invalidHandle); + assert(handle.idx != bgfx::kInvalidHandle); return handle; } diff --git a/src/osd/modules/render/bgfx/uniform.cpp b/src/osd/modules/render/bgfx/uniform.cpp index 780705d8371..ef33c11f128 100644 --- a/src/osd/modules/render/bgfx/uniform.cpp +++ b/src/osd/modules/render/bgfx/uniform.cpp @@ -23,7 +23,7 @@ bgfx_uniform::bgfx_uniform(std::string name, bgfx::UniformType::Enum type) bgfx_uniform::~bgfx_uniform() { - bgfx::destroyUniform(m_handle); + bgfx::destroy(m_handle); delete [] m_data; } diff --git a/src/osd/modules/render/drawbgfx.cpp b/src/osd/modules/render/drawbgfx.cpp index 31ddc58c145..b3c65db7b86 100644 --- a/src/osd/modules/render/drawbgfx.cpp +++ b/src/osd/modules/render/drawbgfx.cpp @@ -5,7 +5,7 @@ // drawbgfx.cpp - BGFX renderer // //============================================================ -#include <bx/fpumath.h> +#include <bx/math.h> #include <bx/readerwriter.h> #if defined(SDLMAME_WIN32) || defined(OSD_WINDOWS) || defined(OSD_UWP) @@ -103,7 +103,7 @@ renderer_bgfx::~renderer_bgfx() m_targets->destroy_target("avibuffer0"); m_avi_target = nullptr; - bgfx::destroyTexture(m_avi_texture); + bgfx::destroy(m_avi_texture); delete m_avi_writer; delete [] m_avi_data; @@ -341,7 +341,7 @@ void renderer_bgfx::record() m_avi_writer->stop(); m_targets->destroy_target("avibuffer0"); m_avi_target = nullptr; - bgfx::destroyTexture(m_avi_texture); + bgfx::destroy(m_avi_texture); } else { @@ -474,14 +474,13 @@ void renderer_bgfx::render_post_screen_quad(int view, render_primitive* prim, bg } uint32_t blend = PRIMFLAG_GET_BLENDMODE(prim->flags); - bgfx::setVertexBuffer(buffer); + bgfx::setVertexBuffer(0,buffer); bgfx::setTexture(0, m_screen_effect[blend]->uniform("s_tex")->handle(), m_targets->target(screen, "output")->texture(), texture_flags); m_screen_effect[blend]->submit(view); } void renderer_bgfx::render_avi_quad() { - bgfx::setViewSeq(s_current_view, true); bgfx::setViewRect(s_current_view, 0, 0, m_width[0], m_height[0]); bgfx::setViewClear(s_current_view, BGFX_CLEAR_COLOR | BGFX_CLEAR_DEPTH, 0x00000000, 1.0f, 0); @@ -504,7 +503,7 @@ void renderer_bgfx::render_avi_quad() vertex(&vertices[4], x[2], y[2], 0, rgba, u[2], v[2]); vertex(&vertices[5], x[0], y[0], 0, rgba, u[0], v[0]); - bgfx::setVertexBuffer(&buffer); + bgfx::setVertexBuffer(0,&buffer); bgfx::setTexture(0, m_gui_effect[PRIMFLAG_GET_BLENDMODE(BLENDMODE_NONE)]->uniform("s_tex")->handle(), m_avi_target->texture()); m_gui_effect[PRIMFLAG_GET_BLENDMODE(BLENDMODE_NONE)]->submit(s_current_view); s_current_view++; @@ -544,11 +543,11 @@ void renderer_bgfx::render_textured_quad(render_primitive* prim, bgfx::Transient bgfx_effect** effects = PRIMFLAG_GET_SCREENTEX(prim->flags) ? m_screen_effect : m_gui_effect; uint32_t blend = PRIMFLAG_GET_BLENDMODE(prim->flags); - bgfx::setVertexBuffer(buffer); + bgfx::setVertexBuffer(0,buffer); bgfx::setTexture(0, effects[blend]->uniform("s_tex")->handle(), texture); effects[blend]->submit(m_ui_view); - bgfx::destroyTexture(texture); + bgfx::destroy(texture); } #define MAX_TEMP_COORDS 100 @@ -830,7 +829,7 @@ int renderer_bgfx::draw(int update) if (status != BUFFER_EMPTY && status != BUFFER_SCREEN) { - bgfx::setVertexBuffer(&buffer); + bgfx::setVertexBuffer(0,&buffer); bgfx::setTexture(0, m_gui_effect[blend]->uniform("s_tex")->handle(), m_texture_cache->texture()); m_gui_effect[blend]->submit(m_ui_view); } @@ -948,7 +947,6 @@ void renderer_bgfx::setup_view(uint32_t view_index, bool screen) bgfx::setViewFrameBuffer(view_index, m_framebuffer->target()); } - bgfx::setViewSeq(view_index, true); bgfx::setViewRect(view_index, 0, 0, width, height); #if SCENE_VIEW @@ -983,6 +981,7 @@ void renderer_bgfx::setup_matrices(uint32_t view_index, bool screen) float proj[16]; float view[16]; + const bgfx::Caps* caps = bgfx::getCaps(); if (screen) { static float offset = 0.0f; @@ -995,12 +994,12 @@ void renderer_bgfx::setup_matrices(uint32_t view_index, bool screen) float eye[3] = { width * 0.5f, eye_height, cam_z }; bx::mtxLookAt(view, eye, at, up); - bx::mtxProj(proj, 90.0f, float(width) / float(height), 0.1f, 5000.0f); + bx::mtxProj(proj, 90.0f, float(width) / float(height), 0.1f, 5000.0f, bgfx::getCaps()->homogeneousDepth); } else { bx::mtxIdentity(view); - bx::mtxOrtho(proj, 0.0f, width, height, 0.0f, 0.0f, 100.0f); + bx::mtxOrtho(proj, 0.0f, width, height, 0.0f, 0.0f, 100.0f, 0.0f, caps->homogeneousDepth); } bgfx::setViewTransform(view_index, view, proj); diff --git a/src/tools/unidasm.cpp b/src/tools/unidasm.cpp index 744d65282a3..3a9809c5b62 100644 --- a/src/tools/unidasm.cpp +++ b/src/tools/unidasm.cpp @@ -238,6 +238,17 @@ struct z8000_unidasm_t : z8000_disassembler::config virtual bool get_segmented_mode() const override { return segmented_mode; } } z8000_unidasm; +// Configuration missing +struct hyperstone_unidasm_t : hyperstone_disassembler::config +{ + bool h; + u8 fp; + hyperstone_unidasm_t() { h = false; fp = 0; } + virtual ~hyperstone_unidasm_t() = default; + + virtual u8 get_fp() const { return fp; } + virtual bool get_h() const { return h; } +} hyperstone_unidasm; @@ -322,7 +333,7 @@ static const dasm_table_entry dasm_table[] = { "hmcs40", le, -1, []() -> util::disasm_interface * { return new hmcs40_disassembler; } }, { "hp_hybrid", be, -1, []() -> util::disasm_interface * { return new hp_hybrid_disassembler; } }, { "hp_5061_3001", be, -1, []() -> util::disasm_interface * { return new hp_5061_3001_disassembler; } }, - { "hyperstone", be, 0, []() -> util::disasm_interface * { return new hyperstone_disassembler; } }, + { "hyperstone", be, 0, []() -> util::disasm_interface * { return new hyperstone_disassembler(&hyperstone_unidasm); } }, { "i4004", le, 0, []() -> util::disasm_interface * { return new i4004_disassembler; } }, { "i4040", le, 0, []() -> util::disasm_interface * { return new i4040_disassembler; } }, { "i8008", le, 0, []() -> util::disasm_interface * { return new i8008_disassembler; } }, |