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-rw-r--r--src/mess/drivers/a7800.c10
-rw-r--r--src/mess/drivers/apple2.c6
-rw-r--r--src/mess/drivers/apple2e.c6
-rw-r--r--src/mess/drivers/gamate.c11
-rw-r--r--src/mess/drivers/hh_hmcs40.c50
-rw-r--r--src/mess/drivers/hh_pic16.c14
-rw-r--r--src/mess/drivers/hh_tms1k.c70
-rw-r--r--src/mess/drivers/hh_ucom4.c48
-rw-r--r--src/mess/drivers/imds2.c910
-rw-r--r--src/mess/drivers/mbdtower.c32
-rw-r--r--src/mess/drivers/snes.c6
-rw-r--r--src/mess/drivers/ticalc1x.c20
-rw-r--r--src/mess/drivers/tispeak.c10
13 files changed, 596 insertions, 597 deletions
diff --git a/src/mess/drivers/a7800.c b/src/mess/drivers/a7800.c
index cffcd9c747b..4602c3ce941 100644
--- a/src/mess/drivers/a7800.c
+++ b/src/mess/drivers/a7800.c
@@ -286,11 +286,11 @@ static ADDRESS_MAP_START( a7800_mem, AS_PROGRAM, 8, a7800_state )
AM_RANGE(0x0480, 0x04ff) AM_RAM AM_SHARE("riot_ram") AM_MIRROR(0x100)
AM_RANGE(0x1800, 0x1fff) AM_RAM AM_SHARE("6116_1")
AM_RANGE(0x2000, 0x27ff) AM_RAM AM_SHARE("6116_2") AM_MIRROR(0x0800)
- // According to the official Software Guide, the RAM at 0x2000 is
- // repeatedly mirrored up to 0x3fff, but this is evidently incorrect
- // because the High Score Cartridge maps ROM at 0x3000-0x3fff
- // Hardware tests show that only the mirror at 0x2800-0x2fff actually
- // exists, and only on some hardware (MARIA? motherboard?) revisions
+ // According to the official Software Guide, the RAM at 0x2000 is
+ // repeatedly mirrored up to 0x3fff, but this is evidently incorrect
+ // because the High Score Cartridge maps ROM at 0x3000-0x3fff
+ // Hardware tests show that only the mirror at 0x2800-0x2fff actually
+ // exists, and only on some hardware (MARIA? motherboard?) revisions
AM_RANGE(0x4000, 0xffff) AM_DEVWRITE("cartslot", a78_cart_slot_device, write_40xx)
AM_RANGE(0x4000, 0xbfff) AM_DEVREAD("cartslot", a78_cart_slot_device, read_40xx)
AM_RANGE(0xc000, 0xffff) AM_READ(bios_or_cart_r) // here also the BIOS can be accessed
diff --git a/src/mess/drivers/apple2.c b/src/mess/drivers/apple2.c
index 15bbbc06559..4c06eac3b7b 100644
--- a/src/mess/drivers/apple2.c
+++ b/src/mess/drivers/apple2.c
@@ -1229,9 +1229,9 @@ static SLOT_INTERFACE_START(apple2_cards)
SLOT_INTERFACE("dx1", A2BUS_DX1) /* Decillonix DX-1 sampler card */
SLOT_INTERFACE("tm2ho", A2BUS_TIMEMASTERHO) /* Applied Engineering TimeMaster II H.O. */
SLOT_INTERFACE("mouse", A2BUS_MOUSE) /* Apple II Mouse Card */
- SLOT_INTERFACE("ezcgi", A2BUS_EZCGI) /* E-Z Color Graphics Interface */
- SLOT_INTERFACE("ezcgi9938", A2BUS_EZCGI_9938) /* E-Z Color Graphics Interface (TMS9938) */
- SLOT_INTERFACE("ezcgi9958", A2BUS_EZCGI_9958) /* E-Z Color Graphics Interface (TMS9958) */
+ SLOT_INTERFACE("ezcgi", A2BUS_EZCGI) /* E-Z Color Graphics Interface */
+ SLOT_INTERFACE("ezcgi9938", A2BUS_EZCGI_9938) /* E-Z Color Graphics Interface (TMS9938) */
+ SLOT_INTERFACE("ezcgi9958", A2BUS_EZCGI_9958) /* E-Z Color Graphics Interface (TMS9958) */
// SLOT_INTERFACE("magicmusician", A2BUS_MAGICMUSICIAN) /* Magic Musician Card */
SLOT_INTERFACE_END
diff --git a/src/mess/drivers/apple2e.c b/src/mess/drivers/apple2e.c
index 84b41de961a..e270fa4d6fa 100644
--- a/src/mess/drivers/apple2e.c
+++ b/src/mess/drivers/apple2e.c
@@ -3036,9 +3036,9 @@ static SLOT_INTERFACE_START(apple2_cards)
SLOT_INTERFACE("dx1", A2BUS_DX1) /* Decillonix DX-1 sampler card */
SLOT_INTERFACE("tm2ho", A2BUS_TIMEMASTERHO) /* Applied Engineering TimeMaster II H.O. */
SLOT_INTERFACE("mouse", A2BUS_MOUSE) /* Apple II Mouse Card */
- SLOT_INTERFACE("ezcgi", A2BUS_EZCGI) /* E-Z Color Graphics Interface */
- SLOT_INTERFACE("ezcgi9938", A2BUS_EZCGI_9938) /* E-Z Color Graphics Interface (TMS9938) */
- SLOT_INTERFACE("ezcgi9958", A2BUS_EZCGI_9958) /* E-Z Color Graphics Interface (TMS9958) */
+ SLOT_INTERFACE("ezcgi", A2BUS_EZCGI) /* E-Z Color Graphics Interface */
+ SLOT_INTERFACE("ezcgi9938", A2BUS_EZCGI_9938) /* E-Z Color Graphics Interface (TMS9938) */
+ SLOT_INTERFACE("ezcgi9958", A2BUS_EZCGI_9958) /* E-Z Color Graphics Interface (TMS9958) */
// SLOT_INTERFACE("magicmusician", A2BUS_MAGICMUSICIAN) /* Magic Musician Card */
SLOT_INTERFACE_END
diff --git a/src/mess/drivers/gamate.c b/src/mess/drivers/gamate.c
index 3953bc5b060..67cf8c29d91 100644
--- a/src/mess/drivers/gamate.c
+++ b/src/mess/drivers/gamate.c
@@ -4,7 +4,7 @@
Morten Shearman Kirkegaard morten+gamate@afdelingp.dk
Juan F??lix Mateos vectrex@hackermesh.org
- nmi unknown
+ nmi unknown
bomb blast top status line missing
******************************************************************************/
@@ -84,7 +84,7 @@ private:
WRITE8_MEMBER( gamate_state::gamate_cart_protection_w )
{
logerror("%.6f protection write %x %x address:%x data:%x shift:%d\n",machine().time().as_double(), offset, data, card_protection.address, card_protection.cartridge_byte, card_protection.bit_shifter);
-
+
switch (offset)
{
case 0:
@@ -118,7 +118,7 @@ READ8_MEMBER( gamate_state::gamate_cart_protection_r )
ret=(card_protection.cartridge_byte&0x80) ? 2 : 0;
if (card_protection.bit_shifter==7 && !card_protection.failed)
{ // now protection chip on cartridge activates cartridge chip select on cpu accesses
-// m_maincpu->space(AS_PROGRAM).install_read_handler(0x6000, 0x6000, READ8_DELEGATE(gamate_state, gamate_cart_protection_r)); // next time I will try to get this working
+// m_maincpu->space(AS_PROGRAM).install_read_handler(0x6000, 0x6000, READ8_DELEGATE(gamate_state, gamate_cart_protection_r)); // next time I will try to get this working
}
card_protection.cartridge_byte<<=1;
}
@@ -318,12 +318,12 @@ void gamate_state::machine_start()
m_cart_ptr = memregion("maincpu")->base() + 0x6000;
if (m_cart->exists())
{
-// m_maincpu->space(AS_PROGRAM).install_read_handler(0x6000, 0x6000, READ8_DELEGATE(gamate_state, gamate_cart_protection_r));
+// m_maincpu->space(AS_PROGRAM).install_read_handler(0x6000, 0x6000, READ8_DELEGATE(gamate_state, gamate_cart_protection_r));
m_cart_ptr = m_cart->get_rom_base();
membank("bankmulti")->set_base(m_cart->get_rom_base()+1);
membank("bank")->set_base(m_cart->get_rom_base()+0x4000); // bankswitched games in reality no offset
}
-// m_bios[0xdf1]=0xea; m_bios[0xdf2]=0xea; // default bios: $47 protection readback
+// m_bios[0xdf1]=0xea; m_bios[0xdf2]=0xea; // default bios: $47 protection readback
card_protection.set=false;
bank_multi=0;
card_protection.unprotected=false;
@@ -400,4 +400,3 @@ ROM_END
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME */
CONS( 19??, gamate, 0, 0, gamate, gamate, gamate_state, gamate, "Bit Corp", "Gamate", 0)
-
diff --git a/src/mess/drivers/hh_hmcs40.c b/src/mess/drivers/hh_hmcs40.c
index 45bd3f76bc7..048ab43dede 100644
--- a/src/mess/drivers/hh_hmcs40.c
+++ b/src/mess/drivers/hh_hmcs40.c
@@ -66,7 +66,7 @@ public:
required_device<cpu_device> m_maincpu;
optional_ioport_array<7> m_inp_matrix; // max 7
optional_device<speaker_sound_device> m_speaker;
-
+
// misc common
UINT16 m_inp_mux; // multiplexed inputs mask
@@ -78,11 +78,11 @@ public:
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns
-
+
UINT32 m_grid; // VFD current row data
UINT64 m_plate; // VFD current column data
-
- UINT64 m_display_state[0x20]; // display matrix rows data
+
+ UINT64 m_display_state[0x20]; // display matrix rows data
UINT16 m_display_segmask[0x20]; // if not 0, display matrix row is a digit, mask indicates connected segments
UINT64 m_display_cache[0x20]; // (internal use)
UINT8 m_display_decay[0x20][0x40]; // (internal use)
@@ -95,7 +95,7 @@ public:
DECLARE_WRITE8_MEMBER(alnattck_plate_w);
DECLARE_WRITE16_MEMBER(alnattck_d_w);
DECLARE_READ16_MEMBER(alnattck_d_r);
-
+
void egalaxn2_display();
DECLARE_WRITE8_MEMBER(egalaxn2_plate_w);
DECLARE_WRITE16_MEMBER(egalaxn2_grid_w);
@@ -110,7 +110,7 @@ void hh_hmcs40_state::machine_start()
memset(m_display_cache, ~0, sizeof(m_display_cache));
memset(m_display_decay, 0, sizeof(m_display_decay));
memset(m_display_segmask, 0, sizeof(m_display_segmask));
-
+
m_inp_mux = 0;
m_grid = 0;
m_plate = 0;
@@ -191,7 +191,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(hh_hmcs40_state::display_decay_tick)
for (int x = 0; x < m_display_maxx; x++)
if (m_display_decay[y][x] != 0)
m_display_decay[y][x]--;
-
+
display_update();
}
@@ -204,7 +204,7 @@ void hh_hmcs40_state::display_matrix(int maxx, int maxy, UINT64 setx, UINT32 set
UINT64 mask = (1 << maxx) - 1;
for (int y = 0; y < maxy; y++)
m_display_state[y] = (sety >> y & 1) ? (setx & mask) : 0;
-
+
display_update();
}
@@ -249,7 +249,7 @@ static MACHINE_CONFIG_START( bambball, hh_hmcs40_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", HD38750, 400000) // approximation - RC osc.
-// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
+// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
MCFG_DEFAULT_LAYOUT(layout_hh_hmcs40_test)
/* no video! */
@@ -284,7 +284,7 @@ static MACHINE_CONFIG_START( packmon, hh_hmcs40_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", HD38800, 400000) // approximation - RC osc.
-// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
+// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
MCFG_DEFAULT_LAYOUT(layout_hh_hmcs40_test)
/* no video! */
@@ -318,7 +318,7 @@ static MACHINE_CONFIG_START( zackman, hh_hmcs40_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", HD38820, 400000) // approximation - RC osc.
-// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
+// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
MCFG_DEFAULT_LAYOUT(layout_hh_hmcs40_test)
/* no video! */
@@ -351,7 +351,7 @@ WRITE8_MEMBER(hh_hmcs40_state::alnattck_plate_w)
// update display
UINT32 plate = BITSWAP16(m_plate,11,9,8,10,7,2,0,1,3,4,5,6,12,13,14,15) | (m_plate & 0xf0000);
-
+
display_matrix(20, 10, plate, m_grid);
}
@@ -359,13 +359,13 @@ WRITE16_MEMBER(hh_hmcs40_state::alnattck_d_w)
{
// D4: speaker out
m_speaker->level_w(data >> 4 & 1);
-
+
// D7-D13: input mux
m_inp_mux = data >> 7 & 0x7f;
// D6-D15: vfd matrix grid
m_grid = data >> 6 & 0x3ff;
-
+
// D0-D3: plate 16-19 (update display there)
alnattck_plate_w(space, 4, data & 0xf);
}
@@ -449,7 +449,7 @@ static MACHINE_CONFIG_START( cdkong, hh_hmcs40_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", HD38820, 400000) // approximation - RC osc.
-// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
+// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
MCFG_DEFAULT_LAYOUT(layout_hh_hmcs40_test)
/* no video! */
@@ -484,7 +484,7 @@ static MACHINE_CONFIG_START( cgalaxn, hh_hmcs40_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", HD38800, 400000) // approximation - RC osc.
-// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
+// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
MCFG_DEFAULT_LAYOUT(layout_hh_hmcs40_test)
/* no video! */
@@ -519,7 +519,7 @@ static MACHINE_CONFIG_START( cpacman, hh_hmcs40_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", HD38820, 400000) // approximation - RC osc.
-// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
+// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
MCFG_DEFAULT_LAYOUT(layout_hh_hmcs40_test)
/* no video! */
@@ -554,7 +554,7 @@ static MACHINE_CONFIG_START( cmspacmn, hh_hmcs40_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", HD38820, 400000) // approximation - RC osc.
-// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
+// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
MCFG_DEFAULT_LAYOUT(layout_hh_hmcs40_test)
/* no video! */
@@ -583,7 +583,7 @@ void hh_hmcs40_state::egalaxn2_display()
{
UINT32 grid = BITSWAP16(m_grid,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14);
UINT32 plate = BITSWAP24(m_plate,23,22,21,20,15,14,13,12,7,6,5,4,3,2,1,0,19,18,17,16,11,10,9,8);
-
+
display_matrix(24, 15, plate, grid);
}
@@ -591,10 +591,10 @@ WRITE16_MEMBER(hh_hmcs40_state::egalaxn2_grid_w)
{
// D0: speaker out
m_speaker->level_w(data & 1);
-
+
// D1-D4: input mux
m_inp_mux = data >> 1 & 0xf;
-
+
// D1-D15: vfd matrix grid
m_grid = data >> 1;
egalaxn2_display();
@@ -766,7 +766,7 @@ static MACHINE_CONFIG_START( pbqbert, hh_hmcs40_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", HD38820, 400000) // approximation - RC osc.
-// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
+// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
MCFG_DEFAULT_LAYOUT(layout_hh_hmcs40_test)
/* no video! */
@@ -787,7 +787,7 @@ MACHINE_CONFIG_END
* boards are labeled THF-01II 2E138E01/2E128E02
* Hitachi HD38800B23 MCU
* cyan/red/blue VFD display Futaba DM-65ZK 3A
-
+
NOTE!: MESS external artwork is recommended
***************************************************************************/
@@ -801,7 +801,7 @@ static MACHINE_CONFIG_START( kingman, hh_hmcs40_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", HD38800, 400000) // approximation - RC osc.
-// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
+// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
MCFG_DEFAULT_LAYOUT(layout_hh_hmcs40_test)
/* no video! */
@@ -836,7 +836,7 @@ static MACHINE_CONFIG_START( tmtron, hh_hmcs40_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", HD38800, 400000) // approximation - RC osc.
-// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
+// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
MCFG_DEFAULT_LAYOUT(layout_hh_hmcs40_test)
/* no video! */
diff --git a/src/mess/drivers/hh_pic16.c b/src/mess/drivers/hh_pic16.c
index b8281a737e0..4ee9bf29385 100644
--- a/src/mess/drivers/hh_pic16.c
+++ b/src/mess/drivers/hh_pic16.c
@@ -57,8 +57,8 @@ public:
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns
-
- UINT32 m_display_state[0x20]; // display matrix rows data
+
+ UINT32 m_display_state[0x20]; // display matrix rows data
UINT16 m_display_segmask[0x20]; // if not 0, display matrix row is a digit, mask indicates connected segments
UINT32 m_display_cache[0x20]; // (internal use)
UINT8 m_display_decay[0x20][0x20]; // (internal use)
@@ -79,7 +79,7 @@ void hh_pic16_state::machine_start()
memset(m_display_cache, ~0, sizeof(m_display_cache));
memset(m_display_decay, 0, sizeof(m_display_decay));
memset(m_display_segmask, 0, sizeof(m_display_segmask));
-
+
m_b = 0;
m_c = 0;
@@ -158,7 +158,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(hh_pic16_state::display_decay_tick)
for (int x = 0; x < m_display_maxx; x++)
if (m_display_decay[y][x] != 0)
m_display_decay[y][x]--;
-
+
display_update();
}
@@ -171,7 +171,7 @@ void hh_pic16_state::display_matrix(int maxx, int maxy, UINT32 setx, UINT32 sety
UINT32 mask = (1 << maxx) - 1;
for (int y = 0; y < maxy; y++)
m_display_state[y] = (sety >> y & 1) ? (setx & mask) : 0;
-
+
display_update();
}
@@ -199,14 +199,14 @@ WRITE8_MEMBER(hh_pic16_state::maniac_output_w)
m_c = data;
else
m_b = data;
-
+
// d7: speaker out
m_speaker->level_w((m_b >> 7 & 1) | (m_c >> 6 & 2));
// d0-d6: 7seg
m_display_maxx = 7;
m_display_maxy = 2;
-
+
m_display_segmask[offset] = 0x7f;
m_display_state[offset] = ~data & 0x7f;
display_update();
diff --git a/src/mess/drivers/hh_tms1k.c b/src/mess/drivers/hh_tms1k.c
index 83d83023ef0..5d78b892de5 100644
--- a/src/mess/drivers/hh_tms1k.c
+++ b/src/mess/drivers/hh_tms1k.c
@@ -5,7 +5,7 @@
This driver is a collection of simple dedicated handheld and tabletop
toys based around the TMS1000 MCU series. Anything more complex or clearly
part of a series is (or will be) in its own driver.
-
+
Let's use this driver for a list of known devices and their serials,
excluding TI's own products (see for example ticalc1x.c, tispeak.c)
@@ -53,7 +53,7 @@
@MP7334 TMS1400 1981, Coleco Total Control 4
inconsistent:
-
+
@CD7282SL TMS1100 1981, Tandy/RadioShack Tandy-12 (serial is similar to TI Speak & Spell series?)
(* denotes not yet emulated by MESS, @ denotes it's in this driver)
@@ -102,7 +102,7 @@ void hh_tms1k_state::machine_start()
memset(m_display_cache, ~0, sizeof(m_display_cache));
memset(m_display_decay, 0, sizeof(m_display_decay));
memset(m_display_segmask, 0, sizeof(m_display_segmask));
-
+
m_o = 0;
m_r = 0;
m_inp_mux = 0;
@@ -190,7 +190,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(hh_tms1k_state::display_decay_tick)
for (int x = 0; x < m_display_maxx; x++)
if (m_display_decay[y][x] != 0)
m_display_decay[y][x]--;
-
+
display_update();
}
@@ -203,7 +203,7 @@ void hh_tms1k_state::display_matrix(int maxx, int maxy, UINT32 setx, UINT32 sety
UINT32 mask = (1 << maxx) - 1;
for (int y = 0; y < maxy; y++)
m_display_state[y] = (sety >> y & 1) ? (setx & mask) : 0;
-
+
display_update();
}
@@ -293,7 +293,7 @@ WRITE16_MEMBER(hh_tms1k_state::mathmagi_write_r)
{
// R3,R5-R7,R9,R10: input mux
m_inp_mux = (data >> 3 & 1) | (data >> 4 & 0xe) | (data >> 5 & 0x30);
-
+
// +others:
m_r = data;
mathmagi_display();
@@ -442,10 +442,10 @@ void hh_tms1k_state::amaztron_display()
m_display_segmask[y] = 0x7f;
m_display_state[y] = (m_r >> (y + 8) & 1) ? m_o : 0;
}
-
+
// R6,R7: lamps (-> lamp20,21)
m_display_state[2] = m_r >> 6 & 3;
-
+
display_update();
}
@@ -453,7 +453,7 @@ WRITE16_MEMBER(hh_tms1k_state::amaztron_write_r)
{
// R0-R5: input mux
m_inp_mux = data & 0x3f;
-
+
// R10: speaker out
m_speaker->level_w(data >> 10 & 1);
@@ -582,12 +582,12 @@ MACHINE_CONFIG_END
void hh_tms1k_state::tc4_display()
{
m_display_wait = 50;
-
+
// R5,7,8,9 are 7segs
for (int y = 0; y < 10; y++)
if (y >= 5 && y <= 9 && y != 6)
m_display_segmask[y] = 0x7f;
-
+
// update current state (note: R6 as extra column!)
display_matrix(9, 10, (m_o | (m_r << 2 & 0x100)), m_r);
}
@@ -600,7 +600,7 @@ WRITE16_MEMBER(hh_tms1k_state::tc4_write_r)
// R0-R5: input mux
// R9: to cartridge slot
m_inp_mux = data & 0x23f;
-
+
// R6: led column 8
// +other columns
m_r = data;
@@ -699,13 +699,13 @@ MACHINE_CONFIG_END
Entex Electronic Baseball (1)
* TMS1000NLP MP0914 (die labeled MP0914A)
-
+
This is a handheld LED baseball game. One player controls the batter, the CPU
or other player controls the pitcher. Pitcher throw buttons are on a 'joypad'
obtained from a compartment in the back. Player scores are supposed to be
written down manually, the game doesn't save scores or innings (this annoyance
was resolved in the sequel). For more information, refer to the official manual.
-
+
The overlay graphic is known to have 2 versions: one where the field players
are denoted by words ("left", "center", "short", etc), and an alternate one
with little guys drawn next to the LEDs.
@@ -730,7 +730,7 @@ void hh_tms1k_state::ebball_display()
{
// R8 is a 7seg
m_display_segmask[8] = 0x7f;
-
+
display_matrix(7, 9, ~m_o, m_r);
}
@@ -738,10 +738,10 @@ WRITE16_MEMBER(hh_tms1k_state::ebball_write_r)
{
// R1-R5: input mux
m_inp_mux = data >> 1 & 0x1f;
-
+
// R9: speaker out
m_speaker->level_w(data >> 9 & 1);
-
+
// R0-R8: led columns
m_r = data;
ebball_display();
@@ -821,15 +821,15 @@ MACHINE_CONFIG_END
Entex Electronic Baseball 2
* boards are labeled: ZENY
* TMS1000 MCU, MP0923 (die labeled MP0923)
-
+
The Japanese version was published by Gakken, black casing instead of white.
-
+
The sequel to Entex Baseball, this version keeps up with score and innings.
As its predecessor, the pitcher controls are on a separate joypad.
lamp translation table: led zz from game PCB = MESS lampyx:
-
+
00 = - 10 = lamp94 20 = lamp74 30 = lamp50
01 = lamp53 11 = lamp93 21 = lamp75 31 = lamp51
02 = lamp7 12 = lamp92 22 = lamp80 32 = lamp52
@@ -848,7 +848,7 @@ void hh_tms1k_state::ebball2_display()
// the first 3 are 7segs
for (int y = 0; y < 3; y++)
m_display_segmask[y] = 0x7f;
-
+
display_matrix(8, 10, ~m_o, m_r ^ 0x7f);
}
@@ -856,10 +856,10 @@ WRITE16_MEMBER(hh_tms1k_state::ebball2_write_r)
{
// R3-R6: input mux
m_inp_mux = data >> 3 & 0xf;
-
+
// R10: speaker out
m_speaker->level_w(data >> 10 & 1);
-
+
// R0-R9: led columns
m_r = data;
ebball2_display();
@@ -932,14 +932,14 @@ MACHINE_CONFIG_END
* boards are labeled: ZENY
* TMS1100NLL 6007 MP1204 (die labeled MP1204)
* 2*SN75492N LED display driver
-
+
This is another improvement over Entex Baseball, where gameplay is a bit more
varied. Like the others, the pitcher controls are on a separate joypad.
lamp translation table: led zz from game PCB = MESS lampyx:
note: unlabeled panel leds are listed here as Sz, Bz, Oz, Iz, z left-to-right
-
+
00 = - 10 = lamp75 20 = lamp72
01 = lamp60 11 = lamp65 21 = lamp84
02 = lamp61 12 = lamp55 22 = lamp85
@@ -969,12 +969,12 @@ void hh_tms1k_state::ebball3_display()
// R0,R1 are normal 7segs
m_display_segmask[0] = m_display_segmask[1] = 0x7f;
-
+
// R4,R7 contain segments(only F and B) for the two other digits
m_display_state[10] = (m_display_state[4] & 0x20) | (m_display_state[7] & 0x02);
m_display_state[11] = ((m_display_state[4] & 0x10) | (m_display_state[7] & 0x01)) << 1;
m_display_segmask[10] = m_display_segmask[11] = 0x22;
-
+
display_update();
}
@@ -982,10 +982,10 @@ WRITE16_MEMBER(hh_tms1k_state::ebball3_write_r)
{
// R0-R2: input mux
m_inp_mux = data & 7;
-
+
// R10: speaker out
m_speaker->level_w(data >> 10 & 1);
-
+
// R0-R9: led columns
m_r = data;
ebball3_display();
@@ -1118,7 +1118,7 @@ WRITE16_MEMBER(hh_tms1k_state::elecdet_write_o)
{
// O0,O1,O4,O6: input mux
m_inp_mux = (data & 3) | (data >> 2 & 4) | (data >> 3 & 8);
-
+
// O0-O6: led segments A-G
// O7: speaker out
m_o = data;
@@ -1218,7 +1218,7 @@ void hh_tms1k_state::starwbc_display()
{
// R6,R8 are 7segs
m_display_segmask[6] = m_display_segmask[8] = 0x7f;
-
+
display_matrix(8, 10, m_o, m_r);
}
@@ -1569,7 +1569,7 @@ WRITE16_MEMBER(hh_tms1k_state::cnsector_write_r)
// R6-R9: direction leds (-> lamp60-63)
m_display_state[6] = data >> 6 & 0xf;
-
+
display_update();
}
@@ -1577,7 +1577,7 @@ WRITE16_MEMBER(hh_tms1k_state::cnsector_write_o)
{
// O0-O4: input mux
m_inp_mux = data & 0x1f;
-
+
// O0-O7: digit segments
m_o = data;
}
@@ -1646,7 +1646,7 @@ MACHINE_CONFIG_END
Parker Bros Merlin handheld game, by Bob Doyle
* TMS1100NLL MP3404A-N2
* red LEDs and 1-bit sound
-
+
Also published in Japan by Tomy as "Dr. Smith", white case instead of red.
The one with dark-blue case is the rare sequel Master Merlin. More sequels
followed too, but on other hardware.
@@ -1780,7 +1780,7 @@ WRITE16_MEMBER(hh_tms1k_state::stopthief_write_o)
{
// O0,O6: input mux
m_inp_mux = (data & 1) | (data >> 5 & 2);
-
+
// O3: speaker out
// O0-O2,O4-O7: led segments A-G
m_o = data;
diff --git a/src/mess/drivers/hh_ucom4.c b/src/mess/drivers/hh_ucom4.c
index b258c942942..2c05bf02935 100644
--- a/src/mess/drivers/hh_ucom4.c
+++ b/src/mess/drivers/hh_ucom4.c
@@ -6,7 +6,7 @@
known chips:
-
+
serial device etc.
----------------------------------------------------------------
@031 uPD553C 1979, Bambino Superstar Football (ET-03)
@@ -52,7 +52,7 @@ public:
required_device<cpu_device> m_maincpu;
optional_ioport_array<5> m_inp_matrix; // max 5
optional_device<speaker_sound_device> m_speaker;
-
+
// misc common
UINT8 m_port[9]; // MCU port A-I write data
UINT16 m_inp_mux; // multiplexed inputs mask
@@ -65,11 +65,11 @@ public:
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns
-
+
UINT32 m_grid; // VFD current row data
UINT32 m_plate; // VFD current column data
-
- UINT32 m_display_state[0x20]; // display matrix rows data
+
+ UINT32 m_display_state[0x20]; // display matrix rows data
UINT16 m_display_segmask[0x20]; // if not 0, display matrix row is a digit, mask indicates connected segments
UINT32 m_display_cache[0x20]; // (internal use)
UINT8 m_display_decay[0x20][0x20]; // (internal use)
@@ -95,7 +95,7 @@ public:
DECLARE_WRITE8_MEMBER(edracula_grid_w);
DECLARE_WRITE8_MEMBER(edracula_plate_w);
-
+
DECLARE_WRITE8_MEMBER(tmtennis_grid_w);
DECLARE_WRITE8_MEMBER(tmtennis_plate_w);
DECLARE_WRITE8_MEMBER(tmtennis_port_e_w);
@@ -107,7 +107,7 @@ public:
void tmpacman_display();
DECLARE_WRITE8_MEMBER(tmpacman_grid_w);
DECLARE_WRITE8_MEMBER(tmpacman_plate_w);
-
+
DECLARE_WRITE8_MEMBER(alnchase_output_w);
DECLARE_READ8_MEMBER(alnchase_input_r);
};
@@ -120,7 +120,7 @@ void hh_ucom4_state::machine_start()
memset(m_display_cache, ~0, sizeof(m_display_cache));
memset(m_display_decay, 0, sizeof(m_display_decay));
memset(m_display_segmask, 0, sizeof(m_display_segmask));
-
+
memset(m_port, 0, sizeof(m_port));
m_inp_mux = 0;
m_grid = 0;
@@ -203,7 +203,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(hh_ucom4_state::display_decay_tick)
for (int x = 0; x < m_display_maxx; x++)
if (m_display_decay[y][x] != 0)
m_display_decay[y][x]--;
-
+
display_update();
}
@@ -216,7 +216,7 @@ void hh_ucom4_state::display_matrix(int maxx, int maxy, UINT32 setx, UINT32 sety
UINT32 mask = (1 << maxx) - 1;
for (int y = 0; y < maxy; y++)
m_display_state[y] = (sety >> y & 1) ? (setx & mask) : 0;
-
+
display_update();
}
@@ -247,7 +247,7 @@ UINT8 hh_ucom4_state::read_inputs(int columns)
* PCB label Emix Corp. ET-03
* NEC uCOM-43 MCU, labeled D553C 031
* green VFD display Emix-102
-
+
Press the Kick button to start the game, an automatic sequence follows.
Then choose a formation(A,B,C) and either pass the ball, and/or start
running. For more information, refer to the official manual.
@@ -274,15 +274,15 @@ WRITE8_MEMBER(hh_ucom4_state::ssfball_grid_w)
WRITE8_MEMBER(hh_ucom4_state::ssfball_plate_w)
{
m_port[offset] = data;
-
+
// E,F,G,H,I(not all!): vfd matrix plate
int shift = (offset - NEC_UCOM4_PORTE) * 4;
m_plate = (m_plate & ~(0xf << shift)) | (data << shift);
-
+
// F3,G3: input mux + speaker
m_inp_mux = (m_port[NEC_UCOM4_PORTF] >> 3 & 1) | (m_port[NEC_UCOM4_PORTG] >> 2 & 2);
m_speaker->level_w(m_inp_mux);
-
+
// E3: vfd matrix grid 8
if (offset == NEC_UCOM4_PORTE)
ssfball_grid_w(space, offset, data >> 3 & 1);
@@ -376,10 +376,10 @@ WRITE8_MEMBER(hh_ucom4_state::splasfgt_grid_w)
// G,H,I0: vfd matrix grid
int shift = (offset - NEC_UCOM4_PORTG) * 4;
m_grid = (m_grid & ~(0xf << shift)) | (data << shift);
-
+
// G(grid 0-3): input mux
m_inp_mux = m_grid & 0xf;
-
+
// I2: vfd matrix plate 6
if (offset == NEC_UCOM4_PORTI)
m_plate = (m_plate & 0xffff) | (data << 14 & 0x10000);
@@ -392,11 +392,11 @@ WRITE8_MEMBER(hh_ucom4_state::splasfgt_plate_w)
// C,D,E,F23: vfd matrix plate
int shift = (offset - NEC_UCOM4_PORTC) * 4;
m_plate = (m_plate & ~(0xf << shift)) | (data << shift);
-
+
// F01: speaker out
if (offset == NEC_UCOM4_PORTF)
m_speaker->level_w(data & 3);
-
+
ssfball_display();
}
@@ -408,7 +408,7 @@ READ8_MEMBER(hh_ucom4_state::splasfgt_input_b_r)
/* physical button layout and labels is like this:
-
+
* left = P1 side * * right = P2 side * (note: in 1P mode, switch sides between turns)
[ JUMP ] [ HIGH ] (players sw) [ HIGH ] [ JUMP ]
@@ -530,7 +530,7 @@ WRITE8_MEMBER(hh_ucom4_state::astrocmd_plate_w)
{
// E2: speaker out
m_speaker->level_w(data >> 2 & 1);
-
+
// E3: vfd matrix grid 8
astrocmd_grid_w(space, offset, data >> 3 & 1);
}
@@ -719,7 +719,7 @@ READ8_MEMBER(hh_ucom4_state::tmtennis_input_r)
/* Pro-Tennis physical button layout and labels is like this:
-
+
* left = P2/CPU side * * right = P1 side *
[SERVE] [1] [2] [3] [3] [2] [1] [SERVE]
@@ -818,7 +818,7 @@ MACHINE_CONFIG_END
- USA: Pac Man
- UK: Puckman (Tomy), and also published by Grandstand as Munchman
- Australia: Pac Man-1, published by Futuretronics
-
+
The game will start automatically after turning it on. This Pac Man refuses
to eat dots with his butt, you can only eat them going right-to-left.
@@ -830,7 +830,7 @@ void hh_ucom4_state::tmpacman_display()
{
UINT32 grid = BITSWAP8(m_grid,0,1,2,3,4,5,6,7);
UINT32 plate = BITSWAP24(m_plate,23,22,21,20,19,16,17,18,11,10,9,8,0,2,3,1,4,5,6,7,12,13,14,15);
-
+
display_matrix(19, 8, plate | 0x100, grid); // plate 8 (maze) is always on
}
@@ -930,7 +930,7 @@ WRITE8_MEMBER(hh_ucom4_state::alnchase_output_w)
// C0(grid 0): input enable PL1
// D0(grid 4): input enable PL2
m_inp_mux = (m_grid & 1) | (m_grid >> 3 & 2);
-
+
// E1: speaker out
if (offset == NEC_UCOM4_PORTE)
m_speaker->level_w(data >> 1 & 1);
diff --git a/src/mess/drivers/imds2.c b/src/mess/drivers/imds2.c
index cf192dd63e8..eac8f9b7bb0 100644
--- a/src/mess/drivers/imds2.c
+++ b/src/mess/drivers/imds2.c
@@ -89,543 +89,543 @@
#define IOC_BEEP_FREQ 3300
static ADDRESS_MAP_START(ipc_mem_map , AS_PROGRAM , 8 , imds2_state)
- AM_RANGE(0x0000 , 0xffff) AM_READWRITE(ipc_mem_read, ipc_mem_write)
+ AM_RANGE(0x0000 , 0xffff) AM_READWRITE(ipc_mem_read, ipc_mem_write)
ADDRESS_MAP_END
static ADDRESS_MAP_START(ipc_io_map , AS_IO , 8 , imds2_state)
- ADDRESS_MAP_UNMAP_LOW
- AM_RANGE(0xc0 , 0xc0) AM_READWRITE(imds2_ipc_dbbout_r , imds2_ipc_dbbin_data_w)
- AM_RANGE(0xc1 , 0xc1) AM_READWRITE(imds2_ipc_status_r , imds2_ipc_dbbin_cmd_w)
- AM_RANGE(0xfa , 0xfb) AM_READWRITE(imds2_ipclocpic_r , imds2_ipclocpic_w)
- AM_RANGE(0xfc , 0xfd) AM_READWRITE(imds2_ipcsyspic_r , imds2_ipcsyspic_w)
- AM_RANGE(0xff , 0xff) AM_WRITE(imds2_ipc_control_w)
+ ADDRESS_MAP_UNMAP_LOW
+ AM_RANGE(0xc0 , 0xc0) AM_READWRITE(imds2_ipc_dbbout_r , imds2_ipc_dbbin_data_w)
+ AM_RANGE(0xc1 , 0xc1) AM_READWRITE(imds2_ipc_status_r , imds2_ipc_dbbin_cmd_w)
+ AM_RANGE(0xfa , 0xfb) AM_READWRITE(imds2_ipclocpic_r , imds2_ipclocpic_w)
+ AM_RANGE(0xfc , 0xfd) AM_READWRITE(imds2_ipcsyspic_r , imds2_ipcsyspic_w)
+ AM_RANGE(0xff , 0xff) AM_WRITE(imds2_ipc_control_w)
ADDRESS_MAP_END
- static ADDRESS_MAP_START(ioc_mem_map , AS_PROGRAM , 8 , imds2_state)
- ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0x0000 , 0x1fff) AM_ROM
- AM_RANGE(0x4000 , 0x5fff) AM_RAM
+ static ADDRESS_MAP_START(ioc_mem_map , AS_PROGRAM , 8 , imds2_state)
+ ADDRESS_MAP_UNMAP_HIGH
+ AM_RANGE(0x0000 , 0x1fff) AM_ROM
+ AM_RANGE(0x4000 , 0x5fff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START(ioc_io_map , AS_IO , 8 , imds2_state)
- ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0x00 , 0x0f) AM_WRITE(imds2_ioc_dbbout_w)
- AM_RANGE(0x20 , 0x2f) AM_WRITE(imds2_ioc_f0_w)
- AM_RANGE(0x30 , 0x3f) AM_WRITE(imds2_ioc_set_f1_w)
- AM_RANGE(0x40 , 0x4f) AM_WRITE(imds2_ioc_reset_f1_w)
- AM_RANGE(0x50 , 0x5f) AM_WRITE(imds2_start_timer_w)
- AM_RANGE(0x60 , 0x6f) AM_WRITE(imds2_miscout_w)
- AM_RANGE(0x80 , 0x8f) AM_READ(imds2_miscin_r)
- AM_RANGE(0x90 , 0x9f) AM_READ(imds2_kb_read)
- AM_RANGE(0xa0 , 0xaf) AM_READ(imds2_ioc_status_r)
- AM_RANGE(0xb0 , 0xbf) AM_READ(imds2_ioc_dbbin_r)
- AM_RANGE(0xc0 , 0xcf) AM_DEVREADWRITE("iocfdc" , i8271_device , read , write)
- AM_RANGE(0xd0 , 0xdf) AM_DEVREADWRITE("ioccrtc" , i8275_device , read , write)
- AM_RANGE(0xe0 , 0xef) AM_DEVREADWRITE("ioctimer" , pit8253_device , read , write);
+ ADDRESS_MAP_UNMAP_HIGH
+ AM_RANGE(0x00 , 0x0f) AM_WRITE(imds2_ioc_dbbout_w)
+ AM_RANGE(0x20 , 0x2f) AM_WRITE(imds2_ioc_f0_w)
+ AM_RANGE(0x30 , 0x3f) AM_WRITE(imds2_ioc_set_f1_w)
+ AM_RANGE(0x40 , 0x4f) AM_WRITE(imds2_ioc_reset_f1_w)
+ AM_RANGE(0x50 , 0x5f) AM_WRITE(imds2_start_timer_w)
+ AM_RANGE(0x60 , 0x6f) AM_WRITE(imds2_miscout_w)
+ AM_RANGE(0x80 , 0x8f) AM_READ(imds2_miscin_r)
+ AM_RANGE(0x90 , 0x9f) AM_READ(imds2_kb_read)
+ AM_RANGE(0xa0 , 0xaf) AM_READ(imds2_ioc_status_r)
+ AM_RANGE(0xb0 , 0xbf) AM_READ(imds2_ioc_dbbin_r)
+ AM_RANGE(0xc0 , 0xcf) AM_DEVREADWRITE("iocfdc" , i8271_device , read , write)
+ AM_RANGE(0xd0 , 0xdf) AM_DEVREADWRITE("ioccrtc" , i8275_device , read , write)
+ AM_RANGE(0xe0 , 0xef) AM_DEVREADWRITE("ioctimer" , pit8253_device , read , write);
// DMA controller range doesn't extend to 0xff because register 0xfd needs to be read as 0xff
// This register is used by IOC firmware to detect DMA controller model (either 8237 or 8257)
- AM_RANGE(0xf0 , 0xf8) AM_DEVREADWRITE("iocdma" , i8257_device , read , write)
+ AM_RANGE(0xf0 , 0xf8) AM_DEVREADWRITE("iocdma" , i8257_device , read , write)
ADDRESS_MAP_END
-
+
static ADDRESS_MAP_START(kb_io_map , AS_IO , 8 , imds2_state)
- AM_RANGE(MCS48_PORT_P1 , MCS48_PORT_P1) AM_WRITE(imds2_kb_port_p1_w)
- AM_RANGE(MCS48_PORT_P2 , MCS48_PORT_P2) AM_READ(imds2_kb_port_p2_r)
- AM_RANGE(MCS48_PORT_T0 , MCS48_PORT_T0) AM_READ(imds2_kb_port_t0_r)
- AM_RANGE(MCS48_PORT_T1 , MCS48_PORT_T1) AM_READ(imds2_kb_port_t1_r)
+ AM_RANGE(MCS48_PORT_P1 , MCS48_PORT_P1) AM_WRITE(imds2_kb_port_p1_w)
+ AM_RANGE(MCS48_PORT_P2 , MCS48_PORT_P2) AM_READ(imds2_kb_port_p2_r)
+ AM_RANGE(MCS48_PORT_T0 , MCS48_PORT_T0) AM_READ(imds2_kb_port_t0_r)
+ AM_RANGE(MCS48_PORT_T1 , MCS48_PORT_T1) AM_READ(imds2_kb_port_t1_r)
ADDRESS_MAP_END
-
+
imds2_state::imds2_state(const machine_config &mconfig, device_type type, const char *tag)
- : driver_device(mconfig , type , tag),
- m_ipccpu(*this , "ipccpu"),
- m_ipcsyspic(*this , "ipcsyspic"),
- m_ipclocpic(*this , "ipclocpic"),
- m_ioccpu(*this , "ioccpu"),
- m_iocdma(*this , "iocdma"),
- m_ioccrtc(*this , "ioccrtc"),
- m_iocbeep(*this , "iocbeep"),
- m_ioctimer(*this , "ioctimer"),
- m_iocfdc(*this , "iocfdc"),
- m_kbcpu(*this , "kbcpu"),
- m_palette(*this , "palette"),
- m_gfxdecode(*this, "gfxdecode"),
- m_floppy0(*this , FLOPPY_0),
- m_io_key0(*this , "KEY0"),
- m_io_key1(*this , "KEY1"),
- m_io_key2(*this , "KEY2"),
- m_io_key3(*this , "KEY3"),
- m_io_key4(*this , "KEY4"),
- m_io_key5(*this , "KEY5"),
- m_io_key6(*this , "KEY6"),
- m_io_key7(*this , "KEY7"),
- m_ioc_options(*this , "IOC_OPTS")
+ : driver_device(mconfig , type , tag),
+ m_ipccpu(*this , "ipccpu"),
+ m_ipcsyspic(*this , "ipcsyspic"),
+ m_ipclocpic(*this , "ipclocpic"),
+ m_ioccpu(*this , "ioccpu"),
+ m_iocdma(*this , "iocdma"),
+ m_ioccrtc(*this , "ioccrtc"),
+ m_iocbeep(*this , "iocbeep"),
+ m_ioctimer(*this , "ioctimer"),
+ m_iocfdc(*this , "iocfdc"),
+ m_kbcpu(*this , "kbcpu"),
+ m_palette(*this , "palette"),
+ m_gfxdecode(*this, "gfxdecode"),
+ m_floppy0(*this , FLOPPY_0),
+ m_io_key0(*this , "KEY0"),
+ m_io_key1(*this , "KEY1"),
+ m_io_key2(*this , "KEY2"),
+ m_io_key3(*this , "KEY3"),
+ m_io_key4(*this , "KEY4"),
+ m_io_key5(*this , "KEY5"),
+ m_io_key6(*this , "KEY6"),
+ m_io_key7(*this , "KEY7"),
+ m_ioc_options(*this , "IOC_OPTS")
{
}
READ8_MEMBER(imds2_state::ipc_mem_read)
{
- if (imds2_in_ipc_rom(offset)) {
- return m_ipc_rom[ (offset & 0x07ff) | ((offset & 0x1000) >> 1) ];
- } else {
- return m_ipc_ram[ offset ];
- }
+ if (imds2_in_ipc_rom(offset)) {
+ return m_ipc_rom[ (offset & 0x07ff) | ((offset & 0x1000) >> 1) ];
+ } else {
+ return m_ipc_ram[ offset ];
+ }
}
WRITE8_MEMBER(imds2_state::ipc_mem_write)
{
- if (!imds2_in_ipc_rom(offset)) {
- m_ipc_ram[ offset ] = data;
- }
+ if (!imds2_in_ipc_rom(offset)) {
+ m_ipc_ram[ offset ] = data;
+ }
}
WRITE8_MEMBER(imds2_state::imds2_ipc_control_w)
{
- // See A84, pg 28 of [1]
- // b3 is ~(bit to be written)
- // b2-b0 is ~(no. of bit to be written)
- UINT8 mask = (1U << (~data & 0x07));
+ // See A84, pg 28 of [1]
+ // b3 is ~(bit to be written)
+ // b2-b0 is ~(no. of bit to be written)
+ UINT8 mask = (1U << (~data & 0x07));
- if (BIT(data , 3)) {
- m_ipc_control &= ~mask;
- } else {
- m_ipc_control |= mask;
- }
+ if (BIT(data , 3)) {
+ m_ipc_control &= ~mask;
+ } else {
+ m_ipc_control |= mask;
+ }
}
WRITE_LINE_MEMBER(imds2_state::imds2_ipc_intr)
{
- m_ipccpu->set_input_line(I8085_INTR_LINE , (state != 0) && BIT(m_ipc_control , 2));
+ m_ipccpu->set_input_line(I8085_INTR_LINE , (state != 0) && BIT(m_ipc_control , 2));
}
READ8_MEMBER(imds2_state::imds2_ipcsyspic_r)
{
- return m_ipcsyspic->read(space , offset == 0);
+ return m_ipcsyspic->read(space , offset == 0);
}
READ8_MEMBER(imds2_state::imds2_ipclocpic_r)
{
- return m_ipclocpic->read(space , offset == 0);
+ return m_ipclocpic->read(space , offset == 0);
}
WRITE8_MEMBER(imds2_state::imds2_ipcsyspic_w)
{
- m_ipcsyspic->write(space , offset == 0 , data);
+ m_ipcsyspic->write(space , offset == 0 , data);
}
WRITE8_MEMBER(imds2_state::imds2_ipclocpic_w)
{
- m_ipclocpic->write(space , offset == 0 , data);
+ m_ipclocpic->write(space , offset == 0 , data);
}
WRITE8_MEMBER(imds2_state::imds2_miscout_w)
{
- m_miscout = data;
- imds2_update_beeper();
- // Send INTR to IPC
- m_ipclocpic->ir6_w(BIT(m_miscout , 1));
+ m_miscout = data;
+ imds2_update_beeper();
+ // Send INTR to IPC
+ m_ipclocpic->ir6_w(BIT(m_miscout , 1));
}
READ8_MEMBER(imds2_state::imds2_miscin_r)
{
- UINT8 res = m_ioc_options->read();
- return res | ((m_beeper_timer == 0) << 2);
+ UINT8 res = m_ioc_options->read();
+ return res | ((m_beeper_timer == 0) << 2);
}
WRITE_LINE_MEMBER(imds2_state::imds2_beep_timer_w)
{
- m_beeper_timer = state;
- imds2_update_beeper();
+ m_beeper_timer = state;
+ imds2_update_beeper();
}
WRITE8_MEMBER(imds2_state::imds2_start_timer_w)
{
- // Trigger timer 2 of ioctimer
- m_ioctimer->write_gate2(0);
- m_ioctimer->write_gate2(1);
+ // Trigger timer 2 of ioctimer
+ m_ioctimer->write_gate2(0);
+ m_ioctimer->write_gate2(1);
}
READ8_MEMBER(imds2_state::imds2_kb_read)
{
- return m_kbcpu->upi41_master_r(space , (offset & 2) >> 1);
+ return m_kbcpu->upi41_master_r(space , (offset & 2) >> 1);
}
READ8_MEMBER(imds2_state::imds2_kb_port_p2_r)
{
- if ((m_kb_p1 & 3) == 0) {
- // Row selected
- // Row number is encoded on bits P15..P12, they are "backwards" (P15 is LSB) and keyboard rows are encoded starting with value 2 on these bits (see A4, pg 56 of [1])
- unsigned row = (m_kb_p1 >> 2) & 0x0f;
- ioport_value data;
-
- switch (row) {
- case 4:
- // Row 0
- data = m_io_key0->read();
- break;
-
- case 12:
- // Row 1
- data = m_io_key1->read();
- break;
-
- case 2:
- // Row 2
- data = m_io_key2->read();
- break;
-
- case 10:
- // Row 3
- data = m_io_key3->read();
- break;
-
- case 6:
- // Row 4
- data = m_io_key4->read();
- break;
-
- case 14:
- // Row 5
- data = m_io_key5->read();
- break;
-
- case 1:
- // Row 6
- data = m_io_key6->read();
- break;
-
- case 9:
- // Row 7
- data = m_io_key7->read();
- break;
-
- default:
- data = 0xff;
- break;
- }
- return data & 0xff;
- } else {
- // No row selected
- return 0xff;
- }
+ if ((m_kb_p1 & 3) == 0) {
+ // Row selected
+ // Row number is encoded on bits P15..P12, they are "backwards" (P15 is LSB) and keyboard rows are encoded starting with value 2 on these bits (see A4, pg 56 of [1])
+ unsigned row = (m_kb_p1 >> 2) & 0x0f;
+ ioport_value data;
+
+ switch (row) {
+ case 4:
+ // Row 0
+ data = m_io_key0->read();
+ break;
+
+ case 12:
+ // Row 1
+ data = m_io_key1->read();
+ break;
+
+ case 2:
+ // Row 2
+ data = m_io_key2->read();
+ break;
+
+ case 10:
+ // Row 3
+ data = m_io_key3->read();
+ break;
+
+ case 6:
+ // Row 4
+ data = m_io_key4->read();
+ break;
+
+ case 14:
+ // Row 5
+ data = m_io_key5->read();
+ break;
+
+ case 1:
+ // Row 6
+ data = m_io_key6->read();
+ break;
+
+ case 9:
+ // Row 7
+ data = m_io_key7->read();
+ break;
+
+ default:
+ data = 0xff;
+ break;
+ }
+ return data & 0xff;
+ } else {
+ // No row selected
+ return 0xff;
+ }
}
WRITE8_MEMBER(imds2_state::imds2_kb_port_p1_w)
{
- m_kb_p1 = data;
+ m_kb_p1 = data;
}
READ8_MEMBER(imds2_state::imds2_kb_port_t0_r)
{
- // T0 tied low
- // It appears to be some kind of strapping option on kb hw
- return 0;
+ // T0 tied low
+ // It appears to be some kind of strapping option on kb hw
+ return 0;
}
READ8_MEMBER(imds2_state::imds2_kb_port_t1_r)
{
- // T1 tied low
- // It appears to be some kind of strapping option on kb hw
- return 0;
+ // T1 tied low
+ // It appears to be some kind of strapping option on kb hw
+ return 0;
}
WRITE8_MEMBER(imds2_state::imds2_ioc_dbbout_w)
{
- m_ioc_obf = ~data;
- // Set/reset OBF flag (b0)
- m_ipc_ioc_status = ((offset & 1) == 0) | (m_ipc_ioc_status & ~0x01);
+ m_ioc_obf = ~data;
+ // Set/reset OBF flag (b0)
+ m_ipc_ioc_status = ((offset & 1) == 0) | (m_ipc_ioc_status & ~0x01);
}
WRITE8_MEMBER(imds2_state::imds2_ioc_f0_w)
{
- // Set/reset F0 flag (b2)
- m_ipc_ioc_status = ((offset & 1) << 2) | (m_ipc_ioc_status & ~0x04);
+ // Set/reset F0 flag (b2)
+ m_ipc_ioc_status = ((offset & 1) << 2) | (m_ipc_ioc_status & ~0x04);
}
WRITE8_MEMBER(imds2_state::imds2_ioc_set_f1_w)
{
- // Set F1 flag (b3)
- m_ipc_ioc_status |= 0x08;
+ // Set F1 flag (b3)
+ m_ipc_ioc_status |= 0x08;
}
WRITE8_MEMBER(imds2_state::imds2_ioc_reset_f1_w)
{
- // Reset F1 flag (b3)
- m_ipc_ioc_status &= ~0x08;
+ // Reset F1 flag (b3)
+ m_ipc_ioc_status &= ~0x08;
}
READ8_MEMBER(imds2_state::imds2_ioc_status_r)
{
- return (~m_ipc_ioc_status & 0x0f) | 0xf0;
+ return (~m_ipc_ioc_status & 0x0f) | 0xf0;
}
READ8_MEMBER(imds2_state::imds2_ioc_dbbin_r)
{
- // Reset IBF flag (b1)
- m_ipc_ioc_status &= ~0x02;
- return ~m_ioc_ibf;
+ // Reset IBF flag (b1)
+ m_ipc_ioc_status &= ~0x02;
+ return ~m_ioc_ibf;
}
READ8_MEMBER(imds2_state::imds2_ipc_dbbout_r)
{
- // Reset OBF flag (b0)
- m_ipc_ioc_status &= ~0x01;
- return m_ioc_obf;
+ // Reset OBF flag (b0)
+ m_ipc_ioc_status &= ~0x01;
+ return m_ioc_obf;
}
READ8_MEMBER(imds2_state::imds2_ipc_status_r)
{
- return m_ipc_ioc_status;
+ return m_ipc_ioc_status;
}
WRITE8_MEMBER(imds2_state::imds2_ipc_dbbin_data_w)
{
- // Set IBF flag (b1)
- m_ipc_ioc_status |= 0x02;
- // Reset F1 flag (b3)
- m_ipc_ioc_status &= ~0x08;
- m_ioc_ibf = data;
+ // Set IBF flag (b1)
+ m_ipc_ioc_status |= 0x02;
+ // Reset F1 flag (b3)
+ m_ipc_ioc_status &= ~0x08;
+ m_ioc_ibf = data;
}
WRITE8_MEMBER(imds2_state::imds2_ipc_dbbin_cmd_w)
{
- // Set IBF flag (b1)
- m_ipc_ioc_status |= 0x02;
- // Set F1 flag (b3)
- m_ipc_ioc_status |= 0x08;
- m_ioc_ibf = data;
+ // Set IBF flag (b1)
+ m_ipc_ioc_status |= 0x02;
+ // Set F1 flag (b3)
+ m_ipc_ioc_status |= 0x08;
+ m_ioc_ibf = data;
}
WRITE_LINE_MEMBER(imds2_state::imds2_hrq_w)
{
- // Should be propagated to HOLD input of IOC CPU
- m_iocdma->hlda_w(state);
+ // Should be propagated to HOLD input of IOC CPU
+ m_iocdma->hlda_w(state);
}
READ8_MEMBER(imds2_state::imds2_ioc_mem_r)
{
- address_space& prog_space = m_ioccpu->space(AS_PROGRAM);
- return prog_space.read_byte(offset);
+ address_space& prog_space = m_ioccpu->space(AS_PROGRAM);
+ return prog_space.read_byte(offset);
}
WRITE8_MEMBER(imds2_state::imds2_ioc_mem_w)
{
- address_space& prog_space = m_ioccpu->space(AS_PROGRAM);
- return prog_space.write_byte(offset , data);
+ address_space& prog_space = m_ioccpu->space(AS_PROGRAM);
+ return prog_space.write_byte(offset , data);
}
I8275_DRAW_CHARACTER_MEMBER(imds2_state::crtc_display_pixels)
{
- unsigned i;
- const rgb_t *palette = m_palette->palette()->entry_list_raw();
- UINT8 chargen_byte = m_chargen[ (linecount & 7) | ((unsigned)charcode << 3) ];
- UINT16 pixels;
-
- if (lten) {
- pixels = ~0;
- } else if (vsp != 0 || (linecount & 8) != 0) {
- pixels = 0;
- } else {
- // See [2], pg 58 for the very peculiar way of generating character images
- // Here each half-pixel is translated into a full pixel
- UINT16 exp_pix_l;
- UINT16 exp_pix_r;
-
- exp_pix_l = (UINT16)chargen_byte;
- exp_pix_l = ((exp_pix_l & 0x80) << 5) |
- ((exp_pix_l & 0x40) << 4) |
- ((exp_pix_l & 0x20) << 3) |
- ((exp_pix_l & 0x10) << 2) |
- ((exp_pix_l & 0x08) << 1) |
- (exp_pix_l & 0x04);
- exp_pix_l |= (exp_pix_l << 1);
- exp_pix_r = exp_pix_l;
-
- // Layout of exp_pix_l/r:
- // Bit # : F E D C B A 9 8 7 6 5 4 3 2 1 0
- // Bit of chargen_byte: 0 0 b7 b7 b6 b6 b5 b5 b4 b4 b3 b3 b2 b2 0 0
- if ((chargen_byte & 2) == 0) {
- exp_pix_l >>= 1;
- }
- exp_pix_l &= 0x3fc0;
-
- if ((chargen_byte & 1) == 0) {
- exp_pix_r >>= 1;
- }
- exp_pix_r &= 0x003e;
-
- pixels = exp_pix_l | exp_pix_r;
- }
-
- if (rvv) {
- pixels = ~pixels;
- }
-
- for (i = 0; i < 14; i++) {
- bitmap.pix32(y, x + i) = palette[ (pixels & (1U << (13 - i))) != 0 ];
- }
+ unsigned i;
+ const rgb_t *palette = m_palette->palette()->entry_list_raw();
+ UINT8 chargen_byte = m_chargen[ (linecount & 7) | ((unsigned)charcode << 3) ];
+ UINT16 pixels;
+
+ if (lten) {
+ pixels = ~0;
+ } else if (vsp != 0 || (linecount & 8) != 0) {
+ pixels = 0;
+ } else {
+ // See [2], pg 58 for the very peculiar way of generating character images
+ // Here each half-pixel is translated into a full pixel
+ UINT16 exp_pix_l;
+ UINT16 exp_pix_r;
+
+ exp_pix_l = (UINT16)chargen_byte;
+ exp_pix_l = ((exp_pix_l & 0x80) << 5) |
+ ((exp_pix_l & 0x40) << 4) |
+ ((exp_pix_l & 0x20) << 3) |
+ ((exp_pix_l & 0x10) << 2) |
+ ((exp_pix_l & 0x08) << 1) |
+ (exp_pix_l & 0x04);
+ exp_pix_l |= (exp_pix_l << 1);
+ exp_pix_r = exp_pix_l;
+
+ // Layout of exp_pix_l/r:
+ // Bit # : F E D C B A 9 8 7 6 5 4 3 2 1 0
+ // Bit of chargen_byte: 0 0 b7 b7 b6 b6 b5 b5 b4 b4 b3 b3 b2 b2 0 0
+ if ((chargen_byte & 2) == 0) {
+ exp_pix_l >>= 1;
+ }
+ exp_pix_l &= 0x3fc0;
+
+ if ((chargen_byte & 1) == 0) {
+ exp_pix_r >>= 1;
+ }
+ exp_pix_r &= 0x003e;
+
+ pixels = exp_pix_l | exp_pix_r;
+ }
+
+ if (rvv) {
+ pixels = ~pixels;
+ }
+
+ for (i = 0; i < 14; i++) {
+ bitmap.pix32(y, x + i) = palette[ (pixels & (1U << (13 - i))) != 0 ];
+ }
}
void imds2_state::driver_start()
{
- // Allocate 64k for IPC RAM
- m_ipc_ram.resize(0x10000);
+ // Allocate 64k for IPC RAM
+ m_ipc_ram.resize(0x10000);
- memory_region *ipcrom = memregion("ipcrom");
- if (ipcrom == NULL) {
- fatalerror("Unable to find IPC ROM region\n");
- } else {
- m_ipc_rom = ipcrom->base();
- }
+ memory_region *ipcrom = memregion("ipcrom");
+ if (ipcrom == NULL) {
+ fatalerror("Unable to find IPC ROM region\n");
+ } else {
+ m_ipc_rom = ipcrom->base();
+ }
}
void imds2_state::machine_start()
{
- m_floppy0->floppy_mon_w(0);
- m_floppy0->floppy_drive_set_ready_state(1 , 0);
+ m_floppy0->floppy_mon_w(0);
+ m_floppy0->floppy_drive_set_ready_state(1 , 0);
}
void imds2_state::video_start()
{
- m_chargen = memregion("gfx1")->base();
+ m_chargen = memregion("gfx1")->base();
}
void imds2_state::machine_reset()
{
- m_iocbeep->set_frequency(IOC_BEEP_FREQ);
- m_ipc_control = 0x00;
- m_ipc_ioc_status = 0x0f;
+ m_iocbeep->set_frequency(IOC_BEEP_FREQ);
+ m_ipc_control = 0x00;
+ m_ipc_ioc_status = 0x0f;
}
bool imds2_state::imds2_in_ipc_rom(offs_t offset) const
{
- offs_t masked_offset = offset & 0xf800;
+ offs_t masked_offset = offset & 0xf800;
- // Region 0000-07ff is in ROM when START_UP/ == 0 && SEL_BOOT/ == 0
- if (masked_offset == 0x0000 && (m_ipc_control & 0x28) == 0) {
- return true;
- }
+ // Region 0000-07ff is in ROM when START_UP/ == 0 && SEL_BOOT/ == 0
+ if (masked_offset == 0x0000 && (m_ipc_control & 0x28) == 0) {
+ return true;
+ }
- // Region e800-efff is in ROM when SEL_BOOT/ == 0
- if (masked_offset == 0xe800 && (m_ipc_control & 0x08) == 0) {
- return true;
- }
+ // Region e800-efff is in ROM when SEL_BOOT/ == 0
+ if (masked_offset == 0xe800 && (m_ipc_control & 0x08) == 0) {
+ return true;
+ }
- // Region f800-ffff is always in ROM
- if (masked_offset == 0xf800) {
- return true;
- }
+ // Region f800-ffff is always in ROM
+ if (masked_offset == 0xf800) {
+ return true;
+ }
- return false;
+ return false;
}
-
+
void imds2_state::imds2_update_beeper(void)
{
- m_iocbeep->set_state(m_beeper_timer == 0 && BIT(m_miscout , 0) == 0);
+ m_iocbeep->set_state(m_beeper_timer == 0 && BIT(m_miscout , 0) == 0);
}
static INPUT_PORTS_START(imds2)
- // See [1], pg 56 for key matrix layout
- // See [1], pg 57 for keyboard layout
- PORT_START("KEY0")
- PORT_BIT(0x01 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') // OK
- PORT_BIT(0x02 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('@') PORT_CHAR('`')
- PORT_BIT(0x04 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') // OK
- PORT_BIT(0x08 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) // OK
- PORT_BIT(0x10 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
- PORT_BIT(0x20 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(':') PORT_CHAR('*') // '
- PORT_BIT(0x40 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') // .
- PORT_BIT(0x80 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?')
-
- PORT_START("KEY1")
- PORT_BIT(0x01 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') // OK
- PORT_BIT(0x02 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') // OK
- PORT_BIT(0x04 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') // OK
- PORT_BIT(0x08 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') // OK
- PORT_BIT(0x10 , IP_ACTIVE_LOW , IPT_UNUSED)
- PORT_BIT(0x20 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') // OK
- PORT_BIT(0x40 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') // OK
- PORT_BIT(0x80 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') // OK
-
- PORT_START("KEY2")
- PORT_BIT(0x01 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR('~') // OK
- PORT_BIT(0x02 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{')
- PORT_BIT(0x04 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') // OK
- PORT_BIT(0x08 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') // OK
- PORT_BIT(0x10 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') // OK
- PORT_BIT(0x20 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('=') // OK
- PORT_BIT(0x40 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') // OK
- PORT_BIT(0x80 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR('+')
-
- PORT_START("KEY3")
- PORT_BIT(0x01 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') // OK
- PORT_BIT(0x02 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') // OK
- PORT_BIT(0x04 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') // OK
- PORT_BIT(0x08 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') // OK
- PORT_BIT(0x10 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') // OK
- PORT_BIT(0x20 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') // OK
- PORT_BIT(0x40 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') // OK
- PORT_BIT(0x80 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') // OK
-
- PORT_START("KEY4")
- PORT_BIT(0x01 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') // OK
- PORT_BIT(0x02 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') // OK
- PORT_BIT(0x04 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') // OK
- PORT_BIT(0x08 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') // OK
- PORT_BIT(0x10 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') // OK
- PORT_BIT(0x20 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') // OK
- PORT_BIT(0x40 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') // OK
- PORT_BIT(0x80 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') // OK
-
- PORT_START("KEY5")
- PORT_BIT(0x01 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') // OK
- PORT_BIT(0x02 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') // OK
- PORT_BIT(0x04 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') // OK
- PORT_BIT(0x08 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') // OK
- PORT_BIT(0x10 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') // OK
- PORT_BIT(0x20 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') // OK
- PORT_BIT(0x40 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') // OK
- PORT_BIT(0x80 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') // OK
-
- PORT_START("KEY6")
- PORT_BIT(0x01 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) // BS
- PORT_BIT(0x02 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_HOME) PORT_CHAR(UCHAR_MAMEKEY(HOME)) // OK
- PORT_BIT(0x04 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|') // OK
- PORT_BIT(0x08 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) // OK
- PORT_BIT(0x10 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) // OK
- PORT_BIT(0x20 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) // OK
- PORT_BIT(0x40 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}')
- PORT_BIT(0x80 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) // OK
-
- PORT_START("KEY7")
- PORT_BIT(0x01 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC)) // OK
- PORT_BIT(0x02 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) // OK
- PORT_BIT(0x04 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('_') PORT_CHAR('^')
- PORT_BIT(0x08 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) // OK
- PORT_BIT(0x10 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_LALT) PORT_CHAR(UCHAR_MAMEKEY(LALT)) // OK
- PORT_BIT(0x20 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_CAPSLOCK) PORT_TOGGLE PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK))
- PORT_BIT(0x40 , IP_ACTIVE_LOW , IPT_UNUSED)
- PORT_BIT(0x80 , IP_ACTIVE_LOW , IPT_UNUSED)
-
- // Options on IOC: see [1], pg 40
- PORT_START("IOC_OPTS")
- PORT_DIPNAME(0x80 , 0x80 , "Keyboard present")
- PORT_DIPSETTING(0x80 , DEF_STR(Yes))
- PORT_DIPSETTING(0x00 , DEF_STR(No))
- PORT_DIPNAME(0x28 , 0x00 , "IOC mode")
- PORT_DIPSETTING(0x00 , "On line")
- PORT_DIPSETTING(0x08 , "Local")
- PORT_DIPSETTING(0x20 , "Diagnostic")
- PORT_DIPNAME(0x02 , 0x00 , "Floppy present")
- PORT_DIPSETTING(0x02 , DEF_STR(Yes))
- PORT_DIPSETTING(0x00 , DEF_STR(No))
- PORT_DIPNAME(0x01 , 0x01 , "CRT frame frequency")
- PORT_DIPSETTING(0x01 , "50 Hz")
- PORT_DIPSETTING(0x00 , "60 Hz")
+ // See [1], pg 56 for key matrix layout
+ // See [1], pg 57 for keyboard layout
+ PORT_START("KEY0")
+ PORT_BIT(0x01 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') // OK
+ PORT_BIT(0x02 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('@') PORT_CHAR('`')
+ PORT_BIT(0x04 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') // OK
+ PORT_BIT(0x08 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) // OK
+ PORT_BIT(0x10 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
+ PORT_BIT(0x20 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(':') PORT_CHAR('*') // '
+ PORT_BIT(0x40 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') // .
+ PORT_BIT(0x80 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?')
+
+ PORT_START("KEY1")
+ PORT_BIT(0x01 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') // OK
+ PORT_BIT(0x02 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') // OK
+ PORT_BIT(0x04 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') // OK
+ PORT_BIT(0x08 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') // OK
+ PORT_BIT(0x10 , IP_ACTIVE_LOW , IPT_UNUSED)
+ PORT_BIT(0x20 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') // OK
+ PORT_BIT(0x40 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') // OK
+ PORT_BIT(0x80 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') // OK
+
+ PORT_START("KEY2")
+ PORT_BIT(0x01 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR('~') // OK
+ PORT_BIT(0x02 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{')
+ PORT_BIT(0x04 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') // OK
+ PORT_BIT(0x08 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') // OK
+ PORT_BIT(0x10 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') // OK
+ PORT_BIT(0x20 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('=') // OK
+ PORT_BIT(0x40 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') // OK
+ PORT_BIT(0x80 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR('+')
+
+ PORT_START("KEY3")
+ PORT_BIT(0x01 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') // OK
+ PORT_BIT(0x02 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') // OK
+ PORT_BIT(0x04 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') // OK
+ PORT_BIT(0x08 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') // OK
+ PORT_BIT(0x10 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') // OK
+ PORT_BIT(0x20 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') // OK
+ PORT_BIT(0x40 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') // OK
+ PORT_BIT(0x80 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') // OK
+
+ PORT_START("KEY4")
+ PORT_BIT(0x01 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') // OK
+ PORT_BIT(0x02 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') // OK
+ PORT_BIT(0x04 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') // OK
+ PORT_BIT(0x08 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') // OK
+ PORT_BIT(0x10 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') // OK
+ PORT_BIT(0x20 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') // OK
+ PORT_BIT(0x40 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') // OK
+ PORT_BIT(0x80 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') // OK
+
+ PORT_START("KEY5")
+ PORT_BIT(0x01 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') // OK
+ PORT_BIT(0x02 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') // OK
+ PORT_BIT(0x04 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') // OK
+ PORT_BIT(0x08 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') // OK
+ PORT_BIT(0x10 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') // OK
+ PORT_BIT(0x20 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') // OK
+ PORT_BIT(0x40 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') // OK
+ PORT_BIT(0x80 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') // OK
+
+ PORT_START("KEY6")
+ PORT_BIT(0x01 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) // BS
+ PORT_BIT(0x02 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_HOME) PORT_CHAR(UCHAR_MAMEKEY(HOME)) // OK
+ PORT_BIT(0x04 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|') // OK
+ PORT_BIT(0x08 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) // OK
+ PORT_BIT(0x10 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) // OK
+ PORT_BIT(0x20 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) // OK
+ PORT_BIT(0x40 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}')
+ PORT_BIT(0x80 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) // OK
+
+ PORT_START("KEY7")
+ PORT_BIT(0x01 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC)) // OK
+ PORT_BIT(0x02 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) // OK
+ PORT_BIT(0x04 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('_') PORT_CHAR('^')
+ PORT_BIT(0x08 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) // OK
+ PORT_BIT(0x10 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_LALT) PORT_CHAR(UCHAR_MAMEKEY(LALT)) // OK
+ PORT_BIT(0x20 , IP_ACTIVE_LOW , IPT_KEYBOARD) PORT_CODE(KEYCODE_CAPSLOCK) PORT_TOGGLE PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK))
+ PORT_BIT(0x40 , IP_ACTIVE_LOW , IPT_UNUSED)
+ PORT_BIT(0x80 , IP_ACTIVE_LOW , IPT_UNUSED)
+
+ // Options on IOC: see [1], pg 40
+ PORT_START("IOC_OPTS")
+ PORT_DIPNAME(0x80 , 0x80 , "Keyboard present")
+ PORT_DIPSETTING(0x80 , DEF_STR(Yes))
+ PORT_DIPSETTING(0x00 , DEF_STR(No))
+ PORT_DIPNAME(0x28 , 0x00 , "IOC mode")
+ PORT_DIPSETTING(0x00 , "On line")
+ PORT_DIPSETTING(0x08 , "Local")
+ PORT_DIPSETTING(0x20 , "Diagnostic")
+ PORT_DIPNAME(0x02 , 0x00 , "Floppy present")
+ PORT_DIPSETTING(0x02 , DEF_STR(Yes))
+ PORT_DIPSETTING(0x00 , DEF_STR(No))
+ PORT_DIPNAME(0x01 , 0x01 , "CRT frame frequency")
+ PORT_DIPSETTING(0x01 , "50 Hz")
+ PORT_DIPSETTING(0x00 , "60 Hz")
INPUT_PORTS_END
static GFXLAYOUT_RAW(imds2_charlayout , 8 , 8 , 8 , 64)
static GFXDECODE_START(imds2)
- GFXDECODE_ENTRY("gfx1" , 0x0000 , imds2_charlayout , 0 , 1)
+ GFXDECODE_ENTRY("gfx1" , 0x0000 , imds2_charlayout , 0 , 1)
GFXDECODE_END
static LEGACY_FLOPPY_OPTIONS_START(imds2)
@@ -633,106 +633,106 @@ LEGACY_FLOPPY_OPTIONS_END
static const floppy_interface imds2_floppy_interface =
{
- FLOPPY_STANDARD_8_SSSD,
- LEGACY_FLOPPY_OPTIONS_NAME(imds2),
- "floppy_8"
+ FLOPPY_STANDARD_8_SSSD,
+ LEGACY_FLOPPY_OPTIONS_NAME(imds2),
+ "floppy_8"
};
static MACHINE_CONFIG_START(imds2 , imds2_state)
- MCFG_CPU_ADD("ipccpu" , I8085A , IPC_XTAL_Y2 / 2) // 4 MHz
- MCFG_CPU_PROGRAM_MAP(ipc_mem_map)
- MCFG_CPU_IO_MAP(ipc_io_map)
- MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("ipcsyspic" , pic8259_device , inta_cb)
- MCFG_QUANTUM_TIME(attotime::from_hz(100))
-
- MCFG_PIC8259_ADD("ipcsyspic" , WRITELINE(imds2_state , imds2_ipc_intr) , VCC , NULL)
- MCFG_PIC8259_ADD("ipclocpic" , DEVWRITELINE("ipcsyspic" , pic8259_device , ir7_w) , VCC , NULL)
-
- MCFG_CPU_ADD("ioccpu" , I8080A , IOC_XTAL_Y2 / 9) // 2.448 MHz
- MCFG_CPU_PROGRAM_MAP(ioc_mem_map)
- MCFG_CPU_IO_MAP(ioc_io_map)
- MCFG_QUANTUM_TIME(attotime::from_hz(100))
-
- // The IOC CRT hw is a bit complex, as the character clock (CCLK) to i8275
- // is varied according to the part of the video frame being scanned and according to
- // the 50/60 Hz option jumper (W8).
- // The basic clock (BCLK) runs at 22.032 MHz.
- // CCLK = BCLK / 14 when in the active region of video
- // CCLK = BCLK / 12 when in horizontal retrace (HRTC=1)
- // CCLK = BCLK / 10 when in horizontal retrace of "short scan lines" (50 Hz only)
- //
- // ***** 50 Hz timings *****
- // 80 chars/row, 26 chars/h. retrace, 11 scan lines/row, 25 active rows, 3 vertical retrace rows
- // Scan line: 80 chars * 14 BCLK + 26 chars * 12 BCLK = 1432 BCLK (64.996 usec)
- // Scan row: 11 * scan lines = 15752 BCLK (714.960 usec)
- // "Short" scan line: 80 chars * 14 BCLK + 26 chars * 10 BCLK = 1380 BCLK (62.636 usec)
- // Frame: 28 scan rows (8 scan lines of 27th row are short): 27 * scan row + 3 * scan line + 8 * short scan line: 440640 BCLK (20 msec)
- //
- // ***** 60 Hz timings *****
- // 80 chars/row, 20 chars/h. retrace, 10 scan lines/row, 25 active rows, 2 vertical retrace rows
- // Scan line: 80 chars * 14 BCLK + 20 chars * 12 BCLK = 1360 BCLK (61.728 usec)
- // Scan row: 10 * scan lines = 13600 BCLK (617.284 usec)
- // Frame: 27 scan rows : 367200 BCLK (16.667 msec)
- //
- // Clock here is semi-bogus: it gives the correct frame frequency at 50 Hz (with the incorrect
- // assumption that CCLK is fixed at BCLK / 14)
- MCFG_DEVICE_ADD("ioccrtc" , I8275 , 22853600 / 14)
- MCFG_I8275_CHARACTER_WIDTH(14)
- MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(imds2_state , crtc_display_pixels)
- MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("iocdma" , i8257_device , dreq2_w))
- MCFG_I8275_IRQ_CALLBACK(INPUTLINE("ioccpu" , I8085_INTR_LINE))
-
- MCFG_SCREEN_ADD("screen" , RASTER)
- MCFG_SCREEN_UPDATE_DEVICE("ioccrtc" , i8275_device , screen_update)
- MCFG_SCREEN_REFRESH_RATE(50)
- MCFG_GFXDECODE_ADD("gfxdecode" , "palette" , imds2)
- MCFG_PALETTE_ADD_BLACK_AND_WHITE("palette")
-
- MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("iocbeep" , BEEP , 0)
- MCFG_SOUND_ROUTE(ALL_OUTPUTS , "mono" , 1.00)
-
- MCFG_DEVICE_ADD("iocdma" , I8257 , IOC_XTAL_Y2 / 9)
- MCFG_I8257_OUT_HRQ_CB(WRITELINE(imds2_state, imds2_hrq_w))
- MCFG_I8257_IN_MEMR_CB(READ8(imds2_state , imds2_ioc_mem_r))
- MCFG_I8257_OUT_MEMW_CB(WRITE8(imds2_state , imds2_ioc_mem_w))
- MCFG_I8257_IN_IOR_1_CB(DEVREAD8("iocfdc" , i8271_device , dack_r))
- MCFG_I8257_OUT_IOW_1_CB(DEVWRITE8("iocfdc" , i8271_device , dack_w))
- MCFG_I8257_OUT_IOW_2_CB(DEVWRITE8("ioccrtc" , i8275_device , dack_w))
-
- MCFG_DEVICE_ADD("ioctimer" , PIT8253 , 0)
- MCFG_PIT8253_CLK0(IOC_XTAL_Y1 / 4)
- MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("ioctimer" , pit8253_device , write_clk2));
- MCFG_PIT8253_OUT2_HANDLER(WRITELINE(imds2_state , imds2_beep_timer_w));
-
- MCFG_DEVICE_ADD("iocfdc" , I8271 , IOC_XTAL_Y1 / 2)
- MCFG_I8271_DRQ_CALLBACK(DEVWRITELINE("iocdma" , i8257_device , dreq1_w))
- MCFG_I8271_FLOPPIES(FLOPPY_0 , FLOPPY_1)
-
- MCFG_LEGACY_FLOPPY_DRIVE_ADD(FLOPPY_0, imds2_floppy_interface)
-
- MCFG_CPU_ADD("kbcpu", I8741, XTAL_3_579545MHz) /* 3.579545 MHz */
- MCFG_CPU_IO_MAP(kb_io_map)
- MCFG_QUANTUM_TIME(attotime::from_hz(100))
+ MCFG_CPU_ADD("ipccpu" , I8085A , IPC_XTAL_Y2 / 2) // 4 MHz
+ MCFG_CPU_PROGRAM_MAP(ipc_mem_map)
+ MCFG_CPU_IO_MAP(ipc_io_map)
+ MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("ipcsyspic" , pic8259_device , inta_cb)
+ MCFG_QUANTUM_TIME(attotime::from_hz(100))
+
+ MCFG_PIC8259_ADD("ipcsyspic" , WRITELINE(imds2_state , imds2_ipc_intr) , VCC , NULL)
+ MCFG_PIC8259_ADD("ipclocpic" , DEVWRITELINE("ipcsyspic" , pic8259_device , ir7_w) , VCC , NULL)
+
+ MCFG_CPU_ADD("ioccpu" , I8080A , IOC_XTAL_Y2 / 9) // 2.448 MHz
+ MCFG_CPU_PROGRAM_MAP(ioc_mem_map)
+ MCFG_CPU_IO_MAP(ioc_io_map)
+ MCFG_QUANTUM_TIME(attotime::from_hz(100))
+
+ // The IOC CRT hw is a bit complex, as the character clock (CCLK) to i8275
+ // is varied according to the part of the video frame being scanned and according to
+ // the 50/60 Hz option jumper (W8).
+ // The basic clock (BCLK) runs at 22.032 MHz.
+ // CCLK = BCLK / 14 when in the active region of video
+ // CCLK = BCLK / 12 when in horizontal retrace (HRTC=1)
+ // CCLK = BCLK / 10 when in horizontal retrace of "short scan lines" (50 Hz only)
+ //
+ // ***** 50 Hz timings *****
+ // 80 chars/row, 26 chars/h. retrace, 11 scan lines/row, 25 active rows, 3 vertical retrace rows
+ // Scan line: 80 chars * 14 BCLK + 26 chars * 12 BCLK = 1432 BCLK (64.996 usec)
+ // Scan row: 11 * scan lines = 15752 BCLK (714.960 usec)
+ // "Short" scan line: 80 chars * 14 BCLK + 26 chars * 10 BCLK = 1380 BCLK (62.636 usec)
+ // Frame: 28 scan rows (8 scan lines of 27th row are short): 27 * scan row + 3 * scan line + 8 * short scan line: 440640 BCLK (20 msec)
+ //
+ // ***** 60 Hz timings *****
+ // 80 chars/row, 20 chars/h. retrace, 10 scan lines/row, 25 active rows, 2 vertical retrace rows
+ // Scan line: 80 chars * 14 BCLK + 20 chars * 12 BCLK = 1360 BCLK (61.728 usec)
+ // Scan row: 10 * scan lines = 13600 BCLK (617.284 usec)
+ // Frame: 27 scan rows : 367200 BCLK (16.667 msec)
+ //
+ // Clock here is semi-bogus: it gives the correct frame frequency at 50 Hz (with the incorrect
+ // assumption that CCLK is fixed at BCLK / 14)
+ MCFG_DEVICE_ADD("ioccrtc" , I8275 , 22853600 / 14)
+ MCFG_I8275_CHARACTER_WIDTH(14)
+ MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(imds2_state , crtc_display_pixels)
+ MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("iocdma" , i8257_device , dreq2_w))
+ MCFG_I8275_IRQ_CALLBACK(INPUTLINE("ioccpu" , I8085_INTR_LINE))
+
+ MCFG_SCREEN_ADD("screen" , RASTER)
+ MCFG_SCREEN_UPDATE_DEVICE("ioccrtc" , i8275_device , screen_update)
+ MCFG_SCREEN_REFRESH_RATE(50)
+ MCFG_GFXDECODE_ADD("gfxdecode" , "palette" , imds2)
+ MCFG_PALETTE_ADD_BLACK_AND_WHITE("palette")
+
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+ MCFG_SOUND_ADD("iocbeep" , BEEP , 0)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS , "mono" , 1.00)
+
+ MCFG_DEVICE_ADD("iocdma" , I8257 , IOC_XTAL_Y2 / 9)
+ MCFG_I8257_OUT_HRQ_CB(WRITELINE(imds2_state, imds2_hrq_w))
+ MCFG_I8257_IN_MEMR_CB(READ8(imds2_state , imds2_ioc_mem_r))
+ MCFG_I8257_OUT_MEMW_CB(WRITE8(imds2_state , imds2_ioc_mem_w))
+ MCFG_I8257_IN_IOR_1_CB(DEVREAD8("iocfdc" , i8271_device , dack_r))
+ MCFG_I8257_OUT_IOW_1_CB(DEVWRITE8("iocfdc" , i8271_device , dack_w))
+ MCFG_I8257_OUT_IOW_2_CB(DEVWRITE8("ioccrtc" , i8275_device , dack_w))
+
+ MCFG_DEVICE_ADD("ioctimer" , PIT8253 , 0)
+ MCFG_PIT8253_CLK0(IOC_XTAL_Y1 / 4)
+ MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("ioctimer" , pit8253_device , write_clk2));
+ MCFG_PIT8253_OUT2_HANDLER(WRITELINE(imds2_state , imds2_beep_timer_w));
+
+ MCFG_DEVICE_ADD("iocfdc" , I8271 , IOC_XTAL_Y1 / 2)
+ MCFG_I8271_DRQ_CALLBACK(DEVWRITELINE("iocdma" , i8257_device , dreq1_w))
+ MCFG_I8271_FLOPPIES(FLOPPY_0 , FLOPPY_1)
+
+ MCFG_LEGACY_FLOPPY_DRIVE_ADD(FLOPPY_0, imds2_floppy_interface)
+
+ MCFG_CPU_ADD("kbcpu", I8741, XTAL_3_579545MHz) /* 3.579545 MHz */
+ MCFG_CPU_IO_MAP(kb_io_map)
+ MCFG_QUANTUM_TIME(attotime::from_hz(100))
MACHINE_CONFIG_END
ROM_START(imds2)
- // ROM definition of IPC cpu (8085A)
- ROM_REGION(0x1000 , "ipcrom" , 0)
- ROM_LOAD("ipc_a82.bin" , 0x0000 , 0x1000 , CRC(0889394f) SHA1(b7525baf1884a7d67402dea4b5566016a9861ef2))
-
- // ROM definition of IOC cpu (8080A)
- ROM_REGION(0x2000 , "ioccpu" , 0)
- ROM_LOAD("ioc_a50.bin" , 0x0000 , 0x0800 , CRC(d9f926a1) SHA1(bd9d0f7458acc2806120a6dbaab9c48be315b060))
- ROM_LOAD("ioc_a51.bin" , 0x0800 , 0x0800 , CRC(6aa2f86c) SHA1(d3a5314d86e3366545b4c97b29e323dfab383d5f))
- ROM_LOAD("ioc_a52.bin" , 0x1000 , 0x0800 , CRC(b88a38d5) SHA1(934716a1daec852f4d1f846510f42408df0c9584))
- ROM_LOAD("ioc_a53.bin" , 0x1800 , 0x0800 , CRC(c8df4bb9) SHA1(2dfb921e94ae7033a7182457b2f00657674d1b77))
- // ROM definition of keyboard controller (8741)
- ROM_REGION(0x400 , "kbcpu" , 0)
- ROM_LOAD("kbd511.bin" , 0 , 0x400 , CRC(ba7c4303) SHA1(19899af732d0ae1247bfc79979b1ee5f339ee5cf))
- // ROM definition of character generator (2708, A19 on IOC)
- ROM_REGION(0x400 , "gfx1" , 0)
- ROM_LOAD ("ioc_a19.bin" , 0x0000 , 0x0400 , CRC(47487d0f) SHA1(0ed98f9f06622949ee3cc2ffc572fb9702db0f81))
+ // ROM definition of IPC cpu (8085A)
+ ROM_REGION(0x1000 , "ipcrom" , 0)
+ ROM_LOAD("ipc_a82.bin" , 0x0000 , 0x1000 , CRC(0889394f) SHA1(b7525baf1884a7d67402dea4b5566016a9861ef2))
+
+ // ROM definition of IOC cpu (8080A)
+ ROM_REGION(0x2000 , "ioccpu" , 0)
+ ROM_LOAD("ioc_a50.bin" , 0x0000 , 0x0800 , CRC(d9f926a1) SHA1(bd9d0f7458acc2806120a6dbaab9c48be315b060))
+ ROM_LOAD("ioc_a51.bin" , 0x0800 , 0x0800 , CRC(6aa2f86c) SHA1(d3a5314d86e3366545b4c97b29e323dfab383d5f))
+ ROM_LOAD("ioc_a52.bin" , 0x1000 , 0x0800 , CRC(b88a38d5) SHA1(934716a1daec852f4d1f846510f42408df0c9584))
+ ROM_LOAD("ioc_a53.bin" , 0x1800 , 0x0800 , CRC(c8df4bb9) SHA1(2dfb921e94ae7033a7182457b2f00657674d1b77))
+ // ROM definition of keyboard controller (8741)
+ ROM_REGION(0x400 , "kbcpu" , 0)
+ ROM_LOAD("kbd511.bin" , 0 , 0x400 , CRC(ba7c4303) SHA1(19899af732d0ae1247bfc79979b1ee5f339ee5cf))
+ // ROM definition of character generator (2708, A19 on IOC)
+ ROM_REGION(0x400 , "gfx1" , 0)
+ ROM_LOAD ("ioc_a19.bin" , 0x0000 , 0x0400 , CRC(47487d0f) SHA1(0ed98f9f06622949ee3cc2ffc572fb9702db0f81))
ROM_END
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */
diff --git a/src/mess/drivers/mbdtower.c b/src/mess/drivers/mbdtower.c
index 412cbf3a6a7..e9ff39fd798 100644
--- a/src/mess/drivers/mbdtower.c
+++ b/src/mess/drivers/mbdtower.c
@@ -14,7 +14,7 @@
The emulated part is the centerpiece, a black tower with a rotating card
panel and LED digits for displaying health, amount of gold, etc. As far
as MESS is concerned, the game works fine.
-
+
To start up the game, first press [MOVE], the machine now does a self-test.
Then select level and number of players and the game will start. Read the
official manual on how to play the game.
@@ -64,7 +64,7 @@ void mbdtower_state::mbdtower_display()
m_display_maxx = 7;
m_display_maxy = 3;
m_display_segmask[1] = m_display_segmask[2] = 0x7f;
-
+
// update current state
if (~m_r & 0x10)
{
@@ -89,7 +89,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(mbdtower_state::motor_sim_tick)
if (m_motor_on)
{
m_motor_pos = (m_motor_pos - 1) & 0x7f;
-
+
// give it some time to spin out when it's turned off
if (m_r & 0x200)
m_motor_decay += (m_motor_decay < 4);
@@ -105,23 +105,23 @@ TIMER_DEVICE_CALLBACK_MEMBER(mbdtower_state::motor_sim_tick)
m_sensor_blind = false;
else
m_sensor_blind = true;
-
+
// on change, output info
if (m_motor_pos != m_motor_pos_prev)
output_set_value("motor_pos", 100 * (m_motor_pos / (float)0x80));
-
+
/* 3 display cards per hole, like this:
-
+
(0) <---- display increments this way <---- (7)
- CURSED VICTORY WIZARD DRAGON GOLD KEY SCOUT WARRIOR (void)
- LOST WARRIORS BAZAAR CLOSED SWORD SILVER KEY HEALER FOOD (void)
- PLAGUE BRIGANDS KEY MISSING PEGASUS BRASS KEY GOLD BEAST (void)
+ CURSED VICTORY WIZARD DRAGON GOLD KEY SCOUT WARRIOR (void)
+ LOST WARRIORS BAZAAR CLOSED SWORD SILVER KEY HEALER FOOD (void)
+ PLAGUE BRIGANDS KEY MISSING PEGASUS BRASS KEY GOLD BEAST (void)
*/
int card_pos = m_motor_pos >> 4 & 7;
if (card_pos != (m_motor_pos_prev >> 4 & 7))
output_set_value("card_pos", card_pos);
-
+
m_motor_pos_prev = m_motor_pos;
}
@@ -137,7 +137,7 @@ WRITE16_MEMBER(mbdtower_state::write_r)
{
// R0-R2: input mux
m_inp_mux = data & 7;
-
+
// R9: motor on
if ((m_r ^ data) & 0x200)
output_set_value("motor_on", data >> 9 & 1);
@@ -150,7 +150,7 @@ WRITE16_MEMBER(mbdtower_state::write_r)
// R8: rotation sensor led
m_r = data;
mbdtower_display();
-
+
// R10: speaker out
m_speaker->level_w(~data >> 4 & data >> 10 & 1);
}
@@ -182,14 +182,14 @@ READ8_MEMBER(mbdtower_state::read_k)
(green) (l.blue) (red)
[YES/ [REPEAT] [NO/
BUY] END]
-
+
(yellow) (blue) (white)
[HAGGLE] [BAZAAR] [CLEAR]
-
+
(blue) (blue) (blue)
[TOMB/ [MOVE] [SANCTUARY/
RUIN] CITADEL]
-
+
(orange) (blue) (d.yellow)
[DARK [FRONTIER] [INVENTORY]
TOWER]
@@ -233,7 +233,7 @@ void mbdtower_state::machine_start()
m_motor_decay = 0;
m_motor_on = false;
m_sensor_blind = false;
-
+
save_item(NAME(m_motor_pos));
/* save_item(NAME(m_motor_pos_prev)); */ // don't save!
save_item(NAME(m_motor_decay));
diff --git a/src/mess/drivers/snes.c b/src/mess/drivers/snes.c
index aff5e20e5f0..1703d126789 100644
--- a/src/mess/drivers/snes.c
+++ b/src/mess/drivers/snes.c
@@ -1005,9 +1005,9 @@ WRITE8_MEMBER( snes_console_state::pfest94_lo_w )
*************************************/
static ADDRESS_MAP_START( snes_map, AS_PROGRAM, 8, snes_console_state )
-// AM_RANGE(0x000000, 0x7dffff) AM_READWRITE(snes20_lo_r, snes20_lo_w)
+// AM_RANGE(0x000000, 0x7dffff) AM_READWRITE(snes20_lo_r, snes20_lo_w)
AM_RANGE(0x7e0000, 0x7fffff) AM_RAM /* 8KB Low RAM, 24KB High RAM, 96KB Expanded RAM */
-// AM_RANGE(0x800000, 0xffffff) AM_READWRITE(snes20_hi_r, snes20_hi_w)
+// AM_RANGE(0x800000, 0xffffff) AM_READWRITE(snes20_hi_r, snes20_hi_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( spc_map, AS_PROGRAM, 8, snes_console_state )
@@ -1196,7 +1196,7 @@ void snes_console_state::machine_start()
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snes20_lo_r),this), write8_delegate(FUNC(snes_console_state::snes20_lo_w),this));
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snes20_hi_r),this), write8_delegate(FUNC(snes_console_state::snes20_hi_w),this));
m_maincpu->set_5a22_map();
-
+
m_type = m_cartslot->get_type();
switch (m_type)
diff --git a/src/mess/drivers/ticalc1x.c b/src/mess/drivers/ticalc1x.c
index 37d90600162..eb7ee44940e 100644
--- a/src/mess/drivers/ticalc1x.c
+++ b/src/mess/drivers/ticalc1x.c
@@ -59,8 +59,8 @@ public:
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns
-
- UINT32 m_display_state[0x20]; // display matrix rows data
+
+ UINT32 m_display_state[0x20]; // display matrix rows data
UINT16 m_display_segmask[0x20]; // if not 0, display matrix row is a digit, mask indicates connected segments
UINT32 m_display_cache[0x20]; // (internal use)
UINT8 m_display_decay[0x20][0x20]; // (internal use)
@@ -68,7 +68,7 @@ public:
TIMER_DEVICE_CALLBACK_MEMBER(display_decay_tick);
void display_update();
void display_matrix_seg(int maxx, int maxy, UINT32 setx, UINT32 sety, UINT16 segmask);
-
+
// calculator-specific handlers
void tisr16_display();
DECLARE_WRITE16_MEMBER(tisr16_write_o);
@@ -105,7 +105,7 @@ void ticalc1x_state::machine_start()
memset(m_display_cache, ~0, sizeof(m_display_cache));
memset(m_display_decay, 0, sizeof(m_display_decay));
memset(m_display_segmask, ~0, sizeof(m_display_segmask)); // !
-
+
m_o = 0;
m_r = 0;
m_inp_mux = 0;
@@ -193,7 +193,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(ticalc1x_state::display_decay_tick)
for (int x = 0; x < m_display_maxx; x++)
if (m_display_decay[y][x] != 0)
m_display_decay[y][x]--;
-
+
display_update();
}
@@ -209,7 +209,7 @@ void ticalc1x_state::display_matrix_seg(int maxx, int maxy, UINT32 setx, UINT32
m_display_segmask[y] &= segmask;
m_display_state[y] = (sety >> y & 1) ? (setx & colmask) : 0;
}
-
+
display_update();
}
@@ -482,11 +482,11 @@ WRITE16_MEMBER(ticalc1x_state::wizatron_write_r)
// \./ GAB
// --- F
// /.\ EDC
-
+
// 3rd digit only has A and G for =, though some newer hardware revisions
// (goes for both wizatron and lilprof) use a custom equals-sign digit here
m_display_segmask[3] = 0x41;
-
+
// R0-R8: select digit (right-to-left)
display_matrix_seg(7, 9, m_o, data, 0x7f);
}
@@ -557,7 +557,7 @@ MACHINE_CONFIG_END
TI Little Professor (1976 version)
* TMS0970 MCU labeled TMS0975NL ZA0356, GP0975CS. die labeled 0970D-75C
-
+
The hardware is nearly identical to Wiz-A-Tron (or vice versa, since this
one is older).
@@ -631,7 +631,7 @@ WRITE16_MEMBER(ticalc1x_state::lilprof78_write_r)
// 3rd digit A/G(equals sign) is from O7
m_display_state[3] = (m_o & 0x80) ? 0x41 : 0;
-
+
// 6th digit is a custom 7seg for math symbols (see wizatron_write_r)
m_display_state[6] = BITSWAP8(m_display_state[6],7,6,1,4,2,3,5,0);
diff --git a/src/mess/drivers/tispeak.c b/src/mess/drivers/tispeak.c
index cc2b432106f..cdacaf54b9b 100644
--- a/src/mess/drivers/tispeak.c
+++ b/src/mess/drivers/tispeak.c
@@ -326,8 +326,8 @@ public:
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns
-
- UINT32 m_display_state[0x20]; // display matrix rows data
+
+ UINT32 m_display_state[0x20]; // display matrix rows data
UINT16 m_display_segmask[0x20]; // if not 0, display matrix row is a digit, mask indicates connected segments
UINT32 m_display_cache[0x20]; // (internal use)
UINT8 m_display_decay[0x20][0x20]; // (internal use)
@@ -454,7 +454,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(tispeak_state::display_decay_tick)
for (int x = 0; x < m_display_maxx; x++)
if (m_display_decay[y][x] != 0)
m_display_decay[y][x]--;
-
+
display_update();
}
@@ -470,7 +470,7 @@ void tispeak_state::display_matrix_seg(int maxx, int maxy, UINT32 setx, UINT32 s
m_display_segmask[y] &= segmask;
m_display_state[y] = (sety >> y & 1) ? (setx & colmask) : 0;
}
-
+
display_update();
}
@@ -501,7 +501,7 @@ WRITE16_MEMBER(tispeak_state::snspell_write_r)
{
// R15: filament on
m_filament_on = data & 0x8000;
-
+
// R13: power-off request, on falling edge
if ((m_r >> 13 & 1) && !(data >> 13 & 1))
power_off();