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-rw-r--r--src/emu/bus/cbmiec/c1541.h4
-rw-r--r--src/emu/bus/cbmiec/c1571.h4
-rw-r--r--src/emu/bus/cbmiec/c1581.h2
-rw-r--r--src/emu/bus/cbmiec/interpod.h2
-rw-r--r--src/emu/bus/cgenie/expansion/expansion.h50
-rw-r--r--src/emu/bus/cgenie/expansion/floppy.c2
-rw-r--r--src/emu/bus/cgenie/parallel/parallel.h20
-rw-r--r--src/emu/bus/cpc/brunword4.c13
-rw-r--r--src/emu/bus/cpc/brunword4.h7
-rw-r--r--src/emu/bus/gameboy/mbc.c43
-rw-r--r--src/emu/bus/ieee488/c2040.h2
-rw-r--r--src/emu/bus/ieee488/c8050.h2
-rw-r--r--src/emu/bus/ieee488/c8280.h2
-rw-r--r--src/emu/bus/ieee488/d9060.h2
-rw-r--r--src/emu/bus/megadrive/jcart.c2
-rw-r--r--src/emu/bus/megadrive/md_carts.c2
-rw-r--r--src/emu/bus/megadrive/rom.c4
-rw-r--r--src/emu/bus/nasbus/nasbus.h6
-rw-r--r--src/emu/bus/nubus/nubus_image.c4
-rw-r--r--src/emu/bus/plus4/c1551.h2
-rw-r--r--src/emu/clifront.c44
-rw-r--r--src/emu/cpu/avr8/avr8.c4
-rw-r--r--src/emu/cpu/e0c6200/e0c6200.c20
-rw-r--r--src/emu/cpu/e0c6200/e0c6200.h4
-rw-r--r--src/emu/cpu/e0c6200/e0c6200d.c18
-rw-r--r--src/emu/cpu/e0c6200/e0c6200op.inc4
-rw-r--r--src/emu/cpu/e0c6200/e0c6s46.c102
-rw-r--r--src/emu/cpu/e0c6200/e0c6s46.h6
-rw-r--r--src/emu/cpu/melps4/m58846.c4
-rw-r--r--src/emu/cpu/melps4/melps4.c10
-rw-r--r--src/emu/cpu/melps4/melps4.h8
-rw-r--r--src/emu/cpu/melps4/melps4d.c6
-rw-r--r--src/emu/cpu/melps4/melps4op.inc4
-rw-r--r--src/emu/cpu/mips/mips3drc.c2
-rw-r--r--src/emu/cpu/tlcs90/tlcs90.c4
-rw-r--r--src/emu/cpu/tms34010/tms34010.c2
-rw-r--r--src/emu/machine/ds1315.c36
-rw-r--r--src/emu/machine/s2636.c2
-rw-r--r--src/emu/machine/s2636.h2
-rw-r--r--src/emu/machine/wd2010.c160
-rw-r--r--src/emu/sound/fm.c2
-rw-r--r--src/emu/sound/s14001a.c4
-rw-r--r--src/emu/video/315_5124.c2
-rw-r--r--src/emu/video/clgd542x.c10
-rw-r--r--src/emu/video/clgd542x.h4
45 files changed, 313 insertions, 326 deletions
diff --git a/src/emu/bus/cbmiec/c1541.h b/src/emu/bus/cbmiec/c1541.h
index ffa48cfe271..7195b93293e 100644
--- a/src/emu/bus/cbmiec/c1541.h
+++ b/src/emu/bus/cbmiec/c1541.h
@@ -37,8 +37,8 @@
// ======================> c1541_base_t
class c1541_base_t : public device_t,
- public device_cbm_iec_interface,
- public device_c64_floppy_parallel_interface
+ public device_cbm_iec_interface,
+ public device_c64_floppy_parallel_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/cbmiec/c1571.h b/src/emu/bus/cbmiec/c1571.h
index d58faaa0922..6a938b73291 100644
--- a/src/emu/bus/cbmiec/c1571.h
+++ b/src/emu/bus/cbmiec/c1571.h
@@ -39,8 +39,8 @@
// ======================> c1571_t
class c1571_t : public device_t,
- public device_cbm_iec_interface,
- public device_c64_floppy_parallel_interface
+ public device_cbm_iec_interface,
+ public device_c64_floppy_parallel_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/cbmiec/c1581.h b/src/emu/bus/cbmiec/c1581.h
index fd60cdf2266..4a2ac6a28a5 100644
--- a/src/emu/bus/cbmiec/c1581.h
+++ b/src/emu/bus/cbmiec/c1581.h
@@ -35,7 +35,7 @@
// ======================> c1581_t
class c1581_t : public device_t,
- public device_cbm_iec_interface
+ public device_cbm_iec_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/cbmiec/interpod.h b/src/emu/bus/cbmiec/interpod.h
index 36c7852defb..fbbe194cca6 100644
--- a/src/emu/bus/cbmiec/interpod.h
+++ b/src/emu/bus/cbmiec/interpod.h
@@ -45,7 +45,7 @@
// ======================> interpod_device
class interpod_device : public device_t,
- public device_cbm_iec_interface
+ public device_cbm_iec_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/cgenie/expansion/expansion.h b/src/emu/bus/cgenie/expansion/expansion.h
index 79cbc1430b5..311da3afa6d 100644
--- a/src/emu/bus/cgenie/expansion/expansion.h
+++ b/src/emu/bus/cgenie/expansion/expansion.h
@@ -6,31 +6,31 @@
50-pin slot
- 1 GND 26 /MREQ
- 2 A8 27 /WR
- 3 A7 28 /C4
- 4 A6 29 (not used)
- 5 A9 30 /C1
- 6 A5 31 BD3
- 7 A4 32 /C3
- 8 A3 33 (not used)
- 9 A10 34 /C2
- 10 A2 35 DB6
- 11 A11 36 /RD
- 12 A1 37 BD4
- 13 A0 38 (not used)
- 14 A12 39 BD7
- 15 A14 40 (not used)
- 16 A13 41 BD5
- 17 /RFSH 42 (not useD)
- 18 A15 43 BD0
- 19 /INT 44 (not used)
- 20 /BUSRQ 45 BD2
- 21 /NMI 46 /RESET
- 22 /WAIT 47 /M1
- 23 /HALT 48 /IORQ
- 24 /BUSAK 49 BD1
- 25 /ROMDIS 50 +5V
+ 1 GND 26 /MREQ
+ 2 A8 27 /WR
+ 3 A7 28 /C4
+ 4 A6 29 (not used)
+ 5 A9 30 /C1
+ 6 A5 31 BD3
+ 7 A4 32 /C3
+ 8 A3 33 (not used)
+ 9 A10 34 /C2
+ 10 A2 35 DB6
+ 11 A11 36 /RD
+ 12 A1 37 BD4
+ 13 A0 38 (not used)
+ 14 A12 39 BD7
+ 15 A14 40 (not used)
+ 16 A13 41 BD5
+ 17 /RFSH 42 (not useD)
+ 18 A15 43 BD0
+ 19 /INT 44 (not used)
+ 20 /BUSRQ 45 BD2
+ 21 /NMI 46 /RESET
+ 22 /WAIT 47 /M1
+ 23 /HALT 48 /IORQ
+ 24 /BUSAK 49 BD1
+ 25 /ROMDIS 50 +5V
***************************************************************************/
diff --git a/src/emu/bus/cgenie/expansion/floppy.c b/src/emu/bus/cgenie/expansion/floppy.c
index b8da52a5611..45d7030f8cb 100644
--- a/src/emu/bus/cgenie/expansion/floppy.c
+++ b/src/emu/bus/cgenie/expansion/floppy.c
@@ -83,7 +83,7 @@ static MACHINE_CONFIG_FRAGMENT( cgenie_fdc )
MCFG_FLOPPY_DRIVE_ADD("fd1793:2", cgenie_floppies, NULL, cgenie_fdc_device::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fd1793:3", cgenie_floppies, NULL, cgenie_fdc_device::floppy_formats)
-// MCFG_SOFTWARE_LIST_ADD("floppy_list", "cgenie_flop")
+// MCFG_SOFTWARE_LIST_ADD("floppy_list", "cgenie_flop")
MCFG_GENERIC_SOCKET_ADD("socket", generic_plain_slot, "cgenie_socket")
MCFG_GENERIC_EXTENSIONS("bin,rom")
diff --git a/src/emu/bus/cgenie/parallel/parallel.h b/src/emu/bus/cgenie/parallel/parallel.h
index a7f5c8bbb77..4976e5caaf9 100644
--- a/src/emu/bus/cgenie/parallel/parallel.h
+++ b/src/emu/bus/cgenie/parallel/parallel.h
@@ -6,16 +6,16 @@
20-pin slot
- 1 GND 11 IOB2
- 2 +12V 12 IOB1
- 3 IOA3 13 IOB0
- 4 IOA4 14 IOB3
- 5 IOA0 15 IOB4
- 6 IOA5 16 IOB5
- 7 IOA1 17 IOB7
- 8 IOA2 18 IOB6
- 9 IOA7 19 +5V
- 10 IOA6 20 -12V
+ 1 GND 11 IOB2
+ 2 +12V 12 IOB1
+ 3 IOA3 13 IOB0
+ 4 IOA4 14 IOB3
+ 5 IOA0 15 IOB4
+ 6 IOA5 16 IOB5
+ 7 IOA1 17 IOB7
+ 8 IOA2 18 IOB6
+ 9 IOA7 19 +5V
+ 10 IOA6 20 -12V
***************************************************************************/
diff --git a/src/emu/bus/cpc/brunword4.c b/src/emu/bus/cpc/brunword4.c
index ca3ba05469c..cd3ab420349 100644
--- a/src/emu/bus/cpc/brunword4.c
+++ b/src/emu/bus/cpc/brunword4.c
@@ -2,13 +2,13 @@
// copyright-holders:Barry Rodewald
/*
- Brunword MK4 - Word processor ROM / expansion
+ Brunword MK4 - Word processor ROM / expansion
- Software is provided as an expansion device, which uses it own ROM mapping
+ Software is provided as an expansion device, which uses it own ROM mapping
- The ROM select port will be handled by this device, calling back to the standard driver when necessary.
- Not enabled for the CPC Plus, as ROM selection wraps after 63, making it impossible to see cartridge
- banks in the upper ROM area (0x80-0xff)
+ The ROM select port will be handled by this device, calling back to the standard driver when necessary.
+ Not enabled for the CPC Plus, as ROM selection wraps after 63, making it impossible to see cartridge
+ banks in the upper ROM area (0x80-0xff)
*/
#include "brunword4.h"
@@ -21,7 +21,7 @@ ROM_START( cpc_brunword4 )
ROM_LOAD( "brunw-c1.rom", 0x0000, 0x4000, CRC(3200299b) SHA1(d7d5fcacf3c6707a6629b0c65564ac44267d2b49) )
ROM_LOAD( "brunw-c2.rom", 0x4000, 0x4000, CRC(aa19aff1) SHA1(5aa4e87ae6ad2063540e3f5179298657bbd82bfb) )
ROM_LOAD( "brunw-c3.rom", 0x8000, 0x4000, CRC(eabe60fe) SHA1(41f605f1e1b5e2bc7dcbd702f2d202ab4d2f44ec) )
-
+
ROM_REGION( 0x80000, "mk4_roms", 0 )
ROM_LOAD( "brunw-c0.rom", 0x0000, 0x4000, CRC(45493337) SHA1(a971e2e63adb004c605cf642edde828e8b3ab897) )
ROM_LOAD( "brunw-c1.rom", 0x4000, 0x4000, CRC(3200299b) SHA1(d7d5fcacf3c6707a6629b0c65564ac44267d2b49) )
@@ -108,4 +108,3 @@ void cpc_brunword4_device::set_mapping()
membank(":bank4")->set_base(ROM+((bank*0x4000) + 0x2000));
}
}
-
diff --git a/src/emu/bus/cpc/brunword4.h b/src/emu/bus/cpc/brunword4.h
index 6dde9e72f3e..8b66afaefae 100644
--- a/src/emu/bus/cpc/brunword4.h
+++ b/src/emu/bus/cpc/brunword4.h
@@ -2,7 +2,7 @@
// copyright-holders:Barry Rodewald
/*
- Brunword MK4 - Word processor ROM / expansion
+ Brunword MK4 - Word processor ROM / expansion
*/
@@ -21,7 +21,7 @@ public:
DECLARE_WRITE8_MEMBER(rombank_w);
virtual void set_mapping();
-
+
protected:
// device-level overrides
virtual void device_start();
@@ -29,11 +29,10 @@ protected:
private:
cpc_expansion_slot_device *m_slot;
-
+
bool m_rombank_active;
UINT8 m_bank_sel;
};
// device type definition
extern const device_type CPC_BRUNWORD_MK4;
-
diff --git a/src/emu/bus/gameboy/mbc.c b/src/emu/bus/gameboy/mbc.c
index 33ed902cfed..b6f31714a3a 100644
--- a/src/emu/bus/gameboy/mbc.c
+++ b/src/emu/bus/gameboy/mbc.c
@@ -694,12 +694,12 @@ WRITE8_MEMBER(gb_rom_m161_device::write_bank)
// MMM01
// This mmm01 implementation is mostly guess work, no clue how correct it all is
/* TODO: This implementation is wrong. Tauwasser
- *
+ *
* Register 0: Map Latch, AA Mask, RAM Enable
* Register 1: EA1..EA0, RA18..RA14
* Register 2: ??, AA18..AA15, AA14..AA13
* Register 3: AA Multiplex, RA Mask, ???, MBC1 Mode
- *
+ *
*/
READ8_MEMBER(gb_rom_mmm01_device::read_rom)
@@ -748,7 +748,6 @@ WRITE8_MEMBER(gb_rom_mmm01_device::write_bank)
READ8_MEMBER(gb_rom_sachen_mmc1_device::read_rom)
{
-
UINT16 off_edit = offset;
/* Wait for 0x31 transitions of A15 (hi -> lo), i.e. ROM accesses; A15 = HI while in bootstrap */
@@ -757,11 +756,11 @@ READ8_MEMBER(gb_rom_sachen_mmc1_device::read_rom)
m_mode = MODE_UNLOCKED;
else
m_unlock_cnt++;
-
+
/* Logo Switch */
if (m_mode == MODE_LOCKED)
off_edit |= 0x80;
-
+
/* Header Un-Scramble */
if ((off_edit & 0xFF00) == 0x0100) {
off_edit &= 0xFFAC;
@@ -771,7 +770,7 @@ READ8_MEMBER(gb_rom_sachen_mmc1_device::read_rom)
off_edit |= ((offset >> 0) & 0x01) << 6;
}
//logerror("read from %04X (%04X)\n", offset, off_edit);
-
+
if (offset & 0x4000) /* RB1 */
return m_rom[rom_bank_map[(m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask)] * 0x4000 + (offset & 0x3fff)];
else /* RB0 */
@@ -780,38 +779,37 @@ READ8_MEMBER(gb_rom_sachen_mmc1_device::read_rom)
WRITE8_MEMBER(gb_rom_sachen_mmc1_device::write_bank)
{
-
/* Only A15..A6, A4, A1..A0 are connected */
/* We only decode upper three bits */
switch ((offset & 0xFFD3) & 0xE000)
{
case 0x0000: /* Base ROM Bank Register */
-
+
if ((m_latch_bank2 & 0x30) == 0x30)
m_base_bank = data;
//logerror("write to base bank %X - %X\n", data, (m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask));
break;
-
+
case 0x2000: /* ROM Bank Register */
-
+
m_latch_bank2 = data ? data : 0x01;
//logerror("write to latch %X - %X\n", data, (m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask));
break;
-
+
case 0x4000: /* ROM Bank Mask Register */
-
+
if ((m_latch_bank2 & 0x30) == 0x30)
m_mask = data;
//logerror("write to mask %X - %X\n", data, (m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask));
break;
-
+
case 0x6000:
-
+
/* nothing happens when writing to 0x6000-0x7fff, as verified by Tauwasser */
break;
-
+
default:
-
+
//logerror("write to unknown/unmapped area %04X <= %02X\n", offset, data);
/* did not extensively test other unlikely ranges */
break;
@@ -822,27 +820,26 @@ WRITE8_MEMBER(gb_rom_sachen_mmc1_device::write_bank)
READ8_MEMBER(gb_rom_sachen_mmc2_device::read_rom)
{
-
UINT16 off_edit = offset;
/* Wait for 0x30 transitions of A15 (lo -> hi), i.e. ROM accesses; A15 = HI while in bootstrap */
/* This is 0x30 transitions, because we increment counter _after_ checking it, but A15 lo -> hi*/
/* transition means first read (hi -> lo transition) must not count */
-
+
if (m_unlock_cnt == 0x30 && m_mode == MODE_LOCKED_DMG) {
m_mode = MODE_LOCKED_CGB;
m_unlock_cnt = 0x00;
} else if (m_unlock_cnt == 0x30 && m_mode == MODE_LOCKED_CGB) {
m_mode = MODE_UNLOCKED;
}
-
+
if (m_unlock_cnt != 0x30)
m_unlock_cnt++;
-
+
/* Logo Switch */
if (m_mode == MODE_LOCKED_CGB)
off_edit |= 0x80;
-
+
/* Header Un-Scramble */
if ((off_edit & 0xFF00) == 0x0100) {
off_edit &= 0xFFAC;
@@ -852,7 +849,7 @@ READ8_MEMBER(gb_rom_sachen_mmc2_device::read_rom)
off_edit |= ((offset >> 0) & 0x01) << 6;
}
//logerror("read from %04X (%04X) cnt: %02X\n", offset, off_edit, m_unlock_cnt);
-
+
if (offset & 0x4000) /* RB1 */
return m_rom[rom_bank_map[(m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask)] * 0x4000 + (offset & 0x3fff)];
else /* RB0 */
@@ -861,7 +858,6 @@ READ8_MEMBER(gb_rom_sachen_mmc2_device::read_rom)
READ8_MEMBER(gb_rom_sachen_mmc2_device::read_ram)
{
-
if (m_mode == MODE_LOCKED_DMG) {
m_unlock_cnt = 0x00;
m_mode = MODE_LOCKED_CGB;
@@ -872,7 +868,6 @@ READ8_MEMBER(gb_rom_sachen_mmc2_device::read_ram)
WRITE8_MEMBER(gb_rom_sachen_mmc2_device::write_ram)
{
-
if (m_mode == MODE_LOCKED_DMG) {
m_unlock_cnt = 0x00;
m_mode = MODE_LOCKED_CGB;
diff --git a/src/emu/bus/ieee488/c2040.h b/src/emu/bus/ieee488/c2040.h
index 3f63b30b4b6..1618a46599f 100644
--- a/src/emu/bus/ieee488/c2040.h
+++ b/src/emu/bus/ieee488/c2040.h
@@ -28,7 +28,7 @@
// ======================> c2040_t
class c2040_t : public device_t,
- public device_ieee488_interface
+ public device_ieee488_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/ieee488/c8050.h b/src/emu/bus/ieee488/c8050.h
index 818461828b4..3d5904dd6cb 100644
--- a/src/emu/bus/ieee488/c8050.h
+++ b/src/emu/bus/ieee488/c8050.h
@@ -28,7 +28,7 @@
// ======================> c8050_t
class c8050_t : public device_t,
- public device_ieee488_interface
+ public device_ieee488_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/ieee488/c8280.h b/src/emu/bus/ieee488/c8280.h
index 93c5a3a2048..076edcd736c 100644
--- a/src/emu/bus/ieee488/c8280.h
+++ b/src/emu/bus/ieee488/c8280.h
@@ -27,7 +27,7 @@
// ======================> c8280_t
class c8280_t : public device_t,
- public device_ieee488_interface
+ public device_ieee488_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/ieee488/d9060.h b/src/emu/bus/ieee488/d9060.h
index c6cb165fc44..7efc20006cf 100644
--- a/src/emu/bus/ieee488/d9060.h
+++ b/src/emu/bus/ieee488/d9060.h
@@ -28,7 +28,7 @@
// ======================> d9060_base_t
class d9060_base_t : public device_t,
- public device_ieee488_interface
+ public device_ieee488_interface
{
public:
enum
diff --git a/src/emu/bus/megadrive/jcart.c b/src/emu/bus/megadrive/jcart.c
index 5c74cafa3da..6e45c2481f6 100644
--- a/src/emu/bus/megadrive/jcart.c
+++ b/src/emu/bus/megadrive/jcart.c
@@ -4,7 +4,7 @@
MegaDrive / Genesis J-Cart (+SEPROM) emulation
-
+
Emulation based on earlier researches by ElBarto
diff --git a/src/emu/bus/megadrive/md_carts.c b/src/emu/bus/megadrive/md_carts.c
index a1ff06e8e72..698060c6014 100644
--- a/src/emu/bus/megadrive/md_carts.c
+++ b/src/emu/bus/megadrive/md_carts.c
@@ -2,7 +2,7 @@
// copyright-holders:Fabio Priuli
/**********************************************************************
- Megadrive carts
+ Megadrive carts
**********************************************************************/
diff --git a/src/emu/bus/megadrive/rom.c b/src/emu/bus/megadrive/rom.c
index 0bb97ff6dd0..bc81477cc09 100644
--- a/src/emu/bus/megadrive/rom.c
+++ b/src/emu/bus/megadrive/rom.c
@@ -7,11 +7,11 @@
Here we emulate bankswitch / protection / NVRAM found on generic carts with no additional hardware
-
+
Emulation of the pirate carts is heavily indebted to the reverse engineering efforts made
by David Haywood (for HazeMD) and by EkeEke (for genplus-gx)
-
+
***********************************************************************************************************/
#include "emu.h"
diff --git a/src/emu/bus/nasbus/nasbus.h b/src/emu/bus/nasbus/nasbus.h
index 8c33f9f07c6..f7766bc0426 100644
--- a/src/emu/bus/nasbus/nasbus.h
+++ b/src/emu/bus/nasbus/nasbus.h
@@ -131,8 +131,8 @@ class nasbus_slot_device : public device_t, public device_slot_interface
{
public:
// construction/destruction
- nasbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- nasbus_slot_device(const machine_config &mconfig, device_type type, const char *name,
+ nasbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ nasbus_slot_device(const machine_config &mconfig, device_type type, const char *name,
const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
// device-level overrides
@@ -155,7 +155,7 @@ class nasbus_device : public device_t
{
public:
// construction/destruction
- nasbus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ nasbus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual ~nasbus_device();
template<class _Object> static devcb_base &set_ram_disable_handler(device_t &device, _Object object)
diff --git a/src/emu/bus/nubus/nubus_image.c b/src/emu/bus/nubus/nubus_image.c
index 3067e3caae9..4a49cdac04c 100644
--- a/src/emu/bus/nubus/nubus_image.c
+++ b/src/emu/bus/nubus/nubus_image.c
@@ -273,7 +273,7 @@ WRITE32_MEMBER( nubus_image_device::file_cmd_w )
char fullpath[1024];
UINT64 filesize;
-// data = ((data & 0xff) << 24) | ((data & 0xff00) << 8) | ((data & 0xff0000) >> 8) | ((data & 0xff000000) >> 24);
+// data = ((data & 0xff) << 24) | ((data & 0xff00) << 8) | ((data & 0xff0000) >> 8) | ((data & 0xff000000) >> 24);
filectx.curcmd = data;
switch(data) {
case kFileCmdGetDir:
@@ -332,7 +332,7 @@ WRITE32_MEMBER( nubus_image_device::file_data_w )
//data = ni_ntohl(data);
if((filectx.bytecount + count) > filectx.filelen) count = filectx.filelen - filectx.bytecount;
osd_write(filectx.fd, &data, filectx.bytecount, count, &actualcount);
- filectx.bytecount += actualcount;
+ filectx.bytecount += actualcount;
if(filectx.bytecount >= filectx.filelen) {
osd_close(filectx.fd);
diff --git a/src/emu/bus/plus4/c1551.h b/src/emu/bus/plus4/c1551.h
index fb0dd27c2b0..e31ec0afdd5 100644
--- a/src/emu/bus/plus4/c1551.h
+++ b/src/emu/bus/plus4/c1551.h
@@ -27,7 +27,7 @@
// ======================> c1551_t
class c1551_t : public device_t,
- public device_plus4_expansion_card_interface
+ public device_plus4_expansion_card_interface
{
public:
// construction/destruction
diff --git a/src/emu/clifront.c b/src/emu/clifront.c
index a7863ceafe6..094353041cc 100644
--- a/src/emu/clifront.c
+++ b/src/emu/clifront.c
@@ -1882,7 +1882,7 @@ int media_identifier::find_by_hash(const hash_collection &hashes, int length)
{
int found = 0;
slname_map listnames;
- slname_map shortnames;
+ slname_map shortnames;
// iterate over drivers
m_drivlist.reset();
@@ -1891,26 +1891,26 @@ int media_identifier::find_by_hash(const hash_collection &hashes, int length)
// iterate over devices, regions and files within the region */
device_iterator deviter(m_drivlist.config().root_device());
for (device_t *device = deviter.first(); device != NULL; device = deviter.next())
- {
- if (shortnames.add(device->shortname(), 0, FALSE) != TMERR_DUPLICATE)
- {
- for (const rom_entry *region = rom_first_region(*device); region != NULL; region = rom_next_region(region))
- for (const rom_entry *rom = rom_first_file(region); rom != NULL; rom = rom_next_file(rom))
- {
- hash_collection romhashes(ROM_GETHASHDATA(rom));
- if (!romhashes.flag(hash_collection::FLAG_NO_DUMP) && hashes == romhashes)
- {
- bool baddump = romhashes.flag(hash_collection::FLAG_BAD_DUMP);
-
- // output information about the match
- if (found)
- osd_printf_info(" ");
- osd_printf_info("= %s%-20s %-10s %s\n", baddump ? "(BAD) " : "", ROM_GETNAME(rom), m_drivlist.driver().name, m_drivlist.driver().description);
- found++;
- }
- }
- }
- }
+ {
+ if (shortnames.add(device->shortname(), 0, FALSE) != TMERR_DUPLICATE)
+ {
+ for (const rom_entry *region = rom_first_region(*device); region != NULL; region = rom_next_region(region))
+ for (const rom_entry *rom = rom_first_file(region); rom != NULL; rom = rom_next_file(rom))
+ {
+ hash_collection romhashes(ROM_GETHASHDATA(rom));
+ if (!romhashes.flag(hash_collection::FLAG_NO_DUMP) && hashes == romhashes)
+ {
+ bool baddump = romhashes.flag(hash_collection::FLAG_BAD_DUMP);
+
+ // output information about the match
+ if (found)
+ osd_printf_info(" ");
+ osd_printf_info("= %s%-20s %-10s %s\n", baddump ? "(BAD) " : "", ROM_GETNAME(rom), m_drivlist.driver().name, m_drivlist.driver().description);
+ found++;
+ }
+ }
+ }
+ }
// next iterate over softlists
software_list_device_iterator iter(m_drivlist.config().root_device());
@@ -1927,7 +1927,7 @@ int media_identifier::find_by_hash(const hash_collection &hashes, int length)
if (hashes == romhashes)
{
bool baddump = romhashes.flag(hash_collection::FLAG_BAD_DUMP);
-
+
// output information about the match
if (found)
osd_printf_info(" ");
diff --git a/src/emu/cpu/avr8/avr8.c b/src/emu/cpu/avr8/avr8.c
index a0aacacc3d5..976b2ff8856 100644
--- a/src/emu/cpu/avr8/avr8.c
+++ b/src/emu/cpu/avr8/avr8.c
@@ -1906,9 +1906,9 @@ void avr8_device::timer5_tick()
case WGM5_FAST_PWM_ICR:
case WGM5_FAST_PWM_OCR:
#if LOG_TIMER_5
- printf("Unimplemented timer#5 waveform generation mode: AVR8_WGM5 = 0x%02X\n", AVR8_WGM5);
+ printf("Unimplemented timer#5 waveform generation mode: AVR8_WGM5 = 0x%02X\n", AVR8_WGM5);
#endif
- break;
+ break;
case WGM5_CTC_OCR:
//TODO: verify this! Can be very wrong!!!
diff --git a/src/emu/cpu/e0c6200/e0c6200.c b/src/emu/cpu/e0c6200/e0c6200.c
index d9b1ab65864..e0b6a2eb8d2 100644
--- a/src/emu/cpu/e0c6200/e0c6200.c
+++ b/src/emu/cpu/e0c6200/e0c6200.c
@@ -78,7 +78,7 @@ void e0c6200_cpu_device::device_start()
m_prev_pc = 0;
m_npc = 0;
m_jpc = 0;
-
+
m_a = 0;
m_b = 0;
m_xp = m_xh = m_xl = 0;
@@ -158,7 +158,7 @@ void e0c6200_cpu_device::do_interrupt()
m_halt = m_sleep = false;
push_pc();
m_f &= ~I_FLAG;
-
+
// page 1 of the current bank
m_pc = (m_pc & 0x1000) | 0x100 | m_irq_vector;
@@ -180,27 +180,27 @@ void e0c6200_cpu_device::execute_run()
break;
}
}
-
+
// core cpu not running (peripherals still work)
if (m_halt || m_sleep)
{
m_icount = 0;
break;
}
-
+
// remember previous state, prepare pset-longjump
m_prev_op = m_op;
m_prev_pc = m_pc;
m_jpc = ((m_prev_op & 0xfe0) == 0xe40) ? m_npc : (m_prev_pc & 0x1f00);
-
+
// fetch next opcode
debugger_instruction_hook(this, m_pc);
m_op = m_program->read_word(m_pc << 1) & 0xfff;
m_pc = (m_pc & 0x1000) | ((m_pc + 1) & 0x0fff);
-
+
// minimal opcode time is 5 clock cycles, opcodes take 5, 7, or 12 clock cycles
m_icount -= 5;
-
+
// handle opcode
execute_one();
}
@@ -226,7 +226,7 @@ void e0c6200_cpu_device::execute_one()
// i = 4-bit immediate param
// e = 8-bit immediate param
// s = 8-bit immediate branch destination
-
+
switch (m_op & 0xf00)
{
// JP s: jump unconditional
@@ -296,7 +296,6 @@ void e0c6200_cpu_device::execute_one()
default:
switch (m_op)
{
-
// LD r,q: load register with register
case 0xec0: /* m_a = m_a; */ break;
case 0xec1: m_a = m_b; break;
@@ -698,7 +697,6 @@ void e0c6200_cpu_device::execute_one()
default:
switch (m_op & 0xff0)
{
-
// LD r,i: load register with 4-bit immediate data
case 0xe00: m_a = m_op & 0xf; break;
case 0xe10: m_b = m_op & 0xf; break;
@@ -726,7 +724,7 @@ void e0c6200_cpu_device::execute_one()
break;
// LD Mn,A: load memory with A
- case 0xf80:
+ case 0xf80:
write_mn(m_a);
break;
diff --git a/src/emu/cpu/e0c6200/e0c6200.h b/src/emu/cpu/e0c6200/e0c6200.h
index 27ffa1da817..430cc36f6f8 100644
--- a/src/emu/cpu/e0c6200/e0c6200.h
+++ b/src/emu/cpu/e0c6200/e0c6200.h
@@ -63,7 +63,7 @@ protected:
UINT16 m_prev_pc;
UINT16 m_npc; // new bank/page prepared by pset
UINT16 m_jpc; // actual bank/page destination for jumps
-
+
// all work registers are 4-bit
UINT8 m_a; // accumulator
UINT8 m_b; // generic
@@ -92,7 +92,7 @@ protected:
inline void inc_x();
inline void inc_y();
void do_branch(int condition = 1);
-
+
// opcode handlers
UINT8 op_inc(UINT8 x);
UINT8 op_dec(UINT8 x);
diff --git a/src/emu/cpu/e0c6200/e0c6200d.c b/src/emu/cpu/e0c6200/e0c6200d.c
index b1f65071545..4fc0599ac24 100644
--- a/src/emu/cpu/e0c6200/e0c6200d.c
+++ b/src/emu/cpu/e0c6200/e0c6200d.c
@@ -82,30 +82,30 @@ static char* decode_param(UINT16 opcode, int param, char* buffer)
int bits = ep_bits[param] & 0xf;
int shift = ep_bits[param] >> 4 & 0xf;
UINT16 opmask = opcode >> shift & ((1 << bits) - 1);
-
+
// redirect r/q to A/B/MX/MY
if (ep_bits[param] & 0x100)
param = ep_redirect_r[opmask];
-
+
// literal param
if (ep_bits[param] == 0)
{
strcpy(buffer, ep_name[param]);
return buffer;
}
-
+
// print value like how it's documented in the manual
char val[10];
if (bits > 4 || opmask > 9)
sprintf(val, "%02XH", opmask);
else
sprintf(val, "%d", opmask);
-
+
if (param == ep_MN)
sprintf(buffer, "M%s", val);
else
strcpy(buffer, val);
-
+
return buffer;
}
@@ -113,7 +113,7 @@ static char* decode_param(UINT16 opcode, int param, char* buffer)
CPU_DISASSEMBLE(e0c6200)
{
UINT16 op = (oprom[1] | oprom[0] << 8) & 0xfff;
-
+
int m = -1;
int p1 = -1;
int p2 = -1;
@@ -180,7 +180,6 @@ CPU_DISASSEMBLE(e0c6200)
default:
switch (op)
{
-
// RLC r
case 0xaf0: case 0xaf5: case 0xafa: case 0xaff:
m = em_RLC; p1 = ep_R0;
@@ -475,7 +474,6 @@ CPU_DISASSEMBLE(e0c6200)
default:
switch (op & 0xff0)
{
-
// ADC XH,i
case 0xa00:
m = em_ADC; p1 = ep_XH; p2 = ep_I;
@@ -694,7 +692,7 @@ CPU_DISASSEMBLE(e0c6200)
// fetch mnemonic
char *dst = buffer;
dst += sprintf(dst, "%-6s", em_name[m]);
-
+
// fetch param(s)
char pbuffer[10];
if (p1 != -1)
@@ -705,6 +703,6 @@ CPU_DISASSEMBLE(e0c6200)
dst += sprintf(dst, ",%s", decode_param(op, p2, pbuffer));
}
}
-
+
return 1 | em_flags[m] | DASMFLAG_SUPPORTED;
}
diff --git a/src/emu/cpu/e0c6200/e0c6200op.inc b/src/emu/cpu/e0c6200/e0c6200op.inc
index 6eef5a7975e..09fc07b3c70 100644
--- a/src/emu/cpu/e0c6200/e0c6200op.inc
+++ b/src/emu/cpu/e0c6200/e0c6200op.inc
@@ -151,14 +151,14 @@ UINT8 e0c6200_cpu_device::op_add(UINT8 x, UINT8 y, int decimal)
m_icount -= 2;
x += y;
set_cf(x);
-
+
// decimal correction
if (m_f & decimal && x >= 10)
{
x -= 10;
m_f |= C_FLAG;
}
-
+
set_zf(x);
return x & 0xf;
}
diff --git a/src/emu/cpu/e0c6200/e0c6s46.c b/src/emu/cpu/e0c6200/e0c6s46.c
index 55a0127db7b..be131a1e5dc 100644
--- a/src/emu/cpu/e0c6200/e0c6s46.c
+++ b/src/emu/cpu/e0c6200/e0c6s46.c
@@ -4,7 +4,7 @@
Seiko Epson E0C6S46 MCU
QFP5-128pin, see manual for pinout
-
+
TODO:
- OSC3
- K input interrupts
@@ -64,7 +64,7 @@ e0c6s46_device::e0c6s46_device(const machine_config &mconfig, const char *tag, d
void e0c6s46_device::device_start()
{
e0c6200_cpu_device::device_start();
-
+
// find ports
m_write_r0.resolve_safe();
m_write_r1.resolve_safe();
@@ -88,7 +88,7 @@ void e0c6s46_device::device_start()
m_prgtimer_handle->adjust(attotime::never);
m_buzzer_handle = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(e0c6s46_device::buzzer_cb), this));
m_buzzer_handle->adjust(attotime::never);
-
+
// zerofill
memset(m_port_r, 0x0, sizeof(m_port_r));
m_r_dir = 0;
@@ -97,7 +97,7 @@ void e0c6s46_device::device_start()
m_p_pullup = 0;
memset(m_port_k, 0xf, sizeof(m_port_k));
m_dfk0 = 0xf;
-
+
memset(m_irqflag, 0, sizeof(m_irqflag));
memset(m_irqmask, 0, sizeof(m_irqmask));
m_osc = 0;
@@ -114,7 +114,7 @@ void e0c6s46_device::device_start()
m_swl_slice = 0;
m_swl_count = 0;
m_swh_count = 0;
-
+
m_prgtimer_select = 0;
m_prgtimer_on = 0;
m_prgtimer_src_pulse = 0;
@@ -130,7 +130,7 @@ void e0c6s46_device::device_start()
m_bz_1shot_running = false;
m_bz_1shot_count = 0;
m_bz_pulse = 0;
-
+
// register for savestates
save_item(NAME(m_port_r));
save_item(NAME(m_r_dir));
@@ -139,7 +139,7 @@ void e0c6s46_device::device_start()
save_item(NAME(m_p_pullup));
save_item(NAME(m_port_k));
save_item(NAME(m_dfk0));
-
+
save_item(NAME(m_irqflag));
save_item(NAME(m_irqmask));
save_item(NAME(m_osc));
@@ -187,7 +187,7 @@ void e0c6s46_device::device_reset()
// reset interrupts
memset(m_irqflag, 0, sizeof(m_irqflag));
memset(m_irqmask, 0, sizeof(m_irqmask));
-
+
// reset other i/o
m_data->write_byte(0xf41, 0xf);
m_data->write_byte(0xf54, 0xf);
@@ -205,7 +205,7 @@ void e0c6s46_device::device_reset()
m_data->write_byte(0xf7b, 0x0);
m_data->write_byte(0xf7d, 0x0);
m_data->write_byte(0xf7e, 0x0);
-
+
// reset ports
for (int i = 0; i < 5; i++)
write_r(i, m_port_r[i]);
@@ -224,7 +224,7 @@ void e0c6s46_device::execute_one()
// E0C6S46 has no support for SLP opcode
if (m_op == 0xff9)
return;
-
+
e0c6200_cpu_device::execute_one();
}
@@ -255,7 +255,7 @@ bool e0c6s46_device::check_interrupt()
m_irq_vector = 2*pri + 2;
int reg = priorder[pri];
m_irq_id = reg;
-
+
switch (reg)
{
// other: mask vs flag
@@ -265,7 +265,7 @@ bool e0c6s46_device::check_interrupt()
break;
}
}
-
+
return false;
}
@@ -278,7 +278,7 @@ void e0c6s46_device::execute_set_input(int line, int state)
state = (state) ? 1 : 0;
int port = line >> 2 & 1;
UINT8 bit = 1 << (line & 3);
-
+
m_port_k[port] = (m_port_k[port] & ~bit) | (state ? bit : 0);
}
@@ -299,14 +299,14 @@ void e0c6s46_device::write_r(UINT8 port, UINT8 data)
UINT8 out = data;
if (port < 4 && !(m_r_dir >> port & 1))
out = 0xf;
-
+
switch (port)
{
case 0: m_write_r0(port, out, 0xff); break;
case 1: m_write_r1(port, out, 0xff); break;
case 2: m_write_r2(port, out, 0xff); break;
case 3: m_write_r3(port, out, 0xff); break; // TODO: R33 PTCLK/_SRDY
-
+
// R4x: special output
case 4:
// d3: buzzer on: direct output or 1-shot output
@@ -336,7 +336,7 @@ void e0c6s46_device::write_p(UINT8 port, UINT8 data)
{
data &= 0xf;
m_port_p[port] = data;
-
+
// don't output if port direction is set to input
if (!(m_p_dir >> port & 1))
return;
@@ -355,7 +355,7 @@ UINT8 e0c6s46_device::read_p(UINT8 port)
// return written value if port direction is set to output
if (m_p_dir >> port & 1)
return m_port_p[port];
-
+
switch (port)
{
case 0: return m_read_p0(port, 0xff);
@@ -363,7 +363,7 @@ UINT8 e0c6s46_device::read_p(UINT8 port)
case 2: return m_read_p2(port, 0xff);
case 3: return m_read_p3(port, 0xff);
}
-
+
return 0;
}
@@ -412,7 +412,7 @@ void e0c6s46_device::clock_watchdog()
void e0c6s46_device::clock_clktimer()
{
m_clktimer_count++;
-
+
// irq on falling edge of 32, 8, 2, 1hz
UINT8 flag = 0;
if ((m_clktimer_count & 0x07) == 0)
@@ -427,7 +427,7 @@ void e0c6s46_device::clock_clktimer()
m_irqflag[IRQREG_CLKTIMER] |= flag;
if (m_irqflag[IRQREG_CLKTIMER] & m_irqmask[IRQREG_CLKTIMER])
m_possible_irq = true;
-
+
// 1hz falling edge also clocks the watchdog timer
if (m_clktimer_count == 0)
clock_watchdog();
@@ -439,14 +439,14 @@ void e0c6s46_device::clock_clktimer()
void e0c6s46_device::clock_stopwatch()
{
m_swl_slice++;
-
+
// 1 slice is 3 ticks(256hz) on even and 2 ticks on uneven counts,
// but from count 1 to 2 it's 3 ticks, 6 out of 100 times, to make
// exactly 26/256hz * 6 + 25/256hz * 4 = 1 second
int swl_next = 3 - (m_swl_count & 1);
if (m_swl_count == 1 && !(m_swh_count >> 1 & 1))
swl_next = 3;
-
+
if (m_swl_slice == swl_next)
{
m_swl_slice = 0;
@@ -477,7 +477,7 @@ void e0c6s46_device::clock_prgtimer()
m_irqflag[IRQREG_PRGTIMER] |= 1;
if (m_irqflag[IRQREG_PRGTIMER] & m_irqmask[IRQREG_PRGTIMER])
m_possible_irq = true;
-
+
// note: a reload of 0 indicates a 256-counter
m_prgtimer_count = m_prgtimer_reload;
}
@@ -489,7 +489,7 @@ bool e0c6s46_device::prgtimer_reset_prescaler()
UINT8 sel = m_prgtimer_select & 7;
if (sel >= 2)
m_prgtimer_handle->adjust(attotime::from_ticks(2 << (sel ^ 7), unscaled_clock()));
-
+
return (sel >= 2);
}
@@ -501,7 +501,7 @@ TIMER_CALLBACK_MEMBER(e0c6s46_device::prgtimer_cb)
m_prgtimer_src_pulse ^= 1;
m_prgtimer_cur_pulse = m_prgtimer_src_pulse | (m_prgtimer_on ^ 1);
-
+
// clock prgtimer on falling edge of pulse+on
if (m_prgtimer_cur_pulse == 0)
clock_prgtimer();
@@ -515,17 +515,17 @@ void e0c6s46_device::schedule_buzzer()
// only schedule next buzzer timeout if it's on
if (m_bz_43_on != 0 && !m_bz_1shot_running)
return;
-
+
// pulse width differs per frequency selection
int mul = (m_bz_freq & 4) ? 1 : 2;
int high = (m_bz_freq & 2) ? 12 : 8;
int low = 16 + (m_bz_freq << 2 & 0xc);
-
+
// pulse width envelope if it's on
if (m_bz_envelope & 1)
high -= m_bz_duty_ratio;
low -= high;
-
+
m_buzzer_handle->adjust(attotime::from_ticks(m_bz_pulse ? high : low, mul * unscaled_clock()));
}
@@ -548,14 +548,14 @@ void e0c6s46_device::reset_buzzer()
void e0c6s46_device::clock_bz_1shot()
{
m_bz_1shot_running = true;
-
+
// reload counter the 1st time
if (m_bz_1shot_count == 0)
{
reset_buzzer();
m_bz_1shot_count = (m_bz_freq & 8) ? 16 : 8;
}
-
+
// stop ringing when counter reaches 0
else if (--m_bz_1shot_count == 0)
{
@@ -586,7 +586,7 @@ UINT32 e0c6s46_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap
pixel = 1;
else
lcd_on = true;
-
+
// draw pixels
for (int offset = 0; offset < 0x50; offset++)
{
@@ -594,11 +594,11 @@ UINT32 e0c6s46_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap
{
if (lcd_on)
pixel = vram[offset] >> c & 1;
-
+
// 16 COM(common) pins, 40 SEG(segment) pins
int seg = offset / 2;
int com = bank * 8 + (offset & 1) * 4 + c;
-
+
if (m_pixel_update_handler != NULL)
m_pixel_update_handler(*this, bitmap, cliprect, m_lcd_contrast, seg, com, pixel);
else if (cliprect.contains(seg, com))
@@ -631,7 +631,7 @@ READ8_MEMBER(e0c6s46_device::io_r)
}
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15:
return m_irqmask[offset-0x10];
-
+
// K input ports
case 0x40: case 0x42:
return m_port_k[offset >> 1 & 1];
@@ -643,7 +643,7 @@ READ8_MEMBER(e0c6s46_device::io_r)
return m_port_r[offset & 7];
case 0x7b:
return m_r_dir;
-
+
// P I/O ports
case 0x60: case 0x61: case 0x62: case 0x63:
return read_p(offset & 3);
@@ -651,11 +651,11 @@ READ8_MEMBER(e0c6s46_device::io_r)
return m_p_dir;
case 0x7e:
return m_p_pullup;
-
+
// clock-timer (lo, hi)
case 0x20: case 0x21:
return m_clktimer_count >> (4 * (offset & 1)) & 0xf;
-
+
// stopwatch timer
case 0x22:
return m_swl_count;
@@ -663,7 +663,7 @@ READ8_MEMBER(e0c6s46_device::io_r)
return m_swh_count;
case 0x77:
return m_stopwatch_on;
-
+
// programmable timer
case 0x24: case 0x25:
return m_prgtimer_count >> (4 * (offset & 1)) & 0xf;
@@ -673,34 +673,34 @@ READ8_MEMBER(e0c6s46_device::io_r)
return m_prgtimer_on;
case 0x79:
return m_prgtimer_select;
-
+
// buzzer
case 0x74:
return m_bz_freq;
case 0x75:
// d3: 1-shot buzzer is on
return m_bz_1shot_on | m_bz_envelope;
-
+
// OSC circuit
case 0x70:
return m_osc;
-
+
// LCD driver
case 0x71:
return m_lcd_control;
case 0x72:
return m_lcd_contrast;
-
+
// SVD circuit (supply voltage detection)
case 0x73:
// d3: criteria voltage* is 0: <=, 1: > source voltage (Vdd-Vss)
// *0,1,2,3: -2.2V, -2.5V, -3.1V, -4.2V, 1 when off
return m_svd | ((m_svd & 4 && m_svd != 7) ? 0 : 8);
-
+
// write-only registers
case 0x76:
break;
-
+
default:
if (!space.debugger_access())
logerror("%s unknown io_r from $0F%02X at $%04X\n", tag(), offset, m_prev_pc);
@@ -722,13 +722,13 @@ WRITE8_MEMBER(e0c6s46_device::io_w)
m_possible_irq = true;
break;
}
-
+
// K input ports
case 0x41:
// d0-d3: K0x irq on 0: rising edge, 1: falling edge
m_dfk0 = data;
break;
-
+
// R output ports
case 0x50: case 0x51: case 0x52: case 0x53: case 0x54:
write_r(offset & 7, data);
@@ -744,7 +744,7 @@ WRITE8_MEMBER(e0c6s46_device::io_w)
write_r(i, m_port_r[i]);
}
break;
-
+
// P I/O ports
case 0x60: case 0x61: case 0x62: case 0x63:
write_p(offset & 3, data);
@@ -764,7 +764,7 @@ WRITE8_MEMBER(e0c6s46_device::io_w)
// d0-d3: Px* pull up resistor on/off
m_p_pullup = data;
break;
-
+
// OSC circuit
case 0x70:
// d0,d1: CPU operating voltage
@@ -793,7 +793,7 @@ WRITE8_MEMBER(e0c6s46_device::io_w)
// d2: on
m_svd = data & 7;
break;
-
+
// clock-timer
case 0x76:
// d0: reset watchdog
@@ -804,7 +804,7 @@ WRITE8_MEMBER(e0c6s46_device::io_w)
if (data & 2)
m_clktimer_count = 0;
break;
-
+
// stopwatch timer
case 0x77:
// d0: run/stop counter
@@ -878,7 +878,7 @@ WRITE8_MEMBER(e0c6s46_device::io_w)
m_bz_envelope = data & 3;
m_bz_1shot_on |= data & 8;
break;
-
+
// read-only registers
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05:
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25:
diff --git a/src/emu/cpu/e0c6200/e0c6s46.h b/src/emu/cpu/e0c6200/e0c6s46.h
index acf5b62b41c..0b5f1e8bee3 100644
--- a/src/emu/cpu/e0c6200/e0c6s46.h
+++ b/src/emu/cpu/e0c6200/e0c6s46.h
@@ -110,7 +110,7 @@ private:
UINT8 m_irqmask[6];
UINT8 m_osc;
UINT8 m_svd;
-
+
UINT8 m_lcd_control;
UINT8 m_lcd_contrast;
e0c6s46_pixel_update_func m_pixel_update_handler;
@@ -123,7 +123,7 @@ private:
void write_r4_out();
void write_p(UINT8 port, UINT8 data);
UINT8 read_p(UINT8 port);
-
+
UINT8 m_port_r[5];
UINT8 m_r_dir;
UINT8 m_port_p[4];
@@ -148,7 +148,7 @@ private:
int m_swl_count;
int m_swh_count;
void clock_stopwatch();
-
+
UINT8 m_prgtimer_select;
UINT8 m_prgtimer_on;
int m_prgtimer_src_pulse;
diff --git a/src/emu/cpu/melps4/m58846.c b/src/emu/cpu/melps4/m58846.c
index 5d6829c971f..e4842d28a6a 100644
--- a/src/emu/cpu/melps4/m58846.c
+++ b/src/emu/cpu/melps4/m58846.c
@@ -50,7 +50,7 @@ offs_t m58846_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *o
void m58846_device::device_start()
{
melps4_cpu_device::device_start();
-
+
// set fixed state
m_bm_page = 2;
m_int_page = 1;
@@ -158,7 +158,7 @@ void m58846_device::execute_one()
}
break; // 0xff
-
+
}
break; // 0xfc
diff --git a/src/emu/cpu/melps4/melps4.c b/src/emu/cpu/melps4/melps4.c
index ef593876d00..b9172f7745d 100644
--- a/src/emu/cpu/melps4/melps4.c
+++ b/src/emu/cpu/melps4/melps4.c
@@ -3,7 +3,7 @@
/*
Mitsubishi MELPS 4 MCU family cores
-
+
Known types and their features:
(* means not emulated yet)
@@ -16,7 +16,7 @@
M58846: 42-pin DIL, 2Kx9 ROM, 128x4 RAM, 2 timers(not same as M58845), extra I/O ports
*M58847: 40-pin DIL, 2Kx9 ROM, 128x4 RAM, extra I/O ports(not same as M58846)
*M58848: ? (couldn't find info, just that it exists)
-
+
MELPS 41/42 subfamily:
*M58494: 72-pin QFP CMOS, 4Kx10 ROM, 32x4 internal + 4Kx4 external RAM, 2 timers
@@ -74,7 +74,7 @@ void melps4_cpu_device::device_start()
m_data = &space(AS_DATA);
m_prgmask = (1 << m_prgwidth) - 1;
m_datamask = (1 << m_datawidth) - 1;
-
+
// zerofill
m_pc = 0;
m_prev_pc = 0;
@@ -87,7 +87,7 @@ void melps4_cpu_device::device_start()
m_skip = false;
m_inte = 0;
m_intp = 1;
-
+
m_a = 0;
m_b = 0;
m_e = 0;
@@ -163,7 +163,7 @@ void melps4_cpu_device::device_reset()
m_inte = 0;
m_intp = 1;
op_lcps(); // CPS=0
-
+
m_v = 0;
m_w = 0;
}
diff --git a/src/emu/cpu/melps4/melps4.h b/src/emu/cpu/melps4/melps4.h
index 3bcbedd3bd0..d8b9380f7d7 100644
--- a/src/emu/cpu/melps4/melps4.h
+++ b/src/emu/cpu/melps4/melps4.h
@@ -96,7 +96,7 @@ protected:
UINT8 m_bm_page; // short BM default page: 14 on '40 to '44, 2 on '45,'46, 0 on '47
UINT8 m_int_page; // interrupt routine page: 12 on '40 to '44, 1 on '45,'46, 2 on '47
UINT8 m_xami_mask; // mask option for XAMI opcode on '40,'41,'45 (0xf for others)
-
+
// internal state, misc regs
UINT16 m_pc; // program counter (11 or 10-bit)
UINT16 m_prev_pc;
@@ -104,7 +104,7 @@ protected:
UINT16 m_op;
UINT16 m_prev_op;
UINT8 m_bitmask; // opcode bit argument
-
+
UINT8 m_cps; // DP,CY or DP',CY' selected
bool m_skip; // skip next opcode
UINT8 m_inte; // interrupt enable flag
@@ -118,13 +118,13 @@ protected:
UINT8 m_x, m_x2; // RAM index X, X', 2-bit
UINT8 m_z, m_z2; // RAM index Z, Z', 1-bit, optional
UINT8 m_cy, m_cy2; // carry flag(s)
-
+
UINT8 m_h; // A/D converter H or generic
UINT8 m_l; // A/D converter L or generic
UINT8 m_c; // A/D converter counter
UINT8 m_v; // timer control V
UINT8 m_w; // timer control W
-
+
// misc internal helpers
UINT8 ram_r();
void ram_w(UINT8 data);
diff --git a/src/emu/cpu/melps4/melps4d.c b/src/emu/cpu/melps4/melps4d.c
index c38b4b54004..01d9b51f5ce 100644
--- a/src/emu/cpu/melps4/melps4d.c
+++ b/src/emu/cpu/melps4/melps4d.c
@@ -3,7 +3,7 @@
/*
Mitsubishi MELPS 4 MCU family disassembler
-
+
Not counting the extra opcodes for peripherals (eg. timers, A/D),
each MCU in the series has small differences in the opcode map.
@@ -117,10 +117,10 @@ CPU_DISASSEMBLE(m58846)
instr = m58846_opmap[op];
dst += sprintf(dst, "%-6s", em_name[instr]);
-
+
// get immediate param
UINT8 bits = em_bits[instr];
-
+
// special case for LXY x,y
if (instr == em_LXY)
{
diff --git a/src/emu/cpu/melps4/melps4op.inc b/src/emu/cpu/melps4/melps4op.inc
index a63d55bbb50..296a5b1a39a 100644
--- a/src/emu/cpu/melps4/melps4op.inc
+++ b/src/emu/cpu/melps4/melps4op.inc
@@ -115,14 +115,14 @@ void melps4_cpu_device::op_lcps()
if ((m_op & 1) != m_cps)
{
m_cps = m_op & 1;
-
+
// swap registers
UINT8 x, y, z, cy;
x = m_x;
y = m_y;
z = m_z;
cy = m_cy;
-
+
m_x = m_x2;
m_y = m_y2;
m_z = m_z2;
diff --git a/src/emu/cpu/mips/mips3drc.c b/src/emu/cpu/mips/mips3drc.c
index c448e7b84fe..3e73d96f206 100644
--- a/src/emu/cpu/mips/mips3drc.c
+++ b/src/emu/cpu/mips/mips3drc.c
@@ -166,7 +166,7 @@ void mips3_device::clear_fastram(UINT32 select_start)
m_fastram[i].readonly = false;
m_fastram[i].base = NULL;
}
- m_fastram_select=select_start;
+ m_fastram_select=select_start;
}
/*-------------------------------------------------
diff --git a/src/emu/cpu/tlcs90/tlcs90.c b/src/emu/cpu/tlcs90/tlcs90.c
index 3ec7ab5bfaa..a5c866c7f54 100644
--- a/src/emu/cpu/tlcs90/tlcs90.c
+++ b/src/emu/cpu/tlcs90/tlcs90.c
@@ -6,9 +6,9 @@
emulation by Luca Elia, based on the Z80 core by Juergen Buchmueller
- ChangeLog:
+ ChangeLog:
- 20150517 Fixed TRUN bit masking (timers start/stop handling) [Rainer Keuchel]
+ 20150517 Fixed TRUN bit masking (timers start/stop handling) [Rainer Keuchel]
*************************************************************************************************************/
diff --git a/src/emu/cpu/tms34010/tms34010.c b/src/emu/cpu/tms34010/tms34010.c
index d1c520b473b..524fa8bd917 100644
--- a/src/emu/cpu/tms34010/tms34010.c
+++ b/src/emu/cpu/tms34010/tms34010.c
@@ -651,7 +651,7 @@ void tms340x0_device::device_reset()
/* HALT the CPU if requested, and remember to re-read the starting PC */
/* the first time we are run */
m_reset_deferred = m_halt_on_reset;
-
+
if (m_reset_deferred)
{
io_register_w(*m_program, REG_HSTCTLH, 0x8000, 0xffff);
diff --git a/src/emu/machine/ds1315.c b/src/emu/machine/ds1315.c
index 9036c18ba90..8470aaaaf9c 100644
--- a/src/emu/machine/ds1315.c
+++ b/src/emu/machine/ds1315.c
@@ -5,21 +5,21 @@
ds1315.c
Dallas Semiconductor's Phantom Time Chip DS1315.
- NOTE: writes are decoded, but the host's time will always be returned when asked.
+ NOTE: writes are decoded, but the host's time will always be returned when asked.
- April 2015: chip enable / chip reset / phantom writes by Karl-Ludwig Deisenhofer
+ April 2015: chip enable / chip reset / phantom writes by Karl-Ludwig Deisenhofer
- November 2001: implementation by Tim Lindner
+ November 2001: implementation by Tim Lindner
- HOW DOES IT WORK?
+ HOW DOES IT WORK?
- READS: pattern recognition (64 bits in correct order). When RTC finally enables
- 64 bits of data can be read. Chance of accidential pattern recognition is minimal.
+ READS: pattern recognition (64 bits in correct order). When RTC finally enables
+ 64 bits of data can be read. Chance of accidential pattern recognition is minimal.
- WRITES: two different locations (bits 0 and 1) are used to transfer data to the
- DS1315. 64 bit with time/date info are transmitted directly after recognition
- of the magic 64 bit pattern (see read above).
- **************************************************************************************/
+ WRITES: two different locations (bits 0 and 1) are used to transfer data to the
+ DS1315. 64 bit with time/date info are transmitted directly after recognition
+ of the magic 64 bit pattern (see read above).
+ **************************************************************************************/
#include "ds1315.h"
#include "coreutil.h"
@@ -170,7 +170,7 @@ void ds1315_device::fill_raw_data()
/* get the current date/time from the core */
machine().current_datetime(systime);
-
+
raw[0] = 0; /* tenths and hundreths of seconds are always zero */
raw[1] = dec_2_bcd(systime.local_time.second);
raw[2] = dec_2_bcd(systime.local_time.minute);
@@ -223,8 +223,8 @@ READ8_MEMBER(ds1315_device::write_data)
/*-------------------------------------------------
ds1315_input_raw_data
- Routine is called when new date and time has
- been written to the clock chip. Currently we
+ Routine is called when new date and time has
+ been written to the clock chip. Currently we
ignore setting the date and time in the clock
chip.
-------------------------------------------------*/
@@ -242,7 +242,7 @@ void ds1315_device::input_raw_data()
flag = 1;
if (m_raw_data[i] & 1)
- raw[j] |= flag;
+ raw[j] |= flag;
flag <<= 1;
}
raw[0] = bcd_2_dec(raw[0]); // hundreds of seconds
@@ -255,9 +255,9 @@ void ds1315_device::input_raw_data()
raw[6] = bcd_2_dec(raw[6]); // month
raw[7] = bcd_2_dec(raw[7]); // year (two digits)
- printf("\nDS1315 RTC INPUT (WILL BE IGNORED) mm/dd/yy hh:mm:ss - %02d/%02d/%02d %02d/%02d/%02d",
- raw[6], raw[5], raw[7], raw[3], raw[2], raw[1]
- );
+ printf("\nDS1315 RTC INPUT (WILL BE IGNORED) mm/dd/yy hh:mm:ss - %02d/%02d/%02d %02d/%02d/%02d",
+ raw[6], raw[5], raw[7], raw[3], raw[2], raw[1]
+ );
}
/*-------------------------------------------------
@@ -265,7 +265,7 @@ void ds1315_device::input_raw_data()
-------------------------------------------------*/
bool ds1315_device::chip_enable()
{
- return (m_mode == DS_CALENDAR_IO);
+ return (m_mode == DS_CALENDAR_IO);
}
// Set a defined state (important for pattern detection)
diff --git a/src/emu/machine/s2636.c b/src/emu/machine/s2636.c
index 174be0a765a..c3cf7bb8178 100644
--- a/src/emu/machine/s2636.c
+++ b/src/emu/machine/s2636.c
@@ -1,5 +1,5 @@
// license:BSD-3-Clause
-// copyright-holders:Mariusz Wojcieszek, Peter Trauner
+// copyright-holders:Mariusz Wojcieszek, Peter Trauner
/**********************************************************************
Signetics 2636 video chip
diff --git a/src/emu/machine/s2636.h b/src/emu/machine/s2636.h
index 4e8859f65b9..082eeabab9f 100644
--- a/src/emu/machine/s2636.h
+++ b/src/emu/machine/s2636.h
@@ -1,5 +1,5 @@
// license:BSD-3-Clause
-// copyright-holders:Mariusz Wojcieszek, Peter Trauner
+// copyright-holders:Mariusz Wojcieszek, Peter Trauner
/**********************************************************************
Signetics 2636 video chip
diff --git a/src/emu/machine/wd2010.c b/src/emu/machine/wd2010.c
index 7a8b679297e..6f50622ec79 100644
--- a/src/emu/machine/wd2010.c
+++ b/src/emu/machine/wd2010.c
@@ -8,7 +8,7 @@ Portions (2015) : Karl-Ludwig Deisenhofer
**********************************************************************
Implements WD2010 / WD1010 controller basics.
-
+
Provides IRQ / (B)DRQ signals needed for early MFM cards.
Honors DRIVE_READY and WRITE FAULT (DRDY / WF).
@@ -17,16 +17,16 @@ Implements WD2010 / WD1010 controller basics.
LIST OF UNIMPLEMENTED FEATURES :
- MULTI SECTOR TRANSFERS (M = 1); MULTIPLE DRIVES
- - AUTO_SCAN_ID / SEEK + INDEX TIMERS / ID NOT FOUND
+ - AUTO_SCAN_ID / SEEK + INDEX TIMERS / ID NOT FOUND
- IMPLIED SEEKS / IMPLIED WRITES / RETRIES
- EDGE or LEVEL TRIGGERED SEEK_COMPLETE (SC)
- SET_PARAMETER / COMPUTE_CORRECTION (DWC flag!)
-
- Pseudo code (from datasheet) left in to illustrate
- the intended instruction flow. Some loops were omitted!
-
+
+ Pseudo code (from datasheet) left in to illustrate
+ the intended instruction flow. Some loops were omitted!
+
USAGE: tie WF (write fault) to ground if not needed:
- MCFG_WD2010_IN_WF_CB(GND)
+ MCFG_WD2010_IN_WF_CB(GND)
Other signals should be set to VCC if not serviced:
MCFG_WD2010_IN_DRDY_CB(VCC) // DRIVE READY = VCC
@@ -34,17 +34,17 @@ Implements WD2010 / WD1010 controller basics.
**********************************************************************/
// WD 2010 CONFIGURATION (2048 cylinder limit)
-#define STEP_LIMIT 2048
-#define CYLINDER_HIGH_MASK 0x07
+#define STEP_LIMIT 2048
+#define CYLINDER_HIGH_MASK 0x07
// DEC RD51 chip; different STEP / CYLINDER LIMIT (**):
-// WD 1010 CONFIGURATION (1024 cylinder limit)
-// #define STEP_LIMIT 1024
-// #define CYLINDER_HIGH_MASK 0x03
+// WD 1010 CONFIGURATION (1024 cylinder limit)
+// #define STEP_LIMIT 1024
+// #define CYLINDER_HIGH_MASK 0x03
// --------------------------------------------------------
-#define MAX_MFM_SECTORS 17 // STANDARD MFM SECTORS/TRACK
+#define MAX_MFM_SECTORS 17 // STANDARD MFM SECTORS/TRACK
// --------------------------------------------------------
@@ -229,7 +229,7 @@ READ8_MEMBER(wd2010_device::read)
switch (offset)
{
case TASK_FILE_ERROR:
- if (m_status & STATUS_CIP) // "if other registers are read while CIP, the status register contents are returned."
+ if (m_status & STATUS_CIP) // "if other registers are read while CIP, the status register contents are returned."
data = (m_in_drdy_cb() ? 0x40 : 0) | (m_in_wf_cb() ? 0x20 : 0) | (m_in_sc_cb() ? 0x10 : 0) | m_status;// see STATUS register
else
data = m_error;
@@ -245,7 +245,6 @@ READ8_MEMBER(wd2010_device::read)
if (offset == TASK_FILE_SDH_REGISTER)
{
-
logerror("(READ) %s WD2010 '%s' SDH: %u\n", machine().describe_context(), tag(), data);
logerror("(READ) %s WD2010 '%s' Head: %u\n", machine().describe_context(), tag(), HEAD);
logerror("(READ) %s WD2010 '%s' Drive: %u\n", machine().describe_context(), tag(), DRIVE);
@@ -302,7 +301,7 @@ WRITE8_MEMBER(wd2010_device::write)
case TASK_FILE_COMMAND:
m_out_intrq_cb(CLEAR_LINE); // "either reading the status register or writing a new command clears INTRQ"
m_status &= ~(STATUS_ERR | STATUS_BSY | STATUS_CIP); // "Reset ERR bit in STATUS upon new cmd" (see datasheet)
- m_error = 0;
+ m_error = 0;
if (data == COMMAND_COMPUTE_CORRECTION)
{
@@ -381,8 +380,8 @@ void wd2010_device::set_parameter(UINT8 data)
//-------------------------------------------------
void wd2010_device::restore(UINT8 data)
{
- UINT8 newstatus = STATUS_RDY | STATUS_SC;
-
+ UINT8 newstatus = STATUS_RDY | STATUS_SC;
+
m_out_intrq_cb(CLEAR_LINE); // reset INTRQ, errors, set BUSY, CIP
m_error = 0;
m_status = STATUS_BSY | STATUS_CIP;
@@ -408,8 +407,8 @@ void wd2010_device::restore(UINT8 data)
m_out_bcr_cb(0); // pulse BCR
m_out_bcr_cb(1);
- m_error = ERROR_AC; // ERROR : ABORTED COMMAND
- complete_cmd(newstatus | STATUS_ERR);
+ m_error = ERROR_AC; // ERROR : ABORTED COMMAND
+ complete_cmd(newstatus | STATUS_ERR);
return;
}
}
@@ -419,7 +418,7 @@ void wd2010_device::restore(UINT8 data)
{
m_out_bcr_cb(0); // pulse BCR
m_out_bcr_cb(1);
- newstatus &= ~(STATUS_BSY | STATUS_CIP); // prepare new status; (INTRQ later) reset BSY, CIP
+ newstatus &= ~(STATUS_BSY | STATUS_CIP); // prepare new status; (INTRQ later) reset BSY, CIP
complete_cmd(newstatus);
return;
}
@@ -431,7 +430,7 @@ void wd2010_device::restore(UINT8 data)
m_out_bcr_cb(0); // pulse BCR
m_out_bcr_cb(1);
- newstatus &= ~(STATUS_BSY | STATUS_CIP); // prepare new status; (INTRQ later) reset BSY, CIP
+ newstatus &= ~(STATUS_BSY | STATUS_CIP); // prepare new status; (INTRQ later) reset BSY, CIP
complete_cmd(newstatus);
return;
}
@@ -452,12 +451,12 @@ void wd2010_device::restore(UINT8 data)
// NOT IMPLEMENTED: IMPLIED SEEK ("wait until rising edge of SC signal")
void wd2010_device::seek(UINT8 data)
-{
- UINT8 newstatus = STATUS_RDY | STATUS_SC;
+{
+ UINT8 newstatus = STATUS_RDY | STATUS_SC;
m_out_intrq_cb(CLEAR_LINE); // reset INTRQ, errors, set BUSY, CIP
m_error = 0;
- m_status = STATUS_BSY | STATUS_CIP;
+ m_status = STATUS_BSY | STATUS_CIP;
// TODO : store STEP RATE.
@@ -472,12 +471,12 @@ void wd2010_device::seek(UINT8 data)
if (m_present_cylinder > cylinder_registers)
{
step_pulses = m_present_cylinder - cylinder_registers;
- direction = 0;
+ direction = 0;
}
else
{
step_pulses = cylinder_registers - m_present_cylinder;
- direction = 1;
+ direction = 1;
}
logerror("SEEK - direction = %u, step_pulses = %u\n", direction, step_pulses);
m_out_dirin_cb(direction);
@@ -490,10 +489,10 @@ void wd2010_device::seek(UINT8 data)
}
else
{
- while (step_pulses > 0) // issue STEP PULSES
+ while (step_pulses > 0) // issue STEP PULSES
{
- if (direction == 0)
- {
+ if (direction == 0)
+ {
m_out_step_cb(1); // issue a step pulse
m_out_step_cb(0);
@@ -528,13 +527,13 @@ void wd2010_device::seek(UINT8 data)
logerror("SEEK (END) - m_present_cylinder = %u\n", m_present_cylinder);
- cmd_timer->adjust(attotime::from_msec(35), newstatus); // 35 msecs makes "SEEK_TIMING" test happy.
+ cmd_timer->adjust(attotime::from_msec(35), newstatus); // 35 msecs makes "SEEK_TIMING" test happy.
}
//-------------------------------------------------
// read_sector -
//-------------------------------------------------
-// FIXME: multiple sector transfers, ID / CYL / HEAD / SIZE match
+// FIXME: multiple sector transfers, ID / CYL / HEAD / SIZE match
// + ERROR HANDLING (...)
void wd2010_device::read_sector(UINT8 data)
{
@@ -548,11 +547,11 @@ void wd2010_device::read_sector(UINT8 data)
// Assume: drive NO # has not changed... (else: SCAN_ID; GET CYL#)
auto_scan_id(data); // has drive number changed?
- // CYL REGISTERS and INTERNAL CYL. SAME ?
+ // CYL REGISTERS and INTERNAL CYL. SAME ?
// TODO: < NOT SAME? THEN _SEEK_ >
- // DRIVE NOT READY? OR WF?
- if ( (!m_in_drdy_cb()) || m_in_wf_cb() )
+ // DRIVE NOT READY? OR WF?
+ if ( (!m_in_drdy_cb()) || m_in_wf_cb() )
{
m_error = ERROR_AC; // ABORTED_COMMAND
complete_cmd(newstatus | STATUS_ERR);
@@ -564,7 +563,7 @@ void wd2010_device::read_sector(UINT8 data)
m_out_bcr_cb(0); // strobe BCR
m_out_bcr_cb(1);
-
+
if (!m_in_drdy_cb()) // DRIVE NOT READY?
{
m_error = ERROR_AC; // ABORTED_COMMAND
@@ -576,7 +575,7 @@ void wd2010_device::read_sector(UINT8 data)
// < SEARCH FOR ID FIELD >
// < CYL / HEAD / SEC.SIZE MATCH ? >
- // < ID NOT FOUND >
+ // < ID NOT FOUND >
if (SECTOR_NUMBER > MAX_MFM_SECTORS)
{
// prepare new status; (later IRQ +) reset BSY, CIP
@@ -587,8 +586,8 @@ void wd2010_device::read_sector(UINT8 data)
// LOOP OVER 10 INDEXES : SCAN_ID / GET CYL.# (not implemented: ID NOT FOUND)
- // CYL / HEAD / SEC.SIZE MATCH ? => (ID FOUND)
- //
+ // CYL / HEAD / SEC.SIZE MATCH ? => (ID FOUND)
+ //
// NO "BAD BLOCK DETECT" (** NOT IMPLEMENTED **)
// NO "CRC ERROR" (** NOT IMPLEMENTED **)
// AND "DAM FOUND" (** NOT IMPLEMENTED **)
@@ -618,7 +617,7 @@ void wd2010_device::read_sector(UINT8 data)
// reset BUSY (* after * TRANSFER OF SECTOR in READ)
m_status &= ~(STATUS_BSY);
- // FLAG "I" SET?
+ // FLAG "I" SET?
if (!(data & 8)) // (I = 0 INTRQ occurs with BDRQ/DRQ indicating the Sector Buffer is full...)
{
m_out_intrq_cb(ASSERT_LINE);
@@ -627,7 +626,7 @@ void wd2010_device::read_sector(UINT8 data)
}
else
{
- intrq_at_end = 0; // (default): (I = 1 INTRQ occurs when the command is completed and the Host has read the Sector Buffer)
+ intrq_at_end = 0; // (default): (I = 1 INTRQ occurs when the command is completed and the Host has read the Sector Buffer)
}
// (WAIT FOR): BRDY LOW TO HIGH? (see -> TIMER)
@@ -636,7 +635,7 @@ void wd2010_device::read_sector(UINT8 data)
} // DRIVE_READY ? (outer)
- // NOTE : (intrq_at_end = 0) - INTRQ occurs when the command is completed
+ // NOTE : (intrq_at_end = 0) - INTRQ occurs when the command is completed
newstatus |= (m_status & ~(STATUS_CIP | STATUS_DRQ)) | intrq_at_end; // de-assert CIP + DRQ (BSY already reset)
deassert_read_when_buffer_ready_high->adjust(attotime::from_usec(1), newstatus); // complete command ON *RISING EDGE * OF BUFFER_READY
@@ -652,7 +651,7 @@ void wd2010_device::write_sector(UINT8 data)
{
m_error = 0; // De-assert ERROR + DRQ
m_status &= ~(STATUS_DRQ);
-
+
m_status = STATUS_BSY | STATUS_CIP; // Assert BUSY + CIP
m_status |= STATUS_DRQ; // Assert BDRQ + DRQ (= status bit 3)
@@ -673,13 +672,13 @@ void wd2010_device::complete_write_sector(UINT8 data)
m_out_bdrq_cb(0); // DE-Assert BDRQ (...and DRQ !)
m_status &= ~(STATUS_DRQ);
- // (When drive changed) : SCAN_ID / GET CYL#
+ // (When drive changed) : SCAN_ID / GET CYL#
auto_scan_id(data); // has drive number changed? (*** UNIMPLEMENTED ***)
// Assume YES : CYL.register + internal CYL.register SAME? (if NO => SEEK!)
// Assume : SEEK_COMPLETE = YES
- if (!m_in_drdy_cb() || m_in_wf_cb()) // DRIVE IS READY / NO WF?
+ if (!m_in_drdy_cb() || m_in_wf_cb()) // DRIVE IS READY / NO WF?
{
m_error = ERROR_AC; // ABORTED_COMMAND
complete_cmd(newstatus | STATUS_ERR);
@@ -692,10 +691,10 @@ void wd2010_device::complete_write_sector(UINT8 data)
// < Correct ID found >
// (*** UNIMPLEMENTED ***) : 'ID NOT FOUND' - set bit 4 error register
- // ........................: => SCAN_ID => RE-SEEK (2-10 INDEX PULSES) / Set ERR bit 0 status register ..
+ // ........................: => SCAN_ID => RE-SEEK (2-10 INDEX PULSES) / Set ERR bit 0 status register ..
m_status &= ~(STATUS_SC); // "WRITE_GATE valid when SEEK_COMPLETE = 0" (see Rainbow 100 Addendum!)
-
+
m_out_bcs_cb(1);
m_out_wg_cb(1); // (!)
@@ -728,7 +727,7 @@ void wd2010_device::complete_write_sector(UINT8 data)
// ******************************************************
// AUTO SCAN-ID (whenever DRIVE # changes):
- // * does nothing right now *
+ // * does nothing right now *
// ******************************************************
void wd2010_device::auto_scan_id(UINT8 data)
{
@@ -774,7 +773,7 @@ void wd2010_device::update_sdh(UINT8 new_sector_size, UINT8 new_head, UINT16 new
// Reads the cylinder number from the track on which the heads are PRESENTLY located,
// and writes this into the Present Cylinder Position Register.
-// FIXME: NO ID HANDLING (ID FOUND / NOT FOUND), NO BAD BLOCK; NO CRC
+// FIXME: NO ID HANDLING (ID FOUND / NOT FOUND), NO BAD BLOCK; NO CRC
void wd2010_device::scan_id(UINT8 data)
{
UINT8 newstatus = STATUS_RDY;
@@ -787,7 +786,7 @@ void wd2010_device::scan_id(UINT8 data)
// < TODO: Search for ANY ID FIELD. >
// Assume ID FOUND :
- update_sdh( 32, 0, 0, 1 ); // (NEW:) SECTOR_SIZE, HEAD, CYLINDER, SECTOR_NR
+ update_sdh( 32, 0, 0, 1 ); // (NEW:) SECTOR_SIZE, HEAD, CYLINDER, SECTOR_NR
// NO BAD BLOCK.
// NO CRC ERROR.
@@ -807,9 +806,9 @@ void wd2010_device::scan_id(UINT8 data)
// < UNIMPLEMENTED: (IMPLIED) SEEKs, INDEX, CRC and GAPs >
//--------------------------------------------------------
// SECTOR_COUNT REG.= 'total # of sectors to be formatted'
-// (raw number; no multiplication) = 16 decimal on RD51
+// (raw number; no multiplication) = 16 decimal on RD51
-// SECTOR NUMBER REG.= number of bytes - 3 (for GAP 1 + 3)
+// SECTOR NUMBER REG.= number of bytes - 3 (for GAP 1 + 3)
// = 40 decimal on DEC RD51 with WUTIL 3.2
//--------------------------------------------------------
void wd2010_device::format(UINT8 data)
@@ -836,10 +835,10 @@ void wd2010_device::format(UINT8 data)
// TODO: Seek to desired cylinder
// Assume : SEEK COMPLETE.
- m_out_bcr_cb(0); // strobe BCR
+ m_out_bcr_cb(0); // strobe BCR
m_out_bcr_cb(1);
- m_out_bcs_cb(1); // activate BCS (!)
+ m_out_bcs_cb(1); // activate BCS (!)
if (!m_in_drdy_cb() || m_in_wf_cb())
{
@@ -849,10 +848,10 @@ void wd2010_device::format(UINT8 data)
}
// WAIT FOR INDEX
-
- m_out_wg_cb(1); // Have Index, activate WRITE GATE
- // Check for WRITE FAULT (WF)
+ m_out_wg_cb(1); // Have Index, activate WRITE GATE
+
+ // Check for WRITE FAULT (WF)
if (m_in_wf_cb())
{
m_error = ERROR_AC; // ABORTED_COMMAND
@@ -860,28 +859,28 @@ void wd2010_device::format(UINT8 data)
return;
}
- // UINT8 format_sector_count = m_task_file[TASK_FILE_SECTOR_COUNT];
- // do
- // {
- // < WRITE GAP 1 or GAP 3 >
+ // UINT8 format_sector_count = m_task_file[TASK_FILE_SECTOR_COUNT];
+ // do
+ // {
+ // < WRITE GAP 1 or GAP 3 >
- // < Wait for SEEK_COMPLETE=1 (extend GAP if SEEK_COMPLETE = 0) >
- // < Assume SEEK COMPLETE >
+ // < Wait for SEEK_COMPLETE=1 (extend GAP if SEEK_COMPLETE = 0) >
+ // < Assume SEEK COMPLETE >
- // format_sector_count--;
- // if (format_sector_count != 0)
+ // format_sector_count--;
+ // if (format_sector_count != 0)
{
// The Rainbow 100 driver does ignore multiple sector
// transfers so WRITE FORMAT does not actually write -
m_out_wg_cb(0); // (transition from WG 1 -> 0)
- // NOTE: decrementing TASK_FILE_SECTOR_COUNT does * NOT WORK *
+ // NOTE: decrementing TASK_FILE_SECTOR_COUNT does * NOT WORK *
}
- // else
- // { // < Write 4Es until INDEX (*** UNIMPLEMENTED ****) >
- // }
- // } while (format_sector_count > 0);
+ // else
+ // { // < Write 4Es until INDEX (*** UNIMPLEMENTED ****) >
+ // }
+ // } while (format_sector_count > 0);
// ** DELAY INTRQ UNTIL WRITE IS COMPLETE :
complete_write_when_buffer_ready_high->adjust(attotime::from_usec(1), newstatus | STATUS_DRQ); // 1 USECs
@@ -889,7 +888,7 @@ void wd2010_device::format(UINT8 data)
// *************************************
-// INTERNAL
+// INTERNAL
// *************************************
void wd2010_device::buffer_ready(bool state)
{
@@ -906,7 +905,7 @@ void wd2010_device::device_timer(emu_timer &timer, device_timer_id tid, int para
complete_immediate(param);
break;
- case COMPLETE_WRITE_SECTOR: // when BUFFER_READY -> HIGH
+ case COMPLETE_WRITE_SECTOR: // when BUFFER_READY -> HIGH
if (is_buffer_ready)
{
complete_write_when_buffer_ready_high->adjust(attotime::never);
@@ -914,25 +913,25 @@ void wd2010_device::device_timer(emu_timer &timer, device_timer_id tid, int para
}
else
{
- complete_write_when_buffer_ready_high->reset();
+ complete_write_when_buffer_ready_high->reset();
complete_write_when_buffer_ready_high->adjust(attotime::from_usec(1), param); // DELAY ANOTHER 1 USEC (!)
}
break;
- case DE_ASSERT_WRITE: // waiting for BUFFER_READY -> LOW
- if (!(is_buffer_ready))
+ case DE_ASSERT_WRITE: // waiting for BUFFER_READY -> LOW
+ if (!(is_buffer_ready))
{
deassert_write_when_buffer_ready_low->adjust(attotime::never);
complete_immediate(param);
}
else
{
- deassert_write_when_buffer_ready_low->reset();
+ deassert_write_when_buffer_ready_low->reset();
deassert_write_when_buffer_ready_low->adjust(attotime::from_usec(1), param); // DELAY ANOTHER 1 USEC (!)
}
break;
- case DE_ASSERT_READ: // when BUFFER_READY -> HIGH
+ case DE_ASSERT_READ: // when BUFFER_READY -> HIGH
if (is_buffer_ready)
{
deassert_read_when_buffer_ready_high->adjust(attotime::never);
@@ -945,7 +944,7 @@ void wd2010_device::device_timer(emu_timer &timer, device_timer_id tid, int para
}
else
{
- deassert_read_when_buffer_ready_high->reset();
+ deassert_read_when_buffer_ready_high->reset();
deassert_read_when_buffer_ready_high->adjust(attotime::from_usec(1), param); // DELAY ANOTHER 1 USEC (!)
}
break;
@@ -962,7 +961,7 @@ void wd2010_device::complete_immediate(UINT8 status)
status &= ~(STATUS_RDY | STATUS_WF | STATUS_SC); // RDY 0x40 / WF 0x20 / SC 0x10
status |= (m_in_drdy_cb() ? 0x40 : 0) | (m_in_wf_cb() ? 0x20 : 0) | (m_in_sc_cb() ? 0x10 : 0);
- if (status & STATUS_DRQ) // if DRQ was set, reset
+ if (status & STATUS_DRQ) // if DRQ was set, reset
{
status &= ~(STATUS_DRQ);
m_out_bdrq_cb(0);
@@ -980,7 +979,7 @@ void wd2010_device::complete_immediate(UINT8 status)
m_out_bcs_cb(0); // de-assert BCS (needed)
m_out_wg_cb(0); // deactivate WG (required by write / format)
- m_out_bcr_cb(0); // strobe BCR
+ m_out_bcr_cb(0); // strobe BCR
m_out_bcr_cb(1);
}
@@ -988,4 +987,3 @@ void wd2010_device::complete_cmd(UINT8 status)
{
cmd_timer->adjust(attotime::from_msec(1), status);
}
-
diff --git a/src/emu/sound/fm.c b/src/emu/sound/fm.c
index cbfe2501a5e..3782790409f 100644
--- a/src/emu/sound/fm.c
+++ b/src/emu/sound/fm.c
@@ -1,5 +1,5 @@
// license:???
-// copyright-holders:Jarek Burczynski,Tatsuyuki Satoh
+// copyright-holders:Jarek Burczynski,Tatsuyuki Satoh
#define YM2610B_WARNING
/*
diff --git a/src/emu/sound/s14001a.c b/src/emu/sound/s14001a.c
index 7430be3cc0c..50cca284241 100644
--- a/src/emu/sound/s14001a.c
+++ b/src/emu/sound/s14001a.c
@@ -599,7 +599,7 @@ void s14001a_device::device_start()
}
m_stream = machine().sound().stream_alloc(*this, 0, 1, clock() ? clock() : machine().sample_rate());
-
+
save_item(NAME(m_WordInput));
save_item(NAME(m_LatchedWord));
save_item(NAME(m_SyllableAddress));
@@ -619,7 +619,7 @@ void s14001a_device::device_start()
save_item(NAME(m_DACOutput));
save_item(NAME(m_audioout));
save_item(NAME(m_filtervals));
- save_item(NAME(m_VSU1000_amp));
+ save_item(NAME(m_VSU1000_amp));
}
//-------------------------------------------------
diff --git a/src/emu/video/315_5124.c b/src/emu/video/315_5124.c
index 6e43a4d9510..b7a454f46ab 100644
--- a/src/emu/video/315_5124.c
+++ b/src/emu/video/315_5124.c
@@ -115,7 +115,7 @@ PALETTE_INIT_MEMBER(sega315_5124_device, sega315_5124)
palette.set_pen_color(i, pal2bit(r), pal2bit(g), pal2bit(b));
}
/* sms and sg1000-mark3 uses a different palette for modes 0 to 3 - see http://www.smspower.org/Development/Palette */
- /* TMS9918 palette */
+ /* TMS9918 palette */
palette.set_pen_color(64+ 0, 0, 0, 0); // palette.set_pen_color(64+ 0, 0, 0, 0);
palette.set_pen_color(64+ 1, 0, 0, 0); // palette.set_pen_color(64+ 1, 0, 0, 0);
palette.set_pen_color(64+ 2, 0, 170, 0); // palette.set_pen_color(64+ 2, 33, 200, 66);
diff --git a/src/emu/video/clgd542x.c b/src/emu/video/clgd542x.c
index acc7d35c5c4..84a7c0b33cf 100644
--- a/src/emu/video/clgd542x.c
+++ b/src/emu/video/clgd542x.c
@@ -277,7 +277,7 @@ void cirrus_gd5428_device::start_bitblt()
if(m_blt_mode & 0x80) // colour expand
{
UINT8 pixel = (vga.memory[m_blt_source_current % vga.svga_intf.vram_size] >> (7-(x % 8)) & 0x01) ? vga.gc.enable_set_reset : vga.gc.set_reset; // use GR0/1/10/11 background/foreground regs
-
+
copy_pixel(pixel, vga.memory[m_blt_dest_current % vga.svga_intf.vram_size]);
if((x % 8) == 7 && !(m_blt_mode & 0x40)) // don't increment if a pattern (it's only 8 bits)
m_blt_source_current++;
@@ -327,7 +327,7 @@ void cirrus_gd5428_device::start_reverse_bitblt()
if(m_blt_mode & 0x80) // colour expand
{
UINT8 pixel = (vga.memory[m_blt_source_current % vga.svga_intf.vram_size] >> (7-(x % 8)) & 0x01) ? vga.gc.enable_set_reset : vga.gc.set_reset; // use GR0/1/10/11 background/foreground regs
-
+
copy_pixel(pixel, vga.memory[m_blt_dest_current % vga.svga_intf.vram_size]);
if((x % 8) == 7 && !(m_blt_mode & 0x40)) // don't decrement if a pattern (it's only 8 bits)
m_blt_source_current--;
@@ -429,7 +429,7 @@ void cirrus_gd5428_device::blit_byte()
void cirrus_gd5428_device::copy_pixel(UINT8 src, UINT8 dst)
{
UINT8 res = src;
-
+
switch(m_blt_rop)
{
case 0x00: // BLACK
@@ -458,7 +458,7 @@ void cirrus_gd5428_device::copy_pixel(UINT8 src, UINT8 dst)
if((res & (~m_blt_trans_colour_mask & 0xff)) == ((m_blt_trans_colour & 0xff) & (~m_blt_trans_colour_mask & 0xff)))
return;
}
-
+
vga.memory[m_blt_dest_current % vga.svga_intf.vram_size] = res;
}
@@ -1269,7 +1269,7 @@ WRITE8_MEMBER(cirrus_gd5428_device::mem_w)
UINT8 cur_mode = pc_vga_choosevideomode();
if(m_blt_system_transfer)
- {
+ {
if(m_blt_mode & 0x80) // colour expand
{
m_blt_system_buffer &= ~(0x000000ff);
diff --git a/src/emu/video/clgd542x.h b/src/emu/video/clgd542x.h
index dcd7f966641..31e1876ef9e 100644
--- a/src/emu/video/clgd542x.h
+++ b/src/emu/video/clgd542x.h
@@ -69,12 +69,12 @@ protected:
UINT16 m_blt_trans_colour;
UINT16 m_blt_trans_colour_mask;
- bool m_blt_system_transfer; // blit from system memory
+ bool m_blt_system_transfer; // blit from system memory
UINT8 m_blt_system_count;
UINT32 m_blt_system_buffer;
UINT16 m_blt_pixel_count;
UINT16 m_blt_scan_count;
-
+
UINT8 m_scratchpad1;
UINT8 m_scratchpad2;
UINT8 m_scratchpad3;