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-rw-r--r--src/emu/cpu/hphybrid/hphybrid.c1620
-rw-r--r--src/emu/cpu/hphybrid/hphybrid.h4
-rw-r--r--src/emu/cpu/m68000/m68kcpu.c12
-rw-r--r--src/emu/cpu/rsp/rsp.c8
-rw-r--r--src/emu/cpu/rsp/rspcp2.c258
-rw-r--r--src/emu/cpu/rsp/rspcp2.h20
-rw-r--r--src/emu/cpu/rsp/vadd.h1
-rw-r--r--src/emu/cpu/rsp/vcl.h2
-rw-r--r--src/emu/cpu/rsp/vmudh.h1
-rw-r--r--src/emu/cpu/rsp/vmulh.h1
-rw-r--r--src/emu/cpu/rsp/vrcpsq.h2
-rw-r--r--src/emu/cpu/rsp/vrsq.h2
-rw-r--r--src/emu/cpu/sh2/sh2.c20
-rw-r--r--src/emu/cpu/sh2/sh2.h12
-rw-r--r--src/emu/cpu/sh2/sh2comn.c9
-rw-r--r--src/emu/cpu/sm510/sm510.c30
-rw-r--r--src/emu/cpu/sm510/sm510.h10
-rw-r--r--src/emu/cpu/sm510/sm510d.c8
-rw-r--r--src/emu/cpu/sm510/sm510op.c4
-rw-r--r--src/emu/cpu/sm510/sm511core.c8
-rw-r--r--src/emu/cpu/ucom4/ucom4.h2
-rw-r--r--src/emu/cpu/ucom4/ucom4op.c2
22 files changed, 1016 insertions, 1020 deletions
diff --git a/src/emu/cpu/hphybrid/hphybrid.c b/src/emu/cpu/hphybrid/hphybrid.c
index 03a36549b60..027a37e03ed 100644
--- a/src/emu/cpu/hphybrid/hphybrid.c
+++ b/src/emu/cpu/hphybrid/hphybrid.c
@@ -6,18 +6,18 @@
#include "hphybrid.h"
enum {
- HPHYBRID_A,
- HPHYBRID_B,
- HPHYBRID_C,
- HPHYBRID_D,
- HPHYBRID_P,
- HPHYBRID_R,
- HPHYBRID_IV,
- HPHYBRID_PA,
- HPHYBRID_DMAPA,
- HPHYBRID_DMAMA,
- HPHYBRID_DMAC,
- HPHYBRID_I
+ HPHYBRID_A,
+ HPHYBRID_B,
+ HPHYBRID_C,
+ HPHYBRID_D,
+ HPHYBRID_P,
+ HPHYBRID_R,
+ HPHYBRID_IV,
+ HPHYBRID_PA,
+ HPHYBRID_DMAPA,
+ HPHYBRID_DMAMA,
+ HPHYBRID_DMAC,
+ HPHYBRID_I
};
#define BIT_MASK(n) (1U << (n))
@@ -51,111 +51,111 @@ const device_type HP_5061_3011 = &device_creator<hp_5061_3011_cpu_device>;
WRITE_LINE_MEMBER(hp_hybrid_cpu_device::dmar_w)
{
- if (state) {
- BIT_SET(m_flags , HPHYBRID_DMAR_BIT);
- } else {
- BIT_CLR(m_flags , HPHYBRID_DMAR_BIT);
- }
+ if (state) {
+ BIT_SET(m_flags , HPHYBRID_DMAR_BIT);
+ } else {
+ BIT_CLR(m_flags , HPHYBRID_DMAR_BIT);
+ }
}
hp_hybrid_cpu_device::hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__),
- m_program_config("program", ENDIANNESS_BIG, 16, 16, -1),
- m_io_config("io", ENDIANNESS_BIG, 16, 6, -1)
+ m_program_config("program", ENDIANNESS_BIG, 16, 16, -1),
+ m_io_config("io", ENDIANNESS_BIG, 16, 6, -1)
{
}
void hp_hybrid_cpu_device::device_start()
{
- m_reg_A = 0;
- m_reg_B = 0;
- m_reg_P = HP_RESET_ADDR;
- m_reg_R = 0;
- m_reg_C = 0;
- m_reg_D = 0;
- m_reg_IV = 0;
- m_reg_PA[ 0 ] = 0;
- m_reg_PA[ 1 ] = 0;
- m_reg_PA[ 2 ] = 0;
- m_flags = 0;
- m_dmapa = 0;
- m_dmama = 0;
- m_dmac = 0;
- m_reg_I = 0;
-
- {
- state_add(HPHYBRID_A, "A", m_reg_A);
- state_add(HPHYBRID_B, "B", m_reg_B);
- state_add(HPHYBRID_C, "C", m_reg_C);
- state_add(HPHYBRID_D, "D", m_reg_D);
- state_add(HPHYBRID_P, "P", m_reg_P);
- state_add(STATE_GENPC, "GENPC", m_reg_P).noshow();
- state_add(HPHYBRID_R, "R", m_reg_R);
- state_add(STATE_GENSP, "GENSP", m_reg_R).noshow();
- state_add(HPHYBRID_IV, "IV", m_reg_IV);
- state_add(HPHYBRID_PA, "PA", m_reg_PA[ 0 ]);
- state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).noshow().formatstr("%9s");
- state_add(HPHYBRID_DMAPA , "DMAPA" , m_dmapa).noshow();
- state_add(HPHYBRID_DMAMA , "DMAMA" , m_dmama).noshow();
- state_add(HPHYBRID_DMAC , "DMAC" , m_dmac).noshow();
- state_add(HPHYBRID_I , "I" , m_reg_I).noshow();
- }
-
- m_program = &space(AS_PROGRAM);
- m_direct = &m_program->direct();
- m_io = &space(AS_IO);
-
- save_item(NAME(m_reg_A));
- save_item(NAME(m_reg_B));
- save_item(NAME(m_reg_C));
- save_item(NAME(m_reg_D));
- save_item(NAME(m_reg_P));
- save_item(NAME(m_reg_R));
- save_item(NAME(m_reg_IV));
- save_item(NAME(m_reg_PA[0]));
- save_item(NAME(m_reg_PA[1]));
- save_item(NAME(m_reg_PA[2]));
- save_item(NAME(m_flags));
- save_item(NAME(m_dmapa));
- save_item(NAME(m_dmama));
- save_item(NAME(m_dmac));
- save_item(NAME(m_reg_I));
-
- m_icountptr = &m_icount;
+ m_reg_A = 0;
+ m_reg_B = 0;
+ m_reg_P = HP_RESET_ADDR;
+ m_reg_R = 0;
+ m_reg_C = 0;
+ m_reg_D = 0;
+ m_reg_IV = 0;
+ m_reg_PA[ 0 ] = 0;
+ m_reg_PA[ 1 ] = 0;
+ m_reg_PA[ 2 ] = 0;
+ m_flags = 0;
+ m_dmapa = 0;
+ m_dmama = 0;
+ m_dmac = 0;
+ m_reg_I = 0;
+
+ {
+ state_add(HPHYBRID_A, "A", m_reg_A);
+ state_add(HPHYBRID_B, "B", m_reg_B);
+ state_add(HPHYBRID_C, "C", m_reg_C);
+ state_add(HPHYBRID_D, "D", m_reg_D);
+ state_add(HPHYBRID_P, "P", m_reg_P);
+ state_add(STATE_GENPC, "GENPC", m_reg_P).noshow();
+ state_add(HPHYBRID_R, "R", m_reg_R);
+ state_add(STATE_GENSP, "GENSP", m_reg_R).noshow();
+ state_add(HPHYBRID_IV, "IV", m_reg_IV);
+ state_add(HPHYBRID_PA, "PA", m_reg_PA[ 0 ]);
+ state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).noshow().formatstr("%9s");
+ state_add(HPHYBRID_DMAPA , "DMAPA" , m_dmapa).noshow();
+ state_add(HPHYBRID_DMAMA , "DMAMA" , m_dmama).noshow();
+ state_add(HPHYBRID_DMAC , "DMAC" , m_dmac).noshow();
+ state_add(HPHYBRID_I , "I" , m_reg_I).noshow();
+ }
+
+ m_program = &space(AS_PROGRAM);
+ m_direct = &m_program->direct();
+ m_io = &space(AS_IO);
+
+ save_item(NAME(m_reg_A));
+ save_item(NAME(m_reg_B));
+ save_item(NAME(m_reg_C));
+ save_item(NAME(m_reg_D));
+ save_item(NAME(m_reg_P));
+ save_item(NAME(m_reg_R));
+ save_item(NAME(m_reg_IV));
+ save_item(NAME(m_reg_PA[0]));
+ save_item(NAME(m_reg_PA[1]));
+ save_item(NAME(m_reg_PA[2]));
+ save_item(NAME(m_flags));
+ save_item(NAME(m_dmapa));
+ save_item(NAME(m_dmama));
+ save_item(NAME(m_dmac));
+ save_item(NAME(m_reg_I));
+
+ m_icountptr = &m_icount;
}
void hp_hybrid_cpu_device::device_reset()
{
- m_reg_P = HP_RESET_ADDR;
- m_reg_I = RM(m_reg_P);
- m_flags = 0;
+ m_reg_P = HP_RESET_ADDR;
+ m_reg_I = RM(m_reg_P);
+ m_flags = 0;
}
void hp_hybrid_cpu_device::execute_run()
{
- do {
- if (BIT(m_flags , HPHYBRID_DMAEN_BIT) && BIT(m_flags , HPHYBRID_DMAR_BIT)) {
- handle_dma();
- } else {
- debugger_instruction_hook(this, m_reg_P);
-
- // Check for interrupts
- check_for_interrupts();
-
- m_reg_I = execute_one(m_reg_I);
- }
- } while (m_icount > 0);
+ do {
+ if (BIT(m_flags , HPHYBRID_DMAEN_BIT) && BIT(m_flags , HPHYBRID_DMAR_BIT)) {
+ handle_dma();
+ } else {
+ debugger_instruction_hook(this, m_reg_P);
+
+ // Check for interrupts
+ check_for_interrupts();
+
+ m_reg_I = execute_one(m_reg_I);
+ }
+ } while (m_icount > 0);
}
void hp_hybrid_cpu_device::execute_set_input(int inputnum, int state)
{
- if (inputnum < HPHYBRID_INT_LVLS) {
- if (state) {
- BIT_SET(m_flags , HPHYBRID_IRH_BIT + inputnum);
- } else {
- BIT_CLR(m_flags , HPHYBRID_IRH_BIT + inputnum);
- }
- }
+ if (inputnum < HPHYBRID_INT_LVLS) {
+ if (state) {
+ BIT_SET(m_flags , HPHYBRID_IRH_BIT + inputnum);
+ } else {
+ BIT_CLR(m_flags , HPHYBRID_IRH_BIT + inputnum);
+ }
+ }
}
/**
@@ -167,14 +167,14 @@ void hp_hybrid_cpu_device::execute_set_input(int inputnum, int state)
*/
UINT16 hp_hybrid_cpu_device::execute_one(UINT16 opcode)
{
- if ((opcode & 0x7fe0) == 0x7000) {
- // EXE
- m_icount -= 8;
- return RM(opcode & 0x1f);
- } else {
- m_reg_P = execute_one_sub(opcode);
- return RM(m_reg_P);
- }
+ if ((opcode & 0x7fe0) == 0x7000) {
+ // EXE
+ m_icount -= 8;
+ return RM(opcode & 0x1f);
+ } else {
+ m_reg_P = execute_one_sub(opcode);
+ return RM(m_reg_P);
+ }
}
/**
@@ -186,773 +186,773 @@ UINT16 hp_hybrid_cpu_device::execute_one(UINT16 opcode)
*/
UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode)
{
- UINT16 ea;
- UINT16 tmp;
-
- switch (opcode & 0x7800) {
- case 0x0000:
- // LDA
- m_icount -= 13;
- m_reg_A = RM(get_ea(opcode));
- break;
-
- case 0x0800:
- // LDB
- m_icount -= 13;
- m_reg_B = RM(get_ea(opcode));
- break;
-
- case 0x1000:
- // CPA
- m_icount -= 16;
- if (m_reg_A != RM(get_ea(opcode))) {
- // Skip next instruction
- return m_reg_P + 2;
- }
- break;
-
- case 0x1800:
- // CPB
- m_icount -= 16;
- if (m_reg_B != RM(get_ea(opcode))) {
- // Skip next instruction
- return m_reg_P + 2;
- }
- break;
-
- case 0x2000:
- // ADA
- m_icount -= 13;
- do_add(m_reg_A , RM(get_ea(opcode)));
- break;
-
- case 0x2800:
- // ADB
- m_icount -= 13;
- do_add(m_reg_B , RM(get_ea(opcode)));
- break;
-
- case 0x3000:
- // STA
- m_icount -= 13;
- WM(get_ea(opcode) , m_reg_A);
- break;
-
- case 0x3800:
- // STB
- m_icount -= 13;
- WM(get_ea(opcode) , m_reg_B);
- break;
-
- case 0x4000:
- // JSM
- m_icount -= 17;
- WM(++m_reg_R , m_reg_P);
- return get_ea(opcode);
-
- case 0x4800:
- // ISZ
- m_icount -= 19;
- ea = get_ea(opcode);
- tmp = RM(ea) + 1;
- WM(ea , tmp);
- if (tmp == 0) {
- // Skip next instruction
- return m_reg_P + 2;
- }
- break;
-
- case 0x5000:
- // AND
- m_icount -= 13;
- m_reg_A &= RM(get_ea(opcode));
- break;
-
- case 0x5800:
- // DSZ
- m_icount -= 19;
- ea = get_ea(opcode);
- tmp = RM(ea) - 1;
- WM(ea , tmp);
- if (tmp == 0) {
- // Skip next instruction
- return m_reg_P + 2;
- }
- break;
-
- case 0x6000:
- // IOR
- m_icount -= 13;
- m_reg_A |= RM(get_ea(opcode));
- break;
-
- case 0x6800:
- // JMP
- m_icount -= 8;
- return get_ea(opcode);
-
- default:
- switch (opcode & 0xfec0) {
- case 0x7400:
- // RZA
- // SZA
- m_icount -= 14;
- return get_skip_addr(opcode , m_reg_A == 0);
-
- case 0x7440:
- // RIA
- // SIA
- m_icount -= 14;
- return get_skip_addr(opcode , m_reg_A++ == 0);
-
- case 0x7480:
- // SFS
- // SFC
- m_icount -= 14;
- // TODO: read flag bit
- return get_skip_addr(opcode , true);
-
- case 0x7C00:
- // RZB
- // SZB
- m_icount -= 14;
- return get_skip_addr(opcode , m_reg_B == 0);
-
- case 0x7C40:
- // RIB
- // SIB
- m_icount -= 14;
- return get_skip_addr(opcode , m_reg_B++ == 0);
-
- case 0x7c80:
- // SSS
- // SSC
- m_icount -= 14;
- // TODO: read status bit
- return get_skip_addr(opcode , true);
-
- case 0x7cc0:
- // SHS
- // SHC
- m_icount -= 14;
- return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_HALT_BIT));
-
- default:
- switch (opcode & 0xfe00) {
- case 0x7600:
- // SLA
- // RLA
- m_icount -= 14;
- return get_skip_addr_sc(opcode , m_reg_A , 0);
-
- case 0x7e00:
- // SLB
- // RLB
- m_icount -= 14;
- return get_skip_addr_sc(opcode , m_reg_B , 0);
-
- case 0xf400:
- // SAP
- // SAM
- m_icount -= 14;
- return get_skip_addr_sc(opcode , m_reg_A , 15);
-
- case 0xf600:
- // SOC
- // SOS
- m_icount -= 14;
- return get_skip_addr_sc(opcode , m_flags , HPHYBRID_O_BIT);
-
- case 0xfc00:
- // SBP
- // SBM
- m_icount -= 14;
- return get_skip_addr_sc(opcode , m_reg_B , 15);
-
- case 0xfe00:
- // SEC
- // SES
- m_icount -= 14;
- return get_skip_addr_sc(opcode , m_flags , HPHYBRID_C_BIT);
-
- default:
- switch (opcode & 0xfff0) {
- case 0xf100:
- // AAR
- tmp = (opcode & 0xf) + 1;
- m_icount -= (9 + tmp);
- // A shift by 16 positions is equivalent to a shift by 15
- tmp = tmp > 15 ? 15 : tmp;
- m_reg_A = ((m_reg_A ^ 0x8000) >> tmp) - (0x8000 >> tmp);
- break;
-
- case 0xf900:
- // ABR
- tmp = (opcode & 0xf) + 1;
- m_icount -= (9 + tmp);
- tmp = tmp > 15 ? 15 : tmp;
- m_reg_B = ((m_reg_B ^ 0x8000) >> tmp) - (0x8000 >> tmp);
- break;
-
- case 0xf140:
- // SAR
- tmp = (opcode & 0xf) + 1;
- m_icount -= (9 + tmp);
- m_reg_A >>= tmp;
- break;
-
- case 0xf940:
- // SBR
- tmp = (opcode & 0xf) + 1;
- m_icount -= (9 + tmp);
- m_reg_B >>= tmp;
- break;
-
- case 0xf180:
- // SAL
- tmp = (opcode & 0xf) + 1;
- m_icount -= (9 + tmp);
- m_reg_A <<= tmp;
- break;
-
- case 0xf980:
- // SBL
- tmp = (opcode & 0xf) + 1;
- m_icount -= (9 + tmp);
- m_reg_B <<= tmp;
- break;
-
- case 0xf1c0:
- // RAR
- tmp = (opcode & 0xf) + 1;
- m_icount -= (9 + tmp);
- m_reg_A = (m_reg_A >> tmp) | (m_reg_A << (16 - tmp));
- break;
-
- case 0xf9c0:
- // RBR
- tmp = (opcode & 0xf) + 1;
- m_icount -= (9 + tmp);
- m_reg_B = (m_reg_B >> tmp) | (m_reg_B << (16 - tmp));
- break;
-
- default:
- if ((opcode & 0xf760) == 0x7160) {
- // Place/withdraw instructions
- m_icount -= 23;
- do_pw(opcode);
- } else if ((opcode & 0xff80) == 0xf080) {
- // RET
- m_icount -= 16;
- if (BIT(opcode , 6)) {
- // Pop PA stack
- if (BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) {
- BIT_CLR(m_flags , HPHYBRID_IRH_SVC_BIT);
- memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS);
- } else if (BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
- BIT_CLR(m_flags , HPHYBRID_IRL_SVC_BIT);
- memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS);
- }
- }
- tmp = RM(m_reg_R--) + (opcode & 0x1f);
- return BIT(opcode , 5) ? tmp - 0x20 : tmp;
- } else {
- switch (opcode) {
- case 0x7100:
- // SDO
- m_icount -= 12;
- BIT_SET(m_flags , HPHYBRID_DMADIR_BIT);
- break;
-
- case 0x7108:
- // SDI
- m_icount -= 12;
- BIT_CLR(m_flags , HPHYBRID_DMADIR_BIT);
- break;
-
- case 0x7110:
- // EIR
- m_icount -= 12;
- BIT_SET(m_flags , HPHYBRID_INTEN_BIT);
- break;
-
- case 0x7118:
- // DIR
- m_icount -= 12;
- BIT_CLR(m_flags , HPHYBRID_INTEN_BIT);
- break;
-
- case 0x7120:
- // DMA
- m_icount -= 12;
- BIT_SET(m_flags , HPHYBRID_DMAEN_BIT);
- break;
-
- case 0x7138:
- // DDR
- m_icount -= 12;
- BIT_CLR(m_flags , HPHYBRID_DMAEN_BIT);
- break;
-
- case 0x7140:
- // DBL
- m_icount -= 12;
- BIT_CLR(m_flags , HPHYBRID_DB_BIT);
- break;
-
- case 0x7148:
- // CBL
- m_icount -= 12;
- BIT_CLR(m_flags , HPHYBRID_CB_BIT);
- break;
-
- case 0x7150:
- // DBU
- m_icount -= 12;
- BIT_SET(m_flags , HPHYBRID_DB_BIT);
- break;
-
- case 0x7158:
- // CBU
- m_icount -= 12;
- BIT_SET(m_flags , HPHYBRID_CB_BIT);
- break;
-
- case 0xf020:
- // TCA
- m_icount -= 9;
- m_reg_A = ~m_reg_A;
- do_add(m_reg_A , 1);
- break;
-
- case 0xf060:
- // CMA
- m_icount -= 9;
- m_reg_A = ~m_reg_A;
- break;
-
- case 0xf820:
- // TCB
- m_icount -= 9;
- m_reg_B = ~m_reg_B;
- do_add(m_reg_B , 1);
- break;
-
- case 0xf860:
- // CMB
- m_icount -= 9;
- m_reg_B = ~m_reg_B;
- break;
-
- default:
- // Unrecognized instructions: NOP
- // Execution time is fictional
- m_icount -= 6;
- }
- }
- }
- }
- }
- }
-
- return m_reg_P + 1;
+ UINT16 ea;
+ UINT16 tmp;
+
+ switch (opcode & 0x7800) {
+ case 0x0000:
+ // LDA
+ m_icount -= 13;
+ m_reg_A = RM(get_ea(opcode));
+ break;
+
+ case 0x0800:
+ // LDB
+ m_icount -= 13;
+ m_reg_B = RM(get_ea(opcode));
+ break;
+
+ case 0x1000:
+ // CPA
+ m_icount -= 16;
+ if (m_reg_A != RM(get_ea(opcode))) {
+ // Skip next instruction
+ return m_reg_P + 2;
+ }
+ break;
+
+ case 0x1800:
+ // CPB
+ m_icount -= 16;
+ if (m_reg_B != RM(get_ea(opcode))) {
+ // Skip next instruction
+ return m_reg_P + 2;
+ }
+ break;
+
+ case 0x2000:
+ // ADA
+ m_icount -= 13;
+ do_add(m_reg_A , RM(get_ea(opcode)));
+ break;
+
+ case 0x2800:
+ // ADB
+ m_icount -= 13;
+ do_add(m_reg_B , RM(get_ea(opcode)));
+ break;
+
+ case 0x3000:
+ // STA
+ m_icount -= 13;
+ WM(get_ea(opcode) , m_reg_A);
+ break;
+
+ case 0x3800:
+ // STB
+ m_icount -= 13;
+ WM(get_ea(opcode) , m_reg_B);
+ break;
+
+ case 0x4000:
+ // JSM
+ m_icount -= 17;
+ WM(++m_reg_R , m_reg_P);
+ return get_ea(opcode);
+
+ case 0x4800:
+ // ISZ
+ m_icount -= 19;
+ ea = get_ea(opcode);
+ tmp = RM(ea) + 1;
+ WM(ea , tmp);
+ if (tmp == 0) {
+ // Skip next instruction
+ return m_reg_P + 2;
+ }
+ break;
+
+ case 0x5000:
+ // AND
+ m_icount -= 13;
+ m_reg_A &= RM(get_ea(opcode));
+ break;
+
+ case 0x5800:
+ // DSZ
+ m_icount -= 19;
+ ea = get_ea(opcode);
+ tmp = RM(ea) - 1;
+ WM(ea , tmp);
+ if (tmp == 0) {
+ // Skip next instruction
+ return m_reg_P + 2;
+ }
+ break;
+
+ case 0x6000:
+ // IOR
+ m_icount -= 13;
+ m_reg_A |= RM(get_ea(opcode));
+ break;
+
+ case 0x6800:
+ // JMP
+ m_icount -= 8;
+ return get_ea(opcode);
+
+ default:
+ switch (opcode & 0xfec0) {
+ case 0x7400:
+ // RZA
+ // SZA
+ m_icount -= 14;
+ return get_skip_addr(opcode , m_reg_A == 0);
+
+ case 0x7440:
+ // RIA
+ // SIA
+ m_icount -= 14;
+ return get_skip_addr(opcode , m_reg_A++ == 0);
+
+ case 0x7480:
+ // SFS
+ // SFC
+ m_icount -= 14;
+ // TODO: read flag bit
+ return get_skip_addr(opcode , true);
+
+ case 0x7C00:
+ // RZB
+ // SZB
+ m_icount -= 14;
+ return get_skip_addr(opcode , m_reg_B == 0);
+
+ case 0x7C40:
+ // RIB
+ // SIB
+ m_icount -= 14;
+ return get_skip_addr(opcode , m_reg_B++ == 0);
+
+ case 0x7c80:
+ // SSS
+ // SSC
+ m_icount -= 14;
+ // TODO: read status bit
+ return get_skip_addr(opcode , true);
+
+ case 0x7cc0:
+ // SHS
+ // SHC
+ m_icount -= 14;
+ return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_HALT_BIT));
+
+ default:
+ switch (opcode & 0xfe00) {
+ case 0x7600:
+ // SLA
+ // RLA
+ m_icount -= 14;
+ return get_skip_addr_sc(opcode , m_reg_A , 0);
+
+ case 0x7e00:
+ // SLB
+ // RLB
+ m_icount -= 14;
+ return get_skip_addr_sc(opcode , m_reg_B , 0);
+
+ case 0xf400:
+ // SAP
+ // SAM
+ m_icount -= 14;
+ return get_skip_addr_sc(opcode , m_reg_A , 15);
+
+ case 0xf600:
+ // SOC
+ // SOS
+ m_icount -= 14;
+ return get_skip_addr_sc(opcode , m_flags , HPHYBRID_O_BIT);
+
+ case 0xfc00:
+ // SBP
+ // SBM
+ m_icount -= 14;
+ return get_skip_addr_sc(opcode , m_reg_B , 15);
+
+ case 0xfe00:
+ // SEC
+ // SES
+ m_icount -= 14;
+ return get_skip_addr_sc(opcode , m_flags , HPHYBRID_C_BIT);
+
+ default:
+ switch (opcode & 0xfff0) {
+ case 0xf100:
+ // AAR
+ tmp = (opcode & 0xf) + 1;
+ m_icount -= (9 + tmp);
+ // A shift by 16 positions is equivalent to a shift by 15
+ tmp = tmp > 15 ? 15 : tmp;
+ m_reg_A = ((m_reg_A ^ 0x8000) >> tmp) - (0x8000 >> tmp);
+ break;
+
+ case 0xf900:
+ // ABR
+ tmp = (opcode & 0xf) + 1;
+ m_icount -= (9 + tmp);
+ tmp = tmp > 15 ? 15 : tmp;
+ m_reg_B = ((m_reg_B ^ 0x8000) >> tmp) - (0x8000 >> tmp);
+ break;
+
+ case 0xf140:
+ // SAR
+ tmp = (opcode & 0xf) + 1;
+ m_icount -= (9 + tmp);
+ m_reg_A >>= tmp;
+ break;
+
+ case 0xf940:
+ // SBR
+ tmp = (opcode & 0xf) + 1;
+ m_icount -= (9 + tmp);
+ m_reg_B >>= tmp;
+ break;
+
+ case 0xf180:
+ // SAL
+ tmp = (opcode & 0xf) + 1;
+ m_icount -= (9 + tmp);
+ m_reg_A <<= tmp;
+ break;
+
+ case 0xf980:
+ // SBL
+ tmp = (opcode & 0xf) + 1;
+ m_icount -= (9 + tmp);
+ m_reg_B <<= tmp;
+ break;
+
+ case 0xf1c0:
+ // RAR
+ tmp = (opcode & 0xf) + 1;
+ m_icount -= (9 + tmp);
+ m_reg_A = (m_reg_A >> tmp) | (m_reg_A << (16 - tmp));
+ break;
+
+ case 0xf9c0:
+ // RBR
+ tmp = (opcode & 0xf) + 1;
+ m_icount -= (9 + tmp);
+ m_reg_B = (m_reg_B >> tmp) | (m_reg_B << (16 - tmp));
+ break;
+
+ default:
+ if ((opcode & 0xf760) == 0x7160) {
+ // Place/withdraw instructions
+ m_icount -= 23;
+ do_pw(opcode);
+ } else if ((opcode & 0xff80) == 0xf080) {
+ // RET
+ m_icount -= 16;
+ if (BIT(opcode , 6)) {
+ // Pop PA stack
+ if (BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) {
+ BIT_CLR(m_flags , HPHYBRID_IRH_SVC_BIT);
+ memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS);
+ } else if (BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
+ BIT_CLR(m_flags , HPHYBRID_IRL_SVC_BIT);
+ memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS);
+ }
+ }
+ tmp = RM(m_reg_R--) + (opcode & 0x1f);
+ return BIT(opcode , 5) ? tmp - 0x20 : tmp;
+ } else {
+ switch (opcode) {
+ case 0x7100:
+ // SDO
+ m_icount -= 12;
+ BIT_SET(m_flags , HPHYBRID_DMADIR_BIT);
+ break;
+
+ case 0x7108:
+ // SDI
+ m_icount -= 12;
+ BIT_CLR(m_flags , HPHYBRID_DMADIR_BIT);
+ break;
+
+ case 0x7110:
+ // EIR
+ m_icount -= 12;
+ BIT_SET(m_flags , HPHYBRID_INTEN_BIT);
+ break;
+
+ case 0x7118:
+ // DIR
+ m_icount -= 12;
+ BIT_CLR(m_flags , HPHYBRID_INTEN_BIT);
+ break;
+
+ case 0x7120:
+ // DMA
+ m_icount -= 12;
+ BIT_SET(m_flags , HPHYBRID_DMAEN_BIT);
+ break;
+
+ case 0x7138:
+ // DDR
+ m_icount -= 12;
+ BIT_CLR(m_flags , HPHYBRID_DMAEN_BIT);
+ break;
+
+ case 0x7140:
+ // DBL
+ m_icount -= 12;
+ BIT_CLR(m_flags , HPHYBRID_DB_BIT);
+ break;
+
+ case 0x7148:
+ // CBL
+ m_icount -= 12;
+ BIT_CLR(m_flags , HPHYBRID_CB_BIT);
+ break;
+
+ case 0x7150:
+ // DBU
+ m_icount -= 12;
+ BIT_SET(m_flags , HPHYBRID_DB_BIT);
+ break;
+
+ case 0x7158:
+ // CBU
+ m_icount -= 12;
+ BIT_SET(m_flags , HPHYBRID_CB_BIT);
+ break;
+
+ case 0xf020:
+ // TCA
+ m_icount -= 9;
+ m_reg_A = ~m_reg_A;
+ do_add(m_reg_A , 1);
+ break;
+
+ case 0xf060:
+ // CMA
+ m_icount -= 9;
+ m_reg_A = ~m_reg_A;
+ break;
+
+ case 0xf820:
+ // TCB
+ m_icount -= 9;
+ m_reg_B = ~m_reg_B;
+ do_add(m_reg_B , 1);
+ break;
+
+ case 0xf860:
+ // CMB
+ m_icount -= 9;
+ m_reg_B = ~m_reg_B;
+ break;
+
+ default:
+ // Unrecognized instructions: NOP
+ // Execution time is fictional
+ m_icount -= 6;
+ }
+ }
+ }
+ }
+ }
+ }
+
+ return m_reg_P + 1;
}
void hp_hybrid_cpu_device::state_string_export(const device_state_entry &entry, std::string &str)
{
- if (entry.index() == STATE_GENFLAGS) {
- strprintf(str, "%s %s %c %c",
- BIT(m_flags , HPHYBRID_DB_BIT) ? "Db":"..",
- BIT(m_flags , HPHYBRID_CB_BIT) ? "Cb":"..",
- BIT(m_flags , HPHYBRID_O_BIT) ? 'O':'.',
- BIT(m_flags , HPHYBRID_C_BIT) ? 'E':'.');
- }
+ if (entry.index() == STATE_GENFLAGS) {
+ strprintf(str, "%s %s %c %c",
+ BIT(m_flags , HPHYBRID_DB_BIT) ? "Db":"..",
+ BIT(m_flags , HPHYBRID_CB_BIT) ? "Cb":"..",
+ BIT(m_flags , HPHYBRID_O_BIT) ? 'O':'.',
+ BIT(m_flags , HPHYBRID_C_BIT) ? 'E':'.');
+ }
}
offs_t hp_hybrid_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
{
- extern CPU_DISASSEMBLE(hp_hybrid);
- return CPU_DISASSEMBLE_NAME(hp_hybrid)(this, buffer, pc, oprom, opram, options);
+ extern CPU_DISASSEMBLE(hp_hybrid);
+ return CPU_DISASSEMBLE_NAME(hp_hybrid)(this, buffer, pc, oprom, opram, options);
}
UINT16 hp_hybrid_cpu_device::get_ea(UINT16 opcode)
{
- UINT16 base;
- UINT16 off;
-
- if (BIT(opcode , 10)) {
- // Current page
- base = m_reg_P;
- } else {
- // Base page
- base = 0;
- }
-
- off = opcode & 0x3ff;
- if (off & 0x200) {
- off -= 0x400;
- }
-
- base += off;
-
- if (BIT(opcode , 15)) {
- // Indirect addressing
- m_icount -= 6;
- return RM(base);
- } else {
- // Direct addressing
- return base;
- }
+ UINT16 base;
+ UINT16 off;
+
+ if (BIT(opcode , 10)) {
+ // Current page
+ base = m_reg_P;
+ } else {
+ // Base page
+ base = 0;
+ }
+
+ off = opcode & 0x3ff;
+ if (off & 0x200) {
+ off -= 0x400;
+ }
+
+ base += off;
+
+ if (BIT(opcode , 15)) {
+ // Indirect addressing
+ m_icount -= 6;
+ return RM(base);
+ } else {
+ // Direct addressing
+ return base;
+ }
}
void hp_hybrid_cpu_device::do_add(UINT16& addend1 , UINT16 addend2)
{
- UINT32 tmp = addend1 + addend2;
+ UINT32 tmp = addend1 + addend2;
- if (BIT(tmp , 16)) {
- // Carry
- BIT_SET(m_flags , HPHYBRID_C_BIT);
- }
+ if (BIT(tmp , 16)) {
+ // Carry
+ BIT_SET(m_flags , HPHYBRID_C_BIT);
+ }
- if (BIT((tmp ^ addend1) & (tmp ^ addend2) , 15)) {
- // Overflow
- BIT_SET(m_flags , HPHYBRID_O_BIT);
- }
+ if (BIT((tmp ^ addend1) & (tmp ^ addend2) , 15)) {
+ // Overflow
+ BIT_SET(m_flags , HPHYBRID_O_BIT);
+ }
- addend1 = (UINT16)tmp;
+ addend1 = (UINT16)tmp;
}
UINT16 hp_hybrid_cpu_device::get_skip_addr(UINT16 opcode , bool condition) const
{
- bool skip_val = BIT(opcode , 8) != 0;
-
- if (condition == skip_val) {
- UINT16 off = opcode & 0x1f;
-
- if (BIT(opcode , 5)) {
- off -= 0x20;
- }
- return m_reg_P + off;
- } else {
- return m_reg_P + 1;
- }
+ bool skip_val = BIT(opcode , 8) != 0;
+
+ if (condition == skip_val) {
+ UINT16 off = opcode & 0x1f;
+
+ if (BIT(opcode , 5)) {
+ off -= 0x20;
+ }
+ return m_reg_P + off;
+ } else {
+ return m_reg_P + 1;
+ }
}
UINT16 hp_hybrid_cpu_device::get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n)
{
- bool val = BIT(v , n);
+ bool val = BIT(v , n);
- if (BIT(opcode , 7)) {
- if (BIT(opcode , 6)) {
- BIT_SET(v , n);
- } else {
- BIT_CLR(v , n);
- }
- }
+ if (BIT(opcode , 7)) {
+ if (BIT(opcode , 6)) {
+ BIT_SET(v , n);
+ } else {
+ BIT_CLR(v , n);
+ }
+ }
- return get_skip_addr(opcode , val);
+ return get_skip_addr(opcode , val);
}
void hp_hybrid_cpu_device::do_pw(UINT16 opcode)
{
- UINT16 tmp;
- UINT16 reg_addr = opcode & 7;
- UINT16 *ptr_reg;
- UINT16 b_mask;
-
- if (BIT(opcode , 3)) {
- ptr_reg = &m_reg_D;
- b_mask = BIT_MASK(HPHYBRID_DB_BIT);
- } else {
- ptr_reg = &m_reg_C;
- b_mask = BIT_MASK(HPHYBRID_CB_BIT);
- }
-
- if (BIT(opcode , 4)) {
- // Withdraw
- if (BIT(opcode , 11)) {
- // Byte
- UINT32 tmp_addr = (UINT32)(*ptr_reg);
- if (m_flags & b_mask) {
- tmp_addr |= 0x10000;
- }
- tmp = RM((UINT16)(tmp_addr >> 1));
- if (BIT(tmp_addr , 0)) {
- tmp &= 0xff;
- } else {
- tmp >>= 8;
- }
- } else {
- // Word
- tmp = RM(*ptr_reg);
- }
- WM(reg_addr , tmp);
-
- if (BIT(opcode , 7)) {
- // Post-decrement
- if ((*ptr_reg)-- == 0) {
- m_flags ^= b_mask;
- }
- } else {
- // Post-increment
- if (++(*ptr_reg) == 0) {
- m_flags ^= b_mask;
- }
- }
- } else {
- // Place
- if (BIT(opcode , 7)) {
- // Pre-decrement
- if ((*ptr_reg)-- == 0) {
- m_flags ^= b_mask;
- }
- } else {
- // Pre-increment
- if (++(*ptr_reg) == 0) {
- m_flags ^= b_mask;
- }
- }
- tmp = RM(reg_addr);
- if (BIT(opcode , 11)) {
- // Byte
- UINT32 tmp_addr = (UINT32)(*ptr_reg);
- if (m_flags & b_mask) {
- tmp_addr |= 0x10000;
- }
- WMB(tmp_addr , (UINT8)tmp);
- } else {
- // Word
- WM(*ptr_reg , tmp);
- }
- }
+ UINT16 tmp;
+ UINT16 reg_addr = opcode & 7;
+ UINT16 *ptr_reg;
+ UINT16 b_mask;
+
+ if (BIT(opcode , 3)) {
+ ptr_reg = &m_reg_D;
+ b_mask = BIT_MASK(HPHYBRID_DB_BIT);
+ } else {
+ ptr_reg = &m_reg_C;
+ b_mask = BIT_MASK(HPHYBRID_CB_BIT);
+ }
+
+ if (BIT(opcode , 4)) {
+ // Withdraw
+ if (BIT(opcode , 11)) {
+ // Byte
+ UINT32 tmp_addr = (UINT32)(*ptr_reg);
+ if (m_flags & b_mask) {
+ tmp_addr |= 0x10000;
+ }
+ tmp = RM((UINT16)(tmp_addr >> 1));
+ if (BIT(tmp_addr , 0)) {
+ tmp &= 0xff;
+ } else {
+ tmp >>= 8;
+ }
+ } else {
+ // Word
+ tmp = RM(*ptr_reg);
+ }
+ WM(reg_addr , tmp);
+
+ if (BIT(opcode , 7)) {
+ // Post-decrement
+ if ((*ptr_reg)-- == 0) {
+ m_flags ^= b_mask;
+ }
+ } else {
+ // Post-increment
+ if (++(*ptr_reg) == 0) {
+ m_flags ^= b_mask;
+ }
+ }
+ } else {
+ // Place
+ if (BIT(opcode , 7)) {
+ // Pre-decrement
+ if ((*ptr_reg)-- == 0) {
+ m_flags ^= b_mask;
+ }
+ } else {
+ // Pre-increment
+ if (++(*ptr_reg) == 0) {
+ m_flags ^= b_mask;
+ }
+ }
+ tmp = RM(reg_addr);
+ if (BIT(opcode , 11)) {
+ // Byte
+ UINT32 tmp_addr = (UINT32)(*ptr_reg);
+ if (m_flags & b_mask) {
+ tmp_addr |= 0x10000;
+ }
+ WMB(tmp_addr , (UINT8)tmp);
+ } else {
+ // Word
+ WM(*ptr_reg , tmp);
+ }
+ }
}
void hp_hybrid_cpu_device::check_for_interrupts(void)
{
- if (!BIT(m_flags , HPHYBRID_INTEN_BIT) || BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) {
- return;
- }
-
- int irqline;
-
- if (BIT(m_flags , HPHYBRID_IRH_BIT)) {
- // Service high-level interrupt
- BIT_SET(m_flags , HPHYBRID_IRH_SVC_BIT);
- irqline = HPHYBRID_IRH;
- } else if (BIT(m_flags , HPHYBRID_IRL_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
- // Service low-level interrupt
- BIT_SET(m_flags , HPHYBRID_IRL_SVC_BIT);
- irqline = HPHYBRID_IRL;
- } else {
- return;
- }
-
- // Get interrupt vector in low byte
- UINT8 vector = (UINT8)standard_irq_callback(irqline);
- UINT8 new_PA;
-
- // Get highest numbered 1
- // Don't know what happens if vector is 0, here we assume bit 7 = 1
- if (vector == 0) {
- new_PA = 7;
- } else {
- for (new_PA = 7; new_PA && !BIT(vector , 7); new_PA--, vector <<= 1) {
- }
- }
- if (irqline == HPHYBRID_IRH) {
- BIT_SET(new_PA , 3);
- }
-
- // Push PA stack
- memmove(&m_reg_PA[ 1 ] , &m_reg_PA[ 0 ] , HPHYBRID_INT_LVLS);
-
- CURRENT_PA = new_PA;
-
- // Is this correct? Patent @ pg 210 suggests that the whole interrupt recognition sequence
- // lasts for 32 cycles (6 are already accounted for in get_ea for one indirection)
- m_icount -= 26;
-
- // Do a double-indirect JSM IV,I instruction
- WM(++m_reg_R , m_reg_P);
- m_reg_P = RM(get_ea(0xc008));
- m_reg_I = RM(m_reg_P);
+ if (!BIT(m_flags , HPHYBRID_INTEN_BIT) || BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) {
+ return;
+ }
+
+ int irqline;
+
+ if (BIT(m_flags , HPHYBRID_IRH_BIT)) {
+ // Service high-level interrupt
+ BIT_SET(m_flags , HPHYBRID_IRH_SVC_BIT);
+ irqline = HPHYBRID_IRH;
+ } else if (BIT(m_flags , HPHYBRID_IRL_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
+ // Service low-level interrupt
+ BIT_SET(m_flags , HPHYBRID_IRL_SVC_BIT);
+ irqline = HPHYBRID_IRL;
+ } else {
+ return;
+ }
+
+ // Get interrupt vector in low byte
+ UINT8 vector = (UINT8)standard_irq_callback(irqline);
+ UINT8 new_PA;
+
+ // Get highest numbered 1
+ // Don't know what happens if vector is 0, here we assume bit 7 = 1
+ if (vector == 0) {
+ new_PA = 7;
+ } else {
+ for (new_PA = 7; new_PA && !BIT(vector , 7); new_PA--, vector <<= 1) {
+ }
+ }
+ if (irqline == HPHYBRID_IRH) {
+ BIT_SET(new_PA , 3);
+ }
+
+ // Push PA stack
+ memmove(&m_reg_PA[ 1 ] , &m_reg_PA[ 0 ] , HPHYBRID_INT_LVLS);
+
+ CURRENT_PA = new_PA;
+
+ // Is this correct? Patent @ pg 210 suggests that the whole interrupt recognition sequence
+ // lasts for 32 cycles (6 are already accounted for in get_ea for one indirection)
+ m_icount -= 26;
+
+ // Do a double-indirect JSM IV,I instruction
+ WM(++m_reg_R , m_reg_P);
+ m_reg_P = RM(get_ea(0xc008));
+ m_reg_I = RM(m_reg_P);
}
void hp_hybrid_cpu_device::handle_dma(void)
{
- // Patent hints at the fact that terminal count is detected by bit 15 of dmac being 1 after decrementing
- bool tc = BIT(--m_dmac , 15) != 0;
- UINT16 tmp;
-
- if (BIT(m_flags , HPHYBRID_DMADIR_BIT)) {
- // "Outward" DMA: memory -> peripheral
- tmp = RM(m_dmama++);
- WIO(m_dmapa , tc ? 2 : 0 , tmp);
- m_icount -= 10;
- } else {
- // "Inward" DMA: peripheral -> memory
- tmp = RIO(m_dmapa , tc ? 2 : 0);
- WM(m_dmama++ , tmp);
- m_icount -= 9;
- }
-
- // This is the one of the biggest question marks: is the DMA automatically disabled on TC?
- // Here we assume it is. After all it would make no difference because there is no way
- // to read the DMA enable flag back, so each time the DMA is needed it has to be enabled again.
- if (tc) {
- BIT_CLR(m_flags , HPHYBRID_DMAEN_BIT);
- }
+ // Patent hints at the fact that terminal count is detected by bit 15 of dmac being 1 after decrementing
+ bool tc = BIT(--m_dmac , 15) != 0;
+ UINT16 tmp;
+
+ if (BIT(m_flags , HPHYBRID_DMADIR_BIT)) {
+ // "Outward" DMA: memory -> peripheral
+ tmp = RM(m_dmama++);
+ WIO(m_dmapa , tc ? 2 : 0 , tmp);
+ m_icount -= 10;
+ } else {
+ // "Inward" DMA: peripheral -> memory
+ tmp = RIO(m_dmapa , tc ? 2 : 0);
+ WM(m_dmama++ , tmp);
+ m_icount -= 9;
+ }
+
+ // This is the one of the biggest question marks: is the DMA automatically disabled on TC?
+ // Here we assume it is. After all it would make no difference because there is no way
+ // to read the DMA enable flag back, so each time the DMA is needed it has to be enabled again.
+ if (tc) {
+ BIT_CLR(m_flags , HPHYBRID_DMAEN_BIT);
+ }
}
UINT16 hp_hybrid_cpu_device::RM(UINT16 addr)
{
- UINT16 tmp;
-
- if (addr <= HP_REG_LAST_ADDR) {
- // Memory mapped registers
- switch (addr) {
- case HP_REG_A_ADDR:
- return m_reg_A;
-
- case HP_REG_B_ADDR:
- return m_reg_B;
-
- case HP_REG_P_ADDR:
- return m_reg_P;
-
- case HP_REG_R_ADDR:
- return m_reg_R;
-
- case HP_REG_R4_ADDR:
- case HP_REG_R5_ADDR:
- case HP_REG_R6_ADDR:
- case HP_REG_R7_ADDR:
- return RIO(CURRENT_PA , addr - HP_REG_R4_ADDR);
-
- case HP_REG_IV_ADDR:
- // Correct?
- if (!BIT(m_flags , HPHYBRID_IRH_SVC_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
- return m_reg_IV;
- } else {
- return m_reg_IV | CURRENT_PA;
- }
-
- case HP_REG_PA_ADDR:
- return CURRENT_PA;
-
- case HP_REG_DMAPA_ADDR:
- tmp = m_dmapa & HP_REG_PA_MASK;
- if (BIT(m_flags , HPHYBRID_CB_BIT)) {
- BIT_SET(tmp , 15);
- }
- if (BIT(m_flags , HPHYBRID_DB_BIT)) {
- BIT_SET(tmp , 14);
- }
- return tmp;
-
- case HP_REG_DMAMA_ADDR:
- return m_dmama;
-
- case HP_REG_DMAC_ADDR:
- return m_dmac;
-
- case HP_REG_C_ADDR:
- return m_reg_C;
-
- case HP_REG_D_ADDR:
- return m_reg_D;
-
- default:
- // Unknown registers are returned as 0
- return 0;
- }
- } else {
- return m_direct->read_word((offs_t)addr << 1);
- }
+ UINT16 tmp;
+
+ if (addr <= HP_REG_LAST_ADDR) {
+ // Memory mapped registers
+ switch (addr) {
+ case HP_REG_A_ADDR:
+ return m_reg_A;
+
+ case HP_REG_B_ADDR:
+ return m_reg_B;
+
+ case HP_REG_P_ADDR:
+ return m_reg_P;
+
+ case HP_REG_R_ADDR:
+ return m_reg_R;
+
+ case HP_REG_R4_ADDR:
+ case HP_REG_R5_ADDR:
+ case HP_REG_R6_ADDR:
+ case HP_REG_R7_ADDR:
+ return RIO(CURRENT_PA , addr - HP_REG_R4_ADDR);
+
+ case HP_REG_IV_ADDR:
+ // Correct?
+ if (!BIT(m_flags , HPHYBRID_IRH_SVC_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
+ return m_reg_IV;
+ } else {
+ return m_reg_IV | CURRENT_PA;
+ }
+
+ case HP_REG_PA_ADDR:
+ return CURRENT_PA;
+
+ case HP_REG_DMAPA_ADDR:
+ tmp = m_dmapa & HP_REG_PA_MASK;
+ if (BIT(m_flags , HPHYBRID_CB_BIT)) {
+ BIT_SET(tmp , 15);
+ }
+ if (BIT(m_flags , HPHYBRID_DB_BIT)) {
+ BIT_SET(tmp , 14);
+ }
+ return tmp;
+
+ case HP_REG_DMAMA_ADDR:
+ return m_dmama;
+
+ case HP_REG_DMAC_ADDR:
+ return m_dmac;
+
+ case HP_REG_C_ADDR:
+ return m_reg_C;
+
+ case HP_REG_D_ADDR:
+ return m_reg_D;
+
+ default:
+ // Unknown registers are returned as 0
+ return 0;
+ }
+ } else {
+ return m_direct->read_word((offs_t)addr << 1);
+ }
}
void hp_hybrid_cpu_device::WM(UINT16 addr , UINT16 v)
{
- if (addr <= HP_REG_LAST_ADDR) {
- // Memory mapped registers
- switch (addr) {
- case HP_REG_A_ADDR:
- m_reg_A = v;
- break;
-
- case HP_REG_B_ADDR:
- m_reg_B = v;
- break;
-
- case HP_REG_P_ADDR:
- m_reg_P = v;
- break;
-
- case HP_REG_R_ADDR:
- m_reg_R = v;
- break;
-
- case HP_REG_R4_ADDR:
- case HP_REG_R5_ADDR:
- case HP_REG_R6_ADDR:
- case HP_REG_R7_ADDR:
- WIO(CURRENT_PA , addr - HP_REG_R4_ADDR , v);
- break;
-
- case HP_REG_IV_ADDR:
- m_reg_IV = v & HP_REG_IV_MASK;
- break;
-
- case HP_REG_PA_ADDR:
- CURRENT_PA = v & HP_REG_PA_MASK;
- break;
-
- case HP_REG_DMAPA_ADDR:
- m_dmapa = v & HP_REG_PA_MASK;
- break;
-
- case HP_REG_DMAMA_ADDR:
- m_dmama = v;
- break;
-
- case HP_REG_DMAC_ADDR:
- m_dmac = v;
- break;
-
- case HP_REG_C_ADDR:
- m_reg_C = v;
- break;
-
- case HP_REG_D_ADDR:
- m_reg_D = v;
- break;
-
- default:
- // Unknown registers are silently discarded
- break;
- }
- } else {
- m_program->write_word((offs_t)addr << 1 , v);
- }
+ if (addr <= HP_REG_LAST_ADDR) {
+ // Memory mapped registers
+ switch (addr) {
+ case HP_REG_A_ADDR:
+ m_reg_A = v;
+ break;
+
+ case HP_REG_B_ADDR:
+ m_reg_B = v;
+ break;
+
+ case HP_REG_P_ADDR:
+ m_reg_P = v;
+ break;
+
+ case HP_REG_R_ADDR:
+ m_reg_R = v;
+ break;
+
+ case HP_REG_R4_ADDR:
+ case HP_REG_R5_ADDR:
+ case HP_REG_R6_ADDR:
+ case HP_REG_R7_ADDR:
+ WIO(CURRENT_PA , addr - HP_REG_R4_ADDR , v);
+ break;
+
+ case HP_REG_IV_ADDR:
+ m_reg_IV = v & HP_REG_IV_MASK;
+ break;
+
+ case HP_REG_PA_ADDR:
+ CURRENT_PA = v & HP_REG_PA_MASK;
+ break;
+
+ case HP_REG_DMAPA_ADDR:
+ m_dmapa = v & HP_REG_PA_MASK;
+ break;
+
+ case HP_REG_DMAMA_ADDR:
+ m_dmama = v;
+ break;
+
+ case HP_REG_DMAC_ADDR:
+ m_dmac = v;
+ break;
+
+ case HP_REG_C_ADDR:
+ m_reg_C = v;
+ break;
+
+ case HP_REG_D_ADDR:
+ m_reg_D = v;
+ break;
+
+ default:
+ // Unknown registers are silently discarded
+ break;
+ }
+ } else {
+ m_program->write_word((offs_t)addr << 1 , v);
+ }
}
void hp_hybrid_cpu_device::WMB(UINT32 addr , UINT8 v)
{
- if (addr <= (HP_REG_LAST_ADDR * 2 + 1)) {
- // Cannot write bytes to registers
- } else {
- m_program->write_byte(addr , v);
- }
+ if (addr <= (HP_REG_LAST_ADDR * 2 + 1)) {
+ // Cannot write bytes to registers
+ } else {
+ m_program->write_byte(addr , v);
+ }
}
UINT16 hp_hybrid_cpu_device::RIO(UINT8 pa , UINT8 ic)
{
- return m_io->read_word(HP_MAKE_IOADDR(pa, ic) << 1);
+ return m_io->read_word(HP_MAKE_IOADDR(pa, ic) << 1);
}
void hp_hybrid_cpu_device::WIO(UINT8 pa , UINT8 ic , UINT16 v)
{
- m_io->write_word(HP_MAKE_IOADDR(pa, ic) << 1 , v);
+ m_io->write_word(HP_MAKE_IOADDR(pa, ic) << 1 , v);
}
hp_5061_3011_cpu_device::hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
diff --git a/src/emu/cpu/hphybrid/hphybrid.h b/src/emu/cpu/hphybrid/hphybrid.h
index 5ef9f927d0e..7683cce28b6 100644
--- a/src/emu/cpu/hphybrid/hphybrid.h
+++ b/src/emu/cpu/hphybrid/hphybrid.h
@@ -65,7 +65,7 @@
class hp_hybrid_cpu_device : public cpu_device
{
public:
- DECLARE_WRITE_LINE_MEMBER(dmar_w);
+ DECLARE_WRITE_LINE_MEMBER(dmar_w);
protected:
hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname);
@@ -126,7 +126,7 @@ private:
UINT16 get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n);
void do_pw(UINT16 opcode);
void check_for_interrupts(void);
- void handle_dma(void);
+ void handle_dma(void);
UINT16 RM(UINT16 addr);
void WM(UINT16 addr , UINT16 v);
diff --git a/src/emu/cpu/m68000/m68kcpu.c b/src/emu/cpu/m68000/m68kcpu.c
index b925594825d..bc5e7bc9b3d 100644
--- a/src/emu/cpu/m68000/m68kcpu.c
+++ b/src/emu/cpu/m68000/m68kcpu.c
@@ -2336,8 +2336,8 @@ const device_type M68K = &device_creator<m68000_base_device>;
m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, M68K, "M68K", tag, owner, clock, "m68k", __FILE__),
- m_program_config("program", ENDIANNESS_BIG, 16, 24),
- m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, 16, 24)
+ m_program_config("program", ENDIANNESS_BIG, 16, 24),
+ m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, 16, 24)
{
clear_all();
}
@@ -2348,8 +2348,8 @@ m68000_base_device::m68000_base_device(const machine_config &mconfig, const char
m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
const device_type type, UINT32 prg_data_width, UINT32 prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
- m_program_config("program", ENDIANNESS_BIG, prg_data_width, prg_address_bits, 0, internal_map),
- m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, prg_data_width, prg_address_bits, 0, internal_map)
+ m_program_config("program", ENDIANNESS_BIG, prg_data_width, prg_address_bits, 0, internal_map),
+ m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, prg_data_width, prg_address_bits, 0, internal_map)
{
clear_all();
}
@@ -2358,8 +2358,8 @@ m68000_base_device::m68000_base_device(const machine_config &mconfig, const char
m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
const device_type type, UINT32 prg_data_width, UINT32 prg_address_bits, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
- m_program_config("program", ENDIANNESS_BIG, prg_data_width, prg_address_bits),
- m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, prg_data_width, prg_address_bits)
+ m_program_config("program", ENDIANNESS_BIG, prg_data_width, prg_address_bits),
+ m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, prg_data_width, prg_address_bits)
{
clear_all();
}
diff --git a/src/emu/cpu/rsp/rsp.c b/src/emu/cpu/rsp/rsp.c
index edea79ac688..6419282a598 100644
--- a/src/emu/cpu/rsp/rsp.c
+++ b/src/emu/cpu/rsp/rsp.c
@@ -801,9 +801,9 @@ void rsp_device::execute_run()
m_rsp_state->icount = MIN(m_rsp_state->icount, 0);
}
/*m_cop2->dump(op);
- if (((op >> 26) & 0x3f) == 0x3a)
- {
- m_cop2->dump_dmem();
- }*/
+ if (((op >> 26) & 0x3f) == 0x3a)
+ {
+ m_cop2->dump_dmem();
+ }*/
}
}
diff --git a/src/emu/cpu/rsp/rspcp2.c b/src/emu/cpu/rsp/rspcp2.c
index cde6f3b5be8..ab6afed4cbc 100644
--- a/src/emu/cpu/rsp/rspcp2.c
+++ b/src/emu/cpu/rsp/rspcp2.c
@@ -206,9 +206,9 @@ const rsp_cop2::vec_helpers_t rsp_cop2::m_vec_helpers = {
{ 0xffff, 0xffff, 0x0000, 0x0000 }, // L
{ 0xffff, 0xffff, 0xffff, 0xffff } // D
},
- { // word_reverse
- 0x0203, 0x0001, 0x0607, 0x0405, 0x0a0b, 0x0809, 0x0e0f, 0x0c0d
- }
+ { // word_reverse
+ 0x0203, 0x0001, 0x0607, 0x0405, 0x0a0b, 0x0809, 0x0e0f, 0x0c0d
+ }
};
#if !(defined(__SSSE3__) || defined(_MSC_VER))
@@ -322,7 +322,7 @@ void rsp_cop2::vec_load_group1(UINT32 addr, UINT32 element, UINT16 *regp, rsp_ve
dqm = _mm_shuffle_epi8(dqm, ekey);
#endif
- // Align the data to the DQM so we can mask it in.
+ // Align the data to the DQM so we can mask it in.
#if !(defined(__SSSE3__) || defined(_MSC_VER))
data = sse2_pshufb(data, m_vec_helpers.ror_b2l_keys[ror & 0xF]);
#else
@@ -330,7 +330,7 @@ void rsp_cop2::vec_load_group1(UINT32 addr, UINT32 element, UINT16 *regp, rsp_ve
data = _mm_shuffle_epi8(data, ekey);
#endif
- // Mask and mux in the data.
+ // Mask and mux in the data.
#if (defined(__SSE4_1__) || defined(_MSC_VER))
reg = _mm_blendv_epi8(reg, data, dqm);
#else
@@ -377,7 +377,7 @@ void rsp_cop2::vec_load_group2(UINT32 addr, UINT32 element, UINT16 *regp, rsp_ve
}
// "Unpack" the data.
- rsp_vec_t zero = _mm_setzero_si128();
+ rsp_vec_t zero = _mm_setzero_si128();
data = _mm_unpacklo_epi8(zero, data);
if (request_type != RSP_MEM_REQUEST_PACK)
@@ -385,10 +385,10 @@ void rsp_cop2::vec_load_group2(UINT32 addr, UINT32 element, UINT16 *regp, rsp_ve
data = _mm_srli_epi16(data, 1);
}
- data = _mm_shufflehi_epi16(data, _MM_SHUFFLE(0, 1, 2, 3));
- data = _mm_shufflelo_epi16(data, _MM_SHUFFLE(0, 1, 2, 3));
+ data = _mm_shufflehi_epi16(data, _MM_SHUFFLE(0, 1, 2, 3));
+ data = _mm_shufflelo_epi16(data, _MM_SHUFFLE(0, 1, 2, 3));
- _mm_store_si128((rsp_vec_t *) regp, data);
+ _mm_store_si128((rsp_vec_t *) regp, data);
}
//
@@ -403,7 +403,7 @@ void rsp_cop2::vec_load_group4(UINT32 addr, UINT32 element, UINT16 *regp, rsp_ve
{
UINT32 aligned_addr = addr & 0xFF0;
UINT32 offset = addr & 0xF;
- static UINT32 call_count = 0;
+ static UINT32 call_count = 0;
rsp_vec_t data = _mm_load_si128((rsp_vec_t *) (m_rsp.get_dmem() + aligned_addr));
@@ -439,7 +439,7 @@ void rsp_cop2::vec_load_group4(UINT32 addr, UINT32 element, UINT16 *regp, rsp_ve
_mm_store_si128((rsp_vec_t *) regp, data);
- call_count++;
+ call_count++;
}
//
@@ -542,7 +542,7 @@ void rsp_cop2::vec_store_group2(UINT32 addr, UINT32 element, UINT16 *regp, rsp_v
reg = _mm_shuffle_epi8(reg, dkey);
#endif
- // TODO: Always store in 8-byte chunks to emulate wraparound.
+ // TODO: Always store in 8-byte chunks to emulate wraparound.
_mm_storel_epi64((rsp_vec_t *) (m_rsp.get_dmem() + addr), reg);
}
@@ -574,7 +574,7 @@ void rsp_cop2::vec_store_group4(UINT32 addr, UINT32 element, UINT16 *regp, rsp_v
reg = _mm_shuffle_epi8(reg, ekey);
#endif
- // Mask and mux out the data, write.
+ // Mask and mux out the data, write.
#if (defined(__SSE4_1__) || defined(_MSC_VER))
data = _mm_blendv_epi8(data, reg, dqm);
#else
@@ -702,10 +702,10 @@ rsp_cop2::rsp_cop2(rsp_device &rsp, running_machine &machine)
memset(m_vflag, 0, sizeof(m_vflag));
memset(m_accum, 0, sizeof(m_accum));
#if USE_SIMD
- memset(&m_acc, 0, sizeof(m_acc));
- memset(&m_flags, 0, sizeof(aligned_rsp_2vect_t) * 3);
- m_div_out = 0;
- m_div_in = 0;
+ memset(&m_acc, 0, sizeof(m_acc));
+ memset(&m_flags, 0, sizeof(aligned_rsp_2vect_t) * 3);
+ m_div_out = 0;
+ m_div_in = 0;
#endif
m_rspcop2_state = (internal_rspcop2_state *)rsp.m_cache.alloc_near(sizeof(internal_rspcop2_state));
}
@@ -877,7 +877,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Load 1 byte to vector byte index
- //printf("LBV ");
+ //printf("LBV ");
#if USE_SIMD
vec_lbdlsv_sbdlsv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -896,7 +896,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Loads 2 bytes starting from vector byte index
- //printf("LSV ");
+ //printf("LSV ");
#if USE_SIMD
vec_lbdlsv_sbdlsv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -922,7 +922,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Loads 4 bytes starting from vector byte index
- //printf("LLV ");
+ //printf("LLV ");
#if USE_SIMD
vec_lbdlsv_sbdlsv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -948,7 +948,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Loads 8 bytes starting from vector byte index
- //printf("LDV ");
+ //printf("LDV ");
#if USE_SIMD
vec_lbdlsv_sbdlsv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -974,7 +974,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Loads up to 16 bytes starting from vector byte index
- //printf("LQV ");
+ //printf("LQV ");
#if USE_SIMD
vec_lqrv_sqrv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1001,7 +1001,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Stores up to 16 bytes starting from right side until 16-byte boundary
- //printf("LRV ");
+ //printf("LRV ");
#if USE_SIMD
vec_lqrv_sqrv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1029,7 +1029,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Loads a byte as the upper 8 bits of each element
- //printf("LPV ");
+ //printf("LPV ");
#if USE_SIMD
vec_lfhpuv_sfhpuv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1052,7 +1052,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Loads a byte as the bits 14-7 of each element
- //printf("LUV ");
+ //printf("LUV ");
#if USE_SIMD
vec_lfhpuv_sfhpuv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1075,7 +1075,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Loads a byte as the bits 14-7 of each element, with 2-byte stride
- //printf("LHV ");
+ //printf("LHV ");
#if USE_SIMD
vec_lfhpuv_sfhpuv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1098,7 +1098,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Loads a byte as the bits 14-7 of upper or lower quad, with 4-byte stride
- //printf("LFV ");
+ //printf("LFV ");
#if USE_SIMD
vec_lfhpuv_sfhpuv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1127,7 +1127,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
// Loads the full 128-bit vector starting from vector byte index and wrapping to index 0
// after byte index 15
- //printf("LWV ");
+ //printf("LWV ");
#if USE_SIMD
#else
ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
@@ -1154,15 +1154,15 @@ void rsp_cop2::handle_lwc2(UINT32 op)
// FIXME: has a small problem with odd indices
- //printf("LTV ");
+ //printf("LTV ");
#if 0
#else
- INT32 index = (op >> 7) & 0xf;
- INT32 offset = (op & 0x7f);
- if (offset & 0x40)
- offset |= 0xffffffc0;
+ INT32 index = (op >> 7) & 0xf;
+ INT32 offset = (op & 0x7f);
+ if (offset & 0x40)
+ offset |= 0xffffffc0;
- INT32 vs = (op >> 16) & 0x1f;
+ INT32 vs = (op >> 16) & 0x1f;
INT32 ve = vs + 8;
if (ve > 32)
ve = 32;
@@ -1225,7 +1225,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores 1 byte from vector byte index
- //printf("SBV ");
+ //printf("SBV ");
#if USE_SIMD
vec_lbdlsv_sbdlsv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1244,7 +1244,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores 2 bytes starting from vector byte index
- //printf("SSV ");
+ //printf("SSV ");
#if USE_SIMD
vec_lbdlsv_sbdlsv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1270,7 +1270,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores 4 bytes starting from vector byte index
- //printf("SLV ");
+ //printf("SLV ");
#if USE_SIMD
vec_lbdlsv_sbdlsv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1296,7 +1296,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores 8 bytes starting from vector byte index
- //printf("SDV ");
+ //printf("SDV ");
#if USE_SIMD
vec_lbdlsv_sbdlsv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1322,7 +1322,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores up to 16 bytes starting from vector byte index until 16-byte boundary
- //printf("SQV ");
+ //printf("SQV ");
#if USE_SIMD
vec_lqrv_sqrv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1348,7 +1348,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores up to 16 bytes starting from right side until 16-byte boundary
- //printf("SRV ");
+ //printf("SRV ");
#if USE_SIMD
vec_lqrv_sqrv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1377,7 +1377,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores upper 8 bits of each element
- //printf("SPV ");
+ //printf("SPV ");
#if USE_SIMD
vec_lfhpuv_sfhpuv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1409,7 +1409,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores bits 14-7 of each element
- //printf("SUV ");
+ //printf("SUV ");
#if USE_SIMD
vec_lfhpuv_sfhpuv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1441,7 +1441,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores bits 14-7 of each element, with 2-byte stride
- //printf("SHV ");
+ //printf("SHV ");
#if USE_SIMD
vec_lfhpuv_sfhpuv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1470,7 +1470,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
// FIXME: only works for index 0 and index 8
- //printf("SFV ");
+ //printf("SFV ");
#if USE_SIMD
vec_lfhpuv_sfhpuv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1500,7 +1500,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
// Stores the full 128-bit vector starting from vector byte index and wrapping to index 0
// after byte index 15
- //printf("SWV ");
+ //printf("SWV ");
#if USE_SIMD
#else
ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
@@ -1528,13 +1528,13 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores one element from maximum of 8 vectors, while incrementing element index
- //printf("STV ");
+ //printf("STV ");
#if 0
#else
- INT32 index = (op >> 7) & 0xf;
- INT32 offset = (op & 0x7f);
- if (offset & 0x40)
- offset |= 0xffffffc0;
+ INT32 index = (op >> 7) & 0xf;
+ INT32 offset = (op & 0x7f);
+ if (offset & 0x40)
+ offset |= 0xffffffc0;
INT32 vs = (op >> 16) & 0x1f;
INT32 ve = vs + 8;
@@ -1548,7 +1548,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
INT32 eaoffset = (ea & 0xf) + (element * 2);
ea &= ~0xf;
- for (INT32 i = vs; i < ve; i++)
+ for (INT32 i = vs; i < ve; i++)
{
m_rsp.WRITE16(ea + (eaoffset & 0xf), VREG_S(i, element & 0x7));
eaoffset += 2;
@@ -1654,7 +1654,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Multiplies signed integer by signed integer * 2
- //printf("MULF ");
+ //printf("MULF ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -1706,7 +1706,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// ------------------------------------------------------
//
- //printf("MULU ");
+ //printf("MULU ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -1762,7 +1762,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// Stores the higher 16 bits of the 32-bit result to accumulator
// The low slice of accumulator is stored into destination element
- //printf("MUDL ");
+ //printf("MUDL ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -1809,7 +1809,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// The result is stored into accumulator
// The middle slice of accumulator is stored into destination element
- //printf("MUDM ");
+ //printf("MUDM ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -1857,7 +1857,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// The result is stored into accumulator
// The low slice of accumulator is stored into destination element
- //printf("MUDN ");
+ //printf("MUDN ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo = read_acc_lo(acc);
@@ -1902,7 +1902,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// The result is stored into highest 32 bits of accumulator, the low slice is zero
// The highest 32 bits of accumulator is saturated into destination element
- //printf("MUDH ");
+ //printf("MUDH ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -1950,7 +1950,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// Multiplies signed integer by signed integer * 2
// The result is added to accumulator
- //printf("MACF ");
+ //printf("MACF ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -2001,7 +2001,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// ------------------------------------------------------
//
- //printf("MACU ");
+ //printf("MACU ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -2071,7 +2071,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// Adds the higher 16 bits of the 32-bit result to accumulator
// The low slice of accumulator is stored into destination element
- //printf("MADL ");
+ //printf("MADL ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -2120,7 +2120,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// The result is added into accumulator
// The middle slice of accumulator is stored into destination element
- //printf("MADM ");
+ //printf("MADM ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -2171,7 +2171,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// The result is added into accumulator
// The low slice of accumulator is stored into destination element
- //printf("MADN ");
+ //printf("MADN ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -2225,7 +2225,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// The result is added into highest 32 bits of accumulator, the low slice is zero
// The highest 32 bits of accumulator is saturated into destination element
- //printf("MADH ");
+ //printf("MADH ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -2275,7 +2275,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// TODO: check VS2REG == VDREG
- //printf("ADD ");
+ //printf("ADD ");
#if USE_SIMD
rsp_vec_t acc_lo;
UINT16 *acc = m_acc.s;
@@ -2321,7 +2321,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// TODO: check VS2REG == VDREG
- //printf("SUB ");
+ //printf("SUB ");
#if USE_SIMD
rsp_vec_t acc_lo;
UINT16 *acc = m_acc.s;
@@ -2367,7 +2367,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// Changes the sign of source register 2 if source register 1 is negative and stores
// the result to destination register
- //printf("ABS ");
+ //printf("ABS ");
#if USE_SIMD
rsp_vec_t acc_lo;
UINT16 *acc = m_acc.s;
@@ -2423,7 +2423,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// TODO: check VS2REG = VDREG
- //printf("ADDC ");
+ //printf("ADDC ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t sn;
@@ -2471,7 +2471,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// TODO: check VS2REG = VDREG
- //printf("SUBC ");
+ //printf("SUBC ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t eq, sn;
@@ -2521,7 +2521,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Stores high, middle or low slice of accumulator to destination vector
- //printf("SAW ");
+ //printf("SAW ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
switch (EL)
@@ -2586,7 +2586,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// Sets compare flags if elements in VS1 are less than VS2
// Moves the element in VS2 to destination vector
- //printf("LT ");
+ //printf("LT ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t le;
@@ -2655,7 +2655,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// Sets compare flags if elements in VS1 are equal with VS2
// Moves the element in VS2 to destination vector
- //printf("EQ ");
+ //printf("EQ ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t le;
@@ -2712,7 +2712,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// Sets compare flags if elements in VS1 are not equal with VS2
// Moves the element in VS2 to destination vector
- //printf("NE ");
+ //printf("NE ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t le;
@@ -2770,7 +2770,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// Sets compare flags if elements in VS1 are greater or equal with VS2
// Moves the element in VS2 to destination vector
- //printf("GE ");
+ //printf("GE ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t le;
@@ -2827,7 +2827,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Vector clip low
- //printf("CL ");
+ //printf("CL ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
@@ -2944,7 +2944,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Vector clip high
- //printf("CH ");
+ //printf("CH ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t ge, le, sign, eq, vce;
@@ -3047,7 +3047,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Vector clip reverse
- //printf("CR ");
+ //printf("CR ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t ge, le;
@@ -3125,7 +3125,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Merges two vectors according to compare flags
- //printf("MRG ");
+ //printf("MRG ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t le = read_vcc_lo(m_flags[RSP_VCC].s);
@@ -3166,7 +3166,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Bitwise AND of two vector registers
- //printf("AND ");
+ //printf("AND ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
@@ -3196,7 +3196,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Bitwise NOT AND of two vector registers
- //printf("NAND ");
+ //printf("NAND ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
@@ -3226,7 +3226,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Bitwise OR of two vector registers
- //printf("OR ");
+ //printf("OR ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
@@ -3256,7 +3256,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Bitwise NOT OR of two vector registers
- //printf("NOR ");
+ //printf("NOR ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
@@ -3286,7 +3286,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Bitwise XOR of two vector registers
- //printf("XOR ");
+ //printf("XOR ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
@@ -3316,7 +3316,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Bitwise NOT XOR of two vector registers
- //printf("NXOR ");
+ //printf("NXOR ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
@@ -3347,7 +3347,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Calculates reciprocal
- //printf("RCP ");
+ //printf("RCP ");
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
@@ -3418,7 +3418,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Calculates reciprocal low part
- //printf("RCPL ");
+ //printf("RCPL ");
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
@@ -3505,7 +3505,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Calculates reciprocal high part
- //printf("RCPH ");
+ //printf("RCPH ");
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
@@ -3537,7 +3537,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Moves element from vector to destination vector
- //printf("MOV ");
+ //printf("MOV ");
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
m_v[VDREG].v = vec_vmov(VS2REG, EL, VDREG, VS1REG);
@@ -3561,7 +3561,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Calculates reciprocal square-root
- //printf("RSQ ");
+ //printf("RSQ ");
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
@@ -3633,7 +3633,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Calculates reciprocal square-root low part
- //printf("RSQL ");
+ //printf("RSQL ");
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
@@ -3723,7 +3723,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Calculates reciprocal square-root high part
- //printf("RSQH ");
+ //printf("RSQH ");
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
@@ -3754,7 +3754,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Vector null instruction
- //printf("NOP ");
+ //printf("NOP ");
break;
}
@@ -3777,7 +3777,7 @@ void rsp_cop2::handle_cop2(UINT32 op)
// | 010010 | 00000 | TTTTT | DDDDD | IIII | 0000000 |
// ---------------------------------------------------
//
- //printf("MFC2 ");
+ //printf("MFC2 ");
int el = (op >> 7) & 0xf;
UINT16 b1 = VREG_B(RDREG, (el+0) & 0xf);
UINT16 b2 = VREG_B(RDREG, (el+1) & 0xf);
@@ -3792,15 +3792,15 @@ void rsp_cop2::handle_cop2(UINT32 op)
// | 010010 | 00010 | TTTTT | DDDDD | 00000000000 |
// ------------------------------------------------
//
- //printf("CFC2 ");
+ //printf("CFC2 ");
if (RTREG)
{
#if USE_SIMD
- INT32 src = RDREG & 3;
- if (src == 3) {
- src = 2;
- }
- RTVAL = get_flags(m_flags[src].s);
+ INT32 src = RDREG & 3;
+ if (src == 3) {
+ src = 2;
+ }
+ RTVAL = get_flags(m_flags[src].s);
#else
switch(RDREG)
{
@@ -3865,7 +3865,7 @@ void rsp_cop2::handle_cop2(UINT32 op)
// | 010010 | 00100 | TTTTT | DDDDD | IIII | 0000000 |
// ---------------------------------------------------
//
- //printf("MTC2 ");
+ //printf("MTC2 ");
int el = (op >> 7) & 0xf;
W_VREG_B(RDREG, (el+0) & 0xf, (RTVAL >> 8) & 0xff);
W_VREG_B(RDREG, (el+1) & 0xf, (RTVAL >> 0) & 0xff);
@@ -3966,7 +3966,7 @@ void rsp_cop2::handle_cop2(UINT32 op)
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
{
- //printf("V");
+ //printf("V");
handle_vector_ops(op);
break;
}
@@ -4185,38 +4185,38 @@ void rsp_cop2::dump(UINT32 op)
}
#if USE_SIMD
- printf("acc_h: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_acc.s[0], m_acc.s[1], m_acc.s[2], m_acc.s[3], m_acc.s[4], m_acc.s[5], m_acc.s[6], m_acc.s[7]);
- printf("acc_m: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_acc.s[8], m_acc.s[9], m_acc.s[10], m_acc.s[11], m_acc.s[12], m_acc.s[13], m_acc.s[14], m_acc.s[15]);
- printf("acc_l: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_acc.s[16], m_acc.s[17], m_acc.s[18], m_acc.s[19], m_acc.s[20], m_acc.s[21], m_acc.s[22], m_acc.s[23]);
- printf("vcc_hi: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCC].s[0], m_flags[RSP_VCC].s[1], m_flags[RSP_VCC].s[2], m_flags[RSP_VCC].s[3], m_flags[RSP_VCC].s[4], m_flags[RSP_VCC].s[5], m_flags[RSP_VCC].s[6], m_flags[RSP_VCC].s[7]);
- printf("vcc_lo: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCC].s[8], m_flags[RSP_VCC].s[9], m_flags[RSP_VCC].s[10], m_flags[RSP_VCC].s[11], m_flags[RSP_VCC].s[12], m_flags[RSP_VCC].s[13], m_flags[RSP_VCC].s[14], m_flags[RSP_VCC].s[15]);
- printf("vco_hi: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCO].s[0], m_flags[RSP_VCO].s[1], m_flags[RSP_VCO].s[2], m_flags[RSP_VCO].s[3], m_flags[RSP_VCO].s[4], m_flags[RSP_VCO].s[5], m_flags[RSP_VCO].s[6], m_flags[RSP_VCO].s[7]);
- printf("vco_lo: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCO].s[8], m_flags[RSP_VCO].s[9], m_flags[RSP_VCO].s[10], m_flags[RSP_VCO].s[11], m_flags[RSP_VCO].s[12], m_flags[RSP_VCO].s[13], m_flags[RSP_VCO].s[14], m_flags[RSP_VCO].s[15]);
- printf("vce: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCE].s[0], m_flags[RSP_VCE].s[1], m_flags[RSP_VCE].s[2], m_flags[RSP_VCE].s[3], m_flags[RSP_VCE].s[4], m_flags[RSP_VCE].s[5], m_flags[RSP_VCE].s[6], m_flags[RSP_VCE].s[7]);
+ printf("acc_h: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_acc.s[0], m_acc.s[1], m_acc.s[2], m_acc.s[3], m_acc.s[4], m_acc.s[5], m_acc.s[6], m_acc.s[7]);
+ printf("acc_m: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_acc.s[8], m_acc.s[9], m_acc.s[10], m_acc.s[11], m_acc.s[12], m_acc.s[13], m_acc.s[14], m_acc.s[15]);
+ printf("acc_l: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_acc.s[16], m_acc.s[17], m_acc.s[18], m_acc.s[19], m_acc.s[20], m_acc.s[21], m_acc.s[22], m_acc.s[23]);
+ printf("vcc_hi: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCC].s[0], m_flags[RSP_VCC].s[1], m_flags[RSP_VCC].s[2], m_flags[RSP_VCC].s[3], m_flags[RSP_VCC].s[4], m_flags[RSP_VCC].s[5], m_flags[RSP_VCC].s[6], m_flags[RSP_VCC].s[7]);
+ printf("vcc_lo: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCC].s[8], m_flags[RSP_VCC].s[9], m_flags[RSP_VCC].s[10], m_flags[RSP_VCC].s[11], m_flags[RSP_VCC].s[12], m_flags[RSP_VCC].s[13], m_flags[RSP_VCC].s[14], m_flags[RSP_VCC].s[15]);
+ printf("vco_hi: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCO].s[0], m_flags[RSP_VCO].s[1], m_flags[RSP_VCO].s[2], m_flags[RSP_VCO].s[3], m_flags[RSP_VCO].s[4], m_flags[RSP_VCO].s[5], m_flags[RSP_VCO].s[6], m_flags[RSP_VCO].s[7]);
+ printf("vco_lo: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCO].s[8], m_flags[RSP_VCO].s[9], m_flags[RSP_VCO].s[10], m_flags[RSP_VCO].s[11], m_flags[RSP_VCO].s[12], m_flags[RSP_VCO].s[13], m_flags[RSP_VCO].s[14], m_flags[RSP_VCO].s[15]);
+ printf("vce: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCE].s[0], m_flags[RSP_VCE].s[1], m_flags[RSP_VCE].s[2], m_flags[RSP_VCE].s[3], m_flags[RSP_VCE].s[4], m_flags[RSP_VCE].s[5], m_flags[RSP_VCE].s[6], m_flags[RSP_VCE].s[7]);
#else
- printf("acc_h: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", ACCUM_H(0), ACCUM_H(1), ACCUM_H(2), ACCUM_H(3), ACCUM_H(4), ACCUM_H(5), ACCUM_H(6), ACCUM_H(7));
- printf("acc_m: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", ACCUM_M(0), ACCUM_M(1), ACCUM_M(2), ACCUM_M(3), ACCUM_M(4), ACCUM_M(5), ACCUM_M(6), ACCUM_M(7));
- printf("acc_l: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", ACCUM_L(0), ACCUM_L(1), ACCUM_L(2), ACCUM_L(3), ACCUM_L(4), ACCUM_L(5), ACCUM_L(6), ACCUM_L(7));
- printf("vcc_hi: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[4][0], m_vflag[4][1], m_vflag[4][2], m_vflag[4][3], m_vflag[4][4], m_vflag[4][5], m_vflag[4][6], m_vflag[4][7]);
- printf("vcc_lo: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[1][0], m_vflag[1][1], m_vflag[1][2], m_vflag[1][3], m_vflag[1][4], m_vflag[1][5], m_vflag[1][6], m_vflag[1][7]);
- printf("vco_hi: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[3][0], m_vflag[3][1], m_vflag[3][2], m_vflag[3][3], m_vflag[3][4], m_vflag[3][5], m_vflag[3][6], m_vflag[3][7]);
- printf("vco_lo: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[0][0], m_vflag[0][1], m_vflag[0][2], m_vflag[0][3], m_vflag[0][4], m_vflag[0][5], m_vflag[0][6], m_vflag[0][7]);
- printf("vce: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[2][0], m_vflag[2][1], m_vflag[2][2], m_vflag[2][3], m_vflag[2][4], m_vflag[2][5], m_vflag[2][6], m_vflag[2][7]);
+ printf("acc_h: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", ACCUM_H(0), ACCUM_H(1), ACCUM_H(2), ACCUM_H(3), ACCUM_H(4), ACCUM_H(5), ACCUM_H(6), ACCUM_H(7));
+ printf("acc_m: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", ACCUM_M(0), ACCUM_M(1), ACCUM_M(2), ACCUM_M(3), ACCUM_M(4), ACCUM_M(5), ACCUM_M(6), ACCUM_M(7));
+ printf("acc_l: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", ACCUM_L(0), ACCUM_L(1), ACCUM_L(2), ACCUM_L(3), ACCUM_L(4), ACCUM_L(5), ACCUM_L(6), ACCUM_L(7));
+ printf("vcc_hi: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[4][0], m_vflag[4][1], m_vflag[4][2], m_vflag[4][3], m_vflag[4][4], m_vflag[4][5], m_vflag[4][6], m_vflag[4][7]);
+ printf("vcc_lo: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[1][0], m_vflag[1][1], m_vflag[1][2], m_vflag[1][3], m_vflag[1][4], m_vflag[1][5], m_vflag[1][6], m_vflag[1][7]);
+ printf("vco_hi: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[3][0], m_vflag[3][1], m_vflag[3][2], m_vflag[3][3], m_vflag[3][4], m_vflag[3][5], m_vflag[3][6], m_vflag[3][7]);
+ printf("vco_lo: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[0][0], m_vflag[0][1], m_vflag[0][2], m_vflag[0][3], m_vflag[0][4], m_vflag[0][5], m_vflag[0][6], m_vflag[0][7]);
+ printf("vce: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[2][0], m_vflag[2][1], m_vflag[2][2], m_vflag[2][3], m_vflag[2][4], m_vflag[2][5], m_vflag[2][6], m_vflag[2][7]);
#endif
}
void rsp_cop2::dump_dmem()
{
- UINT8* dmem = m_rsp.get_dmem();
- printf("\n");
- for (int i = 0; i < 0x1000; i += 32)
- {
- printf("%04x: ", i);
- for (int j = 0; j < 32; j++)
- {
- printf("%02x ", dmem[i + j]);
- }
- printf("\n");
- }
- printf("\n");
-} \ No newline at end of file
+ UINT8* dmem = m_rsp.get_dmem();
+ printf("\n");
+ for (int i = 0; i < 0x1000; i += 32)
+ {
+ printf("%04x: ", i);
+ for (int j = 0; j < 32; j++)
+ {
+ printf("%02x ", dmem[i + j]);
+ }
+ printf("\n");
+ }
+ printf("\n");
+}
diff --git a/src/emu/cpu/rsp/rspcp2.h b/src/emu/cpu/rsp/rspcp2.h
index 25ed0013e2a..909b0ae4172 100644
--- a/src/emu/cpu/rsp/rspcp2.h
+++ b/src/emu/cpu/rsp/rspcp2.h
@@ -17,18 +17,18 @@
#include "rsp.h"
#include "rspdiv.h"
-#define SIMD_OFF (1)
+#define SIMD_OFF (1)
#if (defined(__SSE2__) || defined(__SSE3__) || defined(__SSSE3__) || defined(__SSE4_1__) || defined(__SSE4_2__))
-#define SSE_AVAILABLE (1)
+#define SSE_AVAILABLE (1)
#else
-#define SSE_AVAILABLE (0)
+#define SSE_AVAILABLE (0)
#endif
#if (SSE_AVAILABLE || defined(_MSC_VER)) && defined(PTR64) && !SIMD_OFF
-#define USE_SIMD (1)
+#define USE_SIMD (1)
#else
-#define USE_SIMD (0)
+#define USE_SIMD (0)
#endif
#if USE_SIMD
@@ -167,8 +167,8 @@ public:
void log_instruction_execution();
virtual void cfunc_unimplemented_opcode() { }
- void dump(UINT32 op);
- void dump_dmem();
+ void dump(UINT32 op);
+ void dump_dmem();
protected:
virtual int generate_vector_opcode(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc) { return TRUE; }
@@ -342,7 +342,7 @@ protected:
static inline INT16 get_flags(const UINT16 *flags)
{
- return _mm_movemask_epi8(_mm_packs_epi16(_mm_load_si128((rsp_vec_t*) (flags + (sizeof(rsp_vec_t) >> 1))), _mm_load_si128((rsp_vec_t*) flags)));
+ return _mm_movemask_epi8(_mm_packs_epi16(_mm_load_si128((rsp_vec_t*) (flags + (sizeof(rsp_vec_t) >> 1))), _mm_load_si128((rsp_vec_t*) flags)));
}
static inline rsp_vec_t vec_zero()
@@ -389,8 +389,8 @@ private:
void handle_swc2(UINT32 op);
void handle_vector_ops(UINT32 op);
- UINT32 m_div_in;
- UINT32 m_div_out;
+ UINT32 m_div_in;
+ UINT32 m_div_out;
};
#endif /* __RSPCP2_H__ */
diff --git a/src/emu/cpu/rsp/vadd.h b/src/emu/cpu/rsp/vadd.h
index 33b21fd7312..16009e53287 100644
--- a/src/emu/cpu/rsp/vadd.h
+++ b/src/emu/cpu/rsp/vadd.h
@@ -14,4 +14,3 @@ inline rsp_vec_t vec_vadd(rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t carry, rsp_vec_t
minimum = _mm_subs_epi16(minimum, carry);
return _mm_adds_epi16(minimum, maximum);
}
-
diff --git a/src/emu/cpu/rsp/vcl.h b/src/emu/cpu/rsp/vcl.h
index e82a7fde162..e09a13d5a8e 100644
--- a/src/emu/cpu/rsp/vcl.h
+++ b/src/emu/cpu/rsp/vcl.h
@@ -46,7 +46,7 @@ inline rsp_vec_t vec_vcl(rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t zero, rsp_vec_t *
*ge = _mm_or_si128(ge_eq, *ge);
#endif
- // Mux the result based on the value of sign.
+ // Mux the result based on the value of sign.
#if (defined(__SSE4_1__) || defined(_MSC_VER))
rsp_vec_t mux_mask = _mm_blendv_epi8(*ge, *le, sign);
#else
diff --git a/src/emu/cpu/rsp/vmudh.h b/src/emu/cpu/rsp/vmudh.h
index 6ae77e2ef7e..71c3a38f4fb 100644
--- a/src/emu/cpu/rsp/vmudh.h
+++ b/src/emu/cpu/rsp/vmudh.h
@@ -8,4 +8,3 @@ inline rsp_vec_t rsp_vmudh(rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t *acc_md, rsp_ve
return sclamp_acc_to_mid(*acc_md, *acc_hi);
}
-
diff --git a/src/emu/cpu/rsp/vmulh.h b/src/emu/cpu/rsp/vmulh.h
index 61140f4744c..aaccf9d41b3 100644
--- a/src/emu/cpu/rsp/vmulh.h
+++ b/src/emu/cpu/rsp/vmulh.h
@@ -28,4 +28,3 @@ inline rsp_vec_t vec_vmadh_vmudh(UINT32 iw, rsp_vec_t vs, rsp_vec_t vt, rsp_vec_
return sclamp_acc_to_mid(*acc_md, *acc_hi);
}
-
diff --git a/src/emu/cpu/rsp/vrcpsq.h b/src/emu/cpu/rsp/vrcpsq.h
index 2e2434863e9..930d8237853 100644
--- a/src/emu/cpu/rsp/vrcpsq.h
+++ b/src/emu/cpu/rsp/vrcpsq.h
@@ -26,7 +26,7 @@ inline rsp_vec_t vec_vrcp_vrsq(UINT32 iw, INT32 dp, UINT32 src, UINT32 e, UINT32
}
else if (input == -32768)
{
- result = 0xffff0000;
+ result = 0xffff0000;
}
else // Main case: compute the reciprocal.
{
diff --git a/src/emu/cpu/rsp/vrsq.h b/src/emu/cpu/rsp/vrsq.h
index 140e46dcd01..f657bc42554 100644
--- a/src/emu/cpu/rsp/vrsq.h
+++ b/src/emu/cpu/rsp/vrsq.h
@@ -26,7 +26,7 @@ rsp_vec_t vec_vrsq(INT32 dp, UINT32 src, UINT32 e, UINT32 dest, UINT32 de)
}
else if (input == -32768)
{
- result = 0xffff0000;
+ result = 0xffff0000;
}
else // Main case: compute the reciprocal.
{
diff --git a/src/emu/cpu/sh2/sh2.c b/src/emu/cpu/sh2/sh2.c
index b2ea57f60d4..629d447323e 100644
--- a/src/emu/cpu/sh2/sh2.c
+++ b/src/emu/cpu/sh2/sh2.c
@@ -143,11 +143,11 @@ READ32_MEMBER(sh2_device::sh2_internal_a5)
static ADDRESS_MAP_START( sh7604_map, AS_PROGRAM, 32, sh2_device )
AM_RANGE(0x40000000, 0xbfffffff) AM_READ(sh2_internal_a5)
-/*!
+/*!
@todo: cps3boot breaks with this enabled. Needs customization ...
*/
-// AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM // cache data array
-// AM_RANGE(0xffffff88, 0xffffff8b) AM_READWRITE(dma_dtcr0_r,dma_dtcr0_w)
+// AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM // cache data array
+// AM_RANGE(0xffffff88, 0xffffff8b) AM_READWRITE(dma_dtcr0_r,dma_dtcr0_w)
AM_RANGE(0xe0000000, 0xe00001ff) AM_MIRROR(0x1ffffe00) AM_READWRITE(sh7604_r, sh7604_w)
ADDRESS_MAP_END
@@ -159,14 +159,14 @@ static ADDRESS_MAP_START( sh7021_map, AS_PROGRAM, 32, sh2a_device )
AM_RANGE(0x05ffff48, 0x05ffff4b) AM_READWRITE16(dma_tcr0_r, dma_tcr0_w,0x0000ffff)
AM_RANGE(0x05ffff4c, 0x05ffff4f) AM_READWRITE16(dma_chcr0_r, dma_chcr0_w, 0x0000ffff)
// fall-back
- AM_RANGE(0x05fffe00, 0x05ffffff) AM_READWRITE16(sh7021_r,sh7021_w,0xffffffff) // SH-7032H internal i/o
-// AM_RANGE(0x07000000, 0x070003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
-// AM_RANGE(0x0f000000, 0x0f0003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
+ AM_RANGE(0x05fffe00, 0x05ffffff) AM_READWRITE16(sh7021_r,sh7021_w,0xffffffff) // SH-7032H internal i/o
+// AM_RANGE(0x07000000, 0x070003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
+// AM_RANGE(0x0f000000, 0x0f0003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sh7032_map, AS_PROGRAM, 32, sh1_device )
// fall-back
- AM_RANGE(0x05fffe00, 0x05ffffff) AM_READWRITE16(sh7032_r,sh7032_w,0xffffffff) // SH-7032H internal i/o
+ AM_RANGE(0x05fffe00, 0x05ffffff) AM_READWRITE16(sh7032_r,sh7032_w,0xffffffff) // SH-7032H internal i/o
ADDRESS_MAP_END
sh2_device::sh2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
@@ -300,7 +300,7 @@ void sh2_device::WB(offs_t A, UINT8 V)
m_program->write_byte(A & AM,V);
return;
}
-
+
m_program->write_byte(A,V);
}
@@ -311,7 +311,7 @@ void sh2_device::WW(offs_t A, UINT16 V)
m_program->write_word(A & AM,V);
return;
}
-
+
m_program->write_word(A,V);
}
@@ -322,7 +322,7 @@ void sh2_device::WL(offs_t A, UINT32 V)
m_program->write_dword(A & AM,V);
return;
}
-
+
/* 0x20000000 no Cache */
/* 0x00000000 read thru Cache if CE bit is 1 */
m_program->write_dword(A,V);
diff --git a/src/emu/cpu/sh2/sh2.h b/src/emu/cpu/sh2/sh2.h
index c53b6baad59..9724c1f51b0 100644
--- a/src/emu/cpu/sh2/sh2.h
+++ b/src/emu/cpu/sh2/sh2.h
@@ -513,17 +513,17 @@ public:
DECLARE_READ16_MEMBER(sh7021_r);
DECLARE_WRITE16_MEMBER(sh7021_w);
void sh7032_dma_exec(int ch);
-
+
private:
UINT16 m_sh7021_regs[0x200];
struct
{
- UINT32 sar; /**< Source Address Register */
- UINT32 dar; /**< Destination Address Register */
- UINT16 tcr; /**< Transfer Count Register */
- UINT16 chcr; /**< Channel Control Register */
+ UINT32 sar; /**< Source Address Register */
+ UINT32 dar; /**< Destination Address Register */
+ UINT16 tcr; /**< Transfer Count Register */
+ UINT16 chcr; /**< Channel Control Register */
} m_dma[4];
- UINT16 m_dmaor; /**< DMA Operation Register (status flags) */
+ UINT16 m_dmaor; /**< DMA Operation Register (status flags) */
};
diff --git a/src/emu/cpu/sh2/sh2comn.c b/src/emu/cpu/sh2/sh2comn.c
index 38b6d633c22..1080203494f 100644
--- a/src/emu/cpu/sh2/sh2comn.c
+++ b/src/emu/cpu/sh2/sh2comn.c
@@ -899,7 +899,7 @@ void sh2_device::sh2_exception(const char *message, int irqline)
void sh2a_device::sh7032_dma_exec(int ch)
{
const short dma_word_size[4] = { 0, +1, -1, 0 };
- UINT8 rs = (m_dma[ch].chcr >> 8) & 0xf; /**< Resource Select bits */
+ UINT8 rs = (m_dma[ch].chcr >> 8) & 0xf; /**< Resource Select bits */
if(rs != 0xc) // Auto-Request
{
logerror("Warning: SH7032 DMA enables non auto-request transfer\n");
@@ -911,9 +911,9 @@ void sh2a_device::sh7032_dma_exec(int ch)
return;
printf("%08x %08x %04x\n",m_dma[ch].sar,m_dma[ch].dar,m_dma[ch].chcr);
- UINT8 dm = (m_dma[ch].chcr >> 14) & 3; /**< Destination Address Mode bits */
- UINT8 sm = (m_dma[ch].chcr >> 12) & 3; /**< Source Address Mode bits */
- bool ts = (m_dma[ch].chcr & 8); /**< Transfer Size bit */
+ UINT8 dm = (m_dma[ch].chcr >> 14) & 3; /**< Destination Address Mode bits */
+ UINT8 sm = (m_dma[ch].chcr >> 12) & 3; /**< Source Address Mode bits */
+ bool ts = (m_dma[ch].chcr & 8); /**< Transfer Size bit */
int src_word_size = dma_word_size[sm] * ((ts == true) ? 2 : 1);
int dst_word_size = dma_word_size[dm] * ((ts == true) ? 2 : 1);
UINT32 src_addr = m_dma[ch].sar;
@@ -1025,4 +1025,3 @@ WRITE16_MEMBER(sh2a_device::sh7021_w)
#if (defined(__MINGW32__) && (__GNUC__ >= 5))
#pragma GCC diagnostic pop
#endif
-
diff --git a/src/emu/cpu/sm510/sm510.c b/src/emu/cpu/sm510/sm510.c
index 09029709849..ef4f704590b 100644
--- a/src/emu/cpu/sm510/sm510.c
+++ b/src/emu/cpu/sm510/sm510.c
@@ -6,14 +6,14 @@
- SM510: 2.7Kx8 ROM, 128x4 RAM(32x4 for LCD)
- SM511: 4Kx8 ROM, 128x4 RAM(32x4 for LCD), melody controller
- SM512: 4Kx8 ROM, 128x4 RAM(48x4 for LCD), melody controller
-
+
Other chips that may be in the same family, investigate more when one of
them needs to get emulated: SM500, SM530/31, SM4A, SM3903, ..
References:
- 1990 Sharp Microcomputers Data Book
- 1996 Sharp Microcomputer Databook
-
+
TODO:
- proper support for LFSR program counter in debugger
- callback for lcd screen as MAME bitmap (when needed)
@@ -146,12 +146,12 @@ void sm510_base_device::device_reset()
m_op = m_prev_op = 0;
do_branch(3, 7, 0);
m_prev_pc = m_pc;
-
+
// lcd is on (Bp on, BC off, bs(y) off)
m_bp = true;
m_bc = false;
m_y = 0;
-
+
m_r = 0;
m_write_r(0, 0, 0xff);
m_melody_rd &= ~1;
@@ -168,11 +168,11 @@ inline UINT16 sm510_base_device::get_lcd_row(int column, UINT8* ram)
// output 0 if lcd blackpate/bleeder is off, or in case row doesn't exist
if (ram == NULL || m_bc || !m_bp)
return 0;
-
+
UINT16 rowdata = 0;
for (int i = 0; i < 0x10; i++)
rowdata |= (ram[i] >> column & 1) << i;
-
+
return rowdata;
}
@@ -185,12 +185,12 @@ TIMER_CALLBACK_MEMBER(sm510_base_device::lcd_timer_cb)
m_write_sega(h | SM510_PORT_SEGA, get_lcd_row(h, m_lcd_ram_a), 0xffff);
m_write_segb(h | SM510_PORT_SEGB, get_lcd_row(h, m_lcd_ram_b), 0xffff);
m_write_segc(h | SM510_PORT_SEGC, get_lcd_row(h, m_lcd_ram_c), 0xffff);
-
+
// bs output from L/X and Y regs
UINT8 bs = (m_l >> h & 1) | ((m_x*2) >> h & 2);
m_write_segbs(h | SM510_PORT_SEGBS, (m_bc || !m_bp) ? 0 : bs, 0xffff);
}
-
+
// schedule next timeout
m_lcd_timer->adjust(attotime::from_ticks(0x200, unscaled_clock()));
}
@@ -222,10 +222,10 @@ void sm510_base_device::clock_melody()
0, 0, 8, 8, 9, 9, 10,10,11,12,12,13,14,15, 8*2, 8*2,
0, 0, 8, 9, 9, 10,10,11,11,12,13,14,14,15, 8*2, 9*2
};
-
+
UINT8 cmd = m_melody_rom[m_melody_address] & 0x3f;
UINT8 out = 0;
-
+
// clock duty cycle if tone is active
if ((cmd & 0xf) > 1)
{
@@ -245,7 +245,7 @@ void sm510_base_device::clock_melody()
// rest tell signal
m_melody_rd |= 2;
}
-
+
// clock time base on F8(d7)
if ((m_div & 0x7f) == 0)
{
@@ -255,7 +255,7 @@ void sm510_base_device::clock_melody()
if (m_melody_step_count == 0)
m_melody_address++;
}
-
+
// output to R pin
if (out != m_r)
{
@@ -293,7 +293,7 @@ bool sm510_base_device::wake_me_up()
// after waking up, but we leave it unchanged
m_halt = false;
do_branch(1, 0, 0);
-
+
standard_irq_callback(0);
return true;
}
@@ -305,7 +305,7 @@ void sm510_base_device::execute_set_input(int line, int state)
{
if (line != SM510_INPUT_LINE_K)
return;
-
+
// set K input lines active state
m_k_active = (state != 0);
}
@@ -317,7 +317,7 @@ TIMER_CALLBACK_MEMBER(sm510_base_device::div_timer_cb)
// 1S signal on overflow(falling edge of f1)
if (m_div == 0)
m_1s = true;
-
+
clock_melody();
}
diff --git a/src/emu/cpu/sm510/sm510.h b/src/emu/cpu/sm510/sm510.h
index b50cea20957..8dd7446b884 100644
--- a/src/emu/cpu/sm510/sm510.h
+++ b/src/emu/cpu/sm510/sm510.h
@@ -134,7 +134,7 @@ protected:
int m_stack_levels;
UINT16 m_stack[2];
int m_icount;
-
+
UINT8 m_acc;
UINT8 m_bl;
UINT8 m_bm;
@@ -177,7 +177,7 @@ protected:
bool wake_me_up();
void init_divider();
TIMER_CALLBACK_MEMBER(div_timer_cb);
-
+
// other i/o handlers
devcb_read8 m_read_k;
devcb_read_line m_read_ba;
@@ -251,12 +251,12 @@ protected:
void op_rm();
void op_sm();
-
+
void op_pre();
void op_sme();
void op_rme();
void op_tmel();
-
+
void op_skip();
void op_cend();
void op_idiv();
@@ -274,7 +274,7 @@ protected:
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
virtual void execute_one();
virtual void get_opcode_param();
-
+
virtual void update_w_latch() { m_write_s(0, m_w, 0xff); } // W is connected directly to S
};
diff --git a/src/emu/cpu/sm510/sm510d.c b/src/emu/cpu/sm510/sm510d.c
index fec8bc44bbd..70e6b2c8ed6 100644
--- a/src/emu/cpu/sm510/sm510d.c
+++ b/src/emu/cpu/sm510/sm510d.c
@@ -103,7 +103,7 @@ static offs_t sm510_common_disasm(const UINT8 *lut_mnemonic, const UINT8 *lut_ex
param = oprom[s_next_pc[pc & 0x3f]];
len++;
}
-
+
// extended opcode
bool is_extended = (instr == mEXT);
if (is_extended)
@@ -131,12 +131,12 @@ static offs_t sm510_common_disasm(const UINT8 *lut_mnemonic, const UINT8 *lut_ex
UINT16 address = (param << 4 & 0xc00) | (mask << 6 & 0x3c0) | (param & 0x03f);
dst += sprintf(dst, "$%03X", address);
}
-
+
// show param offset
if (bits >= 8)
dst += sprintf(dst, " [$%03X]", pc + s_next_pc[pc & 0x3f]);
}
-
+
return len | s_flags[instr] | DASMFLAG_SUPPORTED;
}
@@ -210,6 +210,6 @@ CPU_DISASSEMBLE(sm511)
UINT8 ext[0x100];
memset(ext, 0, 0x100);
memcpy(ext + 0x30, sm511_extended, 0x10);
-
+
return sm510_common_disasm(sm511_mnemonic, ext, buffer, pc, oprom, opram);
}
diff --git a/src/emu/cpu/sm510/sm510op.c b/src/emu/cpu/sm510/sm510op.c
index bb0f4975511..cf99cbc5ae4 100644
--- a/src/emu/cpu/sm510/sm510op.c
+++ b/src/emu/cpu/sm510/sm510op.c
@@ -57,12 +57,12 @@ inline UINT8 sm510_base_device::bitmask(UINT16 param)
void sm510_base_device::op_lb()
{
// LB x: load BM/BL with 4-bit immediate value (partial)
-
+
// SM510 WIP..
// bm and bl(low) are probably ok!
m_bm = (m_bm & 4) | (m_op & 3);
m_bl = (m_op >> 2 & 3);
-
+
// bl(high) is still unclear, official doc is confusing
UINT8 hi = 0;
switch (m_bl)
diff --git a/src/emu/cpu/sm510/sm511core.c b/src/emu/cpu/sm510/sm511core.c
index d5dcf94cc7c..2347721ff90 100644
--- a/src/emu/cpu/sm510/sm511core.c
+++ b/src/emu/cpu/sm510/sm511core.c
@@ -102,7 +102,7 @@ void sm511_device::execute_one()
switch (m_op)
{
case 0x00: op_rot(); break;
-// case 0x01: op_xxx(); break; // ?
+// case 0x01: op_xxx(); break; // ?
case 0x02: op_sbm(); break;
case 0x03: op_atpl(); break;
case 0x08: op_add(); break;
@@ -119,7 +119,7 @@ void sm511_device::execute_one()
case 0x5a: op_ta0(); break;
case 0x5b: op_tabl(); break;
case 0x5c: op_atx(); break;
-// case 0x5d: op_cend(); break;
+// case 0x5d: op_cend(); break;
case 0x5e: op_tal(); break;
case 0x5f: op_lbl(); break;
@@ -127,14 +127,14 @@ void sm511_device::execute_one()
case 0x62: op_wr(); break;
case 0x63: op_ws(); break;
case 0x64: op_incb(); break;
-// case 0x65: op_idiv(); break;
+// case 0x65: op_idiv(); break;
case 0x66: op_rc(); break;
case 0x67: op_sc(); break;
case 0x6c: op_decb(); break;
case 0x6d: op_ptw(); break;
case 0x6e: op_rtn0(); break;
case 0x6f: op_rtn1(); break;
-
+
// extended opcodes
case 0x60:
m_op = m_op << 8 | m_param;
diff --git a/src/emu/cpu/ucom4/ucom4.h b/src/emu/cpu/ucom4/ucom4.h
index ed317fe9806..47305a4638a 100644
--- a/src/emu/cpu/ucom4/ucom4.h
+++ b/src/emu/cpu/ucom4/ucom4.h
@@ -323,7 +323,7 @@ class upd650_cpu_device : public ucom4_cpu_device
public:
upd650_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-protected:
+protected:
virtual UINT8 input_r(int index);
};
diff --git a/src/emu/cpu/ucom4/ucom4op.c b/src/emu/cpu/ucom4/ucom4op.c
index c42a2814022..d208fcaf80f 100644
--- a/src/emu/cpu/ucom4/ucom4op.c
+++ b/src/emu/cpu/ucom4/ucom4op.c
@@ -59,7 +59,7 @@ UINT8 upd650_cpu_device::input_r(int index)
// bidirectional ports are 'push-pull', meaning it will output 0 when it's read
if ((index & 0xf) == NEC_UCOM4_PORTC || (index & 0xf) == NEC_UCOM4_PORTD)
output_w(index, 0);
-
+
return ucom4_cpu_device::input_r(index);
}