diff options
Diffstat (limited to 'src/emu/bus/scv/rom.h')
-rw-r--r-- | src/emu/bus/scv/rom.h | 149 |
1 files changed, 149 insertions, 0 deletions
diff --git a/src/emu/bus/scv/rom.h b/src/emu/bus/scv/rom.h new file mode 100644 index 00000000000..1ef3c4f8ecc --- /dev/null +++ b/src/emu/bus/scv/rom.h @@ -0,0 +1,149 @@ +#ifndef __SCV_ROM_H +#define __SCV_ROM_H + +#include "slot.h" + + +// ======================> scv_rom8_device + +class scv_rom8_device : public device_t, + public device_scv_cart_interface +{ +public: + // construction/destruction + scv_rom8_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source); + scv_rom8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // device-level overrides + virtual void device_start() {} + virtual void device_reset() {} + + // reading and writing + virtual DECLARE_READ8_MEMBER(read_cart); +}; + +// ======================> scv_rom16_device + +class scv_rom16_device : public scv_rom8_device +{ +public: + // construction/destruction + scv_rom16_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // reading and writing + virtual DECLARE_READ8_MEMBER(read_cart); +}; + + +// ======================> scv_rom32_device + +class scv_rom32_device : public scv_rom8_device +{ +public: + // construction/destruction + scv_rom32_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // reading and writing + virtual DECLARE_READ8_MEMBER(read_cart); +}; + + +// ======================> scv_rom32ram8_device + +class scv_rom32ram8_device : public scv_rom8_device +{ +public: + // construction/destruction + scv_rom32ram8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // device-level overrides + virtual void device_start(); + virtual void device_reset(); + + // reading and writing + virtual DECLARE_READ8_MEMBER(read_cart); + virtual DECLARE_WRITE8_MEMBER(write_cart); + virtual DECLARE_WRITE8_MEMBER(write_bank); + +private: + UINT8 m_ram_enabled; +}; + + +// ======================> scv_rom64_device + +class scv_rom64_device : public scv_rom8_device +{ +public: + // construction/destruction + scv_rom64_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // device-level overrides + virtual void device_start(); + virtual void device_reset(); + + // reading and writing + virtual DECLARE_READ8_MEMBER(read_cart); + virtual DECLARE_WRITE8_MEMBER(write_bank); + +private: + UINT8 m_bank_base; +}; + + +// ======================> scv_rom128_device + +class scv_rom128_device : public scv_rom8_device +{ +public: + // construction/destruction + scv_rom128_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // device-level overrides + virtual void device_start(); + virtual void device_reset(); + + // reading and writing + virtual DECLARE_READ8_MEMBER(read_cart); + virtual DECLARE_WRITE8_MEMBER(write_bank); + +private: + UINT8 m_bank_base; +}; + + +// ======================> scv_rom128ram4_device + +class scv_rom128ram4_device : public scv_rom8_device +{ +public: + // construction/destruction + scv_rom128ram4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // device-level overrides + virtual void device_start(); + virtual void device_reset(); + + // reading and writing + virtual DECLARE_READ8_MEMBER(read_cart); + virtual DECLARE_WRITE8_MEMBER(write_cart); + virtual DECLARE_WRITE8_MEMBER(write_bank); + +private: + UINT8 m_bank_base, m_ram_enabled; +}; + + + +// device type definition +extern const device_type SCV_ROM8K; +extern const device_type SCV_ROM16K; +extern const device_type SCV_ROM32K; +extern const device_type SCV_ROM32K_RAM8K; +extern const device_type SCV_ROM64K; +extern const device_type SCV_ROM128K; +extern const device_type SCV_ROM128K_RAM4K; + + + +#endif |