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Diffstat (limited to 'src/emu/bus/isa/hdc.c')
-rw-r--r--src/emu/bus/isa/hdc.c465
1 files changed, 292 insertions, 173 deletions
diff --git a/src/emu/bus/isa/hdc.c b/src/emu/bus/isa/hdc.c
index 594cd686cb2..45b6bc334dd 100644
--- a/src/emu/bus/isa/hdc.c
+++ b/src/emu/bus/isa/hdc.c
@@ -1,5 +1,5 @@
// license:BSD-3-Clause
-// copyright-holders:Miodrag Milanovic
+// copyright-holders:Wilbert Pol
/**********************************************************************
ISA 8 bit XT Hard Disk Controller
@@ -112,9 +112,20 @@ static const char *const hdc_command_names[] =
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL /* 0xF8-0xFF */
};
-static MACHINE_CONFIG_FRAGMENT( hdc_config )
- MCFG_HARDDISK_ADD("primary")
- MCFG_HARDDISK_ADD("slave")
+static MACHINE_CONFIG_FRAGMENT( xt_hdc_config )
+ MCFG_DEVICE_ADD("hdc",XT_HDC,0)
+ MCFG_XTHDC_IRQ_HANDLER(WRITELINE(isa8_hdc_device,irq_w))
+ MCFG_XTHDC_DRQ_HANDLER(WRITELINE(isa8_hdc_device,drq_w))
+ MCFG_HARDDISK_ADD("hdc:primary")
+ MCFG_HARDDISK_ADD("hdc:slave")
+MACHINE_CONFIG_END
+
+static MACHINE_CONFIG_FRAGMENT( ec1841_hdc_config )
+ MCFG_DEVICE_ADD("hdc",EC1841_HDC,0)
+ MCFG_XTHDC_IRQ_HANDLER(WRITELINE(isa8_hdc_ec1841_device,irq_w))
+ MCFG_XTHDC_DRQ_HANDLER(WRITELINE(isa8_hdc_ec1841_device,drq_w))
+ MCFG_HARDDISK_ADD("hdc:primary")
+ MCFG_HARDDISK_ADD("hdc:slave")
MACHINE_CONFIG_END
ROM_START( hdc )
@@ -146,86 +157,50 @@ static INPUT_PORTS_START( isa_hdc )
PORT_DIPSETTING( 0x00, DEF_STR(No) )
INPUT_PORTS_END
-//**************************************************************************
-// GLOBAL VARIABLES
-//**************************************************************************
-
-const device_type ISA8_HDC = &device_creator<isa8_hdc_device>;
-const device_type ISA8_HDC_EC1841 = &device_creator<isa8_hdc_ec1841_device>;
-
-//-------------------------------------------------
-// machine_config_additions - device-specific
-// machine configurations
-//-------------------------------------------------
-
-machine_config_constructor isa8_hdc_device::device_mconfig_additions() const
-{
- return MACHINE_CONFIG_NAME( hdc_config );
-}
-
-//-------------------------------------------------
-// rom_region - device-specific ROM region
-//-------------------------------------------------
+const device_type XT_HDC = &device_creator<xt_hdc_device>;
+const device_type EC1841_HDC = &device_creator<ec1841_device>;
+const device_type ST11M_HDC = &device_creator<st11m_device>;
-const rom_entry *isa8_hdc_device::device_rom_region() const
-{
- return ROM_NAME( hdc );
-}
-
-//-------------------------------------------------
-// input_ports - device-specific input ports
-//-------------------------------------------------
-
-ioport_constructor isa8_hdc_device::device_input_ports() const
-{
- return INPUT_PORTS_NAME( isa_hdc );
-}
-
-//**************************************************************************
-// LIVE DEVICE
-//**************************************************************************
-
-//-------------------------------------------------
-// isa8_hdc_device - constructor
-//-------------------------------------------------
-
-isa8_hdc_device::isa8_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
- device_t(mconfig, ISA8_HDC, "Fixed Disk Controller Card", tag, owner, clock, "hdc", __FILE__),
- device_isa8_card_interface(mconfig, *this)
+xt_hdc_device::xt_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ device_t(mconfig, XT_HDC, "Generic PC-XT Fixed Disk Controller", tag, owner, clock, "xt_hdc", __FILE__),
+ m_irq_handler(*this),
+ m_drq_handler(*this)
{
m_type = STANDARD;
}
-isa8_hdc_device::isa8_hdc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+xt_hdc_device::xt_hdc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
device_t(mconfig, type, name, tag, owner, clock, shortname, source),
- device_isa8_card_interface(mconfig, *this)
+ m_irq_handler(*this),
+ m_drq_handler(*this)
{
}
-isa8_hdc_ec1841_device::isa8_hdc_ec1841_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
- isa8_hdc_device( mconfig, ISA8_HDC_EC1841, "EC1841 HDC", tag, owner, clock, "hdc_ec1841", __FILE__)
+ec1841_device::ec1841_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ xt_hdc_device(mconfig, EC1841_HDC, "EC1841 Fixed Disk Controller", tag, owner, clock, "ec1481", __FILE__),
+ m_irq_handler(*this),
+ m_drq_handler(*this)
{
m_type = EC1841;
}
-//-------------------------------------------------
-// device_start - device-specific startup
-//-------------------------------------------------
+st11m_device::st11m_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ xt_hdc_device(mconfig, EC1841_HDC, "Seagate ST11M Fixed Disk Controller", tag, owner, clock, "st11m", __FILE__),
+ m_irq_handler(*this),
+ m_drq_handler(*this)
+{
+ m_type = ST11M;
+}
-void isa8_hdc_device::device_start()
+void xt_hdc_device::device_start()
{
- set_isa_device();
- m_isa->install_device(0x0320, 0x0323, 0, 0, read8_delegate( FUNC(isa8_hdc_device::pc_hdc_r), this ), write8_delegate( FUNC(isa8_hdc_device::pc_hdc_w), this ) );
- m_isa->set_dma_channel(3, this, FALSE);
- buffer.resize(17*4*512);
+ buffer.resize(256*512); // maximum possible transfer
timer = timer_alloc();
+ m_irq_handler.resolve_safe();
+ m_drq_handler.resolve_safe();
}
-//-------------------------------------------------
-// device_reset - device-specific reset
-//-------------------------------------------------
-
-void isa8_hdc_device::device_reset()
+void xt_hdc_device::device_reset()
{
drv = 0;
data_cnt = 0;
@@ -250,13 +225,9 @@ void isa8_hdc_device::device_reset()
csb = 0;
status = 0;
error = 0;
- dip = ioport("HDD")->read();
-
- if (ioport("ROM")->read() == 1)
- m_isa->install_rom(this, 0xc8000, 0xc9fff, 0, 0, "hdc", "hdc");
}
-hard_disk_file *isa8_hdc_device::pc_hdc_file(int id)
+hard_disk_file *xt_hdc_device::pc_hdc_file(int id)
{
harddisk_image_device *img = NULL;
switch( id )
@@ -277,14 +248,12 @@ hard_disk_file *isa8_hdc_device::pc_hdc_file(int id)
return img->get_hard_disk_file();
}
-void isa8_hdc_device::pc_hdc_result(int set_error_info)
+void xt_hdc_device::pc_hdc_result(int set_error_info)
{
- if ( ( hdc_control & 0x02 )) {
+ if ( ( hdc_control & 0x02 ))
+ {
// dip switch selected IRQ 5 or 2
- if (BIT(dip, 6))
- m_isa->irq5_w(1);
- else
- m_isa->irq2_w(1);
+ m_irq_handler(1);
}
if (LOG_HDC_STATUS)
@@ -318,14 +287,14 @@ void isa8_hdc_device::pc_hdc_result(int set_error_info)
-int isa8_hdc_device::no_dma(void)
+int xt_hdc_device::no_dma(void)
{
return (hdc_control & CTL_DMA) == 0;
}
-int isa8_hdc_device::get_lbasector()
+int xt_hdc_device::get_lbasector()
{
hard_disk_info *info;
hard_disk_file *file;
@@ -342,8 +311,6 @@ int isa8_hdc_device::get_lbasector()
return lbasector;
}
-
-
/********************************************************************
*
* Read a number of sectors to the address set up for DMA chan #3
@@ -354,7 +321,7 @@ int isa8_hdc_device::get_lbasector()
* implementation that threw the idea of "emulating the hardware" to the wind
*/
-int isa8_hdc_device::pc_hdc_dack_r()
+int xt_hdc_device::dack_r()
{
UINT8 result;
hard_disk_info *info;
@@ -392,7 +359,7 @@ int isa8_hdc_device::pc_hdc_dack_r()
if (!no_dma())
{
- m_isa->drq3_w((hdcdma_read || hdcdma_size ) ? 1 : 0);
+ m_drq_handler((hdcdma_read || hdcdma_size ) ? 1 : 0);
if(!(hdcdma_read || hdcdma_size)) pc_hdc_result(0);
}
@@ -401,7 +368,7 @@ int isa8_hdc_device::pc_hdc_dack_r()
-void isa8_hdc_device::pc_hdc_dack_w(int data)
+void xt_hdc_device::dack_w(int data)
{
hard_disk_info *info;
hard_disk_file *file;
@@ -434,14 +401,14 @@ void isa8_hdc_device::pc_hdc_dack_w(int data)
if (!no_dma())
{
- m_isa->drq3_w(hdcdma_size ? 1 : 0);
+ m_drq_handler(hdcdma_size ? 1 : 0);
if(!hdcdma_size) pc_hdc_result(1);
}
}
-void isa8_hdc_device::pc_hdc_dack_ws(int data)
+void xt_hdc_device::dack_ws(int data)
{
*(hdcdma_dst++) = data;
@@ -454,95 +421,91 @@ void isa8_hdc_device::pc_hdc_dack_ws(int data)
if (!no_dma())
{
- m_isa->drq3_w(hdcdma_size ? 1 : 0);
+ m_drq_handler(hdcdma_size ? 1 : 0);
if(!hdcdma_size) pc_hdc_result(1);
}
}
-void isa8_hdc_device::execute_read()
+void xt_hdc_device::execute_read()
{
hard_disk_file *disk = NULL;
int size = sector_cnt[drv] * 512;
int read_ = 0;
+ if(sector_cnt[drv] == 0)
+ size = 256 * 512;
+
disk = pc_hdc_file(drv);
if (!disk)
return;
+ status |= STA_READY; // ready to recieve data
+ status &= ~STA_INPUT;
+ status &= ~STA_COMMAND;
+
hdcdma_src = hdcdma_data;
hdcdma_read = read_;
hdcdma_size = size;
- if (no_dma())
+ if(!no_dma())
{
- do
- {
- buffer[data_cnt++] = pc_hdc_dack_r();
- } while (hdcdma_read || hdcdma_size);
- }
- else
- {
- m_isa->drq3_w(1);
+ m_drq_handler(1);
+ if(!hdcdma_size) pc_hdc_result(0);
}
}
-void isa8_hdc_device::execute_write()
+void xt_hdc_device::execute_write()
{
hard_disk_file *disk = NULL;
int size = sector_cnt[drv] * 512;
int write_ = 512;
+ if(sector_cnt[drv] == 0)
+ size = 256 * 512;
+
disk = pc_hdc_file(drv);
if (!disk)
return;
+ status |= STA_READY; // ready to recieve data
+ status |= STA_INPUT;
+ status &= ~STA_COMMAND;
+
hdcdma_dst = hdcdma_data;
hdcdma_write = write_;
hdcdma_size = size;
- if (no_dma())
- {
- do
- {
- pc_hdc_dack_w(buffer[data_cnt++]);
- }
- while (hdcdma_write || hdcdma_size);
- }
- else
+ if (!no_dma())
{
- m_isa->drq3_w(1);
+ m_drq_handler(1);
}
}
-void isa8_hdc_device::execute_writesbuff()
+void xt_hdc_device::execute_writesbuff()
{
hdcdma_dst = hdcdma_data;
hdcdma_write = 512;
hdcdma_size = 512;
- if (no_dma())
- {
- do
- {
- pc_hdc_dack_ws(buffer[data_cnt++]);
- }
- while (hdcdma_write || hdcdma_size);
- }
- else
+ status |= STA_READY; // ready to recieve data
+ status |= STA_INPUT;
+ status &= ~STA_COMMAND;
+
+ if (!no_dma())
{
- m_isa->drq3_w(1);
+ m_drq_handler(1);
}
}
-void isa8_hdc_device::get_drive()
+void xt_hdc_device::get_drive()
{
drv = (buffer[1] >> 5) & 1;
csb = (drv) ? CSB_LUN : 0x00;
@@ -550,7 +513,7 @@ void isa8_hdc_device::get_drive()
-void isa8_hdc_device::get_chsn()
+void xt_hdc_device::get_chsn()
{
head[drv] = buffer[1] & 0x1f;
sector[drv] = buffer[2] & 0x3f;
@@ -562,7 +525,7 @@ void isa8_hdc_device::get_chsn()
error = 0x80; /* a potential error has C/H/S/N info */
}
-int isa8_hdc_device::test_ready()
+int xt_hdc_device::test_ready()
{
if( !pc_hdc_file(drv) )
{
@@ -573,33 +536,33 @@ int isa8_hdc_device::test_ready()
return 1;
}
-void isa8_hdc_device::hdc_command()
+void xt_hdc_device::command()
{
int set_error_info = 1;
int old_error = error; /* Previous error data is needed for CMD_SENSE */
- UINT8 cmd;
const char *command_name;
csb = 0x00;
error = 0;
buffer_ptr = &buffer[0];
- cmd = buffer[0];
get_drive();
+ data_cnt = 0;
if (LOG_HDC_STATUS)
{
- command_name = hdc_command_names[cmd] ? hdc_command_names[cmd] : "Unknown";
+ command_name = hdc_command_names[m_current_cmd] ? hdc_command_names[m_current_cmd] : "Unknown";
logerror("%s pc_hdc_command(): Executing command; cmd=0x%02x (%s) drv=%d\n",
- machine().describe_context(), cmd, command_name, drv);
+ machine().describe_context(), m_current_cmd, command_name, drv);
}
- switch (cmd)
+ switch (m_current_cmd)
{
case CMD_TESTREADY:
set_error_info = 0;
test_ready();
+ if(no_dma()) pc_hdc_result(set_error_info);
break;
case CMD_SENSE:
/* Perform error code translation. This may need to be expanded in the future. */
@@ -608,9 +571,11 @@ void isa8_hdc_device::hdc_command()
buffer[data_cnt++] = ((cylinder[drv] >> 2) & 0xc0) | sector[drv];
buffer[data_cnt++] = cylinder[drv] & 0xff;
set_error_info = 0;
+ if(no_dma()) pc_hdc_result(set_error_info);
break;
case CMD_RECALIBRATE:
get_chsn();
+ if(no_dma()) pc_hdc_result(set_error_info);
break;
case CMD_FORMATDRV:
@@ -621,6 +586,7 @@ void isa8_hdc_device::hdc_command()
case CMD_DRIVEDIAG:
get_chsn();
test_ready();
+ if(no_dma()) pc_hdc_result(set_error_info);
break;
case CMD_READ:
@@ -635,6 +601,8 @@ void isa8_hdc_device::hdc_command()
if (test_ready())
execute_read();
+ else
+ pc_hdc_result(1);
set_error_info = 0;
break;
@@ -668,25 +636,25 @@ void isa8_hdc_device::hdc_command()
rwc[drv] = ((buffer[9]&3)<<8) | buffer[10];
wp[drv] = ((buffer[11]&3)<<8) | buffer[12];
ecc[drv] = buffer[13];
+ if(no_dma()) pc_hdc_result(set_error_info);
break;
case CMD_GETECC:
buffer[data_cnt++] = ecc[drv];
+ if(no_dma()) pc_hdc_result(set_error_info);
break;
case CMD_READSBUFF:
case CMD_RAMDIAG:
case CMD_INTERNDIAG:
+ if(no_dma()) pc_hdc_result(set_error_info);
break;
-
}
- if(no_dma()) pc_hdc_result(set_error_info);
}
-
-void isa8_hdc_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
+void xt_hdc_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
- hdc_command();
+ command();
}
@@ -710,14 +678,36 @@ void isa8_hdc_device::device_timer(emu_timer &timer, device_timer_id id, int par
* cccccccc write precomp l
* eeeeeeee ecc
*/
-void isa8_hdc_device::pc_hdc_data_w(int data)
+void xt_hdc_device::data_w(int data)
{
- if( data_cnt == 0 )
+ if(!(status & STA_COMMAND) && m_current_cmd != CMD_SETPARAM)
{
if (LOG_HDC_DATA)
- logerror("hdc_data_w $%02x: ", data);
+ logerror("hdc_data_w PIO $%02x (%i) (%s): \n", data,data_cnt,hdc_command_names[m_current_cmd] ? hdc_command_names[m_current_cmd] : "Unknown");
+ // PIO data transfer
+ buffer[data_cnt++] = data;
+ if(data_cnt >= hdcdma_size)
+ {
+ data_cnt = 0;
+ // write to disk
+ do
+ {
+ if(m_current_cmd == CMD_WRITESBUFF)
+ dack_ws(buffer[data_cnt++]);
+ else
+ dack_w(buffer[data_cnt++]);
+ }
+ while (hdcdma_size);
+ data_cnt = 0;
+ pc_hdc_result(1);
+ }
+ return;
+ }
+ if( data_cnt == 0 )
+ {
buffer_ptr = &buffer[0];
+ m_current_cmd = data;
data_cnt = 6; /* expect 6 bytes including this one */
status &= ~STA_READY;
status &= ~STA_INPUT;
@@ -761,14 +751,16 @@ void isa8_hdc_device::pc_hdc_data_w(int data)
if (data_cnt)
{
if (LOG_HDC_DATA)
- logerror("hdc_data_w $%02x\n", data);
+ logerror("hdc_data_w $%02x (%i) (%s): \n", data,data_cnt,hdc_command_names[m_current_cmd] ? hdc_command_names[m_current_cmd] : "Unknown");
*buffer_ptr++ = data;
// XXX ec1841 wants this
- if (buffer[0] == CMD_SETPARAM && data_cnt == 9 && (m_type == EC1841)) {
+ if (m_current_cmd == CMD_SETPARAM && data_cnt == 9 && (m_type == EC1841)) {
status &= ~STA_READY;
} else {
status |= STA_READY;
+ if(m_current_cmd == CMD_SETPARAM && data_cnt == 9) // some controllers want geometry info as data, not as a command (true for the Seagate ST11M?)
+ status &= ~STA_COMMAND;
}
if (--data_cnt == 0)
{
@@ -786,7 +778,7 @@ void isa8_hdc_device::pc_hdc_data_w(int data)
-void isa8_hdc_device::pc_hdc_reset_w(int data)
+void xt_hdc_device::reset_w(int data)
{
cylinder[0] = cylinder[1] = 0;
head[0] = head[1] = 0;
@@ -800,7 +792,7 @@ void isa8_hdc_device::pc_hdc_reset_w(int data)
-void isa8_hdc_device::pc_hdc_select_w(int data)
+void xt_hdc_device::select_w(int data)
{
status &= ~STA_INTERRUPT;
status |= STA_SELECT;
@@ -808,7 +800,7 @@ void isa8_hdc_device::pc_hdc_select_w(int data)
-void isa8_hdc_device::pc_hdc_control_w(int data)
+void xt_hdc_device::control_w(int data)
{
if (LOG_HDC_STATUS)
logerror("%s: pc_hdc_control_w(): control write %d\n", machine().describe_context(), data);
@@ -817,18 +809,38 @@ void isa8_hdc_device::pc_hdc_control_w(int data)
if (!(hdc_control & 0x02))
{
- if (BIT(dip, 6))
- m_isa->irq5_w(0);
- else
- m_isa->irq2_w(0);
+ m_irq_handler(0);
}
}
-UINT8 isa8_hdc_device::pc_hdc_data_r()
+UINT8 xt_hdc_device::data_r()
{
UINT8 data = 0xff;
+
+ if(!(status & STA_COMMAND) && (m_current_cmd == CMD_READ || m_current_cmd == CMD_READLONG || m_current_cmd == CMD_READSBUFF))
+ {
+ // PIO data transfer
+ if(data_cnt == 0)
+ {
+ do
+ {
+ buffer[data_cnt++] = dack_r();
+ } while (hdcdma_read);
+ data_cnt = 0;
+ }
+ data = buffer[data_cnt++];
+ if(data_cnt >= ((sector_cnt[drv] * 512) ? (sector_cnt[drv] * 512) : (256 * 512)))
+ {
+ data_cnt = 0;
+ pc_hdc_result(1);
+ }
+ if (LOG_HDC_DATA)
+ logerror("hdc_data_r PIO $%02x (%i): \n", data,data_cnt);
+ return data;
+ }
+
if( data_cnt )
{
data = *buffer_ptr++;
@@ -840,43 +852,114 @@ UINT8 isa8_hdc_device::pc_hdc_data_r()
status &= ~STA_SELECT;
status |= STA_COMMAND;
}
+ if (LOG_HDC_DATA)
+ logerror("hdc_data_r $%02x (%i): \n", data,data_cnt);
}
return data;
}
-UINT8 isa8_hdc_device::pc_hdc_status_r()
+UINT8 xt_hdc_device::status_r()
{
return status;
}
+void xt_hdc_device::set_ready()
+{
+ status |= STA_READY; // XXX
+}
+//**************************************************************************
+// GLOBAL VARIABLES
+//**************************************************************************
-/*
- Dipswitch configuration
+const device_type ISA8_HDC = &device_creator<isa8_hdc_device>;
+const device_type ISA8_HDC_EC1841 = &device_creator<isa8_hdc_ec1841_device>;
+//-------------------------------------------------
+// machine_config_additions - device-specific
+// machine configurations
+//-------------------------------------------------
- Tandon/Western Digital Fixed Disk Controller
- bit0-1 : Determine disk size(?)
- Causes geometry data to be read from c8043, c8053, c8063, c8073 (?)
- 00 - 40 Mbytes
- 01 - 30 Mbytes
- 10 - 10 Mbytes
- 11 - 20 Mbytes
- bit2-7 : unknown
+machine_config_constructor isa8_hdc_device::device_mconfig_additions() const
+{
+ return MACHINE_CONFIG_NAME( xt_hdc_config );
+}
- */
+machine_config_constructor isa8_hdc_ec1841_device::device_mconfig_additions() const
+{
+ return MACHINE_CONFIG_NAME( ec1841_hdc_config );
+}
-UINT8 isa8_hdc_device::pc_hdc_dipswitch_r()
+//-------------------------------------------------
+// rom_region - device-specific ROM region
+//-------------------------------------------------
+
+const rom_entry *isa8_hdc_device::device_rom_region() const
+{
+ return ROM_NAME( hdc );
+}
+
+//-------------------------------------------------
+// input_ports - device-specific input ports
+//-------------------------------------------------
+
+ioport_constructor isa8_hdc_device::device_input_ports() const
+{
+ return INPUT_PORTS_NAME( isa_hdc );
+}
+
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
+
+//-------------------------------------------------
+// isa8_hdc_device - constructor
+//-------------------------------------------------
+
+isa8_hdc_device::isa8_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ device_t(mconfig, ISA8_HDC, "Fixed Disk Controller Card", tag, owner, clock, "hdc", __FILE__),
+ device_isa8_card_interface(mconfig, *this),
+ m_hdc(*this,"hdc")
{
- status |= STA_READY; // XXX
- if (LOG_HDC_STATUS)
- logerror("%s: pc_hdc_dipswitch_r: status $%02X\n", machine().describe_context(), status);
- return dip;
}
+isa8_hdc_device::isa8_hdc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+ device_t(mconfig, type, name, tag, owner, clock, shortname, source),
+ device_isa8_card_interface(mconfig, *this),
+ m_hdc(*this,"hdc")
+{
+}
+
+isa8_hdc_ec1841_device::isa8_hdc_ec1841_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ isa8_hdc_device( mconfig, ISA8_HDC_EC1841, "EC1841 HDC", tag, owner, clock, "hdc_ec1841", __FILE__),
+ m_hdc(*this,"hdc")
+{
+}
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void isa8_hdc_device::device_start()
+{
+ set_isa_device();
+ m_isa->install_device(0x0320, 0x0323, 0, 0, read8_delegate( FUNC(isa8_hdc_device::pc_hdc_r), this ), write8_delegate( FUNC(isa8_hdc_device::pc_hdc_w), this ) );
+ m_isa->set_dma_channel(3, this, FALSE);
+}
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+
+void isa8_hdc_device::device_reset()
+{
+ dip = ioport("HDD")->read();
+
+ if (ioport("ROM")->read() == 1)
+ m_isa->install_rom(this, 0xc8000, 0xc9fff, 0, 0, "hdc", "hdc");
+}
/*************************************************************************
*
@@ -890,8 +973,8 @@ READ8_MEMBER( isa8_hdc_device::pc_hdc_r )
switch( offset )
{
- case 0: data = pc_hdc_data_r(); break;
- case 1: data = pc_hdc_status_r(); break;
+ case 0: data = m_hdc->data_r(); break;
+ case 1: data = m_hdc->status_r(); break;
case 2: data = pc_hdc_dipswitch_r(); break;
case 3: break;
}
@@ -909,23 +992,59 @@ WRITE8_MEMBER( isa8_hdc_device::pc_hdc_w )
switch( offset )
{
- case 0: pc_hdc_data_w(data); break;
- case 1: pc_hdc_reset_w(data); break;
- case 2: pc_hdc_select_w(data); break;
- case 3: pc_hdc_control_w(data); break;
+ case 0: m_hdc->data_w(data); break;
+ case 1: m_hdc->reset_w(data); break;
+ case 2: m_hdc->select_w(data); break;
+ case 3: m_hdc->control_w(data); break;
}
}
UINT8 isa8_hdc_device::dack_r(int line)
{
- return pc_hdc_dack_r();
+ return m_hdc->dack_r();
}
void isa8_hdc_device::dack_w(int line,UINT8 data)
{
- if (buffer[0] == CMD_WRITESBUFF)
- pc_hdc_dack_ws(data);
+ if (m_hdc->get_command() == CMD_WRITESBUFF)
+ m_hdc->dack_ws(data);
else
- pc_hdc_dack_w(data);
+ m_hdc->dack_w(data);
+}
+
+/*
+ Dipswitch configuration
+
+
+ Tandon/Western Digital Fixed Disk Controller
+ bit0-1 : Determine disk size(?)
+ Causes geometry data to be read from c8043, c8053, c8063, c8073 (?)
+ 00 - 40 Mbytes
+ 01 - 30 Mbytes
+ 10 - 10 Mbytes
+ 11 - 20 Mbytes
+ bit2-7 : unknown
+
+ */
+
+UINT8 isa8_hdc_device::pc_hdc_dipswitch_r()
+{
+ m_hdc->set_ready();
+ if (LOG_HDC_STATUS)
+ logerror("%s: pc_hdc_dipswitch_r: status $%02X\n", machine().describe_context(), m_hdc->status_r());
+ return dip;
+}
+
+WRITE_LINE_MEMBER( isa8_hdc_device::irq_w )
+{
+ if (BIT(dip, 6))
+ m_isa->irq5_w(state);
+ else
+ m_isa->irq2_w(state);
+}
+
+WRITE_LINE_MEMBER( isa8_hdc_device::drq_w )
+{
+ m_isa->drq3_w(state);
}