diff options
Diffstat (limited to 'src/devices')
120 files changed, 9176 insertions, 8449 deletions
diff --git a/src/devices/bus/a2bus/agat7langcard.cpp b/src/devices/bus/a2bus/agat7langcard.cpp index 9bb00b38c60..b4d2a168f38 100644 --- a/src/devices/bus/a2bus/agat7langcard.cpp +++ b/src/devices/bus/a2bus/agat7langcard.cpp @@ -10,6 +10,9 @@ #include "agat7langcard.h" +//#define VERBOSE 1 +#include "logmacro.h" + /*************************************************************************** PARAMETERS ***************************************************************************/ @@ -30,7 +33,7 @@ DEFINE_DEVICE_TYPE(A2BUS_AGAT7LANGCARD, a2bus_agat7langcard_device, "a7lang", "A a2bus_agat7langcard_device::a2bus_agat7langcard_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, type, tag, owner, clock), - device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_last_offset(0), m_dxxx_bank(0), m_main_bank(0) + device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_dxxx_bank(0), m_main_bank(0), m_csr(0) { } @@ -48,13 +51,13 @@ void a2bus_agat7langcard_device::device_start() // set_a2bus_device makes m_slot valid set_a2bus_device(); - memset(m_ram, 0, 32*1024); + memset(m_ram, 0, 32 * 1024); save_item(NAME(m_inh_state)); save_item(NAME(m_ram)); save_item(NAME(m_dxxx_bank)); save_item(NAME(m_main_bank)); - save_item(NAME(m_last_offset)); + save_item(NAME(m_csr)); } void a2bus_agat7langcard_device::device_reset() @@ -62,7 +65,7 @@ void a2bus_agat7langcard_device::device_reset() m_inh_state = INH_NONE; m_dxxx_bank = 0; m_main_bank = 0; - m_last_offset = -1; + m_csr = 0; m_mode = 0; } @@ -70,7 +73,7 @@ void a2bus_agat7langcard_device::do_io(int offset) { int old_inh_state = m_inh_state; - m_last_offset = offset; + m_csr = offset & 0x7f; m_inh_state = INH_WRITE; m_dxxx_bank = 0; @@ -91,13 +94,11 @@ void a2bus_agat7langcard_device::do_io(int offset) recalc_slot_inh(); } -#if 1 - logerror("LC: (ofs %02x) new state %c%c dxxx=%04x main=%05x\n", + LOG("LC: (ofs %02x) new state %c%c dxxx=%04x main=%05x\n", offset, (m_inh_state & INH_READ) ? 'R' : 'x', (m_inh_state & INH_WRITE) ? 'W' : 'x', m_dxxx_bank, m_main_bank); -#endif } @@ -107,7 +108,7 @@ void a2bus_agat7langcard_device::do_io(int offset) uint8_t a2bus_agat7langcard_device::read_cnxx(address_space &space, uint8_t offset) { - return m_last_offset < 0 ? 0x80 : (0x80 | m_last_offset); + return (0x80 | m_csr); } diff --git a/src/devices/bus/a2bus/agat7langcard.h b/src/devices/bus/a2bus/agat7langcard.h index 13647abfb11..be3a650a222 100644 --- a/src/devices/bus/a2bus/agat7langcard.h +++ b/src/devices/bus/a2bus/agat7langcard.h @@ -47,11 +47,11 @@ private: void do_io(int offset); int m_inh_state; - int m_last_offset; int m_dxxx_bank; int m_main_bank; - uint8_t m_ram[32*1024]; + uint8_t m_ram[32 * 1024]; uint8_t m_mode; + uint8_t m_csr; }; // device type definition diff --git a/src/devices/bus/a2bus/agat7ram.cpp b/src/devices/bus/a2bus/agat7ram.cpp index dde0260db3f..51bbabb792c 100644 --- a/src/devices/bus/a2bus/agat7ram.cpp +++ b/src/devices/bus/a2bus/agat7ram.cpp @@ -10,6 +10,9 @@ #include "agat7ram.h" +//#define VERBOSE 1 +#include "logmacro.h" + /*************************************************************************** PARAMETERS ***************************************************************************/ @@ -30,7 +33,7 @@ DEFINE_DEVICE_TYPE(A2BUS_AGAT7RAM, a2bus_agat7ram_device, "a7ram", "Agat-7 32K R a2bus_agat7ram_device::a2bus_agat7ram_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, type, tag, owner, clock), - device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_last_offset(0), m_main_bank(0) + device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_main_bank(0), m_csr(0) { } @@ -48,32 +51,32 @@ void a2bus_agat7ram_device::device_start() // set_a2bus_device makes m_slot valid set_a2bus_device(); - memset(m_ram, 0, 32*1024); + memset(m_ram, 0, 32 * 1024); save_item(NAME(m_inh_state)); save_item(NAME(m_ram)); save_item(NAME(m_main_bank)); - save_item(NAME(m_last_offset)); + save_item(NAME(m_csr)); } void a2bus_agat7ram_device::device_reset() { m_inh_state = INH_NONE; m_main_bank = 0; - m_last_offset = -1; + m_csr = 0; } void a2bus_agat7ram_device::do_io(int offset) { int old_inh_state = m_inh_state; - m_last_offset = offset; + m_csr = offset & 0x7f; m_inh_state = INH_NONE; m_main_bank = 0; if (offset & 0x8) { - m_inh_state = INH_READ|INH_WRITE; + m_inh_state = INH_READ | INH_WRITE; } if (offset & 0x1) @@ -86,13 +89,11 @@ void a2bus_agat7ram_device::do_io(int offset) recalc_slot_inh(); } -#if 1 - logerror("RAM: (ofs %02x) new state %c%c main=%05x\n", + LOG("RAM: (ofs %02x) new state %c%c main=%05x\n", offset, (m_inh_state & INH_READ) ? 'R' : 'x', (m_inh_state & INH_WRITE) ? 'W' : 'x', m_main_bank); -#endif } @@ -102,7 +103,7 @@ void a2bus_agat7ram_device::do_io(int offset) uint8_t a2bus_agat7ram_device::read_cnxx(address_space &space, uint8_t offset) { - return m_last_offset < 0 ? 0 : (m_last_offset & 0x7f); + return m_csr; } @@ -125,12 +126,10 @@ uint8_t a2bus_agat7ram_device::read_inh_rom(address_space &space, uint16_t offse void a2bus_agat7ram_device::write_inh_rom(address_space &space, uint16_t offset, uint8_t data) { // are writes enabled? - if (!(m_inh_state & INH_WRITE)) + if ((m_inh_state & INH_WRITE) && !BIT(m_csr, 4)) { - return; + m_ram[(offset & 0x3fff) + m_main_bank] = data; } - - m_ram[(offset & 0x3fff) + m_main_bank] = data; } int a2bus_agat7ram_device::inh_type() diff --git a/src/devices/bus/a2bus/agat7ram.h b/src/devices/bus/a2bus/agat7ram.h index e30aaf7b94b..3476e738179 100644 --- a/src/devices/bus/a2bus/agat7ram.h +++ b/src/devices/bus/a2bus/agat7ram.h @@ -47,9 +47,9 @@ private: void do_io(int offset); int m_inh_state; - int m_last_offset; int m_main_bank; - uint8_t m_ram[32*1024]; + uint8_t m_ram[32 * 1024]; + uint8_t m_csr; }; // device type definition diff --git a/src/devices/bus/a2bus/agat840k_hle.cpp b/src/devices/bus/a2bus/agat840k_hle.cpp new file mode 100644 index 00000000000..72217fbe464 --- /dev/null +++ b/src/devices/bus/a2bus/agat840k_hle.cpp @@ -0,0 +1,449 @@ +// license:BSD-3-Clause +// copyright-holders:Sergey Svishchev +/********************************************************************* + + agat840k_hle.cpp + + High-level simulation of the Agat 840K floppy controller card + + http://agatcomp.ru/Reading/docs/es5323.txt + https://github.com/sintech/AGAT/blob/master/docs/agat-840k-format.txt + http://www.torlus.com/floppy/forum/viewtopic.php?f=19&t=1385 + +*********************************************************************/ + +#include "emu.h" +#include "agat840k_hle.h" + +#include "formats/agat840k_hle_dsk.h" + +//#define VERBOSE 1 +#include "logmacro.h" + + +/*************************************************************************** + PARAMETERS +***************************************************************************/ + +//************************************************************************** +// GLOBAL VARIABLES +//************************************************************************** + +DEFINE_DEVICE_TYPE(A2BUS_AGAT840K_HLE, a2bus_agat840k_hle_device, "agat840k_hle", "Agat 840K floppy card") + +#define AGAT840K_ROM_REGION "agat840k_hle_rom" + + +ROM_START( agat840k_hle ) + ROM_REGION(0x100, AGAT840K_ROM_REGION, 0) + // "Zagorsk" variant + ROM_LOAD( "teac.rom", 0x0000, 0x0100, CRC(94266928) SHA1(5d369bad6cdd6a70b0bb16480eba69640de87a2e) ) +ROM_END + +//------------------------------------------------- +// device_add_mconfig - add device configuration +//------------------------------------------------- + +static const floppy_interface agat840k_hle_floppy_interface = +{ + FLOPPY_STANDARD_5_25_DSHD, + LEGACY_FLOPPY_OPTIONS_NAME(agat840k_hle), + "floppy_5_25" +}; + +MACHINE_CONFIG_MEMBER( a2bus_agat840k_hle_device::device_add_mconfig ) + MCFG_DEVICE_ADD(FLOPPY_0, LEGACY_FLOPPY, 0) + MCFG_LEGACY_FLOPPY_CONFIG(agat840k_hle_floppy_interface) + MCFG_LEGACY_FLOPPY_IDX_CB(WRITELINE(a2bus_agat840k_hle_device, index_0_w)) + MCFG_DEVICE_ADD(FLOPPY_1, LEGACY_FLOPPY, 0) + MCFG_LEGACY_FLOPPY_CONFIG(agat840k_hle_floppy_interface) + MCFG_LEGACY_FLOPPY_IDX_CB(WRITELINE(a2bus_agat840k_hle_device, index_1_w)) + + MCFG_DEVICE_ADD("d14", I8255, 0) + // PA not connected + MCFG_I8255_IN_PORTB_CB(READ8(a2bus_agat840k_hle_device, d14_i_b)) // status signals from drive + MCFG_I8255_OUT_PORTC_CB(WRITE8(a2bus_agat840k_hle_device, d14_o_c)) // control + + MCFG_DEVICE_ADD("d15", I8255, 0) + MCFG_I8255_IN_PORTA_CB(READ8(a2bus_agat840k_hle_device, d15_i_a)) // read data +// MCFG_I8255_OUT_PORTB_CB(WRITE8(a2bus_agat840k_hle_device, d15_o_b)) // write data + MCFG_I8255_IN_PORTC_CB(READ8(a2bus_agat840k_hle_device, d15_i_c)) + MCFG_I8255_OUT_PORTC_CB(WRITE8(a2bus_agat840k_hle_device, d15_o_c)) +MACHINE_CONFIG_END + +//------------------------------------------------- +// rom_region - device-specific ROM region +//------------------------------------------------- + +const tiny_rom_entry *a2bus_agat840k_hle_device::device_rom_region() const +{ + return ROM_NAME(agat840k_hle); +} + +//************************************************************************** +// LIVE DEVICE +//************************************************************************** + +a2bus_agat840k_hle_device::a2bus_agat840k_hle_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) + , device_a2bus_card_interface(mconfig, *this) + , m_d14(*this, "d14") + , m_d15(*this, "d15") + , m_rom(nullptr) +{ +} + +a2bus_agat840k_hle_device::a2bus_agat840k_hle_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + a2bus_agat840k_hle_device(mconfig, A2BUS_AGAT840K_HLE, tag, owner, clock) +{ +} + +WRITE_LINE_MEMBER(a2bus_agat840k_hle_device::index_0_w) +{ + index_callback(0, state); +} + +WRITE_LINE_MEMBER(a2bus_agat840k_hle_device::index_1_w) +{ + index_callback(1, state); +} + +void a2bus_agat840k_hle_device::index_callback(int unit, int state) +{ + if (unit != m_unit) return; + + LOG("index: unit %d state %d (%s)\n", unit, state, m_seen_magic ? "MAGIC" : "magic"); + +#if 0 + if (!state && !m_seen_magic) + { + m_seen_magic = true; + m_count_read = 0; + m_count_write = 0; + m_d15->pc4_w(0); // latch data into port A + m_d15->pc4_w(1); + m_timer_wait->adjust(attotime::from_usec(m_waittime), 0, attotime::from_usec(m_waittime)); + } +#endif +} + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void a2bus_agat840k_hle_device::device_start() +{ + // set_a2bus_device makes m_slot valid + set_a2bus_device(); + + m_rom = device().machine().root_device().memregion(this->subtag(AGAT840K_ROM_REGION).c_str())->base(); + + m_mxcs = MXCSR_SYNC; + + m_timer_wait = timer_alloc(TIMER_ID_WAIT); + m_timer_seek = timer_alloc(TIMER_ID_SEEK); + + m_seektime = 6000; // 6 ms, per es5323.txt + m_waittime = 32; // 16 bits x 2 us +} + +void a2bus_agat840k_hle_device::device_reset() +{ + u8 buf[256]; + + for (int i = 0; i < 2; i++) + { + legacy_floppy_image_device *img = floppy_image(i); + if (img) + { + img->floppy_drive_set_ready_state(FLOPPY_DRIVE_READY, 0); + img->floppy_drive_set_rpm(300.); + img->floppy_drive_seek(-img->floppy_drive_get_current_track()); + } + } + m_floppy = floppy_image(0); + + // generate track images in memory, using default volume ID and gap padding bytes + int t = 0; + for (auto &elem : m_tracks) + { + elem = std::make_unique<uint16_t[]>(6250); + + for (int i = 0; i < 13; i++) + { + elem[i] = 0xaa; + } + for (int j = 0; j < 21; j++) + { + const int s = (j * 1) % 21; + int cksum = 0; + + m_floppy->floppy_drive_read_sector_data(t & 1, s, buf, 256); + + enum + { + BAUX = 22, + BLOB = 256 + 19 + BAUX + }; + + for (int k = 0; k < 256; k++) + { + if (cksum > 255) { cksum++; cksum &= 255; } + cksum += buf[k]; + elem[13 + (BLOB * j) + 17 + k] = buf[k]; + } + cksum &= 255; + + elem[13 + (BLOB * j) + 0] = 0xa4; + elem[13 + (BLOB * j) + 1] = 0x80ff; // desync + elem[13 + (BLOB * j) + 2] = 0x95; + elem[13 + (BLOB * j) + 3] = 0x6a; + elem[13 + (BLOB * j) + 4] = 0x40fe; // volume id + elem[13 + (BLOB * j) + 5] = t; + elem[13 + (BLOB * j) + 6] = s; + elem[13 + (BLOB * j) + 7] = 0x5a; + elem[13 + (BLOB * j) + 8] = 0xaa; + elem[13 + (BLOB * j) + 9] = 0xaa; + elem[13 + (BLOB * j) + 10] = 0xaa; + elem[13 + (BLOB * j) + 11] = 0xaa; + elem[13 + (BLOB * j) + 12] = 0xaa; + elem[13 + (BLOB * j) + 13] = 0xa4; + elem[13 + (BLOB * j) + 14] = 0x80ff; // desync + elem[13 + (BLOB * j) + 15] = 0x6a; + elem[13 + (BLOB * j) + 16] = 0x95; + elem[13 + (BLOB * j) + 17 + 256] = cksum + 0x2000; + elem[13 + (BLOB * j) + 17 + 257] = 0x5a; + + // gap3 + for (int k = 0; k < BAUX; k++) + { + elem[13 + (BLOB * j) + 17 + 258 + k] = 0xaa; + } + } + + t++; + if ((t & 1) == 0) + { + m_floppy->floppy_drive_seek(1); + } + } + m_floppy->floppy_drive_seek(-m_floppy->floppy_drive_get_current_track()); + + m_mxcs |= MXCSR_SYNC; + m_mxcs &= ~MXCSR_TR; +} + +void a2bus_agat840k_hle_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ + switch (id) + { + case TIMER_ID_WAIT: + { + m_count_read++; + m_count_read %= 6250; + m_d15->pc4_w(0); + m_d15->pc4_w(1); + if (BIT(m_tracks[(2 * m_floppy->floppy_drive_get_current_track()) + m_side][m_count_read], 15)) + m_mxcs &= ~MXCSR_SYNC; + } + break; + + case TIMER_ID_SEEK: + m_floppy->floppy_stp_w(1); + m_floppy->floppy_stp_w(0); + break; + } +} + + +/*------------------------------------------------- + read_c0nx - called for reads from this card's c0nx space +-------------------------------------------------*/ + +uint8_t a2bus_agat840k_hle_device::read_c0nx(address_space &space, uint8_t offset) +{ + u8 data; + + switch (offset) + { + case 0: case 1: case 2: case 3: + data = m_d14->read(space, offset); + break; + + case 4: case 5: case 6: case 7: + data = m_d15->read(space, offset - 4); + break; + + default: + data = 0xff; + break; + } + + return data; +} + + +/*------------------------------------------------- + write_c0nx - called for writes to this card's c0nx space +-------------------------------------------------*/ + +void a2bus_agat840k_hle_device::write_c0nx(address_space &space, uint8_t offset, uint8_t data) +{ + switch (offset) + { + case 0: case 1: case 2: case 3: + m_d14->write(space, offset, data); + break; + + case 4: case 5: case 6: case 7: + m_d15->write(space, offset - 4, data); + break; + + case 8: // write desync + break; + + case 9: // step + LOG("step at %11.6f\n", machine().time().as_double()); + m_seen_magic = false; + m_timer_wait->adjust(attotime::from_usec(m_seektime), 0, attotime::from_usec(m_waittime)); + m_floppy->floppy_stp_w(1); + m_floppy->floppy_stp_w(0); + break; + + case 10: // reset desync flipflop + m_mxcs |= MXCSR_SYNC; + break; + + default: + break; + } +} + +/*------------------------------------------------- + read_cnxx - called for reads from this card's c0nx space +-------------------------------------------------*/ + +uint8_t a2bus_agat840k_hle_device::read_cnxx(address_space &space, uint8_t offset) +{ + return m_rom[offset]; +} + +legacy_floppy_image_device *a2bus_agat840k_hle_device::floppy_image(int drive) +{ + const char *floppy_name = nullptr; + + switch (drive) + { + case 0: + floppy_name = FLOPPY_0; + break; + case 1: + floppy_name = FLOPPY_1; + break; + } + return subdevice<legacy_floppy_image_device>(floppy_name); +} + +// all signals active low. write support not implemented; WPT is always active. +READ8_MEMBER(a2bus_agat840k_hle_device::d14_i_b) +{ + u8 data = 0x03; // one drive present, because drive select is broken + + m_floppy->floppy_drive_set_ready_state(FLOPPY_DRIVE_READY, 1); + + data |= (m_floppy->floppy_index_r() << 4) ^ 0x10; +// data |= m_floppy->floppy_wpt_r() << 5; + data |= m_floppy->floppy_tk00_r() << 6; + data |= m_floppy->floppy_ready_r() << 7; + + LOG("status A: %s %s (t %d) %s %s\n", BIT(data, 7) ? "ready" : "READY", BIT(data, 6) ? "tk00" : "TK00", + m_floppy->floppy_drive_get_current_track(), + BIT(data, 5) ? "wpt" : "WPT", BIT(data, 4) ? "index" : "INDEX"); + + return data; +} + +/* + * b0 AH strong write precomp + * b1 -- NC + * b2 -- step direction (1 - inward, 0 - outward) + * b3 -- drive select (0 - drive 1, 1 - drive 2) + * b4 -- head select (0 - bottom, 1 - top) + * b5 AH write precomp off + * b6 AH write enable + * b7 AH motor on + * + * C0x2 + */ +WRITE8_MEMBER(a2bus_agat840k_hle_device::d14_o_c) +{ + // drive select is broken in legacy flopdrv.cpp -- floppy_get_drive + m_unit = BIT(data, 3); + m_floppy = floppy_image(m_unit); + if (m_unit) + m_floppy->floppy_ds1_w(m_unit != 1); + else + m_floppy->floppy_ds0_w(m_unit != 0); + + m_floppy->floppy_drtn_w(!BIT(data, 2)); + m_side = BIT(data, 4); + m_floppy->floppy_wtg_w(!BIT(data, 6)); + m_floppy->floppy_mon_w(!BIT(data, 7)); // tied to 'drive select', 'motor on' and 'head load' + + if (!BIT(data, 7)) + { + m_seen_magic = false; + m_timer_wait->adjust(attotime::never); + } + else + { + m_d15->pc4_w(0); + m_d15->pc4_w(1); + m_timer_wait->adjust(attotime::from_usec(m_waittime), 0, attotime::from_usec(m_waittime)); + } + + LOG("D14 C <- %02X (unit %d side %d drtn %d wtg %d mon %d)\n", + data, m_unit, m_side, !BIT(data, 2), !BIT(data, 6), !BIT(data, 7)); +} + +// data are latched in by write to PC4 +READ8_MEMBER(a2bus_agat840k_hle_device::d15_i_a) +{ + const u16 data = m_tracks[(2 * m_floppy->floppy_drive_get_current_track()) + m_side][m_count_read]; + LOG("sector data: %02x @ %4d (head %d track %2d)%s\n", data & 0xff, m_count_read, + m_side, m_floppy->floppy_drive_get_current_track(), + BIT(data, 14) ? " volume" : (BIT(data, 13) ? " cksum" : "")); + + return data & 0xff; +} + +// C0x6 +// +// b6 AL desync detected +// b7 AH read or write data ready +READ8_MEMBER(a2bus_agat840k_hle_device::d15_i_c) +{ + LOG("status B: @ %4d %s %s (%s)\n", m_count_read, + BIT(m_mxcs, 7) ? "ready" : "READY", BIT(m_mxcs, 6) ? "SYNC" : "sync", + m_seen_magic ? "MAGIC" : "magic"); + + return m_mxcs; +} + +// C0x7 +// +// b0 -- connected to b7, set if m_intr[PORT_B] +// b2 AH b7 = ready for write data +// b3 -- connected to b7, set if m_intr[PORT_A] +// b4 AH b7 = read data ready +WRITE8_MEMBER(a2bus_agat840k_hle_device::d15_o_c) +{ + if (BIT(data, 0) || BIT(data, 3)) + { + m_mxcs |= MXCSR_TR; + } + else + { + m_mxcs &= ~MXCSR_TR; + } +} diff --git a/src/devices/bus/a2bus/agat840k_hle.h b/src/devices/bus/a2bus/agat840k_hle.h new file mode 100644 index 00000000000..cab186c2c62 --- /dev/null +++ b/src/devices/bus/a2bus/agat840k_hle.h @@ -0,0 +1,103 @@ +// license:BSD-3-Clause +// copyright-holders:Sergey Svishchev +/********************************************************************* + + agat840k_hle.h + + High-level simulation of the Agat 840K floppy controller card + +*********************************************************************/ + +#ifndef MAME_BUS_A2BUS_AGAT840K_HLE_H +#define MAME_BUS_A2BUS_AGAT840K_HLE_H + +#pragma once + +#include "a2bus.h" +#include "imagedev/flopdrv.h" +#include "machine/i8255.h" + + + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +class a2bus_agat840k_hle_device: + public device_t, + public device_a2bus_card_interface +{ +public: + enum : u8 + { + MXCSR_SYNC = 0x40, + MXCSR_TR = 0x80 + }; + + // construction/destruction + a2bus_agat840k_hle_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + DECLARE_READ8_MEMBER(d14_i_b); + DECLARE_READ8_MEMBER(d15_i_a); + DECLARE_READ8_MEMBER(d15_i_c); + DECLARE_WRITE8_MEMBER(d14_o_c); + DECLARE_WRITE8_MEMBER(d15_o_b); + DECLARE_WRITE8_MEMBER(d15_o_c); + + DECLARE_WRITE_LINE_MEMBER(index_0_w); + DECLARE_WRITE_LINE_MEMBER(index_1_w); + + void index_callback(int unit, int state); + +protected: + // construction/destruction + a2bus_agat840k_hle_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + virtual void device_start() override; + virtual void device_reset() override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + virtual void device_add_mconfig(machine_config &config) override; + virtual const tiny_rom_entry *device_rom_region() const override; + + // overrides of standard a2bus slot functions + virtual uint8_t read_c0nx(address_space &space, uint8_t offset) override; + virtual void write_c0nx(address_space &space, uint8_t offset, uint8_t data) override; + virtual uint8_t read_cnxx(address_space &space, uint8_t offset) override; + + enum + { + TIMER_ID_WAIT = 0, + TIMER_ID_SEEK + }; + + required_device<i8255_device> m_d14; + required_device<i8255_device> m_d15; + +private: + legacy_floppy_image_device *floppy_image(int drive); + legacy_floppy_image_device *m_floppy; + bool m_side; + + std::unique_ptr<uint16_t[]> m_tracks[160]; + int m_count_read; + int m_count_write; + bool m_seen_magic; + int m_current_track; + + u8 m_mxcs; + int m_unit; + int m_state; + + int m_seektime; + int m_waittime; + + emu_timer *m_timer_wait = nullptr; + emu_timer *m_timer_seek = nullptr; + + uint8_t *m_rom; +}; + +// device type definition +DECLARE_DEVICE_TYPE(A2BUS_AGAT840K_HLE, a2bus_agat840k_hle_device) + +#endif // MAME_BUS_A2BUS_AGAT840K_HLE_H diff --git a/src/devices/bus/c64/silverrock.cpp b/src/devices/bus/c64/silverrock.cpp index 2260b82738a..a34f21d17a7 100644 --- a/src/devices/bus/c64/silverrock.cpp +++ b/src/devices/bus/c64/silverrock.cpp @@ -37,10 +37,10 @@ //************************************************************************** #define UNSCRAMBLE_ADDRESS(_offset) \ - BITSWAP16(_offset,15,14,13,12,1,0,2,3,11,10,9,8,7,6,5,4) + bitswap<16>(_offset,15,14,13,12,1,0,2,3,11,10,9,8,7,6,5,4) #define UNSCRAMBLE_DATA(_data) \ - BITSWAP8(_data,7,6,5,4,0,1,2,3) + bitswap<8>(_data,7,6,5,4,0,1,2,3) diff --git a/src/devices/bus/c64/stardos.cpp b/src/devices/bus/c64/stardos.cpp index ce3d19f0b9b..c8e47d300e8 100644 --- a/src/devices/bus/c64/stardos.cpp +++ b/src/devices/bus/c64/stardos.cpp @@ -142,7 +142,7 @@ uint8_t c64_stardos_cartridge_device::c64_cd_r(address_space &space, offs_t offs { if (!roml || !romh) { - // TODO BITSWAP8(7,6,5,4,3,1,2,0) ? + // TODO bitswap<8>(7,6,5,4,3,1,2,0) ? data = m_roml[offset & 0x3fff]; } else if (!io1) diff --git a/src/devices/bus/c64/vizastar.cpp b/src/devices/bus/c64/vizastar.cpp index 03043e7de93..444ff656b68 100644 --- a/src/devices/bus/c64/vizastar.cpp +++ b/src/devices/bus/c64/vizastar.cpp @@ -36,10 +36,10 @@ //************************************************************************** #define UNSCRAMBLE_ADDRESS(_offset) \ - BITSWAP16(_offset,15,14,13,12,5,0,7,10,11,9,8,6,4,3,2,1) + bitswap<16>(_offset,15,14,13,12,5,0,7,10,11,9,8,6,4,3,2,1) #define UNSCRAMBLE_DATA(_data) \ - BITSWAP8(_data,7,6,0,5,1,4,2,3) + bitswap<8>(_data,7,6,0,5,1,4,2,3) diff --git a/src/devices/bus/c64/vw64.cpp b/src/devices/bus/c64/vw64.cpp index f6ed996765a..ea0d3c3dac2 100644 --- a/src/devices/bus/c64/vw64.cpp +++ b/src/devices/bus/c64/vw64.cpp @@ -40,10 +40,10 @@ //************************************************************************** #define UNSCRAMBLE_ADDRESS(_offset) \ - BITSWAP16(_offset,15,14,13,12,6,2,8,10,11,9,7,5,4,3,1,0) + bitswap<16>(_offset,15,14,13,12,6,2,8,10,11,9,7,5,4,3,1,0) #define UNSCRAMBLE_DATA(_data) \ - BITSWAP8(_data,7,6,0,5,1,4,2,3) + bitswap<8>(_data,7,6,0,5,1,4,2,3) // 74LS122 tW=0.45*R*C = 1.1844s diff --git a/src/devices/bus/c64/warp_speed.cpp b/src/devices/bus/c64/warp_speed.cpp index e9098dadb44..3c266e3618d 100644 --- a/src/devices/bus/c64/warp_speed.cpp +++ b/src/devices/bus/c64/warp_speed.cpp @@ -38,10 +38,10 @@ //************************************************************************** #define UNSCRAMBLE_ADDRESS(_offset) \ - BITSWAP16(_offset,15,14,12,13,5,2,7,9,11,10,8,6,4,3,1,0) + bitswap<16>(_offset,15,14,12,13,5,2,7,9,11,10,8,6,4,3,1,0) #define UNSCRAMBLE_DATA(_data) \ - BITSWAP8(_data,7,6,5,0,1,4,2,3) + bitswap<8>(_data,7,6,5,0,1,4,2,3) diff --git a/src/devices/bus/cbmiec/c1541.cpp b/src/devices/bus/cbmiec/c1541.cpp index 4d0f9748966..427cebe1e31 100644 --- a/src/devices/bus/cbmiec/c1541.cpp +++ b/src/devices/bus/cbmiec/c1541.cpp @@ -1071,7 +1071,7 @@ void fsd2_device::device_start() for (offs_t offset = 0; offset < 0x4000; offset++) { - uint8_t data = BITSWAP8(rom[offset], 7, 6, 5, 3, 4, 2, 1, 0); + uint8_t data = bitswap<8>(rom[offset], 7, 6, 5, 3, 4, 2, 1, 0); rom[offset] = data; } diff --git a/src/devices/bus/chanf/rom.cpp b/src/devices/bus/chanf/rom.cpp index 3dc509a29d9..a3a213ba7ed 100644 --- a/src/devices/bus/chanf/rom.cpp +++ b/src/devices/bus/chanf/rom.cpp @@ -192,7 +192,7 @@ void chanf_rom_device::common_write_2102(uint32_t offset, uint8_t data) m_latch[1] = data; // all bits but 2,3 come from this write, but they are shuffled // notice that data is 8bits, so when swapping bit8 & bit9 are always 0! - m_addr_latch = (m_addr_latch & 0x0c) | (BITSWAP16((uint16_t) data, 15, 14, 13, 12, 11, 10, 7, 6, 5, 3, 2, 1, 9, 8, 4, 0)); + m_addr_latch = (m_addr_latch & 0x0c) | (bitswap<16>((uint16_t) data, 15, 14, 13, 12, 11, 10, 7, 6, 5, 3, 2, 1, 9, 8, 4, 0)); } } diff --git a/src/devices/bus/coco/coco_fdc.cpp b/src/devices/bus/coco/coco_fdc.cpp index 64268c8b17b..01f91976db2 100644 --- a/src/devices/bus/coco/coco_fdc.cpp +++ b/src/devices/bus/coco/coco_fdc.cpp @@ -494,22 +494,27 @@ namespace DEFINE_DEVICE_TYPE(COCO3_HDB1, coco3_hdb1_device, "coco3_hdb1", "CoCo3 HDB-DOS") //************************************************************************** -// CP400 FDC +// Prológica CP-450 BASIC Disco V. 1.0 (1984) +// +// There is a photo of the CP-450 disk controller unit at: +// https://datassette.org/softwares/tandy-trs-color/cp-450-basic-disco-v-10 +// http://files.datassette.org/softwares/img/wp_20141212_22_08_26_pro.jpg +// //************************************************************************** -ROM_START(cp400_fdc) +ROM_START(cp450_fdc) ROM_REGION(0x4000, "eprom", ROMREGION_ERASE00) - ROM_LOAD("cp400dsk.rom", 0x0000, 0x2000, CRC(e9ad60a0) SHA1(827697fa5b755f5dc1efb054cdbbeb04e405405b)) + ROM_LOAD("cp450_basic_disco_v1.0.rom", 0x0000, 0x2000, CRC(e9ad60a0) SHA1(827697fa5b755f5dc1efb054cdbbeb04e405405b)) ROM_END namespace { - class cp400_fdc_device : public coco_fdc_device_base + class cp450_fdc_device : public coco_fdc_device_base { public: // construction/destruction - cp400_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : coco_fdc_device_base(mconfig, CP400_FDC, tag, owner, clock) + cp450_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : coco_fdc_device_base(mconfig, CP450_FDC, tag, owner, clock) { } @@ -517,12 +522,12 @@ namespace // optional information overrides virtual const tiny_rom_entry *device_rom_region() const override { - return ROM_NAME(cp400_fdc); + return ROM_NAME(cp450_fdc); } }; } -DEFINE_DEVICE_TYPE(CP400_FDC, cp400_fdc_device, "cp400_fdc", "CP400 FDC") +DEFINE_DEVICE_TYPE(CP450_FDC, cp450_fdc_device, "cp450_fdc", "Prológica CP-450 BASIC Disco V. 1.0 (1984)") //************************************************************************** // Codimex CD-6809 FDC (1986) @@ -556,4 +561,4 @@ namespace }; } -DEFINE_DEVICE_TYPE(CD6809_FDC, cd6809_fdc_device, "cd6809_fdc", "CD6809 FDC") +DEFINE_DEVICE_TYPE(CD6809_FDC, cd6809_fdc_device, "cd6809_fdc", "Codimex CD-6809 Disk BASIC (1986)") diff --git a/src/devices/bus/coco/coco_fdc.h b/src/devices/bus/coco/coco_fdc.h index 11343ec2610..7ca2ca9e6fe 100644 --- a/src/devices/bus/coco/coco_fdc.h +++ b/src/devices/bus/coco/coco_fdc.h @@ -64,7 +64,7 @@ private: extern const device_type COCO_FDC; extern const device_type COCO_FDC_V11; extern const device_type COCO3_HDB1; -extern const device_type CP400_FDC; +extern const device_type CP450_FDC; extern const device_type CD6809_FDC; #endif // MAME_BUS_COCO_COCO_FDC_H diff --git a/src/devices/bus/gameboy/mbc.cpp b/src/devices/bus/gameboy/mbc.cpp index de71f483779..4a48d896a94 100644 --- a/src/devices/bus/gameboy/mbc.cpp +++ b/src/devices/bus/gameboy/mbc.cpp @@ -1057,26 +1057,26 @@ WRITE8_MEMBER(gb_rom_sintax_device::write_bank) switch (m_sintax_mode & 0x0f) { case 0x0d: - data = BITSWAP8(data, 1,0,7,6,5,4,3,2); + data = bitswap<8>(data, 1,0,7,6,5,4,3,2); break; case 0x09: - //data = BITSWAP8(data, 3,2,5,4,0,1,6,7); // Monkey..no - data = BITSWAP8(data, 4,5,2,3,0,1,6,7); + //data = bitswap<8>(data, 3,2,5,4,0,1,6,7); // Monkey..no + data = bitswap<8>(data, 4,5,2,3,0,1,6,7); break; case 0x00: // 0x10=lion 0x00 hmmmmm // 1 and 0 unconfirmed - data = BITSWAP8(data, 7,0,5,6,3,4,1,2); + data = bitswap<8>(data, 7,0,5,6,3,4,1,2); break; case 0x01: - data = BITSWAP8(data, 0,1,6,7,4,5,2,3); + data = bitswap<8>(data, 0,1,6,7,4,5,2,3); break; case 0x05: - data = BITSWAP8(data, 7,6,1,0,3,2,5,4); // Not 100% on this one + data = bitswap<8>(data, 7,6,1,0,3,2,5,4); // Not 100% on this one break; case 0x07: - data = BITSWAP8(data, 2,0,3,1,5,4,7,6); // 5 and 7 unconfirmed + data = bitswap<8>(data, 2,0,3,1,5,4,7,6); // 5 and 7 unconfirmed break; case 0x0b: - data = BITSWAP8(data, 2,3,0,1,6,7,4,5); // 5 and 6 unconfirmed + data = bitswap<8>(data, 2,3,0,1,6,7,4,5); // 5 and 6 unconfirmed break; } m_latch_bank2 = (m_latch_bank2 & 0x100) | data; diff --git a/src/devices/bus/msx_cart/dooly.cpp b/src/devices/bus/msx_cart/dooly.cpp index 389e0c3da77..d1d3ad9ff39 100644 --- a/src/devices/bus/msx_cart/dooly.cpp +++ b/src/devices/bus/msx_cart/dooly.cpp @@ -45,7 +45,7 @@ READ8_MEMBER(msx_cart_dooly_device::read_cart) switch (m_prot) { case 0x04: - data = BITSWAP8(data, 7, 6, 5, 4, 3, 1, 0, 2); + data = bitswap<8>(data, 7, 6, 5, 4, 3, 1, 0, 2); break; } return data; diff --git a/src/devices/bus/neogeo/boot_kof10th.cpp b/src/devices/bus/neogeo/boot_kof10th.cpp index 6f31cf6717a..167692f986d 100644 --- a/src/devices/bus/neogeo/boot_kof10th.cpp +++ b/src/devices/bus/neogeo/boot_kof10th.cpp @@ -102,7 +102,7 @@ WRITE16_MEMBER(neogeo_kof10th_cart_device::protection_w) if (!m_cart_ram[0xffe]) COMBINE_DATA(&m_cart_ram2[(0x00000/2) + (offset & 0xffff)]); // Write to RAM bank A else - m_fixed[offset] = BITSWAP8(data, 7,6,0,4,3,2,1,5); // Write S data on-the-fly + m_fixed[offset] = bitswap<8>(data, 7,6,0,4,3,2,1,5); // Write S data on-the-fly } else if (offset >= 0xfe000/2) { diff --git a/src/devices/bus/neogeo/prot_cmc.cpp b/src/devices/bus/neogeo/prot_cmc.cpp index 336bb543a21..77591827f54 100644 --- a/src/devices/bus/neogeo/prot_cmc.cpp +++ b/src/devices/bus/neogeo/prot_cmc.cpp @@ -689,15 +689,15 @@ int cmc_prot_device::m1_address_scramble(int address, uint16_t key) int block = (address >> 16) & 7; int aux = address & 0xffff; - aux ^= BITSWAP16(key,12,0,2,4,8,15,7,13,10,1,3,6,11,9,14,5); - aux = BITSWAP16(aux, + aux ^= bitswap<16>(key,12,0,2,4,8,15,7,13,10,1,3,6,11,9,14,5); + aux = bitswap<16>(aux, p1[block][15], p1[block][14], p1[block][13], p1[block][12], p1[block][11], p1[block][10], p1[block][9], p1[block][8], p1[block][7], p1[block][6], p1[block][5], p1[block][4], p1[block][3], p1[block][2], p1[block][1], p1[block][0]); aux ^= m1_address_0_7_xor[(aux >> 8) & 0xff]; aux ^= m1_address_8_15_xor[aux & 0xff] << 8; - aux = BITSWAP16(aux, 7,15,14,6,5,13,12,4,11,3,10,2,9,1,8,0); + aux = bitswap<16>(aux, 7,15,14,6,5,13,12,4,11,3,10,2,9,1,8,0); return (block << 16) | aux; } diff --git a/src/devices/bus/neogeo/prot_cthd.cpp b/src/devices/bus/neogeo/prot_cthd.cpp index dd641e64537..d2c427d6ac7 100644 --- a/src/devices/bus/neogeo/prot_cthd.cpp +++ b/src/devices/bus/neogeo/prot_cthd.cpp @@ -189,7 +189,7 @@ void cthd_prot_device::ct2k3sp_sx_decrypt( uint8_t* fixedrom, uint32_t fixedrom_ for (int i = 0; i < rom_size; i++) { - int ofst = BITSWAP24((i & 0x1ffff), 23, 22, 21, 20, 19, 18, 17, 3, + int ofst = bitswap<24>((i & 0x1ffff), 23, 22, 21, 20, 19, 18, 17, 3, 0, 1, 4, 2, 13, 14, 16, 15, 5, 6, 11, 10, 9, 8, 7, 12 ); ofst += (i >> 17) << 17; @@ -275,7 +275,7 @@ void cthd_prot_device::patch_ct2k3sa(uint8_t* cpurom, uint32_t cpurom_size) /* Matrimelee / Shin Gouketsuji Ichizoku Toukon (bootleg) */ -#define MATRIMBLZ80(i) (i ^ (BITSWAP8(i & 0x3,4,3,1,2,0,7,6,5) << 8)) +#define MATRIMBLZ80(i) (i ^ (bitswap<8>(i & 0x3,4,3,1,2,0,7,6,5) << 8)) void cthd_prot_device::matrimbl_decrypt(uint8_t* sprrom, uint32_t sprrom_size, uint8_t* audiorom, uint32_t audiorom_size) { diff --git a/src/devices/bus/neogeo/prot_kof2k3bl.cpp b/src/devices/bus/neogeo/prot_kof2k3bl.cpp index 5afe9a0e548..456f164c042 100644 --- a/src/devices/bus/neogeo/prot_kof2k3bl.cpp +++ b/src/devices/bus/neogeo/prot_kof2k3bl.cpp @@ -102,7 +102,7 @@ void kof2k3bl_prot_device::pl_px_decrypt(uint8_t* cpurom, uint32_t cpurom_size) { memcpy(&tmp[0], &rom16[i], 0x100000); for (int j = 0; j < 0x100000/2; j++) - rom16[i+j] = tmp[BITSWAP24(j,23,22,21,20,19,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18)]; + rom16[i+j] = tmp[bitswap<24>(j,23,22,21,20,19,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18)]; } /* patched by Altera protection chip on PCB */ @@ -124,7 +124,7 @@ void kof2k3bl_prot_device::upl_px_decrypt(uint8_t* cpurom, uint32_t cpurom_size) uint8_t *buf = cpurom + 0xd0610; for (int i = 0; i < 0x2000 / 2; i++) { - int ofst = (i & 0xff00) + BITSWAP8((i & 0x00ff), 7, 6, 0, 4, 3, 2, 1, 5); + int ofst = (i & 0xff00) + bitswap<8>((i & 0x00ff), 7, 6, 0, 4, 3, 2, 1, 5); memcpy(&rom[i * 2], &buf[ofst * 2], 2); } diff --git a/src/devices/bus/neogeo/prot_misc.cpp b/src/devices/bus/neogeo/prot_misc.cpp index 54b9c5b8792..47150bbabee 100644 --- a/src/devices/bus/neogeo/prot_misc.cpp +++ b/src/devices/bus/neogeo/prot_misc.cpp @@ -77,7 +77,7 @@ void neoboot_prot_device::sx_decrypt(uint8_t* fixed, uint32_t fixed_size, int va else if (value == 2) { for (int i = 0; i < sx_size; i++) - rom[i] = BITSWAP8(rom[i], 7, 6, 0, 4, 3, 2, 1, 5); + rom[i] = bitswap<8>(rom[i], 7, 6, 0, 4, 3, 2, 1, 5); } } @@ -139,7 +139,7 @@ void neoboot_prot_device::kf2k5uni_px_decrypt(uint8_t* cpurom, uint32_t cpurom_s { for (int j = 0; j < 0x80; j += 2) { - int ofst = BITSWAP8(j, 0, 3, 4, 5, 6, 1, 2, 7); + int ofst = bitswap<8>(j, 0, 3, 4, 5, 6, 1, 2, 7); memcpy(&dst[j], src + i + ofst, 2); } memcpy(src + i, &dst[0], 0x80); @@ -154,7 +154,7 @@ void neoboot_prot_device::kf2k5uni_sx_decrypt(uint8_t* fixedrom, uint32_t fixedr uint8_t *srom = fixedrom; for (int i = 0; i < 0x20000; i++) - srom[i] = BITSWAP8(srom[i], 4, 5, 6, 7, 0, 1, 2, 3); + srom[i] = bitswap<8>(srom[i], 4, 5, 6, 7, 0, 1, 2, 3); } void neoboot_prot_device::kf2k5uni_mx_decrypt(uint8_t* audiorom, uint32_t audiorom_size) @@ -162,7 +162,7 @@ void neoboot_prot_device::kf2k5uni_mx_decrypt(uint8_t* audiorom, uint32_t audior uint8_t *mrom = audiorom; for (int i = 0; i < 0x30000; i++) - mrom[i] = BITSWAP8(mrom[i], 4, 5, 6, 7, 0, 1, 2, 3); + mrom[i] = bitswap<8>(mrom[i], 4, 5, 6, 7, 0, 1, 2, 3); } @@ -187,7 +187,7 @@ void neoboot_prot_device::lans2004_vx_decrypt(uint8_t* ymsndrom, uint32_t ymsndr { uint8_t *rom = ymsndrom; for (int i = 0; i < 0xA00000; i++) - rom[i] = BITSWAP8(rom[i], 0, 1, 5, 4, 3, 2, 6, 7); + rom[i] = bitswap<8>(rom[i], 0, 1, 5, 4, 3, 2, 6, 7); } void neoboot_prot_device::lans2004_decrypt_68k(uint8_t* cpurom, uint32_t cpurom_size) @@ -239,7 +239,7 @@ void neoboot_prot_device::samsho5b_px_decrypt(uint8_t* cpurom, uint32_t cpurom_s for (int i = 0; i < px_size / 2; i++) { - int ofst = BITSWAP8((i & 0x000ff), 7, 6, 5, 4, 3, 0, 1, 2); + int ofst = bitswap<8>((i & 0x000ff), 7, 6, 5, 4, 3, 0, 1, 2); ofst += (i & 0xfffff00); ofst ^= 0x060005; @@ -259,7 +259,7 @@ void neoboot_prot_device::samsho5b_vx_decrypt(uint8_t* ymsndrom, uint32_t ymsndr uint8_t *rom = ymsndrom; for (int i = 0; i < vx_size; i++) - rom[i] = BITSWAP8(rom[i], 0, 1, 5, 4, 3, 2, 6, 7); + rom[i] = bitswap<8>(rom[i], 0, 1, 5, 4, 3, 2, 6, 7); } @@ -381,7 +381,7 @@ void neoboot_prot_device::svcboot_px_decrypt(uint8_t* cpurom, uint32_t cpurom_si for (int i = 0; i < size / 2; i++) { - int ofst = BITSWAP8((i & 0x0000ff), 7, 6, 1, 0, 3, 2, 5, 4); + int ofst = bitswap<8>((i & 0x0000ff), 7, 6, 1, 0, 3, 2, 5, 4); ofst += (i & 0xffff00); memcpy(&src[i * 2], &dst[ofst * 2], 0x02); } @@ -410,7 +410,7 @@ void neoboot_prot_device::svcboot_cx_decrypt(uint8_t* sprrom, uint32_t sprrom_si int bit1 = bitswap4_tbl[idx][1]; int bit2 = bitswap4_tbl[idx][2]; int bit3 = bitswap4_tbl[idx][3]; - int ofst = BITSWAP8((i & 0x0000ff), 7, 6, 5, 4, bit3, bit2, bit1, bit0); + int ofst = bitswap<8>((i & 0x0000ff), 7, 6, 5, 4, bit3, bit2, bit1, bit0); ofst += (i & 0xfffff00); memcpy(&src[i * 0x80], &dst[ofst * 0x80], 0x80); } @@ -429,7 +429,7 @@ void neoboot_prot_device::svcplus_px_decrypt(uint8_t* cpurom, uint32_t cpurom_si memcpy(&dst[0], src, size); for (int i = 0; i < size / 2; i++) { - int ofst = BITSWAP24((i & 0xfffff), 0x17, 0x16, 0x15, 0x14, 0x13, 0x00, 0x01, 0x02, + int ofst = bitswap<24>((i & 0xfffff), 0x17, 0x16, 0x15, 0x14, 0x13, 0x00, 0x01, 0x02, 0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 0x10, 0x11, 0x12); ofst ^= 0x0f0007; @@ -478,7 +478,7 @@ void neoboot_prot_device::svcsplus_px_decrypt(uint8_t* cpurom, uint32_t cpurom_s memcpy(&dst[0], src, size); for (int i = 0; i < size / 2; i++) { - int ofst = BITSWAP16((i & 0x007fff), 0x0f, 0x00, 0x08, 0x09, 0x0b, 0x0a, 0x0c, 0x0d, + int ofst = bitswap<16>((i & 0x007fff), 0x0f, 0x00, 0x08, 0x09, 0x0b, 0x0a, 0x0c, 0x0d, 0x04, 0x03, 0x01, 0x07, 0x06, 0x02, 0x05, 0x0e); ofst += (i & 0x078000); @@ -524,7 +524,7 @@ void neoboot_prot_device::kof2002b_gfx_decrypt(uint8_t *src, int size) for (int j = 0; j < 0x200; j++) { int n = (j & 0x38) >> 3; - int ofst = BITSWAP16(j, 15, 14, 13, 12, 11, 10, 9, t[n][0], t[n][1], t[n][2], 5, 4, 3, t[n][3], t[n][4], t[n][5]); + int ofst = bitswap<16>(j, 15, 14, 13, 12, 11, 10, 9, t[n][0], t[n][1], t[n][2], 5, 4, 3, t[n][3], t[n][4], t[n][5]); memcpy(src + i + ofst * 128, &dst[j * 128], 128); } } @@ -544,7 +544,7 @@ void neoboot_prot_device::kf2k2mp_decrypt(uint8_t* cpurom, uint32_t cpurom_size) { for (int j = 0; j < 0x80 / 2; j++) { - int ofst = BITSWAP8( j, 6, 7, 2, 3, 4, 5, 0, 1 ); + int ofst = bitswap<8>( j, 6, 7, 2, 3, 4, 5, 0, 1 ); memcpy(dst + j * 2, src + i + ofst * 2, 2); } memcpy(src + i, dst, 0x80); @@ -580,7 +580,7 @@ void neoboot_prot_device::kof10th_decrypt(uint8_t* cpurom, uint32_t cpurom_size) for (int i = 0; i < 0x900000; i++) { - int j = BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13,12,11,2,9,8,7,1,5,4,3,10,6,0); + int j = bitswap<24>(i,23,22,21,20,19,18,17,16,15,14,13,12,11,2,9,8,7,1,5,4,3,10,6,0); src[j] = dst[i]; } diff --git a/src/devices/bus/neogeo/prot_pcm2.cpp b/src/devices/bus/neogeo/prot_pcm2.cpp index 80fa21eafe0..82f3175eb8b 100644 --- a/src/devices/bus/neogeo/prot_pcm2.cpp +++ b/src/devices/bus/neogeo/prot_pcm2.cpp @@ -82,7 +82,7 @@ void pcm2_prot_device::swap(uint8_t* ymrom, uint32_t ymsize, int value) for (int i = 0; i < 0x1000000; i++) { - j = BITSWAP24(i,23,22,21,20,19,18,17,0,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,16); + j = bitswap<24>(i,23,22,21,20,19,18,17,0,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,16); j ^= addrs[value][1]; d = ((i + addrs[value][0]) & 0xffffff); src[j] = buf[d] ^ xordata[value][j & 0x7]; diff --git a/src/devices/bus/neogeo/prot_pvc.cpp b/src/devices/bus/neogeo/prot_pvc.cpp index 99c70142222..8e290596576 100644 --- a/src/devices/bus/neogeo/prot_pvc.cpp +++ b/src/devices/bus/neogeo/prot_pvc.cpp @@ -112,7 +112,7 @@ void pvc_prot_device::mslug5_decrypt_68k(uint8_t* rom, uint32_t size) for (int i = 0x100000; i < 0x0800000; i += 4) { uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8; - rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0); + rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0); rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff; rom[BYTE_XOR_LE(i+2)] = rom16 >> 8; } @@ -120,12 +120,12 @@ void pvc_prot_device::mslug5_decrypt_68k(uint8_t* rom, uint32_t size) memcpy(&buf[0], rom, rom_size); for (int i = 0; i < 0x0100000 / 0x10000; i++) { - int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2); + int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2); memcpy(&rom[i * 0x10000], &buf[ofst * 0x10000], 0x10000); } for (int i = 0x100000; i < 0x800000; i += 0x100) { - int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00700) + (BITSWAP8(((i & 0x0ff000) >> 12), 5, 4, 7, 6, 1, 0, 3, 2) << 12); + int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00700) + (bitswap<8>(((i & 0x0ff000) >> 12), 5, 4, 7, 6, 1, 0, 3, 2) << 12); memcpy(&rom[i], &buf[ofst], 0x100); } @@ -151,7 +151,7 @@ void pvc_prot_device::svc_px_decrypt(uint8_t* rom, uint32_t size) for (int i = 0x100000; i < 0x0800000; i += 4) { uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8; - rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0); + rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0); rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff; rom[BYTE_XOR_LE(i+2)] = rom16 >> 8; } @@ -159,13 +159,13 @@ void pvc_prot_device::svc_px_decrypt(uint8_t* rom, uint32_t size) memcpy(&buf[0], rom, rom_size); for (int i = 0; i < 0x0100000 / 0x10000; i++) { - int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 2, 3, 0, 1); + int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 2, 3, 0, 1); memcpy(&rom[i * 0x10000], &buf[ofst * 0x10000], 0x10000); } for (int i = 0x100000; i < 0x800000; i += 0x100) { - int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00a00) + (BITSWAP8(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12); + int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00a00) + (bitswap<8>(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12); memcpy(&rom[i], &buf[ofst], 0x100); } memcpy(&buf[0], rom, rom_size ); @@ -189,20 +189,20 @@ void pvc_prot_device::kf2k3pcb_decrypt_68k(uint8_t* rom, uint32_t size) for (int i = 0x100000; i < 0x800000; i += 4) { uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8; - rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 4, 5, 6, 7, 8, 9, 10, 11, 3, 2, 1, 0); + rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 4, 5, 6, 7, 8, 9, 10, 11, 3, 2, 1, 0); rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff; rom[BYTE_XOR_LE(i+2)] = rom16 >> 8; } for (int i = 0; i < 0x0100000 / 0x10000; i++) { - int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2); + int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2); memcpy(&buf[i * 0x10000], &rom[ofst * 0x10000], 0x10000); } for (int i = 0x100000; i < 0x900000; i += 0x100) { - int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00300) + (BITSWAP8(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12); + int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00300) + (bitswap<8>(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12); memcpy(&buf[i], &rom[ofst], 0x100); } memcpy(&rom[0x000000], &buf[0x000000], 0x100000); @@ -230,20 +230,20 @@ void pvc_prot_device::kof2003_decrypt_68k(uint8_t* rom, uint32_t size) for (int i = 0x100000; i < 0x800000; i += 4) { uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8; - rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 5, 4, 7, 6, 9, 8, 11, 10, 3, 2, 1, 0); + rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 5, 4, 7, 6, 9, 8, 11, 10, 3, 2, 1, 0); rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff; rom[BYTE_XOR_LE(i+2)] = rom16 >> 8; } for (int i = 0; i < 0x0100000 / 0x10000; i++) { - int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 0, 1, 2, 3); + int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 0, 1, 2, 3); memcpy(&buf[i * 0x10000], &rom[ofst * 0x10000], 0x10000); } for (int i = 0x100000; i < 0x900000; i += 0x100) { - int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00800) + (BITSWAP8(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12); + int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00800) + (bitswap<8>(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12); memcpy(&buf[i], &rom[ofst], 0x100); } memcpy(&rom[0x000000], &buf[0x000000], 0x100000); @@ -271,19 +271,19 @@ void pvc_prot_device::kof2003h_decrypt_68k(uint8_t* rom, uint32_t size) for (int i = 0x100000; i < 0x800000; i += 4) { uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8; - rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0); + rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0); rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff; rom[BYTE_XOR_LE(i+2)] = rom16 >> 8; } for (int i = 0; i < 0x0100000 / 0x10000; i++) { - int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2); + int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2); memcpy(&buf[i * 0x10000], &rom[ofst * 0x10000], 0x10000); } for (int i = 0x100000; i < 0x900000; i += 0x100) { - int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00400) + (BITSWAP8(((i & 0x0ff000) >> 12), 6, 7, 4, 5, 0, 1, 2, 3) << 12); + int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00400) + (bitswap<8>(((i & 0x0ff000) >> 12), 6, 7, 4, 5, 0, 1, 2, 3) << 12); memcpy(&buf[i], &rom[ofst], 0x100); } memcpy(&rom[0x000000], &buf[0x000000], 0x100000); diff --git a/src/devices/bus/neogeo/prot_sma.cpp b/src/devices/bus/neogeo/prot_sma.cpp index 1b6e2322cd9..bfd15ab208a 100644 --- a/src/devices/bus/neogeo/prot_sma.cpp +++ b/src/devices/bus/neogeo/prot_sma.cpp @@ -398,7 +398,7 @@ void sma_prot_device::kof99_decrypt_68k(uint8_t* base) // swap data lines on the whole ROMs for (int i = 0; i < 0x800000/2; i++) - rom[i] = BITSWAP16(rom[i],13,7,3,0,9,4,5,6,1,12,8,14,10,11,2,15); + rom[i] = bitswap<16>(rom[i],13,7,3,0,9,4,5,6,1,12,8,14,10,11,2,15); // swap address lines for the banked part for (int i = 0; i < 0x600000/2; i += 0x800/2) @@ -406,13 +406,13 @@ void sma_prot_device::kof99_decrypt_68k(uint8_t* base) uint16_t buffer[0x800/2]; memcpy(buffer, &rom[i], 0x800); for (int j = 0; j < 0x800/2; j++) - rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,14,13,12,11,10,6,2,4,9,8,3,1,7,0,5)]; + rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,14,13,12,11,10,6,2,4,9,8,3,1,7,0,5)]; } // swap address lines & relocate fixed part rom = (uint16_t *)base; for (int i = 0; i < 0x0c0000/2; i++) - rom[i] = rom[0x700000/2 + BITSWAP24(i,23,22,21,20,19,18,11,6,14,17,16,5,8,10,12,0,4,3,2,7,9,15,13,1)]; + rom[i] = rom[0x700000/2 + bitswap<24>(i,23,22,21,20,19,18,11,6,14,17,16,5,8,10,12,0,4,3,2,7,9,15,13,1)]; } @@ -423,12 +423,12 @@ void sma_prot_device::garou_decrypt_68k(uint8_t* base) // swap data lines on the whole ROMs for (int i = 0; i < 0x800000/2; i++) - rom[i] = BITSWAP16(rom[i],13,12,14,10,8,2,3,1,5,9,11,4,15,0,6,7); + rom[i] = bitswap<16>(rom[i],13,12,14,10,8,2,3,1,5,9,11,4,15,0,6,7); // swap address lines & relocate fixed part rom = (uint16_t *)base; for (int i = 0; i < 0x0c0000/2; i++) - rom[i] = rom[0x710000/2 + BITSWAP24(i,23,22,21,20,19,18,4,5,16,14,7,9,6,13,17,15,3,1,2,12,11,8,10,0)]; + rom[i] = rom[0x710000/2 + bitswap<24>(i,23,22,21,20,19,18,4,5,16,14,7,9,6,13,17,15,3,1,2,12,11,8,10,0)]; // swap address lines for the banked part rom = (uint16_t *)(base + 0x100000); @@ -437,7 +437,7 @@ void sma_prot_device::garou_decrypt_68k(uint8_t* base) uint16_t buffer[0x8000/2]; memcpy(buffer, &rom[i], 0x8000); for (int j = 0; j < 0x8000/2; j++) - rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,14,9,4,8,3,13,6,2,7,0,12,1,11,10,5)]; + rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,14,9,4,8,3,13,6,2,7,0,12,1,11,10,5)]; } } @@ -449,12 +449,12 @@ void sma_prot_device::garouh_decrypt_68k(uint8_t* base) // swap data lines on the whole ROMs for (int i = 0; i < 0x800000/2; i++) - rom[i] = BITSWAP16(rom[i],14,5,1,11,7,4,10,15,3,12,8,13,0,2,9,6); + rom[i] = bitswap<16>(rom[i],14,5,1,11,7,4,10,15,3,12,8,13,0,2,9,6); // swap address lines & relocate fixed part rom = (uint16_t *)base; for (int i = 0; i < 0x0c0000/2; i++) - rom[i] = rom[0x7f8000/2 + BITSWAP24(i,23,22,21,20,19,18,5,16,11,2,6,7,17,3,12,8,14,4,0,9,1,10,15,13)]; + rom[i] = rom[0x7f8000/2 + bitswap<24>(i,23,22,21,20,19,18,5,16,11,2,6,7,17,3,12,8,14,4,0,9,1,10,15,13)]; // swap address lines for the banked part rom = (uint16_t *)(base + 0x100000); @@ -463,7 +463,7 @@ void sma_prot_device::garouh_decrypt_68k(uint8_t* base) uint16_t buffer[0x8000/2]; memcpy(buffer, &rom[i], 0x8000); for (int j = 0; j < 0x8000/2; j++) - rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,14,12,8,1,7,11,3,13,10,6,9,5,4,0,2)]; + rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,14,12,8,1,7,11,3,13,10,6,9,5,4,0,2)]; } } @@ -475,12 +475,12 @@ void sma_prot_device::mslug3_decrypt_68k(uint8_t* base) // swap data lines on the whole ROMs for (int i = 0; i < 0x800000/2; i++) - rom[i] = BITSWAP16(rom[i],4,11,14,3,1,13,0,7,2,8,12,15,10,9,5,6); + rom[i] = bitswap<16>(rom[i],4,11,14,3,1,13,0,7,2,8,12,15,10,9,5,6); // swap address lines & relocate fixed part rom = (uint16_t *)base; for (int i = 0; i < 0x0c0000/2; i++) - rom[i] = rom[0x5d0000/2 + BITSWAP24(i,23,22,21,20,19,18,15,2,1,13,3,0,9,6,16,4,11,5,7,12,17,14,10,8)]; + rom[i] = rom[0x5d0000/2 + bitswap<24>(i,23,22,21,20,19,18,15,2,1,13,3,0,9,6,16,4,11,5,7,12,17,14,10,8)]; // swap address lines for the banked part rom = (uint16_t *)(base + 0x100000); @@ -489,7 +489,7 @@ void sma_prot_device::mslug3_decrypt_68k(uint8_t* base) uint16_t buffer[0x10000/2]; memcpy(buffer, &rom[i], 0x10000); for (int j = 0; j < 0x10000/2; j++) - rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,2,11,0,14,6,4,13,8,9,3,10,7,5,12,1)]; + rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,2,11,0,14,6,4,13,8,9,3,10,7,5,12,1)]; } } @@ -501,7 +501,7 @@ void sma_prot_device::kof2000_decrypt_68k(uint8_t* base) // swap data lines on the whole ROMs for (int i = 0; i < 0x800000/2; i++) - rom[i] = BITSWAP16(rom[i],12,8,11,3,15,14,7,0,10,13,6,5,9,2,1,4); + rom[i] = bitswap<16>(rom[i],12,8,11,3,15,14,7,0,10,13,6,5,9,2,1,4); // swap address lines for the banked part for (int i = 0; i < 0x63a000/2; i += 0x800/2) @@ -509,11 +509,11 @@ void sma_prot_device::kof2000_decrypt_68k(uint8_t* base) uint16_t buffer[0x800/2]; memcpy(buffer, &rom[i], 0x800); for (int j = 0; j < 0x800/2; j++) - rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,14,13,12,11,10,4,1,3,8,6,2,7,0,9,5)]; + rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,14,13,12,11,10,4,1,3,8,6,2,7,0,9,5)]; } // swap address lines & relocate fixed part rom = (uint16_t *)base; for (int i = 0; i < 0x0c0000/2; i++) - rom[i] = rom[0x73a000/2 + BITSWAP24(i,23,22,21,20,19,18,8,4,15,13,3,14,16,2,6,17,7,12,10,0,5,11,1,9)]; + rom[i] = rom[0x73a000/2 + bitswap<24>(i,23,22,21,20,19,18,8,4,15,13,3,14,16,2,6,17,7,12,10,0,5,11,1,9)]; } diff --git a/src/devices/bus/neogeo/sbp.cpp b/src/devices/bus/neogeo/sbp.cpp index f5c25a2210a..6b6920cb5e8 100644 --- a/src/devices/bus/neogeo/sbp.cpp +++ b/src/devices/bus/neogeo/sbp.cpp @@ -36,7 +36,7 @@ READ16_MEMBER( neogeo_sbp_cart_device::protection_r ) { uint16_t* rom = (get_rom_size()) ? get_rom_base() : get_region_rom_base(); uint16_t origdata = rom[offset + (0x200/2)]; - uint16_t data = BITSWAP16(origdata, 11,10,9,8,15,14,13,12,3,2,1,0,7,6,5,4); + uint16_t data = bitswap<16>(origdata, 11,10,9,8,15,14,13,12,3,2,1,0,7,6,5,4); int realoffset = 0x200 + (offset * 2); logerror("sbp_lowerrom_r offset %08x data %04x\n", realoffset, data); diff --git a/src/devices/bus/nes/jy.cpp b/src/devices/bus/nes/jy.cpp index 38a30848859..191892ef544 100644 --- a/src/devices/bus/nes/jy.cpp +++ b/src/devices/bus/nes/jy.cpp @@ -296,7 +296,7 @@ READ8_MEMBER(nes_jy_typea_device::read_m) inline uint8_t nes_jy_typea_device::unscramble(uint8_t bank) { - return BITSWAP8(bank & 0x7f,7,0,1,2,3,4,5,6); + return bitswap<8>(bank & 0x7f,7,0,1,2,3,4,5,6); } void nes_jy_typea_device::update_prg() diff --git a/src/devices/bus/nes/mmc3_clones.cpp b/src/devices/bus/nes/mmc3_clones.cpp index 5d776c5d86c..5c578c0fcbd 100644 --- a/src/devices/bus/nes/mmc3_clones.cpp +++ b/src/devices/bus/nes/mmc3_clones.cpp @@ -2565,7 +2565,7 @@ void nes_a9746_device::pcb_reset() void nes_a9746_device::update_banks(uint8_t value) { - uint8_t bank = BITSWAP8(value & 0x3c,7,6,0,1,2,3,4,5); + uint8_t bank = bitswap<8>(value & 0x3c,7,6,0,1,2,3,4,5); switch (m_reg[0]) { diff --git a/src/devices/bus/nes/waixing.cpp b/src/devices/bus/nes/waixing.cpp index f4d9c338f48..7e95102c029 100644 --- a/src/devices/bus/nes/waixing.cpp +++ b/src/devices/bus/nes/waixing.cpp @@ -929,7 +929,7 @@ READ8_MEMBER(nes_waixing_sh2_device::chr_r) void nes_waixing_sec_device::prg_cb(int start, int bank) { if (m_reg) - bank = BITSWAP8(bank & 0x1f,7,6,5,2,1,3,4,0); + bank = bitswap<8>(bank & 0x1f,7,6,5,2,1,3,4,0); prg8_x(start, bank); } @@ -937,7 +937,7 @@ void nes_waixing_sec_device::prg_cb(int start, int bank) void nes_waixing_sec_device::chr_cb(int start, int bank, int source) { if (m_reg) - bank = BITSWAP8(bank, 5,4,2,6,7,3,1,0); + bank = bitswap<8>(bank, 5,4,2,6,7,3,1,0); chr1_x(start, bank, source); } diff --git a/src/devices/bus/nubus/nubus_spec8.cpp b/src/devices/bus/nubus/nubus_spec8.cpp index a8289667de6..1cc905670a6 100644 --- a/src/devices/bus/nubus/nubus_spec8.cpp +++ b/src/devices/bus/nubus/nubus_spec8.cpp @@ -257,7 +257,7 @@ WRITE32_MEMBER( nubus_spec8s3_device::spec8s3_w ) if (m_count == 3) { - int actual_color = BITSWAP8(m_clutoffs, 0, 1, 2, 3, 4, 5, 6, 7); + int actual_color = bitswap<8>(m_clutoffs, 0, 1, 2, 3, 4, 5, 6, 7); // printf("RAMDAC: color %d = %02x %02x %02x (PC=%x)\n", actual_color, m_colors[0], m_colors[1], m_colors[2], space.device().safe_pc() ); m_palette[actual_color] = rgb_t(m_colors[0], m_colors[1], m_colors[2]); diff --git a/src/devices/bus/nubus/pds30_procolor816.cpp b/src/devices/bus/nubus/pds30_procolor816.cpp index 366eb8eb1b3..869e91986c0 100644 --- a/src/devices/bus/nubus/pds30_procolor816.cpp +++ b/src/devices/bus/nubus/pds30_procolor816.cpp @@ -272,7 +272,7 @@ WRITE32_MEMBER( nubus_procolor816_device::procolor816_w ) if (mem_mask == 0x00ff0000) { // printf("%08x to DAC control (PC=%x)\n", data, space.device().safe_pc()); - m_clutoffs = BITSWAP8((data>>16)&0xff, 0, 1, 2, 3, 4, 5, 6, 7); + m_clutoffs = bitswap<8>((data>>16)&0xff, 0, 1, 2, 3, 4, 5, 6, 7); } else if (mem_mask == 0x000000ff) { diff --git a/src/devices/bus/s100/wunderbus.cpp b/src/devices/bus/s100/wunderbus.cpp index e0eec1b3b4f..1bd7df7cb2a 100644 --- a/src/devices/bus/s100/wunderbus.cpp +++ b/src/devices/bus/s100/wunderbus.cpp @@ -345,7 +345,7 @@ uint8_t s100_wunderbus_device::s100_sinp_r(address_space &space, offs_t offset) */ - data = BITSWAP8(m_10a->read(),0,1,2,3,4,5,6,7) & 0xfc; + data = bitswap<8>(m_10a->read(),0,1,2,3,4,5,6,7) & 0xfc; break; case 2: // R.T. Clock IN/RESET CLK. Int. diff --git a/src/devices/bus/saturn/sat_slot.cpp b/src/devices/bus/saturn/sat_slot.cpp index 13f69c8ba92..defdd4d025b 100644 --- a/src/devices/bus/saturn/sat_slot.cpp +++ b/src/devices/bus/saturn/sat_slot.cpp @@ -156,7 +156,7 @@ image_init_result sat_cart_slot_device::call_load() // fix endianness.... for (int i = 0; i < len/4; i ++) - ROM[i] = BITSWAP32(ROM[i],7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,23,22,21,20,19,18,17,16,31,30,29,28,27,26,25,24); + ROM[i] = bitswap<32>(ROM[i],7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,23,22,21,20,19,18,17,16,31,30,29,28,27,26,25,24); // { // uint8_t tempa = ROM[i+0]; // uint8_t tempb = ROM[i+1]; diff --git a/src/devices/bus/sega8/rom.cpp b/src/devices/bus/sega8/rom.cpp index 9006cc1f013..e3fa290489c 100644 --- a/src/devices/bus/sega8/rom.cpp +++ b/src/devices/bus/sega8/rom.cpp @@ -871,7 +871,7 @@ READ8_MEMBER(sega8_janggun_device::read_cart) if (m_rom_bank_base[bank] < 0x80) return m_rom[(m_rom_bank_base[bank] & 0x3f) * 0x2000 + (offset & 0x1fff)]; else - return BITSWAP8(m_rom[(m_rom_bank_base[bank] & 0x3f) * 0x2000 + (offset & 0x1fff)], 0, 1, 2, 3, 4, 5, 6, 7); + return bitswap<8>(m_rom[(m_rom_bank_base[bank] & 0x3f) * 0x2000 + (offset & 0x1fff)], 0, 1, 2, 3, 4, 5, 6, 7); } diff --git a/src/devices/bus/snes/rom.cpp b/src/devices/bus/snes/rom.cpp index 628ab1a212d..bae27f21fad 100644 --- a/src/devices/bus/snes/rom.cpp +++ b/src/devices/bus/snes/rom.cpp @@ -291,7 +291,7 @@ WRITE8_MEMBER( sns_rom_obc1_device::chip_write ) // Address range for read/write depends on the game (check snes.xml) READ8_MEMBER( sns_rom_pokemon_device::chip_read ) { - return BITSWAP8(m_latch,0,6,7,1,2,3,4,5); + return bitswap<8>(m_latch,0,6,7,1,2,3,4,5); } WRITE8_MEMBER( sns_rom_pokemon_device::chip_write ) @@ -488,7 +488,7 @@ WRITE8_MEMBER( sns_rom_20col_device::chip_write ) READ8_MEMBER( sns_rom_banana_device::chip_read ) { - return BITSWAP8(m_latch[0xf],0,6,7,1,2,3,4,5); + return bitswap<8>(m_latch[0xf],0,6,7,1,2,3,4,5); } WRITE8_MEMBER( sns_rom_banana_device::chip_write ) @@ -499,7 +499,7 @@ WRITE8_MEMBER( sns_rom_banana_device::chip_write ) READ8_MEMBER( sns_rom_bugs_device::chip_read ) { - return BITSWAP8(m_latch[offset & 0xff],0,6,7,1,2,3,4,5); + return bitswap<8>(m_latch[offset & 0xff],0,6,7,1,2,3,4,5); } WRITE8_MEMBER( sns_rom_bugs_device::chip_write ) diff --git a/src/devices/bus/snes_ctrl/pachinko.cpp b/src/devices/bus/snes_ctrl/pachinko.cpp index 44d81066d83..010385e6459 100644 --- a/src/devices/bus/snes_ctrl/pachinko.cpp +++ b/src/devices/bus/snes_ctrl/pachinko.cpp @@ -83,7 +83,7 @@ void snes_pachinko_device::device_reset() void snes_pachinko_device::port_poll() { - uint8_t dial = BITSWAP8(m_dial->read() ^ 0xff,7,6,5,4,3,2,1,0); + uint8_t dial = bitswap<8>(m_dial->read() ^ 0xff,7,6,5,4,3,2,1,0); m_latch = m_button->read() | (dial << 25) | 0xee7000; // add ID } diff --git a/src/devices/bus/ss50/interface.cpp b/src/devices/bus/ss50/interface.cpp index e5f2620b0a8..3d51f76ba53 100644 --- a/src/devices/bus/ss50/interface.cpp +++ b/src/devices/bus/ss50/interface.cpp @@ -79,7 +79,7 @@ #include "emu.h" #include "bus/ss50/interface.h" -//#include "bus/ss50/mpc.h" +#include "bus/ss50/mpc.h" //#include "bus/ss50/mpl.h" //#include "bus/ss50/mpr.h" #include "bus/ss50/mps.h" @@ -214,7 +214,7 @@ ss50_card_interface::ss50_card_interface(const machine_config &mconfig, device_t } SLOT_INTERFACE_START(ss50_default_2rs_devices) - //SLOT_INTERFACE("mpc", SS50_MPC) + SLOT_INTERFACE("mpc", SS50_MPC) //SLOT_INTERFACE("mpl", SS50_MPL) //SLOT_INTERFACE("mpn", SS50_MPN) SLOT_INTERFACE("mps", SS50_MPS) diff --git a/src/devices/bus/ss50/mpc.cpp b/src/devices/bus/ss50/mpc.cpp new file mode 100644 index 00000000000..8a1ac577a5e --- /dev/null +++ b/src/devices/bus/ss50/mpc.cpp @@ -0,0 +1,194 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + SWTPC MP-C Serial Control Interface + +**********************************************************************/ + +#include "emu.h" +#include "bus/ss50/mpc.h" +#include "bus/ss50/interface.h" + +#include "bus/rs232/rs232.h" +#include "machine/6821pia.h" +#include "machine/input_merger.h" +#include "machine/ripple_counter.h" + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> ss50_mpc_device + +class ss50_mpc_device : public device_t, public ss50_card_interface +{ +public: + // construction/destruction + ss50_mpc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, SS50_MPC, tag, owner, clock), + ss50_card_interface(mconfig, *this), + m_pia(*this, "pia"), + m_loopback(*this, "loopback"), + m_counter(*this, "counter"), + m_baud_jumper(*this, "BAUD"), + m_count_select(false) + { + } + +protected: + // device-specific overrides + virtual ioport_constructor device_input_ports() const override; + virtual void device_add_mconfig(machine_config &config) override; + virtual void device_start() override; + + // interface-specific overrides + virtual DECLARE_READ8_MEMBER(register_read) override; + virtual DECLARE_WRITE8_MEMBER(register_write) override; + virtual DECLARE_WRITE_LINE_MEMBER(f110_w) override; + virtual DECLARE_WRITE_LINE_MEMBER(f300_w) override; + +private: + DECLARE_WRITE_LINE_MEMBER(serial_input_w); + DECLARE_WRITE_LINE_MEMBER(reader_control_w); + DECLARE_READ_LINE_MEMBER(count_r); + DECLARE_WRITE_LINE_MEMBER(count_select_w); + + required_device<pia6821_device> m_pia; + required_device<input_merger_device> m_loopback; + required_device<ripple_counter_device> m_counter; + required_ioport m_baud_jumper; + + bool m_count_select; +}; + + +static INPUT_PORTS_START( mpc ) + PORT_START("BAUD") + PORT_DIPNAME(1, 0, "Baud Rate") + PORT_DIPSETTING(1, "110") + PORT_DIPSETTING(0, "300") + + PORT_START("STOP") + PORT_DIPNAME(1, 0, "Stop Bits") + PORT_DIPSETTING(0, "1") + PORT_DIPSETTING(1, "2") +INPUT_PORTS_END + + +//------------------------------------------------- +// input_ports - device-specific input ports +//------------------------------------------------- + +ioport_constructor ss50_mpc_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(mpc); +} + + +static DEVICE_INPUT_DEFAULTS_START( terminal ) + DEVICE_INPUT_DEFAULTS("RS232_RXBAUD", 0xff, RS232_BAUD_300) + DEVICE_INPUT_DEFAULTS("RS232_TXBAUD", 0xff, RS232_BAUD_300) + DEVICE_INPUT_DEFAULTS("RS232_STARTBITS", 0xff, RS232_STARTBITS_1) + DEVICE_INPUT_DEFAULTS("RS232_DATABITS", 0xff, RS232_DATABITS_8) + DEVICE_INPUT_DEFAULTS("RS232_PARITY", 0xff, RS232_PARITY_NONE) + DEVICE_INPUT_DEFAULTS("RS232_STOPBITS", 0xff, RS232_STOPBITS_1) +DEVICE_INPUT_DEFAULTS_END + + +//------------------------------------------------- +// device_add_mconfig - add device-specific +// machine configuration +//------------------------------------------------- + +MACHINE_CONFIG_MEMBER(ss50_mpc_device::device_add_mconfig) + MCFG_DEVICE_ADD("pia", PIA6821, 0) // actually MC6820 + MCFG_PIA_WRITEPA_HANDLER(DEVWRITELINE("outgate", input_merger_device, in_w<0>)) MCFG_DEVCB_BIT(0) + MCFG_PIA_CB2_HANDLER(WRITELINE(ss50_mpc_device, reader_control_w)) + MCFG_PIA_READPB_HANDLER(IOPORT("STOP")) MCFG_DEVCB_BIT(6) + MCFG_DEVCB_CHAIN_INPUT(READLINE(ss50_mpc_device, count_r)) MCFG_DEVCB_BIT(7) + MCFG_PIA_WRITEPB_HANDLER(WRITELINE(ss50_mpc_device, count_select_w)) MCFG_DEVCB_BIT(2) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("counter", ripple_counter_device, reset_w)) MCFG_DEVCB_BIT(0) + //MCFG_PIA_IRQA_HANDLER(WRITELINE(ss50_mpc_device, pia_irq_w)) + //MCFG_PIA_IRQB_HANDLER(WRITELINE(ss50_mpc_device, pia_irq_w)) + + MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal") + MCFG_RS232_RXD_HANDLER(WRITELINE(ss50_mpc_device, serial_input_w)) + MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("terminal", terminal) + + MCFG_INPUT_MERGER_ALL_HIGH("outgate") + MCFG_INPUT_MERGER_OUTPUT_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd)) + + MCFG_INPUT_MERGER_ANY_HIGH("loopback") + MCFG_INPUT_MERGER_OUTPUT_HANDLER(DEVWRITELINE("outgate", input_merger_device, in_w<1>)) + + MCFG_DEVICE_ADD("counter", RIPPLE_COUNTER, 0) // CD4024AE (IC3) + MCFG_RIPPLE_COUNTER_STAGES(7) // only Q5 (÷32) and Q4 (÷16) are actually used +MACHINE_CONFIG_END + + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void ss50_mpc_device::device_start() +{ + save_item(NAME(m_count_select)); +} + +WRITE_LINE_MEMBER(ss50_mpc_device::serial_input_w) +{ + m_pia->set_a_input(state << 7, 0x7f); + m_loopback->in_w<0>(state); +} + + +WRITE_LINE_MEMBER(ss50_mpc_device::reader_control_w) +{ + m_loopback->in_w<1>(state); +} + +READ_LINE_MEMBER(ss50_mpc_device::count_r) +{ + return BIT(m_counter->count(), m_count_select ? 4 : 3); +} + +WRITE_LINE_MEMBER(ss50_mpc_device::count_select_w) +{ + m_count_select = bool(state); +} + + +//------------------------------------------------- +// register_read - read from a port register +//------------------------------------------------- + +READ8_MEMBER(ss50_mpc_device::register_read) +{ + return m_pia->read(space, offset & 3, 0); +} + +//------------------------------------------------- +// register_write - write to a port register +//------------------------------------------------- + +WRITE8_MEMBER(ss50_mpc_device::register_write) +{ + m_pia->write(space, offset & 3, data); +} + +WRITE_LINE_MEMBER(ss50_mpc_device::f110_w) +{ + if (m_baud_jumper->read()) + m_counter->clock_w(state); +} + +WRITE_LINE_MEMBER(ss50_mpc_device::f300_w) +{ + if (!m_baud_jumper->read()) + m_counter->clock_w(state); +} + + +// device type definition +DEFINE_DEVICE_TYPE(SS50_MPC, ss50_mpc_device, "ss50_mpc", "MP-C Serial Control Interface") diff --git a/src/devices/bus/ss50/mpc.h b/src/devices/bus/ss50/mpc.h new file mode 100644 index 00000000000..2e769932b0c --- /dev/null +++ b/src/devices/bus/ss50/mpc.h @@ -0,0 +1,14 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + SWTPC MP-C Serial Control Interface + +**********************************************************************/ + +#ifndef MAME_DEVICE_BUS_SS50_MPC_H +#define MAME_DEVICE_BUS_SS50_MPC_H + +extern const device_type SS50_MPC; + +#endif // MAME_DEVICE_BUS_SS50_MPC_H diff --git a/src/devices/bus/ti99x/990_hd.cpp b/src/devices/bus/ti99x/990_hd.cpp index 0bb3b475086..9c2ce32ae51 100644 --- a/src/devices/bus/ti99x/990_hd.cpp +++ b/src/devices/bus/ti99x/990_hd.cpp @@ -241,7 +241,7 @@ DEVICE_IMAGE_LOAD_MEMBER( ti990_hdc_device, ti990_hd ) */ DEVICE_IMAGE_UNLOAD_MEMBER( ti990_hdc_device, ti990_hd ) { - int id = get_id_from_device( image ); + int id = get_id_from_device(&image.device()); hd_unit_t *d; d = &m_d[id]; diff --git a/src/devices/bus/vcs/dpc.cpp b/src/devices/bus/vcs/dpc.cpp index f15e426fec7..bcddc3e96ae 100644 --- a/src/devices/bus/vcs/dpc.cpp +++ b/src/devices/bus/vcs/dpc.cpp @@ -160,10 +160,10 @@ READ8_MEMBER(dpc_device::read) data = m_df[data_fetcher].flag ? display_data : 0x00; break; case 0x18: // display data AND'd w/flag, nibbles swapped - data = m_df[data_fetcher].flag ? BITSWAP8(display_data,3,2,1,0,7,6,5,4) : 0x00; + data = m_df[data_fetcher].flag ? bitswap<8>(display_data,3,2,1,0,7,6,5,4) : 0x00; break; case 0x20: // display data AND'd w/flag, byte reversed - data = m_df[data_fetcher].flag ? BITSWAP8(display_data,0,1,2,3,4,5,6,7) : 0x00; + data = m_df[data_fetcher].flag ? bitswap<8>(display_data,0,1,2,3,4,5,6,7) : 0x00; break; case 0x28: // display data AND'd w/flag, rotated right data = m_df[data_fetcher].flag ? (display_data >> 1) : 0x00; diff --git a/src/devices/bus/vic20/exp.cpp b/src/devices/bus/vic20/exp.cpp index 535375536be..e70bda544bc 100644 --- a/src/devices/bus/vic20/exp.cpp +++ b/src/devices/bus/vic20/exp.cpp @@ -219,5 +219,6 @@ SLOT_INTERFACE_START( vic20_expansion_cards ) // the following need ROMs from the software list SLOT_INTERFACE_INTERNAL("standard", VIC20_STD) SLOT_INTERFACE_INTERNAL("ieee488", VIC1112) + MCFG_SLOT_OPTION_CLOCK("ieee488", DERIVED_CLOCK(1, 1)) SLOT_INTERFACE_INTERNAL("megacart", VIC20_MEGACART) SLOT_INTERFACE_END diff --git a/src/devices/bus/vic20/vic1112.cpp b/src/devices/bus/vic20/vic1112.cpp index a38bf02eb7f..25e6b6d6804 100644 --- a/src/devices/bus/vic20/vic1112.cpp +++ b/src/devices/bus/vic20/vic1112.cpp @@ -98,12 +98,12 @@ WRITE_LINE_MEMBER( vic1112_device::via1_irq_w ) //------------------------------------------------- MACHINE_CONFIG_MEMBER( vic1112_device::device_add_mconfig ) - MCFG_DEVICE_ADD(M6522_0_TAG, VIA6522, 0) + MCFG_DEVICE_ADD(M6522_0_TAG, VIA6522, DERIVED_CLOCK(1, 1)) MCFG_VIA6522_READPB_HANDLER(READ8(vic1112_device, via0_pb_r)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(vic1112_device, via0_pb_w)) MCFG_VIA6522_IRQ_HANDLER(WRITELINE(vic1112_device, via0_irq_w)) - MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, 0) + MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, DERIVED_CLOCK(1, 1)) MCFG_VIA6522_READPB_HANDLER(DEVREAD8(IEEE488_TAG, ieee488_device, dio_r)) MCFG_VIA6522_WRITEPA_HANDLER(DEVWRITE8(IEEE488_TAG, ieee488_device, dio_w)) MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(IEEE488_TAG, ieee488_device, atn_w)) diff --git a/src/devices/cpu/arm7/arm7.cpp b/src/devices/cpu/arm7/arm7.cpp index 7a3a7ba30db..19530ed9e66 100644 --- a/src/devices/cpu/arm7/arm7.cpp +++ b/src/devices/cpu/arm7/arm7.cpp @@ -148,14 +148,16 @@ arm920t_cpu_device::arm920t_cpu_device(const machine_config &mconfig, const char } -arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : arm9_cpu_device(mconfig, ARM946ES, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E, ENDIANNESS_LITTLE), + + +arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : arm9_cpu_device(mconfig, type, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E, ENDIANNESS_LITTLE), cp15_control(0x78) { m_copro_id = ARM9_COPRO_ID_MFR_ARM - | ARM9_COPRO_ID_ARCH_V5TE - | ARM9_COPRO_ID_PART_ARM946 - | ARM9_COPRO_ID_STEP_ARM946_A0; + | ARM9_COPRO_ID_ARCH_V5TE + | ARM9_COPRO_ID_PART_ARM946 + | ARM9_COPRO_ID_STEP_ARM946_A0; memset(ITCM, 0, 0x8000); memset(DTCM, 0, 0x4000); @@ -169,6 +171,17 @@ arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, const ch cp15_itcm_reg = cp15_dtcm_reg = 0; } +arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : arm946es_cpu_device(mconfig, ARM946ES, tag, owner, clock) +{ +} + +// unknown configuration, but uses MPU not MMU, so closer to ARM946ES +igs036_cpu_device::igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : arm946es_cpu_device(mconfig, IGS036, tag, owner, clock) +{ +} + pxa255_cpu_device::pxa255_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : arm7_cpu_device(mconfig, PXA255, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E | ARCHFLAG_XSCALE, ENDIANNESS_LITTLE) { @@ -189,13 +202,6 @@ sa1110_cpu_device::sa1110_cpu_device(const machine_config &mconfig, const char * | ARM9_COPRO_ID_STEP_SA1110_A0; } -// unknown configuration -igs036_cpu_device::igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : arm9_cpu_device(mconfig, IGS036, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E, ENDIANNESS_LITTLE) -{ -} - - device_memory_interface::space_config_vector arm7_cpu_device::memory_space_config() const { return space_config_vector { @@ -1459,14 +1465,6 @@ uint8_t arm946es_cpu_device::arm7_cpu_read8(uint32_t addr) return m_program->read_byte(addr); } -WRITE32_MEMBER(igs036_cpu_device::arm7_rt_w_callback) -{ - arm7_cpu_device::arm7_rt_w_callback(space, offset, data, mem_mask); - /* disable the MMU for now, it doesn't seem to set up valid mappings - so could be entirely different here */ - COPRO_CTRL &= ~COPRO_CTRL_MMU_EN; -} - void arm7_cpu_device::arm7_dt_r_callback(uint32_t insn, uint32_t *prn) { uint8_t cpn = (insn >> 8) & 0xF; diff --git a/src/devices/cpu/arm7/arm7.h b/src/devices/cpu/arm7/arm7.h index f6eecc4e4e1..23df9469073 100644 --- a/src/devices/cpu/arm7/arm7.h +++ b/src/devices/cpu/arm7/arm7.h @@ -626,6 +626,9 @@ public: virtual uint32_t arm7_cpu_read16(uint32_t addr) override; virtual uint8_t arm7_cpu_read8(uint32_t addr) override; +protected: + arm946es_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + private: uint32_t cp15_control, cp15_itcm_base, cp15_dtcm_base, cp15_itcm_size, cp15_dtcm_size; uint32_t cp15_itcm_end, cp15_dtcm_end, cp15_itcm_reg, cp15_dtcm_reg; @@ -635,6 +638,12 @@ private: void RefreshDTCM(); }; +class igs036_cpu_device : public arm946es_cpu_device +{ +public: + // construction/destruction + igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; class pxa255_cpu_device : public arm7_cpu_device { @@ -651,15 +660,6 @@ public: sa1110_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); }; -class igs036_cpu_device : public arm9_cpu_device -{ -public: - // construction/destruction - igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_WRITE32_MEMBER( arm7_rt_w_callback ) override; -}; - - DECLARE_DEVICE_TYPE(ARM7, arm7_cpu_device) DECLARE_DEVICE_TYPE(ARM7_BE, arm7_be_cpu_device) DECLARE_DEVICE_TYPE(ARM7500, arm7500_cpu_device) diff --git a/src/devices/cpu/arm7/arm7core.h b/src/devices/cpu/arm7/arm7core.h index 9ae499ae109..c33bdee9dd2 100644 --- a/src/devices/cpu/arm7/arm7core.h +++ b/src/devices/cpu/arm7/arm7core.h @@ -470,11 +470,6 @@ enum COND_NV /* 0 never */ }; -#define LSL(v, s) ((v) << (s)) -#define LSR(v, s) ((v) >> (s)) -#define ROL(v, s) (LSL((v), (s)) | (LSR((v), 32u - (s)))) -#define ROR(v, s) (LSR((v), (s)) | (LSL((v), 32u - (s)))) - /* Convenience Macros */ #define R15 m_r[eR15] #define SPSR 17 // SPSR is always the 18th register in our 0 based array sRegisterTable[][18] diff --git a/src/devices/cpu/arm7/arm7help.h b/src/devices/cpu/arm7/arm7help.h index 4b0b4f21c8a..c006bfbf1af 100644 --- a/src/devices/cpu/arm7/arm7help.h +++ b/src/devices/cpu/arm7/arm7help.h @@ -166,3 +166,8 @@ #define WRITE32(addr,data) arm7_cpu_write32(addr,data) #define PTR_READ32 &arm7_cpu_read32 #define PTR_WRITE32 &arm7_cpu_write32 + +#define LSL(v, s) ((v) << (s)) +#define LSR(v, s) ((v) >> (s)) +#define ROL(v, s) (LSL((v), (s)) | (LSR((v), 32u - (s)))) +#define ROR(v, s) (LSR((v), (s)) | (LSL((v), 32u - (s)))) diff --git a/src/devices/cpu/arm7/arm7thmb.cpp b/src/devices/cpu/arm7/arm7thmb.cpp index 0d25d62fcf3..a6fe0400721 100644 --- a/src/devices/cpu/arm7/arm7thmb.cpp +++ b/src/devices/cpu/arm7/arm7thmb.cpp @@ -1307,8 +1307,7 @@ void arm7_cpu_device::tg0b_f(uint32_t pc, uint32_t op) // "The address should normally be a word aligned quantity and non-word aligned addresses do not affect the instruction." // "However, the bottom 2 bits of the address will appear on A[1:0] and might be interpreted by the memory system." -// GBA "BB Ball" performs an unaligned read with A[1:0] = 2 and expects A[1] not to be ignored [BP 800B90A,(R4&3)!=0] -// GBA "Gadget Racers" performs an unaligned read with A[1:0] = 1 and expects A[0] to be ignored [BP B72,(R0&3)!=0] +// Endrift says LDMIA/STMIA ignore the low 2 bits and GBA Test Suite assumes it. void arm7_cpu_device::tg0c_0(uint32_t pc, uint32_t op) /* Store */ { @@ -1335,7 +1334,7 @@ void arm7_cpu_device::tg0c_1(uint32_t pc, uint32_t op) /* Load */ { if (op & (1 << offs)) { - SetRegister(offs, READ32(ld_st_address & ~1)); + SetRegister(offs, READ32(ld_st_address & ~3)); ld_st_address += 4; } } diff --git a/src/devices/cpu/e132xs/32xsdasm.cpp b/src/devices/cpu/e132xs/32xsdasm.cpp index 2060350c5b8..339c7b9c0b0 100644 --- a/src/devices/cpu/e132xs/32xsdasm.cpp +++ b/src/devices/cpu/e132xs/32xsdasm.cpp @@ -391,32 +391,31 @@ u32 hyperstone_disassembler::opcode_alignment() const return 2; } +hyperstone_disassembler::hyperstone_disassembler(config *conf) : m_config(conf) +{ +} + /*****************************/ /* Main disassembly function */ /*****************************/ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) { - uint16_t op; - uint8_t op_num; - - uint8_t source_code, dest_code, source_bit, dest_bit; - char source[5] = "\0", dest[5] = "\0"; uint32_t flags = 0; - op = opcodes.r16(pc); + uint16_t op = opcodes.r16(pc); size = 2; - source_code = SOURCECODE(op); - dest_code = DESTCODE(op); - source_bit = SOURCEBIT(op); - dest_bit = DESTBIT(op); + uint8_t source_code = SOURCECODE(op); + uint8_t dest_code = DESTCODE(op); + uint8_t source_bit = SOURCEBIT(op); + uint8_t dest_bit = DESTBIT(op); - global_fp = 0; - int h_flag = 0; + global_fp = m_config->get_fp(); + int h_flag = m_config->get_h(); - op_num = (op & 0xff00) >> 8; + uint8_t op_num = (op & 0xff00) >> 8; switch( op_num ) { diff --git a/src/devices/cpu/e132xs/32xsdasm.h b/src/devices/cpu/e132xs/32xsdasm.h index 6c5b0fa4482..0ee99457c55 100644 --- a/src/devices/cpu/e132xs/32xsdasm.h +++ b/src/devices/cpu/e132xs/32xsdasm.h @@ -15,7 +15,14 @@ class hyperstone_disassembler : public util::disasm_interface { public: - hyperstone_disassembler() = default; + struct config { + virtual ~config() = default; + + virtual u8 get_fp() const = 0; + virtual bool get_h() const = 0; + }; + + hyperstone_disassembler(config *conf); virtual ~hyperstone_disassembler() = default; virtual u32 opcode_alignment() const override; @@ -26,8 +33,11 @@ private: static const char *const G_REG[]; static const char *const SETxx[]; - int size, global_fp; + config *m_config; + int size; + u8 global_fp; + void LL_format(char *source, char *dest, uint16_t op); void LR_format(char *source, char *dest, uint16_t op); void RR_format(char *source, char *dest, uint16_t op, unsigned h_flag); diff --git a/src/devices/cpu/e132xs/32xsdefs.h b/src/devices/cpu/e132xs/32xsdefs.h index a4a5ff876df..b49aba069a4 100644 --- a/src/devices/cpu/e132xs/32xsdefs.h +++ b/src/devices/cpu/e132xs/32xsdefs.h @@ -54,15 +54,15 @@ /* Trap numbers */ #define TRAPNO_IO2 48 #define TRAPNO_IO1 49 -#define TRAPNO_INT4 50 -#define TRAPNO_INT3 51 -#define TRAPNO_INT2 52 -#define TRAPNO_INT1 53 +#define TRAPNO_INT4 50 +#define TRAPNO_INT3 51 +#define TRAPNO_INT2 52 +#define TRAPNO_INT1 53 #define TRAPNO_IO3 54 #define TRAPNO_TIMER 55 #define TRAPNO_RESERVED1 56 #define TRAPNO_TRACE_EXCEPTION 57 -#define TRAPNO_PARITY_ERROR 58 +#define TRAPNO_PARITY_ERROR 58 #define TRAPNO_EXTENDED_OVERFLOW 59 #define TRAPNO_RANGE_ERROR 60 #define TRAPNO_PRIVILEGE_ERROR TRAPNO_RANGE_ERROR @@ -125,27 +125,6 @@ /* Internal registers */ -#define SREG decode.src_value -#define SREGF decode.next_src_value -#define DREG decode.dst_value -#define DREGF decode.next_dst_value -#define EXTRA_U decode.extra.u -#define EXTRA_S decode.extra.s - -#define SET_SREG( _data_ ) (decode.src_is_local ? set_local_register(decode.src, (uint32_t)_data_) : set_global_register(decode.src, (uint32_t)_data_)) -#define SET_SREGF( _data_ ) (decode.src_is_local ? set_local_register(decode.src + 1, (uint32_t)_data_) : set_global_register(decode.src + 1, (uint32_t)_data_)) -#define SET_DREG( _data_ ) (decode.dst_is_local ? set_local_register(decode.dst, (uint32_t)_data_) : set_global_register(decode.dst, (uint32_t)_data_)) -#define SET_DREGF( _data_ ) (decode.dst_is_local ? set_local_register(decode.dst + 1, (uint32_t)_data_) : set_global_register(decode.dst + 1, (uint32_t)_data_)) - -#define SRC_IS_PC (!decode.src_is_local && decode.src == PC_REGISTER) -#define DST_IS_PC (!decode.dst_is_local && decode.dst == PC_REGISTER) -#define SRC_IS_SR (!decode.src_is_local && decode.src == SR_REGISTER) -#define DST_IS_SR (!decode.dst_is_local && decode.dst == SR_REGISTER) -#define SAME_SRC_DST decode.same_src_dst -#define SAME_SRC_DSTF decode.same_src_dstf -#define SAME_SRCF_DST decode.same_srcf_dst - - #define OP m_op #define PC m_global_regs[0] //Program Counter #define SR m_global_regs[1] //Status Register @@ -175,6 +154,13 @@ #define T_MASK 0x00010000 #define P_MASK 0x00020000 #define S_MASK 0x00040000 +#define ILC_MASK 0x00180000 + +#define C_SHIFT 0 +#define Z_SHIFT 1 +#define N_SHIFT 2 +#define V_SHIFT 3 +#define S_SHIFT 18 /* SR flags */ #define GET_C ( SR & C_MASK) // bit 0 //CARRY @@ -220,17 +206,11 @@ #define SET_LOW_SR(val) (SR = (SR & 0xffff0000) | ((val) & 0x0000ffff)) // when SR is addressed, only low 16 bits can be changed -#define CHECK_C(x) (SR = (SR & ~0x00000001) | (uint32_t)((x & 0x100000000L) >> 32)) -#define CHECK_VADD(x,y,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & 0x80000000) >> 29)) -#define CHECK_VADD3(x,y,w,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & ((w) ^ (z)) & 0x80000000) >> 29)) -#define CHECK_VSUB(x,y,z) (SR = (SR & ~0x00000008) | (((z ^ y) & (y ^ x) & 0x80000000) >> 29)) - - /* FER flags */ #define GET_ACCRUED (FER & 0x0000001f) //bits 4 - 0 //Floating-Point Accrued Exceptions #define GET_ACTUAL (FER & 0x00001f00) //bits 12 - 8 //Floating-Point Actual Exceptions //other bits are reversed, in particular 7 - 5 for the operating system. -//the user program can only changes the above 2 flags +//the user program can only change the above 2 flags #endif // MAME_CPU_E132XS_XS32DEFS_H diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp index 73725ec8a25..3793e351b73 100644 --- a/src/devices/cpu/e132xs/e132xs.cpp +++ b/src/devices/cpu/e132xs/e132xs.cpp @@ -33,6 +33,7 @@ TODO: - some wrong cycle counts - verify register wrapping with sregf/dregf on hardware + CHANGELOG: Pierpaolo Prazzoli @@ -147,7 +148,6 @@ #include "debugger.h" #include "32xsdefs.h" -#include "32xsdasm.h" //#define VERBOSE 1 #include "logmacro.h" @@ -195,10 +195,10 @@ ADDRESS_MAP_END hyperstone_device::hyperstone_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, uint32_t prg_data_width, uint32_t io_data_width, address_map_constructor internal_map) - : cpu_device(mconfig, type, tag, owner, clock), - m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32, 0, internal_map), - m_io_config("io", ENDIANNESS_BIG, io_data_width, 15), - m_icount(0) + : cpu_device(mconfig, type, tag, owner, clock) + , m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32, 0, internal_map) + , m_io_config("io", ENDIANNESS_BIG, io_data_width, 15) + , m_icount(0) { } @@ -374,46 +374,26 @@ uint32_t hyperstone_device::get_emu_code_addr(uint8_t num) /* num is OP */ return addr; } -void hyperstone_device::hyperstone_set_trap_entry(int which) -{ - switch( which ) - { - case E132XS_ENTRY_MEM0: - m_trap_entry = 0x00000000; - break; - - case E132XS_ENTRY_MEM1: - m_trap_entry = 0x40000000; - break; - - case E132XS_ENTRY_MEM2: - m_trap_entry = 0x80000000; - break; - - case E132XS_ENTRY_MEM3: - m_trap_entry = 0xffffff00; - break; - - case E132XS_ENTRY_IRAM: - m_trap_entry = 0xc0000000; - break; - - default: - LOG("Set entry point to a reserved value: %d\n", which); - break; - } -} +/*static*/ const uint32_t hyperstone_device::s_trap_entries[8] = { + 0x00000000, // MEM0 + 0x40000000, // MEM1 + 0x80000000, // MEM2 + 0xc0000000, // IRAM + 0, + 0, + 0, + 0xffffff00, // MEM3 +}; -uint32_t hyperstone_device::compute_tr() +void hyperstone_device::compute_tr() { uint64_t cycles_since_base = total_cycles() - m_tr_base_cycles; uint64_t clocks_since_base = cycles_since_base >> m_clck_scale; - return m_tr_base_value + (clocks_since_base / m_tr_clocks_per_tick); + m_tr_result = m_tr_base_value + (clocks_since_base / m_tr_clocks_per_tick); } void hyperstone_device::update_timer_prescale() { - uint32_t prevtr = compute_tr(); TPR &= ~0x80000000; m_clck_scale = (TPR >> 26) & m_clock_scale_mask; m_clock_cycles_1 = 1 << m_clck_scale; @@ -422,7 +402,7 @@ void hyperstone_device::update_timer_prescale() m_clock_cycles_4 = 4 << m_clck_scale; m_clock_cycles_6 = 6 << m_clck_scale; m_tr_clocks_per_tick = ((TPR >> 16) & 0xff) + 2; - m_tr_base_value = prevtr; + m_tr_base_value = m_tr_result; m_tr_base_cycles = total_cycles(); } @@ -472,10 +452,13 @@ TIMER_CALLBACK_MEMBER( hyperstone_device::timer_callback ) /* update the values if necessary */ if (update) + { update_timer_prescale(); + } /* see if the timer is right for firing */ - if (!((compute_tr() - TCR) & 0x80000000)) + compute_tr(); + if (!((m_tr_result - TCR) & 0x80000000)) m_timer_int_pending = 1; /* adjust ourselves for the next time */ @@ -525,7 +508,8 @@ uint32_t hyperstone_device::get_global_register(uint8_t code) /* it is common to poll this in a loop */ if (m_icount > m_tr_clocks_per_tick / 2) m_icount -= m_tr_clocks_per_tick / 2; - return compute_tr(); + compute_tr(); + return m_tr_result; } return m_global_regs[code & 0x1f]; } @@ -579,7 +563,10 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val) case TPR_REGISTER: m_global_regs[code] = val; if (!(val & 0x80000000)) /* change immediately */ + { + compute_tr(); update_timer_prescale(); + } adjust_timer_interrupt(); return; case TCR_REGISTER: @@ -610,10 +597,14 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val) m_intblock = 1; return; case MCR_REGISTER: + { // bits 14..12 EntryTableMap - hyperstone_set_trap_entry((val & 0x7000) >> 12); + const int which = (val & 0x7000) >> 12; + assert(which < 4 || which == 7); + m_trap_entry = s_trap_entries[which]; m_global_regs[code] = val; return; + } case 28: case 29: case 30: @@ -634,10 +625,8 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val) #define SIGN_BIT(val) ((val & 0x80000000) >> 31) #define SIGN_TO_N(val) ((val & 0x80000000) >> 29) -static constexpr int32_t immediate_values[32] = +/*static*/ const int32_t hyperstone_device::s_immediate_values[16] = { - 0, 1, 2, 3, 4, 5, 6, 7, - 8, 9, 10, 11, 12, 13, 14, 15, 16, 0, 0, 0, 32, 64, 128, int32_t(0x80000000), -8, -7, -6, -5, -4, -3, -2, -1 }; @@ -651,7 +640,7 @@ do if (m_delay_slot) \ { \ PC = m_delay_pc; \ - m_delay_slot = false; \ + m_delay_slot = 0; \ } \ } while (0) @@ -670,8 +659,7 @@ uint32_t hyperstone_device::decode_immediate_s() switch (nybble) { case 0: - default: - return immediate_values[0x10 + nybble]; + return 16; case 1: { m_instruction_length = (3<<19); @@ -693,6 +681,8 @@ uint32_t hyperstone_device::decode_immediate_s() PC += 2; return extra_u; } + default: + return s_immediate_values[nybble]; } } @@ -764,7 +754,7 @@ void hyperstone_device::ignore_pcrel() } } -void hyperstone_device::execute_br() +void hyperstone_device::hyperstone_br() { const int32_t offset = decode_pcrel(); check_delay_PC(); @@ -777,24 +767,18 @@ void hyperstone_device::execute_br() void hyperstone_device::execute_trap(uint32_t addr) { - uint8_t reg; - uint32_t oldSR; - reg = GET_FP + GET_FL; - + const uint8_t reg = GET_FP + GET_FL; SET_ILC(m_instruction_length); - - oldSR = SR; + const uint32_t oldSR = SR; SET_FL(6); SET_FP(reg); - set_local_register(0, (PC & 0xfffffffe) | GET_S); - set_local_register(1, oldSR); + m_local_regs[(0 + reg) & 0x3f] = (PC & ~1) | GET_S; + m_local_regs[(1 + reg) & 0x3f] = oldSR; - SET_M(0); - SET_T(0); - SET_L(1); - SET_S(1); + SR &= ~(M_MASK | T_MASK); + SR |= (L_MASK | S_MASK); PC = addr; @@ -829,8 +813,8 @@ void hyperstone_device::execute_exception(uint32_t addr) SET_ILC(m_instruction_length); const uint32_t oldSR = SR; - SET_FP(reg); SET_FL(2); + SET_FP(reg); m_local_regs[(0 + reg) & 0x3f] = (PC & ~1) | GET_S; m_local_regs[(1 + reg) & 0x3f] = oldSR; @@ -1021,6 +1005,7 @@ void hyperstone_device::init(int scale_mask) m_tr_base_cycles = 0; m_tr_base_value = 0; + m_tr_result = 0; m_tr_clocks_per_tick = 0; m_timer_int_pending = 0; @@ -1274,7 +1259,7 @@ void hyperstone_device::device_reset() m_tr_clocks_per_tick = 2; - hyperstone_set_trap_entry(E132XS_ENTRY_MEM3); /* default entry point @ MEM3 */ + m_trap_entry = s_trap_entries[E132XS_ENTRY_MEM3]; // default entry point @ MEM3 set_global_register(BCR_REGISTER, ~0); set_global_register(MCR_REGISTER, ~0); @@ -1356,79 +1341,45 @@ void hyperstone_device::state_string_export(const device_state_entry &entry, std util::disasm_interface *hyperstone_device::create_disassembler() { - return new hyperstone_disassembler; + return new hyperstone_disassembler(this); +} + +u8 hyperstone_device::get_fp() const +{ + return GET_FP; +} + +bool hyperstone_device::get_h() const +{ + return GET_H; } /* Opcodes */ void hyperstone_device::hyperstone_trap() { + static const uint32_t conditions[16] = { + 0, 0, 0, 0, N_MASK | Z_MASK, N_MASK | Z_MASK, N_MASK, N_MASK, C_MASK | Z_MASK, C_MASK | Z_MASK, C_MASK, C_MASK, Z_MASK, Z_MASK, V_MASK, 0 + }; + static const bool trap_if_set[16] = { + false, false, false, false, true, false, true, false, true, false, true, false, true, false, true, false + }; + check_delay_PC(); const uint8_t trapno = (m_op & 0xfc) >> 2; const uint32_t addr = get_trap_addr(trapno); const uint8_t code = ((m_op & 0x300) >> 6) | (m_op & 0x03); - switch (code) + if (trap_if_set[code]) { - case TRAPLE: - if (SR & (N_MASK | Z_MASK)) - execute_trap(addr); - break; - - case TRAPGT: - if(!(SR & (N_MASK | Z_MASK))) - execute_trap(addr); - break; - - case TRAPLT: - if (SR & N_MASK) - execute_trap(addr); - break; - - case TRAPGE: - if (!(SR & N_MASK)) - execute_trap(addr); - break; - - case TRAPSE: - if (SR & (C_MASK | Z_MASK)) - execute_trap(addr); - break; - - case TRAPHT: - if (!(SR & (C_MASK | Z_MASK))) - execute_trap(addr); - break; - - case TRAPST: - if (SR & C_MASK) - execute_trap(addr); - break; - - case TRAPHE: - if (!(SR & C_MASK)) - execute_trap(addr); - break; - - case TRAPE: - if (SR & Z_MASK) - execute_trap(addr); - break; - - case TRAPNE: - if (!(SR & Z_MASK)) - execute_trap(addr); - break; - - case TRAPV: - if (SR & V_MASK) - execute_trap(addr); - break; - - case TRAP: + if (SR & conditions[code]) + execute_trap(addr); + } + else + { + if (!(SR & conditions[code])) execute_trap(addr); - break; } m_icount -= m_clock_cycles_1; @@ -1515,7 +1466,7 @@ void hyperstone_device::execute_run() m_instruction_length = (1<<19); - switch ((OP >> 8) & 0x00ff) + switch (m_op >> 8) { case 0x00: hyperstone_chk<GLOBAL, GLOBAL>(); break; case 0x01: hyperstone_chk<GLOBAL, LOCAL>(); break; @@ -1729,8 +1680,8 @@ void hyperstone_device::execute_run() case 0xd1: hyperstone_ldwr<LOCAL>(); break; case 0xd2: hyperstone_lddr<GLOBAL>(); break; case 0xd3: hyperstone_lddr<LOCAL>(); break; - case 0xd4: hypesrtone_ldwp<GLOBAL>(); break; - case 0xd5: hypesrtone_ldwp<LOCAL>(); break; + case 0xd4: hyperstone_ldwp<GLOBAL>(); break; + case 0xd5: hyperstone_ldwp<LOCAL>(); break; case 0xd6: hyperstone_lddp<GLOBAL>(); break; case 0xd7: hyperstone_lddp<LOCAL>(); break; case 0xd8: hyperstone_stwr<GLOBAL>(); break; @@ -1741,35 +1692,35 @@ void hyperstone_device::execute_run() case 0xdd: hyperstone_stwp<LOCAL>(); break; case 0xde: hyperstone_stdp<GLOBAL>(); break; case 0xdf: hyperstone_stdp<LOCAL>(); break; - case 0xe0: hyperstone_dbv(); break; - case 0xe1: hyperstone_dbnv(); break; - case 0xe2: hyperstone_dbe(); break; - case 0xe3: hyperstone_dbne(); break; - case 0xe4: hyperstone_dbc(); break; - case 0xe5: hyperstone_dbnc(); break; - case 0xe6: hyperstone_dbse(); break; - case 0xe7: hyperstone_dbht(); break; - case 0xe8: hyperstone_dbn(); break; - case 0xe9: hyperstone_dbnn(); break; - case 0xea: hyperstone_dble(); break; - case 0xeb: hyperstone_dbgt(); break; + case 0xe0: hyperstone_db<COND_V, IS_SET>(); break; + case 0xe1: hyperstone_db<COND_V, IS_CLEAR>(); break; + case 0xe2: hyperstone_db<COND_Z, IS_SET>(); break; + case 0xe3: hyperstone_db<COND_Z, IS_CLEAR>(); break; + case 0xe4: hyperstone_db<COND_C, IS_SET>(); break; + case 0xe5: hyperstone_db<COND_C, IS_CLEAR>(); break; + case 0xe6: hyperstone_db<COND_CZ, IS_SET>(); break; + case 0xe7: hyperstone_db<COND_CZ, IS_CLEAR>(); break; + case 0xe8: hyperstone_db<COND_N, IS_SET>(); break; + case 0xe9: hyperstone_db<COND_N, IS_CLEAR>(); break; + case 0xea: hyperstone_db<COND_NZ, IS_SET>(); break; + case 0xeb: hyperstone_db<COND_NZ, IS_CLEAR>(); break; case 0xec: hyperstone_dbr(); break; case 0xed: hyperstone_frame(); break; - case 0xee: hyperstone_call_global(); break; - case 0xef: hyperstone_call_local(); break; - case 0xf0: hyperstone_bv(); break; - case 0xf1: hyperstone_bnv(); break; - case 0xf2: hyperstone_be(); break; - case 0xf3: hyperstone_bne(); break; - case 0xf4: hyperstone_bc(); break; - case 0xf5: hyperstone_bnc(); break; - case 0xf6: hyperstone_bse(); break; - case 0xf7: hyperstone_bht(); break; - case 0xf8: hyperstone_bn(); break; - case 0xf9: hyperstone_bnn(); break; - case 0xfa: hyperstone_ble(); break; - case 0xfb: hyperstone_bgt(); break; - case 0xfc: execute_br(); break; + case 0xee: hyperstone_call<GLOBAL>(); break; + case 0xef: hyperstone_call<LOCAL>(); break; + case 0xf0: hyperstone_b<COND_V, IS_SET>(); break; + case 0xf1: hyperstone_b<COND_V, IS_CLEAR>(); break; + case 0xf2: hyperstone_b<COND_Z, IS_SET>(); break; + case 0xf3: hyperstone_b<COND_Z, IS_CLEAR>(); break; + case 0xf4: hyperstone_b<COND_C, IS_SET>(); break; + case 0xf5: hyperstone_b<COND_C, IS_CLEAR>(); break; + case 0xf6: hyperstone_b<COND_CZ, IS_SET>(); break; + case 0xf7: hyperstone_b<COND_CZ, IS_CLEAR>(); break; + case 0xf8: hyperstone_b<COND_N, IS_SET>(); break; + case 0xf9: hyperstone_b<COND_N, IS_CLEAR>(); break; + case 0xfa: hyperstone_b<COND_NZ, IS_SET>(); break; + case 0xfb: hyperstone_b<COND_NZ, IS_CLEAR>(); break; + case 0xfc: hyperstone_br(); break; case 0xfd: hyperstone_trap(); break; case 0xfe: hyperstone_trap(); break; case 0xff: hyperstone_trap(); break; diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index 81575c4f0cf..4ccc09de6ff 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -5,6 +5,7 @@ #pragma once +#include "32xsdasm.h" /* A note about clock multipliers and dividers: @@ -22,17 +23,27 @@ -/* Functions */ - //************************************************************************** // TYPE DEFINITIONS //************************************************************************** +class e132xs_frontend; + // ======================> hyperstone_device // Used by core CPU interface -class hyperstone_device : public cpu_device +class hyperstone_device : public cpu_device, public hyperstone_disassembler::config { + friend class e132xs_frontend; + +public: + inline void ccfunc_unimplemented(); + inline void ccfunc_print(); + inline void ccfunc_total_cycles(); + void update_timer_prescale(); + void compute_tr(); + void adjust_timer_interrupt(); + protected: enum { @@ -114,6 +125,45 @@ protected: IS_SIGNED = 1 }; + enum branch_condition + { + COND_V = 0, + COND_Z = 1, + COND_C = 2, + COND_CZ = 3, + COND_N = 4, + COND_NZ = 5 + }; + + enum condition_set + { + IS_CLEAR = 0, + IS_SET = 1 + }; + + enum + { + EXCEPTION_IO2 = 48, + EXCEPTION_IO1 = 49, + EXCEPTION_INT4 = 50, + EXCEPTION_INT3 = 51, + EXCEPTION_INT2 = 52, + EXCEPTION_INT1 = 53, + EXCEPTION_IO3 = 54, + EXCEPTION_TIMER = 55, + EXCEPTION_RESERVED1 = 56, + EXCEPTION_TRACE = 57, + EXCEPTION_PARITY_ERROR = 58, + EXCEPTION_EXTENDED_OVERFLOW = 59, + EXCEPTION_RANGE_ERROR = 60, + EXCEPTION_PRIVILEGE_ERROR = EXCEPTION_RANGE_ERROR, + EXCEPTION_FRAME_ERROR = EXCEPTION_RANGE_ERROR, + EXCEPTION_RESERVED2 = 61, + EXCEPTION_RESET = 62, // reserved if not mapped @ MEM3 + EXCEPTION_ERROR_ENTRY = 63, // for instruction code of all ones + EXCEPTION_COUNT + }; + // construction/destruction hyperstone_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, uint32_t prg_data_width, uint32_t io_data_width, address_map_constructor internal_map); @@ -137,6 +187,8 @@ protected: // device_disasm_interface overrides virtual util::disasm_interface *create_disassembler() override; + virtual u8 get_fp() const override; + virtual bool get_h() const override; // device_state_interface overrides virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; @@ -166,12 +218,16 @@ protected: uint64_t m_tr_base_cycles; uint32_t m_tr_base_value; + uint32_t m_tr_result; uint32_t m_tr_clocks_per_tick; uint8_t m_timer_int_pending; emu_timer *m_timer; + uint64_t m_numcycles; + + uint32_t m_prev_pc; uint32_t m_delay_pc; - bool m_delay_slot; + uint32_t m_delay_slot; uint32_t m_opcodexor; @@ -182,6 +238,10 @@ protected: int m_icount; uint8_t m_fl_lut[16]; + static const uint32_t s_trap_entries[8]; + static const int32_t s_immediate_values[16]; + + uint32_t get_trap_addr(uint8_t trapno); private: // internal functions @@ -192,25 +252,22 @@ private: uint32_t get_global_register(uint8_t code); - uint32_t get_trap_addr(uint8_t trapno); uint32_t get_emu_code_addr(uint8_t num); - void hyperstone_set_trap_entry(int which); - uint32_t compute_tr(); - void update_timer_prescale(); - void adjust_timer_interrupt(); TIMER_CALLBACK_MEMBER(timer_callback); - void execute_br(); + uint32_t decode_const(); + uint32_t decode_immediate_s(); + void ignore_immediate_s(); + int32_t decode_pcrel(); + void ignore_pcrel(); + + void hyperstone_br(); void execute_trap(uint32_t addr); void execute_int(uint32_t addr); void execute_exception(uint32_t addr); void execute_software(); - void ignore_immediate_s(); - uint32_t decode_immediate_s(); - uint32_t decode_const(); - template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_chk(); template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_movd(); template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void hyperstone_divsu(); @@ -268,7 +325,7 @@ private: template <reg_bank SRC_GLOBAL> void hyperstone_ldwr(); template <reg_bank SRC_GLOBAL> void hyperstone_lddr(); - template <reg_bank SRC_GLOBAL> void hypesrtone_ldwp(); + template <reg_bank SRC_GLOBAL> void hyperstone_ldwp(); template <reg_bank SRC_GLOBAL> void hyperstone_lddp(); template <reg_bank SRC_GLOBAL> void hyperstone_stwr(); @@ -276,192 +333,18 @@ private: template <reg_bank SRC_GLOBAL> void hyperstone_stwp(); template <reg_bank SRC_GLOBAL> void hyperstone_stdp(); - void hyperstone_dbv(); - void hyperstone_dbnv(); - void hyperstone_dbe(); - void hyperstone_dbne(); - void hyperstone_dbc(); - void hyperstone_dbnc(); - void hyperstone_dbse(); - void hyperstone_dbht(); - void hyperstone_dbn(); - void hyperstone_dbnn(); - void hyperstone_dble(); - void hyperstone_dbgt(); + template <branch_condition CONDITION, condition_set COND_SET> void hyperstone_b(); + template <branch_condition CONDITION, condition_set COND_SET> void hyperstone_db(); void hyperstone_dbr(); void hyperstone_frame(); - void hyperstone_call_global(); - void hyperstone_call_local(); - - void hyperstone_bv(); - void hyperstone_bnv(); - void hyperstone_be(); - void hyperstone_bne(); - void hyperstone_bc(); - void hyperstone_bnc(); - void hyperstone_bse(); - void hyperstone_bht(); - void hyperstone_bn(); - void hyperstone_bnn(); - void hyperstone_ble(); - void hyperstone_bgt(); + template <hyperstone_device::reg_bank SRC_GLOBAL> void hyperstone_call(); void hyperstone_trap(); void hyperstone_extend(); void hyperstone_reserved(); void hyperstone_do(); - - int32_t decode_pcrel(); - void ignore_pcrel(); - -#if 0 - void execute_run_drc(); - void flush_drc_cache(); - void code_flush_cache(); - void code_compile_block(offs_t pc); - inline void ccfunc_unimplemented(); - void static_generate_entry_point(); - void static_generate_nocode_handler(); - void static_generate_out_of_cycles(); - void static_generate_memory_accessor(int size, int iswrite, const char *name, code_handle *&handleptr); - void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception); - void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast); - void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); -#endif - -#if 0 - void generate_op00(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op01(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op02(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op03(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op04(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op05(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op06(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op07(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op08(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op09(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op0a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op0c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op0e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op10(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op11(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op14(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op15(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op16(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op17(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op18(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op19(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op1a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op1c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op1e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op20(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op21(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op22(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op23(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op24(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op25(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op26(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op27(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op28(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op29(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op2a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op2c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op2e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op30(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op31(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op32(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op33(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op34(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op35(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op36(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op37(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op38(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op39(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op3a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op3c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op3e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op40(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op41(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op42(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op43(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op44(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op45(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op46(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op47(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op48(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op49(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op4a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op4c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op4e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op50(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op51(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op52(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op53(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op54(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op55(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op56(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op57(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op58(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op59(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op5a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op5c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op5e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op60(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op61(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op62(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op63(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op65(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op66(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op67(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op68(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op69(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op6a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op6c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op6e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op70(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op71(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op72(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op73(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op74(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op75(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op76(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op77(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op78(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op79(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op7a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op7c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op7e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op80(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op81(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op82(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op83(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op84(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op85(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op86(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op87(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op88(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op89(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op8a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op8c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op8e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op90(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op91(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op92(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op93(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op94(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op95(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op96(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op97(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op98(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op99(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op9a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op9c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op9e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opaa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opab(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opac(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opad(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opae(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opaf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opba(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opbc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opbe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opca(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opcc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opce(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opda(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opdc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opde(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opea(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opeb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opec(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_oped(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opee(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opef(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opfa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opfc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opfe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opff(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); -#endif }; // device type definition @@ -662,4 +545,5 @@ protected: virtual void device_start() override; }; + #endif // MAME_CPU_E132XS_E132XS_H diff --git a/src/devices/cpu/e132xs/e132xsop.hxx b/src/devices/cpu/e132xs/e132xsop.hxx index acaa1d99aa9..9d55b78d233 100644 --- a/src/devices/cpu/e132xs/e132xsop.hxx +++ b/src/devices/cpu/e132xs/e132xsop.hxx @@ -51,7 +51,7 @@ void hyperstone_device::hyperstone_movd() const uint32_t old_s = SR & S_MASK; const uint32_t old_l = SR & L_MASK; PC = sreg & ~1; - SR = (sregf & 0xffe00000) | ((sreg & 0x01) << 18 ) | (sregf & 0x3ffff); + SR = (sregf & 0xffe3ffff) | ((sreg & 0x01) << 18); if (m_intblock < 1) m_intblock = 1; @@ -81,6 +81,8 @@ void hyperstone_device::hyperstone_movd() } else if (SRC_GLOBAL && (src_code == SR_REGISTER)) // Rd doesn't denote PC and Rs denotes SR { + SR |= Z_MASK; + SR &= ~N_MASK; if (DST_GLOBAL) { set_global_register(dst_code, 0); @@ -91,13 +93,16 @@ void hyperstone_device::hyperstone_movd() m_local_regs[dst_code] = 0; m_local_regs[dstf_code] = 0; } - SR |= Z_MASK; - SR &= ~N_MASK; m_icount -= m_clock_cycles_2; } else // Rd doesn't denote PC and Rs doesn't denote SR { + SR &= ~(Z_MASK | N_MASK); + if (concat_64(sreg, sregf) == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(sreg); + if (DST_GLOBAL) { set_global_register(dst_code, sreg); @@ -109,11 +114,6 @@ void hyperstone_device::hyperstone_movd() m_local_regs[dstf_code] = sregf; } - SR &= ~(Z_MASK | N_MASK); - if (concat_64(sreg, sregf) == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(sreg); - m_icount -= m_clock_cycles_2; } } @@ -152,12 +152,12 @@ void hyperstone_device::hyperstone_divsu() { /* TODO: add quotient overflow */ const uint32_t quotient = SIGNED ? (uint32_t)((int64_t)dividend / (int32_t)sreg) : (dividend / sreg); - (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = SIGNED ? (uint32_t)((int64_t)dividend % (int32_t)sreg) : (dividend % sreg); - (DST_GLOBAL ? m_global_regs : m_local_regs)[dstf_code] = (uint32_t)quotient; SR &= ~(V_MASK | Z_MASK | N_MASK); if (quotient == 0) SR |= Z_MASK; SR |= SIGN_TO_N(quotient); + (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = SIGNED ? (uint32_t)((int64_t)dividend % (int32_t)sreg) : (dividend % sreg); + (DST_GLOBAL ? m_global_regs : m_local_regs)[dstf_code] = (uint32_t)quotient; } m_icount -= 36 << m_clck_scale; @@ -219,20 +219,19 @@ template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SR void hyperstone_device::hyperstone_mask() { const uint32_t extra_u = decode_const(); - check_delay_PC(); - const uint32_t dreg = (SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]) & extra_u; - if (DST_GLOBAL) - set_global_register(DST_CODE, dreg); - else - m_local_regs[(DST_CODE + GET_FP) & 0x3f] = dreg; if (dreg == 0) SR |= Z_MASK; else SR &= ~Z_MASK; + if (DST_GLOBAL) + set_global_register(DST_CODE, dreg); + else + m_local_regs[(DST_CODE + GET_FP) & 0x3f] = dreg; + m_icount -= m_clock_cycles_1; } @@ -240,28 +239,28 @@ template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SR void hyperstone_device::hyperstone_sum() { const uint32_t extra_u = decode_const(); - check_delay_PC(); - const uint32_t fp = GET_FP; const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f); const uint32_t sreg = SRC_GLOBAL ? ((src_code == SR_REGISTER) ? GET_C : m_global_regs[src_code]) : m_local_regs[src_code]; const uint64_t tmp = uint64_t(sreg) + uint64_t(extra_u); - SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK); + SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK); SR |= (tmp & 0x100000000) >> 32; SR |= ((sreg ^ tmp) & (extra_u ^ tmp) & 0x80000000) >> 28; const uint32_t dreg = sreg + extra_u; + + if (dreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) set_global_register(DST_CODE, dreg); else m_local_regs[(DST_CODE + fp) & 0x3f] = dreg; - if (dreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); m_icount -= m_clock_cycles_1; } @@ -278,22 +277,25 @@ void hyperstone_device::hyperstone_sums() const int32_t sreg = int32_t(SRC_GLOBAL ? ((src_code == SR_REGISTER) ? GET_C : m_global_regs[src_code]) : m_local_regs[src_code]); const int64_t tmp = int64_t(sreg) + int64_t(extra_s); + + SR &= ~(Z_MASK | N_MASK | V_MASK); SR |= ((sreg ^ tmp) & (extra_s ^ tmp) & 0x80000000) >> 28; //#if SETCARRYS -// CHECK_C(tmp); +// SR |= (tmp & 0x100000000) >> 32; //#endif const int32_t res = sreg + extra_s; - if (DST_GLOBAL) - set_global_register(DST_CODE, res); - else - m_local_regs[(DST_CODE + fp) & 0x3f] = res; if (res == 0) SR |= Z_MASK; SR |= SIGN_TO_N(res); + if (DST_GLOBAL) + set_global_register(DST_CODE, res); + else + m_local_regs[(DST_CODE + fp) & 0x3f] = res; + m_icount -= m_clock_cycles_1; if ((SR & V_MASK) && src_code != SR_REGISTER) @@ -318,15 +320,14 @@ void hyperstone_device::hyperstone_cmp() SR &= ~(Z_MASK | N_MASK | V_MASK | C_MASK); SR |= ((tmp ^ dreg) & (dreg ^ sreg) & 0x80000000) >> 28; - if (dreg == sreg) + if (dreg < sreg) + SR |= C_MASK; + else if (dreg == sreg) SR |= Z_MASK; if (int32_t(dreg) < int32_t(sreg)) SR |= N_MASK; - if (dreg < sreg) - SR |= C_MASK; - m_icount -= m_clock_cycles_1; } @@ -346,6 +347,11 @@ void hyperstone_device::hyperstone_mov() const uint32_t src_code = SRC_GLOBAL ? (SRC_CODE + (h ? 16 : 0)) : ((SRC_CODE + fp) & 0x3f); const uint32_t sreg = SRC_GLOBAL ? ((WRITE_ONLY_REGMASK & (1 << src_code)) ? 0 : get_global_register(src_code)) : m_local_regs[src_code]; + SR &= ~(Z_MASK | N_MASK); + if (sreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(sreg); + if (DST_GLOBAL) { const uint32_t dst_code = DST_CODE + (h ? 16 : 0); @@ -358,11 +364,6 @@ void hyperstone_device::hyperstone_mov() { m_local_regs[(DST_CODE + fp) & 0x3f] = sreg; } - - SR &= ~(Z_MASK | N_MASK); - if (sreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(sreg); } m_icount -= m_clock_cycles_1; @@ -388,6 +389,11 @@ void hyperstone_device::hyperstone_add() SR |= ((sreg ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28; dreg += sreg; + + if (dreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) { set_global_register(dst_code, dreg); @@ -400,10 +406,6 @@ void hyperstone_device::hyperstone_add() m_local_regs[dst_code] = dreg; } - if (dreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); - m_icount -= m_clock_cycles_1; } @@ -424,19 +426,20 @@ void hyperstone_device::hyperstone_adds() SR |= ((sreg ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28; //#if SETCARRYS -// CHECK_C(tmp); +// SR |= (tmp & 0x100000000) >> 32; //#endif const int32_t res = sreg + dreg; - if (DST_GLOBAL) - set_global_register(dst_code, res); - else - m_local_regs[dst_code] = res; if (res == 0) SR |= Z_MASK; SR |= SIGN_TO_N(res); + if (DST_GLOBAL) + set_global_register(dst_code, res); + else + m_local_regs[dst_code] = res; + m_icount -= m_clock_cycles_1; if (SR & V_MASK) @@ -473,16 +476,17 @@ void hyperstone_device::hyperstone_andn() const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f); const uint32_t sreg = SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]; const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] & ~sreg; - if (DST_GLOBAL) - set_global_register(dst_code, dreg); - else - m_local_regs[dst_code] = dreg; if (dreg == 0) SR |= Z_MASK; else SR &= ~Z_MASK; + if (DST_GLOBAL) + set_global_register(dst_code, dreg); + else + m_local_regs[dst_code] = dreg; + m_icount -= m_clock_cycles_1; } @@ -494,16 +498,17 @@ void hyperstone_device::hyperstone_or() const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f); const uint32_t sreg = SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]; const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] | sreg; - if (DST_GLOBAL) - set_global_register(dst_code, dreg); - else - m_local_regs[dst_code] = dreg; if (dreg == 0) SR |= Z_MASK; else SR &= ~Z_MASK; + if (DST_GLOBAL) + set_global_register(dst_code, dreg); + else + m_local_regs[dst_code] = dreg; + m_icount -= m_clock_cycles_1; } @@ -515,16 +520,17 @@ void hyperstone_device::hyperstone_xor() const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f); const uint32_t sreg = SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]; const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] ^ sreg; - if (DST_GLOBAL) - set_global_register(dst_code, dreg); - else - m_local_regs[dst_code] = dreg; if (dreg == 0) SR |= Z_MASK; else SR &= ~Z_MASK; + if (DST_GLOBAL) + set_global_register(dst_code, dreg); + else + m_local_regs[dst_code] = dreg; + m_icount -= m_clock_cycles_1; } @@ -563,15 +569,15 @@ void hyperstone_device::hyperstone_subc() dreg -= sreg_c; } + if (old_z && dreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) set_global_register(DST_CODE, dreg); else m_local_regs[dst_code] = dreg; - if (old_z && dreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); - m_icount -= m_clock_cycles_1; } @@ -581,16 +587,17 @@ void hyperstone_device::hyperstone_not() check_delay_PC(); const uint32_t dreg = ~(SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]); - if (DST_GLOBAL) - set_global_register(DST_CODE, dreg); - else - m_local_regs[(DST_CODE + GET_FP) & 0x3f] = dreg; if (dreg == 0) SR |= Z_MASK; else SR &= ~Z_MASK; + if (DST_GLOBAL) + set_global_register(DST_CODE, dreg); + else + m_local_regs[(DST_CODE + GET_FP) & 0x3f] = dreg; + m_icount -= m_clock_cycles_1; } @@ -609,11 +616,15 @@ void hyperstone_device::hyperstone_sub() const uint64_t tmp = uint64_t(dreg) - uint64_t(sreg); SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK); - SR |= (tmp & 0x100000000) >> 32; SR |= ((tmp ^ dreg) & (dreg ^ sreg) & 0x80000000) >> 28; dreg -= sreg; + + if (dreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) { set_global_register(dst_code, dreg); @@ -626,10 +637,6 @@ void hyperstone_device::hyperstone_sub() m_local_regs[dst_code] = dreg; } - if (dreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); - m_icount -= m_clock_cycles_1; } @@ -649,21 +656,22 @@ void hyperstone_device::hyperstone_subs() SR &= ~(V_MASK | Z_MASK | N_MASK); //#ifdef SETCARRYS -// CHECK_C(tmp); +// SR |= (tmp & 0x100000000) >> 32; //#endif SR |= ((tmp ^ dreg) & (dreg ^ sreg) & 0x80000000) >> 28; const int32_t res = dreg - sreg; - if (DST_GLOBAL) - set_global_register(dst_code, res); - else - m_local_regs[dst_code] = res; if (res == 0) SR |= Z_MASK; SR |= SIGN_TO_N(res); + if (DST_GLOBAL) + set_global_register(dst_code, res); + else + m_local_regs[dst_code] = res; + m_icount -= m_clock_cycles_1; if (SR & V_MASK) @@ -693,27 +701,27 @@ void hyperstone_device::hyperstone_addc() if (SRC_GLOBAL && (src_code == SR_REGISTER)) { tmp = uint64_t(dreg) + uint64_t(c); - SR |= ((dreg ^ tmp) & (c ^ tmp) & 0x80000000) >> 28; + SR |= ((dreg ^ tmp) & tmp & 0x80000000) >> 28; dreg += c; } else { tmp = uint64_t(sreg) + uint64_t(dreg) + uint64_t(c); - SR |= ((sreg ^ tmp) & (dreg ^ tmp) & (c ^ tmp) & 0x80000000) >> 28; + SR |= ((sreg ^ tmp) & (dreg ^ tmp) & tmp & 0x80000000) >> 28; dreg += sreg + c; } SR |= (tmp & 0x100000000) >> 32; + if (dreg == 0 && old_z) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) set_global_register(dst_code, dreg); else m_local_regs[dst_code] = dreg; - if (dreg == 0 && old_z) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); - m_icount -= m_clock_cycles_1; } @@ -725,16 +733,17 @@ void hyperstone_device::hyperstone_and() const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f); const uint32_t sreg = SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]; const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] & sreg; - if (DST_GLOBAL) - set_global_register(dst_code, dreg); - else - m_local_regs[dst_code] = dreg; if (dreg == 0) SR |= Z_MASK; else SR &= ~Z_MASK; + if (DST_GLOBAL) + set_global_register(dst_code, dreg); + else + m_local_regs[dst_code] = dreg; + m_icount -= m_clock_cycles_1; } @@ -754,15 +763,16 @@ void hyperstone_device::hyperstone_neg() SR |= (tmp & sreg & 0x80000000) >> 28; const uint32_t dreg = -sreg; - if (DST_GLOBAL) - set_global_register(DST_CODE, dreg); - else - m_local_regs[(DST_CODE + fp) & 0x3f] = dreg; if (dreg == 0) SR |= Z_MASK; SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) + set_global_register(DST_CODE, dreg); + else + m_local_regs[(DST_CODE + fp) & 0x3f] = dreg; + m_icount -= m_clock_cycles_1; } @@ -783,19 +793,20 @@ void hyperstone_device::hyperstone_negs() SR |= V_MASK; //#if SETCARRYS -// CHECK_C(tmp); +// SR |= (tmp & 0x100000000) >> 32; //#endif const int32_t res = -sreg; - if (DST_GLOBAL) - set_global_register(DST_CODE, res); - else - m_local_regs[(DST_CODE + fp) & 0x3f] = res; if (res == 0) SR |= Z_MASK; SR |= SIGN_TO_N(res); + if (DST_GLOBAL) + set_global_register(DST_CODE, res); + else + m_local_regs[(DST_CODE + fp) & 0x3f] = res; + m_icount -= m_clock_cycles_1; if (GET_V) @@ -814,7 +825,7 @@ void hyperstone_device::hyperstone_cmpi() check_delay_PC(); if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f); const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code]; @@ -823,15 +834,14 @@ void hyperstone_device::hyperstone_cmpi() uint64_t tmp = (uint64_t)dreg - (uint64_t)imm; SR |= ((tmp ^ dreg) & (dreg ^ imm) & 0x80000000) >> 28; - if (dreg == imm) + if (dreg < imm) + SR |= C_MASK; + else if (dreg == imm) SR |= Z_MASK; if ((int32_t)dreg < (int32_t)imm) SR |= N_MASK; - if (dreg < imm) - SR |= C_MASK; - m_icount -= m_clock_cycles_1; } @@ -844,7 +854,7 @@ void hyperstone_device::hyperstone_movi() check_delay_PC(); if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; const bool h = (SR & H_MASK) != 0; if (DST_GLOBAL && h && !(SR & S_MASK)) @@ -853,6 +863,15 @@ void hyperstone_device::hyperstone_movi() } else { + SR &= ~(Z_MASK | N_MASK); + if (imm == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(imm); + +#if MISSIONCRAFT_FLAGS + SR &= ~V_MASK; // or V undefined ? +#endif + if (DST_GLOBAL) { const uint32_t dst_code = DST_CODE + (h ? 16 : 0); @@ -865,15 +884,6 @@ void hyperstone_device::hyperstone_movi() { m_local_regs[(DST_CODE + GET_FP) & 0x3f] = imm; } - - SR &= ~(Z_MASK | N_MASK); - if (imm == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(imm); - -#if MISSIONCRAFT_FLAGS - SR &= ~V_MASK; // or V undefined ? -#endif } m_icount -= m_clock_cycles_1; @@ -893,7 +903,7 @@ void hyperstone_device::hyperstone_addi() if (!N_OP_MASK) imm = GET_C & (((SR & Z_MASK) ? 0 : 1) | (dreg & 0x01)); else if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK); @@ -903,6 +913,11 @@ void hyperstone_device::hyperstone_addi() SR |= ((imm ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28; dreg += imm; + + if (dreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) { set_global_register(dst_code, dreg); @@ -915,10 +930,6 @@ void hyperstone_device::hyperstone_addi() m_local_regs[dst_code] = dreg; } - if (dreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); - m_icount -= m_clock_cycles_1; } @@ -941,7 +952,7 @@ void hyperstone_device::hyperstone_addsi() } else { - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; } } else @@ -960,20 +971,20 @@ void hyperstone_device::hyperstone_addsi() SR |= ((imm ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28; //#if SETCARRYS -// CHECK_C(tmp); +// SR |= (tmp & 0x100000000) >> 32; //#endif const int32_t res = imm + (int32_t)dreg; + if (res == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(res); + if (DST_GLOBAL) set_global_register(dst_code, res); else m_local_regs[dst_code] = res; - if (res == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(res); - m_icount -= m_clock_cycles_1; if (SR & V_MASK) @@ -1012,7 +1023,7 @@ void hyperstone_device::hyperstone_cmpbi() } else { - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; } } @@ -1049,13 +1060,19 @@ void hyperstone_device::hyperstone_andni() if (N_OP_MASK == 0x10f) imm = 0x7fffffff; // bit 31 = 0, others = 1 else if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; uint32_t dreg; if (DST_GLOBAL) { const uint32_t dst_code = DST_CODE; dreg = m_global_regs[dst_code] & ~imm; + + if (dreg == 0) + SR |= Z_MASK; + else + SR &= ~Z_MASK; + set_global_register(dst_code, dreg); } else @@ -1063,12 +1080,12 @@ void hyperstone_device::hyperstone_andni() const uint32_t dst_code = (DST_CODE + GET_FP) & 0x3f; dreg = m_local_regs[dst_code] & ~imm; m_local_regs[dst_code] = dreg; - } - if (dreg == 0) - SR |= Z_MASK; - else - SR &= ~Z_MASK; + if (dreg == 0) + SR |= Z_MASK; + else + SR &= ~Z_MASK; + } m_icount -= m_clock_cycles_1; } @@ -1083,24 +1100,30 @@ void hyperstone_device::hyperstone_ori() check_delay_PC(); if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; - uint32_t dreg; + imm = m_op & 0x0f; + if (DST_GLOBAL) { const uint32_t dst_code = DST_CODE; - dreg = m_global_regs[dst_code] | imm; + const uint32_t dreg = m_global_regs[dst_code] | imm; + + if (dreg) + SR &= ~Z_MASK; + else + SR |= Z_MASK; + set_global_register(dst_code, dreg); } else { const uint32_t dst_code = (DST_CODE + GET_FP) & 0x3f; - dreg = m_local_regs[dst_code] |= imm; - } + const uint32_t dreg = m_local_regs[dst_code] |= imm; - if (dreg) - SR &= ~Z_MASK; - else - SR |= Z_MASK; + if (dreg) + SR &= ~Z_MASK; + else + SR |= Z_MASK; + } m_icount -= m_clock_cycles_1; } @@ -1115,24 +1138,30 @@ void hyperstone_device::hyperstone_xori() check_delay_PC(); if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; uint32_t dreg; if (DST_GLOBAL) { const uint32_t dst_code = DST_CODE; dreg = m_global_regs[dst_code] ^ imm; + + if (dreg) + SR &= ~Z_MASK; + else + SR |= Z_MASK; + set_global_register(dst_code, dreg); } else { const uint32_t dst_code = (DST_CODE + GET_FP) & 0x3f; dreg = m_local_regs[dst_code] ^= imm; - } - if (dreg) - SR &= ~Z_MASK; - else - SR |= Z_MASK; + if (dreg) + SR &= ~Z_MASK; + else + SR |= Z_MASK; + } m_icount -= m_clock_cycles_1; } @@ -1164,13 +1193,13 @@ void hyperstone_device::hyperstone_shrdi() high_order = extract_64hi(val); - m_local_regs[dst_code] = high_order; - m_local_regs[dstf_code] = extract_64lo(val); - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(high_order); + m_local_regs[dst_code] = high_order; + m_local_regs[dstf_code] = extract_64lo(val); + m_icount -= m_clock_cycles_2; } @@ -1203,13 +1232,13 @@ void hyperstone_device::hyperstone_shrd() val >>= n; } - m_local_regs[dst_code] = (uint32_t)(val >> 32); - m_local_regs[dstf_code] = (uint32_t)val; - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(m_local_regs[dst_code]); + m_local_regs[dst_code] = (uint32_t)(val >> 32); + m_local_regs[dstf_code] = (uint32_t)val; + m_icount -= m_clock_cycles_2; } @@ -1229,11 +1258,12 @@ void hyperstone_device::hyperstone_shr() dreg >>= n; - m_local_regs[dst_code] = dreg; if (dreg == 0) SR |= Z_MASK; SR |= SIGN_TO_N(dreg); + m_local_regs[dst_code] = dreg; + m_icount -= m_clock_cycles_1; } @@ -1261,13 +1291,13 @@ void hyperstone_device::hyperstone_sardi() val |= 0xffffffff00000000U << (32 - n); } - m_local_regs[dst_code] = (uint32_t)(val >> 32); - m_local_regs[dstf_code] = (uint32_t)val; - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(m_local_regs[dst_code]); + m_local_regs[dst_code] = (uint32_t)(val >> 32); + m_local_regs[dstf_code] = (uint32_t)val; + m_icount -= m_clock_cycles_2; } @@ -1306,12 +1336,13 @@ void hyperstone_device::hyperstone_sard() } } - m_local_regs[dst_code] = (uint32_t)(val >> 32); - m_local_regs[dstf_code] = (uint32_t)val; if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(m_local_regs[dst_code]); + m_local_regs[dst_code] = (uint32_t)(val >> 32); + m_local_regs[dstf_code] = (uint32_t)val; + m_icount -= m_clock_cycles_2; } @@ -1339,12 +1370,12 @@ void hyperstone_device::hyperstone_sar() ret |= 0xffffffff << (32 - n); } - m_local_regs[dst_code] = ret; - if (ret == 0) SR |= Z_MASK; SR |= SIGN_TO_N(ret); + m_local_regs[dst_code] = ret; + m_icount -= m_clock_cycles_1; } @@ -1378,13 +1409,13 @@ void hyperstone_device::hyperstone_shldi() high_order = extract_64hi(val); - m_local_regs[dst_code] = high_order; - m_local_regs[dstf_code] = extract_64lo(val); - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(high_order); + m_local_regs[dst_code] = high_order; + m_local_regs[dstf_code] = extract_64lo(val); + m_icount -= m_clock_cycles_2; } @@ -1423,13 +1454,13 @@ void hyperstone_device::hyperstone_shld() val <<= n; - m_local_regs[dst_code] = extract_64hi(val); - m_local_regs[dstf_code] = extract_64lo(val); - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(m_local_regs[dst_code]); + m_local_regs[dst_code] = extract_64hi(val); + m_local_regs[dstf_code] = extract_64lo(val); + m_icount -= m_clock_cycles_2; } @@ -1453,12 +1484,12 @@ void hyperstone_device::hyperstone_shl() if (((base & mask) && (!(ret & 0x80000000))) || (((base & mask) ^ mask) && (ret & 0x80000000))) SR |= V_MASK; - m_local_regs[dst_code & 0x3f] = ret; - if (ret == 0) SR |= Z_MASK; SR |= SIGN_TO_N(ret); + m_local_regs[dst_code & 0x3f] = ret; + m_icount -= m_clock_cycles_1; } @@ -1508,12 +1539,12 @@ void hyperstone_device::hyperstone_rol() SR &= ~(Z_MASK | C_MASK | N_MASK); #endif - m_local_regs[dst_code] = val; - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(val); + m_local_regs[dst_code] = val; + m_icount -= m_clock_cycles_1; } @@ -1553,167 +1584,84 @@ void hyperstone_device::hyperstone_ldxx1() const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f); const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f); + const uint32_t dreg = ((DST_GLOBAL && dst_code == SR_REGISTER) ? 0 : (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code]); - if (DST_GLOBAL && dst_code == SR_REGISTER) + switch (sub_type) { - switch (sub_type) - { - case 0: // LDBS.A - if (SRC_GLOBAL) - set_global_register(src_code, (int32_t)(int8_t)READ_B(extra_s)); - else - m_local_regs[src_code] = (int32_t)(int8_t)READ_B(extra_s); - break; - - case 1: // LDBU.A - if (SRC_GLOBAL) - m_global_regs[src_code] = READ_B(extra_s); - else - m_local_regs[src_code] = READ_B(extra_s); - break; + case 0: // LDBS.D + if (SRC_GLOBAL) + set_global_register(src_code, (int32_t)(int8_t)READ_B(dreg + extra_s)); + else + m_local_regs[src_code] = (int32_t)(int8_t)READ_B(dreg + extra_s); + break; - case 2: - if (SRC_GLOBAL) - { - if (extra_s & 1) // LDHS.A - set_global_register(src_code, (int32_t)(int16_t)READ_HW(extra_s)); - else // LDHU.A - set_global_register(src_code, READ_HW(extra_s)); - } - else - { - if (extra_s & 1) // LDHS.A - m_local_regs[src_code] = (int32_t)(int16_t)READ_HW(extra_s); - else // LDHU.A - m_local_regs[src_code] = READ_HW(extra_s); - } - break; + case 1: // LDBU.D + if (SRC_GLOBAL) + set_global_register(src_code, READ_B(dreg + extra_s)); + else + m_local_regs[src_code] = READ_B(dreg + extra_s); + break; - case 3: - switch (extra_s & 3) - { - case 0: // LDW.A - if (SRC_GLOBAL) - set_global_register(src_code, READ_W(extra_s)); - else - m_local_regs[src_code] = READ_W(extra_s); - break; - case 1: // LDD.A - if (SRC_GLOBAL) - { - set_global_register(src_code, READ_W(extra_s)); - set_global_register(srcf_code, READ_W(extra_s + 4)); - } - else - { - m_local_regs[src_code] = READ_W(extra_s); - m_local_regs[srcf_code] = READ_W(extra_s + 4); - } - m_icount -= m_clock_cycles_1; // extra cycle - break; - case 2: // LDW.IOA - if (SRC_GLOBAL) - set_global_register(src_code, IO_READ_W(extra_s)); - else - m_local_regs[src_code] = IO_READ_W(extra_s); - break; - case 3: // LDD.IOA - if (SRC_GLOBAL) - { - set_global_register(src_code, IO_READ_W(extra_s)); - set_global_register(srcf_code, IO_READ_W(extra_s + 4)); - } - else - { - m_local_regs[src_code] = IO_READ_W(extra_s); - m_local_regs[srcf_code] = IO_READ_W(extra_s + 4); - } - m_icount -= m_clock_cycles_1; // extra cycle - break; - } - break; - } - } - else - { - const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code]; - switch (sub_type) - { - case 0: // LDBS.D - if (SRC_GLOBAL) - set_global_register(src_code, (int32_t)(int8_t)READ_B(dreg + extra_s)); + case 2: + if (SRC_GLOBAL) + { + if (extra_s & 1) + set_global_register(src_code, (int32_t)(int16_t)READ_HW(dreg + (extra_s & ~1))); else - m_local_regs[src_code] = (int32_t)(int8_t)READ_B(dreg + extra_s); - break; - - case 1: // LDBU.D - if (SRC_GLOBAL) - set_global_register(src_code, READ_B(dreg + extra_s)); + set_global_register(src_code, READ_HW(dreg + (extra_s & ~1))); + } + else + { + if (extra_s & 1) + m_local_regs[src_code] = (int32_t)(int16_t)READ_HW(dreg + (extra_s & ~1)); else - m_local_regs[src_code] = READ_B(dreg + extra_s); - break; + m_local_regs[src_code] = READ_HW(dreg + (extra_s & ~1)); + } + break; - case 2: - if (SRC_GLOBAL) - { - if (extra_s & 1) - set_global_register(src_code, (int32_t)(int16_t)READ_HW(dreg + (extra_s & ~1))); + case 3: + switch (extra_s & 3) + { + case 0: // LDW.D + if (SRC_GLOBAL) + set_global_register(src_code, READ_W(dreg + extra_s)); else - set_global_register(src_code, READ_HW(dreg + (extra_s & ~1))); - } - else - { - if (extra_s & 1) - m_local_regs[src_code] = (int32_t)(int16_t)READ_HW(dreg + (extra_s & ~1)); + m_local_regs[src_code] = READ_W(dreg + extra_s); + break; + case 1: // LDD.D + if (SRC_GLOBAL) + { + set_global_register(src_code, READ_W(dreg + (extra_s & ~1))); + set_global_register(srcf_code, READ_W(dreg + (extra_s & ~1) + 4)); + } else - m_local_regs[src_code] = READ_HW(dreg + (extra_s & ~1)); - } - break; - - case 3: - switch (extra_s & 3) - { - case 0: // LDW.D - if (SRC_GLOBAL) - set_global_register(src_code, READ_W(dreg + extra_s)); - else - m_local_regs[src_code] = READ_W(dreg + extra_s); - break; - case 1: // LDD.D - if (SRC_GLOBAL) - { - set_global_register(src_code, READ_W(dreg + (extra_s & ~1))); - set_global_register(srcf_code, READ_W(dreg + (extra_s & ~1) + 4)); - } - else - { - m_local_regs[src_code] = READ_W(dreg + (extra_s & ~1)); - m_local_regs[srcf_code] = READ_W(dreg + (extra_s & ~1) + 4); - } - m_icount -= m_clock_cycles_1; // extra cycle - break; - case 2: // LDW.IOD - if (SRC_GLOBAL) - set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3))); - else - m_local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3)); - break; - case 3: // LDD.IOD - if (SRC_GLOBAL) - { - set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3))); - set_global_register(srcf_code, IO_READ_W(dreg + (extra_s & ~3) + 4)); - } - else - { - m_local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3)); - m_local_regs[srcf_code] = IO_READ_W(dreg + (extra_s & ~3) + 4); - } - m_icount -= m_clock_cycles_1; // extra cycle - break; - } - break; - } + { + m_local_regs[src_code] = READ_W(dreg + (extra_s & ~1)); + m_local_regs[srcf_code] = READ_W(dreg + (extra_s & ~1) + 4); + } + m_icount -= m_clock_cycles_1; // extra cycle + break; + case 2: // LDW.IOD + if (SRC_GLOBAL) + set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3))); + else + m_local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3)); + break; + case 3: // LDD.IOD + if (SRC_GLOBAL) + { + set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3))); + set_global_register(srcf_code, IO_READ_W(dreg + (extra_s & ~3) + 4)); + } + else + { + m_local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3)); + m_local_regs[srcf_code] = IO_READ_W(dreg + (extra_s & ~3) + 4); + } + m_icount -= m_clock_cycles_1; // extra cycle + break; + } + break; } m_icount -= m_clock_cycles_1; @@ -1899,110 +1847,56 @@ void hyperstone_device::hyperstone_stxx1() const uint32_t fp = GET_FP; const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f); const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f); - const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code]; + const uint32_t dreg = ((DST_GLOBAL && dst_code == SR_REGISTER) ? 0 : (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code]); const uint32_t sreg = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[src_code]); - if (DST_GLOBAL && dst_code == SR_REGISTER) + switch (sub_type) { - switch (sub_type) - { - case 0: // STBS.A - // TODO: missing trap on range error - WRITE_B(extra_s, (uint8_t)sreg); - break; - - case 1: // STBU.A - WRITE_B(extra_s, (uint8_t)sreg); - break; - - case 2: // STHS.A, STHU.A - WRITE_HW(extra_s, (uint16_t)sreg); - // TODO: missing trap on range error with STHS.A - break; - - case 3: - switch (extra_s & 3) + case 0: // STBS.D + // TODO: missing trap on range error + WRITE_B(dreg + extra_s, (uint8_t)sreg); + break; + + case 1: // STBU.D + WRITE_B(dreg + extra_s, (uint8_t)sreg); + break; + + case 2: // STHS.D, STHU.D + WRITE_HW(dreg + (extra_s & ~1), (uint16_t)sreg); + // TODO: missing trap on range error with STHS.D + break; + + case 3: + switch (extra_s & 3) + { + case 0: // STW.D + WRITE_W(dreg + (extra_s & ~1), sreg); + break; + case 1: // STD.D { - case 0: // STW.A - WRITE_W(extra_s & ~1, sreg); - break; - case 1: // STD.A - { - const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); - const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); - extra_s &= ~1; - WRITE_W(extra_s, sreg); - WRITE_W(extra_s + 4, sregf); - m_icount -= m_clock_cycles_1; // extra cycle - break; - } - case 2: // STW.IOA - IO_WRITE_W(extra_s & ~3, sreg); - break; - case 3: // STD.IOA - { - const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); - const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); - extra_s &= ~3; - IO_WRITE_W(extra_s, sreg); - IO_WRITE_W(extra_s + 4, sregf); - m_icount -= m_clock_cycles_1; // extra cycle - break; - } + const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); + const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); + extra_s &= ~1; + WRITE_W(dreg + extra_s, sreg); + WRITE_W(dreg + extra_s + 4, sregf); + m_icount -= m_clock_cycles_1; // extra cycle + break; } - break; - } - } - else - { - switch (sub_type) - { - case 0: // STBS.D - // TODO: missing trap on range error - WRITE_B(dreg + extra_s, (uint8_t)sreg); - break; - - case 1: // STBU.D - WRITE_B(dreg + extra_s, (uint8_t)sreg); - break; - - case 2: // STHS.D, STHU.D - WRITE_HW(dreg + (extra_s & ~1), (uint16_t)sreg); - // TODO: missing trap on range error with STHS.D - break; - - case 3: - switch (extra_s & 3) + case 2: // STW.IOD + IO_WRITE_W(dreg + (extra_s & ~3), sreg); + break; + case 3: // STD.IOD { - case 0: // STW.D - WRITE_W(dreg + (extra_s & ~1), sreg); - break; - case 1: // STD.D - { - const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); - const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); - extra_s &= ~1; - WRITE_W(dreg + extra_s, sreg); - WRITE_W(dreg + extra_s + 4, sregf); - m_icount -= m_clock_cycles_1; // extra cycle - break; - } - case 2: // STW.IOD - IO_WRITE_W(dreg + (extra_s & ~3), sreg); - break; - case 3: // STD.IOD - { - const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); - const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); - extra_s &= ~3; - IO_WRITE_W(dreg + extra_s, sreg); - IO_WRITE_W(dreg + extra_s + 4, sregf); - m_icount -= m_clock_cycles_1; // extra cycle - break; - } + const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); + const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); + extra_s &= ~3; + IO_WRITE_W(dreg + extra_s, sreg); + IO_WRITE_W(dreg + extra_s + 4, sregf); + m_icount -= m_clock_cycles_1; // extra cycle + break; } - break; - } + } + break; } m_icount -= m_clock_cycles_1; @@ -2129,15 +2023,15 @@ void hyperstone_device::hyperstone_shri() val >>= n; + if (val == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(val); + if (DST_GLOBAL) set_global_register(dst_code, val); else m_local_regs[dst_code] = val; - if (val == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(val); - m_icount -= m_clock_cycles_1; } @@ -2163,15 +2057,15 @@ void hyperstone_device::hyperstone_sari() val |= 0xffffffff << (32 - n); } + if (val == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(val); + if (DST_GLOBAL) set_global_register(dst_code, val); else m_local_regs[dst_code] = val; - if (val == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(val); - m_icount -= m_clock_cycles_1; } @@ -2192,15 +2086,15 @@ void hyperstone_device::hyperstone_shli() if (((val & mask) && (!(val2 & 0x80000000))) || (((val & mask) ^ mask) && (val2 & 0x80000000))) SR |= V_MASK; + if (val2 == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(val2); + if (DST_GLOBAL) set_global_register(dst_code, val2); else m_local_regs[dst_code] = val2; - if (val2 == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(val2); - m_icount -= m_clock_cycles_1; } @@ -2226,14 +2120,14 @@ void hyperstone_device::hyperstone_mulsu() const uint32_t high_order = (uint32_t)(double_word >> 32); - (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = high_order; - (DST_GLOBAL ? m_global_regs : m_local_regs)[dstf_code] = (uint32_t)double_word; - SR &= ~(Z_MASK | N_MASK); if (double_word == 0) SR |= Z_MASK; SR |= SIGN_TO_N(high_order); + (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = high_order; + (DST_GLOBAL ? m_global_regs : m_local_regs)[dstf_code] = (uint32_t)double_word; + if(SIGNED == IS_SIGNED && (sreg >= 0xffff8000 && sreg <= 0x7fff) && (dreg >= 0xffff8000 && dreg <= 0x7fff)) m_icount -= m_clock_cycles_4; else if(SIGNED == IS_UNSIGNED && sreg <= 0xffff && dreg <= 0xffff) @@ -2321,13 +2215,13 @@ void hyperstone_device::hyperstone_mul() const uint32_t sreg = (SRC_GLOBAL ? m_global_regs : m_local_regs)[src_code]; const uint32_t result = sreg * dreg; - (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = result; - SR &= ~(Z_MASK | N_MASK); if (result == 0) SR |= Z_MASK; SR |= SIGN_TO_N(result); + (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = result; + if ((sreg >= 0xffff8000 && sreg <= 0x7fff) && (dreg >= 0xffff8000 && dreg <= 0x7fff)) m_icount -= 3 << m_clck_scale; else @@ -2504,7 +2398,7 @@ void hyperstone_device::hyperstone_lddr() } template <hyperstone_device::reg_bank SRC_GLOBAL> -void hyperstone_device::hypesrtone_ldwp() +void hyperstone_device::hyperstone_ldwp() { check_delay_PC(); @@ -2636,228 +2530,41 @@ void hyperstone_device::hyperstone_stdp() m_icount -= m_clock_cycles_2; } -void hyperstone_device::hyperstone_dbv() -{ - if (SR & V_MASK) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbnv() +template <hyperstone_device::branch_condition CONDITION, hyperstone_device::condition_set COND_SET> +void hyperstone_device::hyperstone_db() { - if (SR & V_MASK) + static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK }; + if (COND_SET) { - ignore_pcrel(); - check_delay_PC(); - } - else - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbe() -{ - if (SR & Z_MASK) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbne() -{ - if (SR & Z_MASK) - { - ignore_pcrel(); - check_delay_PC(); - } - else - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbc() -{ - if (SR & C_MASK) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbnc() -{ - if (SR & C_MASK) - { - ignore_pcrel(); - check_delay_PC(); - } - else - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbse() -{ - if (SR & (C_MASK | Z_MASK)) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbht() -{ - if (SR & (C_MASK | Z_MASK)) - { - ignore_pcrel(); - check_delay_PC(); - } - else - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbn() -{ - if (SR & N_MASK) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbnn() -{ - if (SR & N_MASK) - { - ignore_pcrel(); - check_delay_PC(); - } - else - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dble() -{ - if (SR & (N_MASK | Z_MASK)) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbgt() -{ - if (SR & (N_MASK | Z_MASK)) - { - ignore_pcrel(); - check_delay_PC(); + if (SR & condition_masks[CONDITION]) + { + const int32_t offset = decode_pcrel(); + check_delay_PC(); + m_delay_slot = 1; + m_delay_pc = PC + offset; + m_intblock = 3; + } + else + { + ignore_pcrel(); + check_delay_PC(); + } } else { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; + if (SR & condition_masks[CONDITION]) + { + ignore_pcrel(); + check_delay_PC(); + } + else + { + const int32_t offset = decode_pcrel(); + check_delay_PC(); + m_delay_slot = 1; + m_delay_pc = PC + offset; + m_intblock = 3; + } } m_icount -= m_clock_cycles_1; @@ -2868,7 +2575,7 @@ void hyperstone_device::hyperstone_dbr() const int32_t offset = decode_pcrel(); check_delay_PC(); - m_delay_slot = true; + m_delay_slot = 1; m_delay_pc = PC + offset; m_intblock = 3; } @@ -2904,8 +2611,7 @@ void hyperstone_device::hyperstone_frame() if (tmp_flag) { - uint32_t addr = get_trap_addr(TRAPNO_FRAME_ERROR); - execute_exception(addr); + execute_exception(get_trap_addr(TRAPNO_FRAME_ERROR)); } } @@ -2913,14 +2619,15 @@ void hyperstone_device::hyperstone_frame() m_icount -= m_clock_cycles_1; } -void hyperstone_device::hyperstone_call_global() +template <hyperstone_device::reg_bank SRC_GLOBAL> +void hyperstone_device::hyperstone_call() { uint16_t imm_1 = READ_OP(PC); PC += 2; int32_t extra_s = 0; - if (E_BIT(imm_1)) + if (imm_1 & 0x8000) { uint16_t imm_2 = READ_OP(PC); @@ -2930,7 +2637,7 @@ void hyperstone_device::hyperstone_call_global() extra_s = imm_2; extra_s |= ((imm_1 & 0x3fff) << 16); - if (S_BIT_CONST(imm_1)) + if (imm_1 & 0x4000) extra_s |= 0xc0000000; } else @@ -2939,24 +2646,21 @@ void hyperstone_device::hyperstone_call_global() SET_ILC(2<<19); - if (S_BIT_CONST(imm_1)) + if (imm_1 & 0x4000) extra_s |= 0xffffc000; } check_delay_PC(); - uint32_t src_code = SRC_CODE; + uint32_t fp = GET_FP; + uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f); uint32_t dst_code = DST_CODE; - uint32_t sreg = m_global_regs[src_code]; - - if (src_code == SR_REGISTER) - sreg = 0; + uint32_t sreg = (SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[src_code]; if (!DST_CODE) dst_code = 16; - uint32_t fp = GET_FP; uint32_t dreg_index = dst_code + fp; m_local_regs[dreg_index & 0x3f] = (PC & ~1) | GET_S; m_local_regs[(dreg_index + 1) & 0x3f] = SR; @@ -2975,231 +2679,34 @@ void hyperstone_device::hyperstone_call_global() m_icount -= m_clock_cycles_1; } -void hyperstone_device::hyperstone_call_local() -{ - uint16_t imm_1 = READ_OP(PC); - PC += 2; - - int32_t extra_s = 0; - - if (E_BIT(imm_1)) - { - uint16_t imm_2 = READ_OP(PC); - - PC += 2; - SET_ILC(3<<19); - - extra_s = imm_2; - extra_s |= ((imm_1 & 0x3fff) << 16); - - if (S_BIT_CONST(imm_1)) - extra_s |= 0xc0000000; - } - else - { - extra_s = imm_1 & 0x3fff; - - SET_ILC(2<<19); - - if (S_BIT_CONST(imm_1)) - extra_s |= 0xffffc000; - } - - check_delay_PC(); - - uint32_t src_code = SRC_CODE; - uint32_t dst_code = DST_CODE; - - if (!DST_CODE) - dst_code = 16; - - uint32_t fp = GET_FP; - extra_s = (extra_s & ~1) + m_local_regs[(src_code + fp) & 0x3f]; - - uint32_t dreg_index = dst_code + fp; - m_local_regs[dreg_index & 0x3f] = (PC & ~1) | GET_S; - m_local_regs[(dreg_index + 1) & 0x3f] = SR; - - SET_FP(fp + dst_code); - SET_FL(6); //default value for call - SR &= ~M_MASK; - - PC = extra_s; - - m_intblock = 2; - - //TODO: add interrupt locks, errors, .... - - //TODO: no 1! - m_icount -= m_clock_cycles_1; -} - - - -void hyperstone_device::hyperstone_bv() -{ - if (SR & V_MASK) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bnv() +template <hyperstone_device::branch_condition CONDITION, hyperstone_device::condition_set COND_SET> +void hyperstone_device::hyperstone_b() { - if (SR & V_MASK) - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } - else + static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK }; + if (COND_SET) { - execute_br(); - } -} - -void hyperstone_device::hyperstone_be() -{ - if (SR & Z_MASK) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bne() -{ - if (SR & Z_MASK) - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } - else - { - execute_br(); - } -} - -void hyperstone_device::hyperstone_bc() -{ - if (SR & C_MASK) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bnc() -{ - if (SR & C_MASK) - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } - else - { - execute_br(); - } -} - -void hyperstone_device::hyperstone_bse() -{ - if (SR & (C_MASK | Z_MASK)) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bht() -{ - if (SR & (C_MASK | Z_MASK)) - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } - else - { - execute_br(); - } -} - -void hyperstone_device::hyperstone_bn() -{ - if (SR & N_MASK) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bnn() -{ - if (SR & N_MASK) - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } - else - { - execute_br(); - } -} - -void hyperstone_device::hyperstone_ble() -{ - if (SR & (N_MASK | Z_MASK)) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bgt() -{ - if (SR & (N_MASK | Z_MASK)) - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; + if (SR & condition_masks[CONDITION]) + { + hyperstone_br(); + } + else + { + ignore_pcrel(); + check_delay_PC(); + m_icount -= m_clock_cycles_1; + } } else { - execute_br(); + if (SR & condition_masks[CONDITION]) + { + ignore_pcrel(); + check_delay_PC(); + m_icount -= m_clock_cycles_1; + } + else + { + hyperstone_br(); + } } } diff --git a/src/devices/cpu/hmcs40/hmcs40.cpp b/src/devices/cpu/hmcs40/hmcs40.cpp index a80c067aaeb..fa874022938 100644 --- a/src/devices/cpu/hmcs40/hmcs40.cpp +++ b/src/devices/cpu/hmcs40/hmcs40.cpp @@ -620,7 +620,7 @@ void hmcs40_cpu_device::execute_run() debugger_instruction_hook(this, m_pc); m_icount--; m_op = m_program->read_word(m_pc) & 0x3ff; - m_i = BITSWAP8(m_op,7,6,5,4,0,1,2,3) & 0xf; // reversed bit-order for 4-bit immediate param (except for XAMR) + m_i = bitswap<8>(m_op,7,6,5,4,0,1,2,3) & 0xf; // reversed bit-order for 4-bit immediate param (except for XAMR) increment_pc(); // handle opcode diff --git a/src/devices/cpu/hmcs40/hmcs40d.cpp b/src/devices/cpu/hmcs40/hmcs40d.cpp index 48ae33ccfaa..96e4b6399ea 100644 --- a/src/devices/cpu/hmcs40/hmcs40d.cpp +++ b/src/devices/cpu/hmcs40/hmcs40d.cpp @@ -181,7 +181,7 @@ offs_t hmcs40_disassembler::disassemble(std::ostream &stream, offs_t pc, const d // reverse bits if (bits < 0) { - param = BITSWAP8(param,0,1,2,3,4,5,6,7); + param = bitswap<8>(param,0,1,2,3,4,5,6,7); param >>= (8 + bits); bits = -bits; } diff --git a/src/devices/cpu/hmcs40/hmcs40op.cpp b/src/devices/cpu/hmcs40/hmcs40op.cpp index 2078d5e765b..1886768bc8d 100644 --- a/src/devices/cpu/hmcs40/hmcs40op.cpp +++ b/src/devices/cpu/hmcs40/hmcs40op.cpp @@ -669,13 +669,13 @@ void hmcs40_cpu_device::op_p() if (o & 0x100) { // B3 B2 B1 B0 A0 A1 A2 A3 - m_a = BITSWAP8(o,7,6,5,4,0,1,2,3) & 0xf; + m_a = bitswap<8>(o,7,6,5,4,0,1,2,3) & 0xf; m_b = o >> 4 & 0xf; } if (o & 0x200) { // R20 R21 R22 R23 R30 R31 R32 R33 - o = BITSWAP8(o,0,1,2,3,4,5,6,7); + o = bitswap<8>(o,0,1,2,3,4,5,6,7); write_r(2, o & 0xf); write_r(3, o >> 4 & 0xf); } diff --git a/src/devices/cpu/hphybrid/hphybrid.cpp b/src/devices/cpu/hphybrid/hphybrid.cpp index 9e8457b255d..f85fd4b9a06 100644 --- a/src/devices/cpu/hphybrid/hphybrid.cpp +++ b/src/devices/cpu/hphybrid/hphybrid.cpp @@ -761,7 +761,7 @@ uint16_t hp_hybrid_cpu_device::RM(uint32_t addr) return read_non_common_reg(addr_wo_bsc); } } else { - return m_direct->read_word(addr << 1); + return m_direct->read_word(addr); } } @@ -1026,8 +1026,8 @@ void hp_hybrid_cpu_device::do_pw(uint16_t opcode) WM(tmp_addr >> 1 , tmp); } else { // Extend address, form byte address - uint16_t val = (tmp_addr & 1) ? uint8_t(tmp) << 8 : uint8_t(tmp); - uint16_t mask = (tmp_addr & 1) ? 0xff00 : 0x00ff; + uint16_t val = (tmp_addr & 1) ? uint8_t(tmp) : (tmp << 8); + uint16_t mask = (tmp_addr & 1) ? 0x00ff : 0xff00; tmp_addr = add_mae(AEC_CASE_C , tmp_addr >> 1); m_program->write_word(tmp_addr , val, mask); } @@ -1125,12 +1125,12 @@ void hp_hybrid_cpu_device::handle_dma(void) uint16_t hp_hybrid_cpu_device::RIO(uint8_t pa , uint8_t ic) { - return m_io->read_word(HP_MAKE_IOADDR(pa, ic) << 1); + return m_io->read_word(HP_MAKE_IOADDR(pa, ic)); } void hp_hybrid_cpu_device::WIO(uint8_t pa , uint8_t ic , uint16_t v) { - m_io->write_word(HP_MAKE_IOADDR(pa, ic) << 1 , v); + m_io->write_word(HP_MAKE_IOADDR(pa, ic) , v); } hp_5061_3001_cpu_device::hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) diff --git a/src/devices/cpu/i386/i386.cpp b/src/devices/cpu/i386/i386.cpp index 15379c18d7b..dd6d86928e2 100644 --- a/src/devices/cpu/i386/i386.cpp +++ b/src/devices/cpu/i386/i386.cpp @@ -3788,59 +3788,59 @@ void i386_device::pentium_smi() m_smi_latched = false; // save state - WRITE32(m_cr[4], smram_state+SMRAM_IP5_CR4); - WRITE32(m_sreg[ES].limit, smram_state+SMRAM_IP5_ESLIM); - WRITE32(m_sreg[ES].base, smram_state+SMRAM_IP5_ESBASE); - WRITE32(m_sreg[ES].flags, smram_state+SMRAM_IP5_ESACC); - WRITE32(m_sreg[CS].limit, smram_state+SMRAM_IP5_CSLIM); - WRITE32(m_sreg[CS].base, smram_state+SMRAM_IP5_CSBASE); - WRITE32(m_sreg[CS].flags, smram_state+SMRAM_IP5_CSACC); - WRITE32(m_sreg[SS].limit, smram_state+SMRAM_IP5_SSLIM); - WRITE32(m_sreg[SS].base, smram_state+SMRAM_IP5_SSBASE); - WRITE32(m_sreg[SS].flags, smram_state+SMRAM_IP5_SSACC); - WRITE32(m_sreg[DS].limit, smram_state+SMRAM_IP5_DSLIM); - WRITE32(m_sreg[DS].base, smram_state+SMRAM_IP5_DSBASE); - WRITE32(m_sreg[DS].flags, smram_state+SMRAM_IP5_DSACC); - WRITE32(m_sreg[FS].limit, smram_state+SMRAM_IP5_FSLIM); - WRITE32(m_sreg[FS].base, smram_state+SMRAM_IP5_FSBASE); - WRITE32(m_sreg[FS].flags, smram_state+SMRAM_IP5_FSACC); - WRITE32(m_sreg[GS].limit, smram_state+SMRAM_IP5_GSLIM); - WRITE32(m_sreg[GS].base, smram_state+SMRAM_IP5_GSBASE); - WRITE32(m_sreg[GS].flags, smram_state+SMRAM_IP5_GSACC); - WRITE32(m_ldtr.flags, smram_state+SMRAM_IP5_LDTACC); - WRITE32(m_ldtr.limit, smram_state+SMRAM_IP5_LDTLIM); - WRITE32(m_ldtr.base, smram_state+SMRAM_IP5_LDTBASE); - WRITE32(m_gdtr.limit, smram_state+SMRAM_IP5_GDTLIM); - WRITE32(m_gdtr.base, smram_state+SMRAM_IP5_GDTBASE); - WRITE32(m_idtr.limit, smram_state+SMRAM_IP5_IDTLIM); - WRITE32(m_idtr.base, smram_state+SMRAM_IP5_IDTBASE); - WRITE32(m_task.limit, smram_state+SMRAM_IP5_TRLIM); - WRITE32(m_task.base, smram_state+SMRAM_IP5_TRBASE); - WRITE32(m_task.flags, smram_state+SMRAM_IP5_TRACC); - - WRITE32(m_sreg[ES].selector, smram_state+SMRAM_ES); - WRITE32(m_sreg[CS].selector, smram_state+SMRAM_CS); - WRITE32(m_sreg[SS].selector, smram_state+SMRAM_SS); - WRITE32(m_sreg[DS].selector, smram_state+SMRAM_DS); - WRITE32(m_sreg[FS].selector, smram_state+SMRAM_FS); - WRITE32(m_sreg[GS].selector, smram_state+SMRAM_GS); - WRITE32(m_ldtr.segment, smram_state+SMRAM_LDTR); - WRITE32(m_task.segment, smram_state+SMRAM_TR); - - WRITE32(m_dr[7], smram_state+SMRAM_DR7); - WRITE32(m_dr[6], smram_state+SMRAM_DR6); - WRITE32(REG32(EAX), smram_state+SMRAM_EAX); - WRITE32(REG32(ECX), smram_state+SMRAM_ECX); - WRITE32(REG32(EDX), smram_state+SMRAM_EDX); - WRITE32(REG32(EBX), smram_state+SMRAM_EBX); - WRITE32(REG32(ESP), smram_state+SMRAM_ESP); - WRITE32(REG32(EBP), smram_state+SMRAM_EBP); - WRITE32(REG32(ESI), smram_state+SMRAM_ESI); - WRITE32(REG32(EDI), smram_state+SMRAM_EDI); - WRITE32(m_eip, smram_state+SMRAM_EIP); - WRITE32(old_flags, smram_state+SMRAM_EFLAGS); - WRITE32(m_cr[3], smram_state+SMRAM_CR3); - WRITE32(old_cr0, smram_state+SMRAM_CR0); + WRITE32(smram_state + SMRAM_IP5_CR4, m_cr[4]); + WRITE32(smram_state + SMRAM_IP5_ESLIM, m_sreg[ES].limit); + WRITE32(smram_state + SMRAM_IP5_ESBASE, m_sreg[ES].base); + WRITE32(smram_state + SMRAM_IP5_ESACC, m_sreg[ES].flags); + WRITE32(smram_state + SMRAM_IP5_CSLIM, m_sreg[CS].limit); + WRITE32(smram_state + SMRAM_IP5_CSBASE, m_sreg[CS].base); + WRITE32(smram_state + SMRAM_IP5_CSACC, m_sreg[CS].flags); + WRITE32(smram_state + SMRAM_IP5_SSLIM, m_sreg[SS].limit); + WRITE32(smram_state + SMRAM_IP5_SSBASE, m_sreg[SS].base); + WRITE32(smram_state + SMRAM_IP5_SSACC, m_sreg[SS].flags); + WRITE32(smram_state + SMRAM_IP5_DSLIM, m_sreg[DS].limit); + WRITE32(smram_state + SMRAM_IP5_DSBASE, m_sreg[DS].base); + WRITE32(smram_state + SMRAM_IP5_DSACC, m_sreg[DS].flags); + WRITE32(smram_state + SMRAM_IP5_FSLIM, m_sreg[FS].limit); + WRITE32(smram_state + SMRAM_IP5_FSBASE, m_sreg[FS].base); + WRITE32(smram_state + SMRAM_IP5_FSACC, m_sreg[FS].flags); + WRITE32(smram_state + SMRAM_IP5_GSLIM, m_sreg[GS].limit); + WRITE32(smram_state + SMRAM_IP5_GSBASE, m_sreg[GS].base); + WRITE32(smram_state + SMRAM_IP5_GSACC, m_sreg[GS].flags); + WRITE32(smram_state + SMRAM_IP5_LDTACC, m_ldtr.flags); + WRITE32(smram_state + SMRAM_IP5_LDTLIM, m_ldtr.limit); + WRITE32(smram_state + SMRAM_IP5_LDTBASE, m_ldtr.base); + WRITE32(smram_state + SMRAM_IP5_GDTLIM, m_gdtr.limit); + WRITE32(smram_state + SMRAM_IP5_GDTBASE, m_gdtr.base); + WRITE32(smram_state + SMRAM_IP5_IDTLIM, m_idtr.limit); + WRITE32(smram_state + SMRAM_IP5_IDTBASE, m_idtr.base); + WRITE32(smram_state + SMRAM_IP5_TRLIM, m_task.limit); + WRITE32(smram_state + SMRAM_IP5_TRBASE, m_task.base); + WRITE32(smram_state + SMRAM_IP5_TRACC, m_task.flags); + + WRITE32(smram_state + SMRAM_ES, m_sreg[ES].selector); + WRITE32(smram_state + SMRAM_CS, m_sreg[CS].selector); + WRITE32(smram_state + SMRAM_SS, m_sreg[SS].selector); + WRITE32(smram_state + SMRAM_DS, m_sreg[DS].selector); + WRITE32(smram_state + SMRAM_FS, m_sreg[FS].selector); + WRITE32(smram_state + SMRAM_GS, m_sreg[GS].selector); + WRITE32(smram_state + SMRAM_LDTR, m_ldtr.segment); + WRITE32(smram_state + SMRAM_TR, m_task.segment); + + WRITE32(smram_state + SMRAM_DR7, m_dr[7]); + WRITE32(smram_state + SMRAM_DR6, m_dr[6]); + WRITE32(smram_state + SMRAM_EAX, REG32(EAX)); + WRITE32(smram_state + SMRAM_ECX, REG32(ECX)); + WRITE32(smram_state + SMRAM_EDX, REG32(EDX)); + WRITE32(smram_state + SMRAM_EBX, REG32(EBX)); + WRITE32(smram_state + SMRAM_ESP, REG32(ESP)); + WRITE32(smram_state + SMRAM_EBP, REG32(EBP)); + WRITE32(smram_state + SMRAM_ESI, REG32(ESI)); + WRITE32(smram_state + SMRAM_EDI, REG32(EDI)); + WRITE32(smram_state + SMRAM_EIP, m_eip); + WRITE32(smram_state + SMRAM_EFLAGS, old_flags); + WRITE32(smram_state + SMRAM_CR3, m_cr[3]); + WRITE32(smram_state + SMRAM_CR0, old_cr0); m_sreg[DS].selector = m_sreg[ES].selector = m_sreg[FS].selector = m_sreg[GS].selector = m_sreg[SS].selector = 0; m_sreg[DS].base = m_sreg[ES].base = m_sreg[FS].base = m_sreg[GS].base = m_sreg[SS].base = 0x00000000; diff --git a/src/devices/cpu/m6502/m6502.cpp b/src/devices/cpu/m6502/m6502.cpp index 2cbded54949..39975d6127b 100644 --- a/src/devices/cpu/m6502/m6502.cpp +++ b/src/devices/cpu/m6502/m6502.cpp @@ -64,6 +64,7 @@ void m6502_device::init() save_item(NAME(PC)); save_item(NAME(NPC)); + save_item(NAME(PPC)); save_item(NAME(A)); save_item(NAME(X)); save_item(NAME(Y)); diff --git a/src/devices/cpu/m68000/m68000.h b/src/devices/cpu/m68000/m68000.h index a6a885d6f54..bc14bea27dc 100644 --- a/src/devices/cpu/m68000/m68000.h +++ b/src/devices/cpu/m68000/m68000.h @@ -10,43 +10,30 @@ #define softfloat_h 1 #include "softfloat/milieu.h" #include "softfloat/softfloat.h" +extern flag floatx80_is_nan(floatx80 a); #endif /* MMU constants */ -#define MMU_ATC_ENTRIES (22) // 68851 has 64, 030 has 22 +constexpr int MMU_ATC_ENTRIES = (22); // 68851 has 64, 030 has 22 /* instruction cache constants */ -#define M68K_IC_SIZE 128 - - - - -#define m68ki_check_address_error(m68k, ADDR, WRITE_MODE, FC) \ - if((ADDR)&1) \ - { \ - m68k->aerr_address = ADDR; \ - m68k->aerr_write_mode = WRITE_MODE; \ - m68k->aerr_fc = FC; \ - throw 10; \ - } - - +constexpr int M68K_IC_SIZE = 128; /* There are 7 levels of interrupt to the 68K. * A transition from < 7 to 7 will cause a non-maskable interrupt (NMI). */ -#define M68K_IRQ_NONE 0 -#define M68K_IRQ_1 1 -#define M68K_IRQ_2 2 -#define M68K_IRQ_3 3 -#define M68K_IRQ_4 4 -#define M68K_IRQ_5 5 -#define M68K_IRQ_6 6 -#define M68K_IRQ_7 7 +constexpr int M68K_IRQ_NONE = 0; +constexpr int M68K_IRQ_1 = 1; +constexpr int M68K_IRQ_2 = 2; +constexpr int M68K_IRQ_3 = 3; +constexpr int M68K_IRQ_4 = 4; +constexpr int M68K_IRQ_5 = 5; +constexpr int M68K_IRQ_6 = 6; +constexpr int M68K_IRQ_7 = 7; // special input lines -#define M68K_LINE_BUSERROR 16 +constexpr int M68K_LINE_BUSERROR = 16; /* CPU types for use in m68k_set_cpu_type() */ enum @@ -78,9 +65,9 @@ enum }; /* HMMU enable types for use with m68k_set_hmmu_enable() */ -#define M68K_HMMU_DISABLE 0 /* no translation */ -#define M68K_HMMU_ENABLE_II 1 /* Mac II style fixed translation */ -#define M68K_HMMU_ENABLE_LC 2 /* Mac LC style fixed translation */ +constexpr int M68K_HMMU_DISABLE = 0; /* no translation */ +constexpr int M68K_HMMU_ENABLE_II = 1; /* Mac II style fixed translation */ +constexpr int M68K_HMMU_ENABLE_LC = 2; /* Mac LC style fixed translation */ /* Special interrupt acknowledge values. * Use these as special returns from the interrupt acknowledge callback @@ -91,30 +78,25 @@ enum * This happens in a real 68K if VPA or AVEC is asserted during an interrupt * acknowledge cycle instead of DTACK. */ -#define M68K_INT_ACK_AUTOVECTOR 0xffffffff +constexpr uint32_t M68K_INT_ACK_AUTOVECTOR = 0xffffffff; /* Causes the spurious interrupt vector (0x18) to be taken * This happens in a real 68K if BERR is asserted during the interrupt * acknowledge cycle (i.e. no devices responded to the acknowledge). */ -#define M68K_INT_ACK_SPURIOUS 0xfffffffe +constexpr uint32_t M68K_INT_ACK_SPURIOUS = 0xfffffffe; enum { /* NOTE: M68K_SP fetches the current SP, be it USP, ISP, or MSP */ M68K_PC = STATE_GENPC, M68K_SP = 1, M68K_ISP, M68K_USP, M68K_MSP, M68K_SR, M68K_VBR, - M68K_SFC, M68K_DFC, M68K_CACR, M68K_CAAR, M68K_PREF_ADDR, M68K_PREF_DATA, + M68K_SFC, M68K_DFC, M68K_CACR, M68K_CAAR, M68K_IR, M68K_PREF_ADDR, M68K_PREF_DATA, M68K_D0, M68K_D1, M68K_D2, M68K_D3, M68K_D4, M68K_D5, M68K_D6, M68K_D7, M68K_A0, M68K_A1, M68K_A2, M68K_A3, M68K_A4, M68K_A5, M68K_A6, M68K_A7, M68K_FP0, M68K_FP1, M68K_FP2, M68K_FP3, M68K_FP4, M68K_FP5, M68K_FP6, M68K_FP7, M68K_FPSR, M68K_FPCR }; -class m68000_base_device; - - -extern const device_type M68K; - class m68000_base_device : public cpu_device { public: @@ -122,6 +104,7 @@ public: // construction/destruction m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +protected: void presave(); void postload(); @@ -150,6 +133,7 @@ public: void define_state(void); +public: void set_reset_callback(write_line_delegate callback); void set_cmpild_callback(write32_delegate callback); void set_rte_callback(write_line_delegate callback); @@ -157,8 +141,6 @@ public: uint16_t get_fc(); void set_hmmu_enable(int enable); void set_fpu_enable(int enable); - int get_fpu_enable(); - void set_instruction_hook(read32_delegate ihook); void set_buserror_details(uint32_t fault_addr, uint8_t rw, uint8_t fc); protected: @@ -168,91 +150,89 @@ protected: m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map); -private: - int has_fpu; /* Indicates if a FPU is available (yes on 030, 040, may be on 020) */ -public: - - - uint32_t cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */ -// uint32_t dasm_type; /* disassembly type */ - uint32_t dar[16]; /* Data and Address Registers */ - uint32_t ppc; /* Previous program counter */ - uint32_t pc; /* Program Counter */ - uint32_t sp[7]; /* User, Interrupt, and Master Stack Pointers */ - uint32_t vbr; /* Vector Base Register (m68010+) */ - uint32_t sfc; /* Source Function Code Register (m68010+) */ - uint32_t dfc; /* Destination Function Code Register (m68010+) */ - uint32_t cacr; /* Cache Control Register (m68020, unemulated) */ - uint32_t caar; /* Cache Address Register (m68020, unemulated) */ - uint32_t ir; /* Instruction Register */ - floatx80 fpr[8]; /* FPU Data Register (m68030/040) */ - uint32_t fpiar; /* FPU Instruction Address Register (m68040) */ - uint32_t fpsr; /* FPU Status Register (m68040) */ - uint32_t fpcr; /* FPU Control Register (m68040) */ - uint32_t t1_flag; /* Trace 1 */ - uint32_t t0_flag; /* Trace 0 */ - uint32_t s_flag; /* Supervisor */ - uint32_t m_flag; /* Master/Interrupt state */ - uint32_t x_flag; /* Extend */ - uint32_t n_flag; /* Negative */ - uint32_t not_z_flag; /* Zero, inverted for speedups */ - uint32_t v_flag; /* Overflow */ - uint32_t c_flag; /* Carry */ - uint32_t int_mask; /* I0-I2 */ - uint32_t int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */ - uint32_t stopped; /* Stopped state */ - uint32_t pref_addr; /* Last prefetch address */ - uint32_t pref_data; /* Data in the prefetch queue */ - uint32_t sr_mask; /* Implemented status register bits */ - uint32_t instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */ - uint32_t run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */ - int has_pmmu; /* Indicates if a PMMU available (yes on 030, 040, no on EC030) */ - int has_hmmu; /* Indicates if an Apple HMMU is available in place of the 68851 (020 only) */ - int pmmu_enabled; /* Indicates if the PMMU is enabled */ - int hmmu_enabled; /* Indicates if the HMMU is enabled */ - int fpu_just_reset; /* Indicates the FPU was just reset */ + int m_has_fpu; /* Indicates if a FPU is available (yes on 030, 040, may be on 020) */ + + + uint32_t m_cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */ +// + uint32_t m_dar[16]; /* Data and Address Registers */ + uint32_t m_ppc; /* Previous program counter */ + uint32_t m_pc; /* Program Counter */ + uint32_t m_sp[7]; /* User, Interrupt, and Master Stack Pointers */ + uint32_t m_vbr; /* Vector Base Register (m68010+) */ + uint32_t m_sfc; /* Source Function Code Register (m68010+) */ + uint32_t m_dfc; /* Destination Function Code Register (m68010+) */ + uint32_t m_cacr; /* Cache Control Register (m68020, unemulated) */ + uint32_t m_caar; /* Cache Address Register (m68020, unemulated) */ + uint32_t m_ir; /* Instruction Register */ + floatx80 m_fpr[8]; /* FPU Data Register (m68030/040) */ + uint32_t m_fpiar; /* FPU Instruction Address Register (m68040) */ + uint32_t m_fpsr; /* FPU Status Register (m68040) */ + uint32_t m_fpcr; /* FPU Control Register (m68040) */ + uint32_t m_t1_flag; /* Trace 1 */ + uint32_t m_t0_flag; /* Trace 0 */ + uint32_t m_s_flag; /* Supervisor */ + uint32_t m_m_flag; /* Master/Interrupt state */ + uint32_t m_x_flag; /* Extend */ + uint32_t m_n_flag; /* Negative */ + uint32_t m_not_z_flag; /* Zero, inverted for speedups */ + uint32_t m_v_flag; /* Overflow */ + uint32_t m_c_flag; /* Carry */ + uint32_t m_int_mask; /* I0-I2 */ + uint32_t m_int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */ + uint32_t m_stopped; /* Stopped state */ + uint32_t m_pref_addr; /* Last prefetch address */ + uint32_t m_pref_data; /* Data in the prefetch queue */ + uint32_t m_sr_mask; /* Implemented status register bits */ + uint32_t m_instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */ + uint32_t m_run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */ + int m_has_pmmu; /* Indicates if a PMMU available (yes on 030, 040, no on EC030) */ + int m_has_hmmu; /* Indicates if an Apple HMMU is available in place of the 68851 (020 only) */ + int m_pmmu_enabled; /* Indicates if the PMMU is enabled */ + int m_hmmu_enabled; /* Indicates if the HMMU is enabled */ + int m_fpu_just_reset; /* Indicates the FPU was just reset */ /* Clocks required for instructions / exceptions */ - uint32_t cyc_bcc_notake_b; - uint32_t cyc_bcc_notake_w; - uint32_t cyc_dbcc_f_noexp; - uint32_t cyc_dbcc_f_exp; - uint32_t cyc_scc_r_true; - uint32_t cyc_movem_w; - uint32_t cyc_movem_l; - uint32_t cyc_shift; - uint32_t cyc_reset; - - int initial_cycles; - int remaining_cycles; /* Number of clocks remaining */ - int reset_cycles; - uint32_t tracing; + uint32_t m_cyc_bcc_notake_b; + uint32_t m_cyc_bcc_notake_w; + uint32_t m_cyc_dbcc_f_noexp; + uint32_t m_cyc_dbcc_f_exp; + uint32_t m_cyc_scc_r_true; + uint32_t m_cyc_movem_w; + uint32_t m_cyc_movem_l; + uint32_t m_cyc_shift; + uint32_t m_cyc_reset; + + int m_initial_cycles; + int m_remaining_cycles; /* Number of clocks remaining */ + int m_reset_cycles; + uint32_t m_tracing; int m_address_error; - uint32_t aerr_address; - uint32_t aerr_write_mode; - uint32_t aerr_fc; + uint32_t m_aerr_address; + uint32_t m_aerr_write_mode; + uint32_t m_aerr_fc; /* Virtual IRQ lines state */ - uint32_t virq_state; - uint32_t nmi_pending; + uint32_t m_virq_state; + uint32_t m_nmi_pending; - void (**jump_table)(m68000_base_device *m68k); - const uint8_t* cyc_instruction; - const uint8_t* cyc_exception; + void (m68000_base_device::**m_jump_table)(); + const uint8_t* m_cyc_instruction; + const uint8_t* m_cyc_exception; /* Callbacks to host */ - device_irq_acknowledge_delegate int_ack_callback; /* Interrupt Acknowledge */ - write32_delegate bkpt_ack_callback; /* Breakpoint Acknowledge */ - write_line_delegate reset_instr_callback; /* Called when a RESET instruction is encountered */ - write32_delegate cmpild_instr_callback; /* Called when a CMPI.L #v, Dn instruction is encountered */ - write_line_delegate rte_instr_callback; /* Called when a RTE instruction is encountered */ - write8_delegate tas_write_callback; /* Called instead of normal write8 by the TAS instruction, + device_irq_acknowledge_delegate m_int_ack_callback; /* Interrupt Acknowledge */ + write32_delegate m_bkpt_ack_callback; /* Breakpoint Acknowledge */ + write_line_delegate m_reset_instr_callback; /* Called when a RESET instruction is encountered */ + write32_delegate m_cmpild_instr_callback; /* Called when a CMPI.L #v, Dn instruction is encountered */ + write_line_delegate m_rte_instr_callback; /* Called when a RTE instruction is encountered */ + write8_delegate m_tas_write_callback; /* Called instead of normal write8 by the TAS instruction, allowing writeback to be disabled globally or selectively or other side effects to be implemented */ - address_space *program, *oprogram; + address_space *m_program, *m_oprogram; /* Redirect memory calls */ @@ -264,25 +244,21 @@ public: typedef delegate<void (offs_t, uint16_t)> m68k_write16_delegate; typedef delegate<void (offs_t, uint32_t)> m68k_write32_delegate; -// class m68k_memory_interface -// { - public: void init8(address_space &space, address_space &ospace); void init16(address_space &space, address_space &ospace); void init32(address_space &space, address_space &ospace); void init32mmu(address_space &space, address_space &ospace); void init32hmmu(address_space &space, address_space &ospace); - offs_t opcode_xor; // Address Calculation - m68k_readimm16_delegate readimm16; // Immediate read 16 bit - m68k_read8_delegate read8; - m68k_read16_delegate read16; - m68k_read32_delegate read32; - m68k_write8_delegate write8; - m68k_write16_delegate write16; - m68k_write32_delegate write32; + offs_t m_opcode_xor; // Address Calculation + m68k_readimm16_delegate m_readimm16; // Immediate read 16 bit + m68k_read8_delegate m_read8; + m68k_read16_delegate m_read16; + m68k_read32_delegate m_read32; + m68k_write8_delegate m_write8; + m68k_write16_delegate m_write16; + m68k_write32_delegate m_write32; - private: uint16_t m68008_read_immediate_16(offs_t address); uint16_t read_immediate_16(offs_t address); uint16_t simple_read_immediate_16(offs_t address); @@ -305,57 +281,47 @@ public: uint32_t readlong_d32_hmmu(offs_t address); void writelong_d32_hmmu(offs_t address, uint32_t data); -// m68000_base_device *m_cpustate; -// }; - - public: -// m68k_memory_interface memory; address_space *m_space, *m_ospace; direct_read_data<0> *m_direct, *m_odirect; - uint32_t iotemp; + uint32_t m_iotemp; /* save state data */ - uint16_t save_sr; - uint8_t save_stopped; - uint8_t save_halted; + uint16_t m_save_sr; + uint8_t m_save_stopped; + uint8_t m_save_halted; /* PMMU registers */ - uint32_t mmu_crp_aptr, mmu_crp_limit; - uint32_t mmu_srp_aptr, mmu_srp_limit; - uint32_t mmu_urp_aptr; /* 040 only */ - uint32_t mmu_tc; - uint16_t mmu_sr; - uint32_t mmu_sr_040; - uint32_t mmu_atc_tag[MMU_ATC_ENTRIES], mmu_atc_data[MMU_ATC_ENTRIES]; - uint32_t mmu_atc_rr; - uint32_t mmu_tt0, mmu_tt1; - uint32_t mmu_itt0, mmu_itt1, mmu_dtt0, mmu_dtt1; - uint32_t mmu_acr0, mmu_acr1, mmu_acr2, mmu_acr3; - uint32_t mmu_last_page_entry, mmu_last_page_entry_addr; - - uint16_t mmu_tmp_sr; /* temporary hack: status code for ptest and to handle write protection */ - uint16_t mmu_tmp_fc; /* temporary hack: function code for the mmu (moves) */ - uint16_t mmu_tmp_rw; /* temporary hack: read/write (1/0) for the mmu */ - uint32_t mmu_tmp_buserror_address; /* temporary hack: (first) bus error address */ - uint16_t mmu_tmp_buserror_occurred; /* temporary hack: flag that bus error has occurred from mmu */ - uint16_t mmu_tmp_buserror_fc; /* temporary hack: (first) bus error fc */ - uint16_t mmu_tmp_buserror_rw; /* temporary hack: (first) bus error rw */ - - uint32_t ic_address[M68K_IC_SIZE]; /* instruction cache address data */ - uint32_t ic_data[M68K_IC_SIZE]; /* instruction cache content data */ - bool ic_valid[M68K_IC_SIZE]; /* instruction cache valid flags */ + uint32_t m_mmu_crp_aptr, m_mmu_crp_limit; + uint32_t m_mmu_srp_aptr, m_mmu_srp_limit; + uint32_t m_mmu_urp_aptr; /* 040 only */ + uint32_t m_mmu_tc; + uint16_t m_mmu_sr; + uint32_t m_mmu_sr_040; + uint32_t m_mmu_atc_tag[MMU_ATC_ENTRIES], m_mmu_atc_data[MMU_ATC_ENTRIES]; + uint32_t m_mmu_atc_rr; + uint32_t m_mmu_tt0, m_mmu_tt1; + uint32_t m_mmu_itt0, m_mmu_itt1, m_mmu_dtt0, m_mmu_dtt1; + uint32_t m_mmu_acr0, m_mmu_acr1, m_mmu_acr2, m_mmu_acr3; + uint32_t m_mmu_last_page_entry, m_mmu_last_page_entry_addr; + + uint16_t m_mmu_tmp_sr; /* temporary hack: status code for ptest and to handle write protection */ + uint16_t m_mmu_tmp_fc; /* temporary hack: function code for the mmu (moves) */ + uint16_t m_mmu_tmp_rw; /* temporary hack: read/write (1/0) for the mmu */ + uint32_t m_mmu_tmp_buserror_address; /* temporary hack: (first) bus error address */ + uint16_t m_mmu_tmp_buserror_occurred; /* temporary hack: flag that bus error has occurred from mmu */ + uint16_t m_mmu_tmp_buserror_fc; /* temporary hack: (first) bus error fc */ + uint16_t m_mmu_tmp_buserror_rw; /* temporary hack: (first) bus error rw */ + + uint32_t m_ic_address[M68K_IC_SIZE]; /* instruction cache address data */ + uint32_t m_ic_data[M68K_IC_SIZE]; /* instruction cache content data */ + bool m_ic_valid[M68K_IC_SIZE]; /* instruction cache valid flags */ /* 68307 / 68340 internal address map */ - address_space *internal; - - - - /* external instruction hook (does not depend on debug mode) */ - read32_delegate instruction_hook; + address_space *m_internal; @@ -378,10 +344,18 @@ public: void init_cpu_coldfire(void); - void m68ki_exception_interrupt(m68000_base_device *m68k, uint32_t int_level); + void m68ki_exception_interrupt(uint32_t int_level); - void reset_cpu(void); - inline void cpu_execute(void); + inline void m68ki_check_address_error(uint32_t ADDR, uint32_t WRITE_MODE, uint32_t FC) + { + if((ADDR)&1) + { + m_aerr_address = ADDR; + m_aerr_write_mode = WRITE_MODE; + m_aerr_fc = FC; + throw 10; + } + } // device_state_interface overrides virtual void state_import(const device_state_entry &entry) override; @@ -390,6 +364,11 @@ public: // device_memory_interface overrides virtual bool memory_translate(int space, int intention, offs_t &address) override; + +#include "m68kcpu.h" +#include "m68kops.h" +#include "m68kfpu.hxx" +#include "m68kmmu.h" }; diff --git a/src/devices/cpu/m68000/m68k_in.cpp b/src/devices/cpu/m68000/m68k_in.cpp index 3b557865db9..08538d33443 100644 --- a/src/devices/cpu/m68000/m68k_in.cpp +++ b/src/devices/cpu/m68000/m68k_in.cpp @@ -83,6 +83,26 @@ M68KMAKE_PROTOTYPE_HEADER // license:BSD-3-Clause // copyright-holders:Karl Stenerud + +static constexpr int NUM_CPU_TYPES = 7; + +typedef void (m68000_base_device::*opcode_handler_ptr)(); +static opcode_handler_ptr m68ki_instruction_jump_table[NUM_CPU_TYPES][0x10000]; /* opcode handler jump table */ +static unsigned char m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */ + +/* This is used to generate the opcode handler jump table */ +struct opcode_handler_struct +{ + opcode_handler_ptr opcode_handler; /* handler function */ + unsigned int mask; /* mask on opcode */ + unsigned int match; /* what to match after masking */ + unsigned char cycles[NUM_CPU_TYPES]; /* cycles each cpu type takes */ +}; + +/* Build the opcode handler table */ +static void m68ki_set_one(unsigned short opcode, const opcode_handler_struct *s); +static void m68ki_build_opcode_table(void); + /* ======================================================================== */ /* ============================ OPCODE HANDLERS =========================== */ /* ======================================================================== */ @@ -92,13 +112,6 @@ M68KMAKE_PROTOTYPE_HEADER XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX M68KMAKE_PROTOTYPE_FOOTER -/* Build the opcode handler table */ -void m68ki_build_opcode_table(void); - -extern void (*m68ki_instruction_jump_table[][0x10000])(m68000_base_device *m68k); /* opcode handler jump table */ -extern unsigned char m68ki_cycles[][0x10000]; - - /* ======================================================================== */ /* ============================== END OF FILE ============================= */ /* ======================================================================== */ @@ -113,23 +126,22 @@ M68KMAKE_TABLE_HEADER /* ========================= OPCODE TABLE BUILDER ========================= */ /* ======================================================================== */ -#include "m68kops.h" +m68000_base_device::opcode_handler_ptr m68000_base_device::m68ki_instruction_jump_table[NUM_CPU_TYPES][0x10000]; /* opcode handler jump table */ +unsigned char m68000_base_device::m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */ -#define NUM_CPU_TYPES 7 - -void (*m68ki_instruction_jump_table[NUM_CPU_TYPES][0x10000])(m68000_base_device *m68k); /* opcode handler jump table */ -unsigned char m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */ +/* Build the opcode handler jump table */ -/* This is used to generate the opcode handler jump table */ -struct opcode_handler_struct +void m68000_base_device::m68ki_set_one(unsigned short opcode, const opcode_handler_struct *s) { - void (*opcode_handler)(m68000_base_device *m68k); /* handler function */ - unsigned int mask; /* mask on opcode */ - unsigned int match; /* what to match after masking */ - unsigned char cycles[NUM_CPU_TYPES]; /* cycles each cpu type takes */ -}; - + for(int i=0; i<NUM_CPU_TYPES; i++) + if(s->cycles[i] != 0xff) { + m68ki_cycles[i][opcode] = s->cycles[i]; + m68ki_instruction_jump_table[i][opcode] = s->opcode_handler; + } +} +void m68000_base_device::m68ki_build_opcode_table(void) +{ /* Opcode handler table */ static const opcode_handler_struct m68k_opcode_handler_table[] = { @@ -144,19 +156,6 @@ M68KMAKE_TABLE_FOOTER }; -/* Build the opcode handler jump table */ - -static void m68ki_set_one(unsigned short opcode, const opcode_handler_struct *s) -{ - for(int i=0; i<NUM_CPU_TYPES; i++) - if(s->cycles[i] != 0xff) { - m68ki_cycles[i][opcode] = s->cycles[i]; - m68ki_instruction_jump_table[i][opcode] = s->opcode_handler; - } -} - -void m68ki_build_opcode_table(void) -{ const opcode_handler_struct *ostruct; int i; int j; @@ -167,7 +166,7 @@ void m68ki_build_opcode_table(void) /* default to illegal */ for(k=0;k<NUM_CPU_TYPES;k++) { - m68ki_instruction_jump_table[k][i] = m68000_base_device_ops::m68k_op_illegal; + m68ki_instruction_jump_table[k][i] = &m68000_base_device::m68k_op_illegal; m68ki_cycles[k][i] = 0; } } @@ -261,11 +260,7 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX M68KMAKE_OPCODE_HANDLER_HEADER #include "emu.h" -#include "m68kcpu.h" -extern void m68040_fpu_op0(m68000_base_device *m68k); -extern void m68040_fpu_op1(m68000_base_device *m68k); -extern void m68881_mmu_ops(m68000_base_device *m68k); -extern void m68881_ftrap(m68000_base_device *m68k); +#include "m68000.h" /* ======================================================================== */ /* ========================= INSTRUCTION HANDLERS ========================= */ @@ -890,61 +885,61 @@ M68KMAKE_OPCODE_HANDLER_BODY M68KMAKE_OP(1010, 0, ., .) { - m68ki_exception_1010(mc68kcpu); + m68ki_exception_1010(); } M68KMAKE_OP(1111, 0, ., .) { - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(040fpu0, 32, ., .) { - if((mc68kcpu)->get_fpu_enable()) + if(m_has_fpu) { - m68040_fpu_op0(mc68kcpu); + m68040_fpu_op0(); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(040fpu1, 32, ., .) { - if((mc68kcpu)->get_fpu_enable()) + if(m_has_fpu) { - m68040_fpu_op1(mc68kcpu); + m68040_fpu_op1(); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(abcd, 8, rr, .) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = DY(mc68kcpu); + uint32_t* r_dst = &DX(); + uint32_t src = DY(); uint32_t dst = *r_dst; - uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(mc68kcpu); + uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(); uint32_t corf = 0; if(res > 9) corf = 6; res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); - (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */ + m_v_flag = ~res; /* Undefined V behavior */ res += corf; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (res > 0x9f) << 8; - if((mc68kcpu)->c_flag) + m_x_flag = m_c_flag = (res > 0x9f) << 8; + if(m_c_flag) res -= 0xa0; - (mc68kcpu)->v_flag &= res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_v_flag &= res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; } @@ -952,307 +947,307 @@ M68KMAKE_OP(abcd, 8, rr, .) M68KMAKE_OP(abcd, 8, mm, ax7) { - uint32_t src = OPER_AY_PD_8(mc68kcpu); - uint32_t ea = EA_A7_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); + uint32_t ea = EA_A7_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(); uint32_t corf = 0; if(res > 9) corf = 6; res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); - (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */ + m_v_flag = ~res; /* Undefined V behavior */ res += corf; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (res > 0x9f) << 8; - if((mc68kcpu)->c_flag) + m_x_flag = m_c_flag = (res > 0x9f) << 8; + if(m_c_flag) res -= 0xa0; - (mc68kcpu)->v_flag &= res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_v_flag &= res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(abcd, 8, mm, ay7) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); - uint32_t ea = EA_AX_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); + uint32_t ea = EA_AX_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(); uint32_t corf = 0; if(res > 9) corf = 6; res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); - (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */ + m_v_flag = ~res; /* Undefined V behavior */ res += corf; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (res > 0x9f) << 8; - if((mc68kcpu)->c_flag) + m_x_flag = m_c_flag = (res > 0x9f) << 8; + if(m_c_flag) res -= 0xa0; - (mc68kcpu)->v_flag &= res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_v_flag &= res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(abcd, 8, mm, axy7) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); - uint32_t ea = EA_A7_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); + uint32_t ea = EA_A7_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(); uint32_t corf = 0; if(res > 9) corf = 6; res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); - (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */ + m_v_flag = ~res; /* Undefined V behavior */ res += corf; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (res > 0x9f) << 8; - if((mc68kcpu)->c_flag) + m_x_flag = m_c_flag = (res > 0x9f) << 8; + if(m_c_flag) res -= 0xa0; - (mc68kcpu)->v_flag &= res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_v_flag &= res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(abcd, 8, mm, .) { - uint32_t src = OPER_AY_PD_8(mc68kcpu); - uint32_t ea = EA_AX_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); + uint32_t ea = EA_AX_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(); uint32_t corf = 0; if(res > 9) corf = 6; res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); - (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */ + m_v_flag = ~res; /* Undefined V behavior */ res += corf; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (res > 0x9f) << 8; - if((mc68kcpu)->c_flag) + m_x_flag = m_c_flag = (res > 0x9f) << 8; + if(m_c_flag) res -= 0xa0; - (mc68kcpu)->v_flag &= res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_v_flag &= res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(add, 8, er, d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_8(DY()); uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(add, 8, er, .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t src = M68KMAKE_GET_OPER_AY_8; uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(add, 16, er, d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_16(DY()); uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(add, 16, er, a) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_16(AY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_16(AY()); uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(add, 16, er, .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t src = M68KMAKE_GET_OPER_AY_16; uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(add, 32, er, d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = DY(mc68kcpu); + uint32_t* r_dst = &DX(); + uint32_t src = DY(); uint32_t dst = *r_dst; uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(add, 32, er, a) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = AY(mc68kcpu); + uint32_t* r_dst = &DX(); + uint32_t src = AY(); uint32_t dst = *r_dst; uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(add, 32, er, .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t src = M68KMAKE_GET_OPER_AY_32; uint32_t dst = *r_dst; uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(add, 8, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = MASK_OUT_ABOVE_8(DX(mc68kcpu)); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); + uint32_t src = MASK_OUT_ABOVE_8(DX()); + uint32_t dst = m68ki_read_8(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_8(ea, m_not_z_flag); } M68KMAKE_OP(add, 16, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = MASK_OUT_ABOVE_16(DX(mc68kcpu)); - uint32_t dst = m68ki_read_16((mc68kcpu), ea); + uint32_t src = MASK_OUT_ABOVE_16(DX()); + uint32_t dst = m68ki_read_16(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_16(ea, m_not_z_flag); } M68KMAKE_OP(add, 32, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t src = DX(mc68kcpu); - uint32_t dst = m68ki_read_32((mc68kcpu), ea); + uint32_t src = DX(); + uint32_t dst = m68ki_read_32(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - m68ki_write_32((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_32(ea, m_not_z_flag); } M68KMAKE_OP(adda, 16, ., d) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(DY(mc68kcpu))); + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(DY())); } M68KMAKE_OP(adda, 16, ., a) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(AY(mc68kcpu))); + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(AY())); } M68KMAKE_OP(adda, 16, ., .) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); uint32_t src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16); *r_dst = MASK_OUT_ABOVE_32(*r_dst + src); @@ -1261,23 +1256,23 @@ M68KMAKE_OP(adda, 16, ., .) M68KMAKE_OP(adda, 32, ., d) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst + DY(mc68kcpu)); + *r_dst = MASK_OUT_ABOVE_32(*r_dst + DY()); } M68KMAKE_OP(adda, 32, ., a) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst + AY(mc68kcpu)); + *r_dst = MASK_OUT_ABOVE_32(*r_dst + AY()); } M68KMAKE_OP(adda, 32, ., .) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); uint32_t src = M68KMAKE_GET_OPER_AY_32; *r_dst = MASK_OUT_ABOVE_32(*r_dst + src); @@ -1286,226 +1281,226 @@ M68KMAKE_OP(adda, 32, ., .) M68KMAKE_OP(addi, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = OPER_I_8(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t src = OPER_I_8(); uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(addi, 8, ., .) { - uint32_t src = OPER_I_8(mc68kcpu); + uint32_t src = OPER_I_8(); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t dst = m68ki_read_8((mc68kcpu), ea); + uint32_t dst = m68ki_read_8(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_8(ea, m_not_z_flag); } M68KMAKE_OP(addi, 16, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = OPER_I_16(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t src = OPER_I_16(); uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(addi, 16, ., .) { - uint32_t src = OPER_I_16(mc68kcpu); + uint32_t src = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t dst = m68ki_read_16((mc68kcpu), ea); + uint32_t dst = m68ki_read_16(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_16(ea, m_not_z_flag); } M68KMAKE_OP(addi, 32, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = OPER_I_32(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t src = OPER_I_32(); uint32_t dst = *r_dst; uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(addi, 32, ., .) { - uint32_t src = OPER_I_32(mc68kcpu); + uint32_t src = OPER_I_32(); uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t dst = m68ki_read_32((mc68kcpu), ea); + uint32_t dst = m68ki_read_32(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - m68ki_write_32((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_32(ea, m_not_z_flag); } M68KMAKE_OP(addq, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(addq, 8, ., .) { - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t dst = m68ki_read_8((mc68kcpu), ea); + uint32_t dst = m68ki_read_8(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_8(ea, m_not_z_flag); } M68KMAKE_OP(addq, 16, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(addq, 16, ., a) { - uint32_t* r_dst = &AY(mc68kcpu); + uint32_t* r_dst = &AY(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst + ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1); + *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((m_ir >> 9) - 1) & 7) + 1); } M68KMAKE_OP(addq, 16, ., .) { - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t dst = m68ki_read_16((mc68kcpu), ea); + uint32_t dst = m68ki_read_16(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_16(ea, m_not_z_flag); } M68KMAKE_OP(addq, 32, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t dst = *r_dst; uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(addq, 32, ., a) { - uint32_t* r_dst = &AY(mc68kcpu); + uint32_t* r_dst = &AY(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst + ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1); + *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((m_ir >> 9) - 1) & 7) + 1); } M68KMAKE_OP(addq, 32, ., .) { - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t dst = m68ki_read_32((mc68kcpu), ea); + uint32_t dst = m68ki_read_32(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - m68ki_write_32((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_32(ea, m_not_z_flag); } M68KMAKE_OP(addx, 8, rr, .) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_8(DY()); uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; } @@ -1513,17 +1508,17 @@ M68KMAKE_OP(addx, 8, rr, .) M68KMAKE_OP(addx, 16, rr, .) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_16(DY()); uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); res = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; } @@ -1531,17 +1526,17 @@ M68KMAKE_OP(addx, 16, rr, .) M68KMAKE_OP(addx, 32, rr, .) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = DY(mc68kcpu); + uint32_t* r_dst = &DX(); + uint32_t src = DY(); uint32_t dst = *r_dst; - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); res = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = res; } @@ -1549,384 +1544,384 @@ M68KMAKE_OP(addx, 32, rr, .) M68KMAKE_OP(addx, 8, mm, ax7) { - uint32_t src = OPER_AY_PD_8(mc68kcpu); - uint32_t ea = EA_A7_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); + uint32_t ea = EA_A7_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(addx, 8, mm, ay7) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); - uint32_t ea = EA_AX_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); + uint32_t ea = EA_AX_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(addx, 8, mm, axy7) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); - uint32_t ea = EA_A7_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); + uint32_t ea = EA_A7_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(addx, 8, mm, .) { - uint32_t src = OPER_AY_PD_8(mc68kcpu); - uint32_t ea = EA_AX_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); + uint32_t ea = EA_AX_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(addx, 16, mm, .) { - uint32_t src = OPER_AY_PD_16(mc68kcpu); - uint32_t ea = EA_AX_PD_16(mc68kcpu); - uint32_t dst = m68ki_read_16((mc68kcpu), ea); - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_16(); + uint32_t ea = EA_AX_PD_16(); + uint32_t dst = m68ki_read_16(ea); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); res = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); } M68KMAKE_OP(addx, 32, mm, .) { - uint32_t src = OPER_AY_PD_32(mc68kcpu); - uint32_t ea = EA_AX_PD_32(mc68kcpu); - uint32_t dst = m68ki_read_32((mc68kcpu), ea); - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_32(); + uint32_t ea = EA_AX_PD_32(); + uint32_t dst = m68ki_read_32(ea); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); res = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); } M68KMAKE_OP(and, 8, er, d) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(DX(mc68kcpu) &= (DY(mc68kcpu) | 0xffffff00)); + m_not_z_flag = MASK_OUT_ABOVE_8(DX() &= (DY() | 0xffffff00)); - (mc68kcpu)->n_flag = NFLAG_8((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(and, 8, er, .) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(DX(mc68kcpu) &= (M68KMAKE_GET_OPER_AY_8 | 0xffffff00)); + m_not_z_flag = MASK_OUT_ABOVE_8(DX() &= (M68KMAKE_GET_OPER_AY_8 | 0xffffff00)); - (mc68kcpu)->n_flag = NFLAG_8((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(and, 16, er, d) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(DX(mc68kcpu) &= (DY(mc68kcpu) | 0xffff0000)); + m_not_z_flag = MASK_OUT_ABOVE_16(DX() &= (DY() | 0xffff0000)); - (mc68kcpu)->n_flag = NFLAG_16((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(and, 16, er, .) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(DX(mc68kcpu) &= (M68KMAKE_GET_OPER_AY_16 | 0xffff0000)); + m_not_z_flag = MASK_OUT_ABOVE_16(DX() &= (M68KMAKE_GET_OPER_AY_16 | 0xffff0000)); - (mc68kcpu)->n_flag = NFLAG_16((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(and, 32, er, d) { - (mc68kcpu)->not_z_flag = DX(mc68kcpu) &= DY(mc68kcpu); + m_not_z_flag = DX() &= DY(); - (mc68kcpu)->n_flag = NFLAG_32((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(and, 32, er, .) { - (mc68kcpu)->not_z_flag = DX(mc68kcpu) &= M68KMAKE_GET_OPER_AY_32; + m_not_z_flag = DX() &= M68KMAKE_GET_OPER_AY_32; - (mc68kcpu)->n_flag = NFLAG_32((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(and, 8, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t res = DX(mc68kcpu) & m68ki_read_8((mc68kcpu), ea); + uint32_t res = DX() & m68ki_read_8(ea); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_not_z_flag = MASK_OUT_ABOVE_8(res); - m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_8(ea, m_not_z_flag); } M68KMAKE_OP(and, 16, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t res = DX(mc68kcpu) & m68ki_read_16((mc68kcpu), ea); + uint32_t res = DX() & m68ki_read_16(ea); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_not_z_flag = MASK_OUT_ABOVE_16(res); - m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_16(ea, m_not_z_flag); } M68KMAKE_OP(and, 32, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t res = DX(mc68kcpu) & m68ki_read_32((mc68kcpu), ea); + uint32_t res = DX() & m68ki_read_32(ea); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); } M68KMAKE_OP(andi, 8, ., d) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(DY(mc68kcpu) &= (OPER_I_8(mc68kcpu) | 0xffffff00)); + m_not_z_flag = MASK_OUT_ABOVE_8(DY() &= (OPER_I_8() | 0xffffff00)); - (mc68kcpu)->n_flag = NFLAG_8((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(andi, 8, ., .) { - uint32_t src = OPER_I_8(mc68kcpu); + uint32_t src = OPER_I_8(); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t res = src & m68ki_read_8((mc68kcpu), ea); + uint32_t res = src & m68ki_read_8(ea); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(andi, 16, ., d) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(DY(mc68kcpu) &= (OPER_I_16(mc68kcpu) | 0xffff0000)); + m_not_z_flag = MASK_OUT_ABOVE_16(DY() &= (OPER_I_16() | 0xffff0000)); - (mc68kcpu)->n_flag = NFLAG_16((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(andi, 16, ., .) { - uint32_t src = OPER_I_16(mc68kcpu); + uint32_t src = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t res = src & m68ki_read_16((mc68kcpu), ea); + uint32_t res = src & m68ki_read_16(ea); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); } M68KMAKE_OP(andi, 32, ., d) { - (mc68kcpu)->not_z_flag = DY(mc68kcpu) &= (OPER_I_32(mc68kcpu)); + m_not_z_flag = DY() &= (OPER_I_32()); - (mc68kcpu)->n_flag = NFLAG_32((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(andi, 32, ., .) { - uint32_t src = OPER_I_32(mc68kcpu); + uint32_t src = OPER_I_32(); uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t res = src & m68ki_read_32((mc68kcpu), ea); + uint32_t res = src & m68ki_read_32(ea); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); } M68KMAKE_OP(andi, 16, toc, .) { - m68ki_set_ccr((mc68kcpu), m68ki_get_ccr(mc68kcpu) & OPER_I_16(mc68kcpu)); + m68ki_set_ccr(m68ki_get_ccr() & OPER_I_16()); } M68KMAKE_OP(andi, 16, tos, .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t src = OPER_I_16(mc68kcpu); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_set_sr((mc68kcpu), m68ki_get_sr(mc68kcpu) & src); + uint32_t src = OPER_I_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(m68ki_get_sr() & src); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(asr, 8, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = src >> shift; if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; if(GET_MSB_8(src)) res |= m68ki_shift_8_table[shift]; *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift); + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = src << (9-shift); } M68KMAKE_OP(asr, 16, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src >> shift; if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; if(GET_MSB_16(src)) res |= m68ki_shift_16_table[shift]; *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift); + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = src << (9-shift); } M68KMAKE_OP(asr, 32, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = *r_dst; uint32_t res = src >> shift; if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; if(GET_MSB_32(src)) res |= m68ki_shift_32_table[shift]; *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift); + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = src << (9-shift); } M68KMAKE_OP(asr, 8, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = src >> shift; if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; if(shift < 8) { @@ -1935,50 +1930,50 @@ M68KMAKE_OP(asr, 8, r, .) *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = src << (9-shift); + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } if(GET_MSB_8(src)) { *r_dst |= 0xff; - (mc68kcpu)->c_flag = CFLAG_SET; - (mc68kcpu)->x_flag = XFLAG_SET; - (mc68kcpu)->n_flag = NFLAG_SET; - (mc68kcpu)->not_z_flag = ZFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_SET; + m_x_flag = XFLAG_SET; + m_n_flag = NFLAG_SET; + m_not_z_flag = ZFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; return; } *r_dst &= 0xffffff00; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->x_flag = XFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_8(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(asr, 16, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src >> shift; if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; if(shift < 16) { @@ -1987,50 +1982,50 @@ M68KMAKE_OP(asr, 16, r, .) *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = (src >> (shift - 1))<<8; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag = (src >> (shift - 1))<<8; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } if(GET_MSB_16(src)) { *r_dst |= 0xffff; - (mc68kcpu)->c_flag = CFLAG_SET; - (mc68kcpu)->x_flag = XFLAG_SET; - (mc68kcpu)->n_flag = NFLAG_SET; - (mc68kcpu)->not_z_flag = ZFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_SET; + m_x_flag = XFLAG_SET; + m_n_flag = NFLAG_SET; + m_not_z_flag = ZFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; return; } *r_dst &= 0xffff0000; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->x_flag = XFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_16(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(asr, 32, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = *r_dst; uint32_t res = src >> shift; if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; if(shift < 32) { @@ -2039,242 +2034,242 @@ M68KMAKE_OP(asr, 32, r, .) *r_dst = res; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = (src >> (shift - 1))<<8; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag = (src >> (shift - 1))<<8; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } if(GET_MSB_32(src)) { *r_dst = 0xffffffff; - (mc68kcpu)->c_flag = CFLAG_SET; - (mc68kcpu)->x_flag = XFLAG_SET; - (mc68kcpu)->n_flag = NFLAG_SET; - (mc68kcpu)->not_z_flag = ZFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_SET; + m_x_flag = XFLAG_SET; + m_n_flag = NFLAG_SET; + m_not_z_flag = ZFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; return; } *r_dst = 0; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->x_flag = XFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_32(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(asr, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); + uint32_t src = m68ki_read_16(ea); uint32_t res = src >> 1; if(GET_MSB_16(src)) res |= 0x8000; - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = src << 8; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag = src << 8; } M68KMAKE_OP(asl, 8, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = MASK_OUT_ABOVE_8(src << shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << shift; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; + m_x_flag = m_c_flag = src << shift; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; src &= m68ki_shift_8_table[shift + 1]; - (mc68kcpu)->v_flag = (!(src == 0 || (src == m68ki_shift_8_table[shift + 1] && shift < 8)))<<7; + m_v_flag = (!(src == 0 || (src == m68ki_shift_8_table[shift + 1] && shift < 8)))<<7; } M68KMAKE_OP(asl, 16, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = MASK_OUT_ABOVE_16(src << shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> (8-shift); + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_x_flag = m_c_flag = src >> (8-shift); src &= m68ki_shift_16_table[shift + 1]; - (mc68kcpu)->v_flag = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7; + m_v_flag = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7; } M68KMAKE_OP(asl, 32, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = *r_dst; uint32_t res = MASK_OUT_ABOVE_32(src << shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> (24-shift); + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_x_flag = m_c_flag = src >> (24-shift); src &= m68ki_shift_32_table[shift + 1]; - (mc68kcpu)->v_flag = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7; + m_v_flag = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7; } M68KMAKE_OP(asl, 8, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = MASK_OUT_ABOVE_8(src << shift); if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; if(shift < 8) { *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << shift; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; + m_x_flag = m_c_flag = src << shift; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; src &= m68ki_shift_8_table[shift + 1]; - (mc68kcpu)->v_flag = (!(src == 0 || src == m68ki_shift_8_table[shift + 1]))<<7; + m_v_flag = (!(src == 0 || src == m68ki_shift_8_table[shift + 1]))<<7; return; } *r_dst &= 0xffffff00; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = ((shift == 8 ? src & 1 : 0))<<8; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = (!(src == 0))<<7; + m_x_flag = m_c_flag = ((shift == 8 ? src & 1 : 0))<<8; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = (!(src == 0))<<7; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_8(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(asl, 16, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = MASK_OUT_ABOVE_16(src << shift); if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; if(shift < 16) { *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (src << shift) >> 8; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; + m_x_flag = m_c_flag = (src << shift) >> 8; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; src &= m68ki_shift_16_table[shift + 1]; - (mc68kcpu)->v_flag = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7; + m_v_flag = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7; return; } *r_dst &= 0xffff0000; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = ((shift == 16 ? src & 1 : 0))<<8; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = (!(src == 0))<<7; + m_x_flag = m_c_flag = ((shift == 16 ? src & 1 : 0))<<8; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = (!(src == 0))<<7; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_16(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(asl, 32, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = *r_dst; uint32_t res = MASK_OUT_ABOVE_32(src << shift); if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; if(shift < 32) { *r_dst = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (src >> (32 - shift)) << 8; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; + m_x_flag = m_c_flag = (src >> (32 - shift)) << 8; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; src &= m68ki_shift_32_table[shift + 1]; - (mc68kcpu)->v_flag = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7; + m_v_flag = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7; return; } *r_dst = 0; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = ((shift == 32 ? src & 1 : 0))<<8; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = (!(src == 0))<<7; + m_x_flag = m_c_flag = ((shift == 32 ? src & 1 : 0))<<8; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = (!(src == 0))<<7; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_32(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(asl, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); + uint32_t src = m68ki_read_16(ea); uint32_t res = MASK_OUT_ABOVE_16(src << 1); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> 7; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_x_flag = m_c_flag = src >> 7; src &= 0xc000; - (mc68kcpu)->v_flag = (!(src == 0 || src == 0xc000))<<7; + m_v_flag = (!(src == 0 || src == 0xc000))<<7; } @@ -2282,11 +2277,11 @@ M68KMAKE_OP(bcc, 8, ., .) { if(M68KMAKE_CC) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir)); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir)); return; } - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_bcc_notake_b; + m_remaining_cycles -= m_cyc_bcc_notake_b; } @@ -2294,51 +2289,51 @@ M68KMAKE_OP(bcc, 16, ., .) { if(M68KMAKE_CC) { - uint32_t offset = OPER_I_16(mc68kcpu); - REG_PC(mc68kcpu) -= 2; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_16((mc68kcpu), offset); + uint32_t offset = OPER_I_16(); + m_pc -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); return; } - REG_PC(mc68kcpu) += 2; - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_bcc_notake_w; + m_pc += 2; + m_remaining_cycles -= m_cyc_bcc_notake_w; } M68KMAKE_OP(bcc, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { if(M68KMAKE_CC) { - uint32_t offset = OPER_I_32(mc68kcpu); - REG_PC(mc68kcpu) -= 4; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_32((mc68kcpu), offset); + uint32_t offset = OPER_I_32(); + m_pc -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); return; } - REG_PC(mc68kcpu) += 4; + m_pc += 4; return; } else { if(M68KMAKE_CC) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir)); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir)); return; } - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_bcc_notake_b; + m_remaining_cycles -= m_cyc_bcc_notake_b; } } M68KMAKE_OP(bchg, 32, r, d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t mask = 1 << (DX(mc68kcpu) & 0x1f); + uint32_t* r_dst = &DY(); + uint32_t mask = 1 << (DX() & 0x1f); - (mc68kcpu)->not_z_flag = *r_dst & mask; + m_not_z_flag = *r_dst & mask; *r_dst ^= mask; } @@ -2346,41 +2341,41 @@ M68KMAKE_OP(bchg, 32, r, d) M68KMAKE_OP(bchg, 8, r, .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = m68ki_read_8((mc68kcpu), ea); - uint32_t mask = 1 << (DX(mc68kcpu) & 7); + uint32_t src = m68ki_read_8(ea); + uint32_t mask = 1 << (DX() & 7); - (mc68kcpu)->not_z_flag = src & mask; - m68ki_write_8((mc68kcpu), ea, src ^ mask); + m_not_z_flag = src & mask; + m68ki_write_8(ea, src ^ mask); } M68KMAKE_OP(bchg, 32, s, d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 0x1f); + uint32_t* r_dst = &DY(); + uint32_t mask = 1 << (OPER_I_8() & 0x1f); - (mc68kcpu)->not_z_flag = *r_dst & mask; + m_not_z_flag = *r_dst & mask; *r_dst ^= mask; } M68KMAKE_OP(bchg, 8, s, .) { - uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 7); + uint32_t mask = 1 << (OPER_I_8() & 7); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = m68ki_read_8((mc68kcpu), ea); + uint32_t src = m68ki_read_8(ea); - (mc68kcpu)->not_z_flag = src & mask; - m68ki_write_8((mc68kcpu), ea, src ^ mask); + m_not_z_flag = src & mask; + m68ki_write_8(ea, src ^ mask); } M68KMAKE_OP(bclr, 32, r, d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t mask = 1 << (DX(mc68kcpu) & 0x1f); + uint32_t* r_dst = &DY(); + uint32_t mask = 1 << (DX() & 0x1f); - (mc68kcpu)->not_z_flag = *r_dst & mask; + m_not_z_flag = *r_dst & mask; *r_dst &= ~mask; } @@ -2388,50 +2383,50 @@ M68KMAKE_OP(bclr, 32, r, d) M68KMAKE_OP(bclr, 8, r, .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = m68ki_read_8((mc68kcpu), ea); - uint32_t mask = 1 << (DX(mc68kcpu) & 7); + uint32_t src = m68ki_read_8(ea); + uint32_t mask = 1 << (DX() & 7); - (mc68kcpu)->not_z_flag = src & mask; - m68ki_write_8((mc68kcpu), ea, src & ~mask); + m_not_z_flag = src & mask; + m68ki_write_8(ea, src & ~mask); } M68KMAKE_OP(bclr, 32, s, d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 0x1f); + uint32_t* r_dst = &DY(); + uint32_t mask = 1 << (OPER_I_8() & 0x1f); - (mc68kcpu)->not_z_flag = *r_dst & mask; + m_not_z_flag = *r_dst & mask; *r_dst &= ~mask; } M68KMAKE_OP(bclr, 8, s, .) { - uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 7); + uint32_t mask = 1 << (OPER_I_8() & 7); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = m68ki_read_8((mc68kcpu), ea); + uint32_t src = m68ki_read_8(ea); - (mc68kcpu)->not_z_flag = src & mask; - m68ki_write_8((mc68kcpu), ea, src & ~mask); + m_not_z_flag = src & mask; + m68ki_write_8(ea, src & ~mask); } M68KMAKE_OP(bfchg, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t offset = (word2>>6)&31; uint32_t width = word2; - uint32_t* data = &DY(mc68kcpu); + uint32_t* data = &DY(); uint64_t mask; if(BIT_B(word2)) - offset = REG_D(mc68kcpu)[offset&7]; + offset = REG_D()[offset&7]; if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; offset &= 31; width = ((width-1) & 31) + 1; @@ -2439,24 +2434,24 @@ M68KMAKE_OP(bfchg, 32, ., d) mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); mask = ROR_32(mask, offset); - (mc68kcpu)->n_flag = NFLAG_32(*data<<offset); - (mc68kcpu)->not_z_flag = *data & mask; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(*data<<offset); + m_not_z_flag = *data & mask; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *data ^= mask; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfchg, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); int32_t offset = (word2>>6)&31; uint32_t width = word2; uint32_t mask_base; @@ -2468,9 +2463,9 @@ M68KMAKE_OP(bfchg, 32, ., .) if(BIT_B(word2)) - offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]); + offset = MAKE_INT_32(REG_D()[offset&7]); if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; /* Offset is signed so we have to use ugly math =( */ ea += offset / 8; @@ -2485,42 +2480,42 @@ M68KMAKE_OP(bfchg, 32, ., .) mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); mask_long = mask_base >> offset; - data_long = m68ki_read_32((mc68kcpu), ea); - (mc68kcpu)->n_flag = NFLAG_32(data_long << offset); - (mc68kcpu)->not_z_flag = data_long & mask_long; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + data_long = m68ki_read_32(ea); + m_n_flag = NFLAG_32(data_long << offset); + m_not_z_flag = data_long & mask_long; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; - m68ki_write_32((mc68kcpu), ea, data_long ^ mask_long); + m68ki_write_32(ea, data_long ^ mask_long); if((width + offset) > 32) { mask_byte = MASK_OUT_ABOVE_8(mask_base) << (8-offset); - data_byte = m68ki_read_8((mc68kcpu), ea+4); - (mc68kcpu)->not_z_flag |= (data_byte & mask_byte); - m68ki_write_8((mc68kcpu), ea+4, data_byte ^ mask_byte); + data_byte = m68ki_read_8(ea+4); + m_not_z_flag |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte ^ mask_byte); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfclr, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t offset = (word2>>6)&31; uint32_t width = word2; - uint32_t* data = &DY(mc68kcpu); + uint32_t* data = &DY(); uint64_t mask; if(BIT_B(word2)) - offset = REG_D(mc68kcpu)[offset&7]; + offset = REG_D()[offset&7]; if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; offset &= 31; @@ -2530,24 +2525,24 @@ M68KMAKE_OP(bfclr, 32, ., d) mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); mask = ROR_32(mask, offset); - (mc68kcpu)->n_flag = NFLAG_32(*data<<offset); - (mc68kcpu)->not_z_flag = *data & mask; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(*data<<offset); + m_not_z_flag = *data & mask; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *data &= ~mask; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfclr, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); int32_t offset = (word2>>6)&31; uint32_t width = word2; uint32_t mask_base; @@ -2559,9 +2554,9 @@ M68KMAKE_OP(bfclr, 32, ., .) if(BIT_B(word2)) - offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]); + offset = MAKE_INT_32(REG_D()[offset&7]); if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; /* Offset is signed so we have to use ugly math =( */ ea += offset / 8; @@ -2576,66 +2571,66 @@ M68KMAKE_OP(bfclr, 32, ., .) mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); mask_long = mask_base >> offset; - data_long = m68ki_read_32((mc68kcpu), ea); - (mc68kcpu)->n_flag = NFLAG_32(data_long << offset); - (mc68kcpu)->not_z_flag = data_long & mask_long; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + data_long = m68ki_read_32(ea); + m_n_flag = NFLAG_32(data_long << offset); + m_not_z_flag = data_long & mask_long; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; - m68ki_write_32((mc68kcpu), ea, data_long & ~mask_long); + m68ki_write_32(ea, data_long & ~mask_long); if((width + offset) > 32) { mask_byte = MASK_OUT_ABOVE_8(mask_base) << (8-offset); - data_byte = m68ki_read_8((mc68kcpu), ea+4); - (mc68kcpu)->not_z_flag |= (data_byte & mask_byte); - m68ki_write_8((mc68kcpu), ea+4, data_byte & ~mask_byte); + data_byte = m68ki_read_8(ea+4); + m_not_z_flag |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte & ~mask_byte); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfexts, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t offset = (word2>>6)&31; uint32_t width = word2; - uint64_t data = DY(mc68kcpu); + uint64_t data = DY(); if(BIT_B(word2)) - offset = REG_D(mc68kcpu)[offset&7]; + offset = REG_D()[offset&7]; if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; offset &= 31; width = ((width-1) & 31) + 1; data = ROL_32(data, offset); - (mc68kcpu)->n_flag = NFLAG_32(data); + m_n_flag = NFLAG_32(data); data = MAKE_INT_32(data) >> (32 - width); - (mc68kcpu)->not_z_flag = data; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = data; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; - REG_D(mc68kcpu)[(word2>>12)&7] = data; + REG_D()[(word2>>12)&7] = data; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfexts, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); int32_t offset = (word2>>6)&31; uint32_t width = word2; uint32_t data; @@ -2643,9 +2638,9 @@ M68KMAKE_OP(bfexts, 32, ., .) if(BIT_B(word2)) - offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]); + offset = MAKE_INT_32(REG_D()[offset&7]); if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; if(BIT_B(word2)) { @@ -2660,68 +2655,68 @@ M68KMAKE_OP(bfexts, 32, ., .) } width = ((width-1) & 31) + 1; - data = (offset+width) < 8 ? (m68ki_read_8((mc68kcpu), ea) << 24) : - (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea); + data = (offset+width) < 8 ? (m68ki_read_8(ea) << 24) : + (offset+width) < 16 ? (m68ki_read_16(ea) << 16) : m68ki_read_32(ea); data = MASK_OUT_ABOVE_32(data<<offset); if((offset+width) > 32) - data |= (m68ki_read_8((mc68kcpu), ea+4) << offset) >> 8; + data |= (m68ki_read_8(ea+4) << offset) >> 8; - (mc68kcpu)->n_flag = NFLAG_32(data); + m_n_flag = NFLAG_32(data); data = MAKE_INT_32(data) >> (32 - width); - (mc68kcpu)->not_z_flag = data; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = data; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; - REG_D(mc68kcpu)[(word2 >> 12) & 7] = data; + REG_D()[(word2 >> 12) & 7] = data; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfextu, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t offset = (word2>>6)&31; uint32_t width = word2; - uint64_t data = DY(mc68kcpu); + uint64_t data = DY(); if(BIT_B(word2)) - offset = REG_D(mc68kcpu)[offset&7]; + offset = REG_D()[offset&7]; if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; offset &= 31; width = ((width-1) & 31) + 1; data = ROL_32(data, offset); - (mc68kcpu)->n_flag = NFLAG_32(data); + m_n_flag = NFLAG_32(data); data >>= 32 - width; - (mc68kcpu)->not_z_flag = data; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = data; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; - REG_D(mc68kcpu)[(word2>>12)&7] = data; + REG_D()[(word2>>12)&7] = data; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfextu, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); int32_t offset = (word2>>6)&31; uint32_t width = word2; uint32_t data; @@ -2729,9 +2724,9 @@ M68KMAKE_OP(bfextu, 32, ., .) if(BIT_B(word2)) - offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]); + offset = MAKE_INT_32(REG_D()[offset&7]); if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; if(BIT_B(word2)) { @@ -2746,71 +2741,71 @@ M68KMAKE_OP(bfextu, 32, ., .) } width = ((width-1) & 31) + 1; - data = (offset+width) < 8 ? (m68ki_read_8((mc68kcpu), ea) << 24) : - (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea); + data = (offset+width) < 8 ? (m68ki_read_8(ea) << 24) : + (offset+width) < 16 ? (m68ki_read_16(ea) << 16) : m68ki_read_32(ea); data = MASK_OUT_ABOVE_32(data<<offset); if((offset+width) > 32) - data |= (m68ki_read_8((mc68kcpu), ea+4) << offset) >> 8; + data |= (m68ki_read_8(ea+4) << offset) >> 8; - (mc68kcpu)->n_flag = NFLAG_32(data); + m_n_flag = NFLAG_32(data); data >>= (32 - width); - (mc68kcpu)->not_z_flag = data; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = data; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; - REG_D(mc68kcpu)[(word2 >> 12) & 7] = data; + REG_D()[(word2 >> 12) & 7] = data; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfffo, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t offset = (word2>>6)&31; uint32_t width = word2; - uint64_t data = DY(mc68kcpu); + uint64_t data = DY(); uint32_t bit; if(BIT_B(word2)) - offset = REG_D(mc68kcpu)[offset&7]; + offset = REG_D()[offset&7]; if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; offset &= 31; width = ((width-1) & 31) + 1; data = ROL_32(data, offset); - (mc68kcpu)->n_flag = NFLAG_32(data); + m_n_flag = NFLAG_32(data); data >>= 32 - width; - (mc68kcpu)->not_z_flag = data; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = data; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1) offset++; - REG_D(mc68kcpu)[(word2>>12)&7] = offset; + REG_D()[(word2>>12)&7] = offset; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfffo, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); int32_t offset = (word2>>6)&31; int32_t local_offset; uint32_t width = word2; @@ -2820,9 +2815,9 @@ M68KMAKE_OP(bfffo, 32, ., .) if(BIT_B(word2)) - offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]); + offset = MAKE_INT_32(REG_D()[offset&7]); if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; /* Offset is signed so we have to use ugly math =( */ ea += offset / 8; @@ -2834,46 +2829,46 @@ M68KMAKE_OP(bfffo, 32, ., .) } width = ((width-1) & 31) + 1; - data = (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea); + data = (offset+width) < 16 ? (m68ki_read_16(ea) << 16) : m68ki_read_32(ea); data = MASK_OUT_ABOVE_32(data<<local_offset); if((local_offset+width) > 32) - data |= (m68ki_read_8((mc68kcpu), ea+4) << local_offset) >> 8; + data |= (m68ki_read_8(ea+4) << local_offset) >> 8; - (mc68kcpu)->n_flag = NFLAG_32(data); + m_n_flag = NFLAG_32(data); data >>= (32 - width); - (mc68kcpu)->not_z_flag = data; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = data; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1) offset++; - REG_D(mc68kcpu)[(word2>>12)&7] = offset; + REG_D()[(word2>>12)&7] = offset; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfins, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t offset = (word2>>6)&31; uint32_t width = word2; - uint32_t* data = &DY(mc68kcpu); + uint32_t* data = &DY(); uint64_t mask; - uint64_t insert = REG_D(mc68kcpu)[(word2>>12)&7]; + uint64_t insert = REG_D()[(word2>>12)&7]; if(BIT_B(word2)) - offset = REG_D(mc68kcpu)[offset&7]; + offset = REG_D()[offset&7]; if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; offset &= 31; @@ -2884,30 +2879,30 @@ M68KMAKE_OP(bfins, 32, ., d) mask = ROR_32(mask, offset); insert = MASK_OUT_ABOVE_32(insert << (32 - width)); - (mc68kcpu)->n_flag = NFLAG_32(insert); - (mc68kcpu)->not_z_flag = insert; + m_n_flag = NFLAG_32(insert); + m_not_z_flag = insert; insert = ROR_32(insert, offset); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *data &= ~mask; *data |= insert; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfins, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); int32_t offset = (word2>>6)&31; uint32_t width = word2; - uint32_t insert_base = REG_D(mc68kcpu)[(word2>>12)&7]; + uint32_t insert_base = REG_D()[(word2>>12)&7]; uint32_t insert_long; uint32_t insert_byte; uint32_t mask_base; @@ -2919,9 +2914,9 @@ M68KMAKE_OP(bfins, 32, ., .) if(BIT_B(word2)) - offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]); + offset = MAKE_INT_32(REG_D()[offset&7]); if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; if(BIT_B(word2)) { @@ -2940,57 +2935,57 @@ M68KMAKE_OP(bfins, 32, ., .) mask_long = mask_base >> offset; insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width)); - (mc68kcpu)->n_flag = NFLAG_32(insert_base); - (mc68kcpu)->not_z_flag = insert_base; + m_n_flag = NFLAG_32(insert_base); + m_not_z_flag = insert_base; insert_long = insert_base >> offset; - data_long = (offset+width) < 8 ? (m68ki_read_8((mc68kcpu), ea) << 24) : - (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + data_long = (offset+width) < 8 ? (m68ki_read_8(ea) << 24) : + (offset+width) < 16 ? (m68ki_read_16(ea) << 16) : m68ki_read_32(ea); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; if((width + offset) < 8) { - m68ki_write_8((mc68kcpu), ea, ((data_long & ~mask_long) | insert_long) >> 24); + m68ki_write_8(ea, ((data_long & ~mask_long) | insert_long) >> 24); } else if((width + offset) < 16) { - m68ki_write_16((mc68kcpu), ea, ((data_long & ~mask_long) | insert_long) >> 16); + m68ki_write_16(ea, ((data_long & ~mask_long) | insert_long) >> 16); } else { - m68ki_write_32((mc68kcpu), ea, (data_long & ~mask_long) | insert_long); + m68ki_write_32(ea, (data_long & ~mask_long) | insert_long); } if((width + offset) > 32) { mask_byte = MASK_OUT_ABOVE_8(mask_base) << (8-offset); insert_byte = MASK_OUT_ABOVE_8(insert_base) << (8-offset); - data_byte = m68ki_read_8((mc68kcpu), ea+4); - (mc68kcpu)->not_z_flag |= (insert_byte & mask_byte); - m68ki_write_8((mc68kcpu), ea+4, (data_byte & ~mask_byte) | insert_byte); + data_byte = m68ki_read_8(ea+4); + m_not_z_flag |= (insert_byte & mask_byte); + m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfset, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t offset = (word2>>6)&31; uint32_t width = word2; - uint32_t* data = &DY(mc68kcpu); + uint32_t* data = &DY(); uint64_t mask; if(BIT_B(word2)) - offset = REG_D(mc68kcpu)[offset&7]; + offset = REG_D()[offset&7]; if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; offset &= 31; @@ -3000,24 +2995,24 @@ M68KMAKE_OP(bfset, 32, ., d) mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); mask = ROR_32(mask, offset); - (mc68kcpu)->n_flag = NFLAG_32(*data<<offset); - (mc68kcpu)->not_z_flag = *data & mask; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(*data<<offset); + m_not_z_flag = *data & mask; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *data |= mask; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfset, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); int32_t offset = (word2>>6)&31; uint32_t width = word2; uint32_t mask_base; @@ -3028,9 +3023,9 @@ M68KMAKE_OP(bfset, 32, ., .) uint32_t ea = M68KMAKE_GET_EA_AY_8; if(BIT_B(word2)) - offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]); + offset = MAKE_INT_32(REG_D()[offset&7]); if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; /* Offset is signed so we have to use ugly math =( */ ea += offset / 8; @@ -3045,42 +3040,42 @@ M68KMAKE_OP(bfset, 32, ., .) mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); mask_long = mask_base >> offset; - data_long = m68ki_read_32((mc68kcpu), ea); - (mc68kcpu)->n_flag = NFLAG_32(data_long << offset); - (mc68kcpu)->not_z_flag = data_long & mask_long; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + data_long = m68ki_read_32(ea); + m_n_flag = NFLAG_32(data_long << offset); + m_not_z_flag = data_long & mask_long; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; - m68ki_write_32((mc68kcpu), ea, data_long | mask_long); + m68ki_write_32(ea, data_long | mask_long); if((width + offset) > 32) { mask_byte = MASK_OUT_ABOVE_8(mask_base) << (8-offset); - data_byte = m68ki_read_8((mc68kcpu), ea+4); - (mc68kcpu)->not_z_flag |= (data_byte & mask_byte); - m68ki_write_8((mc68kcpu), ea+4, data_byte | mask_byte); + data_byte = m68ki_read_8(ea+4); + m_not_z_flag |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte | mask_byte); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bftst, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t offset = (word2>>6)&31; uint32_t width = word2; - uint32_t* data = &DY(mc68kcpu); + uint32_t* data = &DY(); uint64_t mask; if(BIT_B(word2)) - offset = REG_D(mc68kcpu)[offset&7]; + offset = REG_D()[offset&7]; if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; offset &= 31; @@ -3090,22 +3085,22 @@ M68KMAKE_OP(bftst, 32, ., d) mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); mask = ROR_32(mask, offset); - (mc68kcpu)->n_flag = NFLAG_32(*data<<offset); - (mc68kcpu)->not_z_flag = *data & mask; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(*data<<offset); + m_not_z_flag = *data & mask; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bftst, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); int32_t offset = (word2>>6)&31; uint32_t width = word2; uint32_t mask_base; @@ -3116,9 +3111,9 @@ M68KMAKE_OP(bftst, 32, ., .) uint32_t ea = M68KMAKE_GET_EA_AY_8; if(BIT_B(word2)) - offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]); + offset = MAKE_INT_32(REG_D()[offset&7]); if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; /* Offset is signed so we have to use ugly math =( */ ea += offset / 8; @@ -3134,83 +3129,83 @@ M68KMAKE_OP(bftst, 32, ., .) mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); mask_long = mask_base >> offset; - data_long = m68ki_read_32((mc68kcpu), ea); - (mc68kcpu)->n_flag = ((data_long & (0x80000000 >> offset))<<offset)>>24; - (mc68kcpu)->not_z_flag = data_long & mask_long; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + data_long = m68ki_read_32(ea); + m_n_flag = ((data_long & (0x80000000 >> offset))<<offset)>>24; + m_not_z_flag = data_long & mask_long; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; if((width + offset) > 32) { mask_byte = MASK_OUT_ABOVE_8(mask_base) << (8-offset); - data_byte = m68ki_read_8((mc68kcpu), ea+4); - (mc68kcpu)->not_z_flag |= (data_byte & mask_byte); + data_byte = m68ki_read_8(ea+4); + m_not_z_flag |= (data_byte & mask_byte); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bkpt, 0, ., .) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - if (!(mc68kcpu)->bkpt_ack_callback.isnull()) - ((mc68kcpu)->bkpt_ack_callback)((*mc68kcpu->program), 0, CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type) ? (mc68kcpu)->ir & 7 : 0, 0xffffffff); + if (!m_bkpt_ack_callback.isnull()) + (m_bkpt_ack_callback)(*m_program, 0, CPU_TYPE_IS_EC020_PLUS() ? m_ir & 7 : 0, 0xffffffff); } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bra, 8, ., .) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir)); - if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0) - (mc68kcpu)->remaining_cycles = 0; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir)); + if(m_pc == m_ppc && m_remaining_cycles > 0) + m_remaining_cycles = 0; } M68KMAKE_OP(bra, 16, ., .) { - uint32_t offset = OPER_I_16(mc68kcpu); - REG_PC(mc68kcpu) -= 2; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_16((mc68kcpu), offset); - if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0) - (mc68kcpu)->remaining_cycles = 0; + uint32_t offset = OPER_I_16(); + m_pc -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + if(m_pc == m_ppc && m_remaining_cycles > 0) + m_remaining_cycles = 0; } M68KMAKE_OP(bra, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t offset = OPER_I_32(mc68kcpu); - REG_PC(mc68kcpu) -= 4; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_32((mc68kcpu), offset); - if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0) - (mc68kcpu)->remaining_cycles = 0; + uint32_t offset = OPER_I_32(); + m_pc -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); + if(m_pc == m_ppc && m_remaining_cycles > 0) + m_remaining_cycles = 0; return; } else { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir)); - if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0) - (mc68kcpu)->remaining_cycles = 0; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir)); + if(m_pc == m_ppc && m_remaining_cycles > 0) + m_remaining_cycles = 0; } } M68KMAKE_OP(bset, 32, r, d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t mask = 1 << (DX(mc68kcpu) & 0x1f); + uint32_t* r_dst = &DY(); + uint32_t mask = 1 << (DX() & 0x1f); - (mc68kcpu)->not_z_flag = *r_dst & mask; + m_not_z_flag = *r_dst & mask; *r_dst |= mask; } @@ -3218,238 +3213,238 @@ M68KMAKE_OP(bset, 32, r, d) M68KMAKE_OP(bset, 8, r, .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = m68ki_read_8((mc68kcpu), ea); - uint32_t mask = 1 << (DX(mc68kcpu) & 7); + uint32_t src = m68ki_read_8(ea); + uint32_t mask = 1 << (DX() & 7); - (mc68kcpu)->not_z_flag = src & mask; - m68ki_write_8((mc68kcpu), ea, src | mask); + m_not_z_flag = src & mask; + m68ki_write_8(ea, src | mask); } M68KMAKE_OP(bset, 32, s, d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 0x1f); + uint32_t* r_dst = &DY(); + uint32_t mask = 1 << (OPER_I_8() & 0x1f); - (mc68kcpu)->not_z_flag = *r_dst & mask; + m_not_z_flag = *r_dst & mask; *r_dst |= mask; } M68KMAKE_OP(bset, 8, s, .) { - uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 7); + uint32_t mask = 1 << (OPER_I_8() & 7); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = m68ki_read_8((mc68kcpu), ea); + uint32_t src = m68ki_read_8(ea); - (mc68kcpu)->not_z_flag = src & mask; - m68ki_write_8((mc68kcpu), ea, src | mask); + m_not_z_flag = src & mask; + m68ki_write_8(ea, src | mask); } M68KMAKE_OP(bsr, 8, ., .) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu)); - m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir)); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(m_pc); + m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir)); } M68KMAKE_OP(bsr, 16, ., .) { - uint32_t offset = OPER_I_16(mc68kcpu); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu)); - REG_PC(mc68kcpu) -= 2; - m68ki_branch_16((mc68kcpu), offset); + uint32_t offset = OPER_I_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(m_pc); + m_pc -= 2; + m68ki_branch_16(offset); } M68KMAKE_OP(bsr, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t offset = OPER_I_32(mc68kcpu); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu)); - REG_PC(mc68kcpu) -= 4; - m68ki_branch_32((mc68kcpu), offset); + uint32_t offset = OPER_I_32(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(m_pc); + m_pc -= 4; + m68ki_branch_32(offset); return; } else { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu)); - m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir)); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(m_pc); + m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir)); } } M68KMAKE_OP(btst, 32, r, d) { - (mc68kcpu)->not_z_flag = DY(mc68kcpu) & (1 << (DX(mc68kcpu) & 0x1f)); + m_not_z_flag = DY() & (1 << (DX() & 0x1f)); } M68KMAKE_OP(btst, 8, r, .) { - (mc68kcpu)->not_z_flag = M68KMAKE_GET_OPER_AY_8 & (1 << (DX(mc68kcpu) & 7)); + m_not_z_flag = M68KMAKE_GET_OPER_AY_8 & (1 << (DX() & 7)); } M68KMAKE_OP(btst, 32, s, d) { - (mc68kcpu)->not_z_flag = DY(mc68kcpu) & (1 << (OPER_I_8(mc68kcpu) & 0x1f)); + m_not_z_flag = DY() & (1 << (OPER_I_8() & 0x1f)); } M68KMAKE_OP(btst, 8, s, .) { - uint32_t bit = OPER_I_8(mc68kcpu) & 7; + uint32_t bit = OPER_I_8() & 7; - (mc68kcpu)->not_z_flag = M68KMAKE_GET_OPER_AY_8 & (1 << bit); + m_not_z_flag = M68KMAKE_GET_OPER_AY_8 & (1 << bit); } M68KMAKE_OP(callm, 32, ., .) { /* note: watch out for pcrelative modes */ - if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_020_VARIANT()) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - REG_PC(mc68kcpu) += 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m_pc += 2; (void)ea; /* just to avoid an 'unused variable' warning */ - mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (callm)\n", - (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir); + logerror("%s at %08x: called unimplemented instruction %04x (callm)\n", + tag(), m_ppc, m_ir); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cas, 8, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t dest = m68ki_read_8((mc68kcpu), ea); - uint32_t* compare = ®_D(mc68kcpu)[word2 & 7]; + uint32_t dest = m68ki_read_8(ea); + uint32_t* compare = ®_D()[word2 & 7]; uint32_t res = dest - MASK_OUT_ABOVE_8(*compare); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(*compare, dest, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(*compare, dest, res); + m_c_flag = CFLAG_8(res); - if(COND_NE(mc68kcpu)) + if(COND_NE()) *compare = MASK_OUT_BELOW_8(*compare) | dest; else { - (mc68kcpu)->remaining_cycles -= 3; - m68ki_write_8((mc68kcpu), ea, MASK_OUT_ABOVE_8(REG_D(mc68kcpu)[(word2 >> 6) & 7])); + m_remaining_cycles -= 3; + m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D()[(word2 >> 6) & 7])); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cas, 16, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t dest = m68ki_read_16((mc68kcpu), ea); - uint32_t* compare = ®_D(mc68kcpu)[word2 & 7]; + uint32_t dest = m68ki_read_16(ea); + uint32_t* compare = ®_D()[word2 & 7]; uint32_t res = dest - MASK_OUT_ABOVE_16(*compare); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(*compare, dest, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(*compare, dest, res); + m_c_flag = CFLAG_16(res); - if(COND_NE(mc68kcpu)) + if(COND_NE()) *compare = MASK_OUT_BELOW_16(*compare) | dest; else { - (mc68kcpu)->remaining_cycles -= 3; - m68ki_write_16((mc68kcpu), ea, MASK_OUT_ABOVE_16(REG_D(mc68kcpu)[(word2 >> 6) & 7])); + m_remaining_cycles -= 3; + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D()[(word2 >> 6) & 7])); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cas, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t dest = m68ki_read_32((mc68kcpu), ea); - uint32_t* compare = ®_D(mc68kcpu)[word2 & 7]; + uint32_t dest = m68ki_read_32(ea); + uint32_t* compare = ®_D()[word2 & 7]; uint32_t res = dest - *compare; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(*compare, dest, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(*compare, dest, res); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(*compare, dest, res); + m_c_flag = CFLAG_SUB_32(*compare, dest, res); - if(COND_NE(mc68kcpu)) + if(COND_NE()) *compare = dest; else { - (mc68kcpu)->remaining_cycles -= 3; - m68ki_write_32((mc68kcpu), ea, REG_D(mc68kcpu)[(word2 >> 6) & 7]); + m_remaining_cycles -= 3; + m68ki_write_32(ea, REG_D()[(word2 >> 6) & 7]); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cas2, 16, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_32(mc68kcpu); - uint32_t* compare1 = ®_D(mc68kcpu)[(word2 >> 16) & 7]; - uint32_t ea1 = REG_DA(mc68kcpu)[(word2 >> 28) & 15]; - uint32_t dest1 = m68ki_read_16((mc68kcpu), ea1); + uint32_t word2 = OPER_I_32(); + uint32_t* compare1 = ®_D()[(word2 >> 16) & 7]; + uint32_t ea1 = REG_DA()[(word2 >> 28) & 15]; + uint32_t dest1 = m68ki_read_16(ea1); uint32_t res1 = dest1 - MASK_OUT_ABOVE_16(*compare1); - uint32_t* compare2 = ®_D(mc68kcpu)[word2 & 7]; - uint32_t ea2 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; - uint32_t dest2 = m68ki_read_16((mc68kcpu), ea2); + uint32_t* compare2 = ®_D()[word2 & 7]; + uint32_t ea2 = REG_DA()[(word2 >> 12) & 15]; + uint32_t dest2 = m68ki_read_16(ea2); uint32_t res2; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - (mc68kcpu)->n_flag = NFLAG_16(res1); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res1); - (mc68kcpu)->v_flag = VFLAG_SUB_16(*compare1, dest1, res1); - (mc68kcpu)->c_flag = CFLAG_16(res1); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m_n_flag = NFLAG_16(res1); + m_not_z_flag = MASK_OUT_ABOVE_16(res1); + m_v_flag = VFLAG_SUB_16(*compare1, dest1, res1); + m_c_flag = CFLAG_16(res1); - if(COND_EQ(mc68kcpu)) + if(COND_EQ()) { res2 = dest2 - MASK_OUT_ABOVE_16(*compare2); - (mc68kcpu)->n_flag = NFLAG_16(res2); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res2); - (mc68kcpu)->v_flag = VFLAG_SUB_16(*compare2, dest2, res2); - (mc68kcpu)->c_flag = CFLAG_16(res2); + m_n_flag = NFLAG_16(res2); + m_not_z_flag = MASK_OUT_ABOVE_16(res2); + m_v_flag = VFLAG_SUB_16(*compare2, dest2, res2); + m_c_flag = CFLAG_16(res2); - if(COND_EQ(mc68kcpu)) + if(COND_EQ()) { - (mc68kcpu)->remaining_cycles -= 3; - m68ki_write_16((mc68kcpu), ea1, REG_D(mc68kcpu)[(word2 >> 22) & 7]); - m68ki_write_16((mc68kcpu), ea2, REG_D(mc68kcpu)[(word2 >> 6) & 7]); + m_remaining_cycles -= 3; + m68ki_write_16(ea1, REG_D()[(word2 >> 22) & 7]); + m68ki_write_16(ea2, REG_D()[(word2 >> 6) & 7]); return; } } @@ -3457,44 +3452,44 @@ M68KMAKE_OP(cas2, 16, ., .) *compare2 = BIT_F(word2) ? MAKE_INT_16(dest2) : MASK_OUT_BELOW_16(*compare2) | dest2; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cas2, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_32(mc68kcpu); - uint32_t* compare1 = ®_D(mc68kcpu)[(word2 >> 16) & 7]; - uint32_t ea1 = REG_DA(mc68kcpu)[(word2 >> 28) & 15]; - uint32_t dest1 = m68ki_read_32((mc68kcpu), ea1); + uint32_t word2 = OPER_I_32(); + uint32_t* compare1 = ®_D()[(word2 >> 16) & 7]; + uint32_t ea1 = REG_DA()[(word2 >> 28) & 15]; + uint32_t dest1 = m68ki_read_32(ea1); uint32_t res1 = dest1 - *compare1; - uint32_t* compare2 = ®_D(mc68kcpu)[word2 & 7]; - uint32_t ea2 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; - uint32_t dest2 = m68ki_read_32((mc68kcpu), ea2); + uint32_t* compare2 = ®_D()[word2 & 7]; + uint32_t ea2 = REG_DA()[(word2 >> 12) & 15]; + uint32_t dest2 = m68ki_read_32(ea2); uint32_t res2; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - (mc68kcpu)->n_flag = NFLAG_32(res1); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res1); - (mc68kcpu)->v_flag = VFLAG_SUB_32(*compare1, dest1, res1); - (mc68kcpu)->c_flag = CFLAG_SUB_32(*compare1, dest1, res1); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m_n_flag = NFLAG_32(res1); + m_not_z_flag = MASK_OUT_ABOVE_32(res1); + m_v_flag = VFLAG_SUB_32(*compare1, dest1, res1); + m_c_flag = CFLAG_SUB_32(*compare1, dest1, res1); - if(COND_EQ(mc68kcpu)) + if(COND_EQ()) { res2 = dest2 - *compare2; - (mc68kcpu)->n_flag = NFLAG_32(res2); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res2); - (mc68kcpu)->v_flag = VFLAG_SUB_32(*compare2, dest2, res2); - (mc68kcpu)->c_flag = CFLAG_SUB_32(*compare2, dest2, res2); + m_n_flag = NFLAG_32(res2); + m_not_z_flag = MASK_OUT_ABOVE_32(res2); + m_v_flag = VFLAG_SUB_32(*compare2, dest2, res2); + m_c_flag = CFLAG_SUB_32(*compare2, dest2, res2); - if(COND_EQ(mc68kcpu)) + if(COND_EQ()) { - (mc68kcpu)->remaining_cycles -= 3; - m68ki_write_32((mc68kcpu), ea1, REG_D(mc68kcpu)[(word2 >> 22) & 7]); - m68ki_write_32((mc68kcpu), ea2, REG_D(mc68kcpu)[(word2 >> 6) & 7]); + m_remaining_cycles -= 3; + m68ki_write_32(ea1, REG_D()[(word2 >> 22) & 7]); + m68ki_write_32(ea2, REG_D()[(word2 >> 6) & 7]); return; } } @@ -3502,392 +3497,392 @@ M68KMAKE_OP(cas2, 32, ., .) *compare2 = dest2; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk, 16, ., d) { - int32_t src = MAKE_INT_16(DX(mc68kcpu)); - int32_t bound = MAKE_INT_16(DY(mc68kcpu)); + int32_t src = MAKE_INT_16(DX()); + int32_t bound = MAKE_INT_16(DY()); - (mc68kcpu)->not_z_flag = ZFLAG_16(src); /* Undocumented */ - (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undocumented */ - (mc68kcpu)->c_flag = CFLAG_CLEAR; /* Undocumented */ + m_not_z_flag = ZFLAG_16(src); /* Undocumented */ + m_v_flag = VFLAG_CLEAR; /* Undocumented */ + m_c_flag = CFLAG_CLEAR; /* Undocumented */ if(src >= 0 && src <= bound) { return; } - (mc68kcpu)->n_flag = (src < 0)<<7; - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_n_flag = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); } M68KMAKE_OP(chk, 16, ., .) { - int32_t src = MAKE_INT_16(DX(mc68kcpu)); + int32_t src = MAKE_INT_16(DX()); int32_t bound = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16); - (mc68kcpu)->not_z_flag = ZFLAG_16(src); /* Undocumented */ - (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undocumented */ - (mc68kcpu)->c_flag = CFLAG_CLEAR; /* Undocumented */ + m_not_z_flag = ZFLAG_16(src); /* Undocumented */ + m_v_flag = VFLAG_CLEAR; /* Undocumented */ + m_c_flag = CFLAG_CLEAR; /* Undocumented */ if(src >= 0 && src <= bound) { return; } - (mc68kcpu)->n_flag = (src < 0)<<7; - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_n_flag = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); } M68KMAKE_OP(chk, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - int32_t src = MAKE_INT_32(DX(mc68kcpu)); - int32_t bound = MAKE_INT_32(DY(mc68kcpu)); + int32_t src = MAKE_INT_32(DX()); + int32_t bound = MAKE_INT_32(DY()); - (mc68kcpu)->not_z_flag = ZFLAG_32(src); /* Undocumented */ - (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undocumented */ - (mc68kcpu)->c_flag = CFLAG_CLEAR; /* Undocumented */ + m_not_z_flag = ZFLAG_32(src); /* Undocumented */ + m_v_flag = VFLAG_CLEAR; /* Undocumented */ + m_c_flag = CFLAG_CLEAR; /* Undocumented */ if(src >= 0 && src <= bound) { return; } - (mc68kcpu)->n_flag = (src < 0)<<7; - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_n_flag = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - int32_t src = MAKE_INT_32(DX(mc68kcpu)); + int32_t src = MAKE_INT_32(DX()); int32_t bound = MAKE_INT_32(M68KMAKE_GET_OPER_AY_32); - (mc68kcpu)->not_z_flag = ZFLAG_32(src); /* Undocumented */ - (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undocumented */ - (mc68kcpu)->c_flag = CFLAG_CLEAR; /* Undocumented */ + m_not_z_flag = ZFLAG_32(src); /* Undocumented */ + m_v_flag = VFLAG_CLEAR; /* Undocumented */ + m_c_flag = CFLAG_CLEAR; /* Undocumented */ if(src >= 0 && src <= bound) { return; } - (mc68kcpu)->n_flag = (src < 0)<<7; - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_n_flag = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 8, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xff; - uint32_t ea = EA_PCDI_8(mc68kcpu); - uint32_t lower_bound = m68ki_read_pcrel_8((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_pcrel_8((mc68kcpu), ea + 1); + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xff; + uint32_t ea = EA_PCDI_8(); + uint32_t lower_bound = m68ki_read_pcrel_8(ea); + uint32_t upper_bound = m68ki_read_pcrel_8(ea + 1); if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound); + m_c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound); else - (mc68kcpu)->c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - if(COND_CS(mc68kcpu)) + m_c_flag = compare - lower_bound; + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } - (mc68kcpu)->c_flag = upper_bound - compare; - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = upper_bound - compare; + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 8, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xff; - uint32_t ea = EA_PCIX_8(mc68kcpu); - uint32_t lower_bound = m68ki_read_pcrel_8((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_pcrel_8((mc68kcpu), ea + 1); + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xff; + uint32_t ea = EA_PCIX_8(); + uint32_t lower_bound = m68ki_read_pcrel_8(ea); + uint32_t upper_bound = m68ki_read_pcrel_8(ea + 1); if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound); + m_c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound); else - (mc68kcpu)->c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - if(COND_CS(mc68kcpu)) + m_c_flag = compare - lower_bound; + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } - (mc68kcpu)->c_flag = upper_bound - compare; - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = upper_bound - compare; + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 8, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xff; + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xff; uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t lower_bound = m68ki_read_8((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_8((mc68kcpu), ea + 1); + uint32_t lower_bound = m68ki_read_8(ea); + uint32_t upper_bound = m68ki_read_8(ea + 1); if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound); + m_c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound); else - (mc68kcpu)->c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - if(COND_CS(mc68kcpu)) + m_c_flag = compare - lower_bound; + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } - (mc68kcpu)->c_flag = upper_bound - compare; - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = upper_bound - compare; + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 16, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xffff; - uint32_t ea = EA_PCDI_16(mc68kcpu); - uint32_t lower_bound = m68ki_read_pcrel_16((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_pcrel_16((mc68kcpu), ea + 2); + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xffff; + uint32_t ea = EA_PCDI_16(); + uint32_t lower_bound = m68ki_read_pcrel_16(ea); + uint32_t upper_bound = m68ki_read_pcrel_16(ea + 2); if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound); + m_c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound); else - (mc68kcpu)->c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu)) + m_c_flag = compare - lower_bound; + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + m_c_flag = CFLAG_16(m_c_flag); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare); + m_c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare); else - (mc68kcpu)->c_flag = upper_bound - compare; - (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = upper_bound - compare; + m_c_flag = CFLAG_16(m_c_flag); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 16, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xffff; - uint32_t ea = EA_PCIX_16(mc68kcpu); - uint32_t lower_bound = m68ki_read_pcrel_16((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_pcrel_16((mc68kcpu), ea + 2); + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xffff; + uint32_t ea = EA_PCIX_16(); + uint32_t lower_bound = m68ki_read_pcrel_16(ea); + uint32_t upper_bound = m68ki_read_pcrel_16(ea + 2); if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound); + m_c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound); else - (mc68kcpu)->c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu)) + m_c_flag = compare - lower_bound; + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + m_c_flag = CFLAG_16(m_c_flag); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare); + m_c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare); else - (mc68kcpu)->c_flag = upper_bound - compare; - (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = upper_bound - compare; + m_c_flag = CFLAG_16(m_c_flag); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 16, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xffff; + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xffff; uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t lower_bound = m68ki_read_16((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_16((mc68kcpu), ea + 2); + uint32_t lower_bound = m68ki_read_16(ea); + uint32_t upper_bound = m68ki_read_16(ea + 2); if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound); + m_c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound); else - (mc68kcpu)->c_flag = compare - lower_bound; + m_c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu)) + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + m_c_flag = CFLAG_16(m_c_flag); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare); + m_c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare); else - (mc68kcpu)->c_flag = upper_bound - compare; + m_c_flag = upper_bound - compare; - (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = CFLAG_16(m_c_flag); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 32, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; - uint32_t ea = EA_PCDI_32(mc68kcpu); - uint32_t lower_bound = m68ki_read_pcrel_32((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_pcrel_32((mc68kcpu), ea + 4); + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]; + uint32_t ea = EA_PCDI_32(); + uint32_t lower_bound = m68ki_read_pcrel_32(ea); + uint32_t upper_bound = m68ki_read_pcrel_32(ea + 4); - (mc68kcpu)->c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - (mc68kcpu)->c_flag = CFLAG_SUB_32(lower_bound, compare, (mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu)) + m_c_flag = compare - lower_bound; + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + m_c_flag = CFLAG_SUB_32(lower_bound, compare, m_c_flag); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } - (mc68kcpu)->c_flag = upper_bound - compare; - (mc68kcpu)->c_flag = CFLAG_SUB_32(compare, upper_bound, (mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = upper_bound - compare; + m_c_flag = CFLAG_SUB_32(compare, upper_bound, m_c_flag); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 32, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; - uint32_t ea = EA_PCIX_32(mc68kcpu); - uint32_t lower_bound = m68ki_read_pcrel_32((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_pcrel_32((mc68kcpu), ea + 4); + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]; + uint32_t ea = EA_PCIX_32(); + uint32_t lower_bound = m68ki_read_pcrel_32(ea); + uint32_t upper_bound = m68ki_read_pcrel_32(ea + 4); - (mc68kcpu)->c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - (mc68kcpu)->c_flag = CFLAG_SUB_32(lower_bound, compare, (mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu)) + m_c_flag = compare - lower_bound; + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + m_c_flag = CFLAG_SUB_32(lower_bound, compare, m_c_flag); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } - (mc68kcpu)->c_flag = upper_bound - compare; - (mc68kcpu)->c_flag = CFLAG_SUB_32(compare, upper_bound, (mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = upper_bound - compare; + m_c_flag = CFLAG_SUB_32(compare, upper_bound, m_c_flag); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]; uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t lower_bound = m68ki_read_32((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_32((mc68kcpu), ea + 4); + uint32_t lower_bound = m68ki_read_32(ea); + uint32_t upper_bound = m68ki_read_32(ea + 4); - (mc68kcpu)->c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - (mc68kcpu)->c_flag = CFLAG_SUB_32(lower_bound, compare, (mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu)) + m_c_flag = compare - lower_bound; + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + m_c_flag = CFLAG_SUB_32(lower_bound, compare, m_c_flag); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } - (mc68kcpu)->c_flag = upper_bound - compare; - (mc68kcpu)->c_flag = CFLAG_SUB_32(compare, upper_bound, (mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = upper_bound - compare; + m_c_flag = CFLAG_SUB_32(compare, upper_bound, m_c_flag); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(clr, 8, ., d) { - DY(mc68kcpu) &= 0xffffff00; + DY() &= 0xffffff00; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; + m_n_flag = NFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; } @@ -3895,28 +3890,28 @@ M68KMAKE_OP(clr, 8, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_000()) { - m68ki_read_8((mc68kcpu), ea); /* the 68000 does a dummy read, the value is discarded */ + m68ki_read_8(ea); /* the 68000 does a dummy read, the value is discarded */ } - m68ki_write_8((mc68kcpu), ea, 0); + m68ki_write_8(ea, 0); - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; + m_n_flag = NFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; } M68KMAKE_OP(clr, 16, ., d) { - DY(mc68kcpu) &= 0xffff0000; + DY() &= 0xffff0000; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; + m_n_flag = NFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; } @@ -3924,28 +3919,28 @@ M68KMAKE_OP(clr, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_000()) { - m68ki_read_16((mc68kcpu), ea); /* the 68000 does a dummy read, the value is discarded */ + m68ki_read_16(ea); /* the 68000 does a dummy read, the value is discarded */ } - m68ki_write_16((mc68kcpu), ea, 0); + m68ki_write_16(ea, 0); - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; + m_n_flag = NFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; } M68KMAKE_OP(clr, 32, ., d) { - DY(mc68kcpu) = 0; + DY() = 0; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; + m_n_flag = NFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; } @@ -3953,561 +3948,561 @@ M68KMAKE_OP(clr, 32, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_000()) { - m68ki_read_32((mc68kcpu), ea); /* the 68000 does a dummy read, the value is discarded */ + m68ki_read_32(ea); /* the 68000 does a dummy read, the value is discarded */ } - m68ki_write_32((mc68kcpu), ea, 0); + m68ki_write_32(ea, 0); - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; + m_n_flag = NFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; } M68KMAKE_OP(cmp, 8, ., d) { - uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t dst = MASK_OUT_ABOVE_8(DX(mc68kcpu)); + uint32_t src = MASK_OUT_ABOVE_8(DY()); + uint32_t dst = MASK_OUT_ABOVE_8(DX()); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); } M68KMAKE_OP(cmp, 8, ., .) { uint32_t src = M68KMAKE_GET_OPER_AY_8; - uint32_t dst = MASK_OUT_ABOVE_8(DX(mc68kcpu)); + uint32_t dst = MASK_OUT_ABOVE_8(DX()); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); } M68KMAKE_OP(cmp, 16, ., d) { - uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t dst = MASK_OUT_ABOVE_16(DX(mc68kcpu)); + uint32_t src = MASK_OUT_ABOVE_16(DY()); + uint32_t dst = MASK_OUT_ABOVE_16(DX()); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_c_flag = CFLAG_16(res); } M68KMAKE_OP(cmp, 16, ., a) { - uint32_t src = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t dst = MASK_OUT_ABOVE_16(DX(mc68kcpu)); + uint32_t src = MASK_OUT_ABOVE_16(AY()); + uint32_t dst = MASK_OUT_ABOVE_16(DX()); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_c_flag = CFLAG_16(res); } M68KMAKE_OP(cmp, 16, ., .) { uint32_t src = M68KMAKE_GET_OPER_AY_16; - uint32_t dst = MASK_OUT_ABOVE_16(DX(mc68kcpu)); + uint32_t dst = MASK_OUT_ABOVE_16(DX()); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_c_flag = CFLAG_16(res); } M68KMAKE_OP(cmp, 32, ., d) { - uint32_t src = DY(mc68kcpu); - uint32_t dst = DX(mc68kcpu); + uint32_t src = DY(); + uint32_t dst = DX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmp, 32, ., a) { - uint32_t src = AY(mc68kcpu); - uint32_t dst = DX(mc68kcpu); + uint32_t src = AY(); + uint32_t dst = DX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmp, 32, ., .) { uint32_t src = M68KMAKE_GET_OPER_AY_32; - uint32_t dst = DX(mc68kcpu); + uint32_t dst = DX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpa, 16, ., d) { - uint32_t src = MAKE_INT_16(DY(mc68kcpu)); - uint32_t dst = AX(mc68kcpu); + uint32_t src = MAKE_INT_16(DY()); + uint32_t dst = AX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpa, 16, ., a) { - uint32_t src = MAKE_INT_16(AY(mc68kcpu)); - uint32_t dst = AX(mc68kcpu); + uint32_t src = MAKE_INT_16(AY()); + uint32_t dst = AX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpa, 16, ., .) { uint32_t src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16); - uint32_t dst = AX(mc68kcpu); + uint32_t dst = AX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpa, 32, ., d) { - uint32_t src = DY(mc68kcpu); - uint32_t dst = AX(mc68kcpu); + uint32_t src = DY(); + uint32_t dst = AX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpa, 32, ., a) { - uint32_t src = AY(mc68kcpu); - uint32_t dst = AX(mc68kcpu); + uint32_t src = AY(); + uint32_t dst = AX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpa, 32, ., .) { uint32_t src = M68KMAKE_GET_OPER_AY_32; - uint32_t dst = AX(mc68kcpu); + uint32_t dst = AX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpi, 8, ., d) { - uint32_t src = OPER_I_8(mc68kcpu); - uint32_t dst = MASK_OUT_ABOVE_8(DY(mc68kcpu)); + uint32_t src = OPER_I_8(); + uint32_t dst = MASK_OUT_ABOVE_8(DY()); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); } M68KMAKE_OP(cmpi, 8, ., .) { - uint32_t src = OPER_I_8(mc68kcpu); + uint32_t src = OPER_I_8(); uint32_t dst = M68KMAKE_GET_OPER_AY_8; uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); } M68KMAKE_OP(cmpi, 8, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t src = OPER_I_8(mc68kcpu); - uint32_t dst = OPER_PCDI_8(mc68kcpu); + uint32_t src = OPER_I_8(); + uint32_t dst = OPER_PCDI_8(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cmpi, 8, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t src = OPER_I_8(mc68kcpu); - uint32_t dst = OPER_PCIX_8(mc68kcpu); + uint32_t src = OPER_I_8(); + uint32_t dst = OPER_PCIX_8(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cmpi, 16, ., d) { - uint32_t src = OPER_I_16(mc68kcpu); - uint32_t dst = MASK_OUT_ABOVE_16(DY(mc68kcpu)); + uint32_t src = OPER_I_16(); + uint32_t dst = MASK_OUT_ABOVE_16(DY()); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_c_flag = CFLAG_16(res); } M68KMAKE_OP(cmpi, 16, ., .) { - uint32_t src = OPER_I_16(mc68kcpu); + uint32_t src = OPER_I_16(); uint32_t dst = M68KMAKE_GET_OPER_AY_16; uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_c_flag = CFLAG_16(res); } M68KMAKE_OP(cmpi, 16, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t src = OPER_I_16(mc68kcpu); - uint32_t dst = OPER_PCDI_16(mc68kcpu); + uint32_t src = OPER_I_16(); + uint32_t dst = OPER_PCDI_16(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_c_flag = CFLAG_16(res); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cmpi, 16, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t src = OPER_I_16(mc68kcpu); - uint32_t dst = OPER_PCIX_16(mc68kcpu); + uint32_t src = OPER_I_16(); + uint32_t dst = OPER_PCIX_16(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_c_flag = CFLAG_16(res); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cmpi, 32, ., d) { - uint32_t src = OPER_I_32(mc68kcpu); - uint32_t dst = DY(mc68kcpu); + uint32_t src = OPER_I_32(); + uint32_t dst = DY(); uint32_t res = dst - src; - if (!(mc68kcpu)->cmpild_instr_callback.isnull()) - ((mc68kcpu)->cmpild_instr_callback)(*(mc68kcpu)->program, (mc68kcpu)->ir & 7, src, 0xffffffff); + if (!m_cmpild_instr_callback.isnull()) + (m_cmpild_instr_callback)(*m_program, m_ir & 7, src, 0xffffffff); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpi, 32, ., .) { - uint32_t src = OPER_I_32(mc68kcpu); + uint32_t src = OPER_I_32(); uint32_t dst = M68KMAKE_GET_OPER_AY_32; uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpi, 32, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t src = OPER_I_32(mc68kcpu); - uint32_t dst = OPER_PCDI_32(mc68kcpu); + uint32_t src = OPER_I_32(); + uint32_t dst = OPER_PCDI_32(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cmpi, 32, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t src = OPER_I_32(mc68kcpu); - uint32_t dst = OPER_PCIX_32(mc68kcpu); + uint32_t src = OPER_I_32(); + uint32_t dst = OPER_PCIX_32(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cmpm, 8, ., ax7) { - uint32_t src = OPER_AY_PI_8(mc68kcpu); - uint32_t dst = OPER_A7_PI_8(mc68kcpu); + uint32_t src = OPER_AY_PI_8(); + uint32_t dst = OPER_A7_PI_8(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); } M68KMAKE_OP(cmpm, 8, ., ay7) { - uint32_t src = OPER_A7_PI_8(mc68kcpu); - uint32_t dst = OPER_AX_PI_8(mc68kcpu); + uint32_t src = OPER_A7_PI_8(); + uint32_t dst = OPER_AX_PI_8(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); } M68KMAKE_OP(cmpm, 8, ., axy7) { - uint32_t src = OPER_A7_PI_8(mc68kcpu); - uint32_t dst = OPER_A7_PI_8(mc68kcpu); + uint32_t src = OPER_A7_PI_8(); + uint32_t dst = OPER_A7_PI_8(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); } M68KMAKE_OP(cmpm, 8, ., .) { - uint32_t src = OPER_AY_PI_8(mc68kcpu); - uint32_t dst = OPER_AX_PI_8(mc68kcpu); + uint32_t src = OPER_AY_PI_8(); + uint32_t dst = OPER_AX_PI_8(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); } M68KMAKE_OP(cmpm, 16, ., .) { - uint32_t src = OPER_AY_PI_16(mc68kcpu); - uint32_t dst = OPER_AX_PI_16(mc68kcpu); + uint32_t src = OPER_AY_PI_16(); + uint32_t dst = OPER_AX_PI_16(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_c_flag = CFLAG_16(res); } M68KMAKE_OP(cmpm, 32, ., .) { - uint32_t src = OPER_AY_PI_32(mc68kcpu); - uint32_t dst = OPER_AX_PI_32(mc68kcpu); + uint32_t src = OPER_AY_PI_32(); + uint32_t dst = OPER_AX_PI_32(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cpbcc, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpbcc)\n", - (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir); + logerror("%s at %08x: called unimplemented instruction %04x (cpbcc)\n", + tag(), m_ppc, m_ir); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(cpdbcc, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpdbcc)\n", - (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir); + logerror("%s at %08x: called unimplemented instruction %04x (cpdbcc)\n", + tag(), m_ppc, m_ir); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(cpgen, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type) && (mc68kcpu->get_fpu_enable() || mc68kcpu->has_pmmu)) + if(CPU_TYPE_IS_EC020_PLUS() && (m_has_fpu || m_has_pmmu)) { - mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpgen)\n", - (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir); + logerror("%s at %08x: called unimplemented instruction %04x (cpgen)\n", + tag(), m_ppc, m_ir); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(cpscc, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpscc)\n", - (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir); + logerror("%s at %08x: called unimplemented instruction %04x (cpscc)\n", + tag(), m_ppc, m_ir); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(cptrapcc, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cptrapcc)\n", - (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir); + logerror("%s at %08x: called unimplemented instruction %04x (cptrapcc)\n", + tag(), m_ppc, m_ir); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(ftrapcc, 32, ., .) { - if((mc68kcpu)->get_fpu_enable()) + if(m_has_fpu) { - m68881_ftrap(mc68kcpu); + m68881_ftrap(); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(dbt, 16, ., .) { - REG_PC(mc68kcpu) += 2; + m_pc += 2; } M68KMAKE_OP(dbf, 16, ., .) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t res = MASK_OUT_ABOVE_16(*r_dst - 1); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; if(res != 0xffff) { - uint32_t offset = OPER_I_16(mc68kcpu); - REG_PC(mc68kcpu) -= 2; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_16((mc68kcpu), offset); - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_dbcc_f_noexp; + uint32_t offset = OPER_I_16(); + m_pc -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + m_remaining_cycles -= m_cyc_dbcc_f_noexp; return; } - REG_PC(mc68kcpu) += 2; - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_dbcc_f_exp; + m_pc += 2; + m_remaining_cycles -= m_cyc_dbcc_f_exp; } @@ -4515,31 +4510,31 @@ M68KMAKE_OP(dbcc, 16, ., .) { if(M68KMAKE_NOT_CC) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t res = MASK_OUT_ABOVE_16(*r_dst - 1); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; if(res != 0xffff) { - uint32_t offset = OPER_I_16(mc68kcpu); - REG_PC(mc68kcpu) -= 2; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_16((mc68kcpu), offset); - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_dbcc_f_noexp; + uint32_t offset = OPER_I_16(); + m_pc -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + m_remaining_cycles -= m_cyc_dbcc_f_noexp; return; } - REG_PC(mc68kcpu) += 2; - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_dbcc_f_exp; + m_pc += 2; + m_remaining_cycles -= m_cyc_dbcc_f_exp; return; } - REG_PC(mc68kcpu) += 2; + m_pc += 2; } M68KMAKE_OP(divs, 16, ., d) { - uint32_t* r_dst = &DX(mc68kcpu); - int32_t src = MAKE_INT_16(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + int32_t src = MAKE_INT_16(DY()); int32_t quotient; int32_t remainder; @@ -4547,10 +4542,10 @@ M68KMAKE_OP(divs, 16, ., d) { if((uint32_t)*r_dst == 0x80000000 && src == -1) { - (mc68kcpu)->not_z_flag = 0; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = 0; + m_n_flag = NFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *r_dst = 0; return; } @@ -4560,23 +4555,23 @@ M68KMAKE_OP(divs, 16, ., d) if(quotient == MAKE_INT_16(quotient)) { - (mc68kcpu)->not_z_flag = quotient; - (mc68kcpu)->n_flag = NFLAG_16(quotient); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = quotient; + m_n_flag = NFLAG_16(quotient); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); return; } - (mc68kcpu)->v_flag = VFLAG_SET; + m_v_flag = VFLAG_SET; return; } - m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE); + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); } M68KMAKE_OP(divs, 16, ., .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); int32_t src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16); int32_t quotient; int32_t remainder; @@ -4585,10 +4580,10 @@ M68KMAKE_OP(divs, 16, ., .) { if((uint32_t)*r_dst == 0x80000000 && src == -1) { - (mc68kcpu)->not_z_flag = 0; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = 0; + m_n_flag = NFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *r_dst = 0; return; } @@ -4598,24 +4593,24 @@ M68KMAKE_OP(divs, 16, ., .) if(quotient == MAKE_INT_16(quotient)) { - (mc68kcpu)->not_z_flag = quotient; - (mc68kcpu)->n_flag = NFLAG_16(quotient); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = quotient; + m_n_flag = NFLAG_16(quotient); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); return; } - (mc68kcpu)->v_flag = VFLAG_SET; + m_v_flag = VFLAG_SET; return; } - m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE); + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); } M68KMAKE_OP(divu, 16, ., d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_16(DY()); if(src != 0) { @@ -4624,23 +4619,23 @@ M68KMAKE_OP(divu, 16, ., d) if(quotient < 0x10000) { - (mc68kcpu)->not_z_flag = quotient; - (mc68kcpu)->n_flag = NFLAG_16(quotient); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = quotient; + m_n_flag = NFLAG_16(quotient); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); return; } - (mc68kcpu)->v_flag = VFLAG_SET; + m_v_flag = VFLAG_SET; return; } - m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE); + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); } M68KMAKE_OP(divu, 16, ., .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t src = M68KMAKE_GET_OPER_AY_16; if(src != 0) @@ -4650,26 +4645,26 @@ M68KMAKE_OP(divu, 16, ., .) if(quotient < 0x10000) { - (mc68kcpu)->not_z_flag = quotient; - (mc68kcpu)->n_flag = NFLAG_16(quotient); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = quotient; + m_n_flag = NFLAG_16(quotient); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); return; } - (mc68kcpu)->v_flag = VFLAG_SET; + m_v_flag = VFLAG_SET; return; } - m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE); + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); } M68KMAKE_OP(divl, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint64_t divisor = DY(mc68kcpu); + uint32_t word2 = OPER_I_16(); + uint64_t divisor = DY(); uint64_t dividend = 0; uint64_t quotient = 0; uint64_t remainder = 0; @@ -4678,9 +4673,9 @@ M68KMAKE_OP(divl, 32, ., d) { if(BIT_A(word2)) /* 64 bit */ { - dividend = REG_D(mc68kcpu)[word2 & 7]; + dividend = REG_D()[word2 & 7]; dividend <<= 32; - dividend |= REG_D(mc68kcpu)[(word2 >> 12) & 7]; + dividend |= REG_D()[(word2 >> 12) & 7]; if(BIT_B(word2)) /* signed */ { @@ -4688,7 +4683,7 @@ M68KMAKE_OP(divl, 32, ., d) remainder = (uint64_t)((int64_t)dividend % (int64_t)((int32_t)divisor)); if((int64_t)quotient != (int64_t)((int32_t)quotient)) { - (mc68kcpu)->v_flag = VFLAG_SET; + m_v_flag = VFLAG_SET; return; } } @@ -4697,7 +4692,7 @@ M68KMAKE_OP(divl, 32, ., d) quotient = dividend / divisor; if(quotient > 0xffffffff) { - (mc68kcpu)->v_flag = VFLAG_SET; + m_v_flag = VFLAG_SET; return; } remainder = dividend % divisor; @@ -4705,7 +4700,7 @@ M68KMAKE_OP(divl, 32, ., d) } else /* 32 bit */ { - dividend = REG_D(mc68kcpu)[(word2 >> 12) & 7]; + dividend = REG_D()[(word2 >> 12) & 7]; if(BIT_B(word2)) /* signed */ { quotient = (uint64_t)((int64_t)((int32_t)dividend) / (int64_t)((int32_t)divisor)); @@ -4718,27 +4713,27 @@ M68KMAKE_OP(divl, 32, ., d) } } - REG_D(mc68kcpu)[word2 & 7] = remainder; - REG_D(mc68kcpu)[(word2 >> 12) & 7] = quotient; + REG_D()[word2 & 7] = remainder; + REG_D()[(word2 >> 12) & 7] = quotient; - (mc68kcpu)->n_flag = NFLAG_32(quotient); - (mc68kcpu)->not_z_flag = quotient; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(quotient); + m_not_z_flag = quotient; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE); + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(divl, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint64_t divisor = M68KMAKE_GET_OPER_AY_32; uint64_t dividend = 0; uint64_t quotient = 0; @@ -4748,9 +4743,9 @@ M68KMAKE_OP(divl, 32, ., .) { if(BIT_A(word2)) /* 64 bit */ { - dividend = REG_D(mc68kcpu)[word2 & 7]; + dividend = REG_D()[word2 & 7]; dividend <<= 32; - dividend |= REG_D(mc68kcpu)[(word2 >> 12) & 7]; + dividend |= REG_D()[(word2 >> 12) & 7]; if(BIT_B(word2)) /* signed */ { @@ -4758,7 +4753,7 @@ M68KMAKE_OP(divl, 32, ., .) remainder = (uint64_t)((int64_t)dividend % (int64_t)((int32_t)divisor)); if((int64_t)quotient != (int64_t)((int32_t)quotient)) { - (mc68kcpu)->v_flag = VFLAG_SET; + m_v_flag = VFLAG_SET; return; } } @@ -4767,7 +4762,7 @@ M68KMAKE_OP(divl, 32, ., .) quotient = dividend / divisor; if(quotient > 0xffffffff) { - (mc68kcpu)->v_flag = VFLAG_SET; + m_v_flag = VFLAG_SET; return; } remainder = dividend % divisor; @@ -4775,7 +4770,7 @@ M68KMAKE_OP(divl, 32, ., .) } else /* 32 bit */ { - dividend = REG_D(mc68kcpu)[(word2 >> 12) & 7]; + dividend = REG_D()[(word2 >> 12) & 7]; if(BIT_B(word2)) /* signed */ { quotient = (uint64_t)((int64_t)((int32_t)dividend) / (int64_t)((int32_t)divisor)); @@ -4788,198 +4783,198 @@ M68KMAKE_OP(divl, 32, ., .) } } - REG_D(mc68kcpu)[word2 & 7] = remainder; - REG_D(mc68kcpu)[(word2 >> 12) & 7] = quotient; + REG_D()[word2 & 7] = remainder; + REG_D()[(word2 >> 12) & 7] = quotient; - (mc68kcpu)->n_flag = NFLAG_32(quotient); - (mc68kcpu)->not_z_flag = quotient; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(quotient); + m_not_z_flag = quotient; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE); + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(eor, 8, ., d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu) ^= MASK_OUT_ABOVE_8(DX(mc68kcpu))); + uint32_t res = MASK_OUT_ABOVE_8(DY() ^= MASK_OUT_ABOVE_8(DX())); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eor, 8, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t res = MASK_OUT_ABOVE_8(DX(mc68kcpu) ^ m68ki_read_8((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_8(DX() ^ m68ki_read_8(ea)); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eor, 16, ., d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu) ^= MASK_OUT_ABOVE_16(DX(mc68kcpu))); + uint32_t res = MASK_OUT_ABOVE_16(DY() ^= MASK_OUT_ABOVE_16(DX())); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eor, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t res = MASK_OUT_ABOVE_16(DX(mc68kcpu) ^ m68ki_read_16((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_16(DX() ^ m68ki_read_16(ea)); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eor, 32, ., d) { - uint32_t res = DY(mc68kcpu) ^= DX(mc68kcpu); + uint32_t res = DY() ^= DX(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eor, 32, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t res = DX(mc68kcpu) ^ m68ki_read_32((mc68kcpu), ea); + uint32_t res = DX() ^ m68ki_read_32(ea); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eori, 8, ., d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu) ^= OPER_I_8(mc68kcpu)); + uint32_t res = MASK_OUT_ABOVE_8(DY() ^= OPER_I_8()); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eori, 8, ., .) { - uint32_t src = OPER_I_8(mc68kcpu); + uint32_t src = OPER_I_8(); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t res = src ^ m68ki_read_8((mc68kcpu), ea); + uint32_t res = src ^ m68ki_read_8(ea); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eori, 16, ., d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu) ^= OPER_I_16(mc68kcpu)); + uint32_t res = MASK_OUT_ABOVE_16(DY() ^= OPER_I_16()); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eori, 16, ., .) { - uint32_t src = OPER_I_16(mc68kcpu); + uint32_t src = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t res = src ^ m68ki_read_16((mc68kcpu), ea); + uint32_t res = src ^ m68ki_read_16(ea); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eori, 32, ., d) { - uint32_t res = DY(mc68kcpu) ^= OPER_I_32(mc68kcpu); + uint32_t res = DY() ^= OPER_I_32(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eori, 32, ., .) { - uint32_t src = OPER_I_32(mc68kcpu); + uint32_t src = OPER_I_32(); uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t res = src ^ m68ki_read_32((mc68kcpu), ea); + uint32_t res = src ^ m68ki_read_32(ea); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eori, 16, toc, .) { - m68ki_set_ccr((mc68kcpu), m68ki_get_ccr(mc68kcpu) ^ OPER_I_16(mc68kcpu)); + m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_16()); } M68KMAKE_OP(eori, 16, tos, .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t src = OPER_I_16(mc68kcpu); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_set_sr((mc68kcpu), m68ki_get_sr(mc68kcpu) ^ src); + uint32_t src = OPER_I_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(m68ki_get_sr() ^ src); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(exg, 32, dd, .) { - uint32_t* reg_a = &DX(mc68kcpu); - uint32_t* reg_b = &DY(mc68kcpu); + uint32_t* reg_a = &DX(); + uint32_t* reg_b = &DY(); uint32_t tmp = *reg_a; *reg_a = *reg_b; *reg_b = tmp; @@ -4988,8 +4983,8 @@ M68KMAKE_OP(exg, 32, dd, .) M68KMAKE_OP(exg, 32, aa, .) { - uint32_t* reg_a = &AX(mc68kcpu); - uint32_t* reg_b = &AY(mc68kcpu); + uint32_t* reg_a = &AX(); + uint32_t* reg_b = &AY(); uint32_t tmp = *reg_a; *reg_a = *reg_b; *reg_b = tmp; @@ -4998,8 +4993,8 @@ M68KMAKE_OP(exg, 32, aa, .) M68KMAKE_OP(exg, 32, da, .) { - uint32_t* reg_a = &DX(mc68kcpu); - uint32_t* reg_b = &AY(mc68kcpu); + uint32_t* reg_a = &DX(); + uint32_t* reg_b = &AY(); uint32_t tmp = *reg_a; *reg_a = *reg_b; *reg_b = tmp; @@ -5008,2769 +5003,2769 @@ M68KMAKE_OP(exg, 32, da, .) M68KMAKE_OP(ext, 16, ., .) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); *r_dst = MASK_OUT_BELOW_16(*r_dst) | MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xff00 : 0); - (mc68kcpu)->n_flag = NFLAG_16(*r_dst); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(*r_dst); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(*r_dst); + m_not_z_flag = MASK_OUT_ABOVE_16(*r_dst); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(ext, 32, ., .) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); *r_dst = MASK_OUT_ABOVE_16(*r_dst) | (GET_MSB_16(*r_dst) ? 0xffff0000 : 0); - (mc68kcpu)->n_flag = NFLAG_32(*r_dst); - (mc68kcpu)->not_z_flag = *r_dst; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(*r_dst); + m_not_z_flag = *r_dst; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(extb, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); *r_dst = MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xffffff00 : 0); - (mc68kcpu)->n_flag = NFLAG_32(*r_dst); - (mc68kcpu)->not_z_flag = *r_dst; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(*r_dst); + m_not_z_flag = *r_dst; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(illegal, 0, ., .) { - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(jmp, 32, ., .) { - m68ki_jump((mc68kcpu), M68KMAKE_GET_EA_AY_32); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0) - (mc68kcpu)->remaining_cycles = 0; + m68ki_jump(M68KMAKE_GET_EA_AY_32); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(m_pc == m_ppc && m_remaining_cycles > 0) + m_remaining_cycles = 0; } M68KMAKE_OP(jsr, 32, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu)); - m68ki_jump((mc68kcpu), ea); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(m_pc); + m68ki_jump(ea); } M68KMAKE_OP(lea, 32, ., .) { - AX(mc68kcpu) = M68KMAKE_GET_EA_AY_32; + AX() = M68KMAKE_GET_EA_AY_32; } M68KMAKE_OP(link, 16, ., a7) { - REG_A(mc68kcpu)[7] -= 4; - m68ki_write_32((mc68kcpu), REG_A(mc68kcpu)[7], REG_A(mc68kcpu)[7]); - REG_A(mc68kcpu)[7] = MASK_OUT_ABOVE_32(REG_A(mc68kcpu)[7] + MAKE_INT_16(OPER_I_16(mc68kcpu))); + REG_A()[7] -= 4; + m68ki_write_32(REG_A()[7], REG_A()[7]); + REG_A()[7] = MASK_OUT_ABOVE_32(REG_A()[7] + MAKE_INT_16(OPER_I_16())); } M68KMAKE_OP(link, 16, ., .) { - uint32_t* r_dst = &AY(mc68kcpu); + uint32_t* r_dst = &AY(); - m68ki_push_32((mc68kcpu), *r_dst); - *r_dst = REG_A(mc68kcpu)[7]; - REG_A(mc68kcpu)[7] = MASK_OUT_ABOVE_32(REG_A(mc68kcpu)[7] + MAKE_INT_16(OPER_I_16(mc68kcpu))); + m68ki_push_32(*r_dst); + *r_dst = REG_A()[7]; + REG_A()[7] = MASK_OUT_ABOVE_32(REG_A()[7] + MAKE_INT_16(OPER_I_16())); } M68KMAKE_OP(link, 32, ., a7) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - REG_A(mc68kcpu)[7] -= 4; - m68ki_write_32((mc68kcpu), REG_A(mc68kcpu)[7], REG_A(mc68kcpu)[7]); - REG_A(mc68kcpu)[7] = MASK_OUT_ABOVE_32(REG_A(mc68kcpu)[7] + OPER_I_32(mc68kcpu)); + REG_A()[7] -= 4; + m68ki_write_32(REG_A()[7], REG_A()[7]); + REG_A()[7] = MASK_OUT_ABOVE_32(REG_A()[7] + OPER_I_32()); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(link, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t* r_dst = &AY(mc68kcpu); + uint32_t* r_dst = &AY(); - m68ki_push_32((mc68kcpu), *r_dst); - *r_dst = REG_A(mc68kcpu)[7]; - REG_A(mc68kcpu)[7] = MASK_OUT_ABOVE_32(REG_A(mc68kcpu)[7] + OPER_I_32(mc68kcpu)); + m68ki_push_32(*r_dst); + *r_dst = REG_A()[7]; + REG_A()[7] = MASK_OUT_ABOVE_32(REG_A()[7] + OPER_I_32()); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(lsr, 8, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = src >> shift; if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = res; + m_x_flag = m_c_flag = src << (9-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsr, 16, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src >> shift; if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = res; + m_x_flag = m_c_flag = src << (9-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsr, 32, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = *r_dst; uint32_t res = src >> shift; if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = res; + m_x_flag = m_c_flag = src << (9-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsr, 8, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = src >> shift; if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; if(shift <= 8) { *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift); - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = src << (9-shift); + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } *r_dst &= 0xffffff00; - (mc68kcpu)->x_flag = XFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_8(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsr, 16, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src >> shift; if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; if(shift <= 16) { *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = (src >> (shift - 1))<<8; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag = (src >> (shift - 1))<<8; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } *r_dst &= 0xffff0000; - (mc68kcpu)->x_flag = XFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_16(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsr, 32, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = *r_dst; uint32_t res = src >> shift; if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; if(shift < 32) { *r_dst = res; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = (src >> (shift - 1))<<8; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag = (src >> (shift - 1))<<8; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } *r_dst = 0; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (shift == 32 ? GET_MSB_32(src)>>23 : 0); - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = (shift == 32 ? GET_MSB_32(src)>>23 : 0); + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_32(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsr, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); + uint32_t src = m68ki_read_16(ea); uint32_t res = src >> 1; - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = src << 8; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = res; + m_c_flag = m_x_flag = src << 8; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsl, 8, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = MASK_OUT_ABOVE_8(src << shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << shift; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_x_flag = m_c_flag = src << shift; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsl, 16, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = MASK_OUT_ABOVE_16(src << shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> (8-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_x_flag = m_c_flag = src >> (8-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsl, 32, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = *r_dst; uint32_t res = MASK_OUT_ABOVE_32(src << shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> (24-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_x_flag = m_c_flag = src >> (24-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsl, 8, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = MASK_OUT_ABOVE_8(src << shift); if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; if(shift <= 8) { *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << shift; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = src << shift; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } *r_dst &= 0xffffff00; - (mc68kcpu)->x_flag = XFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_8(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsl, 16, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = MASK_OUT_ABOVE_16(src << shift); if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; if(shift <= 16) { *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (src << shift) >> 8; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = (src << shift) >> 8; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } *r_dst &= 0xffff0000; - (mc68kcpu)->x_flag = XFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_16(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsl, 32, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = *r_dst; uint32_t res = MASK_OUT_ABOVE_32(src << shift); if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; if(shift < 32) { *r_dst = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (src >> (32 - shift)) << 8; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = (src >> (32 - shift)) << 8; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } *r_dst = 0; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = ((shift == 32 ? src & 1 : 0))<<8; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = ((shift == 32 ? src & 1 : 0))<<8; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_32(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsl, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); + uint32_t src = m68ki_read_16(ea); uint32_t res = MASK_OUT_ABOVE_16(src << 1); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> 7; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_x_flag = m_c_flag = src >> 7; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(move, 8, d, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t* r_dst = &DX(); *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, d, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, ai, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_AX_AI_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_AX_AI_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, ai, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_AX_AI_8(mc68kcpu); + uint32_t ea = EA_AX_AI_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, pi7, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_A7_PI_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_A7_PI_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, pi, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_AX_PI_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_AX_PI_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, pi7, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_A7_PI_8(mc68kcpu); + uint32_t ea = EA_A7_PI_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, pi, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_AX_PI_8(mc68kcpu); + uint32_t ea = EA_AX_PI_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, pd7, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_A7_PD_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_A7_PD_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, pd, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_AX_PD_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_AX_PD_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, pd7, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_A7_PD_8(mc68kcpu); + uint32_t ea = EA_A7_PD_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, pd, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_AX_PD_8(mc68kcpu); + uint32_t ea = EA_AX_PD_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, di, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_AX_DI_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_AX_DI_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, di, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_AX_DI_8(mc68kcpu); + uint32_t ea = EA_AX_DI_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, ix, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_AX_IX_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_AX_IX_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, ix, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_AX_IX_8(mc68kcpu); + uint32_t ea = EA_AX_IX_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, aw, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_AW_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_AW_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, aw, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_AW_8(mc68kcpu); + uint32_t ea = EA_AW_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, al, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_AL_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_AL_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, al, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_AL_8(mc68kcpu); + uint32_t ea = EA_AL_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, d, d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(DY()); + uint32_t* r_dst = &DX(); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, d, a) { - uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(AY()); + uint32_t* r_dst = &DX(); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, d, .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, ai, d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t ea = EA_AX_AI_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(DY()); + uint32_t ea = EA_AX_AI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, ai, a) { - uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t ea = EA_AX_AI_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(AY()); + uint32_t ea = EA_AX_AI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, ai, .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - uint32_t ea = EA_AX_AI_16(mc68kcpu); + uint32_t ea = EA_AX_AI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, pi, d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t ea = EA_AX_PI_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(DY()); + uint32_t ea = EA_AX_PI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, pi, a) { - uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t ea = EA_AX_PI_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(AY()); + uint32_t ea = EA_AX_PI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, pi, .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - uint32_t ea = EA_AX_PI_16(mc68kcpu); + uint32_t ea = EA_AX_PI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, pd, d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t ea = EA_AX_PD_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(DY()); + uint32_t ea = EA_AX_PD_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, pd, a) { - uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t ea = EA_AX_PD_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(AY()); + uint32_t ea = EA_AX_PD_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, pd, .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - uint32_t ea = EA_AX_PD_16(mc68kcpu); + uint32_t ea = EA_AX_PD_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, di, d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t ea = EA_AX_DI_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(DY()); + uint32_t ea = EA_AX_DI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, di, a) { - uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t ea = EA_AX_DI_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(AY()); + uint32_t ea = EA_AX_DI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, di, .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - uint32_t ea = EA_AX_DI_16(mc68kcpu); + uint32_t ea = EA_AX_DI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, ix, d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t ea = EA_AX_IX_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(DY()); + uint32_t ea = EA_AX_IX_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, ix, a) { - uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t ea = EA_AX_IX_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(AY()); + uint32_t ea = EA_AX_IX_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, ix, .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - uint32_t ea = EA_AX_IX_16(mc68kcpu); + uint32_t ea = EA_AX_IX_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, aw, d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t ea = EA_AW_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(DY()); + uint32_t ea = EA_AW_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, aw, a) { - uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t ea = EA_AW_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(AY()); + uint32_t ea = EA_AW_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, aw, .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - uint32_t ea = EA_AW_16(mc68kcpu); + uint32_t ea = EA_AW_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, al, d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t ea = EA_AL_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(DY()); + uint32_t ea = EA_AL_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, al, a) { - uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t ea = EA_AL_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(AY()); + uint32_t ea = EA_AL_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, al, .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - uint32_t ea = EA_AL_16(mc68kcpu); + uint32_t ea = EA_AL_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, d, d) { - uint32_t res = DY(mc68kcpu); - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t res = DY(); + uint32_t* r_dst = &DX(); *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, d, a) { - uint32_t res = AY(mc68kcpu); - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t res = AY(); + uint32_t* r_dst = &DX(); *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, d, .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, ai, d) { - uint32_t res = DY(mc68kcpu); - uint32_t ea = EA_AX_AI_32(mc68kcpu); + uint32_t res = DY(); + uint32_t ea = EA_AX_AI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, ai, a) { - uint32_t res = AY(mc68kcpu); - uint32_t ea = EA_AX_AI_32(mc68kcpu); + uint32_t res = AY(); + uint32_t ea = EA_AX_AI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, ai, .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - uint32_t ea = EA_AX_AI_32(mc68kcpu); + uint32_t ea = EA_AX_AI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, pi, d) { - uint32_t res = DY(mc68kcpu); - uint32_t ea = EA_AX_PI_32(mc68kcpu); + uint32_t res = DY(); + uint32_t ea = EA_AX_PI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, pi, a) { - uint32_t res = AY(mc68kcpu); - uint32_t ea = EA_AX_PI_32(mc68kcpu); + uint32_t res = AY(); + uint32_t ea = EA_AX_PI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, pi, .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - uint32_t ea = EA_AX_PI_32(mc68kcpu); + uint32_t ea = EA_AX_PI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, pd, d) { - uint32_t res = DY(mc68kcpu); - uint32_t ea = EA_AX_PD_32(mc68kcpu); + uint32_t res = DY(); + uint32_t ea = EA_AX_PD_32(); - m68ki_write_16((mc68kcpu), ea+2, res & 0xFFFF ); - m68ki_write_16((mc68kcpu), ea, (res >> 16) & 0xFFFF ); + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, pd, a) { - uint32_t res = AY(mc68kcpu); - uint32_t ea = EA_AX_PD_32(mc68kcpu); + uint32_t res = AY(); + uint32_t ea = EA_AX_PD_32(); - m68ki_write_16((mc68kcpu), ea+2, res & 0xFFFF ); - m68ki_write_16((mc68kcpu), ea, (res >> 16) & 0xFFFF ); + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, pd, .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - uint32_t ea = EA_AX_PD_32(mc68kcpu); + uint32_t ea = EA_AX_PD_32(); - m68ki_write_16((mc68kcpu), ea+2, res & 0xFFFF ); - m68ki_write_16((mc68kcpu), ea, (res >> 16) & 0xFFFF ); + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, di, d) { - uint32_t res = DY(mc68kcpu); - uint32_t ea = EA_AX_DI_32(mc68kcpu); + uint32_t res = DY(); + uint32_t ea = EA_AX_DI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, di, a) { - uint32_t res = AY(mc68kcpu); - uint32_t ea = EA_AX_DI_32(mc68kcpu); + uint32_t res = AY(); + uint32_t ea = EA_AX_DI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, di, .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - uint32_t ea = EA_AX_DI_32(mc68kcpu); + uint32_t ea = EA_AX_DI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, ix, d) { - uint32_t res = DY(mc68kcpu); - uint32_t ea = EA_AX_IX_32(mc68kcpu); + uint32_t res = DY(); + uint32_t ea = EA_AX_IX_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, ix, a) { - uint32_t res = AY(mc68kcpu); - uint32_t ea = EA_AX_IX_32(mc68kcpu); + uint32_t res = AY(); + uint32_t ea = EA_AX_IX_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, ix, .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - uint32_t ea = EA_AX_IX_32(mc68kcpu); + uint32_t ea = EA_AX_IX_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, aw, d) { - uint32_t res = DY(mc68kcpu); - uint32_t ea = EA_AW_32(mc68kcpu); + uint32_t res = DY(); + uint32_t ea = EA_AW_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, aw, a) { - uint32_t res = AY(mc68kcpu); - uint32_t ea = EA_AW_32(mc68kcpu); + uint32_t res = AY(); + uint32_t ea = EA_AW_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, aw, .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - uint32_t ea = EA_AW_32(mc68kcpu); + uint32_t ea = EA_AW_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, al, d) { - uint32_t res = DY(mc68kcpu); - uint32_t ea = EA_AL_32(mc68kcpu); + uint32_t res = DY(); + uint32_t ea = EA_AL_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, al, a) { - uint32_t res = AY(mc68kcpu); - uint32_t ea = EA_AL_32(mc68kcpu); + uint32_t res = AY(); + uint32_t ea = EA_AL_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, al, .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - uint32_t ea = EA_AL_32(mc68kcpu); + uint32_t ea = EA_AL_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(movea, 16, ., d) { - AX(mc68kcpu) = MAKE_INT_16(DY(mc68kcpu)); + AX() = MAKE_INT_16(DY()); } M68KMAKE_OP(movea, 16, ., a) { - AX(mc68kcpu) = MAKE_INT_16(AY(mc68kcpu)); + AX() = MAKE_INT_16(AY()); } M68KMAKE_OP(movea, 16, ., .) { - AX(mc68kcpu) = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16); + AX() = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16); } M68KMAKE_OP(movea, 32, ., d) { - AX(mc68kcpu) = DY(mc68kcpu); + AX() = DY(); } M68KMAKE_OP(movea, 32, ., a) { - AX(mc68kcpu) = AY(mc68kcpu); + AX() = AY(); } M68KMAKE_OP(movea, 32, ., .) { - AX(mc68kcpu) = M68KMAKE_GET_OPER_AY_32; + AX() = M68KMAKE_GET_OPER_AY_32; } M68KMAKE_OP(move, 16, frc, d) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - DY(mc68kcpu) = MASK_OUT_BELOW_16(DY(mc68kcpu)) | m68ki_get_ccr(mc68kcpu); + DY() = MASK_OUT_BELOW_16(DY()) | m68ki_get_ccr(); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(move, 16, frc, .) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - m68ki_write_16((mc68kcpu), M68KMAKE_GET_EA_AY_16, m68ki_get_ccr(mc68kcpu)); + m68ki_write_16(M68KMAKE_GET_EA_AY_16, m68ki_get_ccr()); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(move, 16, toc, d) { - m68ki_set_ccr((mc68kcpu), DY(mc68kcpu)); + m68ki_set_ccr(DY()); } M68KMAKE_OP(move, 16, toc, .) { - m68ki_set_ccr((mc68kcpu), M68KMAKE_GET_OPER_AY_16); + m68ki_set_ccr(M68KMAKE_GET_OPER_AY_16); } M68KMAKE_OP(move, 16, frs, d) { - if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type) || (mc68kcpu)->s_flag) /* NS990408 */ + if(CPU_TYPE_IS_000() || m_s_flag) /* NS990408 */ { - DY(mc68kcpu) = MASK_OUT_BELOW_16(DY(mc68kcpu)) | m68ki_get_sr(mc68kcpu); + DY() = MASK_OUT_BELOW_16(DY()) | m68ki_get_sr(); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(move, 16, frs, .) { - if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type) || (mc68kcpu)->s_flag) /* NS990408 */ + if(CPU_TYPE_IS_000() || m_s_flag) /* NS990408 */ { uint32_t ea = M68KMAKE_GET_EA_AY_16; - m68ki_write_16((mc68kcpu), ea, m68ki_get_sr(mc68kcpu)); + m68ki_write_16(ea, m68ki_get_sr()); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(move, 16, tos, d) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - m68ki_set_sr((mc68kcpu), DY(mc68kcpu)); + m68ki_set_sr(DY()); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(move, 16, tos, .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { uint32_t new_sr = M68KMAKE_GET_OPER_AY_16; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_set_sr((mc68kcpu), new_sr); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(new_sr); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(move, 32, fru, .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - AY(mc68kcpu) = REG_USP(mc68kcpu); + AY() = REG_USP(); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(move, 32, tou, .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - REG_USP(mc68kcpu) = AY(mc68kcpu); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + REG_USP() = AY(); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(movec, 32, cr, .) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ switch (word2 & 0xfff) { case 0x000: /* SFC */ - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->sfc; + REG_DA()[(word2 >> 12) & 15] = m_sfc; return; case 0x001: /* DFC */ - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->dfc; + REG_DA()[(word2 >> 12) & 15] = m_dfc; return; case 0x002: /* CACR */ - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->cacr; + REG_DA()[(word2 >> 12) & 15] = m_cacr; return; } return; case 0x800: /* USP */ - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = REG_USP(mc68kcpu); + REG_DA()[(word2 >> 12) & 15] = REG_USP(); return; case 0x801: /* VBR */ - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->vbr; + REG_DA()[(word2 >> 12) & 15] = m_vbr; return; case 0x802: /* CAAR */ - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->caar; + REG_DA()[(word2 >> 12) & 15] = m_caar; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); break; case 0x803: /* MSP */ - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->m_flag ? REG_SP(mc68kcpu) : REG_MSP(mc68kcpu); + REG_DA()[(word2 >> 12) & 15] = m_m_flag ? REG_SP() : REG_MSP(); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x804: /* ISP */ - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->m_flag ? REG_ISP(mc68kcpu) : REG_SP(mc68kcpu); + REG_DA()[(word2 >> 12) & 15] = m_m_flag ? REG_ISP() : REG_SP(); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x003: /* TC */ - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_tc; + REG_DA()[(word2 >> 12) & 15] = m_mmu_tc; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x004: /* ITT0 (040+, ACR0 on ColdFire) */ - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_itt0; + REG_DA()[(word2 >> 12) & 15] = m_mmu_itt0; return; } - else if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + else if(CPU_TYPE_IS_COLDFIRE()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_acr0; + REG_DA()[(word2 >> 12) & 15] = m_mmu_acr0; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x005: /* ITT1 (040+, ACR1 on ColdFire) */ - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_itt1; + REG_DA()[(word2 >> 12) & 15] = m_mmu_itt1; return; } - else if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + else if(CPU_TYPE_IS_COLDFIRE()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_acr1; + REG_DA()[(word2 >> 12) & 15] = m_mmu_acr1; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x006: /* DTT0 */ - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_dtt0; + REG_DA()[(word2 >> 12) & 15] = m_mmu_dtt0; return; } - else if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + else if(CPU_TYPE_IS_COLDFIRE()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_acr2; + REG_DA()[(word2 >> 12) & 15] = m_mmu_acr2; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x007: /* DTT1 */ - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_dtt1; + REG_DA()[(word2 >> 12) & 15] = m_mmu_dtt1; return; } - else if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + else if(CPU_TYPE_IS_COLDFIRE()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_acr3; + REG_DA()[(word2 >> 12) & 15] = m_mmu_acr3; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x805: /* MMUSR */ - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_sr_040; + REG_DA()[(word2 >> 12) & 15] = m_mmu_sr_040; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x806: /* URP */ - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_urp_aptr; + REG_DA()[(word2 >> 12) & 15] = m_mmu_urp_aptr; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x807: /* SRP */ - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_srp_aptr; + REG_DA()[(word2 >> 12) & 15] = m_mmu_srp_aptr; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc00: // ROMBAR0 - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc01: // ROMBAR1 - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc04: // RAMBAR0 - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc05: // RAMBAR1 - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc0c: // MPCR - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc0d: // EDRAMBAR - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc0e: // SECMBAR - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc0f: // MBAR - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; default: - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; } } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(movec, 32, rc, .) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ switch (word2 & 0xfff) { case 0x000: /* SFC */ - (mc68kcpu)->sfc = REG_DA(mc68kcpu)[(word2 >> 12) & 15] & 7; + m_sfc = REG_DA()[(word2 >> 12) & 15] & 7; return; case 0x001: /* DFC */ - (mc68kcpu)->dfc = REG_DA(mc68kcpu)[(word2 >> 12) & 15] & 7; + m_dfc = REG_DA()[(word2 >> 12) & 15] & 7; return; case 0x002: /* CACR */ /* Only EC020 and later have CACR */ - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { /* 68030 can write all bits except 5-7, 040 can write all */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - (mc68kcpu)->cacr = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_cacr = REG_DA()[(word2 >> 12) & 15]; } - else if (CPU_TYPE_IS_030_PLUS((mc68kcpu)->cpu_type)) + else if (CPU_TYPE_IS_030_PLUS()) { - (mc68kcpu)->cacr = REG_DA(mc68kcpu)[(word2 >> 12) & 15] & 0xff1f; + m_cacr = REG_DA()[(word2 >> 12) & 15] & 0xff1f; } else { - (mc68kcpu)->cacr = REG_DA(mc68kcpu)[(word2 >> 12) & 15] & 0x0f; + m_cacr = REG_DA()[(word2 >> 12) & 15] & 0x0f; } -// mc68kcpu->logerror("movec to cacr=%04x\n", (mc68kcpu)->cacr); - if ((mc68kcpu)->cacr & (M68K_CACR_CI | M68K_CACR_CEI)) +// logerror("movec to cacr=%04x\n", m_cacr); + if (m_cacr & (M68K_CACR_CI | M68K_CACR_CEI)) { - m68ki_ic_clear(mc68kcpu); + m68ki_ic_clear(); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x800: /* USP */ - REG_USP(mc68kcpu) = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + REG_USP() = REG_DA()[(word2 >> 12) & 15]; return; case 0x801: /* VBR */ - (mc68kcpu)->vbr = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_vbr = REG_DA()[(word2 >> 12) & 15]; return; case 0x802: /* CAAR */ - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - (mc68kcpu)->caar = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_caar = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x803: /* MSP */ - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { /* we are in supervisor mode so just check for M flag */ - if(!(mc68kcpu)->m_flag) + if(!m_m_flag) { - REG_MSP(mc68kcpu) = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + REG_MSP() = REG_DA()[(word2 >> 12) & 15]; return; } - REG_SP(mc68kcpu) = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + REG_SP() = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x804: /* ISP */ - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - if(!(mc68kcpu)->m_flag) + if(!m_m_flag) { - REG_SP(mc68kcpu) = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + REG_SP() = REG_DA()[(word2 >> 12) & 15]; return; } - REG_ISP(mc68kcpu) = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + REG_ISP() = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x003: /* TC */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->mmu_tc = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_tc = REG_DA()[(word2 >> 12) & 15]; - if (mc68kcpu->mmu_tc & 0x8000) + if (m_mmu_tc & 0x8000) { - mc68kcpu->pmmu_enabled = 1; + m_pmmu_enabled = 1; } else { - mc68kcpu->pmmu_enabled = 0; + m_pmmu_enabled = 0; } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x004: /* ITT0 */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->mmu_itt0 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_itt0 = REG_DA()[(word2 >> 12) & 15]; return; } - else if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + else if(CPU_TYPE_IS_COLDFIRE()) { - mc68kcpu->mmu_acr0 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_acr0 = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x005: /* ITT1 */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->mmu_itt1 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_itt1 = REG_DA()[(word2 >> 12) & 15]; return; } - else if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + else if(CPU_TYPE_IS_COLDFIRE()) { - mc68kcpu->mmu_acr1 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_acr1 = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x006: /* DTT0 */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->mmu_dtt0 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_dtt0 = REG_DA()[(word2 >> 12) & 15]; return; } - else if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + else if(CPU_TYPE_IS_COLDFIRE()) { - mc68kcpu->mmu_acr2 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_acr2 = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x007: /* DTT1 */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->mmu_dtt1 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_dtt1 = REG_DA()[(word2 >> 12) & 15]; return; } - else if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + else if(CPU_TYPE_IS_COLDFIRE()) { - mc68kcpu->mmu_acr3 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_acr3 = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x805: /* MMUSR */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->mmu_sr_040 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_sr_040 = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x806: /* URP */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->mmu_urp_aptr = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_urp_aptr = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x807: /* SRP */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->mmu_srp_aptr = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_srp_aptr = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc00: // ROMBAR0 - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc01: // ROMBAR1 - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc04: // RAMBAR0 - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc05: // RAMBAR1 - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc0c: // MPCR - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc0d: // EDRAMBAR - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc0e: // SECMBAR - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc0f: // MBAR - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; default: - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; } } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(movem, 16, re, pd) { uint32_t i = 0; - uint32_t register_list = OPER_I_16(mc68kcpu); - uint32_t ea = AY(mc68kcpu); + uint32_t register_list = OPER_I_16(); + uint32_t ea = AY(); uint32_t count = 0; for(; i < 16; i++) if(register_list & (1 << i)) { ea -= 2; - m68ki_write_16((mc68kcpu), ea, MASK_OUT_ABOVE_16(REG_DA(mc68kcpu)[15-i])); + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA()[15-i])); count++; } - AY(mc68kcpu) = ea; + AY() = ea; - (mc68kcpu)->remaining_cycles -= count<<(mc68kcpu)->cyc_movem_w; + m_remaining_cycles -= count<<m_cyc_movem_w; } M68KMAKE_OP(movem, 16, re, .) { uint32_t i = 0; - uint32_t register_list = OPER_I_16(mc68kcpu); + uint32_t register_list = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_16; uint32_t count = 0; for(; i < 16; i++) if(register_list & (1 << i)) { - m68ki_write_16((mc68kcpu), ea, MASK_OUT_ABOVE_16(REG_DA(mc68kcpu)[i])); + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA()[i])); ea += 2; count++; } - (mc68kcpu)->remaining_cycles -= count<<(mc68kcpu)->cyc_movem_w; + m_remaining_cycles -= count<<m_cyc_movem_w; } M68KMAKE_OP(movem, 32, re, pd) { uint32_t i = 0; - uint32_t register_list = OPER_I_16(mc68kcpu); - uint32_t ea = AY(mc68kcpu); + uint32_t register_list = OPER_I_16(); + uint32_t ea = AY(); uint32_t count = 0; for(; i < 16; i++) if(register_list & (1 << i)) { ea -= 4; - m68ki_write_16((mc68kcpu), ea+2, REG_DA(mc68kcpu)[15-i] & 0xFFFF ); - m68ki_write_16((mc68kcpu), ea, (REG_DA(mc68kcpu)[15-i] >> 16) & 0xFFFF ); + m68ki_write_16(ea+2, REG_DA()[15-i] & 0xFFFF ); + m68ki_write_16(ea, (REG_DA()[15-i] >> 16) & 0xFFFF ); count++; } - AY(mc68kcpu) = ea; + AY() = ea; - (mc68kcpu)->remaining_cycles -= count<<(mc68kcpu)->cyc_movem_l; + m_remaining_cycles -= count<<m_cyc_movem_l; } M68KMAKE_OP(movem, 32, re, .) { uint32_t i = 0; - uint32_t register_list = OPER_I_16(mc68kcpu); + uint32_t register_list = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_32; uint32_t count = 0; for(; i < 16; i++) if(register_list & (1 << i)) { - m68ki_write_32((mc68kcpu), ea, REG_DA(mc68kcpu)[i]); + m68ki_write_32(ea, REG_DA()[i]); ea += 4; count++; } - (mc68kcpu)->remaining_cycles -= count<<(mc68kcpu)->cyc_movem_l; + m_remaining_cycles -= count<<m_cyc_movem_l; } M68KMAKE_OP(movem, 16, er, pi) { uint32_t i = 0; - uint32_t register_list = OPER_I_16(mc68kcpu); - uint32_t ea = AY(mc68kcpu); + uint32_t register_list = OPER_I_16(); + uint32_t ea = AY(); uint32_t count = 0; for(; i < 16; i++) if(register_list & (1 << i)) { - REG_DA(mc68kcpu)[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16((mc68kcpu), ea))); + REG_DA()[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea))); ea += 2; count++; } - AY(mc68kcpu) = ea; + AY() = ea; - (mc68kcpu)->remaining_cycles -= count<<(mc68kcpu)->cyc_movem_w; + m_remaining_cycles -= count<<m_cyc_movem_w; } M68KMAKE_OP(movem, 16, er, pcdi) { uint32_t i = 0; - uint32_t register_list = OPER_I_16(mc68kcpu); - uint32_t ea = EA_PCDI_16(mc68kcpu); + uint32_t register_list = OPER_I_16(); + uint32_t ea = EA_PCDI_16(); uint32_t count = 0; for(; i < 16; i++) if(register_list & (1 << i)) { - REG_DA(mc68kcpu)[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_pcrel_16((mc68kcpu), ea))); + REG_DA()[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_pcrel_16(ea))); ea += 2; count++; } - (mc68kcpu)->remaining_cycles -= count<<(mc68kcpu)->cyc_movem_w; + m_remaining_cycles -= count<<m_cyc_movem_w; } M68KMAKE_OP(movem, 16, er, pcix) { uint32_t i = 0; - uint32_t register_list = OPER_I_16(mc68kcpu); - uint32_t ea = EA_PCIX_16(mc68kcpu); + uint32_t register_list = OPER_I_16(); + uint32_t ea = EA_PCIX_16(); uint32_t count = 0; for(; i < 16; i++) if(register_list & (1 << i)) { - REG_DA(mc68kcpu)[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_pcrel_16((mc68kcpu), ea))); + REG_DA()[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_pcrel_16(ea))); ea += 2; count++; } - (mc68kcpu)->remaining_cycles -= count<<(mc68kcpu)->cyc_movem_w; + m_remaining_cycles -= count<<m_cyc_movem_w; } M68KMAKE_OP(movem, 16, er, .) { uint32_t i = 0; - uint32_t register_list = OPER_I_16(mc68kcpu); + uint32_t register_list = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_16; uint32_t count = 0; for(; i < 16; i++) if(register_list & (1 << i)) { - REG_DA(mc68kcpu)[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16((mc68kcpu), ea))); + REG_DA()[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea))); ea += 2; count++; } - (mc68kcpu)->remaining_cycles -= count<<(mc68kcpu)->cyc_movem_w; + m_remaining_cycles -= count<<m_cyc_movem_w; } M68KMAKE_OP(movem, 32, er, pi) { uint32_t i = 0; - uint32_t register_list = OPER_I_16(mc68kcpu); - uint32_t ea = AY(mc68kcpu); + uint32_t register_list = OPER_I_16(); + uint32_t ea = AY(); uint32_t count = 0; for(; i < 16; i++) if(register_list & (1 << i)) { - REG_DA(mc68kcpu)[i] = m68ki_read_32((mc68kcpu), ea); + REG_DA()[i] = m68ki_read_32(ea); ea += 4; count++; } - AY(mc68kcpu) = ea; + AY() = ea; - (mc68kcpu)->remaining_cycles -= count<<(mc68kcpu)->cyc_movem_l; + m_remaining_cycles -= count<<m_cyc_movem_l; } M68KMAKE_OP(movem, 32, er, pcdi) { uint32_t i = 0; - uint32_t register_list = OPER_I_16(mc68kcpu); - uint32_t ea = EA_PCDI_32(mc68kcpu); + uint32_t register_list = OPER_I_16(); + uint32_t ea = EA_PCDI_32(); uint32_t count = 0; for(; i < 16; i++) if(register_list & (1 << i)) { - REG_DA(mc68kcpu)[i] = m68ki_read_pcrel_32((mc68kcpu), ea); + REG_DA()[i] = m68ki_read_pcrel_32(ea); ea += 4; count++; } - (mc68kcpu)->remaining_cycles -= count<<(mc68kcpu)->cyc_movem_l; + m_remaining_cycles -= count<<m_cyc_movem_l; } M68KMAKE_OP(movem, 32, er, pcix) { uint32_t i = 0; - uint32_t register_list = OPER_I_16(mc68kcpu); - uint32_t ea = EA_PCIX_32(mc68kcpu); + uint32_t register_list = OPER_I_16(); + uint32_t ea = EA_PCIX_32(); uint32_t count = 0; for(; i < 16; i++) if(register_list & (1 << i)) { - REG_DA(mc68kcpu)[i] = m68ki_read_pcrel_32((mc68kcpu), ea); + REG_DA()[i] = m68ki_read_pcrel_32(ea); ea += 4; count++; } - (mc68kcpu)->remaining_cycles -= count<<(mc68kcpu)->cyc_movem_l; + m_remaining_cycles -= count<<m_cyc_movem_l; } M68KMAKE_OP(movem, 32, er, .) { uint32_t i = 0; - uint32_t register_list = OPER_I_16(mc68kcpu); + uint32_t register_list = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_32; uint32_t count = 0; for(; i < 16; i++) if(register_list & (1 << i)) { - REG_DA(mc68kcpu)[i] = m68ki_read_32((mc68kcpu), ea); + REG_DA()[i] = m68ki_read_32(ea); ea += 4; count++; } - (mc68kcpu)->remaining_cycles -= count<<(mc68kcpu)->cyc_movem_l; + m_remaining_cycles -= count<<m_cyc_movem_l; } M68KMAKE_OP(movep, 16, re, .) { - uint32_t ea = EA_AY_DI_16(mc68kcpu); - uint32_t src = DX(mc68kcpu); + uint32_t ea = EA_AY_DI_16(); + uint32_t src = DX(); - m68ki_write_8((mc68kcpu), ea, MASK_OUT_ABOVE_8(src >> 8)); - m68ki_write_8((mc68kcpu), ea += 2, MASK_OUT_ABOVE_8(src)); + m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 8)); + m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src)); } M68KMAKE_OP(movep, 32, re, .) { - uint32_t ea = EA_AY_DI_32(mc68kcpu); - uint32_t src = DX(mc68kcpu); + uint32_t ea = EA_AY_DI_32(); + uint32_t src = DX(); - m68ki_write_8((mc68kcpu), ea, MASK_OUT_ABOVE_8(src >> 24)); - m68ki_write_8((mc68kcpu), ea += 2, MASK_OUT_ABOVE_8(src >> 16)); - m68ki_write_8((mc68kcpu), ea += 2, MASK_OUT_ABOVE_8(src >> 8)); - m68ki_write_8((mc68kcpu), ea += 2, MASK_OUT_ABOVE_8(src)); + m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 24)); + m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 16)); + m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 8)); + m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src)); } M68KMAKE_OP(movep, 16, er, .) { - uint32_t ea = EA_AY_DI_16(mc68kcpu); - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t ea = EA_AY_DI_16(); + uint32_t* r_dst = &DX(); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | ((m68ki_read_8((mc68kcpu), ea) << 8) + m68ki_read_8((mc68kcpu), ea + 2)); + *r_dst = MASK_OUT_BELOW_16(*r_dst) | ((m68ki_read_8(ea) << 8) + m68ki_read_8(ea + 2)); } M68KMAKE_OP(movep, 32, er, .) { - uint32_t ea = EA_AY_DI_32(mc68kcpu); + uint32_t ea = EA_AY_DI_32(); - DX(mc68kcpu) = (m68ki_read_8((mc68kcpu), ea) << 24) + (m68ki_read_8((mc68kcpu), ea + 2) << 16) - + (m68ki_read_8((mc68kcpu), ea + 4) << 8) + m68ki_read_8((mc68kcpu), ea + 6); + DX() = (m68ki_read_8(ea) << 24) + (m68ki_read_8(ea + 2) << 16) + + (m68ki_read_8(ea + 4) << 8) + m68ki_read_8(ea + 6); } M68KMAKE_OP(moves, 8, ., .) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_8; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ if(BIT_B(word2)) /* Register to memory */ { - m68ki_write_8_fc((mc68kcpu), ea, (mc68kcpu)->dfc, MASK_OUT_ABOVE_8(REG_DA(mc68kcpu)[(word2 >> 12) & 15])); + m68ki_write_8_fc(ea, m_dfc, MASK_OUT_ABOVE_8(REG_DA()[(word2 >> 12) & 15])); return; } if(BIT_F(word2)) /* Memory to address register */ { - REG_A(mc68kcpu)[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc((mc68kcpu), ea, (mc68kcpu)->sfc)); - if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type)) - (mc68kcpu)->remaining_cycles -= 2; + REG_A()[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, m_sfc)); + if(CPU_TYPE_IS_020_VARIANT()) + m_remaining_cycles -= 2; return; } /* Memory to data register */ - REG_D(mc68kcpu)[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D(mc68kcpu)[(word2 >> 12) & 7]) | m68ki_read_8_fc((mc68kcpu), ea, (mc68kcpu)->sfc); - if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type)) - (mc68kcpu)->remaining_cycles -= 2; + REG_D()[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D()[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, m_sfc); + if(CPU_TYPE_IS_020_VARIANT()) + m_remaining_cycles -= 2; return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(moves, 16, ., .) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_16; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ if(BIT_B(word2)) /* Register to memory */ { - m68ki_write_16_fc((mc68kcpu), ea, (mc68kcpu)->dfc, MASK_OUT_ABOVE_16(REG_DA(mc68kcpu)[(word2 >> 12) & 15])); + m68ki_write_16_fc(ea, m_dfc, MASK_OUT_ABOVE_16(REG_DA()[(word2 >> 12) & 15])); return; } if(BIT_F(word2)) /* Memory to address register */ { - REG_A(mc68kcpu)[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc((mc68kcpu), ea, (mc68kcpu)->sfc)); - if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type)) - (mc68kcpu)->remaining_cycles -= 2; + REG_A()[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, m_sfc)); + if(CPU_TYPE_IS_020_VARIANT()) + m_remaining_cycles -= 2; return; } /* Memory to data register */ - REG_D(mc68kcpu)[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D(mc68kcpu)[(word2 >> 12) & 7]) | m68ki_read_16_fc((mc68kcpu), ea, (mc68kcpu)->sfc); - if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type)) - (mc68kcpu)->remaining_cycles -= 2; + REG_D()[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D()[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, m_sfc); + if(CPU_TYPE_IS_020_VARIANT()) + m_remaining_cycles -= 2; return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(moves, 32, ., .) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_32; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ if(BIT_B(word2)) /* Register to memory */ { - m68ki_write_32_fc((mc68kcpu), ea, (mc68kcpu)->dfc, REG_DA(mc68kcpu)[(word2 >> 12) & 15]); - if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type)) - (mc68kcpu)->remaining_cycles -= 2; + m68ki_write_32_fc(ea, m_dfc, REG_DA()[(word2 >> 12) & 15]); + if(CPU_TYPE_IS_020_VARIANT()) + m_remaining_cycles -= 2; return; } /* Memory to register */ - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = m68ki_read_32_fc((mc68kcpu), ea, (mc68kcpu)->sfc); - if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type)) - (mc68kcpu)->remaining_cycles -= 2; + REG_DA()[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, m_sfc); + if(CPU_TYPE_IS_020_VARIANT()) + m_remaining_cycles -= 2; return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(moveq, 32, ., .) { - uint32_t res = DX(mc68kcpu) = MAKE_INT_8(MASK_OUT_ABOVE_8((mc68kcpu)->ir)); + uint32_t res = DX() = MAKE_INT_8(MASK_OUT_ABOVE_8(m_ir)); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move16, 32, ., .) { - uint16_t w2 = OPER_I_16(mc68kcpu); - int ax = (mc68kcpu)->ir & 7; + uint16_t w2 = OPER_I_16(); + int ax = m_ir & 7; int ay = (w2 >> 12) & 7; - m68ki_write_32((mc68kcpu), REG_A(mc68kcpu)[ay], m68ki_read_32((mc68kcpu), REG_A(mc68kcpu)[ax])); - m68ki_write_32((mc68kcpu), REG_A(mc68kcpu)[ay]+4, m68ki_read_32((mc68kcpu), REG_A(mc68kcpu)[ax]+4)); - m68ki_write_32((mc68kcpu), REG_A(mc68kcpu)[ay]+8, m68ki_read_32((mc68kcpu), REG_A(mc68kcpu)[ax]+8)); - m68ki_write_32((mc68kcpu), REG_A(mc68kcpu)[ay]+12, m68ki_read_32((mc68kcpu), REG_A(mc68kcpu)[ax]+12)); + m68ki_write_32(REG_A()[ay], m68ki_read_32(REG_A()[ax])); + m68ki_write_32(REG_A()[ay]+4, m68ki_read_32(REG_A()[ax]+4)); + m68ki_write_32(REG_A()[ay]+8, m68ki_read_32(REG_A()[ax]+8)); + m68ki_write_32(REG_A()[ay]+12, m68ki_read_32(REG_A()[ax]+12)); - REG_A(mc68kcpu)[ax] += 16; - REG_A(mc68kcpu)[ay] += 16; + REG_A()[ax] += 16; + REG_A()[ay] += 16; } M68KMAKE_OP(muls, 16, ., d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t res = MASK_OUT_ABOVE_32(MAKE_INT_16(DY(mc68kcpu)) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + uint32_t* r_dst = &DX(); + uint32_t res = MASK_OUT_ABOVE_32(MAKE_INT_16(DY()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); *r_dst = res; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = res; + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(muls, 16, ., .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t res = MASK_OUT_ABOVE_32(MAKE_INT_16(M68KMAKE_GET_OPER_AY_16) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); *r_dst = res; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = res; + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(mulu, 16, ., d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)) * MASK_OUT_ABOVE_16(*r_dst); + uint32_t* r_dst = &DX(); + uint32_t res = MASK_OUT_ABOVE_16(DY()) * MASK_OUT_ABOVE_16(*r_dst); *r_dst = res; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = res; + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(mulu, 16, ., .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t res = M68KMAKE_GET_OPER_AY_16 * MASK_OUT_ABOVE_16(*r_dst); *r_dst = res; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = res; + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(mull, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint64_t src = DY(mc68kcpu); - uint64_t dst = REG_D(mc68kcpu)[(word2 >> 12) & 7]; + uint32_t word2 = OPER_I_16(); + uint64_t src = DY(); + uint64_t dst = REG_D()[(word2 >> 12) & 7]; uint64_t res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; if(BIT_B(word2)) /* signed */ { res = (int64_t)((int32_t)src) * (int64_t)((int32_t)dst); if(!BIT_A(word2)) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = ((int64_t)res != (int32_t)res)<<7; - REG_D(mc68kcpu)[(word2 >> 12) & 7] = (mc68kcpu)->not_z_flag; + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = ((int64_t)res != (int32_t)res)<<7; + REG_D()[(word2 >> 12) & 7] = m_not_z_flag; return; } - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res) | (res>>32); - (mc68kcpu)->n_flag = NFLAG_64(res); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - REG_D(mc68kcpu)[word2 & 7] = (res >> 32); - REG_D(mc68kcpu)[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res) | (res>>32); + m_n_flag = NFLAG_64(res); + m_v_flag = VFLAG_CLEAR; + REG_D()[word2 & 7] = (res >> 32); + REG_D()[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); return; } res = src * dst; if(!BIT_A(word2)) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = (res > 0xffffffff)<<7; - REG_D(mc68kcpu)[(word2 >> 12) & 7] = (mc68kcpu)->not_z_flag; + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = (res > 0xffffffff)<<7; + REG_D()[(word2 >> 12) & 7] = m_not_z_flag; return; } - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res) | (res>>32); - (mc68kcpu)->n_flag = NFLAG_64(res); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - REG_D(mc68kcpu)[word2 & 7] = (res >> 32); - REG_D(mc68kcpu)[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res) | (res>>32); + m_n_flag = NFLAG_64(res); + m_v_flag = VFLAG_CLEAR; + REG_D()[word2 & 7] = (res >> 32); + REG_D()[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(mull, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint64_t src = M68KMAKE_GET_OPER_AY_32; - uint64_t dst = REG_D(mc68kcpu)[(word2 >> 12) & 7]; + uint64_t dst = REG_D()[(word2 >> 12) & 7]; uint64_t res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; if(BIT_B(word2)) /* signed */ { res = (int64_t)((int32_t)src) * (int64_t)((int32_t)dst); if(!BIT_A(word2)) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = ((int64_t)res != (int32_t)res)<<7; - REG_D(mc68kcpu)[(word2 >> 12) & 7] = (mc68kcpu)->not_z_flag; + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = ((int64_t)res != (int32_t)res)<<7; + REG_D()[(word2 >> 12) & 7] = m_not_z_flag; return; } - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res) | (res>>32); - (mc68kcpu)->n_flag = NFLAG_64(res); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - REG_D(mc68kcpu)[word2 & 7] = (res >> 32); - REG_D(mc68kcpu)[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res) | (res>>32); + m_n_flag = NFLAG_64(res); + m_v_flag = VFLAG_CLEAR; + REG_D()[word2 & 7] = (res >> 32); + REG_D()[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); return; } res = src * dst; if(!BIT_A(word2)) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = (res > 0xffffffff)<<7; - REG_D(mc68kcpu)[(word2 >> 12) & 7] = (mc68kcpu)->not_z_flag; + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = (res > 0xffffffff)<<7; + REG_D()[(word2 >> 12) & 7] = m_not_z_flag; return; } - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res) | (res>>32); - (mc68kcpu)->n_flag = NFLAG_64(res); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - REG_D(mc68kcpu)[word2 & 7] = (res >> 32); - REG_D(mc68kcpu)[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res) | (res>>32); + m_n_flag = NFLAG_64(res); + m_v_flag = VFLAG_CLEAR; + REG_D()[word2 & 7] = (res >> 32); + REG_D()[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(nbcd, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); - uint32_t res = -dst - XFLAG_1(mc68kcpu); + uint32_t res = -dst - XFLAG_1(); if(res != 0) { - (mc68kcpu)->v_flag = res; /* Undefined V behavior */ + m_v_flag = res; /* Undefined V behavior */ if(((res|dst) & 0x0f) == 0) res = (res & 0xf0) | 6; res = MASK_OUT_ABOVE_8(res + 0x9a); - (mc68kcpu)->v_flag &= ~res; /* Undefined V behavior part II */ + m_v_flag &= ~res; /* Undefined V behavior part II */ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->not_z_flag |= res; - (mc68kcpu)->c_flag = CFLAG_SET; - (mc68kcpu)->x_flag = XFLAG_SET; + m_not_z_flag |= res; + m_c_flag = CFLAG_SET; + m_x_flag = XFLAG_SET; } else { - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->x_flag = XFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; } - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ } M68KMAKE_OP(nbcd, 8, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = -dst - XFLAG_1(mc68kcpu); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = -dst - XFLAG_1(); if(res != 0) { - (mc68kcpu)->v_flag = res; /* Undefined V behavior */ + m_v_flag = res; /* Undefined V behavior */ if(((res|dst) & 0x0f) == 0) res = (res & 0xf0) | 6; res = MASK_OUT_ABOVE_8(res + 0x9a); - (mc68kcpu)->v_flag &= ~res; /* Undefined V behavior part II */ + m_v_flag &= ~res; /* Undefined V behavior part II */ - m68ki_write_8((mc68kcpu), ea, MASK_OUT_ABOVE_8(res)); + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); - (mc68kcpu)->not_z_flag |= res; - (mc68kcpu)->c_flag = CFLAG_SET; - (mc68kcpu)->x_flag = XFLAG_SET; + m_not_z_flag |= res; + m_c_flag = CFLAG_SET; + m_x_flag = XFLAG_SET; } else { - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->x_flag = XFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; } - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ } M68KMAKE_OP(neg, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t res = 0 - MASK_OUT_ABOVE_8(*r_dst); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = *r_dst & res; - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_c_flag = m_x_flag = CFLAG_8(res); + m_v_flag = *r_dst & res; + m_not_z_flag = MASK_OUT_ABOVE_8(res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(neg, 8, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = m68ki_read_8((mc68kcpu), ea); + uint32_t src = m68ki_read_8(ea); uint32_t res = 0 - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = src & res; - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_c_flag = m_x_flag = CFLAG_8(res); + m_v_flag = src & res; + m_not_z_flag = MASK_OUT_ABOVE_8(res); - m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_8(ea, m_not_z_flag); } M68KMAKE_OP(neg, 16, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t res = 0 - MASK_OUT_ABOVE_16(*r_dst); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = (*r_dst & res)>>8; - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_c_flag = m_x_flag = CFLAG_16(res); + m_v_flag = (*r_dst & res)>>8; + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(neg, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); + uint32_t src = m68ki_read_16(ea); uint32_t res = 0 - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = (src & res)>>8; - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_c_flag = m_x_flag = CFLAG_16(res); + m_v_flag = (src & res)>>8; + m_not_z_flag = MASK_OUT_ABOVE_16(res); - m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_16(ea, m_not_z_flag); } M68KMAKE_OP(neg, 32, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t res = 0 - *r_dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_SUB_32(*r_dst, 0, res); - (mc68kcpu)->v_flag = (*r_dst & res)>>24; - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_c_flag = m_x_flag = CFLAG_SUB_32(*r_dst, 0, res); + m_v_flag = (*r_dst & res)>>24; + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(neg, 32, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t src = m68ki_read_32((mc68kcpu), ea); + uint32_t src = m68ki_read_32(ea); uint32_t res = 0 - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_SUB_32(src, 0, res); - (mc68kcpu)->v_flag = (src & res)>>24; - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_c_flag = m_x_flag = CFLAG_SUB_32(src, 0, res); + m_v_flag = (src & res)>>24; + m_not_z_flag = MASK_OUT_ABOVE_32(res); - m68ki_write_32((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_32(ea, m_not_z_flag); } M68KMAKE_OP(negx, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t res = 0 - MASK_OUT_ABOVE_8(*r_dst) - XFLAG_1(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t res = 0 - MASK_OUT_ABOVE_8(*r_dst) - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = *r_dst & res; + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = *r_dst & res; res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; } @@ -7779,31 +7774,31 @@ M68KMAKE_OP(negx, 8, ., d) M68KMAKE_OP(negx, 8, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = m68ki_read_8((mc68kcpu), ea); - uint32_t res = 0 - src - XFLAG_1(mc68kcpu); + uint32_t src = m68ki_read_8(ea); + uint32_t res = 0 - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = src & res; + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = src & res; res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(negx, 16, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t res = 0 - MASK_OUT_ABOVE_16(*r_dst) - XFLAG_1(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t res = 0 - MASK_OUT_ABOVE_16(*r_dst) - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = (*r_dst & res)>>8; + m_n_flag = NFLAG_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = (*r_dst & res)>>8; res = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; } @@ -7812,31 +7807,31 @@ M68KMAKE_OP(negx, 16, ., d) M68KMAKE_OP(negx, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); - uint32_t res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_1(mc68kcpu); + uint32_t src = m68ki_read_16(ea); + uint32_t res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = (src & res)>>8; + m_n_flag = NFLAG_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = (src & res)>>8; res = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); } M68KMAKE_OP(negx, 32, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t res = 0 - MASK_OUT_ABOVE_32(*r_dst) - XFLAG_1(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t res = 0 - MASK_OUT_ABOVE_32(*r_dst) - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(*r_dst, 0, res); - (mc68kcpu)->v_flag = (*r_dst & res)>>24; + m_n_flag = NFLAG_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(*r_dst, 0, res); + m_v_flag = (*r_dst & res)>>24; res = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = res; } @@ -7845,392 +7840,392 @@ M68KMAKE_OP(negx, 32, ., d) M68KMAKE_OP(negx, 32, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t src = m68ki_read_32((mc68kcpu), ea); - uint32_t res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_1(mc68kcpu); + uint32_t src = m68ki_read_32(ea); + uint32_t res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, 0, res); - (mc68kcpu)->v_flag = (src & res)>>24; + m_n_flag = NFLAG_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, 0, res); + m_v_flag = (src & res)>>24; res = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); } M68KMAKE_OP(nop, 0, ., .) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ } M68KMAKE_OP(not, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t res = MASK_OUT_ABOVE_8(~*r_dst); *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(not, 8, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t res = MASK_OUT_ABOVE_8(~m68ki_read_8((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(not, 16, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t res = MASK_OUT_ABOVE_16(~*r_dst); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(not, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t res = MASK_OUT_ABOVE_16(~m68ki_read_16((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea)); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(not, 32, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t res = *r_dst = MASK_OUT_ABOVE_32(~*r_dst); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(not, 32, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t res = MASK_OUT_ABOVE_32(~m68ki_read_32((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea)); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 8, er, d) { - uint32_t res = MASK_OUT_ABOVE_8((DX(mc68kcpu) |= MASK_OUT_ABOVE_8(DY(mc68kcpu)))); + uint32_t res = MASK_OUT_ABOVE_8((DX() |= MASK_OUT_ABOVE_8(DY()))); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 8, er, .) { - uint32_t res = MASK_OUT_ABOVE_8((DX(mc68kcpu) |= M68KMAKE_GET_OPER_AY_8)); + uint32_t res = MASK_OUT_ABOVE_8((DX() |= M68KMAKE_GET_OPER_AY_8)); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 16, er, d) { - uint32_t res = MASK_OUT_ABOVE_16((DX(mc68kcpu) |= MASK_OUT_ABOVE_16(DY(mc68kcpu)))); + uint32_t res = MASK_OUT_ABOVE_16((DX() |= MASK_OUT_ABOVE_16(DY()))); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 16, er, .) { - uint32_t res = MASK_OUT_ABOVE_16((DX(mc68kcpu) |= M68KMAKE_GET_OPER_AY_16)); + uint32_t res = MASK_OUT_ABOVE_16((DX() |= M68KMAKE_GET_OPER_AY_16)); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 32, er, d) { - uint32_t res = DX(mc68kcpu) |= DY(mc68kcpu); + uint32_t res = DX() |= DY(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 32, er, .) { - uint32_t res = DX(mc68kcpu) |= M68KMAKE_GET_OPER_AY_32; + uint32_t res = DX() |= M68KMAKE_GET_OPER_AY_32; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 8, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t res = MASK_OUT_ABOVE_8(DX(mc68kcpu) | m68ki_read_8((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_8(DX() | m68ki_read_8(ea)); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 16, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t res = MASK_OUT_ABOVE_16(DX(mc68kcpu) | m68ki_read_16((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_16(DX() | m68ki_read_16(ea)); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 32, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t res = DX(mc68kcpu) | m68ki_read_32((mc68kcpu), ea); + uint32_t res = DX() | m68ki_read_32(ea); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ori, 8, ., d) { - uint32_t res = MASK_OUT_ABOVE_8((DY(mc68kcpu) |= OPER_I_8(mc68kcpu))); + uint32_t res = MASK_OUT_ABOVE_8((DY() |= OPER_I_8())); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ori, 8, ., .) { - uint32_t src = OPER_I_8(mc68kcpu); + uint32_t src = OPER_I_8(); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t res = MASK_OUT_ABOVE_8(src | m68ki_read_8((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ori, 16, ., d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu) |= OPER_I_16(mc68kcpu)); + uint32_t res = MASK_OUT_ABOVE_16(DY() |= OPER_I_16()); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ori, 16, ., .) { - uint32_t src = OPER_I_16(mc68kcpu); + uint32_t src = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t res = MASK_OUT_ABOVE_16(src | m68ki_read_16((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea)); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ori, 32, ., d) { - uint32_t res = DY(mc68kcpu) |= OPER_I_32(mc68kcpu); + uint32_t res = DY() |= OPER_I_32(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ori, 32, ., .) { - uint32_t src = OPER_I_32(mc68kcpu); + uint32_t src = OPER_I_32(); uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t res = src | m68ki_read_32((mc68kcpu), ea); + uint32_t res = src | m68ki_read_32(ea); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ori, 16, toc, .) { - m68ki_set_ccr((mc68kcpu), m68ki_get_ccr(mc68kcpu) | OPER_I_16(mc68kcpu)); + m68ki_set_ccr(m68ki_get_ccr() | OPER_I_16()); } M68KMAKE_OP(ori, 16, tos, .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t src = OPER_I_16(mc68kcpu); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_set_sr((mc68kcpu), m68ki_get_sr(mc68kcpu) | src); + uint32_t src = OPER_I_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(m68ki_get_sr() | src); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(pack, 16, rr, .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - /* Note: DX(mc68kcpu) and DY(mc68kcpu) are reversed in Motorola's docs */ - uint32_t src = DY(mc68kcpu) + OPER_I_16(mc68kcpu); - uint32_t* r_dst = &DX(mc68kcpu); + /* Note: DX() and DY() are reversed in Motorola's docs */ + uint32_t src = DY() + OPER_I_16(); + uint32_t* r_dst = &DX(); *r_dst = MASK_OUT_BELOW_8(*r_dst) | ((src >> 4) & 0x00f0) | (src & 0x000f); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(pack, 16, mm, ax7) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { /* Note: AX and AY are reversed in Motorola's docs */ - uint32_t ea_src = EA_AY_PD_8(mc68kcpu); - uint32_t src = m68ki_read_8((mc68kcpu), ea_src); - ea_src = EA_AY_PD_8(mc68kcpu); - src = ((src << 8) | m68ki_read_8((mc68kcpu), ea_src)) + OPER_I_16(mc68kcpu); + uint32_t ea_src = EA_AY_PD_8(); + uint32_t src = m68ki_read_8(ea_src); + ea_src = EA_AY_PD_8(); + src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16(); - m68ki_write_8((mc68kcpu), EA_A7_PD_8(mc68kcpu), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0)); + m68ki_write_8(EA_A7_PD_8(), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0)); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(pack, 16, mm, ay7) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { /* Note: AX and AY are reversed in Motorola's docs */ - uint32_t ea_src = EA_A7_PD_8(mc68kcpu); - uint32_t src = m68ki_read_8((mc68kcpu), ea_src); - ea_src = EA_A7_PD_8(mc68kcpu); - src = ((src << 8) | m68ki_read_8((mc68kcpu), ea_src)) + OPER_I_16(mc68kcpu); + uint32_t ea_src = EA_A7_PD_8(); + uint32_t src = m68ki_read_8(ea_src); + ea_src = EA_A7_PD_8(); + src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16(); - m68ki_write_8((mc68kcpu), EA_AX_PD_8(mc68kcpu), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0)); + m68ki_write_8(EA_AX_PD_8(), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0)); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(pack, 16, mm, axy7) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t ea_src = EA_A7_PD_8(mc68kcpu); - uint32_t src = m68ki_read_8((mc68kcpu), ea_src); - ea_src = EA_A7_PD_8(mc68kcpu); - src = ((src << 8) | m68ki_read_8((mc68kcpu), ea_src)) + OPER_I_16(mc68kcpu); + uint32_t ea_src = EA_A7_PD_8(); + uint32_t src = m68ki_read_8(ea_src); + ea_src = EA_A7_PD_8(); + src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16(); - m68ki_write_8((mc68kcpu), EA_A7_PD_8(mc68kcpu), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0)); + m68ki_write_8(EA_A7_PD_8(), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0)); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(pack, 16, mm, .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { /* Note: AX and AY are reversed in Motorola's docs */ - uint32_t ea_src = EA_AY_PD_8(mc68kcpu); - uint32_t src = m68ki_read_8((mc68kcpu), ea_src); - ea_src = EA_AY_PD_8(mc68kcpu); - src = ((src << 8) | m68ki_read_8((mc68kcpu), ea_src)) + OPER_I_16(mc68kcpu); + uint32_t ea_src = EA_AY_PD_8(); + uint32_t src = m68ki_read_8(ea_src); + ea_src = EA_AY_PD_8(); + src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16(); - m68ki_write_8((mc68kcpu), EA_AX_PD_8(mc68kcpu), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0)); + m68ki_write_8(EA_AX_PD_8(), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0)); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } @@ -8238,975 +8233,975 @@ M68KMAKE_OP(pea, 32, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - m68ki_push_32((mc68kcpu), ea); + m68ki_push_32(ea); } M68KMAKE_OP(pflusha, 32, ., .) { - if ((CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) && ((mc68kcpu)->has_pmmu)) + if ((CPU_TYPE_IS_EC020_PLUS()) && (m_has_pmmu)) { - mc68kcpu->logerror("68040: unhandled PFLUSHA (ir=%04x)\n", mc68kcpu->ir); + logerror("68040: unhandled PFLUSHA (ir=%04x)\n", m_ir); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(pflushan, 32, ., .) { - if ((CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) && ((mc68kcpu)->has_pmmu)) + if ((CPU_TYPE_IS_EC020_PLUS()) && (m_has_pmmu)) { - mc68kcpu->logerror("68040: unhandled PFLUSHAN (ir=%04x)\n", mc68kcpu->ir); + logerror("68040: unhandled PFLUSHAN (ir=%04x)\n", m_ir); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(pmmu, 32, ., .) { - if ((CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) && ((mc68kcpu)->has_pmmu)) + if ((CPU_TYPE_IS_EC020_PLUS()) && (m_has_pmmu)) { - m68881_mmu_ops(mc68kcpu); + m68881_mmu_ops(); } else { - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } } M68KMAKE_OP(ptest, 32, ., .) { - if ((CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) && ((mc68kcpu)->has_pmmu)) + if ((CPU_TYPE_IS_040_PLUS()) && (m_has_pmmu)) { - mc68kcpu->logerror("68040: unhandled PTEST\n"); + logerror("68040: unhandled PTEST\n"); return; } else { - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } } M68KMAKE_OP(reset, 0, ., .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - if (!(mc68kcpu)->reset_instr_callback.isnull()) - ((mc68kcpu)->reset_instr_callback)(1); - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_reset; + if (!m_reset_instr_callback.isnull()) + (m_reset_instr_callback)(1); + m_remaining_cycles -= m_cyc_reset; return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(ror, 8, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t shift = orig_shift & 7; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = ROR_8(src, shift); if(orig_shift != 0) - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<<m_cyc_shift; *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = src << (9-orig_shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = src << (9-orig_shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ror, 16, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = ROR_16(src, shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = src << (9-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = src << (9-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ror, 32, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint64_t src = *r_dst; uint32_t res = ROR_32(src, shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = src << (9-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = src << (9-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ror, 8, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; uint32_t shift = orig_shift & 7; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = ROR_8(src, shift); if(orig_shift != 0) { - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<<m_cyc_shift; *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->c_flag = src << (8-((shift-1)&7)); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = src << (8-((shift-1)&7)); + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_8(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ror, 16, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; uint32_t shift = orig_shift & 15; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = ROR_16(src, shift); if(orig_shift != 0) { - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<<m_cyc_shift; *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->c_flag = (src >> ((shift - 1) & 15)) << 8; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = (src >> ((shift - 1) & 15)) << 8; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_16(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ror, 32, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; uint32_t shift = orig_shift & 31; uint64_t src = *r_dst; uint32_t res = ROR_32(src, shift); if(orig_shift != 0) { - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<<m_cyc_shift; *r_dst = res; - (mc68kcpu)->c_flag = (src >> ((shift - 1) & 31)) << 8; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = (src >> ((shift - 1) & 31)) << 8; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_32(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ror, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); + uint32_t src = m68ki_read_16(ea); uint32_t res = ROR_16(src, 1); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = src << 8; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = src << 8; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(rol, 8, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t shift = orig_shift & 7; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = ROL_8(src, shift); if(orig_shift != 0) - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<<m_cyc_shift; *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = src << orig_shift; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = src << orig_shift; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(rol, 16, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = ROL_16(src, shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = src >> (8-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = src >> (8-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(rol, 32, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint64_t src = *r_dst; uint32_t res = ROL_32(src, shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = src >> (24-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = src >> (24-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(rol, 8, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; uint32_t shift = orig_shift & 7; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = ROL_8(src, shift); if(orig_shift != 0) { - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<<m_cyc_shift; if(shift != 0) { *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->c_flag = src << shift; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = src << shift; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = (src & 1)<<8; - (mc68kcpu)->n_flag = NFLAG_8(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = (src & 1)<<8; + m_n_flag = NFLAG_8(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_8(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(rol, 16, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; uint32_t shift = orig_shift & 15; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = MASK_OUT_ABOVE_16(ROL_16(src, shift)); if(orig_shift != 0) { - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<<m_cyc_shift; if(shift != 0) { *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->c_flag = (src << shift) >> 8; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = (src << shift) >> 8; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = (src & 1)<<8; - (mc68kcpu)->n_flag = NFLAG_16(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = (src & 1)<<8; + m_n_flag = NFLAG_16(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_16(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(rol, 32, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; uint32_t shift = orig_shift & 31; uint64_t src = *r_dst; uint32_t res = ROL_32(src, shift); if(orig_shift != 0) { - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<<m_cyc_shift; *r_dst = res; - (mc68kcpu)->c_flag = (src >> ((32 - shift) & 0x1f)) << 8; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = (src >> ((32 - shift) & 0x1f)) << 8; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_32(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(rol, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); + uint32_t src = m68ki_read_16(ea); uint32_t res = MASK_OUT_ABOVE_16(ROL_16(src, 1)); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = src >> 7; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = src >> 7; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxr, 8, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); - uint32_t res = ROR_9(src | (XFLAG_1(mc68kcpu) << 8), shift); + uint32_t res = ROR_9(src | (XFLAG_1() << 8), shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res; + m_c_flag = m_x_flag = res; res = MASK_OUT_ABOVE_8(res); *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxr, 16, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); - uint32_t res = ROR_17(src | (XFLAG_1(mc68kcpu) << 16), shift); + uint32_t res = ROR_17(src | (XFLAG_1() << 16), shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res >> 8; + m_c_flag = m_x_flag = res >> 8; res = MASK_OUT_ABOVE_16(res); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxr, 32, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint64_t src = *r_dst; - uint64_t res = src | (((uint64_t)XFLAG_1(mc68kcpu)) << 32); + uint64_t res = src | (((uint64_t)XFLAG_1()) << 32); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; res = ROR_33_64(res, shift); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res >> 24; + m_c_flag = m_x_flag = res >> 24; res = MASK_OUT_ABOVE_32(res); *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxr, 8, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; if(orig_shift != 0) { uint32_t shift = orig_shift % 9; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); - uint32_t res = ROR_9(src | (XFLAG_1(mc68kcpu) << 8), shift); + uint32_t res = ROR_9(src | (XFLAG_1() << 8), shift); - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<<m_cyc_shift; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res; + m_c_flag = m_x_flag = res; res = MASK_OUT_ABOVE_8(res); *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag; - (mc68kcpu)->n_flag = NFLAG_8(*r_dst); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(*r_dst); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag; + m_n_flag = NFLAG_8(*r_dst); + m_not_z_flag = MASK_OUT_ABOVE_8(*r_dst); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxr, 16, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; if(orig_shift != 0) { uint32_t shift = orig_shift % 17; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); - uint32_t res = ROR_17(src | (XFLAG_1(mc68kcpu) << 16), shift); + uint32_t res = ROR_17(src | (XFLAG_1() << 16), shift); - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<<m_cyc_shift; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res >> 8; + m_c_flag = m_x_flag = res >> 8; res = MASK_OUT_ABOVE_16(res); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag; - (mc68kcpu)->n_flag = NFLAG_16(*r_dst); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(*r_dst); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag; + m_n_flag = NFLAG_16(*r_dst); + m_not_z_flag = MASK_OUT_ABOVE_16(*r_dst); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxr, 32, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; if(orig_shift != 0) { uint32_t shift = orig_shift % 33; uint64_t src = *r_dst; - uint64_t res = src | (((uint64_t)XFLAG_1(mc68kcpu)) << 32); + uint64_t res = src | (((uint64_t)XFLAG_1()) << 32); res = ROR_33_64(res, shift); - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<<m_cyc_shift; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res >> 24; + m_c_flag = m_x_flag = res >> 24; res = MASK_OUT_ABOVE_32(res); *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag; - (mc68kcpu)->n_flag = NFLAG_32(*r_dst); - (mc68kcpu)->not_z_flag = *r_dst; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag; + m_n_flag = NFLAG_32(*r_dst); + m_not_z_flag = *r_dst; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxr, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); - uint32_t res = ROR_17(src | (XFLAG_1(mc68kcpu) << 16), 1); + uint32_t src = m68ki_read_16(ea); + uint32_t res = ROR_17(src | (XFLAG_1() << 16), 1); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res >> 8; + m_c_flag = m_x_flag = res >> 8; res = MASK_OUT_ABOVE_16(res); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxl, 8, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); - uint32_t res = ROL_9(src | (XFLAG_1(mc68kcpu) << 8), shift); + uint32_t res = ROL_9(src | (XFLAG_1() << 8), shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res; + m_c_flag = m_x_flag = res; res = MASK_OUT_ABOVE_8(res); *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxl, 16, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); - uint32_t res = ROL_17(src | (XFLAG_1(mc68kcpu) << 16), shift); + uint32_t res = ROL_17(src | (XFLAG_1() << 16), shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res >> 8; + m_c_flag = m_x_flag = res >> 8; res = MASK_OUT_ABOVE_16(res); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxl, 32, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint64_t src = *r_dst; - uint64_t res = src | (((uint64_t)XFLAG_1(mc68kcpu)) << 32); + uint64_t res = src | (((uint64_t)XFLAG_1()) << 32); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<<m_cyc_shift; res = ROL_33_64(res, shift); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res >> 24; + m_c_flag = m_x_flag = res >> 24; res = MASK_OUT_ABOVE_32(res); *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxl, 8, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; if(orig_shift != 0) { uint32_t shift = orig_shift % 9; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); - uint32_t res = ROL_9(src | (XFLAG_1(mc68kcpu) << 8), shift); + uint32_t res = ROL_9(src | (XFLAG_1() << 8), shift); - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<<m_cyc_shift; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res; + m_c_flag = m_x_flag = res; res = MASK_OUT_ABOVE_8(res); *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag; - (mc68kcpu)->n_flag = NFLAG_8(*r_dst); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(*r_dst); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag; + m_n_flag = NFLAG_8(*r_dst); + m_not_z_flag = MASK_OUT_ABOVE_8(*r_dst); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxl, 16, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; if(orig_shift != 0) { uint32_t shift = orig_shift % 17; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); - uint32_t res = ROL_17(src | (XFLAG_1(mc68kcpu) << 16), shift); + uint32_t res = ROL_17(src | (XFLAG_1() << 16), shift); - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<<m_cyc_shift; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res >> 8; + m_c_flag = m_x_flag = res >> 8; res = MASK_OUT_ABOVE_16(res); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag; - (mc68kcpu)->n_flag = NFLAG_16(*r_dst); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(*r_dst); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag; + m_n_flag = NFLAG_16(*r_dst); + m_not_z_flag = MASK_OUT_ABOVE_16(*r_dst); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxl, 32, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; if(orig_shift != 0) { uint32_t shift = orig_shift % 33; uint64_t src = *r_dst; - uint64_t res = src | (((uint64_t)XFLAG_1(mc68kcpu)) << 32); + uint64_t res = src | (((uint64_t)XFLAG_1()) << 32); res = ROL_33_64(res, shift); - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<<m_cyc_shift; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res >> 24; + m_c_flag = m_x_flag = res >> 24; res = MASK_OUT_ABOVE_32(res); *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag; - (mc68kcpu)->n_flag = NFLAG_32(*r_dst); - (mc68kcpu)->not_z_flag = *r_dst; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag; + m_n_flag = NFLAG_32(*r_dst); + m_not_z_flag = *r_dst; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxl, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); - uint32_t res = ROL_17(src | (XFLAG_1(mc68kcpu) << 16), 1); + uint32_t src = m68ki_read_16(ea); + uint32_t res = ROL_17(src | (XFLAG_1() << 16), 1); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res >> 8; + m_c_flag = m_x_flag = res >> 8; res = MASK_OUT_ABOVE_16(res); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(rtd, 32, ., .) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - uint32_t new_pc = m68ki_pull_32(mc68kcpu); + uint32_t new_pc = m68ki_pull_32(); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - REG_A(mc68kcpu)[7] = MASK_OUT_ABOVE_32(REG_A(mc68kcpu)[7] + MAKE_INT_16(OPER_I_16(mc68kcpu))); - m68ki_jump((mc68kcpu), new_pc); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + REG_A()[7] = MASK_OUT_ABOVE_32(REG_A()[7] + MAKE_INT_16(OPER_I_16())); + m68ki_jump(new_pc); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(rte, 32, ., .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { uint32_t new_sr; uint32_t new_pc; uint32_t format_word; - if (!(mc68kcpu)->rte_instr_callback.isnull()) - ((mc68kcpu)->rte_instr_callback)(1); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ + if (!m_rte_instr_callback.isnull()) + (m_rte_instr_callback)(1); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ - if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_000()) { - new_sr = m68ki_pull_16(mc68kcpu); - new_pc = m68ki_pull_32(mc68kcpu); - m68ki_jump((mc68kcpu), new_pc); - m68ki_set_sr((mc68kcpu), new_sr); + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; return; } - if(CPU_TYPE_IS_010((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010()) { - format_word = m68ki_read_16((mc68kcpu), REG_A(mc68kcpu)[7]+6) >> 12; + format_word = m68ki_read_16(REG_A()[7]+6) >> 12; if(format_word == 0) { - new_sr = m68ki_pull_16(mc68kcpu); - new_pc = m68ki_pull_32(mc68kcpu); - m68ki_fake_pull_16(mc68kcpu); /* format word */ - m68ki_jump((mc68kcpu), new_pc); - m68ki_set_sr((mc68kcpu), new_sr); - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_fake_pull_16(); /* format word */ + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; return; } - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; /* Not handling bus fault (9) */ - m68ki_exception_format_error(mc68kcpu); + m68ki_exception_format_error(); return; } /* Otherwise it's 020 */ rte_loop: - format_word = m68ki_read_16((mc68kcpu), REG_A(mc68kcpu)[7]+6) >> 12; + format_word = m68ki_read_16(REG_A()[7]+6) >> 12; switch(format_word) { case 0: /* Normal */ - new_sr = m68ki_pull_16(mc68kcpu); - new_pc = m68ki_pull_32(mc68kcpu); - m68ki_fake_pull_16(mc68kcpu); /* format word */ - m68ki_jump((mc68kcpu), new_pc); - m68ki_set_sr((mc68kcpu), new_sr); - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_fake_pull_16(); /* format word */ + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; return; case 1: /* Throwaway */ - new_sr = m68ki_pull_16(mc68kcpu); - m68ki_fake_pull_32(mc68kcpu); /* program counter */ - m68ki_fake_pull_16(mc68kcpu); /* format word */ - m68ki_set_sr_noint((mc68kcpu), new_sr); + new_sr = m68ki_pull_16(); + m68ki_fake_pull_32(); /* program counter */ + m68ki_fake_pull_16(); /* format word */ + m68ki_set_sr_noint(new_sr); goto rte_loop; case 2: /* Trap */ - new_sr = m68ki_pull_16(mc68kcpu); - new_pc = m68ki_pull_32(mc68kcpu); - m68ki_fake_pull_16(mc68kcpu); /* format word */ - m68ki_fake_pull_32(mc68kcpu); /* address */ - m68ki_jump((mc68kcpu), new_pc); - m68ki_set_sr((mc68kcpu), new_sr); - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_fake_pull_16(); /* format word */ + m68ki_fake_pull_32(); /* address */ + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; return; case 7: /* 68040 access error */ - new_sr = m68ki_pull_16(mc68kcpu); - new_pc = m68ki_pull_32(mc68kcpu); - m68ki_fake_pull_16(mc68kcpu); /* $06: format word */ - m68ki_fake_pull_32(mc68kcpu); /* $08: effective address */ - m68ki_fake_pull_16(mc68kcpu); /* $0c: special status word */ - m68ki_fake_pull_16(mc68kcpu); /* $0e: wb3s */ - m68ki_fake_pull_16(mc68kcpu); /* $10: wb2s */ - m68ki_fake_pull_16(mc68kcpu); /* $12: wb1s */ - m68ki_fake_pull_32(mc68kcpu); /* $14: data fault address */ - m68ki_fake_pull_32(mc68kcpu); /* $18: wb3a */ - m68ki_fake_pull_32(mc68kcpu); /* $1c: wb3d */ - m68ki_fake_pull_32(mc68kcpu); /* $20: wb2a */ - m68ki_fake_pull_32(mc68kcpu); /* $24: wb2d */ - m68ki_fake_pull_32(mc68kcpu); /* $28: wb1a */ - m68ki_fake_pull_32(mc68kcpu); /* $2c: wb1d/pd0 */ - m68ki_fake_pull_32(mc68kcpu); /* $30: pd1 */ - m68ki_fake_pull_32(mc68kcpu); /* $34: pd2 */ - m68ki_fake_pull_32(mc68kcpu); /* $38: pd3 */ - m68ki_jump((mc68kcpu), new_pc); - m68ki_set_sr((mc68kcpu), new_sr); - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_fake_pull_16(); /* $06: format word */ + m68ki_fake_pull_32(); /* $08: effective address */ + m68ki_fake_pull_16(); /* $0c: special status word */ + m68ki_fake_pull_16(); /* $0e: wb3s */ + m68ki_fake_pull_16(); /* $10: wb2s */ + m68ki_fake_pull_16(); /* $12: wb1s */ + m68ki_fake_pull_32(); /* $14: data fault address */ + m68ki_fake_pull_32(); /* $18: wb3a */ + m68ki_fake_pull_32(); /* $1c: wb3d */ + m68ki_fake_pull_32(); /* $20: wb2a */ + m68ki_fake_pull_32(); /* $24: wb2d */ + m68ki_fake_pull_32(); /* $28: wb1a */ + m68ki_fake_pull_32(); /* $2c: wb1d/pd0 */ + m68ki_fake_pull_32(); /* $30: pd1 */ + m68ki_fake_pull_32(); /* $34: pd2 */ + m68ki_fake_pull_32(); /* $38: pd3 */ + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; return; case 0x0a: /* Bus Error at instruction boundary */ - new_sr = m68ki_pull_16(mc68kcpu); - new_pc = m68ki_pull_32(mc68kcpu); - m68ki_fake_pull_16(mc68kcpu); /* $06: format word */ - m68ki_fake_pull_16(mc68kcpu); /* $08: internal register */ - m68ki_fake_pull_16(mc68kcpu); /* $0a: special status word */ - m68ki_fake_pull_16(mc68kcpu); /* $0c: instruction pipe stage c */ - m68ki_fake_pull_16(mc68kcpu); /* $0e: instruction pipe stage b */ - m68ki_fake_pull_32(mc68kcpu); /* $10: data fault address */ - m68ki_fake_pull_32(mc68kcpu); /* $14: internal registers */ - m68ki_fake_pull_32(mc68kcpu); /* $18: data output buffer */ - m68ki_fake_pull_32(mc68kcpu); /* $1c: internal registers */ - - m68ki_jump((mc68kcpu), new_pc); - m68ki_set_sr((mc68kcpu), new_sr); - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_fake_pull_16(); /* $06: format word */ + m68ki_fake_pull_16(); /* $08: internal register */ + m68ki_fake_pull_16(); /* $0a: special status word */ + m68ki_fake_pull_16(); /* $0c: instruction pipe stage c */ + m68ki_fake_pull_16(); /* $0e: instruction pipe stage b */ + m68ki_fake_pull_32(); /* $10: data fault address */ + m68ki_fake_pull_32(); /* $14: internal registers */ + m68ki_fake_pull_32(); /* $18: data output buffer */ + m68ki_fake_pull_32(); /* $1c: internal registers */ + + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; return; case 0x0b: /* Bus Error - Instruction Execution in Progress */ - new_sr = m68ki_pull_16(mc68kcpu); - new_pc = m68ki_pull_32(mc68kcpu); - m68ki_fake_pull_16(mc68kcpu); /* $06: format word */ - m68ki_fake_pull_16(mc68kcpu); /* $08: internal register */ - m68ki_fake_pull_16(mc68kcpu); /* $0a: special status word */ - m68ki_fake_pull_16(mc68kcpu); /* $0c: instruction pipe stage c */ - m68ki_fake_pull_16(mc68kcpu); /* $0e: instruction pipe stage b */ - m68ki_fake_pull_32(mc68kcpu); /* $10: data fault address */ - m68ki_fake_pull_32(mc68kcpu); /* $14: internal registers */ - m68ki_fake_pull_32(mc68kcpu); /* $18: data output buffer */ - m68ki_fake_pull_32(mc68kcpu); /* $1c: internal registers */ - m68ki_fake_pull_32(mc68kcpu); /* $20: */ - m68ki_fake_pull_32(mc68kcpu); /* $24: stage B address */ - m68ki_fake_pull_32(mc68kcpu); /* $28: */ - m68ki_fake_pull_32(mc68kcpu); /* $2c: data input buffer */ - m68ki_fake_pull_32(mc68kcpu); /* $30: */ - m68ki_fake_pull_16(mc68kcpu); /* $34: */ - m68ki_fake_pull_16(mc68kcpu); /* $36: version #, internal information */ - m68ki_fake_pull_32(mc68kcpu); /* $38: */ - m68ki_fake_pull_32(mc68kcpu); /* $3c: */ - m68ki_fake_pull_32(mc68kcpu); /* $40: */ - m68ki_fake_pull_32(mc68kcpu); /* $44: */ - m68ki_fake_pull_32(mc68kcpu); /* $48: */ - m68ki_fake_pull_32(mc68kcpu); /* $4c: */ - m68ki_fake_pull_32(mc68kcpu); /* $50: */ - m68ki_fake_pull_32(mc68kcpu); /* $54: */ - m68ki_fake_pull_32(mc68kcpu); /* $58: */ - - m68ki_jump((mc68kcpu), new_pc); - m68ki_set_sr((mc68kcpu), new_sr); - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_fake_pull_16(); /* $06: format word */ + m68ki_fake_pull_16(); /* $08: internal register */ + m68ki_fake_pull_16(); /* $0a: special status word */ + m68ki_fake_pull_16(); /* $0c: instruction pipe stage c */ + m68ki_fake_pull_16(); /* $0e: instruction pipe stage b */ + m68ki_fake_pull_32(); /* $10: data fault address */ + m68ki_fake_pull_32(); /* $14: internal registers */ + m68ki_fake_pull_32(); /* $18: data output buffer */ + m68ki_fake_pull_32(); /* $1c: internal registers */ + m68ki_fake_pull_32(); /* $20: */ + m68ki_fake_pull_32(); /* $24: stage B address */ + m68ki_fake_pull_32(); /* $28: */ + m68ki_fake_pull_32(); /* $2c: data input buffer */ + m68ki_fake_pull_32(); /* $30: */ + m68ki_fake_pull_16(); /* $34: */ + m68ki_fake_pull_16(); /* $36: version #, internal information */ + m68ki_fake_pull_32(); /* $38: */ + m68ki_fake_pull_32(); /* $3c: */ + m68ki_fake_pull_32(); /* $40: */ + m68ki_fake_pull_32(); /* $44: */ + m68ki_fake_pull_32(); /* $48: */ + m68ki_fake_pull_32(); /* $4c: */ + m68ki_fake_pull_32(); /* $50: */ + m68ki_fake_pull_32(); /* $54: */ + m68ki_fake_pull_32(); /* $58: */ + + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; return; } /* Not handling long or short bus fault */ - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; - m68ki_exception_format_error(mc68kcpu); + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; + m68ki_exception_format_error(); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(rtm, 32, ., .) { - if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_020_VARIANT()) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (rtm)\n", - (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + logerror("%s at %08x: called unimplemented instruction %04x (rtm)\n", + tag(), m_ppc, m_ir); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(rtr, 32, ., .) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_set_ccr((mc68kcpu), m68ki_pull_16(mc68kcpu)); - m68ki_jump((mc68kcpu), m68ki_pull_32(mc68kcpu)); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_ccr(m68ki_pull_16()); + m68ki_jump(m68ki_pull_32()); } M68KMAKE_OP(rts, 32, ., .) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_jump((mc68kcpu), m68ki_pull_32(mc68kcpu)); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_jump(m68ki_pull_32()); } M68KMAKE_OP(sbcd, 8, rr, .) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = DY(mc68kcpu); + uint32_t* r_dst = &DX(); + uint32_t src = DY(); uint32_t dst = *r_dst; - uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(mc68kcpu); + uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(); uint32_t corf = 0; if(res > 0xf) corf = 6; res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); - (mc68kcpu)->v_flag = res; /* Undefined V behavior */ + m_v_flag = res; /* Undefined V behavior */ if(res > 0xff) { res += 0xa0; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; } else if(res < corf) - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; else - (mc68kcpu)->n_flag = (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = 0; + m_n_flag = m_x_flag = m_c_flag = 0; res = MASK_OUT_ABOVE_8(res - corf); - (mc68kcpu)->v_flag &= ~res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ - (mc68kcpu)->not_z_flag |= res; + m_v_flag &= ~res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_not_z_flag |= res; *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; } @@ -9214,153 +9209,153 @@ M68KMAKE_OP(sbcd, 8, rr, .) M68KMAKE_OP(sbcd, 8, mm, ax7) { - uint32_t src = OPER_AY_PD_8(mc68kcpu); - uint32_t ea = EA_A7_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); + uint32_t ea = EA_A7_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(); uint32_t corf = 0; if(res > 0xf) corf = 6; res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); - (mc68kcpu)->v_flag = res; /* Undefined V behavior */ + m_v_flag = res; /* Undefined V behavior */ if(res > 0xff) { res += 0xa0; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; } else if(res < corf) - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; else - (mc68kcpu)->n_flag = (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = 0; + m_n_flag = m_x_flag = m_c_flag = 0; res = MASK_OUT_ABOVE_8(res - corf); - (mc68kcpu)->v_flag &= ~res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ - (mc68kcpu)->not_z_flag |= res; + m_v_flag &= ~res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(sbcd, 8, mm, ay7) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); - uint32_t ea = EA_AX_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); + uint32_t ea = EA_AX_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(); uint32_t corf = 0; if(res > 0xf) corf = 6; res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); - (mc68kcpu)->v_flag = res; /* Undefined V behavior */ + m_v_flag = res; /* Undefined V behavior */ if(res > 0xff) { res += 0xa0; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; } else if(res < corf) - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; else - (mc68kcpu)->n_flag = (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = 0; + m_n_flag = m_x_flag = m_c_flag = 0; res = MASK_OUT_ABOVE_8(res - corf); - (mc68kcpu)->v_flag &= ~res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ - (mc68kcpu)->not_z_flag |= res; + m_v_flag &= ~res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(sbcd, 8, mm, axy7) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); - uint32_t ea = EA_A7_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); + uint32_t ea = EA_A7_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(); uint32_t corf = 0; if(res > 0xf) corf = 6; res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); - (mc68kcpu)->v_flag = res; /* Undefined V behavior */ + m_v_flag = res; /* Undefined V behavior */ if(res > 0xff) { res += 0xa0; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; } else if(res < corf) - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; else - (mc68kcpu)->n_flag = (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = 0; + m_n_flag = m_x_flag = m_c_flag = 0; res = MASK_OUT_ABOVE_8(res - corf); - (mc68kcpu)->v_flag &= ~res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ - (mc68kcpu)->not_z_flag |= res; + m_v_flag &= ~res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(sbcd, 8, mm, .) { - uint32_t src = OPER_AY_PD_8(mc68kcpu); - uint32_t ea = EA_AX_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); + uint32_t ea = EA_AX_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(); uint32_t corf = 0; if(res > 0xf) corf = 6; res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); - (mc68kcpu)->v_flag = res; /* Undefined V behavior */ + m_v_flag = res; /* Undefined V behavior */ if(res > 0xff) { res += 0xa0; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; } else if(res < corf) - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; else - (mc68kcpu)->n_flag = (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = 0; + m_n_flag = m_x_flag = m_c_flag = 0; res = MASK_OUT_ABOVE_8(res - corf); - (mc68kcpu)->v_flag &= ~res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ - (mc68kcpu)->not_z_flag |= res; + m_v_flag &= ~res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(st, 8, ., d) { - DY(mc68kcpu) |= 0xff; + DY() |= 0xff; } M68KMAKE_OP(st, 8, ., .) { - m68ki_write_8((mc68kcpu), M68KMAKE_GET_EA_AY_8, 0xff); + m68ki_write_8(M68KMAKE_GET_EA_AY_8, 0xff); } M68KMAKE_OP(sf, 8, ., d) { - DY(mc68kcpu) &= 0xffffff00; + DY() &= 0xffffff00; } M68KMAKE_OP(sf, 8, ., .) { - m68ki_write_8((mc68kcpu), M68KMAKE_GET_EA_AY_8, 0); + m68ki_write_8(M68KMAKE_GET_EA_AY_8, 0); } @@ -9368,230 +9363,230 @@ M68KMAKE_OP(scc, 8, ., d) { if(M68KMAKE_CC) { - DY(mc68kcpu) |= 0xff; - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_scc_r_true; + DY() |= 0xff; + m_remaining_cycles -= m_cyc_scc_r_true; return; } - DY(mc68kcpu) &= 0xffffff00; + DY() &= 0xffffff00; } M68KMAKE_OP(scc, 8, ., .) { - m68ki_write_8((mc68kcpu), M68KMAKE_GET_EA_AY_8, M68KMAKE_CC ? 0xff : 0); + m68ki_write_8(M68KMAKE_GET_EA_AY_8, M68KMAKE_CC ? 0xff : 0); } M68KMAKE_OP(stop, 0, ., .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t new_sr = OPER_I_16(mc68kcpu); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - (mc68kcpu)->stopped |= STOP_LEVEL_STOP; - m68ki_set_sr((mc68kcpu), new_sr); - (mc68kcpu)->remaining_cycles = 0; + uint32_t new_sr = OPER_I_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m_stopped |= STOP_LEVEL_STOP; + m68ki_set_sr(new_sr); + m_remaining_cycles = 0; return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(sub, 8, er, d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_8(DY()); uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(sub, 8, er, .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t src = M68KMAKE_GET_OPER_AY_8; uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(sub, 16, er, d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_16(DY()); uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(sub, 16, er, a) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_16(AY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_16(AY()); uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(sub, 16, er, .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t src = M68KMAKE_GET_OPER_AY_16; uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(sub, 32, er, d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = DY(mc68kcpu); + uint32_t* r_dst = &DX(); + uint32_t src = DY(); uint32_t dst = *r_dst; uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(sub, 32, er, a) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = AY(mc68kcpu); + uint32_t* r_dst = &DX(); + uint32_t src = AY(); uint32_t dst = *r_dst; uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(sub, 32, er, .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t src = M68KMAKE_GET_OPER_AY_32; uint32_t dst = *r_dst; uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(sub, 8, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = MASK_OUT_ABOVE_8(DX(mc68kcpu)); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); + uint32_t src = MASK_OUT_ABOVE_8(DX()); + uint32_t dst = m68ki_read_8(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); - m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_8(ea, m_not_z_flag); } M68KMAKE_OP(sub, 16, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = MASK_OUT_ABOVE_16(DX(mc68kcpu)); - uint32_t dst = m68ki_read_16((mc68kcpu), ea); + uint32_t src = MASK_OUT_ABOVE_16(DX()); + uint32_t dst = m68ki_read_16(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); - m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_16(ea, m_not_z_flag); } M68KMAKE_OP(sub, 32, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t src = DX(mc68kcpu); - uint32_t dst = m68ki_read_32((mc68kcpu), ea); + uint32_t src = DX(); + uint32_t dst = m68ki_read_32(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); - m68ki_write_32((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_32(ea, m_not_z_flag); } M68KMAKE_OP(suba, 16, ., d) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(DY(mc68kcpu))); + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(DY())); } M68KMAKE_OP(suba, 16, ., a) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(AY(mc68kcpu))); + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(AY())); } M68KMAKE_OP(suba, 16, ., .) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); uint32_t src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16); *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); @@ -9600,23 +9595,23 @@ M68KMAKE_OP(suba, 16, ., .) M68KMAKE_OP(suba, 32, ., d) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst - DY(mc68kcpu)); + *r_dst = MASK_OUT_ABOVE_32(*r_dst - DY()); } M68KMAKE_OP(suba, 32, ., a) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst - AY(mc68kcpu)); + *r_dst = MASK_OUT_ABOVE_32(*r_dst - AY()); } M68KMAKE_OP(suba, 32, ., .) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); uint32_t src = M68KMAKE_GET_OPER_AY_32; *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); @@ -9625,225 +9620,225 @@ M68KMAKE_OP(suba, 32, ., .) M68KMAKE_OP(subi, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = OPER_I_8(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t src = OPER_I_8(); uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(subi, 8, ., .) { - uint32_t src = OPER_I_8(mc68kcpu); + uint32_t src = OPER_I_8(); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t dst = m68ki_read_8((mc68kcpu), ea); + uint32_t dst = m68ki_read_8(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); - m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_8(ea, m_not_z_flag); } M68KMAKE_OP(subi, 16, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = OPER_I_16(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t src = OPER_I_16(); uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(subi, 16, ., .) { - uint32_t src = OPER_I_16(mc68kcpu); + uint32_t src = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t dst = m68ki_read_16((mc68kcpu), ea); + uint32_t dst = m68ki_read_16(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); - m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_16(ea, m_not_z_flag); } M68KMAKE_OP(subi, 32, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = OPER_I_32(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t src = OPER_I_32(); uint32_t dst = *r_dst; uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(subi, 32, ., .) { - uint32_t src = OPER_I_32(mc68kcpu); + uint32_t src = OPER_I_32(); uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t dst = m68ki_read_32((mc68kcpu), ea); + uint32_t dst = m68ki_read_32(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); - m68ki_write_32((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_32(ea, m_not_z_flag); } M68KMAKE_OP(subq, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(subq, 8, ., .) { - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t dst = m68ki_read_8((mc68kcpu), ea); + uint32_t dst = m68ki_read_8(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); - m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_8(ea, m_not_z_flag); } M68KMAKE_OP(subq, 16, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(subq, 16, ., a) { - uint32_t* r_dst = &AY(mc68kcpu); + uint32_t* r_dst = &AY(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst - (((((mc68kcpu)->ir >> 9) - 1) & 7) + 1)); + *r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((m_ir >> 9) - 1) & 7) + 1)); } M68KMAKE_OP(subq, 16, ., .) { - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t dst = m68ki_read_16((mc68kcpu), ea); + uint32_t dst = m68ki_read_16(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); - m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_16(ea, m_not_z_flag); } M68KMAKE_OP(subq, 32, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t dst = *r_dst; uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(subq, 32, ., a) { - uint32_t* r_dst = &AY(mc68kcpu); + uint32_t* r_dst = &AY(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst - (((((mc68kcpu)->ir >> 9) - 1) & 7) + 1)); + *r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((m_ir >> 9) - 1) & 7) + 1)); } M68KMAKE_OP(subq, 32, ., .) { - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t dst = m68ki_read_32((mc68kcpu), ea); + uint32_t dst = m68ki_read_32(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); - m68ki_write_32((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_32(ea, m_not_z_flag); } M68KMAKE_OP(subx, 8, rr, .) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_8(DY()); uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; } @@ -9851,17 +9846,17 @@ M68KMAKE_OP(subx, 8, rr, .) M68KMAKE_OP(subx, 16, rr, .) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_16(DY()); uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); + m_n_flag = NFLAG_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); res = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; } @@ -9869,17 +9864,17 @@ M68KMAKE_OP(subx, 16, rr, .) M68KMAKE_OP(subx, 32, rr, .) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = DY(mc68kcpu); + uint32_t* r_dst = &DX(); + uint32_t src = DY(); uint32_t dst = *r_dst; - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); res = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = res; } @@ -9887,134 +9882,134 @@ M68KMAKE_OP(subx, 32, rr, .) M68KMAKE_OP(subx, 8, mm, ax7) { - uint32_t src = OPER_AY_PD_8(mc68kcpu); - uint32_t ea = EA_A7_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); + uint32_t ea = EA_A7_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(subx, 8, mm, ay7) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); - uint32_t ea = EA_AX_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); + uint32_t ea = EA_AX_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(subx, 8, mm, axy7) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); - uint32_t ea = EA_A7_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); + uint32_t ea = EA_A7_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(subx, 8, mm, .) { - uint32_t src = OPER_AY_PD_8(mc68kcpu); - uint32_t ea = EA_AX_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); + uint32_t ea = EA_AX_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(subx, 16, mm, .) { - uint32_t src = OPER_AY_PD_16(mc68kcpu); - uint32_t ea = EA_AX_PD_16(mc68kcpu); - uint32_t dst = m68ki_read_16((mc68kcpu), ea); - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_16(); + uint32_t ea = EA_AX_PD_16(); + uint32_t dst = m68ki_read_16(ea); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); + m_n_flag = NFLAG_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); res = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); } M68KMAKE_OP(subx, 32, mm, .) { - uint32_t src = OPER_AY_PD_32(mc68kcpu); - uint32_t ea = EA_AX_PD_32(mc68kcpu); - uint32_t dst = m68ki_read_32((mc68kcpu), ea); - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_32(); + uint32_t ea = EA_AX_PD_32(); + uint32_t dst = m68ki_read_32(ea); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); res = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); } M68KMAKE_OP(swap, 32, ., .) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(*r_dst<<16); - *r_dst = (*r_dst>>16) | (mc68kcpu)->not_z_flag; + m_not_z_flag = MASK_OUT_ABOVE_32(*r_dst<<16); + *r_dst = (*r_dst>>16) | m_not_z_flag; - (mc68kcpu)->not_z_flag = *r_dst; - (mc68kcpu)->n_flag = NFLAG_32(*r_dst); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_not_z_flag = *r_dst; + m_n_flag = NFLAG_32(*r_dst); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(tas, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(*r_dst); - (mc68kcpu)->n_flag = NFLAG_8(*r_dst); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = MASK_OUT_ABOVE_8(*r_dst); + m_n_flag = NFLAG_8(*r_dst); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *r_dst |= 0x80; } @@ -10022,159 +10017,159 @@ M68KMAKE_OP(tas, 8, ., d) M68KMAKE_OP(tas, 8, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t dst = m68ki_read_8((mc68kcpu), ea); + uint32_t dst = m68ki_read_8(ea); - (mc68kcpu)->not_z_flag = dst; - (mc68kcpu)->n_flag = NFLAG_8(dst); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = dst; + m_n_flag = NFLAG_8(dst); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; /* On the 68000 and 68010, the TAS instruction uses a unique bus cycle that may have side effects (e.g. delaying DMA) or may fail to write back at all depending on the bus implementation. In particular, the Genesis/Megadrive games Gargoyles and Ex-Mutants need the TAS to fail to write back in order to function properly. */ - if (CPU_TYPE_IS_010_LESS((mc68kcpu)->cpu_type) && !(mc68kcpu)->tas_write_callback.isnull()) - ((mc68kcpu)->tas_write_callback)(*(mc68kcpu)->program, ea, dst | 0x80, 0xff); + if (CPU_TYPE_IS_010_LESS() && !m_tas_write_callback.isnull()) + (m_tas_write_callback)(*m_program, ea, dst | 0x80, 0xff); else - m68ki_write_8((mc68kcpu), ea, dst | 0x80); + m68ki_write_8(ea, dst | 0x80); } M68KMAKE_OP(trap, 0, ., .) { /* Trap#n stacks exception frame type 0 */ - m68ki_exception_trapN((mc68kcpu), EXCEPTION_TRAP_BASE + ((mc68kcpu)->ir & 0xf)); /* HJB 990403 */ + m68ki_exception_trapN(EXCEPTION_TRAP_BASE + (m_ir & 0xf)); /* HJB 990403 */ } M68KMAKE_OP(trapt, 0, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */ + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapt, 16, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */ + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapt, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */ + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapf, 0, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapf, 16, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - REG_PC(mc68kcpu) += 2; + m_pc += 2; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapf, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - REG_PC(mc68kcpu) += 4; + m_pc += 4; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapcc, 0, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { if(M68KMAKE_CC) - m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */ + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapcc, 16, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { if(M68KMAKE_CC) { - m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */ + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ return; } - REG_PC(mc68kcpu) += 2; + m_pc += 2; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapcc, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { if(M68KMAKE_CC) { - m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */ + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ return; } - REG_PC(mc68kcpu) += 4; + m_pc += 4; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapv, 0, ., .) { - if(COND_VC(mc68kcpu)) + if(COND_VC()) { return; } - m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */ + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ } M68KMAKE_OP(tst, 8, ., d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); + uint32_t res = MASK_OUT_ABOVE_8(DY()); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } @@ -10182,85 +10177,85 @@ M68KMAKE_OP(tst, 8, ., .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(tst, 8, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_PCDI_8(mc68kcpu); + uint32_t res = OPER_PCDI_8(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(tst, 8, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_PCIX_8(mc68kcpu); + uint32_t res = OPER_PCIX_8(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(tst, 8, ., i) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_I_8(mc68kcpu); + uint32_t res = OPER_I_8(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(tst, 16, ., d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); + uint32_t res = MASK_OUT_ABOVE_16(DY()); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(tst, 16, ., a) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = MAKE_INT_16(AY(mc68kcpu)); + uint32_t res = MAKE_INT_16(AY()); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } @@ -10268,85 +10263,85 @@ M68KMAKE_OP(tst, 16, ., .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(tst, 16, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_PCDI_16(mc68kcpu); + uint32_t res = OPER_PCDI_16(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(tst, 16, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_PCIX_16(mc68kcpu); + uint32_t res = OPER_PCIX_16(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(tst, 16, ., i) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_I_16(mc68kcpu); + uint32_t res = OPER_I_16(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(tst, 32, ., d) { - uint32_t res = DY(mc68kcpu); + uint32_t res = DY(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(tst, 32, ., a) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = AY(mc68kcpu); + uint32_t res = AY(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } @@ -10354,195 +10349,195 @@ M68KMAKE_OP(tst, 32, ., .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(tst, 32, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_PCDI_32(mc68kcpu); + uint32_t res = OPER_PCDI_32(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(tst, 32, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_PCIX_32(mc68kcpu); + uint32_t res = OPER_PCIX_32(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(tst, 32, ., i) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_I_32(mc68kcpu); + uint32_t res = OPER_I_32(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(unlk, 32, ., a7) { - REG_A(mc68kcpu)[7] = m68ki_read_32((mc68kcpu), REG_A(mc68kcpu)[7]); + REG_A()[7] = m68ki_read_32(REG_A()[7]); } M68KMAKE_OP(unlk, 32, ., .) { - uint32_t* r_dst = &AY(mc68kcpu); + uint32_t* r_dst = &AY(); - REG_A(mc68kcpu)[7] = *r_dst; - *r_dst = m68ki_pull_32(mc68kcpu); + REG_A()[7] = *r_dst; + *r_dst = m68ki_pull_32(); } M68KMAKE_OP(unpk, 16, rr, .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - /* Note: DX(mc68kcpu) and DY(mc68kcpu) are reversed in Motorola's docs */ - uint32_t src = DY(mc68kcpu); - uint32_t* r_dst = &DX(mc68kcpu); + /* Note: DX() and DY() are reversed in Motorola's docs */ + uint32_t src = DY(); + uint32_t* r_dst = &DX(); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (((((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(mc68kcpu)) & 0xffff); + *r_dst = MASK_OUT_BELOW_16(*r_dst) | (((((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16()) & 0xffff); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(unpk, 16, mm, ax7) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { /* Note: AX and AY are reversed in Motorola's docs */ - uint32_t src = OPER_AY_PD_8(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); uint32_t ea_dst; - src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(mc68kcpu); - ea_dst = EA_A7_PD_8(mc68kcpu); - m68ki_write_8((mc68kcpu), ea_dst, src & 0xff); - ea_dst = EA_A7_PD_8(mc68kcpu); - m68ki_write_8((mc68kcpu), ea_dst, (src >> 8) & 0xff); + src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(); + ea_dst = EA_A7_PD_8(); + m68ki_write_8(ea_dst, src & 0xff); + ea_dst = EA_A7_PD_8(); + m68ki_write_8(ea_dst, (src >> 8) & 0xff); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(unpk, 16, mm, ay7) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { /* Note: AX and AY are reversed in Motorola's docs */ - uint32_t src = OPER_A7_PD_8(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); uint32_t ea_dst; - src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(mc68kcpu); - ea_dst = EA_AX_PD_8(mc68kcpu); - m68ki_write_8((mc68kcpu), ea_dst, src & 0xff); - ea_dst = EA_AX_PD_8(mc68kcpu); - m68ki_write_8((mc68kcpu), ea_dst, (src >> 8) & 0xff); + src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(); + ea_dst = EA_AX_PD_8(); + m68ki_write_8(ea_dst, src & 0xff); + ea_dst = EA_AX_PD_8(); + m68ki_write_8(ea_dst, (src >> 8) & 0xff); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(unpk, 16, mm, axy7) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); uint32_t ea_dst; - src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(mc68kcpu); - ea_dst = EA_A7_PD_8(mc68kcpu); - m68ki_write_8((mc68kcpu), ea_dst, src & 0xff); - ea_dst = EA_A7_PD_8(mc68kcpu); - m68ki_write_8((mc68kcpu), ea_dst, (src >> 8) & 0xff); + src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(); + ea_dst = EA_A7_PD_8(); + m68ki_write_8(ea_dst, src & 0xff); + ea_dst = EA_A7_PD_8(); + m68ki_write_8(ea_dst, (src >> 8) & 0xff); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(unpk, 16, mm, .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { /* Note: AX and AY are reversed in Motorola's docs */ - uint32_t src = OPER_AY_PD_8(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); uint32_t ea_dst; - src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(mc68kcpu); - ea_dst = EA_AX_PD_8(mc68kcpu); - m68ki_write_8((mc68kcpu), ea_dst, src & 0xff); - ea_dst = EA_AX_PD_8(mc68kcpu); - m68ki_write_8((mc68kcpu), ea_dst, (src >> 8) & 0xff); + src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(); + ea_dst = EA_AX_PD_8(); + m68ki_write_8(ea_dst, src & 0xff); + ea_dst = EA_AX_PD_8(); + m68ki_write_8(ea_dst, (src >> 8) & 0xff); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cinv, 32, ., .) { - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - uint16_t ir = mc68kcpu->ir; + uint16_t ir = m_ir; uint8_t cache = (ir >> 6) & 3; // uint8_t scope = (ir >> 3) & 3; -// mc68kcpu->logerror("68040 %s: pc=%08x ir=%04x cache=%d scope=%d register=%d\n", ir & 0x0020 ? "cpush" : "cinv", REG_PPC(mc68kcpu), ir, cache, scope, ir & 7); +// logerror("68040 %s: pc=%08x ir=%04x cache=%d scope=%d register=%d\n", ir & 0x0020 ? "cpush" : "cinv", m_ppc, ir, cache, scope, ir & 7); switch (cache) { case 2: case 3: // we invalidate/push the whole instruction cache - m68ki_ic_clear(mc68kcpu); + m68ki_ic_clear(); } return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(cpush, 32, ., .) { - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpush)\n", - (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir); + logerror("%s at %08x: called unimplemented instruction %04x (cpush)\n", + tag(), m_ppc, m_ir); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX diff --git a/src/devices/cpu/m68000/m68kcpu.cpp b/src/devices/cpu/m68000/m68kcpu.cpp index e387f946784..8a0008bdfb5 100644 --- a/src/devices/cpu/m68000/m68kcpu.cpp +++ b/src/devices/cpu/m68000/m68kcpu.cpp @@ -26,23 +26,15 @@ static const char copyright_notice[] = #include "emu.h" #include "debugger.h" -#include "m68kcpu.h" -#include "m68kops.h" - -#include "m68kfpu.hxx" -#include "m68kmmu.h" +#include "m68000.h" #include "m68kdasm.h" -extern void m68040_fpu_op0(m68000_base_device *m68k); -extern void m68040_fpu_op1(m68000_base_device *m68k); -extern void m68881_mmu_ops(m68000_base_device *m68k); - /* ======================================================================== */ /* ================================= DATA ================================= */ /* ======================================================================== */ /* Used by shift & rotate instructions */ -const uint8_t m68ki_shift_8_table[65] = +const uint8_t m68000_base_device::m68ki_shift_8_table[65] = { 0x00, 0x80, 0xc0, 0xe0, 0xf0, 0xf8, 0xfc, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -51,7 +43,7 @@ const uint8_t m68ki_shift_8_table[65] = 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; -const uint16_t m68ki_shift_16_table[65] = +const uint16_t m68000_base_device::m68ki_shift_16_table[65] = { 0x0000, 0x8000, 0xc000, 0xe000, 0xf000, 0xf800, 0xfc00, 0xfe00, 0xff00, 0xff80, 0xffc0, 0xffe0, 0xfff0, 0xfff8, 0xfffc, 0xfffe, 0xffff, 0xffff, @@ -62,7 +54,7 @@ const uint16_t m68ki_shift_16_table[65] = 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff }; -const uint32_t m68ki_shift_32_table[65] = +const uint32_t m68000_base_device::m68ki_shift_32_table[65] = { 0x00000000, 0x80000000, 0xc0000000, 0xe0000000, 0xf0000000, 0xf8000000, 0xfc000000, 0xfe000000, 0xff000000, 0xff800000, 0xffc00000, 0xffe00000, @@ -81,7 +73,7 @@ const uint32_t m68ki_shift_32_table[65] = /* Number of clock cycles to use for exception processing. * I used 4 for any vectors that are undocumented for processing times. */ -const uint8_t m68ki_exception_cycle_table[7][256] = +const uint8_t m68000_base_device::m68ki_exception_cycle_table[7][256] = { { /* 000 */ 40, /* 0: Reset - Initial Stack Pointer */ @@ -596,7 +588,7 @@ const uint8_t m68ki_exception_cycle_table[7][256] = }, }; -const uint8_t m68ki_ea_idx_cycle_table[64] = +const uint8_t m68000_base_device::m68ki_ea_idx_cycle_table[64] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* ..01.000 no memory indirect, base nullptr */ @@ -636,73 +628,73 @@ const uint8_t m68ki_ea_idx_cycle_table[64] = /* ================================= API ================================== */ /* ======================================================================== */ -static void set_irq_line(m68000_base_device *m68k, int irqline, int state) +void m68000_base_device::set_irq_line(int irqline, int state) { - uint32_t old_level = m68k->int_level; - uint32_t vstate = m68k->virq_state; + uint32_t old_level = m_int_level; + uint32_t vstate = m_virq_state; uint32_t blevel; if(state == ASSERT_LINE) vstate |= 1 << irqline; else vstate &= ~(1 << irqline); - m68k->virq_state = vstate; + m_virq_state = vstate; for(blevel = 7; blevel > 0; blevel--) if(vstate & (1 << blevel)) break; - m68k->int_level = blevel << 8; + m_int_level = blevel << 8; /* A transition from < 7 to 7 always interrupts (NMI) */ /* Note: Level 7 can also level trigger like a normal IRQ */ - if(old_level != 0x0700 && m68k->int_level == 0x0700) - m68k->nmi_pending = true; + if(old_level != 0x0700 && m_int_level == 0x0700) + m_nmi_pending = true; } void m68000_base_device::presave() { - save_sr = m68ki_get_sr(this); - save_stopped = (stopped & STOP_LEVEL_STOP) != 0; - save_halted = (stopped & STOP_LEVEL_HALT) != 0; + m_save_sr = m68ki_get_sr(); + m_save_stopped = (m_stopped & STOP_LEVEL_STOP) != 0; + m_save_halted = (m_stopped & STOP_LEVEL_HALT) != 0; } void m68000_base_device::postload() { - m68ki_set_sr_noint_nosp(this, save_sr); + m68ki_set_sr_noint_nosp(m_save_sr); //fprintf(stderr, "Reloaded, pc=%x\n", REG_PC(m68k)); - stopped = (save_stopped ? STOP_LEVEL_STOP : 0) | (save_halted ? STOP_LEVEL_HALT : 0); - m68ki_jump(this, REG_PC(this)); + m_stopped = (m_save_stopped ? STOP_LEVEL_STOP : 0) | (m_save_halted ? STOP_LEVEL_HALT : 0); + m68ki_jump(m_pc); } -static void m68k_cause_bus_error(m68000_base_device *m68k) +void m68000_base_device::m68k_cause_bus_error() { uint32_t sr; - sr = m68ki_init_exception(m68k); + sr = m68ki_init_exception(); - m68k->run_mode = RUN_MODE_BERR_AERR_RESET; + m_run_mode = RUN_MODE_BERR_AERR_RESET; - if (!CPU_TYPE_IS_010_PLUS(m68k->cpu_type)) + if (!CPU_TYPE_IS_010_PLUS()) { /* Note: This is implemented for 68000 only! */ - m68ki_stack_frame_buserr(m68k, sr); + m68ki_stack_frame_buserr(sr); } - else if (CPU_TYPE_IS_010(m68k->cpu_type)) + else if (CPU_TYPE_IS_010()) { /* only the 68010 throws this unique type-1000 frame */ - m68ki_stack_frame_1000(m68k, REG_PPC(m68k), sr, EXCEPTION_BUS_ERROR); + m68ki_stack_frame_1000(m_ppc, sr, EXCEPTION_BUS_ERROR); } - else if (m68k->mmu_tmp_buserror_address == REG_PPC(m68k)) + else if (m_mmu_tmp_buserror_address == m_ppc) { - m68ki_stack_frame_1010(m68k, sr, EXCEPTION_BUS_ERROR, REG_PPC(m68k), m68k->mmu_tmp_buserror_address); + m68ki_stack_frame_1010(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address); } else { - m68ki_stack_frame_1011(m68k, sr, EXCEPTION_BUS_ERROR, REG_PPC(m68k), m68k->mmu_tmp_buserror_address); + m68ki_stack_frame_1011(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address); } - m68ki_jump_vector(m68k, EXCEPTION_BUS_ERROR); + m68ki_jump_vector(EXCEPTION_BUS_ERROR); } bool m68000_base_device::memory_translate(int space, int intention, offs_t &address) @@ -710,28 +702,28 @@ bool m68000_base_device::memory_translate(int space, int intention, offs_t &addr /* only applies to the program address space and only does something if the MMU's enabled */ { /* 68040 needs to call the MMU even when disabled so transparent translation works */ - if ((space == AS_PROGRAM) && ((pmmu_enabled) || (CPU_TYPE_IS_040_PLUS(cpu_type)))) + if ((space == AS_PROGRAM) && ((m_pmmu_enabled) || (CPU_TYPE_IS_040_PLUS()))) { - // FIXME: mmu_tmp_sr will be overwritten in pmmu_translate_addr_with_fc - uint16_t temp_mmu_tmp_sr = mmu_tmp_sr; - int mode = s_flag ? FUNCTION_CODE_SUPERVISOR_PROGRAM : FUNCTION_CODE_USER_PROGRAM; + // FIXME: m_mmu_tmp_sr will be overwritten in pmmu_translate_addr_with_fc + uint16_t temp_mmu_tmp_sr = m_mmu_tmp_sr; + int mode = m_s_flag ? FUNCTION_CODE_SUPERVISOR_PROGRAM : FUNCTION_CODE_USER_PROGRAM; // uint32_t va=address; - if (CPU_TYPE_IS_040_PLUS(cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - address = pmmu_translate_addr_with_fc_040(this, address, mode, 1); + address = pmmu_translate_addr_with_fc_040(address, mode, 1); } else { - address = pmmu_translate_addr_with_fc(this, address, mode, 1); + address = pmmu_translate_addr_with_fc(address, mode, 1); } - if ((mmu_tmp_sr & M68K_MMU_SR_INVALID) != 0) { -// logerror("cpu_translate_m68k failed with mmu_sr=%04x va=%08x pa=%08x\n",mmu_tmp_sr,va ,address); + if ((m_mmu_tmp_sr & M68K_MMU_SR_INVALID) != 0) { +// logerror("cpu_translate_m68k failed with mmu_sr=%04x va=%08x pa=%08x\n",m_mmu_tmp_sr,va ,address); address = 0; } - mmu_tmp_sr = temp_mmu_tmp_sr; + m_mmu_tmp_sr = temp_mmu_tmp_sr; } } return true; @@ -745,24 +737,24 @@ bool m68000_base_device::memory_translate(int space, int intention, offs_t &addr -inline void m68000_base_device::cpu_execute(void) +void m68000_base_device::execute_run() { - initial_cycles = remaining_cycles; + m_initial_cycles = m_remaining_cycles; /* eat up any reset cycles */ - if (reset_cycles) { - int rc = reset_cycles; - reset_cycles = 0; - remaining_cycles -= rc; + if (m_reset_cycles) { + int rc = m_reset_cycles; + m_reset_cycles = 0; + m_remaining_cycles -= rc; - if (remaining_cycles <= 0) return; + if (m_remaining_cycles <= 0) return; } /* See if interrupts came in */ - m68ki_check_interrupts(this); + m68ki_check_interrupts(); /* Make sure we're not stopped */ - if(!stopped) + if(!m_stopped) { /* Return point if we had an address error */ check_address_error: @@ -770,123 +762,119 @@ inline void m68000_base_device::cpu_execute(void) { m_address_error = 0; try { - m68ki_exception_address_error(this); + m68ki_exception_address_error(); } catch(int error) { if (error==10) { m_address_error = 1; - REG_PPC(this) = REG_PC(this); + m_ppc = m_pc; goto check_address_error; } else throw; } - if(stopped) + if(m_stopped) { - if (remaining_cycles > 0) - remaining_cycles = 0; + if (m_remaining_cycles > 0) + m_remaining_cycles = 0; return; } } /* Main loop. Keep going until we run out of clock cycles */ - while (remaining_cycles > 0) + while (m_remaining_cycles > 0) { /* Set tracing accodring to T1. (T0 is done inside instruction) */ - m68ki_trace_t1(this); /* auto-disable (see m68kcpu.h) */ + m68ki_trace_t1(); /* auto-disable (see m68kcpu.h) */ /* Record previous program counter */ - REG_PPC(this) = REG_PC(this); + m_ppc = m_pc; /* Call external hook to peek at CPU */ - debugger_instruction_hook(this, REG_PC(this)); - - /* call external instruction hook (independent of debug mode) */ - if (!instruction_hook.isnull()) - instruction_hook(*program, REG_PC(this), 0xffffffff); + debugger_instruction_hook(this, m_pc); try { - if (!pmmu_enabled) + if (!m_pmmu_enabled) { - run_mode = RUN_MODE_NORMAL; + m_run_mode = RUN_MODE_NORMAL; /* Read an instruction and call its handler */ - ir = m68ki_read_imm_16(this); - jump_table[ir](this); - remaining_cycles -= cyc_instruction[ir]; + m_ir = m68ki_read_imm_16(); + (this->*m_jump_table[m_ir])(); + m_remaining_cycles -= m_cyc_instruction[m_ir]; } else { - run_mode = RUN_MODE_NORMAL; + m_run_mode = RUN_MODE_NORMAL; // save CPU address registers values at start of instruction int i; uint32_t tmp_dar[16]; for (i = 15; i >= 0; i--) { - tmp_dar[i] = REG_DA(this)[i]; + tmp_dar[i] = REG_DA()[i]; } - mmu_tmp_buserror_occurred = 0; + m_mmu_tmp_buserror_occurred = 0; /* Read an instruction and call its handler */ - ir = m68ki_read_imm_16(this); + m_ir = m68ki_read_imm_16(); - if (!mmu_tmp_buserror_occurred) + if (!m_mmu_tmp_buserror_occurred) { - jump_table[ir](this); - remaining_cycles -= cyc_instruction[ir]; + (this->*m_jump_table[m_ir])(); + m_remaining_cycles -= m_cyc_instruction[m_ir]; } - if (mmu_tmp_buserror_occurred) + if (m_mmu_tmp_buserror_occurred) { uint32_t sr; - mmu_tmp_buserror_occurred = 0; + m_mmu_tmp_buserror_occurred = 0; // restore cpu address registers to value at start of instruction for (i = 15; i >= 0; i--) { - if (REG_DA(this)[i] != tmp_dar[i]) + if (REG_DA()[i] != tmp_dar[i]) { // logerror("PMMU: pc=%08x sp=%08x bus error: fixed %s[%d]: %08x -> %08x\n", -// REG_PPC(this), REG_A(this)[7], i < 8 ? "D" : "A", i & 7, REG_DA(this)[i], tmp_dar[i]); - REG_DA(this)[i] = tmp_dar[i]; +// m_ppc, REG_A()[7], i < 8 ? "D" : "A", i & 7, REG_DA()[i], tmp_dar[i]); + REG_DA()[i] = tmp_dar[i]; } } - sr = m68ki_init_exception(this); + sr = m68ki_init_exception(); - run_mode = RUN_MODE_BERR_AERR_RESET; + m_run_mode = RUN_MODE_BERR_AERR_RESET; - if (!CPU_TYPE_IS_020_PLUS(cpu_type)) + if (!CPU_TYPE_IS_020_PLUS()) { /* Note: This is implemented for 68000 only! */ - m68ki_stack_frame_buserr(this, sr); + m68ki_stack_frame_buserr(sr); } - else if(!CPU_TYPE_IS_040_PLUS(cpu_type)) { - if (mmu_tmp_buserror_address == REG_PPC(this)) + else if(!CPU_TYPE_IS_040_PLUS()) { + if (m_mmu_tmp_buserror_address == m_ppc) { - m68ki_stack_frame_1010(this, sr, EXCEPTION_BUS_ERROR, REG_PPC(this), mmu_tmp_buserror_address); + m68ki_stack_frame_1010(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address); } else { - m68ki_stack_frame_1011(this, sr, EXCEPTION_BUS_ERROR, REG_PPC(this), mmu_tmp_buserror_address); + m68ki_stack_frame_1011(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address); } } else { - m68ki_stack_frame_0111(this, sr, EXCEPTION_BUS_ERROR, REG_PPC(this), mmu_tmp_buserror_address, true); + m68ki_stack_frame_0111(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address, true); } - m68ki_jump_vector(this, EXCEPTION_BUS_ERROR); + m68ki_jump_vector(EXCEPTION_BUS_ERROR); // TODO: /* Use up some clock cycles and undo the instruction's cycles */ - // remaining_cycles -= cyc_exception[EXCEPTION_BUS_ERROR] - cyc_instruction[ir]; + // m_remaining_cycles -= m_cyc_exception[EXCEPTION_BUS_ERROR] - m_cyc_instruction[m_ir]; } } } @@ -903,14 +891,14 @@ inline void m68000_base_device::cpu_execute(void) /* Trace m68k_exception, if necessary */ - m68ki_exception_if_trace(this); /* auto-disable (see m68kcpu.h) */ + m68ki_exception_if_trace(); /* auto-disable (see m68kcpu.h) */ } /* set previous PC to current PC for the next entry into the loop */ - REG_PPC(this) = REG_PC(this); + m_ppc = m_pc; } - else if (remaining_cycles > 0) - remaining_cycles = 0; + else if (m_remaining_cycles > 0) + m_remaining_cycles = 0; } @@ -920,15 +908,15 @@ void m68000_base_device::init_cpu_common(void) static uint32_t emulation_initialized = 0; //this = device;//deviceparam; - program = &space(AS_PROGRAM); - oprogram = has_space(AS_OPCODES) ? &space(AS_OPCODES) : program; - int_ack_callback = device_irq_acknowledge_delegate(FUNC(m68000_base_device::standard_irq_callback_member), this); + m_program = &space(AS_PROGRAM); + m_oprogram = has_space(AS_OPCODES) ? &space(AS_OPCODES) : m_program; + m_int_ack_callback = device_irq_acknowledge_delegate(FUNC(m68000_base_device::standard_irq_callback_member), this); /* disable all MMUs */ - has_pmmu = 0; - has_hmmu = 0; - pmmu_enabled = 0; - hmmu_enabled = 0; + m_has_pmmu = 0; + m_has_hmmu = 0; + m_pmmu_enabled = 0; + m_hmmu_enabled = 0; /* The first call to this function initializes the opcode handler jump table */ if(!emulation_initialized) @@ -938,116 +926,116 @@ void m68000_base_device::init_cpu_common(void) } /* Note, D covers A because the dar array is common, REG_A(m68k)=REG_D(m68k)+8 */ - save_item(NAME(REG_D(this))); - save_item(NAME(REG_PPC(this))); - save_item(NAME(REG_PC(this))); - save_item(NAME(REG_USP(this))); - save_item(NAME(REG_ISP(this))); - save_item(NAME(REG_MSP(this))); - save_item(NAME(vbr)); - save_item(NAME(sfc)); - save_item(NAME(dfc)); - save_item(NAME(cacr)); - save_item(NAME(caar)); - save_item(NAME(save_sr)); - save_item(NAME(int_level)); - save_item(NAME(save_stopped)); - save_item(NAME(save_halted)); - save_item(NAME(pref_addr)); - save_item(NAME(pref_data)); - save_item(NAME(reset_cycles)); - save_item(NAME(virq_state)); - save_item(NAME(nmi_pending)); - save_item(NAME(has_pmmu)); - save_item(NAME(has_hmmu)); - save_item(NAME(pmmu_enabled)); - save_item(NAME(hmmu_enabled)); - - save_item(NAME(mmu_crp_aptr)); - save_item(NAME(mmu_crp_limit)); - save_item(NAME(mmu_srp_aptr)); - save_item(NAME(mmu_srp_limit)); - save_item(NAME(mmu_urp_aptr)); - save_item(NAME(mmu_tc)); - save_item(NAME(mmu_sr)); - save_item(NAME(mmu_sr_040)); - save_item(NAME(mmu_atc_rr)); - save_item(NAME(mmu_tt0)); - save_item(NAME(mmu_tt1)); - save_item(NAME(mmu_itt0)); - save_item(NAME(mmu_itt1)); - save_item(NAME(mmu_dtt0)); - save_item(NAME(mmu_dtt1)); - save_item(NAME(mmu_acr0)); - save_item(NAME(mmu_acr1)); - save_item(NAME(mmu_acr2)); - save_item(NAME(mmu_acr3)); - save_item(NAME(mmu_last_page_entry)); - save_item(NAME(mmu_last_page_entry_addr)); + save_item(NAME(REG_D())); + save_item(NAME(m_ppc)); + save_item(NAME(m_pc)); + save_item(NAME(REG_USP())); + save_item(NAME(REG_ISP())); + save_item(NAME(REG_MSP())); + save_item(NAME(m_vbr)); + save_item(NAME(m_sfc)); + save_item(NAME(m_dfc)); + save_item(NAME(m_cacr)); + save_item(NAME(m_caar)); + save_item(NAME(m_save_sr)); + save_item(NAME(m_int_level)); + save_item(NAME(m_save_stopped)); + save_item(NAME(m_save_halted)); + save_item(NAME(m_pref_addr)); + save_item(NAME(m_pref_data)); + save_item(NAME(m_reset_cycles)); + save_item(NAME(m_virq_state)); + save_item(NAME(m_nmi_pending)); + save_item(NAME(m_has_pmmu)); + save_item(NAME(m_has_hmmu)); + save_item(NAME(m_pmmu_enabled)); + save_item(NAME(m_hmmu_enabled)); + + save_item(NAME(m_mmu_crp_aptr)); + save_item(NAME(m_mmu_crp_limit)); + save_item(NAME(m_mmu_srp_aptr)); + save_item(NAME(m_mmu_srp_limit)); + save_item(NAME(m_mmu_urp_aptr)); + save_item(NAME(m_mmu_tc)); + save_item(NAME(m_mmu_sr)); + save_item(NAME(m_mmu_sr_040)); + save_item(NAME(m_mmu_atc_rr)); + save_item(NAME(m_mmu_tt0)); + save_item(NAME(m_mmu_tt1)); + save_item(NAME(m_mmu_itt0)); + save_item(NAME(m_mmu_itt1)); + save_item(NAME(m_mmu_dtt0)); + save_item(NAME(m_mmu_dtt1)); + save_item(NAME(m_mmu_acr0)); + save_item(NAME(m_mmu_acr1)); + save_item(NAME(m_mmu_acr2)); + save_item(NAME(m_mmu_acr3)); + save_item(NAME(m_mmu_last_page_entry)); + save_item(NAME(m_mmu_last_page_entry_addr)); for (int i=0; i<MMU_ATC_ENTRIES;i++) { - save_item(NAME(mmu_atc_tag[i]), i); - save_item(NAME(mmu_atc_data[i]), i); + save_item(NAME(m_mmu_atc_tag[i]), i); + save_item(NAME(m_mmu_atc_data[i]), i); } machine().save().register_presave(save_prepost_delegate(FUNC(m68000_base_device::presave), this)); machine().save().register_postload(save_prepost_delegate(FUNC(m68000_base_device::postload), this)); - m_icountptr = &remaining_cycles; - remaining_cycles = 0; + m_icountptr = &m_remaining_cycles; + m_remaining_cycles = 0; } -void m68000_base_device::reset_cpu(void) +void m68000_base_device::device_reset() { /* Disable the PMMU/HMMU on reset, if any */ - pmmu_enabled = 0; - hmmu_enabled = 0; + m_pmmu_enabled = 0; + m_hmmu_enabled = 0; - mmu_tc = 0; - mmu_tt0 = 0; - mmu_tt1 = 0; + m_mmu_tc = 0; + m_mmu_tt0 = 0; + m_mmu_tt1 = 0; /* Clear all stop levels and eat up all remaining cycles */ - stopped = 0; - if (remaining_cycles > 0) - remaining_cycles = 0; + m_stopped = 0; + if (m_remaining_cycles > 0) + m_remaining_cycles = 0; - run_mode = RUN_MODE_BERR_AERR_RESET; + m_run_mode = RUN_MODE_BERR_AERR_RESET; /* Turn off tracing */ - t1_flag = t0_flag = 0; - m68ki_clear_trace(this); + m_t1_flag = m_t0_flag = 0; + m68ki_clear_trace(); /* Interrupt mask to level 7 */ - int_mask = 0x0700; - int_level = 0; - virq_state = 0; + m_int_mask = 0x0700; + m_int_level = 0; + m_virq_state = 0; /* Reset VBR */ - vbr = 0; + m_vbr = 0; /* Go to supervisor mode */ - m68ki_set_sm_flag(this, SFLAG_SET | MFLAG_CLEAR); + m68ki_set_sm_flag(SFLAG_SET | MFLAG_CLEAR); /* Invalidate the prefetch queue */ /* Set to arbitrary number since our first fetch is from 0 */ - pref_addr = 0x1000; + m_pref_addr = 0x1000; /* Read the initial stack pointer and program counter */ - m68ki_jump(this, 0); - REG_SP(this) = m68ki_read_imm_32(this); - REG_PC(this) = m68ki_read_imm_32(this); - m68ki_jump(this, REG_PC(this)); + m68ki_jump(0); + REG_SP() = m68ki_read_imm_32(); + m_pc = m68ki_read_imm_32(); + m68ki_jump(m_pc); - run_mode = RUN_MODE_NORMAL; + m_run_mode = RUN_MODE_NORMAL; - reset_cycles = cyc_exception[EXCEPTION_RESET]; + m_reset_cycles = m_cyc_exception[EXCEPTION_RESET]; /* flush the MMU's cache */ - pmmu_atc_flush(this); + pmmu_atc_flush(); - if(CPU_TYPE_IS_EC020_PLUS(cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { // clear instruction cache - m68ki_ic_clear(this); + m68ki_ic_clear(); } } @@ -1062,37 +1050,37 @@ void m68000_base_device::state_import(const device_state_entry &entry) switch (entry.index()) { case STATE_GENPC: - ppc = pc; + m_ppc = m_pc; break; case STATE_GENPCBASE: - pc = ppc; + m_pc = m_ppc; break; case M68K_SR: case STATE_GENFLAGS: - m68ki_set_sr(this, iotemp); + m68ki_set_sr(m_iotemp); break; case M68K_ISP: - if (s_flag && !m_flag) - REG_SP(this) = iotemp; + if (m_s_flag && !m_m_flag) + REG_SP() = m_iotemp; else - REG_ISP(this) = iotemp; + REG_ISP() = m_iotemp; break; case M68K_USP: - if (!s_flag) - REG_SP(this) = iotemp; + if (!m_s_flag) + REG_SP() = m_iotemp; else - REG_USP(this) = iotemp; + REG_USP() = m_iotemp; break; case M68K_MSP: - if (s_flag && m_flag) - REG_SP(this) = iotemp; + if (m_s_flag && m_m_flag) + REG_SP() = m_iotemp; else - REG_MSP(this) = iotemp; + REG_MSP() = m_iotemp; break; default: @@ -1109,19 +1097,19 @@ void m68000_base_device::state_export(const device_state_entry &entry) { case M68K_SR: case STATE_GENFLAGS: - iotemp = m68ki_get_sr(this); + m_iotemp = m68ki_get_sr(); break; case M68K_ISP: - iotemp = (s_flag && !m_flag) ? REG_SP(this) : REG_ISP(this); + m_iotemp = (m_s_flag && !m_m_flag) ? REG_SP() : REG_ISP(); break; case M68K_USP: - iotemp = (!s_flag) ? REG_SP(this) : REG_USP(this); + m_iotemp = (!m_s_flag) ? REG_SP() : REG_USP(); break; case M68K_MSP: - iotemp = (s_flag && m_flag) ? REG_SP(this) : REG_MSP(this); + m_iotemp = (m_s_flag && m_m_flag) ? REG_SP() : REG_MSP(); break; case M68K_FP0: @@ -1146,39 +1134,39 @@ void m68000_base_device::state_string_export(const device_state_entry &entry, st switch (entry.index()) { case M68K_FP0: - str = string_format("%f", fx80_to_double(REG_FP(this)[0])); + str = string_format("%f", fx80_to_double(m_fpr[0])); break; case M68K_FP1: - str = string_format("%f", fx80_to_double(REG_FP(this)[1])); + str = string_format("%f", fx80_to_double(m_fpr[1])); break; case M68K_FP2: - str = string_format("%f", fx80_to_double(REG_FP(this)[2])); + str = string_format("%f", fx80_to_double(m_fpr[2])); break; case M68K_FP3: - str = string_format("%f", fx80_to_double(REG_FP(this)[3])); + str = string_format("%f", fx80_to_double(m_fpr[3])); break; case M68K_FP4: - str = string_format("%f", fx80_to_double(REG_FP(this)[4])); + str = string_format("%f", fx80_to_double(m_fpr[4])); break; case M68K_FP5: - str = string_format("%f", fx80_to_double(REG_FP(this)[5])); + str = string_format("%f", fx80_to_double(m_fpr[5])); break; case M68K_FP6: - str = string_format("%f", fx80_to_double(REG_FP(this)[6])); + str = string_format("%f", fx80_to_double(m_fpr[6])); break; case M68K_FP7: - str = string_format("%f", fx80_to_double(REG_FP(this)[7])); + str = string_format("%f", fx80_to_double(m_fpr[7])); break; case STATE_GENFLAGS: - sr = m68ki_get_sr(this); + sr = m68ki_get_sr(); str = string_format("%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c", sr & 0x8000 ? 'T':'.', sr & 0x4000 ? 't':'.', @@ -1206,22 +1194,12 @@ void m68000_base_device::state_string_export(const device_state_entry &entry, st void m68000_base_device::set_hmmu_enable(int enable) { - hmmu_enabled = enable; + m_hmmu_enabled = enable; } void m68000_base_device::set_fpu_enable(int enable) { - has_fpu = enable; -} - -int m68000_base_device::get_fpu_enable() -{ - return has_fpu; -} - -void m68000_base_device::set_instruction_hook(read32_delegate ihook) -{ - instruction_hook = ihook; + m_has_fpu = enable; } /**************************************************************************** @@ -1239,16 +1217,15 @@ void m68000_base_device::init8(address_space &space, address_space &ospace) m_direct = space.direct<0>(); m_ospace = &ospace; m_odirect = ospace.direct<0>(); -// m_cpustate = this; - opcode_xor = 0; + m_opcode_xor = 0; - readimm16 = m68k_readimm16_delegate(&m68000_base_device::m68008_read_immediate_16, this); - read8 = m68k_read8_delegate(&address_space::read_byte, &space); - read16 = m68k_read16_delegate(&address_space::read_word, &space); - read32 = m68k_read32_delegate(&address_space::read_dword, &space); - write8 = m68k_write8_delegate(&address_space::write_byte, &space); - write16 = m68k_write16_delegate(&address_space::write_word, &space); - write32 = m68k_write32_delegate(&address_space::write_dword, &space); + m_readimm16 = m68k_readimm16_delegate(&m68000_base_device::m68008_read_immediate_16, this); + m_read8 = m68k_read8_delegate(&address_space::read_byte, &space); + m_read16 = m68k_read16_delegate(&address_space::read_word, &space); + m_read32 = m68k_read32_delegate(&address_space::read_dword, &space); + m_write8 = m68k_write8_delegate(&address_space::write_byte, &space); + m_write16 = m68k_write16_delegate(&address_space::write_word, &space); + m_write32 = m68k_write32_delegate(&address_space::write_dword, &space); } /**************************************************************************** @@ -1257,7 +1234,7 @@ void m68000_base_device::init8(address_space &space, address_space &ospace) uint16_t m68000_base_device::read_immediate_16(offs_t address) { - return m_odirect->read_word((address), opcode_xor); + return m_odirect->read_word((address), m_opcode_xor); } uint16_t m68000_base_device::simple_read_immediate_16(offs_t address) @@ -1279,15 +1256,15 @@ void m68000_base_device::init16(address_space &space, address_space &ospace) m_ospace = &ospace; m_odirect = ospace.direct<0>(); - opcode_xor = 0; + m_opcode_xor = 0; - readimm16 = m68k_readimm16_delegate(&m68000_base_device::simple_read_immediate_16, this); - read8 = m68k_read8_delegate(&address_space::read_byte, &space); - read16 = m68k_read16_delegate(&address_space::read_word, &space); - read32 = m68k_read32_delegate(&address_space::read_dword, &space); - write8 = m68k_write8_delegate(&m68000_base_device::m68000_write_byte, this); - write16 = m68k_write16_delegate(&address_space::write_word, &space); - write32 = m68k_write32_delegate(&address_space::write_dword, &space); + m_readimm16 = m68k_readimm16_delegate(&m68000_base_device::simple_read_immediate_16, this); + m_read8 = m68k_read8_delegate(&address_space::read_byte, &space); + m_read16 = m68k_read16_delegate(&address_space::read_word, &space); + m_read32 = m68k_read32_delegate(&address_space::read_dword, &space); + m_write8 = m68k_write8_delegate(&m68000_base_device::m68000_write_byte, this); + m_write16 = m68k_write16_delegate(&address_space::write_word, &space); + m_write32 = m68k_write32_delegate(&address_space::write_dword, &space); } @@ -1305,24 +1282,24 @@ void m68000_base_device::init32(address_space &space, address_space &ospace) m_direct = space.direct<0>(); m_ospace = &ospace; m_odirect = ospace.direct<0>(); - opcode_xor = WORD_XOR_BE(0); + m_opcode_xor = WORD_XOR_BE(0); - readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16, this); - read8 = m68k_read8_delegate(&address_space::read_byte, &space); - read16 = m68k_read16_delegate(&address_space::read_word_unaligned, &space); - read32 = m68k_read32_delegate(&address_space::read_dword_unaligned, &space); - write8 = m68k_write8_delegate(&address_space::write_byte, &space); - write16 = m68k_write16_delegate(&address_space::write_word_unaligned, &space); - write32 = m68k_write32_delegate(&address_space::write_dword_unaligned, &space); + m_readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16, this); + m_read8 = m68k_read8_delegate(&address_space::read_byte, &space); + m_read16 = m68k_read16_delegate(&address_space::read_word_unaligned, &space); + m_read32 = m68k_read32_delegate(&address_space::read_dword_unaligned, &space); + m_write8 = m68k_write8_delegate(&address_space::write_byte, &space); + m_write16 = m68k_write16_delegate(&address_space::write_word_unaligned, &space); + m_write32 = m68k_write32_delegate(&address_space::write_dword_unaligned, &space); } /* interface for 32-bit data bus with PMMU (68EC020, 68020) */ uint8_t m68000_base_device::read_byte_32_mmu(offs_t address) { - if (pmmu_enabled) + if (m_pmmu_enabled) { - address = pmmu_translate_addr(this, address); - if (mmu_tmp_buserror_occurred) { + address = pmmu_translate_addr(address); + if (m_mmu_tmp_buserror_occurred) { return ~0; } } @@ -1332,10 +1309,10 @@ uint8_t m68000_base_device::read_byte_32_mmu(offs_t address) void m68000_base_device::write_byte_32_mmu(offs_t address, uint8_t data) { - if (pmmu_enabled) + if (m_pmmu_enabled) { - address = pmmu_translate_addr(this, address); - if (mmu_tmp_buserror_occurred) { + address = pmmu_translate_addr(address); + if (m_mmu_tmp_buserror_occurred) { return; } } @@ -1345,15 +1322,15 @@ void m68000_base_device::write_byte_32_mmu(offs_t address, uint8_t data) uint16_t m68000_base_device::read_immediate_16_mmu(offs_t address) { - if (pmmu_enabled) + if (m_pmmu_enabled) { - address = pmmu_translate_addr(this, address); - if (mmu_tmp_buserror_occurred) { + address = pmmu_translate_addr(address); + if (m_mmu_tmp_buserror_occurred) { return ~0; } } - return m_odirect->read_word((address), opcode_xor); + return m_odirect->read_word((address), m_opcode_xor); } /* potentially misaligned 16-bit reads with a 32-bit data bus (and 24-bit address bus) */ @@ -1361,16 +1338,16 @@ uint16_t m68000_base_device::readword_d32_mmu(offs_t address) { uint16_t result; - if (pmmu_enabled) + if (m_pmmu_enabled) { - uint32_t address0 = pmmu_translate_addr(this, address); - if (mmu_tmp_buserror_occurred) { + uint32_t address0 = pmmu_translate_addr(address); + if (m_mmu_tmp_buserror_occurred) { return ~0; } else if (WORD_ALIGNED(address)) { return m_space->read_word(address0); } else { - uint32_t address1 = pmmu_translate_addr(this, address + 1); - if (mmu_tmp_buserror_occurred) { + uint32_t address1 = pmmu_translate_addr(address + 1); + if (m_mmu_tmp_buserror_occurred) { return ~0; } else { result = m_space->read_byte(address0) << 8; @@ -1388,17 +1365,17 @@ uint16_t m68000_base_device::readword_d32_mmu(offs_t address) /* potentially misaligned 16-bit writes with a 32-bit data bus (and 24-bit address bus) */ void m68000_base_device::writeword_d32_mmu(offs_t address, uint16_t data) { - if (pmmu_enabled) + if (m_pmmu_enabled) { - uint32_t address0 = pmmu_translate_addr(this, address); - if (mmu_tmp_buserror_occurred) { + uint32_t address0 = pmmu_translate_addr(address); + if (m_mmu_tmp_buserror_occurred) { return; } else if (WORD_ALIGNED(address)) { m_space->write_word(address0, data); return; } else { - uint32_t address1 = pmmu_translate_addr(this, address + 1); - if (mmu_tmp_buserror_occurred) { + uint32_t address1 = pmmu_translate_addr(address + 1); + if (m_mmu_tmp_buserror_occurred) { return; } else { m_space->write_byte(address0, data >> 8); @@ -1422,10 +1399,10 @@ uint32_t m68000_base_device::readlong_d32_mmu(offs_t address) { uint32_t result; - if (pmmu_enabled) + if (m_pmmu_enabled) { - uint32_t address0 = pmmu_translate_addr(this, address); - if (mmu_tmp_buserror_occurred) { + uint32_t address0 = pmmu_translate_addr(address); + if (m_mmu_tmp_buserror_occurred) { return ~0; } else if ((address +3) & 0xfc) { // not at page boundary; use default code @@ -1433,16 +1410,16 @@ uint32_t m68000_base_device::readlong_d32_mmu(offs_t address) } else if (DWORD_ALIGNED(address)) { // 0 return m_space->read_dword(address0); } else { - uint32_t address2 = pmmu_translate_addr(this, address+2); - if (mmu_tmp_buserror_occurred) { + uint32_t address2 = pmmu_translate_addr(address+2); + if (m_mmu_tmp_buserror_occurred) { return ~0; } else if (WORD_ALIGNED(address)) { // 2 result = m_space->read_word(address0) << 16; return result | m_space->read_word(address2); } else { - uint32_t address1 = pmmu_translate_addr(this, address+1); - uint32_t address3 = pmmu_translate_addr(this, address+3); - if (mmu_tmp_buserror_occurred) { + uint32_t address1 = pmmu_translate_addr(address+1); + uint32_t address3 = pmmu_translate_addr(address+3); + if (m_mmu_tmp_buserror_occurred) { return ~0; } else { result = m_space->read_byte(address0) << 24; @@ -1468,10 +1445,10 @@ uint32_t m68000_base_device::readlong_d32_mmu(offs_t address) /* potentially misaligned 32-bit writes with a 32-bit data bus (and 24-bit address bus) */ void m68000_base_device::writelong_d32_mmu(offs_t address, uint32_t data) { - if (pmmu_enabled) + if (m_pmmu_enabled) { - uint32_t address0 = pmmu_translate_addr(this, address); - if (mmu_tmp_buserror_occurred) { + uint32_t address0 = pmmu_translate_addr(address); + if (m_mmu_tmp_buserror_occurred) { return; } else if ((address +3) & 0xfc) { // not at page boundary; use default code @@ -1480,17 +1457,17 @@ void m68000_base_device::writelong_d32_mmu(offs_t address, uint32_t data) m_space->write_dword(address0, data); return; } else { - uint32_t address2 = pmmu_translate_addr(this, address+2); - if (mmu_tmp_buserror_occurred) { + uint32_t address2 = pmmu_translate_addr(address+2); + if (m_mmu_tmp_buserror_occurred) { return; } else if (WORD_ALIGNED(address)) { // 2 m_space->write_word(address0, data >> 16); m_space->write_word(address2, data); return; } else { - uint32_t address1 = pmmu_translate_addr(this, address+1); - uint32_t address3 = pmmu_translate_addr(this, address+3); - if (mmu_tmp_buserror_occurred) { + uint32_t address1 = pmmu_translate_addr(address+1); + uint32_t address3 = pmmu_translate_addr(address+3); + if (m_mmu_tmp_buserror_occurred) { return; } else { m_space->write_byte(address0, data >> 24); @@ -1524,24 +1501,24 @@ void m68000_base_device::init32mmu(address_space &space, address_space &ospace) m_direct = space.direct<0>(); m_ospace = &ospace; m_odirect = ospace.direct<0>(); - opcode_xor = WORD_XOR_BE(0); + m_opcode_xor = WORD_XOR_BE(0); - readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16_mmu, this); - read8 = m68k_read8_delegate(&m68000_base_device::read_byte_32_mmu, this); - read16 = m68k_read16_delegate(&m68000_base_device::readword_d32_mmu, this); - read32 = m68k_read32_delegate(&m68000_base_device::readlong_d32_mmu, this); - write8 = m68k_write8_delegate(&m68000_base_device::write_byte_32_mmu, this); - write16 = m68k_write16_delegate(&m68000_base_device::writeword_d32_mmu, this); - write32 = m68k_write32_delegate(&m68000_base_device::writelong_d32_mmu, this); + m_readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16_mmu, this); + m_read8 = m68k_read8_delegate(&m68000_base_device::read_byte_32_mmu, this); + m_read16 = m68k_read16_delegate(&m68000_base_device::readword_d32_mmu, this); + m_read32 = m68k_read32_delegate(&m68000_base_device::readlong_d32_mmu, this); + m_write8 = m68k_write8_delegate(&m68000_base_device::write_byte_32_mmu, this); + m_write16 = m68k_write16_delegate(&m68000_base_device::writeword_d32_mmu, this); + m_write32 = m68k_write32_delegate(&m68000_base_device::writelong_d32_mmu, this); } /* interface for 32-bit data bus with PMMU (68EC020, 68020) */ uint8_t m68000_base_device::read_byte_32_hmmu(offs_t address) { - if (hmmu_enabled) + if (m_hmmu_enabled) { - address = hmmu_translate_addr(this, address); + address = hmmu_translate_addr(address); } return m_space->read_byte(address); @@ -1549,9 +1526,9 @@ uint8_t m68000_base_device::read_byte_32_hmmu(offs_t address) void m68000_base_device::write_byte_32_hmmu(offs_t address, uint8_t data) { - if (hmmu_enabled) + if (m_hmmu_enabled) { - address = hmmu_translate_addr(this, address); + address = hmmu_translate_addr(address); } m_space->write_byte(address, data); @@ -1559,12 +1536,12 @@ void m68000_base_device::write_byte_32_hmmu(offs_t address, uint8_t data) uint16_t m68000_base_device::read_immediate_16_hmmu(offs_t address) { - if (hmmu_enabled) + if (m_hmmu_enabled) { - address = hmmu_translate_addr(this, address); + address = hmmu_translate_addr(address); } - return m_odirect->read_word((address), opcode_xor); + return m_odirect->read_word((address), m_opcode_xor); } /* potentially misaligned 16-bit reads with a 32-bit data bus (and 24-bit address bus) */ @@ -1572,9 +1549,9 @@ uint16_t m68000_base_device::readword_d32_hmmu(offs_t address) { uint16_t result; - if (hmmu_enabled) + if (m_hmmu_enabled) { - address = hmmu_translate_addr(this, address); + address = hmmu_translate_addr(address); } if (WORD_ALIGNED(address)) @@ -1586,9 +1563,9 @@ uint16_t m68000_base_device::readword_d32_hmmu(offs_t address) /* potentially misaligned 16-bit writes with a 32-bit data bus (and 24-bit address bus) */ void m68000_base_device::writeword_d32_hmmu(offs_t address, uint16_t data) { - if (hmmu_enabled) + if (m_hmmu_enabled) { - address = hmmu_translate_addr(this, address); + address = hmmu_translate_addr(address); } if (WORD_ALIGNED(address)) @@ -1605,9 +1582,9 @@ uint32_t m68000_base_device::readlong_d32_hmmu(offs_t address) { uint32_t result; - if (hmmu_enabled) + if (m_hmmu_enabled) { - address = hmmu_translate_addr(this, address); + address = hmmu_translate_addr(address); } if (DWORD_ALIGNED(address)) @@ -1625,9 +1602,9 @@ uint32_t m68000_base_device::readlong_d32_hmmu(offs_t address) /* potentially misaligned 32-bit writes with a 32-bit data bus (and 24-bit address bus) */ void m68000_base_device::writelong_d32_hmmu(offs_t address, uint32_t data) { - if (hmmu_enabled) + if (m_hmmu_enabled) { - address = hmmu_translate_addr(this, address); + address = hmmu_translate_addr(address); } if (DWORD_ALIGNED(address)) @@ -1652,20 +1629,20 @@ void m68000_base_device::init32hmmu(address_space &space, address_space &ospace) m_direct = space.direct<0>(); m_ospace = &ospace; m_odirect = ospace.direct<0>(); - opcode_xor = WORD_XOR_BE(0); + m_opcode_xor = WORD_XOR_BE(0); - readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16_hmmu, this); - read8 = m68k_read8_delegate(&m68000_base_device::read_byte_32_hmmu, this); - read16 = m68k_read16_delegate(&m68000_base_device::readword_d32_hmmu, this); - read32 = m68k_read32_delegate(&m68000_base_device::readlong_d32_hmmu, this); - write8 = m68k_write8_delegate(&m68000_base_device::write_byte_32_hmmu, this); - write16 = m68k_write16_delegate(&m68000_base_device::writeword_d32_hmmu, this); - write32 = m68k_write32_delegate(&m68000_base_device::writelong_d32_hmmu, this); + m_readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16_hmmu, this); + m_read8 = m68k_read8_delegate(&m68000_base_device::read_byte_32_hmmu, this); + m_read16 = m68k_read16_delegate(&m68000_base_device::readword_d32_hmmu, this); + m_read32 = m68k_read32_delegate(&m68000_base_device::readlong_d32_hmmu, this); + m_write8 = m68k_write8_delegate(&m68000_base_device::write_byte_32_hmmu, this); + m_write16 = m68k_write16_delegate(&m68000_base_device::writeword_d32_hmmu, this); + m_write32 = m68k_write32_delegate(&m68000_base_device::writelong_d32_hmmu, this); } void m68000_base_device::set_reset_callback(write_line_delegate callback) { - reset_instr_callback = callback; + m_reset_instr_callback = callback; } // fault_addr = address to indicate fault at @@ -1673,29 +1650,30 @@ void m68000_base_device::set_reset_callback(write_line_delegate callback) // fc = 3-bit function code of access (usually you'd just put what m68k_get_fc() returns here) void m68000_base_device::set_buserror_details(uint32_t fault_addr, uint8_t rw, uint8_t fc) { - aerr_address = fault_addr; - aerr_write_mode = rw; - aerr_fc = fc; + m_aerr_address = fault_addr; + m_aerr_write_mode = rw; + m_aerr_fc = fc; + m_mmu_tmp_buserror_address = fault_addr; // Hack for x68030 } void m68000_base_device::set_cmpild_callback(write32_delegate callback) { - cmpild_instr_callback = callback; + m_cmpild_instr_callback = callback; } void m68000_base_device::set_rte_callback(write_line_delegate callback) { - rte_instr_callback = callback; + m_rte_instr_callback = callback; } void m68000_base_device::set_tas_write_callback(write8_delegate callback) { - tas_write_callback = callback; + m_tas_write_callback = callback; } uint16_t m68000_base_device::get_fc() { - return mmu_tmp_fc; + return m_mmu_tmp_fc; } /**************************************************************************** @@ -1704,49 +1682,50 @@ uint16_t m68000_base_device::get_fc() void m68000_base_device::define_state(void) { - uint32_t addrmask = (cpu_type & MASK_24BIT_SPACE) ? 0xffffff : 0xffffffff; + uint32_t addrmask = (m_cpu_type & MASK_24BIT_SPACE) ? 0xffffff : 0xffffffff; - state_add(STATE_GENPC, "PC", pc).mask(addrmask).callimport(); - state_add(STATE_GENPCBASE, "CURPC", ppc).mask(addrmask).callimport().noshow(); - state_add(M68K_SP, "SP", dar[15]); - state_add(STATE_GENSP, "GENSP", dar[15]).noshow(); - state_add(STATE_GENFLAGS, "GENFLAGS", iotemp).noshow().callimport().callexport().formatstr("%16s"); - state_add(M68K_ISP, "ISP", iotemp).callimport().callexport(); - state_add(M68K_USP, "USP", iotemp).callimport().callexport(); - if (cpu_type & MASK_020_OR_LATER) - state_add(M68K_MSP, "MSP", iotemp).callimport().callexport(); - state_add(M68K_SR, "SR", iotemp).noshow().callimport().callexport(); + state_add(STATE_GENPC, "PC", m_pc).mask(addrmask).callimport(); + state_add(STATE_GENPCBASE, "CURPC", m_ppc).mask(addrmask).callimport().noshow(); + state_add(M68K_SP, "SP", m_dar[15]); + state_add(STATE_GENSP, "GENSP", m_dar[15]).noshow(); + state_add(STATE_GENFLAGS, "GENFLAGS", m_iotemp).noshow().callimport().callexport().formatstr("%16s"); + state_add(M68K_ISP, "ISP", m_iotemp).callimport().callexport(); + state_add(M68K_USP, "USP", m_iotemp).callimport().callexport(); + if (m_cpu_type & MASK_020_OR_LATER) + state_add(M68K_MSP, "MSP", m_iotemp).callimport().callexport(); + state_add(M68K_SR, "SR", m_iotemp).noshow().callimport().callexport(); for (int regnum = 0; regnum < 8; regnum++) { - state_add(M68K_D0 + regnum, string_format("D%d", regnum).c_str(), dar[regnum]); + state_add(M68K_D0 + regnum, string_format("D%d", regnum).c_str(), m_dar[regnum]); } for (int regnum = 0; regnum < 8; regnum++) { - state_add(M68K_A0 + regnum, string_format("A%d", regnum).c_str(), dar[8 + regnum]); + state_add(M68K_A0 + regnum, string_format("A%d", regnum).c_str(), m_dar[8 + regnum]); } - state_add(M68K_PREF_ADDR, "PREF_ADDR", pref_addr).mask(addrmask); - state_add(M68K_PREF_DATA, "PREF_DATA", pref_data); + state_add(M68K_IR, "IR", m_ir); + state_add(M68K_PREF_ADDR, "PREF_ADDR", m_pref_addr).mask(addrmask); + state_add(M68K_PREF_DATA, "PREF_DATA", m_pref_data); - if (cpu_type & MASK_010_OR_LATER) + if (m_cpu_type & MASK_010_OR_LATER) { - state_add(M68K_SFC, "SFC", sfc).mask(0x7); - state_add(M68K_DFC, "DFC", dfc).mask(0x7); - state_add(M68K_VBR, "VBR", vbr); + state_add(M68K_SFC, "SFC", m_sfc).mask(0x7); + state_add(M68K_DFC, "DFC", m_dfc).mask(0x7); + state_add(M68K_VBR, "VBR", m_vbr); } - if (cpu_type & MASK_020_OR_LATER) + if (m_cpu_type & MASK_020_OR_LATER) { - state_add(M68K_CACR, "CACR", cacr); - state_add(M68K_CAAR, "CAAR", caar); + state_add(M68K_CACR, "CACR", m_cacr); + state_add(M68K_CAAR, "CAAR", m_caar); } - if (cpu_type & MASK_030_OR_LATER) + if (m_cpu_type & MASK_030_OR_LATER) { for (int regnum = 0; regnum < 8; regnum++) { - state_add(M68K_FP0 + regnum, string_format("FP%d", regnum).c_str(), iotemp).callimport().callexport().formatstr("%10s"); + state_add(M68K_FP0 + regnum, string_format("FP%d", regnum).c_str(), m_iotemp).callimport().callexport().formatstr("%10s"); } - state_add(M68K_FPSR, "FPSR", fpsr); - state_add(M68K_FPCR, "FPCR", fpcr); + state_add(M68K_FPSR, "FPSR", m_fpsr); + state_add(M68K_FPCR, "FPCR", m_fpcr); } } @@ -1761,26 +1740,25 @@ void m68000_base_device::init_cpu_m68000(void) { init_cpu_common(); - cpu_type = CPU_TYPE_000; -// dasm_type = M68K_CPU_TYPE_68000; - - init16(*program, *oprogram); - sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[0]; - cyc_instruction = m68ki_cycles[0]; - cyc_exception = m68ki_exception_cycle_table[0]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 2; - cyc_dbcc_f_noexp = -2; - cyc_dbcc_f_exp = 2; - cyc_scc_r_true = 2; - cyc_movem_w = 2; - cyc_movem_l = 3; - cyc_shift = 1; - cyc_reset = 132; - has_pmmu = 0; - has_hmmu = 0; - has_fpu = 0; + m_cpu_type = CPU_TYPE_000; + + init16(*m_program, *m_oprogram); + m_sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[0]; + m_cyc_instruction = m68ki_cycles[0]; + m_cyc_exception = m68ki_exception_cycle_table[0]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 2; + m_cyc_dbcc_f_noexp = -2; + m_cyc_dbcc_f_exp = 2; + m_cyc_scc_r_true = 2; + m_cyc_movem_w = 2; + m_cyc_movem_l = 3; + m_cyc_shift = 1; + m_cyc_reset = 132; + m_has_pmmu = 0; + m_has_hmmu = 0; + m_has_fpu = 0; define_state(); @@ -1791,25 +1769,24 @@ void m68000_base_device::init_cpu_m68008(void) { init_cpu_common(); - cpu_type = CPU_TYPE_008; -// dasm_type = M68K_CPU_TYPE_68008; - - init8(*program, *oprogram); - sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[0]; - cyc_instruction = m68ki_cycles[0]; - cyc_exception = m68ki_exception_cycle_table[0]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 2; - cyc_dbcc_f_noexp = -2; - cyc_dbcc_f_exp = 2; - cyc_scc_r_true = 2; - cyc_movem_w = 2; - cyc_movem_l = 3; - cyc_shift = 1; - cyc_reset = 132; - has_pmmu = 0; - has_fpu = 0; + m_cpu_type = CPU_TYPE_008; + + init8(*m_program, *m_oprogram); + m_sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[0]; + m_cyc_instruction = m68ki_cycles[0]; + m_cyc_exception = m68ki_exception_cycle_table[0]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 2; + m_cyc_dbcc_f_noexp = -2; + m_cyc_dbcc_f_exp = 2; + m_cyc_scc_r_true = 2; + m_cyc_movem_w = 2; + m_cyc_movem_l = 3; + m_cyc_shift = 1; + m_cyc_reset = 132; + m_has_pmmu = 0; + m_has_fpu = 0; define_state(); @@ -1819,25 +1796,24 @@ void m68000_base_device::init_cpu_m68008(void) void m68000_base_device::init_cpu_m68010(void) { init_cpu_common(); - cpu_type = CPU_TYPE_010; -// dasm_type = M68K_CPU_TYPE_68010; - - init16(*program, *oprogram); - sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[1]; - cyc_instruction = m68ki_cycles[1]; - cyc_exception = m68ki_exception_cycle_table[1]; - cyc_bcc_notake_b = -4; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 6; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 3; - cyc_shift = 1; - cyc_reset = 130; - has_pmmu = 0; - has_fpu = 0; + m_cpu_type = CPU_TYPE_010; + + init16(*m_program, *m_oprogram); + m_sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[1]; + m_cyc_instruction = m68ki_cycles[1]; + m_cyc_exception = m68ki_exception_cycle_table[1]; + m_cyc_bcc_notake_b = -4; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 6; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 3; + m_cyc_shift = 1; + m_cyc_reset = 130; + m_has_pmmu = 0; + m_has_fpu = 0; define_state(); } @@ -1846,23 +1822,22 @@ void m68000_base_device::init_cpu_m68010(void) void m68000_base_device::init_cpu_m68020(void) { init_cpu_common(); - cpu_type = CPU_TYPE_020; -// dasm_type = M68K_CPU_TYPE_68020; - - init32(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[2]; - cyc_instruction = m68ki_cycles[2]; - cyc_exception = m68ki_exception_cycle_table[2]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; + m_cpu_type = CPU_TYPE_020; + + init32(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[2]; + m_cyc_instruction = m68ki_cycles[2]; + m_cyc_exception = m68ki_exception_cycle_table[2]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; define_state(); } @@ -1871,18 +1846,18 @@ void m68000_base_device::init_cpu_m68020fpu(void) { init_cpu_m68020(); - has_fpu = 1; + m_has_fpu = 1; } void m68000_base_device::init_cpu_m68020pmmu(void) { init_cpu_m68020(); - has_pmmu = 1; - has_fpu = 1; + m_has_pmmu = 1; + m_has_fpu = 1; - init32mmu(*program, *oprogram); + init32mmu(*m_program, *m_oprogram); } @@ -1891,37 +1866,36 @@ void m68000_base_device::init_cpu_m68020hmmu(void) { init_cpu_m68020(); - has_hmmu = 1; - has_fpu = 1; + m_has_hmmu = 1; + m_has_fpu = 1; - init32hmmu(*program, *oprogram); + init32hmmu(*m_program, *m_oprogram); } void m68000_base_device::init_cpu_m68ec020(void) { init_cpu_common(); - cpu_type = CPU_TYPE_EC020; -// dasm_type = M68K_CPU_TYPE_68EC020; - - - init32(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[2]; - cyc_instruction = m68ki_cycles[2]; - cyc_exception = m68ki_exception_cycle_table[2]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; - has_pmmu = 0; - has_fpu = 0; + m_cpu_type = CPU_TYPE_EC020; + + + init32(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[2]; + m_cyc_instruction = m68ki_cycles[2]; + m_cyc_exception = m68ki_exception_cycle_table[2]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; + m_has_pmmu = 0; + m_has_fpu = 0; define_state(); } @@ -1931,26 +1905,25 @@ void m68000_base_device::init_cpu_m68030(void) { init_cpu_common(); - cpu_type = CPU_TYPE_030; -// dasm_type = M68K_CPU_TYPE_68030; - - - init32mmu(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[3]; - cyc_instruction = m68ki_cycles[3]; - cyc_exception = m68ki_exception_cycle_table[3]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; - has_pmmu = 1; - has_fpu = 1; + m_cpu_type = CPU_TYPE_030; + + + init32mmu(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[3]; + m_cyc_instruction = m68ki_cycles[3]; + m_cyc_exception = m68ki_exception_cycle_table[3]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; + m_has_pmmu = 1; + m_has_fpu = 1; define_state(); } @@ -1961,26 +1934,25 @@ void m68000_base_device::init_cpu_m68ec030(void) { init_cpu_common(); - cpu_type = CPU_TYPE_EC030; -// dasm_type = M68K_CPU_TYPE_68EC030; - - - init32(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[3]; - cyc_instruction = m68ki_cycles[3]; - cyc_exception = m68ki_exception_cycle_table[3]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; - has_pmmu = 0; /* EC030 lacks the PMMU and is effectively a die-shrink 68020 */ - has_fpu = 1; + m_cpu_type = CPU_TYPE_EC030; + + + init32(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[3]; + m_cyc_instruction = m68ki_cycles[3]; + m_cyc_exception = m68ki_exception_cycle_table[3]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; + m_has_pmmu = 0; /* EC030 lacks the PMMU and is effectively a die-shrink 68020 */ + m_has_fpu = 1; define_state(); } @@ -1991,26 +1963,25 @@ void m68000_base_device::init_cpu_m68040(void) { init_cpu_common(); - cpu_type = CPU_TYPE_040; -// dasm_type = M68K_CPU_TYPE_68040; - - - init32mmu(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[4]; - cyc_instruction = m68ki_cycles[4]; - cyc_exception = m68ki_exception_cycle_table[4]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; - has_pmmu = 1; - has_fpu = 1; + m_cpu_type = CPU_TYPE_040; + + + init32mmu(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[4]; + m_cyc_instruction = m68ki_cycles[4]; + m_cyc_exception = m68ki_exception_cycle_table[4]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; + m_has_pmmu = 1; + m_has_fpu = 1; define_state(); } @@ -2020,26 +1991,25 @@ void m68000_base_device::init_cpu_m68ec040(void) { init_cpu_common(); - cpu_type = CPU_TYPE_EC040; -// dasm_type = M68K_CPU_TYPE_68EC040; - - - init32(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[4]; - cyc_instruction = m68ki_cycles[4]; - cyc_exception = m68ki_exception_cycle_table[4]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; - has_pmmu = 0; - has_fpu = 0; + m_cpu_type = CPU_TYPE_EC040; + + + init32(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[4]; + m_cyc_instruction = m68ki_cycles[4]; + m_cyc_exception = m68ki_exception_cycle_table[4]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; + m_has_pmmu = 0; + m_has_fpu = 0; define_state(); } @@ -2049,26 +2019,25 @@ void m68000_base_device::init_cpu_m68lc040(void) { init_cpu_common(); - cpu_type = CPU_TYPE_LC040; -// dasm_type = M68K_CPU_TYPE_68LC040; - - - init32mmu(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[4]; - cyc_instruction = m68ki_cycles[4]; - cyc_exception = m68ki_exception_cycle_table[4]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; - has_pmmu = 1; - has_fpu = 0; + m_cpu_type = CPU_TYPE_LC040; + + + init32mmu(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[4]; + m_cyc_instruction = m68ki_cycles[4]; + m_cyc_exception = m68ki_exception_cycle_table[4]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; + m_has_pmmu = 1; + m_has_fpu = 0; define_state(); } @@ -2077,7 +2046,7 @@ void m68000_base_device::init_cpu_m68lc040(void) void m68000_base_device::init_cpu_scc68070(void) { init_cpu_m68010(); - cpu_type = CPU_TYPE_SCC070; + m_cpu_type = CPU_TYPE_SCC070; } @@ -2085,24 +2054,23 @@ void m68000_base_device::init_cpu_fscpu32(void) { init_cpu_common(); - cpu_type = CPU_TYPE_FSCPU32; -// dasm_type = M68K_CPU_TYPE_FSCPU32; - - - init32(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[5]; - cyc_instruction = m68ki_cycles[5]; - cyc_exception = m68ki_exception_cycle_table[5]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; + m_cpu_type = CPU_TYPE_FSCPU32; + + + init32(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[5]; + m_cyc_instruction = m68ki_cycles[5]; + m_cyc_exception = m68ki_exception_cycle_table[5]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; define_state(); } @@ -2113,24 +2081,23 @@ void m68000_base_device::init_cpu_coldfire(void) { init_cpu_common(); - cpu_type = CPU_TYPE_COLDFIRE; -// dasm_type = M68K_CPU_TYPE_COLDFIRE; - - - init32(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[6]; - cyc_instruction = m68ki_cycles[6]; - cyc_exception = m68ki_exception_cycle_table[6]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; + m_cpu_type = CPU_TYPE_COLDFIRE; + + + init32(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[6]; + m_cyc_instruction = m68ki_cycles[6]; + m_cyc_exception = m68ki_exception_cycle_table[6]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; define_state(); } @@ -2232,26 +2199,26 @@ util::disasm_interface *mcf5206e_device::create_disassembler() /* Service an interrupt request and start exception processing */ -void m68000_base_device::m68ki_exception_interrupt(m68000_base_device *m68k, uint32_t int_level) +void m68000_base_device::m68ki_exception_interrupt(uint32_t int_level) { uint32_t vector; uint32_t sr; uint32_t new_pc; - if(CPU_TYPE_IS_000(cpu_type)) + if(CPU_TYPE_IS_000()) { - instr_mode = INSTRUCTION_NO; + m_instr_mode = INSTRUCTION_NO; } - /* Turn off the stopped state */ - stopped &= ~STOP_LEVEL_STOP; + /* Turn off the m_stopped state */ + m_stopped &= ~STOP_LEVEL_STOP; /* If we are halted, don't do anything */ - if(stopped) + if(m_stopped) return; /* Acknowledge the interrupt */ - vector = int_ack_callback(*this, int_level); + vector = m_int_ack_callback(*this, int_level); /* Get the interrupt vector */ if(vector == M68K_INT_ACK_AUTOVECTOR) @@ -2264,52 +2231,39 @@ void m68000_base_device::m68ki_exception_interrupt(m68000_base_device *m68k, uin return; /* Start exception processing */ - sr = m68ki_init_exception(m68k); + sr = m68ki_init_exception(); /* Set the interrupt mask to the level of the one being serviced */ - int_mask = int_level<<8; + m_int_mask = int_level<<8; /* Get the new PC */ - new_pc = m68ki_read_data_32(this, (vector<<2) + vbr); + new_pc = m68ki_read_data_32((vector<<2) + m_vbr); /* If vector is uninitialized, call the uninitialized interrupt vector */ if(new_pc == 0) - new_pc = m68ki_read_data_32(this, (EXCEPTION_UNINITIALIZED_INTERRUPT<<2) + vbr); + new_pc = m68ki_read_data_32((EXCEPTION_UNINITIALIZED_INTERRUPT<<2) + m_vbr); /* Generate a stack frame */ - m68ki_stack_frame_0000(this, REG_PC(m68k), sr, vector); - if(m_flag && CPU_TYPE_IS_EC020_PLUS(cpu_type)) + m68ki_stack_frame_0000(m_pc, sr, vector); + if(m_m_flag && CPU_TYPE_IS_EC020_PLUS()) { /* Create throwaway frame */ - m68ki_set_sm_flag(this, s_flag); /* clear M */ + m68ki_set_sm_flag(m_s_flag); /* clear M */ sr |= 0x2000; /* Same as SR in master stack frame except S is forced high */ - m68ki_stack_frame_0001(this, REG_PC(m68k), sr, vector); + m68ki_stack_frame_0001(m_pc, sr, vector); } - m68ki_jump(this, new_pc); + m68ki_jump(new_pc); /* Defer cycle counting until later */ - remaining_cycles -= cyc_exception[vector]; + m_remaining_cycles -= m_cyc_exception[vector]; } -DEFINE_DEVICE_TYPE(M68K, m68000_base_device, "m68k", "M68K") - //------------------------------------------------- -// h6280_device - constructor +// m68000_base_device - constructor //------------------------------------------------- -m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : cpu_device(mconfig, M68K, tag, owner, clock), - m_program_config("program", ENDIANNESS_BIG, 16, 24), - m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, 16, 24) -{ - clear_all(); -} - - - - m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map) : cpu_device(mconfig, type, tag, owner, clock), @@ -2331,146 +2285,136 @@ m68000_base_device::m68000_base_device(const machine_config &mconfig, const char void m68000_base_device::clear_all() { - cpu_type= 0; -// dasm_type= 0; - for (auto & elem : dar) + m_cpu_type= 0; +// + for (auto & elem : m_dar) elem= 0; - ppc= 0; - pc= 0; - for (auto & elem : sp) + m_ppc= 0; + m_pc= 0; + for (auto & elem : m_sp) elem= 0; - vbr= 0; - sfc= 0; - dfc= 0; - cacr= 0; - caar= 0; - ir= 0; + m_vbr= 0; + m_sfc= 0; + m_dfc= 0; + m_cacr= 0; + m_caar= 0; + m_ir= 0; // for (int i=0;i<8;i++) -// fpr[i]= 0; - fpiar= 0; - fpsr= 0; - fpcr= 0; - t1_flag= 0; - t0_flag= 0; - s_flag= 0; - m_flag= 0; - x_flag= 0; - n_flag= 0; - not_z_flag= 0; - v_flag= 0; - c_flag= 0; - int_mask= 0; - int_level= 0; - stopped= 0; - pref_addr= 0; - pref_data= 0; - sr_mask= 0; - instr_mode= 0; - run_mode= 0; - has_pmmu= 0; - has_hmmu= 0; - pmmu_enabled= 0; - hmmu_enabled= 0; - has_fpu= 0; - fpu_just_reset= 0; - - cyc_bcc_notake_b = 0; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 0; - cyc_scc_r_true = 0; - cyc_movem_w = 0; - cyc_movem_l = 0; - cyc_shift = 0; - cyc_reset = 0; - - initial_cycles = 0; - remaining_cycles = 0; - reset_cycles = 0; - tracing = 0; +// m_fpr[i]= 0; + m_fpiar= 0; + m_fpsr= 0; + m_fpcr= 0; + m_t1_flag= 0; + m_t0_flag= 0; + m_s_flag= 0; + m_m_flag= 0; + m_x_flag= 0; + m_n_flag= 0; + m_not_z_flag= 0; + m_v_flag= 0; + m_c_flag= 0; + m_int_mask= 0; + m_int_level= 0; + m_stopped= 0; + m_pref_addr= 0; + m_pref_data= 0; + m_sr_mask= 0; + m_instr_mode= 0; + m_run_mode= 0; + m_has_pmmu= 0; + m_has_hmmu= 0; + m_pmmu_enabled= 0; + m_hmmu_enabled= 0; + m_has_fpu= 0; + m_fpu_just_reset= 0; + + m_cyc_bcc_notake_b = 0; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 0; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 0; + m_cyc_movem_l = 0; + m_cyc_shift = 0; + m_cyc_reset = 0; + + m_initial_cycles = 0; + m_remaining_cycles = 0; + m_reset_cycles = 0; + m_tracing = 0; m_address_error = 0; - aerr_address = 0; - aerr_write_mode = 0; - aerr_fc = 0; + m_aerr_address = 0; + m_aerr_write_mode = 0; + m_aerr_fc = 0; - virq_state = 0; - nmi_pending = 0; + m_virq_state = 0; + m_nmi_pending = 0; - cyc_instruction = nullptr; - cyc_exception = nullptr; + m_cyc_instruction = nullptr; + m_cyc_exception = nullptr; - int_ack_callback = device_irq_acknowledge_delegate(); - program = nullptr; + m_int_ack_callback = device_irq_acknowledge_delegate(); + m_program = nullptr; - opcode_xor = 0; -// readimm16 = 0; -// read8 = 0; -// read16 = 0; -// read32 = 0; -// write8 = 0; -// write16 = 0; -// write32 = 0; + m_opcode_xor = 0; +// m_readimm16 = 0; +// m_read8 = 0; +// m_read16 = 0; +// m_read32 = 0; +// m_write8 = 0; +// m_write16 = 0; +// m_write32 = 0; m_space = nullptr; m_direct = nullptr; - iotemp = 0; + m_iotemp = 0; - save_sr = 0; - save_stopped = 0; - save_halted = 0; + m_save_sr = 0; + m_save_stopped = 0; + m_save_halted = 0; - mmu_crp_aptr = mmu_crp_limit = 0; - mmu_srp_aptr = mmu_srp_limit = 0; - mmu_urp_aptr = 0; - mmu_tc = 0; - mmu_sr = 0; - mmu_sr_040 = 0; + m_mmu_crp_aptr = m_mmu_crp_limit = 0; + m_mmu_srp_aptr = m_mmu_srp_limit = 0; + m_mmu_urp_aptr = 0; + m_mmu_tc = 0; + m_mmu_sr = 0; + m_mmu_sr_040 = 0; for (int i=0; i<MMU_ATC_ENTRIES;i++) - mmu_atc_tag[i] = mmu_atc_data[i] = 0; - - mmu_atc_rr = 0; - mmu_tt0 = mmu_tt1 = 0; - mmu_itt0 = mmu_itt1 = mmu_dtt0 = mmu_dtt1 = 0; - mmu_acr0= mmu_acr1 = mmu_acr2 = mmu_acr3 = 0; - mmu_tmp_sr = 0; - mmu_tmp_fc = 0; - mmu_tmp_rw = 0; - mmu_tmp_buserror_address = 0; - mmu_tmp_buserror_occurred = 0; - mmu_tmp_buserror_fc = 0; - mmu_tmp_buserror_rw = 0; + m_mmu_atc_tag[i] = m_mmu_atc_data[i] = 0; + + m_mmu_atc_rr = 0; + m_mmu_tt0 = m_mmu_tt1 = 0; + m_mmu_itt0 = m_mmu_itt1 = m_mmu_dtt0 = m_mmu_dtt1 = 0; + m_mmu_acr0 = m_mmu_acr1 = m_mmu_acr2 = m_mmu_acr3 = 0; + m_mmu_tmp_sr = 0; + m_mmu_tmp_fc = 0; + m_mmu_tmp_rw = 0; + m_mmu_tmp_buserror_address = 0; + m_mmu_tmp_buserror_occurred = 0; + m_mmu_tmp_buserror_fc = 0; + m_mmu_tmp_buserror_rw = 0; for (int i=0;i<M68K_IC_SIZE;i++) { - ic_address[i] = 0; - ic_data[i] = 0; - ic_valid[i] = false; + m_ic_address[i] = 0; + m_ic_data[i] = 0; + m_ic_valid[i] = false; } - internal = nullptr; + m_internal = nullptr; } -void m68000_base_device::execute_run() -{ - cpu_execute(); -} - void m68000_base_device::device_start() { } -void m68000_base_device::device_reset() -{ - reset_cpu(); -} - void m68000_base_device::device_stop() { } @@ -2492,13 +2436,13 @@ void m68000_base_device::execute_set_input(int inputnum, int state) case M68K_IRQ_6: case M68K_IRQ_7: case INPUT_LINE_NMI: - set_irq_line(this, inputnum, state); + set_irq_line(inputnum, state); break; case M68K_LINE_BUSERROR: if (state == ASSERT_LINE) { - m68k_cause_bus_error(this); + m68k_cause_bus_error(); } break; } @@ -2653,9 +2597,9 @@ bool m68020hmmu_device::memory_translate(int space, int intention, offs_t &addre { /* only applies to the program address space and only does something if the MMU's enabled */ { - if ((space == AS_PROGRAM) && (hmmu_enabled)) + if ((space == AS_PROGRAM) && (m_hmmu_enabled)) { - address = hmmu_translate_addr(this, address); + address = hmmu_translate_addr(address); } } return true; diff --git a/src/devices/cpu/m68000/m68kcpu.h b/src/devices/cpu/m68000/m68kcpu.h index dce0c2205a8..4c6db9f4490 100644 --- a/src/devices/cpu/m68000/m68kcpu.h +++ b/src/devices/cpu/m68000/m68kcpu.h @@ -17,18 +17,11 @@ #pragma once - -class m68000_base_device; - -#include "m68000.h" - - #include <limits.h> #if defined(__sun__) && defined(__svr4__) #undef REG_SP #undef REG_PC -#undef REG_FP #endif /* ======================================================================== */ @@ -36,9 +29,9 @@ class m68000_base_device; /* ======================================================================== */ /* Check for > 32bit sizes */ -#define MAKE_INT_8(A) (int8_t)(A) -#define MAKE_INT_16(A) (int16_t)(A) -#define MAKE_INT_32(A) (int32_t)(A) +static constexpr int8_t MAKE_INT_8(uint32_t A) { return (int8_t)(A); } +static constexpr int16_t MAKE_INT_16(uint32_t A) { return (int16_t)(A); } +static constexpr int32_t MAKE_INT_32(uint32_t A) { return (int32_t)(A); } /* ======================================================================== */ @@ -46,65 +39,65 @@ class m68000_base_device; /* ======================================================================== */ /* Exception Vectors handled by emulation */ -#define EXCEPTION_RESET 0 -#define EXCEPTION_BUS_ERROR 2 /* This one is not emulated! */ -#define EXCEPTION_ADDRESS_ERROR 3 /* This one is partially emulated (doesn't stack a proper frame yet) */ -#define EXCEPTION_ILLEGAL_INSTRUCTION 4 -#define EXCEPTION_ZERO_DIVIDE 5 -#define EXCEPTION_CHK 6 -#define EXCEPTION_TRAPV 7 -#define EXCEPTION_PRIVILEGE_VIOLATION 8 -#define EXCEPTION_TRACE 9 -#define EXCEPTION_1010 10 -#define EXCEPTION_1111 11 -#define EXCEPTION_FORMAT_ERROR 14 -#define EXCEPTION_UNINITIALIZED_INTERRUPT 15 -#define EXCEPTION_SPURIOUS_INTERRUPT 24 -#define EXCEPTION_INTERRUPT_AUTOVECTOR 24 -#define EXCEPTION_TRAP_BASE 32 +static constexpr int EXCEPTION_RESET = 0; +static constexpr int EXCEPTION_BUS_ERROR = 2; /* This one is not emulated! */ +static constexpr int EXCEPTION_ADDRESS_ERROR = 3; /* This one is partially emulated (doesn't stack a proper frame yet) */ +static constexpr int EXCEPTION_ILLEGAL_INSTRUCTION = 4; +static constexpr int EXCEPTION_ZERO_DIVIDE = 5; +static constexpr int EXCEPTION_CHK = 6; +static constexpr int EXCEPTION_TRAPV = 7; +static constexpr int EXCEPTION_PRIVILEGE_VIOLATION = 8; +static constexpr int EXCEPTION_TRACE = 9; +static constexpr int EXCEPTION_1010 = 10; +static constexpr int EXCEPTION_1111 = 11; +static constexpr int EXCEPTION_FORMAT_ERROR = 14; +static constexpr int EXCEPTION_UNINITIALIZED_INTERRUPT = 15; +static constexpr int EXCEPTION_SPURIOUS_INTERRUPT = 24; +static constexpr int EXCEPTION_INTERRUPT_AUTOVECTOR = 24; +static constexpr int EXCEPTION_TRAP_BASE = 32; /* Function codes set by CPU during data/address bus activity */ -#define FUNCTION_CODE_USER_DATA 1 -#define FUNCTION_CODE_USER_PROGRAM 2 -#define FUNCTION_CODE_SUPERVISOR_DATA 5 -#define FUNCTION_CODE_SUPERVISOR_PROGRAM 6 -#define FUNCTION_CODE_CPU_SPACE 7 +static constexpr int FUNCTION_CODE_USER_DATA = 1; +static constexpr int FUNCTION_CODE_USER_PROGRAM = 2; +static constexpr int FUNCTION_CODE_SUPERVISOR_DATA = 5; +static constexpr int FUNCTION_CODE_SUPERVISOR_PROGRAM = 6; +static constexpr int FUNCTION_CODE_CPU_SPACE = 7; /* CPU types for deciding what to emulate */ -#define CPU_TYPE_000 (0x00000001) -#define CPU_TYPE_008 (0x00000002) -#define CPU_TYPE_010 (0x00000004) -#define CPU_TYPE_EC020 (0x00000008) -#define CPU_TYPE_020 (0x00000010) -#define CPU_TYPE_EC030 (0x00000020) -#define CPU_TYPE_030 (0x00000040) -#define CPU_TYPE_EC040 (0x00000080) -#define CPU_TYPE_LC040 (0x00000100) -#define CPU_TYPE_040 (0x00000200) -#define CPU_TYPE_SCC070 (0x00000400) -#define CPU_TYPE_FSCPU32 (0x00000800) -#define CPU_TYPE_COLDFIRE (0x00001000) +static constexpr int CPU_TYPE_000 = (0x00000001); +static constexpr int CPU_TYPE_008 = (0x00000002); +static constexpr int CPU_TYPE_010 = (0x00000004); +static constexpr int CPU_TYPE_EC020 = (0x00000008); +static constexpr int CPU_TYPE_020 = (0x00000010); +static constexpr int CPU_TYPE_EC030 = (0x00000020); +static constexpr int CPU_TYPE_030 = (0x00000040); +static constexpr int CPU_TYPE_EC040 = (0x00000080); +static constexpr int CPU_TYPE_LC040 = (0x00000100); +static constexpr int CPU_TYPE_040 = (0x00000200); +static constexpr int CPU_TYPE_SCC070 = (0x00000400); +static constexpr int CPU_TYPE_FSCPU32 = (0x00000800); +static constexpr int CPU_TYPE_COLDFIRE = (0x00001000); /* Different ways to stop the CPU */ -#define STOP_LEVEL_STOP 1 -#define STOP_LEVEL_HALT 2 +static constexpr int STOP_LEVEL_STOP = 1; +static constexpr int STOP_LEVEL_HALT = 2; /* Used for 68000 address error processing */ -#define INSTRUCTION_YES 0 -#define INSTRUCTION_NO 0x08 -#define MODE_READ 0x10 -#define MODE_WRITE 0 +static constexpr int INSTRUCTION_YES = 0; +static constexpr int INSTRUCTION_NO = 0x08; +static constexpr int MODE_READ = 0x10; +static constexpr int MODE_WRITE = 0; -#define RUN_MODE_NORMAL 0 -#define RUN_MODE_BERR_AERR_RESET 1 +static constexpr int RUN_MODE_NORMAL = 0; +static constexpr int RUN_MODE_BERR_AERR_RESET = 1; -#define M68K_CACR_IBE 0x10 // Instruction Burst Enable -#define M68K_CACR_CI 0x08 // Clear Instruction Cache -#define M68K_CACR_CEI 0x04 // Clear Entry in Instruction Cache -#define M68K_CACR_FI 0x02 // Freeze Instruction Cache -#define M68K_CACR_EI 0x01 // Enable Instruction Cache +static constexpr int M68K_CACR_IBE = 0x10; // Instruction Burst Enable +static constexpr int M68K_CACR_CI = 0x08; // Clear Instruction Cache +static constexpr int M68K_CACR_CEI = 0x04; // Clear Entry in Instruction Cache +static constexpr int M68K_CACR_FI = 0x02; // Freeze Instruction Cache +static constexpr int M68K_CACR_EI = 0x01; // Enable Instruction Cache /* ======================================================================== */ /* ================================ MACROS ================================ */ @@ -114,112 +107,103 @@ class m68000_base_device; /* ---------------------------- General Macros ---------------------------- */ /* Bit Isolation Macros */ -#define BIT_0(A) ((A) & 0x00000001) -#define BIT_1(A) ((A) & 0x00000002) -#define BIT_2(A) ((A) & 0x00000004) -#define BIT_3(A) ((A) & 0x00000008) -#define BIT_4(A) ((A) & 0x00000010) -#define BIT_5(A) ((A) & 0x00000020) -#define BIT_6(A) ((A) & 0x00000040) -#define BIT_7(A) ((A) & 0x00000080) -#define BIT_8(A) ((A) & 0x00000100) -#define BIT_9(A) ((A) & 0x00000200) -#define BIT_A(A) ((A) & 0x00000400) -#define BIT_B(A) ((A) & 0x00000800) -#define BIT_C(A) ((A) & 0x00001000) -#define BIT_D(A) ((A) & 0x00002000) -#define BIT_E(A) ((A) & 0x00004000) -#define BIT_F(A) ((A) & 0x00008000) -#define BIT_10(A) ((A) & 0x00010000) -#define BIT_11(A) ((A) & 0x00020000) -#define BIT_12(A) ((A) & 0x00040000) -#define BIT_13(A) ((A) & 0x00080000) -#define BIT_14(A) ((A) & 0x00100000) -#define BIT_15(A) ((A) & 0x00200000) -#define BIT_16(A) ((A) & 0x00400000) -#define BIT_17(A) ((A) & 0x00800000) -#define BIT_18(A) ((A) & 0x01000000) -#define BIT_19(A) ((A) & 0x02000000) -#define BIT_1A(A) ((A) & 0x04000000) -#define BIT_1B(A) ((A) & 0x08000000) -#define BIT_1C(A) ((A) & 0x10000000) -#define BIT_1D(A) ((A) & 0x20000000) -#define BIT_1E(A) ((A) & 0x40000000) -#define BIT_1F(A) ((A) & 0x80000000) +static constexpr uint32_t BIT_0(uint32_t A) { return ((A) & 0x00000001); } +static constexpr uint32_t BIT_1(uint32_t A) { return ((A) & 0x00000002); } +static constexpr uint32_t BIT_2(uint32_t A) { return ((A) & 0x00000004); } +static constexpr uint32_t BIT_3(uint32_t A) { return ((A) & 0x00000008); } +static constexpr uint32_t BIT_4(uint32_t A) { return ((A) & 0x00000010); } +static constexpr uint32_t BIT_5(uint32_t A) { return ((A) & 0x00000020); } +static constexpr uint32_t BIT_6(uint32_t A) { return ((A) & 0x00000040); } +static constexpr uint32_t BIT_7(uint32_t A) { return ((A) & 0x00000080); } +static constexpr uint32_t BIT_8(uint32_t A) { return ((A) & 0x00000100); } +static constexpr uint32_t BIT_9(uint32_t A) { return ((A) & 0x00000200); } +static constexpr uint32_t BIT_A(uint32_t A) { return ((A) & 0x00000400); } +static constexpr uint32_t BIT_B(uint32_t A) { return ((A) & 0x00000800); } +static constexpr uint32_t BIT_C(uint32_t A) { return ((A) & 0x00001000); } +static constexpr uint32_t BIT_D(uint32_t A) { return ((A) & 0x00002000); } +static constexpr uint32_t BIT_E(uint32_t A) { return ((A) & 0x00004000); } +static constexpr uint32_t BIT_F(uint32_t A) { return ((A) & 0x00008000); } +static constexpr uint32_t BIT_10(uint32_t A) { return ((A) & 0x00010000); } +static constexpr uint32_t BIT_11(uint32_t A) { return ((A) & 0x00020000); } +static constexpr uint32_t BIT_12(uint32_t A) { return ((A) & 0x00040000); } +static constexpr uint32_t BIT_13(uint32_t A) { return ((A) & 0x00080000); } +static constexpr uint32_t BIT_14(uint32_t A) { return ((A) & 0x00100000); } +static constexpr uint32_t BIT_15(uint32_t A) { return ((A) & 0x00200000); } +static constexpr uint32_t BIT_16(uint32_t A) { return ((A) & 0x00400000); } +static constexpr uint32_t BIT_17(uint32_t A) { return ((A) & 0x00800000); } +static constexpr uint32_t BIT_18(uint32_t A) { return ((A) & 0x01000000); } +static constexpr uint32_t BIT_19(uint32_t A) { return ((A) & 0x02000000); } +static constexpr uint32_t BIT_1A(uint32_t A) { return ((A) & 0x04000000); } +static constexpr uint32_t BIT_1B(uint32_t A) { return ((A) & 0x08000000); } +static constexpr uint32_t BIT_1C(uint32_t A) { return ((A) & 0x10000000); } +static constexpr uint32_t BIT_1D(uint32_t A) { return ((A) & 0x20000000); } +static constexpr uint32_t BIT_1E(uint32_t A) { return ((A) & 0x40000000); } +static constexpr uint32_t BIT_1F(uint32_t A) { return ((A) & 0x80000000); } /* Get the most significant bit for specific sizes */ -#define GET_MSB_8(A) ((A) & 0x80) -#define GET_MSB_9(A) ((A) & 0x100) -#define GET_MSB_16(A) ((A) & 0x8000) -#define GET_MSB_17(A) ((A) & 0x10000) -#define GET_MSB_32(A) ((A) & 0x80000000) -#define GET_MSB_33(A) ((A) & 0x100000000U) +static constexpr uint32_t GET_MSB_8(uint32_t A) { return ((A) & 0x80); } +static constexpr uint32_t GET_MSB_9(uint32_t A) { return ((A) & 0x100); } +static constexpr uint32_t GET_MSB_16(uint32_t A) { return ((A) & 0x8000); } +static constexpr uint32_t GET_MSB_17(uint32_t A) { return ((A) & 0x10000); } +static constexpr uint32_t GET_MSB_32(uint32_t A) { return ((A) & 0x80000000); } +static constexpr uint64_t GET_MSB_33(uint64_t A) { return ((A) & 0x100000000U); } /* Isolate nibbles */ -#define LOW_NIBBLE(A) ((A) & 0x0f) -#define HIGH_NIBBLE(A) ((A) & 0xf0) +static constexpr uint32_t LOW_NIBBLE(uint32_t A) { return ((A) & 0x0f); } +static constexpr uint32_t HIGH_NIBBLE(uint32_t A) { return ((A) & 0xf0); } /* These are used to isolate 8, 16, and 32 bit sizes */ -#define MASK_OUT_ABOVE_2(A) ((A) & 3) -#define MASK_OUT_ABOVE_8(A) ((A) & 0xff) -#define MASK_OUT_ABOVE_16(A) ((A) & 0xffff) -#define MASK_OUT_BELOW_2(A) ((A) & ~3) -#define MASK_OUT_BELOW_8(A) ((A) & ~0xff) -#define MASK_OUT_BELOW_16(A) ((A) & ~0xffff) +static constexpr uint32_t MASK_OUT_ABOVE_2(uint32_t A) { return ((A) & 3); } +static constexpr uint32_t MASK_OUT_ABOVE_8(uint32_t A) { return ((A) & 0xff); } +static constexpr uint32_t MASK_OUT_ABOVE_16(uint32_t A) { return ((A) & 0xffff); } +static constexpr uint32_t MASK_OUT_BELOW_2(uint32_t A) { return ((A) & ~3); } +static constexpr uint32_t MASK_OUT_BELOW_8(uint32_t A) { return ((A) & ~0xff); } +static constexpr uint32_t MASK_OUT_BELOW_16(uint32_t A) { return ((A) & ~0xffff); } /* No need to mask if we are 32 bit */ -#define MASK_OUT_ABOVE_32(A) ((A) & u64(0xffffffffU)) -#define MASK_OUT_BELOW_32(A) ((A) & ~u64(0xffffffffU)) +static constexpr uint32_t MASK_OUT_ABOVE_32(uint32_t A) { return ((A) & u64(0xffffffffU)); } +static constexpr uint64_t MASK_OUT_BELOW_32(uint64_t A) { return ((A) & ~u64(0xffffffffU)); } /* Shift & Rotate Macros. */ -#define LSL(A, C) ((A) << (C)) -#define LSR(A, C) ((A) >> (C)) +static constexpr uint32_t LSL(uint32 A, uint32_t C) { return ((A) << (C)); } +static constexpr uint32_t LSR(uint32 A, uint32_t C) { return ((A) >> (C)); } /* We have to do this because the morons at ANSI decided that shifts * by >= data size are undefined. */ -#define LSR_32(A, C) ((C) < 32 ? (A) >> (C) : 0) -#define LSL_32(A, C) ((C) < 32 ? (A) << (C) : 0) +static constexpr uint32_t LSR_32(uint32 A, uint32_t C) { return ((C) < 32 ? (A) >> (C) : 0); } +static constexpr uint32_t LSL_32(uint32 A, uint32_t C) { return ((C) < 32 ? (A) << (C) : 0); } -#define LSL_32_64(A, C) ((A) << (C)) -#define LSR_32_64(A, C) ((A) >> (C)) -#define ROL_33_64(A, C) (LSL_32_64(A, C) | LSR_32_64(A, 33-(C))) -#define ROR_33_64(A, C) (LSR_32_64(A, C) | LSL_32_64(A, 33-(C))) +static constexpr uint64_t LSL_32_64(uint64_t A, uint32_t C) { return ((A) << (C)); } +static constexpr uint64_t LSR_32_64(uint64_t A, uint32_t C) { return ((A) >> (C)); } +static constexpr uint64_t ROL_33_64(uint64_t A, uint32_t C) { return (LSL_32_64(A, C) | LSR_32_64(A, 33 - (C))); } +static constexpr uint64_t ROR_33_64(uint64_t A, uint32_t C) { return (LSR_32_64(A, C) | LSL_32_64(A, 33 - (C))); } -#define ROL_8(A, C) MASK_OUT_ABOVE_8(LSL(A, C) | LSR(A, 8-(C))) -#define ROL_9(A, C) (LSL(A, C) | LSR(A, 9-(C))) -#define ROL_16(A, C) MASK_OUT_ABOVE_16(LSL(A, C) | LSR(A, 16-(C))) -#define ROL_17(A, C) (LSL(A, C) | LSR(A, 17-(C))) -#define ROL_32(A, C) MASK_OUT_ABOVE_32(LSL_32(A, C) | LSR_32(A, 32-(C))) -#define ROL_33(A, C) (LSL_32(A, C) | LSR_32(A, 33-(C))) +static constexpr uint32_t ROL_8(uint32_t A, uint32_t C) { return MASK_OUT_ABOVE_8(LSL(A, C) | LSR(A, 8-(C))); } +static constexpr uint32_t ROL_9(uint32_t A, uint32_t C) { return (LSL(A, C) | LSR(A, 9-(C))); } +static constexpr uint32_t ROL_16(uint32_t A, uint32_t C) { return MASK_OUT_ABOVE_16(LSL(A, C) | LSR(A, 16-(C))); } +static constexpr uint32_t ROL_17(uint32_t A, uint32_t C) { return (LSL(A, C) | LSR(A, 17-(C))); } +static constexpr uint32_t ROL_32(uint32_t A, uint32_t C) { return MASK_OUT_ABOVE_32(LSL_32(A, C) | LSR_32(A, 32-(C))); } -#define ROR_8(A, C) MASK_OUT_ABOVE_8(LSR(A, C) | LSL(A, 8-(C))) -#define ROR_9(A, C) (LSR(A, C) | LSL(A, 9-(C))) -#define ROR_16(A, C) MASK_OUT_ABOVE_16(LSR(A, C) | LSL(A, 16-(C))) -#define ROR_17(A, C) (LSR(A, C) | LSL(A, 17-(C))) -#define ROR_32(A, C) MASK_OUT_ABOVE_32(LSR_32(A, C) | LSL_32(A, 32-(C))) -#define ROR_33(A, C) (LSR_32(A, C) | LSL_32(A, 33-(C))) +static constexpr uint32_t ROR_8(uint32_t A, uint32_t C) { return MASK_OUT_ABOVE_8(LSR(A, C) | LSL(A, 8-(C))); } +static constexpr uint32_t ROR_9(uint32_t A, uint32_t C) { return (LSR(A, C) | LSL(A, 9-(C))); } +static constexpr uint32_t ROR_16(uint32_t A, uint32_t C) { return MASK_OUT_ABOVE_16(LSR(A, C) | LSL(A, 16-(C))); } +static constexpr uint32_t ROR_17(uint32_t A, uint32_t C) { return (LSR(A, C) | LSL(A, 17-(C))); } +static constexpr uint32_t ROR_32(uint32_t A, uint32_t C) { return MASK_OUT_ABOVE_32(LSR_32(A, C) | LSL_32(A, 32-(C))); } /* ------------------------------ CPU Access ------------------------------ */ /* Access the CPU registers */ -#define REG_DA(M) (M)->dar /* easy access to data and address regs */ -#define REG_D(M) (M)->dar -#define REG_A(M) ((M)->dar+8) -#define REG_PPC(M) (M)->ppc -#define REG_PC(M) (M)->pc -#define REG_SP_BASE(M) (M)->sp -#define REG_USP(M) (M)->sp[0] -#define REG_ISP(M) (M)->sp[4] -#define REG_MSP(M) (M)->sp[6] -#define REG_SP(M) (M)->dar[15] - -#define REG_FP(M) (M)->fpr -#define REG_FPCR(M) (M)->fpcr -#define REG_FPSR(M) (M)->fpsr -#define REG_FPIAR(M) (M)->fpiar +inline uint32_t (®_DA())[16] { return m_dar; } /* easy access to data and address regs */ +inline uint32_t (®_D())[16] { return m_dar; } +inline uint32_t (*REG_A()) { return (m_dar+8); } +inline uint32_t (®_SP_BASE())[7]{ return m_sp; } +inline uint32_t ®_USP() { return m_sp[0]; } +inline uint32_t ®_ISP() { return m_sp[4]; } +inline uint32_t ®_MSP() { return m_sp[6]; } +inline uint32_t ®_SP() { return m_dar[15]; } /* ----------------------------- Configuration ---------------------------- */ @@ -227,37 +211,34 @@ class m68000_base_device; /* These defines are dependant on the configuration defines in m68kconf.h */ /* Disable certain comparisons if we're not using all CPU types */ -#define CPU_TYPE_IS_COLDFIRE(A) ((A) & (CPU_TYPE_COLDFIRE)) +inline uint32_t CPU_TYPE_IS_COLDFIRE() const { return ((m_cpu_type) & (CPU_TYPE_COLDFIRE)); } -#define CPU_TYPE_IS_040_PLUS(A) ((A) & (CPU_TYPE_040 | CPU_TYPE_EC040)) -#define CPU_TYPE_IS_040_LESS(A) 1 +inline uint32_t CPU_TYPE_IS_040_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_040 | CPU_TYPE_EC040)); } -#define CPU_TYPE_IS_030_PLUS(A) ((A) & (CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040)) -#define CPU_TYPE_IS_030_LESS(A) 1 +inline uint32_t CPU_TYPE_IS_030_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040)); } -#define CPU_TYPE_IS_020_PLUS(A) ((A) & (CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)) -#define CPU_TYPE_IS_020_LESS(A) 1 +inline uint32_t CPU_TYPE_IS_020_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)); } -#define CPU_TYPE_IS_020_VARIANT(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_FSCPU32)) +inline uint32_t CPU_TYPE_IS_020_VARIANT() const { return ((m_cpu_type) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_FSCPU32)); } -#define CPU_TYPE_IS_EC020_PLUS(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)) -#define CPU_TYPE_IS_EC020_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020)) +inline uint32_t CPU_TYPE_IS_EC020_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)); } +inline uint32_t CPU_TYPE_IS_EC020_LESS() const { return ((m_cpu_type) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020)); } -#define CPU_TYPE_IS_010(A) ((A) == CPU_TYPE_010) -#define CPU_TYPE_IS_010_PLUS(A) ((A) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)) -#define CPU_TYPE_IS_010_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010)) +inline uint32_t CPU_TYPE_IS_010() const { return ((m_cpu_type) == CPU_TYPE_010); } +inline uint32_t CPU_TYPE_IS_010_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)); } +inline uint32_t CPU_TYPE_IS_010_LESS() const { return ((m_cpu_type) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010)); } -#define CPU_TYPE_IS_000(A) ((A) == CPU_TYPE_000 || (A) == CPU_TYPE_008) +inline uint32_t CPU_TYPE_IS_000() const { return ((m_cpu_type) == CPU_TYPE_000 || (m_cpu_type) == CPU_TYPE_008); } /* Initiates trace checking before each instruction (t1) */ -#define m68ki_trace_t1(m68k) m68k->tracing = m68k->t1_flag +inline void m68ki_trace_t1() { m_tracing = m_t1_flag; } /* adds t0 to trace checking if we encounter change of flow */ -#define m68ki_trace_t0(m68k) m68k->tracing |= m68k->t0_flag +inline void m68ki_trace_t0() { m_tracing |= m_t0_flag; } /* Clear all tracing */ -#define m68ki_clear_trace(m68k) m68k->tracing = 0 +inline void m68ki_clear_trace() { m_tracing = 0; } /* Cause a trace exception if we are tracing */ -#define m68ki_exception_if_trace(m68k) if(m68k->tracing) m68ki_exception_trace(m68k) +inline void m68ki_exception_if_trace() { if(m_tracing) m68ki_exception_trace(); } /* -------------------------- EA / Operand Access ------------------------- */ @@ -267,205 +248,205 @@ class m68000_base_device; * where XXX is register X and YYY is register Y */ /* Data Register Isolation */ -#define DX(M) (REG_D(M)[((M)->ir >> 9) & 7]) -#define DY(M) (REG_D(M)[(M)->ir & 7]) +inline uint32_t &DX() { return (REG_D()[(m_ir >> 9) & 7]); } +inline uint32_t &DY() { return (REG_D()[m_ir & 7]); } /* Address Register Isolation */ -#define AX(M) (REG_A(M)[((M)->ir >> 9) & 7]) -#define AY(M) (REG_A(M)[(M)->ir & 7]) +inline uint32_t &AX() { return (REG_A()[(m_ir >> 9) & 7]); } +inline uint32_t &AY() { return (REG_A()[m_ir & 7]); } /* Effective Address Calculations */ -#define EA_AY_AI_8(M) AY(M) /* address register indirect */ -#define EA_AY_AI_16(M) EA_AY_AI_8(M) -#define EA_AY_AI_32(M) EA_AY_AI_8(M) -#define EA_AY_PI_8(M) (AY(M)++) /* postincrement (size = byte) */ -#define EA_AY_PI_16(M) ((AY(M)+=2)-2) /* postincrement (size = word) */ -#define EA_AY_PI_32(M) ((AY(M)+=4)-4) /* postincrement (size = long) */ -#define EA_AY_PD_8(M) (--AY(M)) /* predecrement (size = byte) */ -#define EA_AY_PD_16(M) (AY(M)-=2) /* predecrement (size = word) */ -#define EA_AY_PD_32(M) (AY(M)-=4) /* predecrement (size = long) */ -#define EA_AY_DI_8(M) (AY(M)+MAKE_INT_16(m68ki_read_imm_16(M))) /* displacement */ -#define EA_AY_DI_16(M) EA_AY_DI_8(M) -#define EA_AY_DI_32(M) EA_AY_DI_8(M) -#define EA_AY_IX_8(M) m68ki_get_ea_ix(M, AY(M)) /* indirect + index */ -#define EA_AY_IX_16(M) EA_AY_IX_8(M) -#define EA_AY_IX_32(M) EA_AY_IX_8(M) - -#define EA_AX_AI_8(M) AX(M) -#define EA_AX_AI_16(M) EA_AX_AI_8(M) -#define EA_AX_AI_32(M) EA_AX_AI_8(M) -#define EA_AX_PI_8(M) (AX(M)++) -#define EA_AX_PI_16(M) ((AX(M)+=2)-2) -#define EA_AX_PI_32(M) ((AX(M)+=4)-4) -#define EA_AX_PD_8(M) (--AX(M)) -#define EA_AX_PD_16(M) (AX(M)-=2) -#define EA_AX_PD_32(M) (AX(M)-=4) -#define EA_AX_DI_8(M) (AX(M)+MAKE_INT_16(m68ki_read_imm_16(M))) -#define EA_AX_DI_16(M) EA_AX_DI_8(M) -#define EA_AX_DI_32(M) EA_AX_DI_8(M) -#define EA_AX_IX_8(M) m68ki_get_ea_ix(M, AX(M)) -#define EA_AX_IX_16(M) EA_AX_IX_8(M) -#define EA_AX_IX_32(M) EA_AX_IX_8(M) - -#define EA_A7_PI_8(m68k) ((REG_A(m68k)[7]+=2)-2) -#define EA_A7_PD_8(m68k) (REG_A(m68k)[7]-=2) - -#define EA_AW_8(m68k) MAKE_INT_16(m68ki_read_imm_16(m68k)) /* absolute word */ -#define EA_AW_16(m68k) EA_AW_8(m68k) -#define EA_AW_32(m68k) EA_AW_8(m68k) -#define EA_AL_8(m68k) m68ki_read_imm_32(m68k) /* absolute long */ -#define EA_AL_16(m68k) EA_AL_8(m68k) -#define EA_AL_32(m68k) EA_AL_8(m68k) -#define EA_PCDI_8(m68k) m68ki_get_ea_pcdi(m68k) /* pc indirect + displacement */ -#define EA_PCDI_16(m68k) EA_PCDI_8(m68k) -#define EA_PCDI_32(m68k) EA_PCDI_8(m68k) -#define EA_PCIX_8(m68k) m68ki_get_ea_pcix(m68k) /* pc indirect + index */ -#define EA_PCIX_16(m68k) EA_PCIX_8(m68k) -#define EA_PCIX_32(m68k) EA_PCIX_8(m68k) - - -#define OPER_I_8(m68k) m68ki_read_imm_8(m68k) -#define OPER_I_16(m68k) m68ki_read_imm_16(m68k) -#define OPER_I_32(m68k) m68ki_read_imm_32(m68k) +inline uint32_t EA_AY_AI_8() { return AY(); } /* address register indirect */ +inline uint32_t EA_AY_AI_16() { return EA_AY_AI_8(); } +inline uint32_t EA_AY_AI_32() { return EA_AY_AI_8(); } +inline uint32_t EA_AY_PI_8() { return (AY()++); } /* postincrement (size = byte) */ +inline uint32_t EA_AY_PI_16() { return ((AY()+=2)-2); } /* postincrement (size = word) */ +inline uint32_t EA_AY_PI_32() { return ((AY()+=4)-4); } /* postincrement (size = long) */ +inline uint32_t EA_AY_PD_8() { return (--AY()); } /* predecrement (size = byte) */ +inline uint32_t EA_AY_PD_16() { return (AY()-=2); } /* predecrement (size = word) */ +inline uint32_t EA_AY_PD_32() { return (AY()-=4); } /* predecrement (size = long) */ +inline uint32_t EA_AY_DI_8() { return (AY()+MAKE_INT_16(m68ki_read_imm_16())); } /* displacement */ +inline uint32_t EA_AY_DI_16() { return EA_AY_DI_8(); } +inline uint32_t EA_AY_DI_32() { return EA_AY_DI_8(); } +inline uint32_t EA_AY_IX_8() { return m68ki_get_ea_ix(AY()); } /* indirect + index */ +inline uint32_t EA_AY_IX_16() { return EA_AY_IX_8(); } +inline uint32_t EA_AY_IX_32() { return EA_AY_IX_8(); } + +inline uint32_t EA_AX_AI_8() { return AX(); } +inline uint32_t EA_AX_AI_16() { return EA_AX_AI_8(); } +inline uint32_t EA_AX_AI_32() { return EA_AX_AI_8(); } +inline uint32_t EA_AX_PI_8() { return (AX()++); } +inline uint32_t EA_AX_PI_16() { return ((AX()+=2)-2); } +inline uint32_t EA_AX_PI_32() { return ((AX()+=4)-4); } +inline uint32_t EA_AX_PD_8() { return (--AX()); } +inline uint32_t EA_AX_PD_16() { return (AX()-=2); } +inline uint32_t EA_AX_PD_32() { return (AX()-=4); } +inline uint32_t EA_AX_DI_8() { return (AX()+MAKE_INT_16(m68ki_read_imm_16())); } +inline uint32_t EA_AX_DI_16() { return EA_AX_DI_8(); } +inline uint32_t EA_AX_DI_32() { return EA_AX_DI_8(); } +inline uint32_t EA_AX_IX_8() { return m68ki_get_ea_ix(AX()); } +inline uint32_t EA_AX_IX_16() { return EA_AX_IX_8(); } +inline uint32_t EA_AX_IX_32() { return EA_AX_IX_8(); } + +inline uint32_t EA_A7_PI_8() { return ((REG_A()[7]+=2)-2); } +inline uint32_t EA_A7_PD_8() { return (REG_A()[7]-=2); } + +inline uint32_t EA_AW_8() { return MAKE_INT_16(m68ki_read_imm_16()); } /* absolute word */ +inline uint32_t EA_AW_16() { return EA_AW_8(); } +inline uint32_t EA_AW_32() { return EA_AW_8(); } +inline uint32_t EA_AL_8() { return m68ki_read_imm_32(); } /* absolute long */ +inline uint32_t EA_AL_16() { return EA_AL_8(); } +inline uint32_t EA_AL_32() { return EA_AL_8(); } +inline uint32_t EA_PCDI_8() { return m68ki_get_ea_pcdi(); } /* pc indirect + displacement */ +inline uint32_t EA_PCDI_16() { return EA_PCDI_8(); } +inline uint32_t EA_PCDI_32() { return EA_PCDI_8(); } +inline uint32_t EA_PCIX_8() { return m68ki_get_ea_pcix(); } /* pc indirect + index */ +inline uint32_t EA_PCIX_16() { return EA_PCIX_8(); } +inline uint32_t EA_PCIX_32() { return EA_PCIX_8(); } + + +inline uint32_t OPER_I_8() { return m68ki_read_imm_8(); } +inline uint32_t OPER_I_16() { return m68ki_read_imm_16(); } +inline uint32_t OPER_I_32() { return m68ki_read_imm_32(); } /* --------------------------- Status Register ---------------------------- */ /* Flag Calculation Macros */ -#define CFLAG_8(A) (A) -#define CFLAG_16(A) ((A)>>8) +static constexpr uint32_t CFLAG_8(uint32_t A) { return (A); } +static constexpr uint32_t CFLAG_16(uint32_t A) { return ((A)>>8); } -#define CFLAG_ADD_32(S, D, R) (((S & D) | (~R & (S | D)))>>23) -#define CFLAG_SUB_32(S, D, R) (((S & R) | (~D & (S | R)))>>23) +static constexpr uint32_t CFLAG_ADD_32(uint32_t S, uint32_t D, uint32_t R) { return (((S & D) | (~R & (S | D)))>>23); } +static constexpr uint32_t CFLAG_SUB_32(uint32_t S, uint32_t D, uint32_t R) { return (((S & R) | (~D & (S | R)))>>23); } -#define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R)) -#define VFLAG_ADD_16(S, D, R) (((S^R) & (D^R))>>8) -#define VFLAG_ADD_32(S, D, R) (((S^R) & (D^R))>>24) +static constexpr uint32_t VFLAG_ADD_8(uint32_t S, uint32_t D, uint32_t R) { return ((S^R) & (D^R)); } +static constexpr uint32_t VFLAG_ADD_16(uint32_t S, uint32_t D, uint32_t R) { return (((S^R) & (D^R))>>8); } +static constexpr uint32_t VFLAG_ADD_32(uint32_t S, uint32_t D, uint32_t R) { return (((S^R) & (D^R))>>24); } -#define VFLAG_SUB_8(S, D, R) ((S^D) & (R^D)) -#define VFLAG_SUB_16(S, D, R) (((S^D) & (R^D))>>8) -#define VFLAG_SUB_32(S, D, R) (((S^D) & (R^D))>>24) +static constexpr uint32_t VFLAG_SUB_8(uint32_t S, uint32_t D, uint32_t R) { return ((S^D) & (R^D)); } +static constexpr uint32_t VFLAG_SUB_16(uint32_t S, uint32_t D, uint32_t R) { return (((S^D) & (R^D))>>8); } +static constexpr uint32_t VFLAG_SUB_32(uint32_t S, uint32_t D, uint32_t R) { return (((S^D) & (R^D))>>24); } -#define NFLAG_8(A) (A) -#define NFLAG_16(A) ((A)>>8) -#define NFLAG_32(A) ((A)>>24) -#define NFLAG_64(A) ((A)>>56) +static constexpr uint32_t NFLAG_8(uint32_t A) { return (A); } +static constexpr uint32_t NFLAG_16(uint32_t A) { return ((A)>>8); } +static constexpr uint32_t NFLAG_32(uint32_t A) { return ((A)>>24); } +static constexpr uint32_t NFLAG_64(uint64_t A) { return ((A)>>56); } -#define ZFLAG_8(A) MASK_OUT_ABOVE_8(A) -#define ZFLAG_16(A) MASK_OUT_ABOVE_16(A) -#define ZFLAG_32(A) MASK_OUT_ABOVE_32(A) +static constexpr uint32_t ZFLAG_8(uint32_t A) { return MASK_OUT_ABOVE_8(A); } +static constexpr uint32_t ZFLAG_16(uint32_t A) { return MASK_OUT_ABOVE_16(A); } +static constexpr uint32_t ZFLAG_32(uint32_t A) { return MASK_OUT_ABOVE_32(A); } /* Flag values */ -#define NFLAG_SET 0x80 -#define NFLAG_CLEAR 0 -#define CFLAG_SET 0x100 -#define CFLAG_CLEAR 0 -#define XFLAG_SET 0x100 -#define XFLAG_CLEAR 0 -#define VFLAG_SET 0x80 -#define VFLAG_CLEAR 0 -#define ZFLAG_SET 0 -#define ZFLAG_CLEAR 0xffffffff - -#define SFLAG_SET 4 -#define SFLAG_CLEAR 0 -#define MFLAG_SET 2 -#define MFLAG_CLEAR 0 +static constexpr int NFLAG_SET = 0x80; +static constexpr int NFLAG_CLEAR = 0; +static constexpr int CFLAG_SET = 0x100; +static constexpr int CFLAG_CLEAR = 0; +static constexpr int XFLAG_SET = 0x100; +static constexpr int XFLAG_CLEAR = 0; +static constexpr int VFLAG_SET = 0x80; +static constexpr int VFLAG_CLEAR = 0; +static constexpr int ZFLAG_SET = 0; +static constexpr int ZFLAG_CLEAR = 0xffffffff; + +static constexpr int SFLAG_SET = 4; +static constexpr int SFLAG_CLEAR = 0; +static constexpr int MFLAG_SET = 2; +static constexpr int MFLAG_CLEAR = 0; /* Turn flag values into 1 or 0 */ -#define XFLAG_1(M) (((M)->x_flag>>8)&1) -#define NFLAG_1(M) (((M)->n_flag>>7)&1) -#define VFLAG_1(M) (((M)->v_flag>>7)&1) -#define ZFLAG_1(M) (!(M)->not_z_flag) -#define CFLAG_1(M) (((M)->c_flag>>8)&1) +inline uint32_t XFLAG_1() const { return ((m_x_flag>>8)&1); } +inline uint32_t NFLAG_1() const { return ((m_n_flag>>7)&1); } +inline uint32_t VFLAG_1() const { return ((m_v_flag>>7)&1); } +inline uint32_t ZFLAG_1() const { return (!m_not_z_flag); } +inline uint32_t CFLAG_1() const { return ((m_c_flag>>8)&1); } /* Conditions */ -#define COND_CS(M) ((M)->c_flag&0x100) -#define COND_CC(M) (!COND_CS(M)) -#define COND_VS(M) ((M)->v_flag&0x80) -#define COND_VC(M) (!COND_VS(M)) -#define COND_NE(M) (M)->not_z_flag -#define COND_EQ(M) (!COND_NE(M)) -#define COND_MI(M) ((M)->n_flag&0x80) -#define COND_PL(M) (!COND_MI(M)) -#define COND_LT(M) (((M)->n_flag^(M)->v_flag)&0x80) -#define COND_GE(M) (!COND_LT(M)) -#define COND_HI(M) (COND_CC(M) && COND_NE(M)) -#define COND_LS(M) (COND_CS(M) || COND_EQ(M)) -#define COND_GT(M) (COND_GE(M) && COND_NE(M)) -#define COND_LE(M) (COND_LT(M) || COND_EQ(M)) +inline uint32_t COND_CS() const { return (m_c_flag&0x100); } +inline uint32_t COND_CC() const { return (!COND_CS()); } +inline uint32_t COND_VS() const { return (m_v_flag&0x80); } +inline uint32_t COND_VC() const { return (!COND_VS()); } +inline uint32_t COND_NE() const { return m_not_z_flag; } +inline uint32_t COND_EQ() const { return (!COND_NE()); } +inline uint32_t COND_MI() const { return (m_n_flag&0x80); } +inline uint32_t COND_PL() const { return (!COND_MI()); } +inline uint32_t COND_LT() const { return ((m_n_flag^m_v_flag)&0x80); } +inline uint32_t COND_GE() const { return (!COND_LT()); } +inline uint32_t COND_HI() const { return (COND_CC() && COND_NE()); } +inline uint32_t COND_LS() const { return (COND_CS() || COND_EQ()); } +inline uint32_t COND_GT() const { return (COND_GE() && COND_NE()); } +inline uint32_t COND_LE() const { return (COND_LT() || COND_EQ()); } /* Reversed conditions */ -#define COND_NOT_CS(M) COND_CC(M) -#define COND_NOT_CC(M) COND_CS(M) -#define COND_NOT_VS(M) COND_VC(M) -#define COND_NOT_VC(M) COND_VS(M) -#define COND_NOT_NE(M) COND_EQ(M) -#define COND_NOT_EQ(M) COND_NE(M) -#define COND_NOT_MI(M) COND_PL(M) -#define COND_NOT_PL(M) COND_MI(M) -#define COND_NOT_LT(M) COND_GE(M) -#define COND_NOT_GE(M) COND_LT(M) -#define COND_NOT_HI(M) COND_LS(M) -#define COND_NOT_LS(M) COND_HI(M) -#define COND_NOT_GT(M) COND_LE(M) -#define COND_NOT_LE(M) COND_GT(M) +inline uint32_t COND_NOT_CS() const { return COND_CC(); } +inline uint32_t COND_NOT_CC() const { return COND_CS(); } +inline uint32_t COND_NOT_VS() const { return COND_VC(); } +inline uint32_t COND_NOT_VC() const { return COND_VS(); } +inline uint32_t COND_NOT_NE() const { return COND_EQ(); } +inline uint32_t COND_NOT_EQ() const { return COND_NE(); } +inline uint32_t COND_NOT_MI() const { return COND_PL(); } +inline uint32_t COND_NOT_PL() const { return COND_MI(); } +inline uint32_t COND_NOT_LT() const { return COND_GE(); } +inline uint32_t COND_NOT_GE() const { return COND_LT(); } +inline uint32_t COND_NOT_HI() const { return COND_LS(); } +inline uint32_t COND_NOT_LS() const { return COND_HI(); } +inline uint32_t COND_NOT_GT() const { return COND_LE(); } +inline uint32_t COND_NOT_LE() const { return COND_GT(); } /* Not real conditions, but here for convenience */ -#define COND_XS(M) ((M)->x_flag&0x100) -#define COND_XC(M) (!COND_XS) +inline uint32_t COND_XS() const { return (m_x_flag&0x100); } +inline uint32_t COND_XC() const { return (!COND_XS()); } /* Get the condition code register */ -#define m68ki_get_ccr(M) ((COND_XS(M) >> 4) | \ - (COND_MI(M) >> 4) | \ - (COND_EQ(M) << 2) | \ - (COND_VS(M) >> 6) | \ - (COND_CS(M) >> 8)) +inline uint32_t m68ki_get_ccr() const { return((COND_XS() >> 4) | + (COND_MI() >> 4) | + (COND_EQ() << 2) | + (COND_VS() >> 6) | + (COND_CS() >> 8)); } /* Get the status register */ -#define m68ki_get_sr(M) ((M)->t1_flag | \ - (M)->t0_flag | \ - ((M)->s_flag << 11) | \ - ((M)->m_flag << 11) | \ - (M)->int_mask | \ - m68ki_get_ccr(M)) +inline uint32_t m68ki_get_sr() const { return (m_t1_flag | + m_t0_flag | + (m_s_flag << 11) | + (m_m_flag << 11) | + m_int_mask | + m68ki_get_ccr()); } /* ----------------------------- Read / Write ----------------------------- */ /* Read from the current address space */ -#define m68ki_read_8(M, A) m68ki_read_8_fc (M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA) -#define m68ki_read_16(M, A) m68ki_read_16_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA) -#define m68ki_read_32(M, A) m68ki_read_32_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA) +inline uint32_t m68ki_read_8(uint32_t address) { return m68ki_read_8_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA); } +inline uint32_t m68ki_read_16(uint32_t address) { return m68ki_read_16_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA); } +inline uint32_t m68ki_read_32(uint32_t address) { return m68ki_read_32_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA); } /* Write to the current data space */ -#define m68ki_write_8(M, A, V) m68ki_write_8_fc (M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA, V) -#define m68ki_write_16(M, A, V) m68ki_write_16_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA, V) -#define m68ki_write_32(M, A, V) m68ki_write_32_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA, V) -#define m68ki_write_32_pd(M, A, V) m68ki_write_32_pd_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA, V) +inline void m68ki_write_8(uint32_t address, uint32_t value) { m68ki_write_8_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA, value); } +inline void m68ki_write_16(uint32_t address, uint32_t value) { m68ki_write_16_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA, value); } +inline void m68ki_write_32(uint32_t address, uint32_t value) { m68ki_write_32_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA, value); } +inline void m68ki_write_32_pd(uint32_t address, uint32_t value) { m68ki_write_32_pd_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA, value); } /* map read immediate 8 to read immediate 16 */ -#define m68ki_read_imm_8(M) MASK_OUT_ABOVE_8(m68ki_read_imm_16(M)) +inline uint32_t m68ki_read_imm_8() { return MASK_OUT_ABOVE_8(m68ki_read_imm_16()); } /* Map PC-relative reads */ -#define m68ki_read_pcrel_8(M, A) m68k_read_pcrelative_8(M, A) -#define m68ki_read_pcrel_16(M, A) m68k_read_pcrelative_16(M, A) -#define m68ki_read_pcrel_32(M, A) m68k_read_pcrelative_32(M, A) +inline uint32_t m68ki_read_pcrel_8(uint32_t address) { return m68k_read_pcrelative_8(address); } +inline uint32_t m68ki_read_pcrel_16(uint32_t address) { return m68k_read_pcrelative_16(address); } +inline uint32_t m68ki_read_pcrel_32(uint32_t address) { return m68k_read_pcrelative_32(address); } /* Read from the program space */ -#define m68ki_read_program_8(M, A) m68ki_read_8_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_PROGRAM) -#define m68ki_read_program_16(M, A) m68ki_read_16_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_PROGRAM) -#define m68ki_read_program_32(M, A) m68ki_read_32_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_PROGRAM) +inline uint32_t m68ki_read_program_8(uint32_t address) { return m68ki_read_8_fc(address, m_s_flag | FUNCTION_CODE_USER_PROGRAM); } +inline uint32_t m68ki_read_program_16(uint32_t address) { return m68ki_read_16_fc(address, m_s_flag | FUNCTION_CODE_USER_PROGRAM); } +inline uint32_t m68ki_read_program_32(uint32_t address) { return m68ki_read_32_fc(address, m_s_flag | FUNCTION_CODE_USER_PROGRAM); } /* Read from the data space */ -#define m68ki_read_data_8(M, A) m68ki_read_8_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA) -#define m68ki_read_data_16(M, A) m68ki_read_16_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA) -#define m68ki_read_data_32(M, A) m68ki_read_32_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA) +inline uint32_t m68ki_read_data_8(uint32_t address) { return m68ki_read_8_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA); } +inline uint32_t m68ki_read_data_16(uint32_t address) { return m68ki_read_16_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA); } +inline uint32_t m68ki_read_data_32(uint32_t address) { return m68ki_read_32_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA); } @@ -473,181 +454,52 @@ class m68000_base_device; /* =============================== PROTOTYPES ============================= */ /* ======================================================================== */ -union fp_reg -{ - uint64_t i; - double f; -}; +void set_irq_line(int irqline, int state); + +void m68k_cause_bus_error(); + -class m68000_base_device_ops -{ -public: - #define OPCODE_PROTOTYPES - #include "m68kops.h" - #undef OPCODE_PROTOTYPES -}; - - - -extern const uint8_t m68ki_shift_8_table[]; -extern const uint16_t m68ki_shift_16_table[]; -extern const uint32_t m68ki_shift_32_table[]; -extern const uint8_t m68ki_exception_cycle_table[][256]; -extern const uint8_t m68ki_ea_idx_cycle_table[]; - -/* Read data immediately after the program counter */ -static inline uint32_t m68ki_read_imm_16(m68000_base_device *m68k); -static inline uint32_t m68ki_read_imm_32(m68000_base_device *m68k); - -/* Read data with specific function code */ -static inline uint32_t m68ki_read_8_fc (m68000_base_device *m68k, uint32_t address, uint32_t fc); -static inline uint32_t m68ki_read_16_fc (m68000_base_device *m68k, uint32_t address, uint32_t fc); -static inline uint32_t m68ki_read_32_fc (m68000_base_device *m68k, uint32_t address, uint32_t fc); - -/* Write data with specific function code */ -static inline void m68ki_write_8_fc (m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value); -static inline void m68ki_write_16_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value); -static inline void m68ki_write_32_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value); -static inline void m68ki_write_32_pd_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value); - -/* Indexed and PC-relative ea fetching */ -static inline uint32_t m68ki_get_ea_pcdi(m68000_base_device *m68k); -static inline uint32_t m68ki_get_ea_pcix(m68000_base_device *m68k); -static inline uint32_t m68ki_get_ea_ix(m68000_base_device *m68k, uint32_t An); - -/* Operand fetching */ -static inline uint32_t OPER_AY_AI_8(m68000_base_device *m68k); -static inline uint32_t OPER_AY_AI_16(m68000_base_device *m68k); -static inline uint32_t OPER_AY_AI_32(m68000_base_device *m68k); -static inline uint32_t OPER_AY_PI_8(m68000_base_device *m68k); -static inline uint32_t OPER_AY_PI_16(m68000_base_device *m68k); -static inline uint32_t OPER_AY_PI_32(m68000_base_device *m68k); -static inline uint32_t OPER_AY_PD_8(m68000_base_device *m68k); -static inline uint32_t OPER_AY_PD_16(m68000_base_device *m68k); -static inline uint32_t OPER_AY_PD_32(m68000_base_device *m68k); -static inline uint32_t OPER_AY_DI_8(m68000_base_device *m68k); -static inline uint32_t OPER_AY_DI_16(m68000_base_device *m68k); -static inline uint32_t OPER_AY_DI_32(m68000_base_device *m68k); -static inline uint32_t OPER_AY_IX_8(m68000_base_device *m68k); -static inline uint32_t OPER_AY_IX_16(m68000_base_device *m68k); -static inline uint32_t OPER_AY_IX_32(m68000_base_device *m68k); - -static inline uint32_t OPER_AX_AI_8(m68000_base_device *m68k); -static inline uint32_t OPER_AX_AI_16(m68000_base_device *m68k); -static inline uint32_t OPER_AX_AI_32(m68000_base_device *m68k); -static inline uint32_t OPER_AX_PI_8(m68000_base_device *m68k); -static inline uint32_t OPER_AX_PI_16(m68000_base_device *m68k); -static inline uint32_t OPER_AX_PI_32(m68000_base_device *m68k); -static inline uint32_t OPER_AX_PD_8(m68000_base_device *m68k); -static inline uint32_t OPER_AX_PD_16(m68000_base_device *m68k); -static inline uint32_t OPER_AX_PD_32(m68000_base_device *m68k); -static inline uint32_t OPER_AX_DI_8(m68000_base_device *m68k); -static inline uint32_t OPER_AX_DI_16(m68000_base_device *m68k); -static inline uint32_t OPER_AX_DI_32(m68000_base_device *m68k); -static inline uint32_t OPER_AX_IX_8(m68000_base_device *m68k); -static inline uint32_t OPER_AX_IX_16(m68000_base_device *m68k); -static inline uint32_t OPER_AX_IX_32(m68000_base_device *m68k); - -static inline uint32_t OPER_A7_PI_8(m68000_base_device *m68k); -static inline uint32_t OPER_A7_PD_8(m68000_base_device *m68k); - -static inline uint32_t OPER_AW_8(m68000_base_device *m68k); -static inline uint32_t OPER_AW_16(m68000_base_device *m68k); -static inline uint32_t OPER_AW_32(m68000_base_device *m68k); -static inline uint32_t OPER_AL_8(m68000_base_device *m68k); -static inline uint32_t OPER_AL_16(m68000_base_device *m68k); -static inline uint32_t OPER_AL_32(m68000_base_device *m68k); -static inline uint32_t OPER_PCDI_8(m68000_base_device *m68k); -static inline uint32_t OPER_PCDI_16(m68000_base_device *m68k); -static inline uint32_t OPER_PCDI_32(m68000_base_device *m68k); -static inline uint32_t OPER_PCIX_8(m68000_base_device *m68k); -static inline uint32_t OPER_PCIX_16(m68000_base_device *m68k); -static inline uint32_t OPER_PCIX_32(m68000_base_device *m68k); - -/* Stack operations */ -static inline void m68ki_push_16(m68000_base_device *m68k, uint32_t value); -static inline void m68ki_push_32(m68000_base_device *m68k, uint32_t value); -static inline uint32_t m68ki_pull_16(m68000_base_device *m68k); -static inline uint32_t m68ki_pull_32(m68000_base_device *m68k); - -/* Program flow operations */ -static inline void m68ki_jump(m68000_base_device *m68k, uint32_t new_pc); -static inline void m68ki_jump_vector(m68000_base_device *m68k, uint32_t vector); -static inline void m68ki_branch_8(m68000_base_device *m68k, uint32_t offset); -static inline void m68ki_branch_16(m68000_base_device *m68k, uint32_t offset); -static inline void m68ki_branch_32(m68000_base_device *m68k, uint32_t offset); - -/* Status register operations. */ -static inline void m68ki_set_s_flag(m68000_base_device *m68k, uint32_t value); /* Only bit 2 of value should be set (i.e. 4 or 0) */ -static inline void m68ki_set_sm_flag(m68000_base_device *m68k, uint32_t value); /* only bits 1 and 2 of value should be set */ -static inline void m68ki_set_ccr(m68000_base_device *m68k, uint32_t value); /* set the condition code register */ -static inline void m68ki_set_sr(m68000_base_device *m68k, uint32_t value); /* set the status register */ -static inline void m68ki_set_sr_noint(m68000_base_device *m68k, uint32_t value); /* set the status register */ - -/* Exception processing */ -static inline uint32_t m68ki_init_exception(m68000_base_device *m68k); /* Initial exception processing */ - -static inline void m68ki_stack_frame_3word(m68000_base_device *m68k, uint32_t pc, uint32_t sr); /* Stack various frame types */ -static inline void m68ki_stack_frame_buserr(m68000_base_device *m68k, uint32_t sr); - -static inline void m68ki_stack_frame_0000(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector); -static inline void m68ki_stack_frame_0001(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector); -static inline void m68ki_stack_frame_0010(m68000_base_device *m68k, uint32_t sr, uint32_t vector); -static inline void m68ki_stack_frame_1000(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector); -static inline void m68ki_stack_frame_1010(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address); -static inline void m68ki_stack_frame_1011(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address); -static inline void m68ki_stack_frame_0111(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address, bool in_mmu); - -static inline void m68ki_exception_trap(m68000_base_device *m68k, uint32_t vector); -static inline void m68ki_exception_trapN(m68000_base_device *m68k, uint32_t vector); -static inline void m68ki_exception_trace(m68000_base_device *m68k); -static inline void m68ki_exception_privilege_violation(m68000_base_device *m68k); -static inline void m68ki_exception_1010(m68000_base_device *m68k); -static inline void m68ki_exception_1111(m68000_base_device *m68k); -static inline void m68ki_exception_illegal(m68000_base_device *m68k); -static inline void m68ki_exception_format_error(m68000_base_device *m68k); -static inline void m68ki_exception_address_error(m68000_base_device *m68k); - -static inline void m68ki_check_interrupts(m68000_base_device *m68k); /* ASG: check for interrupts */ - -/* quick disassembly (used for logging) */ -char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type); +static const uint8_t m68ki_shift_8_table[65]; +static const uint16_t m68ki_shift_16_table[65]; +static const uint32_t m68ki_shift_32_table[65]; +static const uint8_t m68ki_exception_cycle_table[7][256]; +static const uint8_t m68ki_ea_idx_cycle_table[64]; /* ======================================================================== */ /* =========================== UTILITY FUNCTIONS ========================== */ /* ======================================================================== */ -static inline unsigned int m68k_read_pcrelative_8(m68000_base_device *m68k, unsigned int address) +inline unsigned int m68k_read_pcrelative_8(unsigned int address) { - return ((m68k->readimm16(address&~1)>>(8*(1-(address & 1))))&0xff); + return ((m_readimm16(address&~1)>>(8*(1-(address & 1))))&0xff); } -static inline unsigned int m68k_read_pcrelative_16(m68000_base_device *m68k, unsigned int address) +inline unsigned int m68k_read_pcrelative_16(unsigned int address) { if (!WORD_ALIGNED(address)) return - (m68k->readimm16(address-1) << 8) | - (m68k->readimm16(address+1) >> 8); + (m_readimm16(address-1) << 8) | + (m_readimm16(address+1) >> 8); else return - (m68k->readimm16(address ) ); + (m_readimm16(address ) ); } -static inline unsigned int m68k_read_pcrelative_32(m68000_base_device *m68k, unsigned int address) +inline unsigned int m68k_read_pcrelative_32(unsigned int address) { if (!WORD_ALIGNED(address)) return - (m68k->readimm16(address-1) << 24) | - (m68k->readimm16(address+1) << 8) | - (m68k->readimm16(address+3) >> 8); + (m_readimm16(address-1) << 24) | + (m_readimm16(address+1) << 8) | + (m_readimm16(address+3) >> 8); else return - (m68k->readimm16(address ) << 16) | - (m68k->readimm16(address+2) ); + (m_readimm16(address ) << 16) | + (m_readimm16(address+2) ); } @@ -656,59 +508,59 @@ static inline unsigned int m68k_read_pcrelative_32(m68000_base_device *m68k, uns * A real 68k first writes the high word to [address+2], and then writes the * low word to [address]. */ -static inline void m68kx_write_memory_32_pd(m68000_base_device *m68k, unsigned int address, unsigned int value) +inline void m68kx_write_memory_32_pd(unsigned int address, unsigned int value) { - m68k->/*memory.*/write16(address+2, value>>16); - m68k->/*memory.*/write16(address, value&0xffff); + m_write16(address+2, value>>16); + m_write16(address, value&0xffff); } /* ---------------------------- Read Immediate ---------------------------- */ // clear the instruction cache -static inline void m68ki_ic_clear(m68000_base_device *m68k) +inline void m68ki_ic_clear() { int i; for (i=0; i< M68K_IC_SIZE; i++) { - m68k->ic_address[i] = ~0; + m_ic_address[i] = ~0; } } // read immediate word using the instruction cache -static inline uint32_t m68ki_ic_readimm16(m68000_base_device *m68k, uint32_t address) +inline uint32_t m68ki_ic_readimm16(uint32_t address) { - if (m68k->cacr & M68K_CACR_EI) + if (m_cacr & M68K_CACR_EI) { // 68020 series I-cache (MC68020 User's Manual, Section 4 - On-Chip Cache Memory) - if (m68k->cpu_type & (CPU_TYPE_EC020 | CPU_TYPE_020)) + if (m_cpu_type & (CPU_TYPE_EC020 | CPU_TYPE_020)) { - uint32_t tag = (address >> 8) | (m68k->s_flag ? 0x1000000 : 0); + uint32_t tag = (address >> 8) | (m_s_flag ? 0x1000000 : 0); int idx = (address >> 2) & 0x3f; // 1-of-64 select // do a cache fill if the line is invalid or the tags don't match - if ((!m68k->ic_valid[idx]) || (m68k->ic_address[idx] != tag)) + if ((!m_ic_valid[idx]) || (m_ic_address[idx] != tag)) { // if the cache is frozen, don't update it - if (m68k->cacr & M68K_CACR_FI) + if (m_cacr & M68K_CACR_FI) { - return m68k->readimm16(address); + return m_readimm16(address); } - uint32_t data = m68k->read32(address & ~3); + uint32_t data = m_read32(address & ~3); //printf("m68k: doing cache fill at %08x (tag %08x idx %d)\n", address, tag, idx); // if no buserror occurred, validate the tag - if (!m68k->mmu_tmp_buserror_occurred) + if (!m_mmu_tmp_buserror_occurred) { - m68k->ic_address[idx] = tag; - m68k->ic_data[idx] = data; - m68k->ic_valid[idx] = true; + m_ic_address[idx] = tag; + m_ic_data[idx] = data; + m_ic_valid[idx] = true; } else { - return m68k->readimm16(address); + return m_readimm16(address); } } @@ -716,71 +568,71 @@ static inline uint32_t m68ki_ic_readimm16(m68000_base_device *m68k, uint32_t add // a hit or because we just filled it. if (address & 2) { - return m68k->ic_data[idx] & 0xffff; + return m_ic_data[idx] & 0xffff; } else { - return m68k->ic_data[idx] >> 16; + return m_ic_data[idx] >> 16; } } } - return m68k->readimm16(address); + return m_readimm16(address); } /* Handles all immediate reads, does address error check, function code setting, * and prefetching if they are enabled in m68kconf.h */ -static inline uint32_t m68ki_read_imm_16(m68000_base_device *m68k) +inline uint32_t m68ki_read_imm_16() { uint32_t result; - m68k->mmu_tmp_fc = m68k->s_flag | FUNCTION_CODE_USER_PROGRAM; - m68k->mmu_tmp_rw = 1; + m_mmu_tmp_fc = m_s_flag | FUNCTION_CODE_USER_PROGRAM; + m_mmu_tmp_rw = 1; - m68ki_check_address_error(m68k, REG_PC(m68k), MODE_READ, m68k->s_flag | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */ + m68ki_check_address_error(m_pc, MODE_READ, m_s_flag | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */ - if(REG_PC(m68k) != m68k->pref_addr) + if (m_pc != m_pref_addr) { - m68k->pref_data = m68ki_ic_readimm16(m68k, REG_PC(m68k)); - m68k->pref_addr = m68k->mmu_tmp_buserror_occurred ? ~0 : REG_PC(m68k); + m_pref_data = m68ki_ic_readimm16(m_pc); + m_pref_addr = m_mmu_tmp_buserror_occurred ? ~0 : m_pc; } - result = MASK_OUT_ABOVE_16(m68k->pref_data); - REG_PC(m68k) += 2; - if (!m68k->mmu_tmp_buserror_occurred) { + result = MASK_OUT_ABOVE_16(m_pref_data); + m_pc += 2; + if (!m_mmu_tmp_buserror_occurred) { // prefetch only if no bus error occurred in opcode fetch - m68k->pref_data = m68ki_ic_readimm16(m68k, REG_PC(m68k)); - m68k->pref_addr = m68k->mmu_tmp_buserror_occurred ? ~0 : REG_PC(m68k); + m_pref_data = m68ki_ic_readimm16(m_pc); + m_pref_addr = m_mmu_tmp_buserror_occurred ? ~0 : m_pc; // ignore bus error on prefetch - m68k->mmu_tmp_buserror_occurred = 0; + m_mmu_tmp_buserror_occurred = 0; } return result; } -static inline uint32_t m68ki_read_imm_32(m68000_base_device *m68k) +inline uint32_t m68ki_read_imm_32() { uint32_t temp_val; - m68k->mmu_tmp_fc = m68k->s_flag | FUNCTION_CODE_USER_PROGRAM; - m68k->mmu_tmp_rw = 1; + m_mmu_tmp_fc = m_s_flag | FUNCTION_CODE_USER_PROGRAM; + m_mmu_tmp_rw = 1; - m68ki_check_address_error(m68k, REG_PC(m68k), MODE_READ, m68k->s_flag | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */ + m68ki_check_address_error(m_pc, MODE_READ, m_s_flag | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */ - if(REG_PC(m68k) != m68k->pref_addr) + if(m_pc != m_pref_addr) { - m68k->pref_addr = REG_PC(m68k); - m68k->pref_data = m68ki_ic_readimm16(m68k, m68k->pref_addr); + m_pref_addr = m_pc; + m_pref_data = m68ki_ic_readimm16(m_pref_addr); } - temp_val = MASK_OUT_ABOVE_16(m68k->pref_data); - REG_PC(m68k) += 2; - m68k->pref_addr = REG_PC(m68k); - m68k->pref_data = m68ki_ic_readimm16(m68k, m68k->pref_addr); + temp_val = MASK_OUT_ABOVE_16(m_pref_data); + m_pc += 2; + m_pref_addr = m_pc; + m_pref_data = m68ki_ic_readimm16(m_pref_addr); - temp_val = MASK_OUT_ABOVE_32((temp_val << 16) | MASK_OUT_ABOVE_16(m68k->pref_data)); - REG_PC(m68k) += 2; - m68k->pref_data = m68ki_ic_readimm16(m68k, REG_PC(m68k)); - m68k->pref_addr = m68k->mmu_tmp_buserror_occurred ? ~0 : REG_PC(m68k); + temp_val = MASK_OUT_ABOVE_32((temp_val << 16) | MASK_OUT_ABOVE_16(m_pref_data)); + m_pc += 2; + m_pref_data = m68ki_ic_readimm16(m_pc); + m_pref_addr = m_mmu_tmp_buserror_occurred ? ~0 : m_pc; return temp_val; } @@ -795,58 +647,58 @@ static inline uint32_t m68ki_read_imm_32(m68000_base_device *m68k) * These functions will also check for address error and set the function * code if they are enabled in m68kconf.h. */ -static inline uint32_t m68ki_read_8_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc) +inline uint32_t m68ki_read_8_fc(uint32_t address, uint32_t fc) { - m68k->mmu_tmp_fc = fc; - m68k->mmu_tmp_rw = 1; - return m68k->/*memory.*/read8(address); + m_mmu_tmp_fc = fc; + m_mmu_tmp_rw = 1; + return m_read8(address); } -static inline uint32_t m68ki_read_16_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc) +inline uint32_t m68ki_read_16_fc(uint32_t address, uint32_t fc) { - if (CPU_TYPE_IS_010_LESS(m68k->cpu_type)) + if (CPU_TYPE_IS_010_LESS()) { - m68ki_check_address_error(m68k, address, MODE_READ, fc); + m68ki_check_address_error(address, MODE_READ, fc); } - m68k->mmu_tmp_fc = fc; - m68k->mmu_tmp_rw = 1; - return m68k->/*memory.*/read16(address); + m_mmu_tmp_fc = fc; + m_mmu_tmp_rw = 1; + return m_read16(address); } -static inline uint32_t m68ki_read_32_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc) +inline uint32_t m68ki_read_32_fc(uint32_t address, uint32_t fc) { - if (CPU_TYPE_IS_010_LESS(m68k->cpu_type)) + if (CPU_TYPE_IS_010_LESS()) { - m68ki_check_address_error(m68k, address, MODE_READ, fc); + m68ki_check_address_error(address, MODE_READ, fc); } - m68k->mmu_tmp_fc = fc; - m68k->mmu_tmp_rw = 1; - return m68k->/*memory.*/read32(address); + m_mmu_tmp_fc = fc; + m_mmu_tmp_rw = 1; + return m_read32(address); } -static inline void m68ki_write_8_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value) +inline void m68ki_write_8_fc(uint32_t address, uint32_t fc, uint32_t value) { - m68k->mmu_tmp_fc = fc; - m68k->mmu_tmp_rw = 0; - m68k->/*memory.*/write8(address, value); + m_mmu_tmp_fc = fc; + m_mmu_tmp_rw = 0; + m_write8(address, value); } -static inline void m68ki_write_16_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value) +inline void m68ki_write_16_fc(uint32_t address, uint32_t fc, uint32_t value) { - if (CPU_TYPE_IS_010_LESS(m68k->cpu_type)) + if (CPU_TYPE_IS_010_LESS()) { - m68ki_check_address_error(m68k, address, MODE_WRITE, fc); + m68ki_check_address_error(address, MODE_WRITE, fc); } - m68k->mmu_tmp_fc = fc; - m68k->mmu_tmp_rw = 0; - m68k->/*memory.*/write16(address, value); + m_mmu_tmp_fc = fc; + m_mmu_tmp_rw = 0; + m_write16(address, value); } -static inline void m68ki_write_32_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value) +inline void m68ki_write_32_fc(uint32_t address, uint32_t fc, uint32_t value) { - if (CPU_TYPE_IS_010_LESS(m68k->cpu_type)) + if (CPU_TYPE_IS_010_LESS()) { - m68ki_check_address_error(m68k, address, MODE_WRITE, fc); + m68ki_check_address_error(address, MODE_WRITE, fc); } - m68k->mmu_tmp_fc = fc; - m68k->mmu_tmp_rw = 0; - m68k->/*memory.*/write32(address, value); + m_mmu_tmp_fc = fc; + m_mmu_tmp_rw = 0; + m_write32(address, value); } /* Special call to simulate undocumented 68k behavior when move.l with a @@ -854,16 +706,16 @@ static inline void m68ki_write_32_fc(m68000_base_device *m68k, uint32_t address, * A real 68k first writes the high word to [address+2], and then writes the * low word to [address]. */ -static inline void m68ki_write_32_pd_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value) +inline void m68ki_write_32_pd_fc(uint32_t address, uint32_t fc, uint32_t value) { - if (CPU_TYPE_IS_010_LESS(m68k->cpu_type)) + if (CPU_TYPE_IS_010_LESS()) { - m68ki_check_address_error(m68k, address, MODE_WRITE, fc); + m68ki_check_address_error(address, MODE_WRITE, fc); } - m68k->mmu_tmp_fc = fc; - m68k->mmu_tmp_rw = 0; - m68k->/*memory.*/write16(address+2, value>>16); - m68k->/*memory.*/write16(address, value&0xffff); + m_mmu_tmp_fc = fc; + m_mmu_tmp_rw = 0; + m_write16(address+2, value>>16); + m_write16(address, value&0xffff); } @@ -872,16 +724,16 @@ static inline void m68ki_write_32_pd_fc(m68000_base_device *m68k, uint32_t addre /* The program counter relative addressing modes cause operands to be * retrieved from program space, not data space. */ -static inline uint32_t m68ki_get_ea_pcdi(m68000_base_device *m68k) +inline uint32_t m68ki_get_ea_pcdi() { - uint32_t old_pc = REG_PC(m68k); - return old_pc + MAKE_INT_16(m68ki_read_imm_16(m68k)); + uint32_t old_pc = m_pc; + return old_pc + MAKE_INT_16(m68ki_read_imm_16()); } -static inline uint32_t m68ki_get_ea_pcix(m68000_base_device *m68k) +inline uint32_t m68ki_get_ea_pcix() { - return m68ki_get_ea_ix(m68k, REG_PC(m68k)); + return m68ki_get_ea_ix(m_pc); } /* Indexed addressing modes are encoded as follows: @@ -926,18 +778,18 @@ static inline uint32_t m68ki_get_ea_pcix(m68000_base_device *m68k) * 1 011 mem indir with long outer * 1 100-111 reserved */ -static inline uint32_t m68ki_get_ea_ix(m68000_base_device *m68k, uint32_t An) +inline uint32_t m68ki_get_ea_ix(uint32_t An) { /* An = base register */ - uint32_t extension = m68ki_read_imm_16(m68k); + uint32_t extension = m68ki_read_imm_16(); uint32_t Xn = 0; /* Index register */ uint32_t bd = 0; /* Base Displacement */ uint32_t od = 0; /* Outer Displacement */ - if(CPU_TYPE_IS_010_LESS(m68k->cpu_type)) + if(CPU_TYPE_IS_010_LESS()) { /* Calculate index */ - Xn = REG_DA(m68k)[extension>>12]; /* Xn */ + Xn = REG_DA()[extension>>12]; /* Xn */ if(!BIT_B(extension)) /* W/L */ Xn = MAKE_INT_16(Xn); @@ -949,11 +801,11 @@ static inline uint32_t m68ki_get_ea_ix(m68000_base_device *m68k, uint32_t An) if(!BIT_8(extension)) { /* Calculate index */ - Xn = REG_DA(m68k)[extension>>12]; /* Xn */ + Xn = REG_DA()[extension>>12]; /* Xn */ if(!BIT_B(extension)) /* W/L */ Xn = MAKE_INT_16(Xn); /* Add scale if proper CPU type */ - if(CPU_TYPE_IS_EC020_PLUS(m68k->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) Xn <<= (extension>>9) & 3; /* SCALE */ /* Add base register and displacement and return */ @@ -962,7 +814,7 @@ static inline uint32_t m68ki_get_ea_ix(m68000_base_device *m68k, uint32_t An) /* Full extension format */ - m68k->remaining_cycles -= m68ki_ea_idx_cycle_table[extension&0x3f]; + m_remaining_cycles -= m68ki_ea_idx_cycle_table[extension&0x3f]; /* Check if base register is present */ if(BIT_7(extension)) /* BS */ @@ -971,7 +823,7 @@ static inline uint32_t m68ki_get_ea_ix(m68000_base_device *m68k, uint32_t An) /* Check if index is present */ if(!BIT_6(extension)) /* IS */ { - Xn = REG_DA(m68k)[extension>>12]; /* Xn */ + Xn = REG_DA()[extension>>12]; /* Xn */ if(!BIT_B(extension)) /* W/L */ Xn = MAKE_INT_16(Xn); Xn <<= (extension>>9) & 3; /* SCALE */ @@ -979,7 +831,7 @@ static inline uint32_t m68ki_get_ea_ix(m68000_base_device *m68k, uint32_t An) /* Check if base displacement is present */ if(BIT_5(extension)) /* BD SIZE */ - bd = BIT_4(extension) ? m68ki_read_imm_32(m68k) : MAKE_INT_16(m68ki_read_imm_16(m68k)); + bd = BIT_4(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16()); /* If no indirect action, we are done */ if(!(extension&7)) /* No Memory Indirect */ @@ -987,117 +839,117 @@ static inline uint32_t m68ki_get_ea_ix(m68000_base_device *m68k, uint32_t An) /* Check if outer displacement is present */ if(BIT_1(extension)) /* I/IS: od */ - od = BIT_0(extension) ? m68ki_read_imm_32(m68k) : MAKE_INT_16(m68ki_read_imm_16(m68k)); + od = BIT_0(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16()); /* Postindex */ if(BIT_2(extension)) /* I/IS: 0 = preindex, 1 = postindex */ - return m68ki_read_32(m68k, An + bd) + Xn + od; + return m68ki_read_32(An + bd) + Xn + od; /* Preindex */ - return m68ki_read_32(m68k, An + bd + Xn) + od; + return m68ki_read_32(An + bd + Xn) + od; } /* Fetch operands */ -static inline uint32_t OPER_AY_AI_8(m68000_base_device *m68k) {uint32_t ea = EA_AY_AI_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AY_AI_16(m68000_base_device *m68k) {uint32_t ea = EA_AY_AI_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AY_AI_32(m68000_base_device *m68k) {uint32_t ea = EA_AY_AI_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AY_PI_8(m68000_base_device *m68k) {uint32_t ea = EA_AY_PI_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AY_PI_16(m68000_base_device *m68k) {uint32_t ea = EA_AY_PI_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AY_PI_32(m68000_base_device *m68k) {uint32_t ea = EA_AY_PI_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AY_PD_8(m68000_base_device *m68k) {uint32_t ea = EA_AY_PD_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AY_PD_16(m68000_base_device *m68k) {uint32_t ea = EA_AY_PD_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AY_PD_32(m68000_base_device *m68k) {uint32_t ea = EA_AY_PD_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AY_DI_8(m68000_base_device *m68k) {uint32_t ea = EA_AY_DI_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AY_DI_16(m68000_base_device *m68k) {uint32_t ea = EA_AY_DI_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AY_DI_32(m68000_base_device *m68k) {uint32_t ea = EA_AY_DI_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AY_IX_8(m68000_base_device *m68k) {uint32_t ea = EA_AY_IX_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AY_IX_16(m68000_base_device *m68k) {uint32_t ea = EA_AY_IX_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AY_IX_32(m68000_base_device *m68k) {uint32_t ea = EA_AY_IX_32(m68k); return m68ki_read_32(m68k, ea);} - -static inline uint32_t OPER_AX_AI_8(m68000_base_device *m68k) {uint32_t ea = EA_AX_AI_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AX_AI_16(m68000_base_device *m68k) {uint32_t ea = EA_AX_AI_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AX_AI_32(m68000_base_device *m68k) {uint32_t ea = EA_AX_AI_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AX_PI_8(m68000_base_device *m68k) {uint32_t ea = EA_AX_PI_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AX_PI_16(m68000_base_device *m68k) {uint32_t ea = EA_AX_PI_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AX_PI_32(m68000_base_device *m68k) {uint32_t ea = EA_AX_PI_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AX_PD_8(m68000_base_device *m68k) {uint32_t ea = EA_AX_PD_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AX_PD_16(m68000_base_device *m68k) {uint32_t ea = EA_AX_PD_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AX_PD_32(m68000_base_device *m68k) {uint32_t ea = EA_AX_PD_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AX_DI_8(m68000_base_device *m68k) {uint32_t ea = EA_AX_DI_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AX_DI_16(m68000_base_device *m68k) {uint32_t ea = EA_AX_DI_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AX_DI_32(m68000_base_device *m68k) {uint32_t ea = EA_AX_DI_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AX_IX_8(m68000_base_device *m68k) {uint32_t ea = EA_AX_IX_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AX_IX_16(m68000_base_device *m68k) {uint32_t ea = EA_AX_IX_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AX_IX_32(m68000_base_device *m68k) {uint32_t ea = EA_AX_IX_32(m68k); return m68ki_read_32(m68k, ea);} - -static inline uint32_t OPER_A7_PI_8(m68000_base_device *m68k) {uint32_t ea = EA_A7_PI_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_A7_PD_8(m68000_base_device *m68k) {uint32_t ea = EA_A7_PD_8(m68k); return m68ki_read_8(m68k, ea); } - -static inline uint32_t OPER_AW_8(m68000_base_device *m68k) {uint32_t ea = EA_AW_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AW_16(m68000_base_device *m68k) {uint32_t ea = EA_AW_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AW_32(m68000_base_device *m68k) {uint32_t ea = EA_AW_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AL_8(m68000_base_device *m68k) {uint32_t ea = EA_AL_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AL_16(m68000_base_device *m68k) {uint32_t ea = EA_AL_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AL_32(m68000_base_device *m68k) {uint32_t ea = EA_AL_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_PCDI_8(m68000_base_device *m68k) {uint32_t ea = EA_PCDI_8(m68k); return m68ki_read_pcrel_8(m68k, ea); } -static inline uint32_t OPER_PCDI_16(m68000_base_device *m68k) {uint32_t ea = EA_PCDI_16(m68k); return m68ki_read_pcrel_16(m68k, ea);} -static inline uint32_t OPER_PCDI_32(m68000_base_device *m68k) {uint32_t ea = EA_PCDI_32(m68k); return m68ki_read_pcrel_32(m68k, ea);} -static inline uint32_t OPER_PCIX_8(m68000_base_device *m68k) {uint32_t ea = EA_PCIX_8(m68k); return m68ki_read_pcrel_8(m68k, ea); } -static inline uint32_t OPER_PCIX_16(m68000_base_device *m68k) {uint32_t ea = EA_PCIX_16(m68k); return m68ki_read_pcrel_16(m68k, ea);} -static inline uint32_t OPER_PCIX_32(m68000_base_device *m68k) {uint32_t ea = EA_PCIX_32(m68k); return m68ki_read_pcrel_32(m68k, ea);} +inline uint32_t OPER_AY_AI_8() {uint32_t ea = EA_AY_AI_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AY_AI_16() {uint32_t ea = EA_AY_AI_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AY_AI_32() {uint32_t ea = EA_AY_AI_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AY_PI_8() {uint32_t ea = EA_AY_PI_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AY_PI_16() {uint32_t ea = EA_AY_PI_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AY_PI_32() {uint32_t ea = EA_AY_PI_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AY_PD_8() {uint32_t ea = EA_AY_PD_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AY_PD_16() {uint32_t ea = EA_AY_PD_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AY_PD_32() {uint32_t ea = EA_AY_PD_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AY_DI_8() {uint32_t ea = EA_AY_DI_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AY_DI_16() {uint32_t ea = EA_AY_DI_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AY_DI_32() {uint32_t ea = EA_AY_DI_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AY_IX_8() {uint32_t ea = EA_AY_IX_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AY_IX_16() {uint32_t ea = EA_AY_IX_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AY_IX_32() {uint32_t ea = EA_AY_IX_32(); return m68ki_read_32(ea);} + +inline uint32_t OPER_AX_AI_8() {uint32_t ea = EA_AX_AI_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AX_AI_16() {uint32_t ea = EA_AX_AI_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AX_AI_32() {uint32_t ea = EA_AX_AI_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AX_PI_8() {uint32_t ea = EA_AX_PI_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AX_PI_16() {uint32_t ea = EA_AX_PI_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AX_PI_32() {uint32_t ea = EA_AX_PI_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AX_PD_8() {uint32_t ea = EA_AX_PD_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AX_PD_16() {uint32_t ea = EA_AX_PD_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AX_PD_32() {uint32_t ea = EA_AX_PD_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AX_DI_8() {uint32_t ea = EA_AX_DI_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AX_DI_16() {uint32_t ea = EA_AX_DI_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AX_DI_32() {uint32_t ea = EA_AX_DI_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AX_IX_8() {uint32_t ea = EA_AX_IX_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AX_IX_16() {uint32_t ea = EA_AX_IX_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AX_IX_32() {uint32_t ea = EA_AX_IX_32(); return m68ki_read_32(ea);} + +inline uint32_t OPER_A7_PI_8() {uint32_t ea = EA_A7_PI_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_A7_PD_8() {uint32_t ea = EA_A7_PD_8(); return m68ki_read_8(ea); } + +inline uint32_t OPER_AW_8() {uint32_t ea = EA_AW_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AW_16() {uint32_t ea = EA_AW_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AW_32() {uint32_t ea = EA_AW_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AL_8() {uint32_t ea = EA_AL_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AL_16() {uint32_t ea = EA_AL_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AL_32() {uint32_t ea = EA_AL_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_PCDI_8() {uint32_t ea = EA_PCDI_8(); return m68ki_read_pcrel_8(ea); } +inline uint32_t OPER_PCDI_16() {uint32_t ea = EA_PCDI_16(); return m68ki_read_pcrel_16(ea);} +inline uint32_t OPER_PCDI_32() {uint32_t ea = EA_PCDI_32(); return m68ki_read_pcrel_32(ea);} +inline uint32_t OPER_PCIX_8() {uint32_t ea = EA_PCIX_8(); return m68ki_read_pcrel_8(ea); } +inline uint32_t OPER_PCIX_16() {uint32_t ea = EA_PCIX_16(); return m68ki_read_pcrel_16(ea);} +inline uint32_t OPER_PCIX_32() {uint32_t ea = EA_PCIX_32(); return m68ki_read_pcrel_32(ea);} /* ---------------------------- Stack Functions --------------------------- */ /* Push/pull data from the stack */ -static inline void m68ki_push_16(m68000_base_device *m68k, uint32_t value) +inline void m68ki_push_16(uint32_t value) { - REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) - 2); - m68ki_write_16(m68k, REG_SP(m68k), value); + REG_SP() = MASK_OUT_ABOVE_32(REG_SP() - 2); + m68ki_write_16(REG_SP(), value); } -static inline void m68ki_push_32(m68000_base_device *m68k, uint32_t value) +inline void m68ki_push_32(uint32_t value) { - REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) - 4); - m68ki_write_32(m68k, REG_SP(m68k), value); + REG_SP() = MASK_OUT_ABOVE_32(REG_SP() - 4); + m68ki_write_32(REG_SP(), value); } -static inline uint32_t m68ki_pull_16(m68000_base_device *m68k) +inline uint32_t m68ki_pull_16() { - REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) + 2); - return m68ki_read_16(m68k, REG_SP(m68k)-2); + REG_SP() = MASK_OUT_ABOVE_32(REG_SP() + 2); + return m68ki_read_16(REG_SP()-2); } -static inline uint32_t m68ki_pull_32(m68000_base_device *m68k) +inline uint32_t m68ki_pull_32() { - REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) + 4); - return m68ki_read_32(m68k, REG_SP(m68k)-4); + REG_SP() = MASK_OUT_ABOVE_32(REG_SP() + 4); + return m68ki_read_32(REG_SP()-4); } /* Increment/decrement the stack as if doing a push/pull but * don't do any memory access. */ -static inline void m68ki_fake_push_16(m68000_base_device *m68k) +inline void m68ki_fake_push_16() { - REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) - 2); + REG_SP() = MASK_OUT_ABOVE_32(REG_SP() - 2); } -static inline void m68ki_fake_push_32(m68000_base_device *m68k) +inline void m68ki_fake_push_32() { - REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) - 4); + REG_SP() = MASK_OUT_ABOVE_32(REG_SP() - 4); } -static inline void m68ki_fake_pull_16(m68000_base_device *m68k) +inline void m68ki_fake_pull_16() { - REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) + 2); + REG_SP() = MASK_OUT_ABOVE_32(REG_SP() + 2); } -static inline void m68ki_fake_pull_32(m68000_base_device *m68k) +inline void m68ki_fake_pull_32() { - REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) + 4); + REG_SP() = MASK_OUT_ABOVE_32(REG_SP() + 4); } @@ -1107,15 +959,15 @@ static inline void m68ki_fake_pull_32(m68000_base_device *m68k) * These functions will also call the pc_changed callback if it was enabled * in m68kconf.h. */ -static inline void m68ki_jump(m68000_base_device *m68k, uint32_t new_pc) +inline void m68ki_jump(uint32_t new_pc) { - REG_PC(m68k) = new_pc; + m_pc = new_pc; } -static inline void m68ki_jump_vector(m68000_base_device *m68k, uint32_t vector) +inline void m68ki_jump_vector(uint32_t vector) { - REG_PC(m68k) = (vector<<2) + m68k->vbr; - REG_PC(m68k) = m68ki_read_data_32(m68k, REG_PC(m68k)); + m_pc = (vector<<2) + m_vbr; + m_pc = m68ki_read_data_32(m_pc); } @@ -1124,19 +976,19 @@ static inline void m68ki_jump_vector(m68000_base_device *m68k, uint32_t vector) * So far I've found no problems with not calling pc_changed for 8 or 16 * bit branches. */ -static inline void m68ki_branch_8(m68000_base_device *m68k, uint32_t offset) +inline void m68ki_branch_8(uint32_t offset) { - REG_PC(m68k) += MAKE_INT_8(offset); + m_pc += MAKE_INT_8(offset); } -static inline void m68ki_branch_16(m68000_base_device *m68k, uint32_t offset) +inline void m68ki_branch_16(uint32_t offset) { - REG_PC(m68k) += MAKE_INT_16(offset); + m_pc += MAKE_INT_16(offset); } -static inline void m68ki_branch_32(m68000_base_device *m68k, uint32_t offset) +inline void m68ki_branch_32(uint32_t offset) { - REG_PC(m68k) += offset; + m_pc += offset; } @@ -1146,215 +998,215 @@ static inline void m68ki_branch_32(m68000_base_device *m68k, uint32_t offset) /* Set the S flag and change the active stack pointer. * Note that value MUST be 4 or 0. */ -static inline void m68ki_set_s_flag(m68000_base_device *m68k, uint32_t value) +inline void m68ki_set_s_flag(uint32_t value) { /* Backup the old stack pointer */ - REG_SP_BASE(m68k)[m68k->s_flag | ((m68k->s_flag>>1) & m68k->m_flag)] = REG_SP(m68k); + REG_SP_BASE()[m_s_flag | ((m_s_flag>>1) & m_m_flag)] = REG_SP(); /* Set the S flag */ - m68k->s_flag = value; + m_s_flag = value; /* Set the new stack pointer */ - REG_SP(m68k) = REG_SP_BASE(m68k)[m68k->s_flag | ((m68k->s_flag>>1) & m68k->m_flag)]; + REG_SP() = REG_SP_BASE()[m_s_flag | ((m_s_flag>>1) & m_m_flag)]; } /* Set the S and M flags and change the active stack pointer. * Note that value MUST be 0, 2, 4, or 6 (bit2 = S, bit1 = M). */ -static inline void m68ki_set_sm_flag(m68000_base_device *m68k, uint32_t value) +inline void m68ki_set_sm_flag(uint32_t value) { /* Backup the old stack pointer */ - REG_SP_BASE(m68k)[m68k->s_flag | ((m68k->s_flag>>1) & m68k->m_flag)] = REG_SP(m68k); + REG_SP_BASE()[m_s_flag | ((m_s_flag >> 1) & m_m_flag)] = REG_SP(); /* Set the S and M flags */ - m68k->s_flag = value & SFLAG_SET; - m68k->m_flag = value & MFLAG_SET; + m_s_flag = value & SFLAG_SET; + m_m_flag = value & MFLAG_SET; /* Set the new stack pointer */ - REG_SP(m68k) = REG_SP_BASE(m68k)[m68k->s_flag | ((m68k->s_flag>>1) & m68k->m_flag)]; + REG_SP() = REG_SP_BASE()[m_s_flag | ((m_s_flag>>1) & m_m_flag)]; } /* Set the S and M flags. Don't touch the stack pointer. */ -static inline void m68ki_set_sm_flag_nosp(m68000_base_device *m68k, uint32_t value) +inline void m68ki_set_sm_flag_nosp(uint32_t value) { /* Set the S and M flags */ - m68k->s_flag = value & SFLAG_SET; - m68k->m_flag = value & MFLAG_SET; + m_s_flag = value & SFLAG_SET; + m_m_flag = value & MFLAG_SET; } /* Set the condition code register */ -static inline void m68ki_set_ccr(m68000_base_device *m68k, uint32_t value) +inline void m68ki_set_ccr(uint32_t value) { - m68k->x_flag = BIT_4(value) << 4; - m68k->n_flag = BIT_3(value) << 4; - m68k->not_z_flag = !BIT_2(value); - m68k->v_flag = BIT_1(value) << 6; - m68k->c_flag = BIT_0(value) << 8; + m_x_flag = BIT_4(value)<< 4; + m_n_flag = BIT_3(value)<< 4; + m_not_z_flag = !BIT_2(value); + m_v_flag = BIT_1(value)<< 6; + m_c_flag = BIT_0(value)<< 8; } /* Set the status register but don't check for interrupts */ -static inline void m68ki_set_sr_noint(m68000_base_device *m68k, uint32_t value) +inline void m68ki_set_sr_noint(uint32_t value) { /* Mask out the "unimplemented" bits */ - value &= m68k->sr_mask; + value &= m_sr_mask; /* Now set the status register */ - m68k->t1_flag = BIT_F(value); - m68k->t0_flag = BIT_E(value); - m68k->int_mask = value & 0x0700; - m68ki_set_ccr(m68k, value); - m68ki_set_sm_flag(m68k, (value >> 11) & 6); + m_t1_flag = BIT_F(value); + m_t0_flag = BIT_E(value); + m_int_mask = value & 0x0700; + m68ki_set_ccr(value); + m68ki_set_sm_flag((value >> 11) & 6); } /* Set the status register but don't check for interrupts nor * change the stack pointer */ -static inline void m68ki_set_sr_noint_nosp(m68000_base_device *m68k, uint32_t value) +inline void m68ki_set_sr_noint_nosp(uint32_t value) { /* Mask out the "unimplemented" bits */ - value &= m68k->sr_mask; + value &= m_sr_mask; /* Now set the status register */ - m68k->t1_flag = BIT_F(value); - m68k->t0_flag = BIT_E(value); - m68k->int_mask = value & 0x0700; - m68ki_set_ccr(m68k, value); - m68ki_set_sm_flag_nosp(m68k, (value >> 11) & 6); + m_t1_flag = BIT_F(value); + m_t0_flag = BIT_E(value); + m_int_mask = value & 0x0700; + m68ki_set_ccr(value); + m68ki_set_sm_flag_nosp((value >> 11) & 6); } /* Set the status register and check for interrupts */ -static inline void m68ki_set_sr(m68000_base_device *m68k, uint32_t value) +inline void m68ki_set_sr(uint32_t value) { - m68ki_set_sr_noint(m68k, value); - m68ki_check_interrupts(m68k); + m68ki_set_sr_noint(value); + m68ki_check_interrupts(); } /* ------------------------- Exception Processing ------------------------- */ /* Initiate exception processing */ -static inline uint32_t m68ki_init_exception(m68000_base_device *m68k) +inline uint32_t m68ki_init_exception() { /* Save the old status register */ - uint32_t sr = m68ki_get_sr(m68k); + uint32_t sr = m68ki_get_sr(); /* Turn off trace flag, clear pending traces */ - m68k->t1_flag = m68k->t0_flag = 0; - m68ki_clear_trace(m68k); + m_t1_flag = m_t0_flag = 0; + m68ki_clear_trace(); /* Enter supervisor mode */ - m68ki_set_s_flag(m68k, SFLAG_SET); + m68ki_set_s_flag(SFLAG_SET); return sr; } /* 3 word stack frame (68000 only) */ -static inline void m68ki_stack_frame_3word(m68000_base_device *m68k, uint32_t pc, uint32_t sr) +inline void m68ki_stack_frame_3word(uint32_t pc, uint32_t sr) { - m68ki_push_32(m68k, pc); - m68ki_push_16(m68k, sr); + m68ki_push_32(pc); + m68ki_push_16(sr); } /* Format 0 stack frame. * This is the standard stack frame for 68010+. */ -static inline void m68ki_stack_frame_0000(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector) +inline void m68ki_stack_frame_0000(uint32_t pc, uint32_t sr, uint32_t vector) { /* Stack a 3-word frame if we are 68000 */ - if(m68k->cpu_type == CPU_TYPE_000 || m68k->cpu_type == CPU_TYPE_008) + if(m_cpu_type == CPU_TYPE_000 || m_cpu_type == CPU_TYPE_008) { - m68ki_stack_frame_3word(m68k, pc, sr); + m68ki_stack_frame_3word(pc, sr); return; } - m68ki_push_16(m68k, vector<<2); - m68ki_push_32(m68k, pc); - m68ki_push_16(m68k, sr); + m68ki_push_16(vector<<2); + m68ki_push_32(pc); + m68ki_push_16(sr); } /* Format 1 stack frame (68020). * For 68020, this is the 4 word throwaway frame. */ -static inline void m68ki_stack_frame_0001(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector) +inline void m68ki_stack_frame_0001(uint32_t pc, uint32_t sr, uint32_t vector) { - m68ki_push_16(m68k, 0x1000 | (vector<<2)); - m68ki_push_32(m68k, pc); - m68ki_push_16(m68k, sr); + m68ki_push_16(0x1000 | (vector<<2)); + m68ki_push_32(pc); + m68ki_push_16(sr); } /* Format 2 stack frame. * This is used only by 68020 for trap exceptions. */ -static inline void m68ki_stack_frame_0010(m68000_base_device *m68k, uint32_t sr, uint32_t vector) +inline void m68ki_stack_frame_0010(uint32_t sr, uint32_t vector) { - m68ki_push_32(m68k, REG_PPC(m68k)); - m68ki_push_16(m68k, 0x2000 | (vector<<2)); - m68ki_push_32(m68k, REG_PC(m68k)); - m68ki_push_16(m68k, sr); + m68ki_push_32(m_ppc); + m68ki_push_16(0x2000 | (vector<<2)); + m68ki_push_32(m_pc); + m68ki_push_16(sr); } /* Bus error stack frame (68000 only). */ -static inline void m68ki_stack_frame_buserr(m68000_base_device *m68k, uint32_t sr) +inline void m68ki_stack_frame_buserr(uint32_t sr) { - m68ki_push_32(m68k, REG_PC(m68k)); - m68ki_push_16(m68k, sr); - m68ki_push_16(m68k, m68k->ir); - m68ki_push_32(m68k, m68k->aerr_address); /* access address */ + m68ki_push_32(m_pc); + m68ki_push_16(sr); + m68ki_push_16(m_ir); + m68ki_push_32(m_aerr_address); /* access address */ /* 0 0 0 0 0 0 0 0 0 0 0 R/W I/N FC * R/W 0 = write, 1 = read * I/N 0 = instruction, 1 = not * FC 3-bit function code */ - m68ki_push_16(m68k, m68k->aerr_write_mode | m68k->instr_mode | m68k->aerr_fc); + m68ki_push_16(m_aerr_write_mode | m_instr_mode | m_aerr_fc); } /* Format 8 stack frame (68010). * 68010 only. This is the 29 word bus/address error frame. */ -static inline void m68ki_stack_frame_1000(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector) +inline void m68ki_stack_frame_1000(uint32_t pc, uint32_t sr, uint32_t vector) { /* VERSION * NUMBER * INTERNAL INFORMATION, 16 WORDS */ - m68ki_fake_push_32(m68k); - m68ki_fake_push_32(m68k); - m68ki_fake_push_32(m68k); - m68ki_fake_push_32(m68k); - m68ki_fake_push_32(m68k); - m68ki_fake_push_32(m68k); - m68ki_fake_push_32(m68k); - m68ki_fake_push_32(m68k); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); /* INSTRUCTION INPUT BUFFER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* UNUSED, RESERVED (not written) */ - m68ki_fake_push_16(m68k); + m68ki_fake_push_16(); /* DATA INPUT BUFFER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* UNUSED, RESERVED (not written) */ - m68ki_fake_push_16(m68k); + m68ki_fake_push_16(); /* DATA OUTPUT BUFFER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* UNUSED, RESERVED (not written) */ - m68ki_fake_push_16(m68k); + m68ki_fake_push_16(); /* FAULT ADDRESS */ - m68ki_push_32(m68k, 0); + m68ki_push_32(0); /* SPECIAL STATUS WORD */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* 1000, VECTOR OFFSET */ - m68ki_push_16(m68k, 0x8000 | (vector<<2)); + m68ki_push_16(0x8000 | (vector<<2)); /* PROGRAM COUNTER */ - m68ki_push_32(m68k, pc); + m68ki_push_32(pc); /* STATUS REGISTER */ - m68ki_push_16(m68k, sr); + m68ki_push_16(sr); } /* Format A stack frame (short bus fault). @@ -1362,51 +1214,51 @@ static inline void m68ki_stack_frame_1000(m68000_base_device *m68k, uint32_t pc, * if the error happens at an instruction boundary. * PC stacked is address of next instruction. */ -static inline void m68ki_stack_frame_1010(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address) +inline void m68ki_stack_frame_1010(uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address) { - int orig_rw = m68k->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now - int orig_fc = m68k->mmu_tmp_buserror_fc; + int orig_rw = m_mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now + int orig_fc = m_mmu_tmp_buserror_fc; /* INTERNAL REGISTER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* INTERNAL REGISTER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* DATA OUTPUT BUFFER (2 words) */ - m68ki_push_32(m68k, 0); + m68ki_push_32(0); /* INTERNAL REGISTER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* INTERNAL REGISTER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* DATA CYCLE FAULT ADDRESS (2 words) */ - m68ki_push_32(m68k, fault_address); + m68ki_push_32(fault_address); /* INSTRUCTION PIPE STAGE B */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* INSTRUCTION PIPE STAGE C */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* SPECIAL STATUS REGISTER */ // set bit for: Rerun Faulted bus Cycle, or run pending prefetch // set FC - m68ki_push_16(m68k, 0x0100 | orig_fc | orig_rw<<6); + m68ki_push_16(0x0100 | orig_fc | orig_rw<<6); /* INTERNAL REGISTER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* 1010, VECTOR OFFSET */ - m68ki_push_16(m68k, 0xa000 | (vector<<2)); + m68ki_push_16(0xa000 | (vector<<2)); /* PROGRAM COUNTER */ - m68ki_push_32(m68k, pc); + m68ki_push_32(pc); /* STATUS REGISTER */ - m68ki_push_16(m68k, sr); + m68ki_push_16(sr); } /* Format B stack frame (long bus fault). @@ -1414,301 +1266,301 @@ static inline void m68ki_stack_frame_1010(m68000_base_device *m68k, uint32_t sr, * if the error happens during instruction execution. * PC stacked is address of instruction in progress. */ -static inline void m68ki_stack_frame_1011(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address) +inline void m68ki_stack_frame_1011(uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address) { - int orig_rw = m68k->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now - int orig_fc = m68k->mmu_tmp_buserror_fc; + int orig_rw = m_mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now + int orig_fc = m_mmu_tmp_buserror_fc; /* INTERNAL REGISTERS (18 words) */ - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); /* VERSION# (4 bits), INTERNAL INFORMATION */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* INTERNAL REGISTERS (3 words) */ - m68ki_push_32(m68k, 0); - m68ki_push_16(m68k, 0); + m68ki_push_32(0); + m68ki_push_16(0); /* DATA INTPUT BUFFER (2 words) */ - m68ki_push_32(m68k, 0); + m68ki_push_32(0); /* INTERNAL REGISTERS (2 words) */ - m68ki_push_32(m68k, 0); + m68ki_push_32(0); /* STAGE B ADDRESS (2 words) */ - m68ki_push_32(m68k, 0); + m68ki_push_32(0); /* INTERNAL REGISTER (4 words) */ - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); + m68ki_push_32(0); + m68ki_push_32(0); /* DATA OUTPUT BUFFER (2 words) */ - m68ki_push_32(m68k, 0); + m68ki_push_32(0); /* INTERNAL REGISTER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* INTERNAL REGISTER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* DATA CYCLE FAULT ADDRESS (2 words) */ - m68ki_push_32(m68k, fault_address); + m68ki_push_32(fault_address); /* INSTRUCTION PIPE STAGE B */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* INSTRUCTION PIPE STAGE C */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* SPECIAL STATUS REGISTER */ - m68ki_push_16(m68k, 0x0100 | orig_fc | orig_rw<<6); + m68ki_push_16(0x0100 | orig_fc | orig_rw<<6); /* INTERNAL REGISTER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* 1011, VECTOR OFFSET */ - m68ki_push_16(m68k, 0xb000 | (vector<<2)); + m68ki_push_16(0xb000 | (vector<<2)); /* PROGRAM COUNTER */ - m68ki_push_32(m68k, pc); + m68ki_push_32(pc); /* STATUS REGISTER */ - m68ki_push_16(m68k, sr); + m68ki_push_16(sr); } /* Type 7 stack frame (access fault). * This is used by the 68040 for bus fault and mmu trap * 30 words */ -static inline void m68ki_stack_frame_0111(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address, bool in_mmu) +inline void m68ki_stack_frame_0111(uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address, bool in_mmu) { - int orig_rw = m68k->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now - int orig_fc = m68k->mmu_tmp_buserror_fc; + int orig_rw = m_mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now + int orig_fc = m_mmu_tmp_buserror_fc; /* INTERNAL REGISTERS (18 words) */ - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); /* FAULT ADDRESS (2 words) */ - m68ki_push_32(m68k, fault_address); + m68ki_push_32(fault_address); /* INTERNAL REGISTERS (3 words) */ - m68ki_push_32(m68k, 0); - m68ki_push_16(m68k, 0); + m68ki_push_32(0); + m68ki_push_16(0); /* SPECIAL STATUS REGISTER (1 word) */ - m68ki_push_16(m68k, (in_mmu ? 0x400 : 0) | orig_fc | (orig_rw<<8)); + m68ki_push_16((in_mmu ? 0x400 : 0) | orig_fc | (orig_rw<<8)); /* EFFECTIVE ADDRESS (2 words) */ - m68ki_push_32(m68k, fault_address); + m68ki_push_32(fault_address); /* 0111, VECTOR OFFSET (1 word) */ - m68ki_push_16(m68k, 0x7000 | (vector<<2)); + m68ki_push_16(0x7000 | (vector<<2)); /* PROGRAM COUNTER (2 words) */ - m68ki_push_32(m68k, pc); + m68ki_push_32(pc); /* STATUS REGISTER (1 word) */ - m68ki_push_16(m68k, sr); + m68ki_push_16(sr); } /* Used for Group 2 exceptions. * These stack a type 2 frame on the 020. */ -static inline void m68ki_exception_trap(m68000_base_device *m68k, uint32_t vector) +inline void m68ki_exception_trap(uint32_t vector) { - uint32_t sr = m68ki_init_exception(m68k); + uint32_t sr = m68ki_init_exception(); - if(CPU_TYPE_IS_010_LESS(m68k->cpu_type)) - m68ki_stack_frame_0000(m68k, REG_PC(m68k), sr, vector); + if(CPU_TYPE_IS_010_LESS()) + m68ki_stack_frame_0000(m_pc, sr, vector); else - m68ki_stack_frame_0010(m68k, sr, vector); + m68ki_stack_frame_0010(sr, vector); - m68ki_jump_vector(m68k, vector); + m68ki_jump_vector(vector); /* Use up some clock cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[vector]; + m_remaining_cycles -= m_cyc_exception[vector]; } /* Trap#n stacks a 0 frame but behaves like group2 otherwise */ -static inline void m68ki_exception_trapN(m68000_base_device *m68k, uint32_t vector) +inline void m68ki_exception_trapN(uint32_t vector) { - uint32_t sr = m68ki_init_exception(m68k); - m68ki_stack_frame_0000(m68k, REG_PC(m68k), sr, vector); - m68ki_jump_vector(m68k, vector); + uint32_t sr = m68ki_init_exception(); + m68ki_stack_frame_0000(m_pc, sr, vector); + m68ki_jump_vector(vector); /* Use up some clock cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[vector]; + m_remaining_cycles -= m_cyc_exception[vector]; } /* Exception for trace mode */ -static inline void m68ki_exception_trace(m68000_base_device *m68k) +inline void m68ki_exception_trace() { - uint32_t sr = m68ki_init_exception(m68k); + uint32_t sr = m68ki_init_exception(); - if(CPU_TYPE_IS_010_LESS(m68k->cpu_type)) + if(CPU_TYPE_IS_010_LESS()) { - if(CPU_TYPE_IS_000(m68k->cpu_type)) + if(CPU_TYPE_IS_000()) { - m68k->instr_mode = INSTRUCTION_NO; + m_instr_mode = INSTRUCTION_NO; } - m68ki_stack_frame_0000(m68k, REG_PC(m68k), sr, EXCEPTION_TRACE); + m68ki_stack_frame_0000(m_pc, sr, EXCEPTION_TRACE); } else - m68ki_stack_frame_0010(m68k, sr, EXCEPTION_TRACE); + m68ki_stack_frame_0010(sr, EXCEPTION_TRACE); - m68ki_jump_vector(m68k, EXCEPTION_TRACE); + m68ki_jump_vector(EXCEPTION_TRACE); /* Trace nullifies a STOP instruction */ - m68k->stopped &= ~STOP_LEVEL_STOP; + m_stopped &= ~STOP_LEVEL_STOP; /* Use up some clock cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[EXCEPTION_TRACE]; + m_remaining_cycles -= m_cyc_exception[EXCEPTION_TRACE]; } /* Exception for privilege violation */ -static inline void m68ki_exception_privilege_violation(m68000_base_device *m68k) +inline void m68ki_exception_privilege_violation() { - uint32_t sr = m68ki_init_exception(m68k); + uint32_t sr = m68ki_init_exception(); - if(CPU_TYPE_IS_000(m68k->cpu_type)) + if(CPU_TYPE_IS_000()) { - m68k->instr_mode = INSTRUCTION_NO; + m_instr_mode = INSTRUCTION_NO; } - m68ki_stack_frame_0000(m68k, REG_PPC(m68k), sr, EXCEPTION_PRIVILEGE_VIOLATION); - m68ki_jump_vector(m68k, EXCEPTION_PRIVILEGE_VIOLATION); + m68ki_stack_frame_0000(m_ppc, sr, EXCEPTION_PRIVILEGE_VIOLATION); + m68ki_jump_vector(EXCEPTION_PRIVILEGE_VIOLATION); /* Use up some clock cycles and undo the instruction's cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[EXCEPTION_PRIVILEGE_VIOLATION] - m68k->cyc_instruction[m68k->ir]; + m_remaining_cycles -= m_cyc_exception[EXCEPTION_PRIVILEGE_VIOLATION] - m_cyc_instruction[m_ir]; } /* Exception for A-Line instructions */ -static inline void m68ki_exception_1010(m68000_base_device *m68k) +inline void m68ki_exception_1010() { uint32_t sr; - sr = m68ki_init_exception(m68k); - m68ki_stack_frame_0000(m68k, REG_PPC(m68k), sr, EXCEPTION_1010); - m68ki_jump_vector(m68k, EXCEPTION_1010); + sr = m68ki_init_exception(); + m68ki_stack_frame_0000(m_ppc, sr, EXCEPTION_1010); + m68ki_jump_vector(EXCEPTION_1010); /* Use up some clock cycles and undo the instruction's cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[EXCEPTION_1010] - m68k->cyc_instruction[m68k->ir]; + m_remaining_cycles -= m_cyc_exception[EXCEPTION_1010] - m_cyc_instruction[m_ir]; } /* Exception for F-Line instructions */ -static inline void m68ki_exception_1111(m68000_base_device *m68k) +inline void m68ki_exception_1111() { uint32_t sr; - sr = m68ki_init_exception(m68k); - m68ki_stack_frame_0000(m68k, REG_PPC(m68k), sr, EXCEPTION_1111); - m68ki_jump_vector(m68k, EXCEPTION_1111); + sr = m68ki_init_exception(); + m68ki_stack_frame_0000(m_ppc, sr, EXCEPTION_1111); + m68ki_jump_vector(EXCEPTION_1111); /* Use up some clock cycles and undo the instruction's cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[EXCEPTION_1111] - m68k->cyc_instruction[m68k->ir]; + m_remaining_cycles -= m_cyc_exception[EXCEPTION_1111] - m_cyc_instruction[m_ir]; } /* Exception for illegal instructions */ -static inline void m68ki_exception_illegal(m68000_base_device *m68k) +inline void m68ki_exception_illegal() { uint32_t sr; - sr = m68ki_init_exception(m68k); + sr = m68ki_init_exception(); - if(CPU_TYPE_IS_000(m68k->cpu_type)) + if(CPU_TYPE_IS_000()) { - m68k->instr_mode = INSTRUCTION_NO; + m_instr_mode = INSTRUCTION_NO; } - m68ki_stack_frame_0000(m68k, REG_PPC(m68k), sr, EXCEPTION_ILLEGAL_INSTRUCTION); - m68ki_jump_vector(m68k, EXCEPTION_ILLEGAL_INSTRUCTION); + m68ki_stack_frame_0000(m_ppc, sr, EXCEPTION_ILLEGAL_INSTRUCTION); + m68ki_jump_vector(EXCEPTION_ILLEGAL_INSTRUCTION); /* Use up some clock cycles and undo the instruction's cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[EXCEPTION_ILLEGAL_INSTRUCTION] - m68k->cyc_instruction[m68k->ir]; + m_remaining_cycles -= m_cyc_exception[EXCEPTION_ILLEGAL_INSTRUCTION] - m_cyc_instruction[m_ir]; } /* Exception for format errror in RTE */ -static inline void m68ki_exception_format_error(m68000_base_device *m68k) +inline void m68ki_exception_format_error() { - uint32_t sr = m68ki_init_exception(m68k); - m68ki_stack_frame_0000(m68k, REG_PC(m68k), sr, EXCEPTION_FORMAT_ERROR); - m68ki_jump_vector(m68k, EXCEPTION_FORMAT_ERROR); + uint32_t sr = m68ki_init_exception(); + m68ki_stack_frame_0000(m_pc, sr, EXCEPTION_FORMAT_ERROR); + m68ki_jump_vector(EXCEPTION_FORMAT_ERROR); /* Use up some clock cycles and undo the instruction's cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[EXCEPTION_FORMAT_ERROR] - m68k->cyc_instruction[m68k->ir]; + m_remaining_cycles -= m_cyc_exception[EXCEPTION_FORMAT_ERROR] - m_cyc_instruction[m_ir]; } /* Exception for address error */ -static inline void m68ki_exception_address_error(m68000_base_device *m68k) +inline void m68ki_exception_address_error() { - uint32_t sr = m68ki_init_exception(m68k); + uint32_t sr = m68ki_init_exception(); /* If we were processing a bus error, address error, or reset, * this is a catastrophic failure. * Halt the CPU */ - if(m68k->run_mode == RUN_MODE_BERR_AERR_RESET) + if(m_run_mode == RUN_MODE_BERR_AERR_RESET) { - m68k->/*memory.*/read8(0x00ffff01); - m68k->stopped = STOP_LEVEL_HALT; + m_read8(0x00ffff01); + m_stopped = STOP_LEVEL_HALT; return; } - m68k->run_mode = RUN_MODE_BERR_AERR_RESET; + m_run_mode = RUN_MODE_BERR_AERR_RESET; - if (!CPU_TYPE_IS_010_PLUS(m68k->cpu_type)) + if (!CPU_TYPE_IS_010_PLUS()) { /* Note: This is implemented for 68000 only! */ - m68ki_stack_frame_buserr(m68k, sr); + m68ki_stack_frame_buserr(sr); } - else if (CPU_TYPE_IS_010(m68k->cpu_type)) + else if (CPU_TYPE_IS_010()) { /* only the 68010 throws this unique type-1000 frame */ - m68ki_stack_frame_1000(m68k, REG_PPC(m68k), sr, EXCEPTION_BUS_ERROR); + m68ki_stack_frame_1000(m_ppc, sr, EXCEPTION_BUS_ERROR); } - else if (m68k->mmu_tmp_buserror_address == REG_PPC(m68k)) + else if (m_mmu_tmp_buserror_address == m_ppc) { - m68ki_stack_frame_1010(m68k, sr, EXCEPTION_BUS_ERROR, REG_PPC(m68k), m68k->mmu_tmp_buserror_address); + m68ki_stack_frame_1010(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address); } else { - m68ki_stack_frame_1011(m68k, sr, EXCEPTION_BUS_ERROR, REG_PPC(m68k), m68k->mmu_tmp_buserror_address); + m68ki_stack_frame_1011(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address); } - m68ki_jump_vector(m68k, EXCEPTION_ADDRESS_ERROR); + m68ki_jump_vector(EXCEPTION_ADDRESS_ERROR); /* Use up some clock cycles and undo the instruction's cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[EXCEPTION_ADDRESS_ERROR] - m68k->cyc_instruction[m68k->ir]; + m_remaining_cycles -= m_cyc_exception[EXCEPTION_ADDRESS_ERROR] - m_cyc_instruction[m_ir]; } /* ASG: Check for interrupts */ -static inline void m68ki_check_interrupts(m68000_base_device *m68k) +inline void m68ki_check_interrupts() { - if(m68k->nmi_pending) + if(m_nmi_pending) { - m68k->nmi_pending = false; - m68k->m68ki_exception_interrupt(m68k, 7); + m_nmi_pending = false; + m68ki_exception_interrupt(7); } - else if(m68k->int_level > m68k->int_mask) - m68k->m68ki_exception_interrupt(m68k, m68k->int_level>>8); + else if(m_int_level > m_int_mask) + m68ki_exception_interrupt(m_int_level>>8); } diff --git a/src/devices/cpu/m68000/m68kfpu.hxx b/src/devices/cpu/m68000/m68kfpu.hxx index e53f4ad899d..5e2c74770f3 100644 --- a/src/devices/cpu/m68000/m68kfpu.hxx +++ b/src/devices/cpu/m68000/m68kfpu.hxx @@ -1,23 +1,20 @@ // license:BSD-3-Clause // copyright-holders:Karl Stenerud -#include <math.h> -#define FPCC_N 0x08000000 -#define FPCC_Z 0x04000000 -#define FPCC_I 0x02000000 -#define FPCC_NAN 0x01000000 +static constexpr int FPCC_N = 0x08000000; +static constexpr int FPCC_Z = 0x04000000; +static constexpr int FPCC_I = 0x02000000; +static constexpr int FPCC_NAN = 0x01000000; -#define FPES_OE 0x00002000 -#define FPAE_IOP 0x00000080 +static constexpr int FPES_OE = 0x00002000; +static constexpr int FPAE_IOP = 0x00000080; -#define DOUBLE_INFINITY 0x7ff0000000000000U -#define DOUBLE_EXPONENT 0x7ff0000000000000U -#define DOUBLE_MANTISSA 0x000fffffffffffffU - -extern flag floatx80_is_nan( floatx80 a ); +static constexpr uint64_t DOUBLE_INFINITY = 0x7ff0000000000000U; +static constexpr uint64_t DOUBLE_EXPONENT = 0x7ff0000000000000U; +static constexpr uint64_t DOUBLE_MANTISSA = 0x000fffffffffffffU; // masks for packed dwords, positive k-factor -static const uint32_t pkmask2[18] = +const uint32_t pkmask2[18] = { 0xffffffff, 0, 0xf0000000, 0xff000000, 0xfff00000, 0xffff0000, 0xfffff000, 0xffffff00, 0xfffffff0, 0xffffffff, @@ -25,7 +22,7 @@ static const uint32_t pkmask2[18] = 0xffffffff, 0xffffffff, 0xffffffff }; -static const uint32_t pkmask3[18] = +const uint32_t pkmask3[18] = { 0xffffffff, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0xf0000000, 0xff000000, 0xfff00000, 0xffff0000, @@ -53,15 +50,15 @@ static inline floatx80 double_to_fx80(double in) return float64_to_floatx80(*d); } -static inline floatx80 load_extended_float80(m68000_base_device *m68k, uint32_t ea) +inline floatx80 load_extended_float80(uint32_t ea) { uint32_t d1,d2; uint16_t d3; floatx80 fp; - d3 = m68ki_read_16(m68k, ea); - d1 = m68ki_read_32(m68k, ea+4); - d2 = m68ki_read_32(m68k, ea+8); + d3 = m68ki_read_16(ea); + d1 = m68ki_read_32(ea+4); + d2 = m68ki_read_32(ea+8); fp.high = d3; fp.low = ((uint64_t)d1<<32) | (d2 & 0xffffffff); @@ -69,24 +66,24 @@ static inline floatx80 load_extended_float80(m68000_base_device *m68k, uint32_t return fp; } -static inline void store_extended_float80(m68000_base_device *m68k, uint32_t ea, floatx80 fpr) +inline void store_extended_float80(uint32_t ea, floatx80 fpr) { - m68ki_write_16(m68k, ea+0, fpr.high); - m68ki_write_16(m68k, ea+2, 0); - m68ki_write_32(m68k, ea+4, (fpr.low>>32)&0xffffffff); - m68ki_write_32(m68k, ea+8, fpr.low&0xffffffff); + m68ki_write_16(ea+0, fpr.high); + m68ki_write_16(ea+2, 0); + m68ki_write_32(ea+4, (fpr.low>>32)&0xffffffff); + m68ki_write_32(ea+8, fpr.low&0xffffffff); } -static inline floatx80 load_pack_float80(m68000_base_device *m68k, uint32_t ea) +inline floatx80 load_pack_float80(uint32_t ea) { uint32_t dw1, dw2, dw3; floatx80 result; double tmp; char str[128], *ch; - dw1 = m68ki_read_32(m68k, ea); - dw2 = m68ki_read_32(m68k, ea+4); - dw3 = m68ki_read_32(m68k, ea+8); + dw1 = m68ki_read_32(ea); + dw2 = m68ki_read_32(ea+4); + dw3 = m68ki_read_32(ea+8); ch = &str[0]; if (dw1 & 0x80000000) // mantissa sign @@ -128,7 +125,7 @@ static inline floatx80 load_pack_float80(m68000_base_device *m68k, uint32_t ea) return result; } -static inline void store_pack_float80(m68000_base_device *m68k, uint32_t ea, int k, floatx80 fpr) +inline void store_pack_float80(uint32_t ea, int k, floatx80 fpr) { uint32_t dw1, dw2, dw3; char str[128], *ch; @@ -224,7 +221,7 @@ static inline void store_pack_float80(m68000_base_device *m68k, uint32_t ea, int { dw2 &= pkmask2[17]; dw3 &= pkmask3[17]; -// m68k->fpcr |= (need to set OPERR bit) +// m_fpcr |= (need to set OPERR bit) } } @@ -255,49 +252,49 @@ static inline void store_pack_float80(m68000_base_device *m68k, uint32_t ea, int dw1 |= (j << 16); } - m68ki_write_32(m68k, ea, dw1); - m68ki_write_32(m68k, ea+4, dw2); - m68ki_write_32(m68k, ea+8, dw3); + m68ki_write_32(ea, dw1); + m68ki_write_32(ea+4, dw2); + m68ki_write_32(ea+8, dw3); } -static inline void SET_CONDITION_CODES(m68000_base_device *m68k, floatx80 reg) +inline void SET_CONDITION_CODES(floatx80 reg) { // uint64_t *regi; // regi = (uint64_t *)® - REG_FPSR(m68k) &= ~(FPCC_N|FPCC_Z|FPCC_I|FPCC_NAN); + m_fpsr &= ~(FPCC_N|FPCC_Z|FPCC_I|FPCC_NAN); // sign flag if (reg.high & 0x8000) { - REG_FPSR(m68k) |= FPCC_N; + m_fpsr |= FPCC_N; } // zero flag if (((reg.high & 0x7fff) == 0) && ((reg.low<<1) == 0)) { - REG_FPSR(m68k) |= FPCC_Z; + m_fpsr |= FPCC_Z; } // infinity flag if (((reg.high & 0x7fff) == 0x7fff) && ((reg.low<<1) == 0)) { - REG_FPSR(m68k) |= FPCC_I; + m_fpsr |= FPCC_I; } // NaN flag if (floatx80_is_nan(reg)) { - REG_FPSR(m68k) |= FPCC_NAN; + m_fpsr |= FPCC_NAN; } } -static inline int TEST_CONDITION(m68000_base_device *m68k, int condition) +inline int TEST_CONDITION(int condition) { - int n = (REG_FPSR(m68k) & FPCC_N) != 0; - int z = (REG_FPSR(m68k) & FPCC_Z) != 0; - int nan = (REG_FPSR(m68k) & FPCC_NAN) != 0; + int n = (m_fpsr & FPCC_N) != 0; + int z = (m_fpsr & FPCC_Z) != 0; + int nan = (m_fpsr & FPCC_NAN) != 0; int r = 0; switch (condition) { @@ -355,7 +352,7 @@ static inline int TEST_CONDITION(m68000_base_device *m68k, int condition) return r; } -static uint8_t READ_EA_8(m68000_base_device *m68k, int ea) +uint8_t READ_EA_8(int ea) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -364,32 +361,32 @@ static uint8_t READ_EA_8(m68000_base_device *m68k, int ea) { case 0: // Dn { - return REG_D(m68k)[reg]; + return REG_D()[reg]; } case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - return m68ki_read_8(m68k, ea); + uint32_t ea = REG_A()[reg]; + return m68ki_read_8(ea); } case 3: // (An)+ { - uint32_t ea = EA_AY_PI_8(m68k); - return m68ki_read_8(m68k, ea); + uint32_t ea = EA_AY_PI_8(); + return m68ki_read_8(ea); } case 4: // -(An) { - uint32_t ea = EA_AY_PD_8(m68k); - return m68ki_read_8(m68k, ea); + uint32_t ea = EA_AY_PD_8(); + return m68ki_read_8(ea); } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_8(m68k); - return m68ki_read_8(m68k, ea); + uint32_t ea = EA_AY_DI_8(); + return m68ki_read_8(ea); } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_8(m68k); - return m68ki_read_8(m68k, ea); + uint32_t ea = EA_AY_IX_8(); + return m68ki_read_8(ea); } case 7: { @@ -397,41 +394,41 @@ static uint8_t READ_EA_8(m68000_base_device *m68k, int ea) { case 0: // (xxx).W { - uint32_t ea = (uint32_t)OPER_I_16(m68k); - return m68ki_read_8(m68k, ea); + uint32_t ea = OPER_I_16(); + return m68ki_read_8(ea); } case 1: // (xxx).L { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - return m68ki_read_8(m68k, ea); + return m68ki_read_8(ea); } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_8(m68k); - return m68ki_read_8(m68k, ea); + uint32_t ea = EA_PCDI_8(); + return m68ki_read_8(ea); } case 3: // (PC) + (Xn) + d8 { - uint32_t ea = EA_PCIX_8(m68k); - return m68ki_read_8(m68k, ea); + uint32_t ea = EA_PCIX_8(); + return m68ki_read_8(ea); } case 4: // #<data> { - return OPER_I_8(m68k); + return OPER_I_8(); } - default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } return 0; } -static uint16_t READ_EA_16(m68000_base_device *m68k, int ea) +uint16_t READ_EA_16(int ea) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -440,32 +437,32 @@ static uint16_t READ_EA_16(m68000_base_device *m68k, int ea) { case 0: // Dn { - return (uint16_t)(REG_D(m68k)[reg]); + return (uint16_t)(REG_D()[reg]); } case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - return m68ki_read_16(m68k, ea); + uint32_t ea = REG_A()[reg]; + return m68ki_read_16(ea); } case 3: // (An)+ { - uint32_t ea = EA_AY_PI_16(m68k); - return m68ki_read_16(m68k, ea); + uint32_t ea = EA_AY_PI_16(); + return m68ki_read_16(ea); } case 4: // -(An) { - uint32_t ea = EA_AY_PD_16(m68k); - return m68ki_read_16(m68k, ea); + uint32_t ea = EA_AY_PD_16(); + return m68ki_read_16(ea); } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_16(m68k); - return m68ki_read_16(m68k, ea); + uint32_t ea = EA_AY_DI_16(); + return m68ki_read_16(ea); } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_16(m68k); - return m68ki_read_16(m68k, ea); + uint32_t ea = EA_AY_IX_16(); + return m68ki_read_16(ea); } case 7: { @@ -473,42 +470,42 @@ static uint16_t READ_EA_16(m68000_base_device *m68k, int ea) { case 0: // (xxx).W { - uint32_t ea = (uint32_t)OPER_I_16(m68k); - return m68ki_read_16(m68k, ea); + uint32_t ea = OPER_I_16(); + return m68ki_read_16(ea); } case 1: // (xxx).L { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - return m68ki_read_16(m68k, ea); + return m68ki_read_16(ea); } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_16(m68k); - return m68ki_read_16(m68k, ea); + uint32_t ea = EA_PCDI_16(); + return m68ki_read_16(ea); } case 3: // (PC) + (Xn) + d8 { - uint32_t ea = EA_PCIX_16(m68k); - return m68ki_read_16(m68k, ea); + uint32_t ea = EA_PCIX_16(); + return m68ki_read_16(ea); } case 4: // #<data> { - return OPER_I_16(m68k); + return OPER_I_16(); } - default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } return 0; } -static uint32_t READ_EA_32(m68000_base_device *m68k, int ea) +uint32_t READ_EA_32(int ea) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -517,32 +514,32 @@ static uint32_t READ_EA_32(m68000_base_device *m68k, int ea) { case 0: // Dn { - return REG_D(m68k)[reg]; + return REG_D()[reg]; } case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - return m68ki_read_32(m68k, ea); + uint32_t ea = REG_A()[reg]; + return m68ki_read_32(ea); } case 3: // (An)+ { - uint32_t ea = EA_AY_PI_32(m68k); - return m68ki_read_32(m68k, ea); + uint32_t ea = EA_AY_PI_32(); + return m68ki_read_32(ea); } case 4: // -(An) { - uint32_t ea = EA_AY_PD_32(m68k); - return m68ki_read_32(m68k, ea); + uint32_t ea = EA_AY_PD_32(); + return m68ki_read_32(ea); } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_32(m68k); - return m68ki_read_32(m68k, ea); + uint32_t ea = EA_AY_DI_32(); + return m68ki_read_32(ea); } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_32(m68k); - return m68ki_read_32(m68k, ea); + uint32_t ea = EA_AY_IX_32(); + return m68ki_read_32(ea); } case 7: { @@ -550,40 +547,40 @@ static uint32_t READ_EA_32(m68000_base_device *m68k, int ea) { case 0: // (xxx).W { - uint32_t ea = (uint32_t)OPER_I_16(m68k); - return m68ki_read_32(m68k, ea); + uint32_t ea = OPER_I_16(); + return m68ki_read_32(ea); } case 1: // (xxx).L { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - return m68ki_read_32(m68k, ea); + return m68ki_read_32(ea); } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_32(m68k); - return m68ki_read_32(m68k, ea); + uint32_t ea = EA_PCDI_32(); + return m68ki_read_32(ea); } case 3: // (PC) + (Xn) + d8 { - uint32_t ea = EA_PCIX_32(m68k); - return m68ki_read_32(m68k, ea); + uint32_t ea = EA_PCIX_32(); + return m68ki_read_32(ea); } case 4: // #<data> { - return OPER_I_32(m68k); + return OPER_I_32(); } - default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } return 0; } -static uint64_t READ_EA_64(m68000_base_device *m68k, int ea) +uint64_t READ_EA_64(int ea) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -593,39 +590,39 @@ static uint64_t READ_EA_64(m68000_base_device *m68k, int ea) { case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - h1 = m68ki_read_32(m68k, ea+0); - h2 = m68ki_read_32(m68k, ea+4); + uint32_t ea = REG_A()[reg]; + h1 = m68ki_read_32(ea+0); + h2 = m68ki_read_32(ea+4); return (uint64_t)(h1) << 32 | (uint64_t)(h2); } case 3: // (An)+ { - uint32_t ea = REG_A(m68k)[reg]; - REG_A(m68k)[reg] += 8; - h1 = m68ki_read_32(m68k, ea+0); - h2 = m68ki_read_32(m68k, ea+4); + uint32_t ea = REG_A()[reg]; + REG_A()[reg] += 8; + h1 = m68ki_read_32(ea+0); + h2 = m68ki_read_32(ea+4); return (uint64_t)(h1) << 32 | (uint64_t)(h2); } case 4: // -(An) { - uint32_t ea = REG_A(m68k)[reg]-8; - REG_A(m68k)[reg] -= 8; - h1 = m68ki_read_32(m68k, ea+0); - h2 = m68ki_read_32(m68k, ea+4); + uint32_t ea = REG_A()[reg]-8; + REG_A()[reg] -= 8; + h1 = m68ki_read_32(ea+0); + h2 = m68ki_read_32(ea+4); return (uint64_t)(h1) << 32 | (uint64_t)(h2); } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_32(m68k); - h1 = m68ki_read_32(m68k, ea+0); - h2 = m68ki_read_32(m68k, ea+4); + uint32_t ea = EA_AY_DI_32(); + h1 = m68ki_read_32(ea+0); + h2 = m68ki_read_32(ea+4); return (uint64_t)(h1) << 32 | (uint64_t)(h2); } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_32(m68k); - h1 = m68ki_read_32(m68k, ea+0); - h2 = m68ki_read_32(m68k, ea+4); + uint32_t ea = EA_AY_IX_32(); + h1 = m68ki_read_32(ea+0); + h2 = m68ki_read_32(ea+4); return (uint64_t)(h1) << 32 | (uint64_t)(h2); } case 7: @@ -634,43 +631,43 @@ static uint64_t READ_EA_64(m68000_base_device *m68k, int ea) { case 1: // (xxx).L { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - return (uint64_t)(m68ki_read_32(m68k, ea)) << 32 | (uint64_t)(m68ki_read_32(m68k, ea+4)); + return (uint64_t)(m68ki_read_32(ea)) << 32 | (uint64_t)(m68ki_read_32(ea+4)); } case 3: // (PC) + (Xn) + d8 { - uint32_t ea = EA_PCIX_32(m68k); - h1 = m68ki_read_32(m68k, ea+0); - h2 = m68ki_read_32(m68k, ea+4); + uint32_t ea = EA_PCIX_32(); + h1 = m68ki_read_32(ea+0); + h2 = m68ki_read_32(ea+4); return (uint64_t)(h1) << 32 | (uint64_t)(h2); } case 4: // #<data> { - h1 = OPER_I_32(m68k); - h2 = OPER_I_32(m68k); + h1 = OPER_I_32(); + h2 = OPER_I_32(); return (uint64_t)(h1) << 32 | (uint64_t)(h2); } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_32(m68k); - h1 = m68ki_read_32(m68k, ea+0); - h2 = m68ki_read_32(m68k, ea+4); + uint32_t ea = EA_PCDI_32(); + h1 = m68ki_read_32(ea+0); + h2 = m68ki_read_32(ea+4); return (uint64_t)(h1) << 32 | (uint64_t)(h2); } - default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } return 0; } -static floatx80 READ_EA_FPE(m68000_base_device *m68k, int ea) +floatx80 READ_EA_FPE(int ea) { floatx80 fpr; int mode = (ea >> 3) & 0x7; @@ -680,37 +677,37 @@ static floatx80 READ_EA_FPE(m68000_base_device *m68k, int ea) { case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - fpr = load_extended_float80(m68k, ea); + uint32_t ea = REG_A()[reg]; + fpr = load_extended_float80(ea); break; } case 3: // (An)+ { - uint32_t ea = REG_A(m68k)[reg]; - REG_A(m68k)[reg] += 12; - fpr = load_extended_float80(m68k, ea); + uint32_t ea = REG_A()[reg]; + REG_A()[reg] += 12; + fpr = load_extended_float80(ea); break; } case 4: // -(An) { - uint32_t ea = REG_A(m68k)[reg]-12; - REG_A(m68k)[reg] -= 12; - fpr = load_extended_float80(m68k, ea); + uint32_t ea = REG_A()[reg]-12; + REG_A()[reg] -= 12; + fpr = load_extended_float80(ea); break; } case 5: // (d16, An) { // FIXME: will fail for fmovem - uint32_t ea = EA_AY_DI_32(m68k); - fpr = load_extended_float80(m68k, ea); + uint32_t ea = EA_AY_DI_32(); + fpr = load_extended_float80(ea); break; } case 6: // (An) + (Xn) + d8 { // FIXME: will fail for fmovem - uint32_t ea = EA_AY_IX_32(m68k); - fpr = load_extended_float80(m68k, ea); + uint32_t ea = EA_AY_IX_32(); + fpr = load_extended_float80(ea); break; } @@ -720,41 +717,41 @@ static floatx80 READ_EA_FPE(m68000_base_device *m68k, int ea) { case 1: // (xxx) { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - fpr = load_extended_float80(m68k, ea); + fpr = load_extended_float80(ea); } break; case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_32(m68k); - fpr = load_extended_float80(m68k, ea); + uint32_t ea = EA_PCDI_32(); + fpr = load_extended_float80(ea); } break; case 3: // (d16,PC,Dx.w) { - uint32_t ea = EA_PCIX_32(m68k); - fpr = load_extended_float80(m68k, ea); + uint32_t ea = EA_PCIX_32(); + fpr = load_extended_float80(ea); } break; default: - fatalerror("M68kFPU: READ_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); + fatalerror("M68kFPU: READ_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); break; } } break; - default: fatalerror("M68kFPU: READ_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); break; + default: fatalerror("M68kFPU: READ_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); break; } return fpr; } -static floatx80 READ_EA_PACK(m68000_base_device *m68k, int ea) +floatx80 READ_EA_PACK(int ea) { floatx80 fpr; int mode = (ea >> 3) & 0x7; @@ -764,16 +761,16 @@ static floatx80 READ_EA_PACK(m68000_base_device *m68k, int ea) { case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - fpr = load_pack_float80(m68k, ea); + uint32_t ea = REG_A()[reg]; + fpr = load_pack_float80(ea); break; } case 3: // (An)+ { - uint32_t ea = REG_A(m68k)[reg]; - REG_A(m68k)[reg] += 12; - fpr = load_pack_float80(m68k, ea); + uint32_t ea = REG_A()[reg]; + REG_A()[reg] += 12; + fpr = load_pack_float80(ea); break; } @@ -783,25 +780,25 @@ static floatx80 READ_EA_PACK(m68000_base_device *m68k, int ea) { case 3: // (d16,PC,Dx.w) { - uint32_t ea = EA_PCIX_32(m68k); - fpr = load_pack_float80(m68k, ea); + uint32_t ea = EA_PCIX_32(); + fpr = load_pack_float80(ea); } break; default: - fatalerror("M68kFPU: READ_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); + fatalerror("M68kFPU: READ_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); break; } } break; - default: fatalerror("M68kFPU: READ_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); break; + default: fatalerror("M68kFPU: READ_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); break; } return fpr; } -static void WRITE_EA_8(m68000_base_device *m68k, int ea, uint8_t data) +void WRITE_EA_8(int ea, uint8_t data) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -810,37 +807,37 @@ static void WRITE_EA_8(m68000_base_device *m68k, int ea, uint8_t data) { case 0: // Dn { - REG_D(m68k)[reg] = data; + REG_D()[reg] = data; break; } case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - m68ki_write_8(m68k, ea, data); + uint32_t ea = REG_A()[reg]; + m68ki_write_8(ea, data); break; } case 3: // (An)+ { - uint32_t ea = EA_AY_PI_8(m68k); - m68ki_write_8(m68k, ea, data); + uint32_t ea = EA_AY_PI_8(); + m68ki_write_8(ea, data); break; } case 4: // -(An) { - uint32_t ea = EA_AY_PD_8(m68k); - m68ki_write_8(m68k, ea, data); + uint32_t ea = EA_AY_PD_8(); + m68ki_write_8(ea, data); break; } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_8(m68k); - m68ki_write_8(m68k, ea, data); + uint32_t ea = EA_AY_DI_8(); + m68ki_write_8(ea, data); break; } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_8(m68k); - m68ki_write_8(m68k, ea, data); + uint32_t ea = EA_AY_IX_8(); + m68ki_write_8(ea, data); break; } case 7: @@ -849,27 +846,27 @@ static void WRITE_EA_8(m68000_base_device *m68k, int ea, uint8_t data) { case 1: // (xxx).B { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - m68ki_write_8(m68k, ea, data); + m68ki_write_8(ea, data); break; } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_16(m68k); - m68ki_write_8(m68k, ea, data); + uint32_t ea = EA_PCDI_16(); + m68ki_write_8(ea, data); break; } - default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, m_pc); } } -static void WRITE_EA_16(m68000_base_device *m68k, int ea, uint16_t data) +void WRITE_EA_16(int ea, uint16_t data) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -878,37 +875,37 @@ static void WRITE_EA_16(m68000_base_device *m68k, int ea, uint16_t data) { case 0: // Dn { - REG_D(m68k)[reg] = data; + REG_D()[reg] = data; break; } case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - m68ki_write_16(m68k, ea, data); + uint32_t ea = REG_A()[reg]; + m68ki_write_16(ea, data); break; } case 3: // (An)+ { - uint32_t ea = EA_AY_PI_16(m68k); - m68ki_write_16(m68k, ea, data); + uint32_t ea = EA_AY_PI_16(); + m68ki_write_16(ea, data); break; } case 4: // -(An) { - uint32_t ea = EA_AY_PD_16(m68k); - m68ki_write_16(m68k, ea, data); + uint32_t ea = EA_AY_PD_16(); + m68ki_write_16(ea, data); break; } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_16(m68k); - m68ki_write_16(m68k, ea, data); + uint32_t ea = EA_AY_DI_16(); + m68ki_write_16(ea, data); break; } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_16(m68k); - m68ki_write_16(m68k, ea, data); + uint32_t ea = EA_AY_IX_16(); + m68ki_write_16(ea, data); break; } case 7: @@ -917,27 +914,27 @@ static void WRITE_EA_16(m68000_base_device *m68k, int ea, uint16_t data) { case 1: // (xxx).W { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - m68ki_write_16(m68k, ea, data); + m68ki_write_16(ea, data); break; } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_16(m68k); - m68ki_write_16(m68k, ea, data); + uint32_t ea = EA_PCDI_16(); + m68ki_write_16(ea, data); break; } - default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, m_pc); } } -static void WRITE_EA_32(m68000_base_device *m68k, int ea, uint32_t data) +void WRITE_EA_32(int ea, uint32_t data) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -946,42 +943,42 @@ static void WRITE_EA_32(m68000_base_device *m68k, int ea, uint32_t data) { case 0: // Dn { - REG_D(m68k)[reg] = data; + REG_D()[reg] = data; break; } case 1: // An { - REG_A(m68k)[reg] = data; + REG_A()[reg] = data; break; } case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - m68ki_write_32(m68k, ea, data); + uint32_t ea = REG_A()[reg]; + m68ki_write_32(ea, data); break; } case 3: // (An)+ { - uint32_t ea = EA_AY_PI_32(m68k); - m68ki_write_32(m68k, ea, data); + uint32_t ea = EA_AY_PI_32(); + m68ki_write_32(ea, data); break; } case 4: // -(An) { - uint32_t ea = EA_AY_PD_32(m68k); - m68ki_write_32(m68k, ea, data); + uint32_t ea = EA_AY_PD_32(); + m68ki_write_32(ea, data); break; } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_32(m68k); - m68ki_write_32(m68k, ea, data); + uint32_t ea = EA_AY_DI_32(); + m68ki_write_32(ea, data); break; } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_32(m68k); - m68ki_write_32(m68k, ea, data); + uint32_t ea = EA_AY_IX_32(); + m68ki_write_32(ea, data); break; } case 7: @@ -990,33 +987,33 @@ static void WRITE_EA_32(m68000_base_device *m68k, int ea, uint32_t data) { case 0: // (xxx).W { - uint32_t ea = OPER_I_16(m68k); - m68ki_write_32(m68k, ea, data); + uint32_t ea = OPER_I_16(); + m68ki_write_32(ea, data); break; } case 1: // (xxx).L { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - m68ki_write_32(m68k, ea, data); + m68ki_write_32(ea, data); break; } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_32(m68k); - m68ki_write_32(m68k, ea, data); + uint32_t ea = EA_PCDI_32(); + m68ki_write_32(ea, data); break; } - default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, m_pc); } } -static void WRITE_EA_64(m68000_base_device *m68k, int ea, uint64_t data) +void WRITE_EA_64(int ea, uint64_t data) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -1025,40 +1022,40 @@ static void WRITE_EA_64(m68000_base_device *m68k, int ea, uint64_t data) { case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - m68ki_write_32(m68k, ea, (uint32_t)(data >> 32)); - m68ki_write_32(m68k, ea+4, (uint32_t)(data)); + uint32_t ea = REG_A()[reg]; + m68ki_write_32(ea, (uint32_t)(data >> 32)); + m68ki_write_32(ea+4, (uint32_t)(data)); break; } case 3: // (An)+ { - uint32_t ea = REG_A(m68k)[reg]; - REG_A(m68k)[reg] += 8; - m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32)); - m68ki_write_32(m68k, ea+4, (uint32_t)(data)); + uint32_t ea = REG_A()[reg]; + REG_A()[reg] += 8; + m68ki_write_32(ea+0, (uint32_t)(data >> 32)); + m68ki_write_32(ea+4, (uint32_t)(data)); break; } case 4: // -(An) { uint32_t ea; - REG_A(m68k)[reg] -= 8; - ea = REG_A(m68k)[reg]; - m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32)); - m68ki_write_32(m68k, ea+4, (uint32_t)(data)); + REG_A()[reg] -= 8; + ea = REG_A()[reg]; + m68ki_write_32(ea+0, (uint32_t)(data >> 32)); + m68ki_write_32(ea+4, (uint32_t)(data)); break; } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_32(m68k); - m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32)); - m68ki_write_32(m68k, ea+4, (uint32_t)(data)); + uint32_t ea = EA_AY_DI_32(); + m68ki_write_32(ea+0, (uint32_t)(data >> 32)); + m68ki_write_32(ea+4, (uint32_t)(data)); break; } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_32(m68k); - m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32)); - m68ki_write_32(m68k, ea+4, (uint32_t)(data)); + uint32_t ea = EA_AY_IX_32(); + m68ki_write_32(ea+0, (uint32_t)(data >> 32)); + m68ki_write_32(ea+4, (uint32_t)(data)); break; } case 7: @@ -1067,29 +1064,29 @@ static void WRITE_EA_64(m68000_base_device *m68k, int ea, uint64_t data) { case 1: // (xxx).L { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32)); - m68ki_write_32(m68k, ea+4, (uint32_t)(data)); + m68ki_write_32(ea+0, (uint32_t)(data >> 32)); + m68ki_write_32(ea+4, (uint32_t)(data)); break; } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_32(m68k); - m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32)); - m68ki_write_32(m68k, ea+4, (uint32_t)(data)); + uint32_t ea = EA_PCDI_32(); + m68ki_write_32(ea+0, (uint32_t)(data >> 32)); + m68ki_write_32(ea+4, (uint32_t)(data)); break; } - default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d, data %08X%08X at %08X\n", mode, reg, (uint32_t)(data >> 32), (uint32_t)(data), REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d, data %08X%08X at %08X\n", mode, reg, (uint32_t)(data >> 32), (uint32_t)(data), m_pc); } } -static void WRITE_EA_FPE(m68000_base_device *m68k, int ea, floatx80 fpr) +void WRITE_EA_FPE(int ea, floatx80 fpr) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -1099,26 +1096,26 @@ static void WRITE_EA_FPE(m68000_base_device *m68k, int ea, floatx80 fpr) case 2: // (An) { uint32_t ea; - ea = REG_A(m68k)[reg]; - store_extended_float80(m68k, ea, fpr); + ea = REG_A()[reg]; + store_extended_float80(ea, fpr); break; } case 3: // (An)+ { uint32_t ea; - ea = REG_A(m68k)[reg]; - store_extended_float80(m68k, ea, fpr); - REG_A(m68k)[reg] += 12; + ea = REG_A()[reg]; + store_extended_float80(ea, fpr); + REG_A()[reg] += 12; break; } case 4: // -(An) { uint32_t ea; - REG_A(m68k)[reg] -= 12; - ea = REG_A(m68k)[reg]; - store_extended_float80(m68k, ea, fpr); + REG_A()[reg] -= 12; + ea = REG_A()[reg]; + store_extended_float80(ea, fpr); break; } @@ -1126,14 +1123,14 @@ static void WRITE_EA_FPE(m68000_base_device *m68k, int ea, floatx80 fpr) { switch (reg) { - default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); } } - default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); } } -static void WRITE_EA_PACK(m68000_base_device *m68k, int ea, int k, floatx80 fpr) +void WRITE_EA_PACK(int ea, int k, floatx80 fpr) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -1143,26 +1140,26 @@ static void WRITE_EA_PACK(m68000_base_device *m68k, int ea, int k, floatx80 fpr) case 2: // (An) { uint32_t ea; - ea = REG_A(m68k)[reg]; - store_pack_float80(m68k, ea, k, fpr); + ea = REG_A()[reg]; + store_pack_float80(ea, k, fpr); break; } case 3: // (An)+ { uint32_t ea; - ea = REG_A(m68k)[reg]; - store_pack_float80(m68k, ea, k, fpr); - REG_A(m68k)[reg] += 12; + ea = REG_A()[reg]; + store_pack_float80(ea, k, fpr); + REG_A()[reg] += 12; break; } case 4: // -(An) { uint32_t ea; - REG_A(m68k)[reg] -= 12; - ea = REG_A(m68k)[reg]; - store_pack_float80(m68k, ea, k, fpr); + REG_A()[reg] -= 12; + ea = REG_A()[reg]; + store_pack_float80(ea, k, fpr); break; } @@ -1170,16 +1167,16 @@ static void WRITE_EA_PACK(m68000_base_device *m68k, int ea, int k, floatx80 fpr) { switch (reg) { - default: fatalerror("M68kFPU: WRITE_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); } } - default: fatalerror("M68kFPU: WRITE_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); } } -static void fpgen_rm_reg(m68000_base_device *m68k, uint16_t w2) +void fpgen_rm_reg(uint16_t w2) { - int ea = m68k->ir & 0x3f; + int ea = m_ir & 0x3f; int rm = (w2 >> 14) & 0x1; int src = (w2 >> 10) & 0x7; int dst = (w2 >> 7) & 0x7; @@ -1194,42 +1191,42 @@ static void fpgen_rm_reg(m68000_base_device *m68k, uint16_t w2) { case 0: // Long-Word Integer { - int32_t d = READ_EA_32(m68k, ea); + int32_t d = READ_EA_32(ea); source = int32_to_floatx80(d); break; } case 1: // Single-precision Real { - uint32_t d = READ_EA_32(m68k, ea); + uint32_t d = READ_EA_32(ea); source = float32_to_floatx80(d); break; } case 2: // Extended-precision Real { - source = READ_EA_FPE(m68k, ea); + source = READ_EA_FPE(ea); break; } case 3: // Packed-decimal Real { - source = READ_EA_PACK(m68k, ea); + source = READ_EA_PACK(ea); break; } case 4: // Word Integer { - int16_t d = READ_EA_16(m68k, ea); + int16_t d = READ_EA_16(ea); source = int32_to_floatx80((int32_t)d); break; } case 5: // Double-precision Real { - uint64_t d = READ_EA_64(m68k, ea); + uint64_t d = READ_EA_64(ea); source = float64_to_floatx80(d); break; } case 6: // Byte Integer { - int8_t d = READ_EA_8(m68k, ea); + int8_t d = READ_EA_8(ea); source = int32_to_floatx80((int32_t)d); break; } @@ -1342,21 +1339,21 @@ static void fpgen_rm_reg(m68000_base_device *m68k, uint16_t w2) break; default: - fatalerror("fmove_rm_reg: unknown constant ROM offset %x at %08x\n", w2&0x7f, REG_PC(m68k)-4); + fatalerror("fmove_rm_reg: unknown constant ROM offset %x at %08x\n", w2&0x7f, m_pc-4); break; } // handle it right here, the usual opmode bits aren't valid in the FMOVECR case - REG_FP(m68k)[dst] = source; - m68k->remaining_cycles -= 4; + m_fpr[dst] = source; + m_remaining_cycles -= 4; return; } - default: fatalerror("fmove_rm_reg: invalid source specifier %x at %08X\n", src, REG_PC(m68k)-4); + default: fatalerror("fmove_rm_reg: invalid source specifier %x at %08X\n", src, m_pc-4); } } else { - source = REG_FP(m68k)[src]; + source = m_fpr[src]; } @@ -1365,98 +1362,98 @@ static void fpgen_rm_reg(m68000_base_device *m68k, uint16_t w2) { case 0x00: // FMOVE { - REG_FP(m68k)[dst] = source; - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 4; + m_fpr[dst] = source; + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 4; break; } case 0x01: // FINT { int32_t temp; temp = floatx80_to_int32(source); - REG_FP(m68k)[dst] = int32_to_floatx80(temp); + m_fpr[dst] = int32_to_floatx80(temp); break; } case 0x03: // FINTRZ { int32_t temp; temp = floatx80_to_int32_round_to_zero(source); - REG_FP(m68k)[dst] = int32_to_floatx80(temp); + m_fpr[dst] = int32_to_floatx80(temp); break; } case 0x04: // FSQRT { - REG_FP(m68k)[dst] = floatx80_sqrt(source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 109; + m_fpr[dst] = floatx80_sqrt(source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 109; break; } case 0x06: // FLOGNP1 { - REG_FP(m68k)[dst] = floatx80_flognp1 (source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 594; // for MC68881 + m_fpr[dst] = floatx80_flognp1 (source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 594; // for MC68881 break; } case 0x0e: // FSIN { - REG_FP(m68k)[dst] = source; - floatx80_fsin(REG_FP(m68k)[dst]); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 75; + m_fpr[dst] = source; + floatx80_fsin(m_fpr[dst]); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 75; break; } case 0x0f: // FTAN { - REG_FP(m68k)[dst] = source; - floatx80_ftan(REG_FP(m68k)[dst]); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 75; + m_fpr[dst] = source; + floatx80_ftan(m_fpr[dst]); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 75; break; } case 0x14: // FLOGN { - REG_FP(m68k)[dst] = floatx80_flogn (source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 548; // for MC68881 + m_fpr[dst] = floatx80_flogn (source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 548; // for MC68881 break; } case 0x15: // FLOG10 { - REG_FP(m68k)[dst] = floatx80_flog10 (source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 604; // for MC68881 + m_fpr[dst] = floatx80_flog10 (source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 604; // for MC68881 break; } case 0x16: // FLOG2 { - REG_FP(m68k)[dst] = floatx80_flog2 (source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 604; // for MC68881 + m_fpr[dst] = floatx80_flog2 (source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 604; // for MC68881 break; } case 0x18: // FABS { - REG_FP(m68k)[dst] = source; - REG_FP(m68k)[dst].high &= 0x7fff; - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 3; + m_fpr[dst] = source; + m_fpr[dst].high &= 0x7fff; + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 3; break; } case 0x1a: // FNEG { - REG_FP(m68k)[dst] = source; - REG_FP(m68k)[dst].high ^= 0x8000; - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 3; + m_fpr[dst] = source; + m_fpr[dst].high ^= 0x8000; + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 3; break; } case 0x1d: // FCOS { - REG_FP(m68k)[dst] = source; - floatx80_fcos(REG_FP(m68k)[dst]); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 75; + m_fpr[dst] = source; + floatx80_fcos(m_fpr[dst]); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 75; break; } case 0x1e: // FGETEXP @@ -1465,93 +1462,93 @@ static void fpgen_rm_reg(m68000_base_device *m68k, uint16_t w2) temp2 = source.high; // get the exponent temp2 -= 0x3fff; // take off the bias - REG_FP(m68k)[dst] = double_to_fx80((double)temp2); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 6; + m_fpr[dst] = double_to_fx80((double)temp2); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 6; break; } case 0x20: // FDIV { - REG_FP(m68k)[dst] = floatx80_div(REG_FP(m68k)[dst], source); - m68k->remaining_cycles -= 43; + m_fpr[dst] = floatx80_div(m_fpr[dst], source); + m_remaining_cycles -= 43; break; } case 0x22: // FADD { - REG_FP(m68k)[dst] = floatx80_add(REG_FP(m68k)[dst], source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 9; + m_fpr[dst] = floatx80_add(m_fpr[dst], source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 9; break; } case 0x23: // FMUL { - REG_FP(m68k)[dst] = floatx80_mul(REG_FP(m68k)[dst], source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 11; + m_fpr[dst] = floatx80_mul(m_fpr[dst], source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 11; break; } case 0x24: // FSGLDIV { - float32 a = floatx80_to_float32( REG_FP(m68k)[dst] ); + float32 a = floatx80_to_float32( m_fpr[dst] ); float32 b = floatx80_to_float32( source ); - REG_FP(m68k)[dst] = float32_to_floatx80( float32_div(a, b) ); - m68k->remaining_cycles -= 43; // // ? (value is from FDIV) + m_fpr[dst] = float32_to_floatx80( float32_div(a, b) ); + m_remaining_cycles -= 43; // // ? (value is from FDIV) break; } case 0x25: // FREM { - REG_FP(m68k)[dst] = floatx80_rem(REG_FP(m68k)[dst], source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 43; // guess + m_fpr[dst] = floatx80_rem(m_fpr[dst], source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 43; // guess break; } case 0x26: // FSCALE { - REG_FP(m68k)[dst] = floatx80_scale(REG_FP(m68k)[dst], source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 46; // (better?) guess + m_fpr[dst] = floatx80_scale(m_fpr[dst], source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 46; // (better?) guess break; } case 0x27: // FSGLMUL { - float32 a = floatx80_to_float32( REG_FP(m68k)[dst] ); + float32 a = floatx80_to_float32( m_fpr[dst] ); float32 b = floatx80_to_float32( source ); - REG_FP(m68k)[dst] = float32_to_floatx80( float32_mul(a, b) ); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 11; // ? (value is from FMUL) + m_fpr[dst] = float32_to_floatx80( float32_mul(a, b) ); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 11; // ? (value is from FMUL) break; } case 0x28: // FSUB { - REG_FP(m68k)[dst] = floatx80_sub(REG_FP(m68k)[dst], source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 9; + m_fpr[dst] = floatx80_sub(m_fpr[dst], source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 9; break; } case 0x38: // FCMP { floatx80 res; - res = floatx80_sub(REG_FP(m68k)[dst], source); - SET_CONDITION_CODES(m68k, res); - m68k->remaining_cycles -= 7; + res = floatx80_sub(m_fpr[dst], source); + SET_CONDITION_CODES(res); + m_remaining_cycles -= 7; break; } case 0x3a: // FTST { floatx80 res; res = source; - SET_CONDITION_CODES(m68k, res); - m68k->remaining_cycles -= 7; + SET_CONDITION_CODES(res); + m_remaining_cycles -= 7; break; } - default: fatalerror("fpgen_rm_reg: unimplemented opmode %02X at %08X\n", opmode, REG_PPC(m68k)); + default: fatalerror("fpgen_rm_reg: unimplemented opmode %02X at %08X\n", opmode, m_ppc); } } -static void fmove_reg_mem(m68000_base_device *m68k, uint16_t w2) +void fmove_reg_mem(uint16_t w2) { - int ea = m68k->ir & 0x3f; + int ea = m_ir & 0x3f; int src = (w2 >> 7) & 0x7; int dst = (w2 >> 10) & 0x7; int k = (w2 & 0x7f); @@ -1560,70 +1557,70 @@ static void fmove_reg_mem(m68000_base_device *m68k, uint16_t w2) { case 0: // Long-Word Integer { - int32_t d = (int32_t)floatx80_to_int32(REG_FP(m68k)[src]); - WRITE_EA_32(m68k, ea, d); + int32_t d = (int32_t)floatx80_to_int32(m_fpr[src]); + WRITE_EA_32(ea, d); break; } case 1: // Single-precision Real { - uint32_t d = floatx80_to_float32(REG_FP(m68k)[src]); - WRITE_EA_32(m68k, ea, d); + uint32_t d = floatx80_to_float32(m_fpr[src]); + WRITE_EA_32(ea, d); break; } case 2: // Extended-precision Real { - WRITE_EA_FPE(m68k, ea, REG_FP(m68k)[src]); + WRITE_EA_FPE(ea, m_fpr[src]); break; } case 3: // Packed-decimal Real with Static K-factor { // sign-extend k k = (k & 0x40) ? (k | 0xffffff80) : (k & 0x7f); - WRITE_EA_PACK(m68k, ea, k, REG_FP(m68k)[src]); + WRITE_EA_PACK(ea, k, m_fpr[src]); break; } case 4: // Word Integer { - int32 value = floatx80_to_int32(REG_FP(m68k)[src]); + int32 value = floatx80_to_int32(m_fpr[src]); if (value > 0x7fff || value < -0x8000 ) { - REG_FPSR(m68k) |= FPES_OE | FPAE_IOP; + m_fpsr |= FPES_OE | FPAE_IOP; } - WRITE_EA_16(m68k, ea, (int16_t)value); + WRITE_EA_16(ea, (int16_t)value); break; } case 5: // Double-precision Real { uint64_t d; - d = floatx80_to_float64(REG_FP(m68k)[src]); + d = floatx80_to_float64(m_fpr[src]); - WRITE_EA_64(m68k, ea, d); + WRITE_EA_64(ea, d); break; } case 6: // Byte Integer { - int32 value = floatx80_to_int32(REG_FP(m68k)[src]); + int32 value = floatx80_to_int32(m_fpr[src]); if (value > 127 || value < -128) { - REG_FPSR(m68k) |= FPES_OE | FPAE_IOP; + m_fpsr |= FPES_OE | FPAE_IOP; } - WRITE_EA_8(m68k, ea, (int8_t) value); + WRITE_EA_8(ea, (int8_t) value); break; } case 7: // Packed-decimal Real with Dynamic K-factor { - WRITE_EA_PACK(m68k, ea, REG_D(m68k)[k>>4], REG_FP(m68k)[src]); + WRITE_EA_PACK(ea, REG_D()[k>>4], m_fpr[src]); break; } } - m68k->remaining_cycles -= 12; + m_remaining_cycles -= 12; } -static void fmove_fpcr(m68000_base_device *m68k, uint16_t w2) +void fmove_fpcr(uint16_t w2) { - int ea = m68k->ir & 0x3f; + int ea = m_ir & 0x3f; int dir = (w2 >> 13) & 0x1; int regsel = (w2 >> 10) & 0x7; int mode = (ea >> 3) & 0x7; @@ -1634,39 +1631,39 @@ static void fmove_fpcr(m68000_base_device *m68k, uint16_t w2) if (mode == 5) { - address = EA_AY_DI_32(m68k); + address = EA_AY_DI_32(); } else if (mode == 6) { - address = EA_AY_IX_32(m68k); + address = EA_AY_IX_32(); } if (dir) // From system control reg to <ea> { - if (regsel & 4) { m68ki_write_32(m68k, address, REG_FPCR(m68k)); address += 4; } - if (regsel & 2) { m68ki_write_32(m68k, address, REG_FPSR(m68k)); address += 4; } - if (regsel & 1) { m68ki_write_32(m68k, address, REG_FPIAR(m68k)); address += 4; } + if (regsel & 4) { m68ki_write_32(address, m_fpcr); address += 4; } + if (regsel & 2) { m68ki_write_32(address, m_fpsr); address += 4; } + if (regsel & 1) { m68ki_write_32(address, m_fpiar); address += 4; } } else // From <ea> to system control reg { - if (regsel & 4) { REG_FPCR(m68k) = m68ki_read_32(m68k, address); address += 4; } - if (regsel & 2) { REG_FPSR(m68k) = m68ki_read_32(m68k, address); address += 4; } - if (regsel & 1) { REG_FPIAR(m68k) = m68ki_read_32(m68k, address); address += 4; } + if (regsel & 4) { m_fpcr = m68ki_read_32(address); address += 4; } + if (regsel & 2) { m_fpsr = m68ki_read_32(address); address += 4; } + if (regsel & 1) { m_fpiar = m68ki_read_32(address); address += 4; } } } else { if (dir) // From system control reg to <ea> { - if (regsel & 4) WRITE_EA_32(m68k, ea, REG_FPCR(m68k)); - if (regsel & 2) WRITE_EA_32(m68k, ea, REG_FPSR(m68k)); - if (regsel & 1) WRITE_EA_32(m68k, ea, REG_FPIAR(m68k)); + if (regsel & 4) WRITE_EA_32(ea, m_fpcr); + if (regsel & 2) WRITE_EA_32(ea, m_fpsr); + if (regsel & 1) WRITE_EA_32(ea, m_fpiar); } else // From <ea> to system control reg { - if (regsel & 4) REG_FPCR(m68k) = READ_EA_32(m68k, ea); - if (regsel & 2) REG_FPSR(m68k) = READ_EA_32(m68k, ea); - if (regsel & 1) REG_FPIAR(m68k) = READ_EA_32(m68k, ea); + if (regsel & 4) m_fpcr = READ_EA_32(ea); + if (regsel & 2) m_fpsr = READ_EA_32(ea); + if (regsel & 1) m_fpiar = READ_EA_32(ea); } } @@ -1678,10 +1675,10 @@ static void fmove_fpcr(m68000_base_device *m68k, uint16_t w2) if ((regsel & 4) && dir == 0) { - int rnd = (REG_FPCR(m68k) >> 4) & 3; - int prec = (REG_FPCR(m68k) >> 6) & 3; + int rnd = (m_fpcr >> 4) & 3; + int prec = (m_fpcr >> 6) & 3; -// m68k->logerror("m68k_fpsp:fmove_fpcr fpcr=%04x prec=%d rnd=%d\n", REG_FPCR(m68k), prec, rnd); +// logerror("m68k_fpsp:fmove_fpcr fpcr=%04x prec=%d rnd=%d\n", m_fpcr, prec, rnd); #ifdef FLOATX80 switch (prec) @@ -1718,13 +1715,13 @@ static void fmove_fpcr(m68000_base_device *m68k, uint16_t w2) } } - m68k->remaining_cycles -= 10; + m_remaining_cycles -= 10; } -static void fmovem(m68000_base_device *m68k, uint16_t w2) +void fmovem(uint16_t w2) { int i; - int ea = m68k->ir & 0x3f; + int ea = m_ir & 0x3f; int dir = (w2 >> 13) & 0x1; int mode = (w2 >> 11) & 0x3; int reglist = w2 & 0xff; @@ -1733,10 +1730,10 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2) switch (ea >> 3) { case 5: // (d16, An) - mem_addr= EA_AY_DI_32(m68k); + mem_addr= EA_AY_DI_32(); break; case 6: // (An) + (Xn) + d8 - mem_addr= EA_AY_IX_32(m68k); + mem_addr= EA_AY_IX_32(); break; } @@ -1746,7 +1743,7 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2) { case 1: // Dynamic register list, postincrement or control addressing mode. // FIXME: not really tested, but seems to work - reglist = REG_D(m68k)[(reglist >> 4) & 7]; + reglist = REG_D()[(reglist >> 4) & 7]; case 0: // Static register list, predecrement or control addressing mode { @@ -1758,15 +1755,15 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2) { case 5: // (d16, An) case 6: // (An) + (Xn) + d8 - store_extended_float80(m68k, mem_addr, REG_FP(m68k)[i]); + store_extended_float80(mem_addr, m_fpr[i]); mem_addr += 12; break; default: - WRITE_EA_FPE(m68k, ea, REG_FP(m68k)[i]); + WRITE_EA_FPE(ea, m_fpr[i]); break; } - m68k->remaining_cycles -= 2; + m_remaining_cycles -= 2; } } break; @@ -1782,21 +1779,21 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2) { case 5: // (d16, An) case 6: // (An) + (Xn) + d8 - store_extended_float80(m68k, mem_addr, REG_FP(m68k)[7-i]); + store_extended_float80(mem_addr, m_fpr[7-i]); mem_addr += 12; break; default: - WRITE_EA_FPE(m68k, ea, REG_FP(m68k)[7-i]); + WRITE_EA_FPE(ea, m_fpr[7-i]); break; } - m68k->remaining_cycles -= 2; + m_remaining_cycles -= 2; } } break; } - default: fatalerror("M680x0: FMOVEM: mode %d unimplemented at %08X\n", mode, REG_PC(m68k)-4); + default: fatalerror("M680x0: FMOVEM: mode %d unimplemented at %08X\n", mode, m_pc-4); } } else // From mem to FP regs @@ -1805,7 +1802,7 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2) { case 3: // Dynamic register list, predecrement addressing mode. // FIXME: not really tested, but seems to work - reglist = REG_D(m68k)[(reglist >> 4) & 7]; + reglist = REG_D()[(reglist >> 4) & 7]; case 2: // Static register list, postincrement or control addressing mode { @@ -1817,151 +1814,151 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2) { case 5: // (d16, An) case 6: // (An) + (Xn) + d8 - REG_FP(m68k)[7-i] = load_extended_float80(m68k, mem_addr); + m_fpr[7-i] = load_extended_float80(mem_addr); mem_addr += 12; break; default: - REG_FP(m68k)[7-i] = READ_EA_FPE(m68k, ea); + m_fpr[7-i] = READ_EA_FPE(ea); break; } - m68k->remaining_cycles -= 2; + m_remaining_cycles -= 2; } } break; } - default: fatalerror("M680x0: FMOVEM: mode %d unimplemented at %08X\n", mode, REG_PC(m68k)-4); + default: fatalerror("M680x0: FMOVEM: mode %d unimplemented at %08X\n", mode, m_pc-4); } } } -static void fscc(m68000_base_device *m68k) +void fscc() { - int ea = m68k->ir & 0x3f; - int condition = (int16_t)(OPER_I_16(m68k)); + int ea = m_ir & 0x3f; + int condition = (int16_t)(OPER_I_16()); - WRITE_EA_8(m68k, ea, TEST_CONDITION(m68k, condition) ? 0xff : 0); - m68k->remaining_cycles -= 7; // ??? + WRITE_EA_8(ea, TEST_CONDITION(condition) ? 0xff : 0); + m_remaining_cycles -= 7; // ??? } -static void fbcc16(m68000_base_device *m68k) +void fbcc16() { int32_t offset; - int condition = m68k->ir & 0x3f; + int condition = m_ir & 0x3f; - offset = (int16_t)(OPER_I_16(m68k)); + offset = (int16_t)(OPER_I_16()); // TODO: condition and jump!!! - if (TEST_CONDITION(m68k, condition)) + if (TEST_CONDITION(condition)) { - m68ki_trace_t0(m68k); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_16(m68k, offset-2); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset-2); } - m68k->remaining_cycles -= 7; + m_remaining_cycles -= 7; } -static void fbcc32(m68000_base_device *m68k) +void fbcc32() { int32_t offset; - int condition = m68k->ir & 0x3f; + int condition = m_ir & 0x3f; - offset = OPER_I_32(m68k); + offset = OPER_I_32(); // TODO: condition and jump!!! - if (TEST_CONDITION(m68k, condition)) + if (TEST_CONDITION(condition)) { - m68ki_trace_t0(m68k); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_32(m68k, offset-4); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset-4); } - m68k->remaining_cycles -= 7; + m_remaining_cycles -= 7; } -void m68040_fpu_op0(m68000_base_device *m68k) +void m68040_fpu_op0() { - m68k->fpu_just_reset = 0; + m_fpu_just_reset = 0; - switch ((m68k->ir >> 6) & 0x3) + switch ((m_ir >> 6) & 0x3) { case 0: { - uint16_t w2 = OPER_I_16(m68k); + uint16_t w2 = OPER_I_16(); switch ((w2 >> 13) & 0x7) { case 0x0: // FPU ALU FP, FP case 0x2: // FPU ALU ea, FP { - fpgen_rm_reg(m68k, w2); + fpgen_rm_reg(w2); break; } case 0x3: // FMOVE FP, ea { - fmove_reg_mem(m68k, w2); + fmove_reg_mem(w2); break; } case 0x4: // FMOVEM ea, FPCR case 0x5: // FMOVEM FPCR, ea { - fmove_fpcr(m68k, w2); + fmove_fpcr(w2); break; } case 0x6: // FMOVEM ea, list case 0x7: // FMOVEM list, ea { - fmovem(m68k, w2); + fmovem(w2); break; } - default: fatalerror("M68kFPU: unimplemented subop %d at %08X\n", (w2 >> 13) & 0x7, REG_PC(m68k)-4); + default: fatalerror("M68kFPU: unimplemented subop %d at %08X\n", (w2 >> 13) & 0x7, m_pc-4); } break; } case 1: // FBcc disp16 { - switch ((m68k->ir >> 3) & 0x7) { + switch ((m_ir >> 3) & 0x7) { case 1: // FDBcc // TODO: break; default: // FScc (?) - fscc(m68k); + fscc(); return; } - fatalerror("M68kFPU: unimplemented main op %d with mode %d at %08X\n", (m68k->ir >> 6) & 0x3, (m68k->ir >> 3) & 0x7, REG_PPC(m68k)); + fatalerror("M68kFPU: unimplemented main op %d with mode %d at %08X\n", (m_ir >> 6) & 0x3, (m_ir >> 3) & 0x7, m_ppc); } case 2: // FBcc disp16 { - fbcc16(m68k); + fbcc16(); break; } case 3: // FBcc disp32 { - fbcc32(m68k); + fbcc32(); break; } - default: fatalerror("M68kFPU: unimplemented main op %d\n", (m68k->ir >> 6) & 0x3); + default: fatalerror("M68kFPU: unimplemented main op %d\n", (m_ir >> 6) & 0x3); } } -static int perform_fsave(m68000_base_device *m68k, uint32_t addr, int inc) +int perform_fsave(uint32_t addr, int inc) { - if(m68k->cpu_type & CPU_TYPE_040) + if(m_cpu_type & CPU_TYPE_040) { if(inc) { - m68ki_write_32(m68k, addr, 0x41000000); + m68ki_write_32(addr, 0x41000000); return 4; } else { - m68ki_write_32(m68k, addr-4, 0x41000000); + m68ki_write_32(addr-4, 0x41000000); return -4; } } @@ -1969,131 +1966,131 @@ static int perform_fsave(m68000_base_device *m68k, uint32_t addr, int inc) if (inc) { // 68881 IDLE, version 0x1f - m68ki_write_32(m68k, addr, 0x1f180000); - m68ki_write_32(m68k, addr+4, 0); - m68ki_write_32(m68k, addr+8, 0); - m68ki_write_32(m68k, addr+12, 0); - m68ki_write_32(m68k, addr+16, 0); - m68ki_write_32(m68k, addr+20, 0); - m68ki_write_32(m68k, addr+24, 0x70000000); + m68ki_write_32(addr, 0x1f180000); + m68ki_write_32(addr+4, 0); + m68ki_write_32(addr+8, 0); + m68ki_write_32(addr+12, 0); + m68ki_write_32(addr+16, 0); + m68ki_write_32(addr+20, 0); + m68ki_write_32(addr+24, 0x70000000); return 7*4; } else { - m68ki_write_32(m68k, addr-4, 0x70000000); - m68ki_write_32(m68k, addr-8, 0); - m68ki_write_32(m68k, addr-12, 0); - m68ki_write_32(m68k, addr-16, 0); - m68ki_write_32(m68k, addr-20, 0); - m68ki_write_32(m68k, addr-24, 0); - m68ki_write_32(m68k, addr-28, 0x1f180000); + m68ki_write_32(addr-4, 0x70000000); + m68ki_write_32(addr-8, 0); + m68ki_write_32(addr-12, 0); + m68ki_write_32(addr-16, 0); + m68ki_write_32(addr-20, 0); + m68ki_write_32(addr-24, 0); + m68ki_write_32(addr-28, 0x1f180000); return -7*4; } } // FRESTORE on a nullptr frame reboots the FPU - all registers to NaN, the 3 status regs to 0 -static void do_frestore_null(m68000_base_device *m68k) +void do_frestore_null() { int i; - REG_FPCR(m68k) = 0; - REG_FPSR(m68k) = 0; - REG_FPIAR(m68k) = 0; + m_fpcr = 0; + m_fpsr = 0; + m_fpiar = 0; for (i = 0; i < 8; i++) { - REG_FP(m68k)[i].high = 0x7fff; - REG_FP(m68k)[i].low = 0xffffffffffffffffU; + m_fpr[i].high = 0x7fff; + m_fpr[i].low = 0xffffffffffffffffU; } // Mac IIci at 408458e6 wants an FSAVE of a just-restored nullptr frame to also be nullptr // The PRM says it's possible to generate a nullptr frame, but not how/when/why. (need the 68881/68882 manual!) - m68k->fpu_just_reset = 1; + m_fpu_just_reset = 1; } -static void m68040_do_fsave(m68000_base_device *m68k, uint32_t addr, int reg, int inc) +void m68040_do_fsave(uint32_t addr, int reg, int inc) { - if (m68k->fpu_just_reset) + if (m_fpu_just_reset) { - m68ki_write_32(m68k, addr, 0); + m68ki_write_32(addr, 0); } else { // we normally generate an IDLE frame - int delta = perform_fsave(m68k, addr, inc); + int delta = perform_fsave(addr, inc); if(reg != -1) - REG_A(m68k)[reg] += delta; + REG_A()[reg] += delta; } } -static void m68040_do_frestore(m68000_base_device *m68k, uint32_t addr, int reg) +void m68040_do_frestore(uint32_t addr, int reg) { - bool m40 = m68k->cpu_type & CPU_TYPE_040; - uint32_t temp = m68ki_read_32(m68k, addr); + bool m40 = m_cpu_type & CPU_TYPE_040; + uint32_t temp = m68ki_read_32(addr); // check for nullptr frame if (temp & 0xff000000) { // we don't handle non-nullptr frames - m68k->fpu_just_reset = 0; + m_fpu_just_reset = 0; if (reg != -1) { // how about an IDLE frame? if (!m40 && ((temp & 0x00ff0000) == 0x00180000)) { - REG_A(m68k)[reg] += 7*4; + REG_A()[reg] += 7*4; } else if (m40 && ((temp & 0xffff0000) == 0x41000000)) { - REG_A(m68k)[reg] += 4; + REG_A()[reg] += 4; } // check UNIMP else if ((temp & 0x00ff0000) == 0x00380000) { - REG_A(m68k)[reg] += 14*4; + REG_A()[reg] += 14*4; } // check BUSY else if ((temp & 0x00ff0000) == 0x00b40000) { - REG_A(m68k)[reg] += 45*4; + REG_A()[reg] += 45*4; } } } else { - do_frestore_null(m68k); + do_frestore_null(); } } -void m68040_fpu_op1(m68000_base_device *m68k) +void m68040_fpu_op1() { - int ea = m68k->ir & 0x3f; + int ea = m_ir & 0x3f; int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); uint32_t addr; - switch ((m68k->ir >> 6) & 0x3) + switch ((m_ir >> 6) & 0x3) { case 0: // FSAVE <ea> { switch (mode) { case 2: // (An) - addr = REG_A(m68k)[reg]; - m68040_do_fsave(m68k, addr, -1, 1); + addr = REG_A()[reg]; + m68040_do_fsave(addr, -1, 1); break; case 3: // (An)+ - addr = EA_AY_PI_32(m68k); - m68040_do_fsave(m68k, addr, reg, 1); + addr = EA_AY_PI_32(); + m68040_do_fsave(addr, reg, 1); break; case 4: // -(An) - addr = EA_AY_PD_32(m68k); - m68040_do_fsave(m68k, addr, reg, 0); + addr = EA_AY_PD_32(); + m68040_do_fsave(addr, reg, 0); break; case 5: // (D16, An) - addr = EA_AY_DI_16(m68k); - m68040_do_fsave(m68k, addr, -1, 1); + addr = EA_AY_DI_16(); + m68040_do_fsave(addr, -1, 1); break; case 7: // @@ -2101,24 +2098,24 @@ void m68040_fpu_op1(m68000_base_device *m68k) { case 1: // (abs32) { - addr = EA_AL_32(m68k); - m68040_do_fsave(m68k, addr, -1, 1); + addr = EA_AL_32(); + m68040_do_fsave(addr, -1, 1); break; } case 2: // (d16, PC) { - addr = EA_PCDI_16(m68k); - m68040_do_fsave(m68k, addr, -1, 1); + addr = EA_PCDI_16(); + m68040_do_fsave(addr, -1, 1); break; } default: - fatalerror("M68kFPU: FSAVE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k)); + fatalerror("M68kFPU: FSAVE unhandled mode %d reg %d at %x\n", mode, reg, m_pc); } break; default: - fatalerror("M68kFPU: FSAVE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k)); + fatalerror("M68kFPU: FSAVE unhandled mode %d reg %d at %x\n", mode, reg, m_pc); } break; } @@ -2129,18 +2126,18 @@ void m68040_fpu_op1(m68000_base_device *m68k) switch (mode) { case 2: // (An) - addr = REG_A(m68k)[reg]; - m68040_do_frestore(m68k, addr, -1); + addr = REG_A()[reg]; + m68040_do_frestore(addr, -1); break; case 3: // (An)+ - addr = EA_AY_PI_32(m68k); - m68040_do_frestore(m68k, addr, reg); + addr = EA_AY_PI_32(); + m68040_do_frestore(addr, reg); break; case 5: // (D16, An) - addr = EA_AY_DI_16(m68k); - m68040_do_frestore(m68k, addr, -1); + addr = EA_AY_DI_16(); + m68040_do_frestore(addr, -1); break; case 7: // @@ -2148,53 +2145,53 @@ void m68040_fpu_op1(m68000_base_device *m68k) { case 1: // (abs32) { - addr = EA_AL_32(m68k); - m68040_do_frestore(m68k, addr, -1); + addr = EA_AL_32(); + m68040_do_frestore(addr, -1); break; } case 2: // (d16, PC) { - addr = EA_PCDI_16(m68k); - m68040_do_frestore(m68k, addr, -1); + addr = EA_PCDI_16(); + m68040_do_frestore(addr, -1); break; } default: - fatalerror("M68kFPU: FRESTORE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k)); + fatalerror("M68kFPU: FRESTORE unhandled mode %d reg %d at %x\n", mode, reg, m_pc); } break; default: - fatalerror("M68kFPU: FRESTORE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k)); + fatalerror("M68kFPU: FRESTORE unhandled mode %d reg %d at %x\n", mode, reg, m_pc); } break; } break; - default: fatalerror("m68040_fpu_op1: unimplemented op %d at %08X\n", (m68k->ir >> 6) & 0x3, REG_PC(m68k)-2); + default: fatalerror("m68040_fpu_op1: unimplemented op %d at %08X\n", (m_ir >> 6) & 0x3, m_pc-2); } } -void m68881_ftrap(m68000_base_device *m68k) +void m68881_ftrap() { - uint16_t w2 = OPER_I_16(m68k); + uint16_t w2 = OPER_I_16(); // now check the condition - if (TEST_CONDITION(m68k, w2 & 0x3f)) + if (TEST_CONDITION(w2 & 0x3f)) { // trap here - m68ki_exception_trap(m68k, EXCEPTION_TRAPV); + m68ki_exception_trap(EXCEPTION_TRAPV); } else // fall through, requires eating the operand { - switch (m68k->ir & 0x7) + switch (m_ir & 0x7) { case 2: // word operand - OPER_I_16(m68k); + OPER_I_16(); break; case 3: // long word operand - OPER_I_32(m68k); + OPER_I_32(); break; case 4: // no operand diff --git a/src/devices/cpu/m68000/m68kmake.cpp b/src/devices/cpu/m68000/m68kmake.cpp index 06e5cdecb1d..9be6ca437af 100644 --- a/src/devices/cpu/m68000/m68kmake.cpp +++ b/src/devices/cpu/m68000/m68kmake.cpp @@ -789,8 +789,8 @@ static void get_base_name(char* base_name, opcode_struct* op) /* Write the name of an opcode handler function */ static void write_function_name(FILE* filep, char* base_name) { - fprintf(filep, "void m68000_base_device_ops::%s(m68000_base_device* mc68kcpu)\n", base_name); - fprintf(g_prototype_file, "static void %s(m68000_base_device* mc68kcpu);\n", base_name); + fprintf(filep, "void m68000_base_device::%s()\n", base_name); + fprintf(g_prototype_file, "void %s();\n", base_name); } static void add_opcode_output_table_entry(opcode_struct* op, char* name) @@ -803,7 +803,7 @@ static void add_opcode_output_table_entry(opcode_struct* op, char* name) *ptr = *op; - sprintf( ptr->name, "m68000_base_device_ops::%s", name); + sprintf( ptr->name, "&m68000_base_device::%s", name); ptr->bits = num_bits(ptr->op_mask); } @@ -880,17 +880,17 @@ static void generate_opcode_handler(FILE* filep, body_struct* body, replace_stru /* Add any replace strings needed */ if(ea_mode != EA_MODE_NONE) { - sprintf(str, "EA_%s_8(mc68kcpu)", g_ea_info_table[ea_mode].ea_add); + sprintf(str, "EA_%s_8()", g_ea_info_table[ea_mode].ea_add); add_replace_string(replace, ID_OPHANDLER_EA_AY_8, str); - sprintf(str, "EA_%s_16(mc68kcpu)", g_ea_info_table[ea_mode].ea_add); + sprintf(str, "EA_%s_16()", g_ea_info_table[ea_mode].ea_add); add_replace_string(replace, ID_OPHANDLER_EA_AY_16, str); - sprintf(str, "EA_%s_32(mc68kcpu)", g_ea_info_table[ea_mode].ea_add); + sprintf(str, "EA_%s_32()", g_ea_info_table[ea_mode].ea_add); add_replace_string(replace, ID_OPHANDLER_EA_AY_32, str); - sprintf(str, "OPER_%s_8(mc68kcpu)", g_ea_info_table[ea_mode].ea_add); + sprintf(str, "OPER_%s_8()", g_ea_info_table[ea_mode].ea_add); add_replace_string(replace, ID_OPHANDLER_OPER_AY_8, str); - sprintf(str, "OPER_%s_16(mc68kcpu)", g_ea_info_table[ea_mode].ea_add); + sprintf(str, "OPER_%s_16()", g_ea_info_table[ea_mode].ea_add); add_replace_string(replace, ID_OPHANDLER_OPER_AY_16, str); - sprintf(str, "OPER_%s_32(mc68kcpu)", g_ea_info_table[ea_mode].ea_add); + sprintf(str, "OPER_%s_32()", g_ea_info_table[ea_mode].ea_add); add_replace_string(replace, ID_OPHANDLER_OPER_AY_32, str); } @@ -972,8 +972,8 @@ static void generate_opcode_cc_variants(FILE* filep, body_struct* body, replace_ for(i=2;i<16;i++) { /* Add replace strings for this condition code */ - sprintf(repl, "COND_%s(mc68kcpu)", g_cc_table[i][1]); - sprintf(replnot, "COND_NOT_%s(mc68kcpu)", g_cc_table[i][1]); + sprintf(repl, "COND_%s()", g_cc_table[i][1]); + sprintf(replnot, "COND_NOT_%s()", g_cc_table[i][1]); add_replace_string(replace, ID_OPHANDLER_CC, repl); add_replace_string(replace, ID_OPHANDLER_NOT_CC, replnot); @@ -1358,9 +1358,7 @@ int main(int argc, char *argv[]) error_exit("Duplicate opcode handler section"); fprintf(g_table_file, "%s\n\n", ophandler_header_insert); - fprintf(g_prototype_file, "#ifdef OPCODE_PROTOTYPES\n\n"); process_opcode_handlers(g_table_file); - fprintf(g_prototype_file, "#else\n"); fprintf(g_table_file, "%s\n\n", ophandler_footer_insert); ophandler_body_read = 1; @@ -1390,7 +1388,6 @@ int main(int argc, char *argv[]) fprintf(g_table_file, "%s\n\n", table_footer_insert); fprintf(g_prototype_file, "%s\n\n", prototype_footer_insert); - fprintf(g_prototype_file, "#endif\n"); break; } diff --git a/src/devices/cpu/m68000/m68kmmu.h b/src/devices/cpu/m68000/m68kmmu.h index d477b31f187..24601755e6d 100644 --- a/src/devices/cpu/m68000/m68kmmu.h +++ b/src/devices/cpu/m68000/m68kmmu.h @@ -9,44 +9,44 @@ // MMU status register bit definitions -#define M68K_MMU_SR_BUS_ERROR 0x8000 -#define M68K_MMU_SR_SUPERVISOR_ONLY 0x2000 -#define M68K_MMU_SR_WRITE_PROTECT 0x0800 -#define M68K_MMU_SR_INVALID 0x0400 -#define M68K_MMU_SR_MODIFIED 0x0200 -#define M68K_MMU_SR_LEVEL_0 0x0000 -#define M68K_MMU_SR_LEVEL_1 0x0001 -#define M68K_MMU_SR_LEVEL_2 0x0002 -#define M68K_MMU_SR_LEVEL_3 0x0003 +static constexpr int M68K_MMU_SR_BUS_ERROR = 0x8000; +static constexpr int M68K_MMU_SR_SUPERVISOR_ONLY = 0x2000; +static constexpr int M68K_MMU_SR_WRITE_PROTECT = 0x0800; +static constexpr int M68K_MMU_SR_INVALID = 0x0400; +static constexpr int M68K_MMU_SR_MODIFIED = 0x0200; +static constexpr int M68K_MMU_SR_LEVEL_0 = 0x0000; +static constexpr int M68K_MMU_SR_LEVEL_1 = 0x0001; +static constexpr int M68K_MMU_SR_LEVEL_2 = 0x0002; +static constexpr int M68K_MMU_SR_LEVEL_3 = 0x0003; // MMU translation table descriptor field definitions -#define M68K_MMU_DF_DT 0x0003 -#define M68K_MMU_DF_DT0 0x0000 -#define M68K_MMU_DF_DT1 0x0001 -#define M68K_MMU_DF_DT2 0x0002 -#define M68K_MMU_DF_DT3 0x0003 -#define M68K_MMU_DF_WP 0x0004 -#define M68K_MMU_DF_USED 0x0008 -#define M68K_MMU_DF_MODIFIED 0x0010 -#define M68K_MMU_DF_CI 0x0040 -#define M68K_MMU_DF_SUPERVISOR 0x0100 +static constexpr int M68K_MMU_DF_DT = 0x0003; +static constexpr int M68K_MMU_DF_DT0 = 0x0000; +static constexpr int M68K_MMU_DF_DT1 = 0x0001; +static constexpr int M68K_MMU_DF_DT2 = 0x0002; +static constexpr int M68K_MMU_DF_DT3 = 0x0003; +static constexpr int M68K_MMU_DF_WP = 0x0004; +static constexpr int M68K_MMU_DF_USED = 0x0008; +static constexpr int M68K_MMU_DF_MODIFIED = 0x0010; +static constexpr int M68K_MMU_DF_CI = 0x0040; +static constexpr int M68K_MMU_DF_SUPERVISOR = 0x0100; // MMU ATC Fields -#define M68K_MMU_ATC_BUSERROR 0x08000000 -#define M68K_MMU_ATC_CACHE_IN 0x04000000 -#define M68K_MMU_ATC_WRITE_PR 0x02000000 -#define M68K_MMU_ATC_MODIFIED 0x01000000 -#define M68K_MMU_ATC_MASK 0x00ffffff -#define M68K_MMU_ATC_SHIFT 8 -#define M68K_MMU_ATC_VALID 0x08000000 +static constexpr int M68K_MMU_ATC_BUSERROR = 0x08000000; +static constexpr int M68K_MMU_ATC_CACHE_IN = 0x04000000; +static constexpr int M68K_MMU_ATC_WRITE_PR = 0x02000000; +static constexpr int M68K_MMU_ATC_MODIFIED = 0x01000000; +static constexpr int M68K_MMU_ATC_MASK = 0x00ffffff; +static constexpr int M68K_MMU_ATC_SHIFT = 8; +static constexpr int M68K_MMU_ATC_VALID = 0x08000000; // MMU Translation Control register -#define M68K_MMU_TC_SRE 0x02000000 +static constexpr int M68K_MMU_TC_SRE = 0x02000000; /* decodes the effective address */ -static uint32_t DECODE_EA_32(m68000_base_device *m68k, int ea) +uint32_t DECODE_EA_32(int ea) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -55,21 +55,21 @@ static uint32_t DECODE_EA_32(m68000_base_device *m68k, int ea) { case 2: // (An) { - return REG_A(m68k)[reg]; + return REG_A()[reg]; } case 3: // (An)+ { - uint32_t ea = EA_AY_PI_32(m68k); + uint32_t ea = EA_AY_PI_32(); return ea; } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_32(m68k); + uint32_t ea = EA_AY_DI_32(); return ea; } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_32(m68k); + uint32_t ea = EA_AY_IX_32(); return ea; } case 7: @@ -78,26 +78,26 @@ static uint32_t DECODE_EA_32(m68000_base_device *m68k, int ea) { case 0: // (xxx).W { - uint32_t ea = (uint32_t)OPER_I_16(m68k); + uint32_t ea = OPER_I_16(); return ea; } case 1: // (xxx).L { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; return ea; } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_32(m68k); + uint32_t ea = EA_PCDI_32(); return ea; } - default: fatalerror("m68k: DECODE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("m68k: DECODE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("m68k: DECODE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("m68k: DECODE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } return 0; } @@ -105,12 +105,12 @@ static uint32_t DECODE_EA_32(m68000_base_device *m68k, int ea) /* pmmu_atc_add: adds this address to the ATC */ -void pmmu_atc_add(m68000_base_device *m68k, uint32_t logical, uint32_t physical, int fc) +void pmmu_atc_add(uint32_t logical, uint32_t physical, int fc) { int i, found; // get page size (i.e. # of bits to ignore); is 10 for Apollo - int ps = (m68k->mmu_tc >> 20) & 0xf; + int ps = (m_mmu_tc >> 20) & 0xf; // Note: exact emulation would use (logical >> ps) << (ps-8) uint32_t atc_tag = M68K_MMU_ATC_VALID | ((fc &7) << 24)| logical >> ps; @@ -118,7 +118,7 @@ void pmmu_atc_add(m68000_base_device *m68k, uint32_t logical, uint32_t physical, for (i = 0; i < MMU_ATC_ENTRIES; i++) { // if tag bits and function code match, don't add - if (m68k->mmu_atc_tag[i] == atc_tag) + if (m_mmu_atc_tag[i] == atc_tag) { return; } @@ -128,7 +128,7 @@ void pmmu_atc_add(m68000_base_device *m68k, uint32_t logical, uint32_t physical, found = -1; for (i = 0; i < MMU_ATC_ENTRIES; i++) { - if (!(m68k->mmu_atc_tag[i] & M68K_MMU_ATC_VALID)) + if (!(m_mmu_atc_tag[i] & M68K_MMU_ATC_VALID)) { found = i; break; @@ -138,22 +138,22 @@ void pmmu_atc_add(m68000_base_device *m68k, uint32_t logical, uint32_t physical, // did we find an entry? steal one by round-robin then if (found == -1) { - found = m68k->mmu_atc_rr++; + found = m_mmu_atc_rr++; - if (m68k->mmu_atc_rr >= MMU_ATC_ENTRIES) + if (m_mmu_atc_rr >= MMU_ATC_ENTRIES) { - m68k->mmu_atc_rr = 0; + m_mmu_atc_rr = 0; } } // add the entry // printf("ATC[%2d] add: log %08x -> phys %08x (fc=%d)\n", found, (logical>>ps) << ps, (physical >> ps) << ps, fc); - m68k->mmu_atc_tag[found] = atc_tag; - m68k->mmu_atc_data[found] = (physical >> ps) << (ps-8); + m_mmu_atc_tag[found] = atc_tag; + m_mmu_atc_data[found] = (physical >> ps) << (ps-8); - if (m68k->mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT) + if (m_mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT) { - m68k->mmu_atc_data[found] |= M68K_MMU_ATC_WRITE_PR; + m_mmu_atc_data[found] |= M68K_MMU_ATC_WRITE_PR; } } @@ -162,61 +162,61 @@ void pmmu_atc_add(m68000_base_device *m68k, uint32_t logical, uint32_t physical, 7fff0003 001ffd10 80f05750 is what should load */ -void pmmu_atc_flush(m68000_base_device *m68k) +void pmmu_atc_flush() { int i; - // printf("ATC flush: pc=%08x\n", REG_PPC(m68k)); + // printf("ATC flush: pc=%08x\n", m_ppc); for (i = 0; i < MMU_ATC_ENTRIES; i++) { - m68k->mmu_atc_tag[i] = 0; + m_mmu_atc_tag[i] = 0; } - m68k->mmu_atc_rr = 0; + m_mmu_atc_rr = 0; } -static inline uint32_t get_dt2_table_entry(m68000_base_device *m68k, uint32_t tptr, uint8_t ptest) +inline uint32_t get_dt2_table_entry(uint32_t tptr, uint8_t ptest) { - uint32_t tbl_entry = m68k->program->read_dword(tptr); + uint32_t tbl_entry = m_program->read_dword(tptr); uint32_t dt = tbl_entry & M68K_MMU_DF_DT; - m68k->mmu_tmp_sr |= tbl_entry & 0x0004 ? M68K_MMU_SR_WRITE_PROTECT : 0; + m_mmu_tmp_sr |= tbl_entry & 0x0004 ? M68K_MMU_SR_WRITE_PROTECT : 0; if (!ptest && dt != M68K_MMU_DF_DT0) { - if (dt == M68K_MMU_DF_DT1 && !m68k->mmu_tmp_rw && !(m68k->mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT)) + if (dt == M68K_MMU_DF_DT1 && !m_mmu_tmp_rw && !(m_mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT)) { // set used and modified - m68k->program->write_dword( tptr, tbl_entry | M68K_MMU_DF_USED | M68K_MMU_DF_MODIFIED); + m_program->write_dword( tptr, tbl_entry | M68K_MMU_DF_USED | M68K_MMU_DF_MODIFIED); } else if (!(tbl_entry & M68K_MMU_DF_USED)) { - m68k->program->write_dword( tptr, tbl_entry | M68K_MMU_DF_USED); + m_program->write_dword( tptr, tbl_entry | M68K_MMU_DF_USED); } } return tbl_entry; } -static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tptr, uint8_t fc, uint8_t ptest) +inline uint32_t get_dt3_table_entry(uint32_t tptr, uint8_t fc, uint8_t ptest) { - uint32_t tbl_entry2 = m68k->program->read_dword(tptr); - uint32_t tbl_entry = m68k->program->read_dword(tptr + 4); + uint32_t tbl_entry2 = m_program->read_dword(tptr); + uint32_t tbl_entry = m_program->read_dword(tptr + 4); uint32_t dt = tbl_entry2 & M68K_MMU_DF_DT; - m68k->mmu_tmp_sr |= ((tbl_entry2 & 0x0100) && !(fc & 4)) ? M68K_MMU_SR_SUPERVISOR_ONLY : 0; - m68k->mmu_tmp_sr |= tbl_entry2 & 0x0004 ? M68K_MMU_SR_WRITE_PROTECT : 0; + m_mmu_tmp_sr |= ((tbl_entry2 & 0x0100) && !(fc & 4)) ? M68K_MMU_SR_SUPERVISOR_ONLY : 0; + m_mmu_tmp_sr |= tbl_entry2 & 0x0004 ? M68K_MMU_SR_WRITE_PROTECT : 0; if (!ptest && dt != M68K_MMU_DF_DT0) { - if (dt == M68K_MMU_DF_DT1 && !m68k->mmu_tmp_rw && !(m68k->mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT)) + if (dt == M68K_MMU_DF_DT1 && !m_mmu_tmp_rw && !(m_mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT)) { // set modified - m68k->program->write_dword( tptr, tbl_entry2 | M68K_MMU_DF_USED | M68K_MMU_DF_MODIFIED); + m_program->write_dword( tptr, tbl_entry2 | M68K_MMU_DF_USED | M68K_MMU_DF_MODIFIED); } else if (!(tbl_entry2 & M68K_MMU_DF_USED)) { - m68k->program->write_dword( tptr, tbl_entry2 | M68K_MMU_DF_USED); + m_program->write_dword( tptr, tbl_entry2 | M68K_MMU_DF_USED); } } @@ -226,7 +226,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp /* pmmu_translate_addr_with_fc: perform 68851/68030-style PMMU address translation */ -/*static inline*/ static uint32_t pmmu_translate_addr_with_fc(m68000_base_device *m68k, uint32_t addr_in, uint8_t fc, uint8_t ptest) +uint32_t pmmu_translate_addr_with_fc(uint32_t addr_in, uint8_t fc, uint8_t ptest) { uint32_t addr_out, tbl_entry = 0, tamode = 0, tbmode = 0, tcmode = 0; uint32_t root_aptr, root_limit, tofs, ps, is, abits, bbits, cbits; @@ -240,33 +240,33 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp resolved = 0; addr_out = addr_in; - m68k->mmu_tmp_sr = 0; + m_mmu_tmp_sr = 0; if (fc == 7) { return addr_in; } - if (m68k->mmu_tt0 & 0x8000) + if (m_mmu_tt0 & 0x8000) { // transparent translation register 0 enabled - uint32_t address_base = m68k->mmu_tt0 & 0xff000000; - uint32_t address_mask = ((m68k->mmu_tt0 << 8) & 0xff000000) ^ 0xff000000; - if ((addr_in & address_mask) == address_base && (fc & ~m68k->mmu_tt0) == ((m68k->mmu_tt0 >> 4) & 7)) + uint32_t address_base = m_mmu_tt0 & 0xff000000; + uint32_t address_mask = ((m_mmu_tt0 << 8) & 0xff000000) ^ 0xff000000; + if ((addr_in & address_mask) == address_base && (fc & ~m_mmu_tt0) == ((m_mmu_tt0 >> 4) & 7)) { -// printf("PMMU: pc=%x TT0 fc=%x addr_in=%08x address_mask=%08x address_base=%08x\n", m68k->ppc, fc, addr_in, address_mask, address_base); +// printf("PMMU: pc=%x TT0 fc=%x addr_in=%08x address_mask=%08x address_base=%08x\n", m_ppc, fc, addr_in, address_mask, address_base); return addr_in; } } - if (m68k->mmu_tt1 & 0x8000) + if (m_mmu_tt1 & 0x8000) { // transparent translation register 1 enabled - uint32_t address_base = m68k->mmu_tt1 & 0xff000000; - uint32_t address_mask = ((m68k->mmu_tt1 << 8) & 0xff000000) ^ 0xff000000; - if ((addr_in & address_mask) == address_base && (fc & ~m68k->mmu_tt1) == ((m68k->mmu_tt1 >> 4) & 7)) + uint32_t address_base = m_mmu_tt1 & 0xff000000; + uint32_t address_mask = ((m_mmu_tt1 << 8) & 0xff000000) ^ 0xff000000; + if ((addr_in & address_mask) == address_base && (fc & ~m_mmu_tt1) == ((m_mmu_tt1 >> 4) & 7)) { -// printf("PMMU: pc=%x TT1 fc=%x addr_in=%08x address_mask=%08x address_base=%08x\n", m68k->ppc, fc, addr_in, address_mask, address_base); +// printf("PMMU: pc=%x TT1 fc=%x addr_in=%08x address_mask=%08x address_base=%08x\n", m_ppc, fc, addr_in, address_mask, address_base); return addr_in; } } @@ -277,64 +277,64 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp // } // get page size (i.e. # of bits to ignore); ps is 10 or 12 for Apollo, 8 otherwise - ps = (m68k->mmu_tc >> 20) & 0xf; + ps = (m_mmu_tc >> 20) & 0xf; atc_tag = M68K_MMU_ATC_VALID | ((fc &7) << 24) | addr_in >> ps; // first see if this is already in the ATC for (i = 0; i < MMU_ATC_ENTRIES; i++) { - if (m68k->mmu_atc_tag[i] != atc_tag) + if (m_mmu_atc_tag[i] != atc_tag) { // tag bits and function code don't match } - else if (!m68k->mmu_tmp_rw && (m68k->mmu_atc_data[i] & M68K_MMU_ATC_WRITE_PR)) + else if (!m_mmu_tmp_rw && (m_mmu_atc_data[i] & M68K_MMU_ATC_WRITE_PR)) { // write mode, but write protected } - else if (!m68k->mmu_tmp_rw && !(m68k->mmu_atc_data[i] & M68K_MMU_ATC_MODIFIED)) + else if (!m_mmu_tmp_rw && !(m_mmu_atc_data[i] & M68K_MMU_ATC_MODIFIED)) { // first write; must set modified in PMMU tables as well } else { // read access or write access and not write protected - if (!m68k->mmu_tmp_rw && !ptest) + if (!m_mmu_tmp_rw && !ptest) { // FIXME: must set modified in PMMU tables as well - m68k->mmu_atc_data[i] |= M68K_MMU_ATC_MODIFIED; + m_mmu_atc_data[i] |= M68K_MMU_ATC_MODIFIED; } else { // FIXME: supervisor mode? - m68k->mmu_tmp_sr = M68K_MMU_SR_MODIFIED; + m_mmu_tmp_sr = M68K_MMU_SR_MODIFIED; } - addr_out = (m68k->mmu_atc_data[i] << 8) | (addr_in & ~(~0 << ps)); -// printf("ATC[%2d] hit: log %08x -> phys %08x pc=%08x fc=%d\n", i, addr_in, addr_out, REG_PPC(m68k), fc); + addr_out = (m_mmu_atc_data[i] << 8) | (addr_in & ~(~0 << ps)); +// printf("ATC[%2d] hit: log %08x -> phys %08x pc=%08x fc=%d\n", i, addr_in, addr_out, m_ppc, fc); // pmmu_atc_count++; return addr_out; } } // if SRP is enabled and we're in supervisor mode, use it - if ((m68k->mmu_tc & M68K_MMU_TC_SRE) && (fc & 4)) + if ((m_mmu_tc & M68K_MMU_TC_SRE) && (fc & 4)) { - root_aptr = m68k->mmu_srp_aptr; - root_limit = m68k->mmu_srp_limit; + root_aptr = m_mmu_srp_aptr; + root_limit = m_mmu_srp_limit; } else // else use the CRP { - root_aptr = m68k->mmu_crp_aptr; - root_limit = m68k->mmu_crp_limit; + root_aptr = m_mmu_crp_aptr; + root_limit = m_mmu_crp_limit; } // get initial shift (# of top bits to ignore) - is = (m68k->mmu_tc >> 16) & 0xf; - ps = (m68k->mmu_tc >> 20) & 0xf; - abits = (m68k->mmu_tc >> 12) & 0xf; - bbits = (m68k->mmu_tc >> 8) & 0xf; - cbits = (m68k->mmu_tc >> 4) & 0xf; + is = (m_mmu_tc >> 16) & 0xf; + ps = (m_mmu_tc >> 20) & 0xf; + abits = (m_mmu_tc >> 12) & 0xf; + bbits = (m_mmu_tc >> 8) & 0xf; + cbits = (m_mmu_tc >> 4) & 0xf; - // printf("PMMU: tcr %08x limit %08x aptr %08x is %x abits %d bbits %d cbits %d\n", m68k->mmu_tc, root_limit, root_aptr, is, abits, bbits, cbits); + // printf("PMMU: tcr %08x limit %08x aptr %08x is %x abits %d bbits %d cbits %d\n", m_mmu_tc, root_limit, root_aptr, is, abits, bbits, cbits); // get table A offset tofs = (addr_in<<is)>>(32-abits); @@ -344,18 +344,18 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp switch (root_limit & M68K_MMU_DF_DT) { case M68K_MMU_DF_DT0: // invalid, will cause MMU exception - m68k->mmu_tmp_sr |= M68K_MMU_SR_INVALID; + m_mmu_tmp_sr |= M68K_MMU_SR_INVALID; return root_aptr; case M68K_MMU_DF_DT1: // page descriptor, will cause direct mapping addr_out = tptr + addr_in; -// printf("PMMU: PC=%x root mode %d (addr_in %08x -> %08x)\n", m68k->ppc, M68K_MMU_DF_DT1, addr_in, addr_out); +// printf("PMMU: PC=%x root mode %d (addr_in %08x -> %08x)\n", m_ppc, M68K_MMU_DF_DT1, addr_in, addr_out); return addr_out; case M68K_MMU_DF_DT2: // valid 4 byte descriptors tofs *= 4; // if (verbose) printf("PMMU: reading table A entry at %08x\n", tofs + tptr); - tbl_entry = get_dt2_table_entry(m68k, tptr + tofs, ptest); + tbl_entry = get_dt2_table_entry(tptr + tofs, ptest); tamode = tbl_entry & M68K_MMU_DF_DT; // if (verbose) printf("PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tamode, tofs); break; @@ -363,7 +363,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp case M68K_MMU_DF_DT3: // valid 8 byte descriptors tofs *= 8; // if (verbose) printf("PMMU: reading table A entries at %08x\n", tofs + tptr); - tbl_entry = get_dt3_table_entry(m68k, tofs + tptr, fc, ptest); + tbl_entry = get_dt3_table_entry(tofs + tptr, fc, ptest); tamode = tbl_entry & M68K_MMU_DF_DT; // if (verbose) printf("PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tamode, tofs); break; @@ -379,7 +379,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp switch (tamode) { case M68K_MMU_DF_DT0: // invalid, will cause MMU exception (but not for ptest) - m68k->mmu_tmp_sr |= (M68K_MMU_SR_INVALID | M68K_MMU_SR_LEVEL_1); + m_mmu_tmp_sr |= (M68K_MMU_SR_INVALID | M68K_MMU_SR_LEVEL_1); // last valid pointer (for ptest) addr_out = last_entry_ptr; resolved = 1; @@ -388,7 +388,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp case M68K_MMU_DF_DT2: // 4-byte table B descriptor tofs *= 4; // if (verbose) printf("PMMU: reading table B entry at %08x\n", tofs + tptr); - tbl_entry = get_dt2_table_entry(m68k, tptr + tofs, ptest); + tbl_entry = get_dt2_table_entry(tptr + tofs, ptest); tbmode = tbl_entry & M68K_MMU_DF_DT; // if (verbose) printf("PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tbmode, tofs); break; @@ -396,7 +396,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp case M68K_MMU_DF_DT3: // 8-byte table B descriptor tofs *= 8; // if (verbose) printf("PMMU: reading table B entries at %08x\n", tofs + tptr); - tbl_entry = get_dt3_table_entry(m68k, tptr + tofs, fc, ptest); + tbl_entry = get_dt3_table_entry(tptr + tofs, fc, ptest); tbmode = tbl_entry & M68K_MMU_DF_DT; tbl_entry &= ~M68K_MMU_DF_DT; // if (verbose) printf("PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tbmode, tofs); @@ -423,7 +423,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp switch (tbmode) { case M68K_MMU_DF_DT0: // invalid, will cause MMU exception (but not for ptest) - m68k->mmu_tmp_sr |= (M68K_MMU_SR_INVALID | M68K_MMU_SR_LEVEL_2); + m_mmu_tmp_sr |= (M68K_MMU_SR_INVALID | M68K_MMU_SR_LEVEL_2); // last valid pointer (for ptest) addr_out = last_entry_ptr; resolved = 1; @@ -432,7 +432,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp case M68K_MMU_DF_DT2: // 4-byte table C descriptor tofs *= 4; // if (verbose) printf("PMMU: reading table C entry at %08x\n", tofs + tptr); - tbl_entry = get_dt2_table_entry(m68k, tptr + tofs, ptest); + tbl_entry = get_dt2_table_entry(tptr + tofs, ptest); tcmode = tbl_entry & M68K_MMU_DF_DT; // if (verbose) printf("PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tbmode, tofs); break; @@ -440,7 +440,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp case M68K_MMU_DF_DT3: // 8-byte table C descriptor tofs *= 8; // if (verbose) printf("PMMU: reading table C entries at %08x\n", tofs + tptr); - tbl_entry = get_dt3_table_entry(m68k, tptr+ tofs, fc, ptest); + tbl_entry = get_dt3_table_entry(tptr+ tofs, fc, ptest); tcmode = tbl_entry & M68K_MMU_DF_DT; // if (verbose) printf("PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tcmode, tofs); break; @@ -460,14 +460,14 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp switch (tcmode) { case M68K_MMU_DF_DT0: // invalid, will cause MMU exception (unless ptest) - m68k->mmu_tmp_sr |= (M68K_MMU_SR_INVALID | M68K_MMU_SR_LEVEL_3); + m_mmu_tmp_sr |= (M68K_MMU_SR_INVALID | M68K_MMU_SR_LEVEL_3); addr_out = tptr + tofs; resolved = 1; break; case M68K_MMU_DF_DT2: // 4-byte (short-form) indirect descriptor case M68K_MMU_DF_DT3: // 8-byte (long-form) indirect descriptor - fatalerror("PMMU: pc=%08x Unhandled Table C mode %d (addr_in %08x)\n", m68k->ppc, tcmode, addr_in); + fatalerror("PMMU: pc=%08x Unhandled Table C mode %d (addr_in %08x)\n", m_ppc, tcmode, addr_in); break; case M68K_MMU_DF_DT1: // termination descriptor @@ -482,38 +482,38 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp if (!ptest) { - if (m68k->mmu_tmp_sr & M68K_MMU_SR_INVALID) + if (m_mmu_tmp_sr & M68K_MMU_SR_INVALID) { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } } - else if (m68k->mmu_tmp_sr & M68K_MMU_SR_SUPERVISOR_ONLY) + else if (m_mmu_tmp_sr & M68K_MMU_SR_SUPERVISOR_ONLY) { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } } - else if ((m68k->mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT) && !m68k->mmu_tmp_rw) + else if ((m_mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT) && !m_mmu_tmp_rw) { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } } - if (!m68k->mmu_tmp_buserror_occurred) + if (!m_mmu_tmp_buserror_occurred) { // we add only valid entries - pmmu_atc_add(m68k, addr_in, addr_out, fc); + pmmu_atc_add(addr_in, addr_out, fc); } } @@ -525,25 +525,25 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp // FC bits: 2 = supervisor, 1 = program, 0 = data // the 68040 is a subset of the 68851 and 68030 PMMUs - the page table sizes are fixed, there is no early termination, etc, etc. -/*static inline*/ static uint32_t pmmu_translate_addr_with_fc_040(m68000_base_device *m68k, uint32_t addr_in, uint8_t fc, uint8_t ptest) +uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t ptest) { uint32_t addr_out, tt0, tt1; addr_out = addr_in; - m68k->mmu_tmp_sr = 0; + m_mmu_tmp_sr = 0; // transparent translation registers are always in force even if the PMMU itself is disabled // they don't do much in emulation because we never write out of order, but the write-protect and cache control features // are emulatable, and apparently transparent translation regions skip the page table lookup. if (fc & 1) // data, use DTT0/DTT1 { - tt0 = m68k->mmu_dtt0; - tt1 = m68k->mmu_dtt1; + tt0 = m_mmu_dtt0; + tt1 = m_mmu_dtt1; } else if (fc & 2) // program, use ITT0/ITT1 { - tt0 = m68k->mmu_itt0; - tt1 = m68k->mmu_itt1; + tt0 = m_mmu_itt0; + tt1 = m_mmu_itt1; } else { @@ -561,13 +561,13 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp if ((addr_in & mask) == (tt0 & mask) && (fc & fcmask[(tt0 >> 13) & 3]) == fcmatch[(tt0 >> 13) & 3]) { // fprintf(stderr, "TT0 match on address %08x (TT0 = %08x, mask = %08x)\n", addr_in, tt0, mask); - if ((tt0 & 4) && !m68k->mmu_tmp_rw && !ptest) // write protect? + if ((tt0 & 4) && !m_mmu_tmp_rw && !ptest) // write protect? { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } } @@ -586,13 +586,13 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp if ((addr_in & mask) == (tt1 & mask) && (fc & fcmask[(tt1 >> 13) & 3]) == fcmatch[(tt1 >> 13) & 3]) { // fprintf(stderr, "TT1 match on address %08x (TT0 = %08x, mask = %08x)\n", addr_in, tt1, mask); - if ((tt1 & 4) && !m68k->mmu_tmp_rw && !ptest) // write protect? + if ((tt1 & 4) && !m_mmu_tmp_rw && !ptest) // write protect? { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } } @@ -600,7 +600,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp } } - if (m68k->pmmu_enabled) + if (m_pmmu_enabled) { uint32_t root_idx = (addr_in>>25) & 0x7f; uint32_t ptr_idx = (addr_in>>18) & 0x7f; @@ -611,15 +611,15 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp // select supervisor or user root pointer if (fc & 4) { - root_ptr = m68k->mmu_srp_aptr + (root_idx<<2); + root_ptr = m_mmu_srp_aptr + (root_idx<<2); } else { - root_ptr = m68k->mmu_urp_aptr + (root_idx<<2); + root_ptr = m_mmu_urp_aptr + (root_idx<<2); } // get the root entry - root_entry = m68k->program->read_dword(root_ptr); + root_entry = m_program->read_dword(root_ptr); // is UDT marked valid? if (root_entry & 2) @@ -628,41 +628,41 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp if ((!(root_entry & 0x8)) && (!ptest)) { root_entry |= 0x8; - m68k->program->write_dword(root_ptr, root_entry); + m_program->write_dword(root_ptr, root_entry); } // PTEST: any write protect bits set in the search tree will set W in SR if ((ptest) && (root_entry & 4)) { - m68k->mmu_tmp_sr |= 4; + m_mmu_tmp_sr |= 4; } pointer_ptr = (root_entry & ~0x1ff) + (ptr_idx<<2); - pointer_entry = m68k->program->read_dword(pointer_ptr); + pointer_entry = m_program->read_dword(pointer_ptr); // PTEST: any write protect bits set in the search tree will set W in SR if ((ptest) && (pointer_entry & 4)) { - m68k->mmu_tmp_sr |= 4; + m_mmu_tmp_sr |= 4; } // update U bit on this pointer entry too if ((!(pointer_entry & 0x8)) && (!ptest)) { pointer_entry |= 0x8; - m68k->program->write_dword(pointer_ptr, pointer_entry); + m_program->write_dword(pointer_ptr, pointer_entry); } // logerror("pointer entry = %08x\n", pointer_entry); // write protected by the root or pointer entries? - if ((((root_entry & 4) && !m68k->mmu_tmp_rw) || ((pointer_entry & 4) && !m68k->mmu_tmp_rw)) && !ptest) + if ((((root_entry & 4) && !m_mmu_tmp_rw) || ((pointer_entry & 4) && !m_mmu_tmp_rw)) && !ptest) { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } return addr_in; @@ -671,12 +671,12 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp // is UDT valid on the pointer entry? if (!(pointer_entry & 2) && !ptest) { -// fprintf(stderr, "Invalid pointer entry! PC=%x, addr=%x\n", m68k->ppc, addr_in); - if (++m68k->mmu_tmp_buserror_occurred == 1) +// fprintf(stderr, "Invalid pointer entry! PC=%x, addr=%x\n", m_ppc, addr_in); + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } return addr_in; @@ -686,15 +686,15 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp } else // throw an error { -// fprintf(stderr, "Invalid root entry! PC=%x, addr=%x\n", m68k->ppc, addr_in); +// fprintf(stderr, "Invalid root entry! PC=%x, addr=%x\n", m_ppc, addr_in); if (!ptest) { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } } @@ -702,7 +702,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp } // now do the page lookup - if (m68k->mmu_tc & 0x4000) // 8k pages? + if (m_mmu_tc & 0x4000) // 8k pages? { page_idx = (addr_in >> 13) & 0x1f; page = addr_in & 0x1fff; @@ -718,27 +718,27 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp } page_ptr = pointer_entry + (page_idx<<2); - page_entry = m68k->program->read_dword(page_ptr); - m68k->mmu_last_page_entry_addr = page_ptr; + page_entry = m_program->read_dword(page_ptr); + m_mmu_last_page_entry_addr = page_ptr; // logerror("page_entry = %08x\n", page_entry); // resolve indirect page pointers while ((page_entry & 3) == 2) { - page_entry = m68k->program->read_dword(page_entry & ~0x3); - m68k->mmu_last_page_entry_addr = (page_entry & ~0x3); + page_entry = m_program->read_dword(page_entry & ~0x3); + m_mmu_last_page_entry_addr = (page_entry & ~0x3); } - m68k->mmu_last_page_entry = page_entry; + m_mmu_last_page_entry = page_entry; // is the page write protected or supervisor protected? - if ((((page_entry & 4) && !m68k->mmu_tmp_rw) || ((page_entry & 0x80) && !(fc&4))) && !ptest) + if ((((page_entry & 4) && !m_mmu_tmp_rw) || ((page_entry & 0x80) && !(fc&4))) && !ptest) { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } return addr_in; @@ -747,14 +747,14 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp switch (page_entry & 3) { case 0: // invalid -// fprintf(stderr, "Invalid page entry! PC=%x, addr=%x\n", m68k->ppc, addr_in); +// fprintf(stderr, "Invalid page entry! PC=%x, addr=%x\n", m_ppc, addr_in); if (!ptest) { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } } @@ -762,7 +762,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp case 1: case 3: // normal - if (m68k->mmu_tc & 0x4000) // 8k pages? + if (m_mmu_tc & 0x4000) // 8k pages? { addr_out = (page_entry & ~0x1fff) | page; } @@ -776,23 +776,23 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp page_entry |= 0x8; // always set the U bit // if we're writing, the M bit comes into play - if (!m68k->mmu_tmp_rw) + if (!m_mmu_tmp_rw) { page_entry |= 0x10; // set Modified } // if these updates resulted in a change, write the entry back where we found it - if (page_entry != m68k->mmu_last_page_entry) + if (page_entry != m_mmu_last_page_entry) { - m68k->mmu_last_page_entry = page_entry; - m68k->program->write_dword(m68k->mmu_last_page_entry_addr, m68k->mmu_last_page_entry); + m_mmu_last_page_entry = page_entry; + m_program->write_dword(m_mmu_last_page_entry_addr, m_mmu_last_page_entry); } } else { // page entry: UR G U1 U0 S CM CM M U W PDT // SR: B G U1 U0 S CM CM M 0 W T R - m68k->mmu_tmp_sr |= ((addr_out & ~0xfff) || (page_entry & 0x7f4)); + m_mmu_tmp_sr |= ((addr_out & ~0xfff) || (page_entry & 0x7f4)); } break; @@ -809,23 +809,23 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp /* pmmu_translate_addr: perform 68851/68030-style PMMU address translation */ -/*static inline*/ static uint32_t pmmu_translate_addr(m68000_base_device *m68k, uint32_t addr_in) +uint32_t pmmu_translate_addr(uint32_t addr_in) { uint32_t addr_out; - if (CPU_TYPE_IS_040_PLUS(m68k->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - addr_out = pmmu_translate_addr_with_fc_040(m68k, addr_in, m68k->mmu_tmp_fc, 0); + addr_out = pmmu_translate_addr_with_fc_040(addr_in, m_mmu_tmp_fc, 0); } else { - addr_out = pmmu_translate_addr_with_fc(m68k, addr_in, m68k->mmu_tmp_fc, 0); + addr_out = pmmu_translate_addr_with_fc(addr_in, m_mmu_tmp_fc, 0); } -// if (m68k->mmu_tmp_buserror_occurred > 0) { +// if (m_mmu_tmp_buserror_occurred > 0) { // printf("PMMU: pc=%08x sp=%08x va=%08x pa=%08x - invalid Table mode for level=%d (buserror %d)\n", -// REG_PPC(m68k), REG_A(m68k)[7], addr_in, addr_out, m68k->mmu_tmp_sr & M68K_MMU_SR_LEVEL_3, -// m68k->mmu_tmp_buserror_occurred); +// m_ppc, REG_A()[7], addr_in, addr_out, m_mmu_tmp_sr & M68K_MMU_SR_LEVEL_3, +// m_mmu_tmp_buserror_occurred); // } return addr_out; @@ -835,67 +835,67 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp m68851_mmu_ops: COP 0 MMU opcode handling */ -void m68881_mmu_ops(m68000_base_device *m68k) +void m68881_mmu_ops() { uint16_t modes; - uint32_t ea = m68k->ir & 0x3f; + uint32_t ea = m_ir & 0x3f; uint64_t temp64; // catch the 2 "weird" encodings up front (PBcc) - if ((m68k->ir & 0xffc0) == 0xf0c0) + if ((m_ir & 0xffc0) == 0xf0c0) { printf("680x0: unhandled PBcc\n"); return; } - else if ((m68k->ir & 0xffc0) == 0xf080) + else if ((m_ir & 0xffc0) == 0xf080) { printf("680x0: unhandled PBcc\n"); return; } - else if ((m68k->ir & 0xffe0) == 0xf500) + else if ((m_ir & 0xffe0) == 0xf500) { -// logerror("68040 pflush: pc=%08x ir=%04x opmode=%d register=%d\n", REG_PPC(m68k), m68k->ir, (m68k->ir >> 3) & 3, m68k->ir & 7); - pmmu_atc_flush(m68k); +// logerror("68040 pflush: pc=%08x ir=%04x opmode=%d register=%d\n", m_ppc, m_ir, (m_ir >> 3) & 3, m_ir & 7); + pmmu_atc_flush(); } else // the rest are 1111000xxxXXXXXX where xxx is the instruction family { - switch ((m68k->ir>>9) & 0x7) + switch ((m_ir>>9) & 0x7) { case 0: - modes = OPER_I_16(m68k); + modes = OPER_I_16(); if ((modes & 0xfde0) == 0x2000) // PLOAD { - uint32_t ltmp = DECODE_EA_32(m68k, ea); + uint32_t ltmp = DECODE_EA_32(ea); uint32_t ptmp; ptmp = ltmp; - if (m68k->pmmu_enabled) + if (m_pmmu_enabled) { - if (CPU_TYPE_IS_040_PLUS(m68k->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - ptmp = pmmu_translate_addr_with_fc_040(m68k, ltmp, modes & 0x07, 0); + ptmp = pmmu_translate_addr_with_fc_040(ltmp, modes & 0x07, 0); } else { - ptmp = pmmu_translate_addr_with_fc(m68k, ltmp, modes & 0x07, 0); + ptmp = pmmu_translate_addr_with_fc(ltmp, modes & 0x07, 0); } } // printf("680x0: PLOADing ATC with logical %08x => phys %08x\n", ltmp, ptmp); // FIXME: rw bit? - pmmu_atc_add(m68k, ltmp, ptmp, modes & 0x07); + pmmu_atc_add(ltmp, ptmp, modes & 0x07); return; } else if ((modes & 0xe200) == 0x2000) // PFLUSH { - pmmu_atc_flush(m68k); + pmmu_atc_flush(); return; } else if (modes == 0xa000) // PFLUSHR { - pmmu_atc_flush(m68k); + pmmu_atc_flush(); return; } else if (modes == 0x2800) // PVALID (FORMAT 1) @@ -910,38 +910,38 @@ void m68881_mmu_ops(m68000_base_device *m68k) } else if ((modes & 0xe000) == 0x8000) // PTEST { - uint32_t v_addr = DECODE_EA_32(m68k, ea); + uint32_t v_addr = DECODE_EA_32(ea); uint32_t p_addr; uint32_t fc = modes & 0x1f; switch (fc >> 3) { case 0: - fc = fc == 0 ? m68k->sfc : m68k->dfc; + fc = fc == 0 ? m_sfc : m_dfc; break; case 1: - fc = REG_D(m68k)[fc &7] &7; + fc = REG_D()[fc &7] &7; break; case 2: fc &=7; break; } - if (CPU_TYPE_IS_040_PLUS(m68k->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - p_addr = pmmu_translate_addr_with_fc_040(m68k, v_addr, fc, 1); + p_addr = pmmu_translate_addr_with_fc_040(v_addr, fc, 1); } else { - p_addr = pmmu_translate_addr_with_fc(m68k, v_addr, fc, 1); + p_addr = pmmu_translate_addr_with_fc(v_addr, fc, 1); } - m68k->mmu_sr = m68k->mmu_tmp_sr; + m_mmu_sr = m_mmu_tmp_sr; // printf("PMMU: pc=%08x sp=%08x va=%08x pa=%08x PTEST fc=%x level=%x mmu_sr=%04x\n", -// m68k->ppc, REG_A(m68k)[7], v_addr, p_addr, fc, (modes >> 10) & 0x07, m68k->mmu_sr); +// m_ppc, REG_A()[7], v_addr, p_addr, fc, (modes >> 10) & 0x07, m_mmu_sr); if (modes & 0x100) { int areg = (modes >> 5) & 7; - WRITE_EA_32(m68k, 0x08 | areg, p_addr); + WRITE_EA_32(0x08 | areg, p_addr); } return; } @@ -956,30 +956,30 @@ void m68881_mmu_ops(m68000_base_device *m68k) switch ((modes>>10) & 0x3f) { case 0x02: // transparent translation register 0 - WRITE_EA_32(m68k, ea, m68k->mmu_tt0); -// printf("PMMU: pc=%x PMOVE from mmu_tt0=%08x\n", m68k->ppc, m68k->mmu_tt0); + WRITE_EA_32(ea, m_mmu_tt0); +// printf("PMMU: pc=%x PMOVE from mmu_tt0=%08x\n", m_ppc, m_mmu_tt0); break; case 0x03: // transparent translation register 1 - WRITE_EA_32(m68k, ea, m68k->mmu_tt1); -// printf("PMMU: pc=%x PMOVE from mmu_tt1=%08x\n", m68k->ppc, m68k->mmu_tt1); + WRITE_EA_32(ea, m_mmu_tt1); +// printf("PMMU: pc=%x PMOVE from mmu_tt1=%08x\n", m_ppc, m_mmu_tt1); break; case 0x10: // translation control register - WRITE_EA_32(m68k, ea, m68k->mmu_tc); -// printf("PMMU: pc=%x PMOVE from mmu_tc=%08x\n", m68k->ppc, m68k->mmu_tc); + WRITE_EA_32(ea, m_mmu_tc); +// printf("PMMU: pc=%x PMOVE from mmu_tc=%08x\n", m_ppc, m_mmu_tc); break; case 0x12: // supervisor root pointer - WRITE_EA_64(m68k, ea, (uint64_t)m68k->mmu_srp_limit<<32 | (uint64_t)m68k->mmu_srp_aptr); -// printf("PMMU: pc=%x PMOVE from SRP limit = %08x, aptr = %08x\n", REG_PPC(m68k), m68k->mmu_srp_limit, m68k->mmu_srp_aptr); + WRITE_EA_64(ea, (uint64_t)m_mmu_srp_limit<<32 | (uint64_t)m_mmu_srp_aptr); +// printf("PMMU: pc=%x PMOVE from SRP limit = %08x, aptr = %08x\n", m_ppc, m_mmu_srp_limit, m_mmu_srp_aptr); break; case 0x13: // CPU root pointer - WRITE_EA_64(m68k, ea, (uint64_t)m68k->mmu_crp_limit<<32 | (uint64_t)m68k->mmu_crp_aptr); -// printf("PMMU: pc=%x PMOVE from CRP limit = %08x, aptr = %08x\n", REG_PPC(m68k), m68k->mmu_crp_limit, m68k->mmu_crp_aptr); + WRITE_EA_64(ea, (uint64_t)m_mmu_crp_limit<<32 | (uint64_t)m_mmu_crp_aptr); +// printf("PMMU: pc=%x PMOVE from CRP limit = %08x, aptr = %08x\n", m_ppc, m_mmu_crp_limit, m_mmu_crp_aptr); break; default: - printf("680x0: PMOVE from unknown MMU register %x, PC %x\n", (modes>>10) & 7, m68k->pc); + printf("680x0: PMOVE from unknown MMU register %x, PC %x\n", (modes>>10) & 7, m_pc); break; } @@ -990,93 +990,93 @@ void m68881_mmu_ops(m68000_base_device *m68k) { case 0: { - uint32_t temp = READ_EA_32(m68k, ea); + uint32_t temp = READ_EA_32(ea); if (((modes>>10) & 7) == 2) { - m68k->mmu_tt0 = temp; + m_mmu_tt0 = temp; } else if (((modes>>10) & 7) == 3) { - m68k->mmu_tt1 = temp; + m_mmu_tt1 = temp; } } break; case 1: - printf("680x0: unknown PMOVE case 1, PC %x\n", m68k->pc); + printf("680x0: unknown PMOVE case 1, PC %x\n", m_pc); break; case 2: switch ((modes>>10) & 7) { case 0: // translation control register - m68k->mmu_tc = READ_EA_32(m68k, ea); -// printf("PMMU: TC = %08x\n", m68k->mmu_tc); + m_mmu_tc = READ_EA_32(ea); +// printf("PMMU: TC = %08x\n", m_mmu_tc); - if (m68k->mmu_tc & 0x80000000) + if (m_mmu_tc & 0x80000000) { - m68k->pmmu_enabled = 1; + m_pmmu_enabled = 1; // printf("PMMU enabled\n"); } else { - m68k->pmmu_enabled = 0; + m_pmmu_enabled = 0; // printf("PMMU disabled\n"); } if (!(modes & 0x100)) // flush ATC on moves to TC, SRP, CRP with FD bit clear { - pmmu_atc_flush(m68k); + pmmu_atc_flush(); } break; case 2: // supervisor root pointer - temp64 = READ_EA_64(m68k, ea); - m68k->mmu_srp_limit = (temp64>>32) & 0xffffffff; - m68k->mmu_srp_aptr = temp64 & 0xffffffff; -// printf("PMMU: SRP limit = %08x aptr = %08x\n", m68k->mmu_srp_limit, m68k->mmu_srp_aptr); + temp64 = READ_EA_64(ea); + m_mmu_srp_limit = (temp64>>32) & 0xffffffff; + m_mmu_srp_aptr = temp64 & 0xffffffff; +// printf("PMMU: SRP limit = %08x aptr = %08x\n", m_mmu_srp_limit, m_mmu_srp_aptr); if (!(modes & 0x100)) { - pmmu_atc_flush(m68k); + pmmu_atc_flush(); } break; case 3: // CPU root pointer - temp64 = READ_EA_64(m68k, ea); - m68k->mmu_crp_limit = (temp64>>32) & 0xffffffff; - m68k->mmu_crp_aptr = temp64 & 0xffffffff; -// printf("PMMU: CRP limit = %08x aptr = %08x\n", m68k->mmu_crp_limit, m68k->mmu_crp_aptr); + temp64 = READ_EA_64(ea); + m_mmu_crp_limit = (temp64>>32) & 0xffffffff; + m_mmu_crp_aptr = temp64 & 0xffffffff; +// printf("PMMU: CRP limit = %08x aptr = %08x\n", m_mmu_crp_limit, m_mmu_crp_aptr); if (!(modes & 0x100)) { - pmmu_atc_flush(m68k); + pmmu_atc_flush(); } break; case 7: // MC68851 Access Control Register - if (m68k->cpu_type == CPU_TYPE_020) + if (m_cpu_type == CPU_TYPE_020) { // DomainOS on Apollo DN3000 will only reset this to 0 - uint16_t mmu_ac = READ_EA_16(m68k, ea); + uint16_t mmu_ac = READ_EA_16(ea); if (mmu_ac != 0) { printf("680x0 PMMU: pc=%x PMOVE to mmu_ac=%08x\n", - m68k->ppc, mmu_ac); + m_ppc, mmu_ac); } break; } // fall through; unknown PMOVE mode unless MC68020 with MC68851 default: - printf("680x0: PMOVE to unknown MMU register %x, PC %x\n", (modes>>10) & 7, m68k->pc); + printf("680x0: PMOVE to unknown MMU register %x, PC %x\n", (modes>>10) & 7, m_pc); break; } break; case 3: // MMU status { - uint32_t temp = READ_EA_32(m68k, ea); - printf("680x0: unsupported PMOVE %x to MMU status, PC %x\n", temp, m68k->pc); + uint32_t temp = READ_EA_32(ea); + printf("680x0: unsupported PMOVE %x to MMU status, PC %x\n", temp, m_pc); } break; } @@ -1086,16 +1086,16 @@ void m68881_mmu_ops(m68000_base_device *m68k) case 3: // MC68030 to/from status reg if (modes & 0x200) { - WRITE_EA_16(m68k, ea, m68k->mmu_sr); + WRITE_EA_16(ea, m_mmu_sr); } else { - m68k->mmu_sr = READ_EA_16(m68k, ea); + m_mmu_sr = READ_EA_16(ea); } break; default: - printf("680x0: unknown PMOVE mode %x (modes %04x) (PC %x)\n", (modes>>13) & 0x7, modes, m68k->pc); + printf("680x0: unknown PMOVE mode %x (modes %04x) (PC %x)\n", (modes>>13) & 0x7, modes, m_pc); break; } @@ -1103,7 +1103,7 @@ void m68881_mmu_ops(m68000_base_device *m68k) break; default: - printf("680x0: unknown PMMU instruction group %d\n", (m68k->ir>>9) & 0x7); + printf("680x0: unknown PMMU instruction group %d\n", (m_ir>>9) & 0x7); break; } } @@ -1111,18 +1111,18 @@ void m68881_mmu_ops(m68000_base_device *m68k) /* Apple HMMU translation is much simpler */ -static inline uint32_t hmmu_translate_addr(m68000_base_device *m68k, uint32_t addr_in) +inline uint32_t hmmu_translate_addr(uint32_t addr_in) { uint32_t addr_out; addr_out = addr_in; // check if LC 24-bit mode is enabled - this simply blanks out A31, the V8 ignores A30-24 always - if (m68k->hmmu_enabled == M68K_HMMU_ENABLE_LC) + if (m_hmmu_enabled == M68K_HMMU_ENABLE_LC) { addr_out = addr_in & 0xffffff; } - else if (m68k->hmmu_enabled == M68K_HMMU_ENABLE_II) // the original II does a more complex translation + else if (m_hmmu_enabled == M68K_HMMU_ENABLE_II) // the original II does a more complex translation { addr_out = addr_in & 0xffffff; diff --git a/src/devices/cpu/m6809/hd6309.cpp b/src/devices/cpu/m6809/hd6309.cpp index 1b40d17e06f..0937a575542 100644 --- a/src/devices/cpu/m6809/hd6309.cpp +++ b/src/devices/cpu/m6809/hd6309.cpp @@ -126,19 +126,30 @@ March 2013 NPW: //************************************************************************** DEFINE_DEVICE_TYPE(HD6309, hd6309_device, "hd6309", "HD6309") +DEFINE_DEVICE_TYPE(HD6309E, hd6309e_device, "hd6309e", "HD6309E") //------------------------------------------------- // hd6309_device - constructor //------------------------------------------------- -hd6309_device::hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - m6809_base_device(mconfig, tag, owner, clock, HD6309, 4), +hd6309_device::hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, device_type type, int divider) : + m6809_base_device(mconfig, tag, owner, clock, type, divider), m_md(0), m_temp_im(0) { } +hd6309_device::hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + hd6309_device(mconfig, tag, owner, clock, HD6309, 4) +{ +} + +hd6309e_device::hd6309e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + hd6309_device(mconfig, tag, owner, clock, HD6309E, 1) +{ +} + //------------------------------------------------- // device_start - device-specific startup //------------------------------------------------- diff --git a/src/devices/cpu/m6809/hd6309.h b/src/devices/cpu/m6809/hd6309.h index 8e209f9f7b2..26352b6fe57 100644 --- a/src/devices/cpu/m6809/hd6309.h +++ b/src/devices/cpu/m6809/hd6309.h @@ -20,8 +20,9 @@ // TYPE DEFINITIONS //************************************************************************** -// device type definition +// device type definitions DECLARE_DEVICE_TYPE(HD6309, hd6309_device) +DECLARE_DEVICE_TYPE(HD6309E, hd6309e_device) // ======================> hd6309_device @@ -32,6 +33,9 @@ public: hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); protected: + // delegating constructor + hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, device_type type, int divider); + // device-level overrides virtual void device_start() override; virtual void device_reset() override; @@ -138,6 +142,15 @@ enum HD6309_ZERO_WORD }; +// ======================> hd6309e_device + +class hd6309e_device : public hd6309_device +{ +public: + // construction/destruction + hd6309e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + #define HD6309_IRQ_LINE M6809_IRQ_LINE /* 0 - IRQ line number */ #define HD6309_FIRQ_LINE M6809_FIRQ_LINE /* 1 - FIRQ line number */ diff --git a/src/devices/cpu/m6809/m6809.cpp b/src/devices/cpu/m6809/m6809.cpp index 42f64d5e5b2..0521b745414 100644 --- a/src/devices/cpu/m6809/m6809.cpp +++ b/src/devices/cpu/m6809/m6809.cpp @@ -77,6 +77,30 @@ March 2013 NPW: Removed unused jmp/jsr _slap functions from 6809ops.c, m6809_slapstick check moved into the opcode functions. +****************************************************************************** + + M6809 cycle timings are relative to a four-phase clock cycle defined by + the Q and E signals on pins 35 and 34. The Q clock must lead the E clock + by approximately half a cycle. On the MC6809E, Q and E are inputs, and + one 74LS74 wired as a two-stage Johnson counter is almost sufficient to + generate both (though E requires voltage levels above TTL). On the + MC6809, however, Q and E are output from an internal clock generator + which can be driven by a crystal oscillator connected to pins 38 and 39. + (The MC6809E reuses the same numbered pins for the unrelated TSC and LIC + functions.) The frequencies of Q and E on the MC6809 are that of the XTAL + divided by 4. MAME's emulation formerly assigned this internal clock + divider to the MC6809E and not to the MC6809; the confusion resulting + from this error is in the process of being straightened out. + + Maximum clock ratings: + + Q & E EXTAL + MC6809(E) 1.0 MHz 4.0 MHz + MC68A09(E) 1.5 MHz 6.0 MHz + MC68B09(E) 2.0 MHz 8.0 MHz + HD63B09(E) 2.0 MHz 8.0 MHz + HD63C09(E) 3.0 MHz 12.0 MHz + *****************************************************************************/ #include "emu.h" @@ -104,8 +128,10 @@ March 2013 NPW: // DEVICE INTERFACE //************************************************************************** -DEFINE_DEVICE_TYPE(M6809, m6809_device, "m6809", "M6809") -DEFINE_DEVICE_TYPE(M6809E, m6809e_device, "m6809e", "M6809E") +DEFINE_DEVICE_TYPE(MC6809, mc6809_device, "mc6809", "MC6809") +DEFINE_DEVICE_TYPE(MC6809E, mc6809e_device, "mc6809e", "MC6809E") +DEFINE_DEVICE_TYPE(M6809, m6809_device, "m6809", "MC6809 (legacy)") +DEFINE_DEVICE_TYPE(M6809E, m6809e_device, "m6809e", "MC6809E (legacy)") //------------------------------------------------- @@ -578,6 +604,28 @@ void m6809_base_device::mi_default::write(uint16_t adr, uint8_t val) //------------------------------------------------- +// mc6809_device +//------------------------------------------------- + +mc6809_device::mc6809_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : m6809_base_device(mconfig, tag, owner, clock, MC6809, 4) +{ +} + + + +//------------------------------------------------- +// mc6809e_device +//------------------------------------------------- + +mc6809e_device::mc6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : m6809_base_device(mconfig, tag, owner, clock, MC6809E, 1) +{ +} + + + +//------------------------------------------------- // m6809_device //------------------------------------------------- diff --git a/src/devices/cpu/m6809/m6809.h b/src/devices/cpu/m6809/m6809.h index 759e37113a5..64d28a26316 100644 --- a/src/devices/cpu/m6809/m6809.h +++ b/src/devices/cpu/m6809/m6809.h @@ -19,6 +19,8 @@ //************************************************************************** // device type definition +DECLARE_DEVICE_TYPE(MC6809, mc6809_device) +DECLARE_DEVICE_TYPE(MC6809E, mc6809e_device) DECLARE_DEVICE_TYPE(M6809, m6809_device) DECLARE_DEVICE_TYPE(M6809E, m6809e_device) @@ -292,29 +294,48 @@ private: const char *inputnum_string(int inputnum); }; -// ======================> m6809_device +// ======================> mc6809_device -class m6809_device : public m6809_base_device +class mc6809_device : public m6809_base_device { public: // construction/destruction - m6809_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + mc6809_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); }; -// ======================> m6809e_device +// ======================> mc6809e_device -#define MCFG_M6809E_LIC_CB(_devcb) \ - devcb = &m6809e_device::set_lic_cb(*device, DEVCB_##_devcb); +// MC6809E has LIC line to indicate opcode/data fetch +#define MCFG_MC6809E_LIC_CB(_devcb) \ + devcb = &mc6809e_device::set_lic_cb(*device, DEVCB_##_devcb); -class m6809e_device : public m6809_base_device +class mc6809e_device : public m6809_base_device { public: // construction/destruction - m6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + mc6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // static configuration helpers - template<class _Object> static devcb_base &set_lic_cb(device_t &device, _Object object) { return downcast<m6809e_device &>(device).m_lic_func.set_callback(object); } + template<class _Object> static devcb_base &set_lic_cb(device_t &device, _Object object) { return downcast<mc6809e_device &>(device).m_lic_func.set_callback(object); } +}; + +// ======================> m6809_device (LEGACY) + +class m6809_device : public m6809_base_device +{ +public: + // construction/destruction + m6809_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + +// ======================> m6809e_device (LEGACY) + +class m6809e_device : public m6809_base_device +{ +public: + // construction/destruction + m6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); }; enum @@ -326,6 +347,4 @@ enum #define M6809_IRQ_LINE 0 /* IRQ line number */ #define M6809_FIRQ_LINE 1 /* FIRQ line number */ -/* M6809e has LIC line to indicate opcode/data fetch */ - #endif // MAME_CPU_M6809_M6809_H diff --git a/src/devices/cpu/sm510/sm510.h b/src/devices/cpu/sm510/sm510.h index f9972a0c6e7..5d44799864d 100644 --- a/src/devices/cpu/sm510/sm510.h +++ b/src/devices/cpu/sm510/sm510.h @@ -17,7 +17,7 @@ #define MCFG_SM510_READ_K_CB(_devcb) \ devcb = &sm510_base_device::set_read_k_callback(*device, DEVCB_##_devcb); // when in halt state, any K input going High can wake up the CPU, -// driver is required to use execute_set_input(SM510_INPUT_LINE_K, state) +// driver is required to use set_input_line(SM510_INPUT_LINE_K, state) #define SM510_INPUT_LINE_K 0 // 1-bit BA(aka alpha) input pin (pull-up) diff --git a/src/devices/cpu/tms1000/tms0970.cpp b/src/devices/cpu/tms1000/tms0970.cpp index 503f95def3e..2ba98ae38a2 100644 --- a/src/devices/cpu/tms1000/tms0970.cpp +++ b/src/devices/cpu/tms1000/tms0970.cpp @@ -110,7 +110,7 @@ void tms0970_cpu_device::device_reset() if (imask & 0x40 && (imask & 0x20) == 0) msel = (op & 0xf) | (op >> 1 & 0x10); - msel = BITSWAP8(msel,7,6,5,0,1,2,3,4); // lines are reversed + msel = bitswap<8>(msel,7,6,5,0,1,2,3,4); // lines are reversed u32 mmask = m_mpla->read(msel); mmask ^= 0x09fe; // invert active-negative diff --git a/src/devices/cpu/tms1000/tms0980.cpp b/src/devices/cpu/tms1000/tms0980.cpp index 622d8ca5be4..4ca31ad4330 100644 --- a/src/devices/cpu/tms1000/tms0980.cpp +++ b/src/devices/cpu/tms1000/tms0980.cpp @@ -110,7 +110,7 @@ u32 tms0980_cpu_device::decode_fixed(u16 op) u32 tms0980_cpu_device::decode_micro(u8 sel) { u32 decode = 0; - sel = BITSWAP8(sel,7,6,0,1,2,3,4,5); // lines are reversed + sel = bitswap<8>(sel,7,6,0,1,2,3,4,5); // lines are reversed u32 mask = m_mpla->read(sel); mask ^= 0x43fc3; // invert active-negative @@ -175,7 +175,7 @@ void tms0980_cpu_device::read_opcode() { debugger_instruction_hook(this, m_rom_address); m_opcode = m_program->read_word(m_rom_address) & 0x1ff; - m_c4 = BITSWAP8(m_opcode,7,6,5,4,0,1,2,3) & 0xf; // opcode operand is bitswapped for most opcodes + m_c4 = bitswap<8>(m_opcode,7,6,5,4,0,1,2,3) & 0xf; // opcode operand is bitswapped for most opcodes m_fixed = m_fixed_decode[m_opcode]; m_micro = read_micro(); diff --git a/src/devices/cpu/tms1000/tms1000.cpp b/src/devices/cpu/tms1000/tms1000.cpp index 813f1da99f8..ce21213a1d2 100644 --- a/src/devices/cpu/tms1000/tms1000.cpp +++ b/src/devices/cpu/tms1000/tms1000.cpp @@ -8,7 +8,7 @@ TODO: - add TMS1270 (10 O pins, how does that work?) - add TMS1200C (has L input pins like TMS1600) - - add HALT input pin for TMS1000C + - add TMS1000C-specific mpla */ @@ -34,6 +34,13 @@ DEFINE_DEVICE_TYPE(TMS1700, tms1700_cpu_device, "tms1700", "TMS1700") // 28-p DEFINE_DEVICE_TYPE(TMS1730, tms1730_cpu_device, "tms1730", "TMS1730") // 20-pin DIP, same die as TMS1700, package has less pins: 6 R pins, 5 O pins (output PLA is still 8-bit, O1,O3,O5 unused) // CMOS versions (3-level stack, HALT pin) +// - RAM at top-left, ROM at top-right(rotate CCW) +// - ROM ordering is different: +// * row select is linear (0-63) +// * bit select is 7-0 instead of 0-7 +// * page select doesn't flip in the middle +// - 32-term mpla at bottom-right, different order +// - 32-term opla at bottom-left, ordered O7-O0(0 or 1), and A8,4,2,1,S DEFINE_DEVICE_TYPE(TMS1000C, tms1000c_cpu_device, "tms1000c", "TMS1000C") // 28-pin SDIP, 10 R pins // 2nd source Motorola chips @@ -122,6 +129,17 @@ MACHINE_CONFIG_MEMBER(tms1000_cpu_device::device_add_mconfig) MCFG_PLA_FILEFORMAT(BERKELEY) MACHINE_CONFIG_END +MACHINE_CONFIG_MEMBER(tms1000c_cpu_device::device_add_mconfig) + + // microinstructions PLA, output PLA + //MCFG_PLA_ADD("mpla", 8, 16, 32) + MCFG_PLA_ADD("mpla", 8, 16, 30) + MCFG_PLA_FILEFORMAT(BERKELEY) + MCFG_PLA_ADD("opla", 5, 8, 32) + MCFG_PLA_FILEFORMAT(BERKELEY) +MACHINE_CONFIG_END + + // disasm util::disasm_interface *tms1000_cpu_device::create_disassembler() { diff --git a/src/devices/cpu/tms1000/tms1000.h b/src/devices/cpu/tms1000/tms1000.h index 9e969dfc356..d5f53c890b6 100644 --- a/src/devices/cpu/tms1000/tms1000.h +++ b/src/devices/cpu/tms1000/tms1000.h @@ -69,6 +69,8 @@ public: protected: // overrides + virtual void device_add_mconfig(machine_config &config) override; + virtual void op_br() override { op_br3(); } // 3-level stack virtual void op_call() override { op_call3(); } // " virtual void op_retn() override { op_retn3(); } // " diff --git a/src/devices/cpu/tms1000/tms1100.cpp b/src/devices/cpu/tms1000/tms1100.cpp index 70c38bc72c1..9f654009bbe 100644 --- a/src/devices/cpu/tms1000/tms1100.cpp +++ b/src/devices/cpu/tms1000/tms1100.cpp @@ -4,6 +4,9 @@ TMS1000 family - TMS1100, TMS1170, TMS1300, TMS1370 + TODO: + - add TMS1100C when needed + */ #include "emu.h" @@ -15,7 +18,7 @@ DEFINE_DEVICE_TYPE(TMS1100, tms1100_cpu_device, "tms1100", "TMS1100") // 28-pin DIP, 11 R pins DEFINE_DEVICE_TYPE(TMS1170, tms1170_cpu_device, "tms1170", "TMS1170") // high voltage version DEFINE_DEVICE_TYPE(TMS1300, tms1300_cpu_device, "tms1300", "TMS1300") // 40-pin DIP, 16 R pins -DEFINE_DEVICE_TYPE(TMS1370, tms1370_cpu_device, "tms1370", "TMS1370") // high voltage version +DEFINE_DEVICE_TYPE(TMS1370, tms1370_cpu_device, "tms1370", "TMS1370") // high voltage version, also seen in 28-pin package(some O/R pins unavailable) // internal memory maps diff --git a/src/devices/cpu/tms1000/tms1k_base.cpp b/src/devices/cpu/tms1000/tms1k_base.cpp index eb389fc6bc9..eaac999b2ce 100644 --- a/src/devices/cpu/tms1000/tms1k_base.cpp +++ b/src/devices/cpu/tms1000/tms1k_base.cpp @@ -5,7 +5,7 @@ TMS1000 family - base/shared TODO: - - INIT pin + - accurate INIT pin (currently, just use INPUT_LINE_RESET) The TMS0980 and TMS1000-family MCU cores are very similar. The TMS0980 has a @@ -144,6 +144,7 @@ void tms1k_base_device::device_start() m_r = 0; m_o = 0; m_o_index = 0; + m_halt = false; m_cki_bus = 0; m_c4 = 0; m_p = 0; @@ -183,6 +184,7 @@ void tms1k_base_device::device_start() save_item(NAME(m_r)); save_item(NAME(m_o)); save_item(NAME(m_o_index)); + save_item(NAME(m_halt)); save_item(NAME(m_cki_bus)); save_item(NAME(m_c4)); save_item(NAME(m_p)); @@ -224,6 +226,14 @@ void tms1k_base_device::device_start() m_icountptr = &m_icount; } +device_memory_interface::space_config_vector tms1k_base_device::memory_space_config() const +{ + return space_config_vector { + std::make_pair(AS_PROGRAM, &m_program_config), + std::make_pair(AS_DATA, &m_data_config) + }; +} + //------------------------------------------------- @@ -259,13 +269,6 @@ void tms1k_base_device::device_reset() m_power_off(0); } -device_memory_interface::space_config_vector tms1k_base_device::memory_space_config() const -{ - return space_config_vector { - std::make_pair(AS_PROGRAM, &m_program_config), - std::make_pair(AS_DATA, &m_data_config) - }; -} //------------------------------------------------- @@ -291,7 +294,7 @@ void tms1k_base_device::read_opcode() { debugger_instruction_hook(this, m_rom_address); m_opcode = m_program->read_byte(m_rom_address); - m_c4 = BITSWAP8(m_opcode,7,6,5,4,0,1,2,3) & 0xf; // opcode operand is bitswapped for most opcodes + m_c4 = bitswap<8>(m_opcode,7,6,5,4,0,1,2,3) & 0xf; // opcode operand is bitswapped for most opcodes m_fixed = m_fixed_decode[m_opcode]; m_micro = m_micro_decode[m_opcode]; @@ -305,6 +308,15 @@ void tms1k_base_device::read_opcode() // i/o handling //------------------------------------------------- +void tms1k_base_device::execute_set_input(int line, int state) +{ + if (line != TMS1XXX_INPUT_LINE_HALT) + return; + + // HALT pin (CMOS only) + m_halt = bool(state); +} + void tms1k_base_device::write_o_output(u8 index) { // a hardcoded table is supported if the output pla is unknown @@ -597,9 +609,17 @@ void tms1k_base_device::op_sbl() void tms1k_base_device::execute_run() { - do + while (m_icount > 0) { m_icount--; + + if (m_halt) + { + // not running (output pins remain unchanged) + m_icount = 0; + return; + } + switch (m_subcycle) { case 0: @@ -722,6 +742,7 @@ void tms1k_base_device::execute_run() // execute: br/call 1/2 break; } + m_subcycle = (m_subcycle + 1) % 6; - } while (m_icount > 0); + } } diff --git a/src/devices/cpu/tms1000/tms1k_base.h b/src/devices/cpu/tms1000/tms1k_base.h index 7ddff2bb68f..b5e75ec77d2 100644 --- a/src/devices/cpu/tms1000/tms1k_base.h +++ b/src/devices/cpu/tms1000/tms1k_base.h @@ -38,6 +38,9 @@ #define MCFG_TMS1XXX_POWER_OFF_CB(_devcb) \ devcb = &tms1k_base_device::set_power_off_callback(*device, DEVCB_##_devcb); +// HALT input pin on CMOS chips (use set_input_line) +#define TMS1XXX_INPUT_LINE_HALT 0 + // pinout reference @@ -105,6 +108,7 @@ protected: virtual u32 execute_min_cycles() const override { return 1; } virtual u32 execute_max_cycles() const override { return 6; } virtual u32 execute_input_lines() const override { return 1; } + virtual void execute_set_input(int line, int state) override; virtual void execute_run() override; // device_memory_interface overrides @@ -214,50 +218,51 @@ protected: optional_device<pla_device> m_opla; optional_device<pla_device> m_spla; - u8 m_pc; // 6 or 7-bit program counter - u32 m_sr; // 6 or 7-bit subroutine return register(s) - u8 m_pa; // 4-bit page address register - u8 m_pb; // 4-bit page buffer register - u16 m_ps; // 4-bit page subroutine register(s) - u8 m_a; // 4-bit accumulator - u8 m_x; // 2,3,or 4-bit RAM X register - u8 m_y; // 4-bit RAM Y register - u8 m_ca; // chapter address register - u8 m_cb; // chapter buffer register - u16 m_cs; // chapter subroutine register(s) - u16 m_r; - u16 m_o; - u8 m_cki_bus; - u8 m_c4; - u8 m_p; // 4-bit adder p(lus)-input - u8 m_n; // 4-bit adder n(egative)-input - u8 m_adder_out; // adder result - u8 m_carry_in; // adder carry-in bit - u8 m_carry_out; // adder carry-out bit - u8 m_status; - u8 m_status_latch; - u8 m_eac; // end around carry bit - u8 m_clatch; // call latch bit(s) - u8 m_add; // add latch bit - u8 m_bl; // branch latch bit - - u8 m_ram_in; - u8 m_dam_in; - int m_ram_out; // signed! - u8 m_ram_address; - u16 m_rom_address; - u16 m_opcode; - u32 m_fixed; - u32 m_micro; - int m_subcycle; - int m_icount; - u8 m_o_index; - - u8 m_o_pins; // how many O pins - u8 m_r_pins; // how many R pins - u8 m_pc_bits; // how many program counter bits - u8 m_byte_bits; // how many bits per 'byte' - u8 m_x_bits; // how many X register bits + u8 m_pc; // 6 or 7-bit program counter + u32 m_sr; // 6 or 7-bit subroutine return register(s) + u8 m_pa; // 4-bit page address register + u8 m_pb; // 4-bit page buffer register + u16 m_ps; // 4-bit page subroutine register(s) + u8 m_a; // 4-bit accumulator + u8 m_x; // 2,3,or 4-bit RAM X register + u8 m_y; // 4-bit RAM Y register + u8 m_ca; // chapter address register + u8 m_cb; // chapter buffer register + u16 m_cs; // chapter subroutine register(s) + u16 m_r; + u16 m_o; + u8 m_cki_bus; + u8 m_c4; + u8 m_p; // 4-bit adder p(lus)-input + u8 m_n; // 4-bit adder n(egative)-input + u8 m_adder_out; // adder result + u8 m_carry_in; // adder carry-in bit + u8 m_carry_out; // adder carry-out bit + u8 m_status; + u8 m_status_latch; + u8 m_eac; // end around carry bit + u8 m_clatch; // call latch bit(s) + u8 m_add; // add latch bit + u8 m_bl; // branch latch bit + + u8 m_ram_in; + u8 m_dam_in; + int m_ram_out; // signed! + u8 m_ram_address; + u16 m_rom_address; + u16 m_opcode; + u32 m_fixed; + u32 m_micro; + int m_subcycle; + int m_icount; + u8 m_o_index; + bool m_halt; // halt pin state + + u8 m_o_pins; // how many O pins + u8 m_r_pins; // how many R pins + u8 m_pc_bits; // how many program counter bits + u8 m_byte_bits; // how many bits per 'byte' + u8 m_x_bits; // how many X register bits address_space *m_program; address_space *m_data; diff --git a/src/devices/cpu/tms1000/tp0320.cpp b/src/devices/cpu/tms1000/tp0320.cpp index 64ebdb3365a..8f10c9f2b62 100644 --- a/src/devices/cpu/tms1000/tp0320.cpp +++ b/src/devices/cpu/tms1000/tp0320.cpp @@ -67,7 +67,7 @@ u32 tp0320_cpu_device::decode_micro(u8 sel) { u32 decode = 0; - sel = BITSWAP8(sel,7,6,0,1,2,3,4,5); // lines are reversed + sel = bitswap<8>(sel,7,6,0,1,2,3,4,5); // lines are reversed u32 mask = m_mpla->read(sel); mask ^= 0x0bff0; // invert active-negative diff --git a/src/devices/cpu/tms34010/34010gfx.hxx b/src/devices/cpu/tms34010/34010gfx.hxx index 410b2d3a06a..eaab6863913 100644 --- a/src/devices/cpu/tms34010/34010gfx.hxx +++ b/src/devices/cpu/tms34010/34010gfx.hxx @@ -207,7 +207,7 @@ int tms340x0_device::compute_pixblt_b_cycles(int left_partials, int right_partia /* Shift register handling */ void tms340x0_device::memory_w(address_space &space, offs_t offset,uint16_t data) { - logerror("memory_w %08x %04x\n", offset << 3, data); + //logerror("memory_w %08x %04x\n", offset << 3, data); if((offset << 3) == 0x02005010 && data == 0x0000) { machine().debug_break(); // abort(); @@ -222,7 +222,7 @@ uint16_t tms340x0_device::memory_r(address_space &space, offs_t offset) void tms340x0_device::shiftreg_w(address_space &space, offs_t offset,uint16_t data) { - logerror("shiftreg_w %08x %04x\n", offset << 3, data); + //logerror("shiftreg_w %08x %04x\n", offset << 3, data); if (!m_from_shiftreg_cb.isnull()) m_from_shiftreg_cb(space, offset, &m_shiftreg[0]); else diff --git a/src/devices/cpu/tms9900/tms9995.cpp b/src/devices/cpu/tms9900/tms9995.cpp index 542f51f88ae..826932ceca6 100644 --- a/src/devices/cpu/tms9900/tms9995.cpp +++ b/src/devices/cpu/tms9900/tms9995.cpp @@ -349,10 +349,10 @@ void tms9995_device::device_reset() const char* tms9995_device::s_statename[20] = { - "PC ", "WP ", "ST ", "IR ", - "R0 ", "R1 ", "R2 ", "R3 ", - "R4 ", "R5 ", "R6 ", "R7 ", - "R8 ", "R9 ", "R10", "R11", + "PC", "WP", "ST", "IR", + "R0", "R1", "R2", "R3", + "R4", "R5", "R6", "R7", + "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15" }; diff --git a/src/devices/cpu/uml.h b/src/devices/cpu/uml.h index 1b60d46cd8b..be32dedd724 100644 --- a/src/devices/cpu/uml.h +++ b/src/devices/cpu/uml.h @@ -73,20 +73,20 @@ namespace uml COND_NV, // requires V COND_U, // requires U COND_NU, // requires U - COND_A, // requires CZ - COND_BE, // requires CZ - COND_G, // requires SVZ - COND_LE, // requires SVZ - COND_L, // requires SV - COND_GE, // requires SV + COND_A, // requires CZ, unsigned + COND_BE, // requires CZ, unsigned + COND_G, // requires SVZ, signed + COND_LE, // requires SVZ, signed + COND_L, // requires SV, signed + COND_GE, // requires SV, signed COND_MAX, // basic condition code aliases COND_E = COND_Z, COND_NE = COND_NZ, - COND_B = COND_C, - COND_AE = COND_NC + COND_B = COND_C, // unsigned + COND_AE = COND_NC // unsigned }; // floating point rounding modes diff --git a/src/devices/cpu/upd7725/upd7725.cpp b/src/devices/cpu/upd7725/upd7725.cpp index 716fa45ccf9..c805c5bbc14 100644 --- a/src/devices/cpu/upd7725/upd7725.cpp +++ b/src/devices/cpu/upd7725/upd7725.cpp @@ -398,7 +398,7 @@ void necdsp_device::exec_op(uint32_t opcode) { case 9: regs.idb = regs.dr; break; case 10: regs.idb = regs.sr; break; case 11: regs.idb = regs.si; break; //MSB = first bit in from serial, 'natural' SI register order - case 12: regs.idb = BITSWAP16(regs.si, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); break; //LSB = first bit in from serial, 'reversed' SI register order + case 12: regs.idb = bitswap<16>(regs.si, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); break; //LSB = first bit in from serial, 'reversed' SI register order case 13: regs.idb = regs.k; break; case 14: regs.idb = regs.l; break; case 15: regs.idb = dataRAM[regs.dp]; break; @@ -586,7 +586,7 @@ void necdsp_device::exec_ld(uint32_t opcode) { m_out_p0_cb(regs.sr.p0); m_out_p1_cb(regs.sr.p1); break; - case 8: regs.so = BITSWAP16(id, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); break; //LSB first output, output tapped at bit 15 shifting left + case 8: regs.so = bitswap<16>(id, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); break; //LSB first output, output tapped at bit 15 shifting left case 9: regs.so = id; break; //MSB first output, output tapped at bit 15 shifting left case 10: regs.k = id; break; case 11: regs.k = id; regs.l = m_data->read_word(regs.rp); break; diff --git a/src/devices/machine/6522via.cpp b/src/devices/machine/6522via.cpp index ae1b7da0f61..a4ba3e58478 100644 --- a/src/devices/machine/6522via.cpp +++ b/src/devices/machine/6522via.cpp @@ -4,9 +4,6 @@ Rockwell 6522 VIA interface and emulation - This function emulates the functionality of up to 8 6522 - versatile interface adapters. - This is based on the M6821 emulation in MAME. To do: @@ -211,12 +208,6 @@ void via6522_device::device_start() m_shift_timer = timer_alloc(TIMER_SHIFT); m_shift_irq_timer = timer_alloc(TIMER_SHIFT_IRQ); - /* Default clock is from CPU1 */ - if (clock() == 0) - { - set_unscaled_clock(machine().firstcpu->clock()); - } - /* save state register */ save_item(NAME(m_in_a)); save_item(NAME(m_in_ca1)); diff --git a/src/devices/machine/68307.cpp b/src/devices/machine/68307.cpp index adc65ce199b..e3ce8bc549d 100644 --- a/src/devices/machine/68307.cpp +++ b/src/devices/machine/68307.cpp @@ -23,17 +23,13 @@ DEFINE_DEVICE_TYPE(M68307, m68307_cpu_device, "mc68307", "MC68307") */ READ8_MEMBER( m68307_cpu_device::m68307_internal_serial_r ) { - m68307_cpu_device *m68k = this; - - if (offset&1) return m_duart->read(*m68k->program, offset>>1); + if (offset&1) return m_duart->read(*m_program, offset>>1); return 0x0000; } WRITE8_MEMBER(m68307_cpu_device::m68307_internal_serial_w) { - m68307_cpu_device *m68k = this; - - if (offset & 1) m_duart->write(*m68k->program, offset >> 1, data); + if (offset & 1) m_duart->write(*m_program, offset >> 1, data); } @@ -55,20 +51,20 @@ MACHINE_CONFIG_END m68307_cpu_device::m68307_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : m68000_device(mconfig, tag, owner, clock, M68307, 16, 24, ADDRESS_MAP_NAME(m68307_internal_map)), - write_irq(*this), - write_a_tx(*this), - write_b_tx(*this), - read_inport(*this), - write_outport(*this), + m_write_irq(*this), + m_write_a_tx(*this), + m_write_b_tx(*this), + m_read_inport(*this), + m_write_outport(*this), m_duart(*this, "internal68681") { - m68307SIM = nullptr; - m68307MBUS = nullptr; - m68307TIMER = nullptr; - m68307_base = 0; - m68307_scrhigh = 0; - m68307_scrlow = 0; - m68307_currentcs = 0; + m_m68307SIM = nullptr; + m_m68307MBUS = nullptr; + m_m68307TIMER = nullptr; + m_m68307_base = 0; + m_m68307_scrhigh = 0; + m_m68307_scrlow = 0; + m_m68307_currentcs = 0; } @@ -80,13 +76,13 @@ void m68307_cpu_device::device_reset() { m68000_device::device_reset(); - if (m68307SIM) m68307SIM->reset(); - if (m68307MBUS) m68307MBUS->reset(); - if (m68307TIMER) m68307TIMER->reset(); + if (m_m68307SIM) m_m68307SIM->reset(); + if (m_m68307MBUS) m_m68307MBUS->reset(); + if (m_m68307TIMER) m_m68307TIMER->reset(); - m68307_base = 0xbfff; - m68307_scrhigh = 0x0007; - m68307_scrlow = 0xf010; + m_m68307_base = 0xbfff; + m_m68307_scrhigh = 0x0007; + m_m68307_scrlow = 0xf010; } @@ -97,7 +93,7 @@ void m68307_cpu_device::device_reset() inline int m68307_cpu_device::calc_cs(offs_t address) const { - m68307_sim const &sim = *m68307SIM; + m68307_sim const &sim = *m_m68307SIM; for (int i=0; i < 4; i++) { int const br = sim.m_br[i] & 1; @@ -112,43 +108,43 @@ inline int m68307_cpu_device::calc_cs(offs_t address) const uint16_t m68307_cpu_device::simple_read_immediate_16_m68307(offs_t address) { -// m68307_currentcs = calc_cs(address); +// m_m68307_currentcs = calc_cs(address); return m_direct->read_word(address); } uint8_t m68307_cpu_device::read_byte_m68307(offs_t address) { -// m68307_currentcs = calc_cs(address); +// m_m68307_currentcs = calc_cs(address); return m_space->read_byte(address); } uint16_t m68307_cpu_device::read_word_m68307(offs_t address) { -// m68307_currentcs = calc_cs(address); +// m_m68307_currentcs = calc_cs(address); return m_space->read_word(address); } uint32_t m68307_cpu_device::read_dword_m68307(offs_t address) { -// m68307_currentcs = calc_cs(address); +// m_m68307_currentcs = calc_cs(address); return m_space->read_dword(address); } void m68307_cpu_device::write_byte_m68307(offs_t address, uint8_t data) { -// m68307_currentcs = calc_cs(address); +// m_m68307_currentcs = calc_cs(address); m_space->write_byte(address, data); } void m68307_cpu_device::write_word_m68307(offs_t address, uint16_t data) { -// m68307_currentcs = calc_cs(address); +// m_m68307_currentcs = calc_cs(address); m_space->write_word(address, data); } void m68307_cpu_device::write_dword_m68307(offs_t address, uint32_t data) { -// m68307_currentcs = calc_cs(address); +// m_m68307_currentcs = calc_cs(address); m_space->write_dword(address, data); } @@ -159,15 +155,15 @@ void m68307_cpu_device::init16_m68307(address_space &space) { m_space = &space; m_direct = space.direct<0>(); - opcode_xor = 0; - - readimm16 = m68k_readimm16_delegate(&m68307_cpu_device::simple_read_immediate_16_m68307, this); - read8 = m68k_read8_delegate(&m68307_cpu_device::read_byte_m68307, this); - read16 = m68k_read16_delegate(&m68307_cpu_device::read_word_m68307, this); - read32 = m68k_read32_delegate(&m68307_cpu_device::read_dword_m68307, this); - write8 = m68k_write8_delegate(&m68307_cpu_device::write_byte_m68307, this); - write16 = m68k_write16_delegate(&m68307_cpu_device::write_word_m68307, this); - write32 = m68k_write32_delegate(&m68307_cpu_device::write_dword_m68307, this); + m_opcode_xor = 0; + + m_readimm16 = m68k_readimm16_delegate(&m68307_cpu_device::simple_read_immediate_16_m68307, this); + m_read8 = m68k_read8_delegate(&m68307_cpu_device::read_byte_m68307, this); + m_read16 = m68k_read16_delegate(&m68307_cpu_device::read_word_m68307, this); + m_read32 = m68k_read32_delegate(&m68307_cpu_device::read_dword_m68307, this); + m_write8 = m68k_write8_delegate(&m68307_cpu_device::write_byte_m68307, this); + m_write16 = m68k_write16_delegate(&m68307_cpu_device::write_word_m68307, this); + m_write32 = m68k_write32_delegate(&m68307_cpu_device::write_dword_m68307, this); } @@ -190,9 +186,9 @@ void m68307_cpu_device::set_port_callbacks( uint16_t m68307_cpu_device::get_cs(offs_t address) { - m68307_currentcs = calc_cs(address); + m_m68307_currentcs = calc_cs(address); - return m68307_currentcs; + return m_m68307_currentcs; } @@ -205,22 +201,22 @@ void m68307_cpu_device::set_interrupt(int level, int vector) void m68307_cpu_device::timer0_interrupt() { - int prioritylevel = (m68307SIM->m_picr & 0x7000)>>12; - int vector = (m68307SIM->m_pivr & 0x00f0) | 0xa; + int prioritylevel = (m_m68307SIM->m_picr & 0x7000)>>12; + int vector = (m_m68307SIM->m_pivr & 0x00f0) | 0xa; set_interrupt(prioritylevel, vector); } void m68307_cpu_device::timer1_interrupt() { - int prioritylevel = (m68307SIM->m_picr & 0x0700)>>8; - int vector = (m68307SIM->m_pivr & 0x00f0) | 0xb; + int prioritylevel = (m_m68307SIM->m_picr & 0x0700)>>8; + int vector = (m_m68307SIM->m_pivr & 0x00f0) | 0xb; set_interrupt(prioritylevel, vector); } void m68307_cpu_device::serial_interrupt(int vector) { - int prioritylevel = (m68307SIM->m_picr & 0x0070)>>4; + int prioritylevel = (m_m68307SIM->m_picr & 0x0070)>>4; set_interrupt(prioritylevel, vector); } @@ -234,16 +230,16 @@ WRITE_LINE_MEMBER(m68307_cpu_device::m68307_duart_irq_handler) void m68307_cpu_device::mbus_interrupt() { - int prioritylevel = (m68307SIM->m_picr & 0x0007)>>0; - int vector = (m68307SIM->m_pivr & 0x00f0) | 0xd; + int prioritylevel = (m_m68307SIM->m_picr & 0x0007)>>0; + int vector = (m_m68307SIM->m_pivr & 0x00f0) | 0xd; set_interrupt(prioritylevel, vector); } void m68307_cpu_device::licr2_interrupt() { - int prioritylevel = (m68307SIM->m_licr2 & 0x0007)>>0; - int vector = (m68307SIM->m_pivr & 0x00f0) | 0x9; - m68307SIM->m_licr2 |= 0x8; + int prioritylevel = (m_m68307SIM->m_licr2 & 0x0007)>>0; + int vector = (m_m68307SIM->m_pivr & 0x00f0) | 0x9; + m_m68307SIM->m_licr2 |= 0x8; set_interrupt(prioritylevel, vector); @@ -257,28 +253,28 @@ void m68307_cpu_device::device_start() set via remappable register */ - init16_m68307(*program); + init16_m68307(*m_program); - m68307SIM = new m68307_sim(); - m68307MBUS = new m68307_mbus(); - m68307TIMER = new m68307_timer(); + m_m68307SIM = new m68307_sim(); + m_m68307MBUS = new m68307_mbus(); + m_m68307TIMER = new m68307_timer(); - m68307TIMER->init(this); + m_m68307TIMER->init(this); - m68307SIM->reset(); - m68307MBUS->reset(); - m68307TIMER->reset(); + m_m68307SIM->reset(); + m_m68307MBUS->reset(); + m_m68307TIMER->reset(); - internal = &this->space(AS_PROGRAM); - m68307_base = 0xbfff; - m68307_scrhigh = 0x0007; - m68307_scrlow = 0xf010; + m_internal = &space(AS_PROGRAM); + m_m68307_base = 0xbfff; + m_m68307_scrhigh = 0x0007; + m_m68307_scrlow = 0xf010; - write_irq.resolve_safe(); - write_a_tx.resolve_safe(); - write_b_tx.resolve_safe(); - read_inport.resolve(); - write_outport.resolve_safe(); + m_write_irq.resolve_safe(); + m_write_a_tx.resolve_safe(); + m_write_b_tx.resolve_safe(); + m_read_inport.resolve(); + m_write_outport.resolve_safe(); set_port_callbacks(porta_read_delegate(), porta_write_delegate(), portb_read_delegate(), portb_write_delegate()); } @@ -287,16 +283,14 @@ void m68307_cpu_device::device_start() READ16_MEMBER( m68307_cpu_device::m68307_internal_base_r ) { - m68307_cpu_device *m68k = this; - int pc = space.device().safe_pc(); logerror("%08x m68307_internal_base_r %08x, (%04x)\n", pc, offset*2,mem_mask); switch (offset<<1) { - case 0x2: return m68k->m68307_base; - case 0x4: return m68k->m68307_scrhigh; - case 0x6: return m68k->m68307_scrlow; + case 0x2: return m_m68307_base; + case 0x4: return m_m68307_scrhigh; + case 0x6: return m_m68307_scrlow; } logerror("(read was illegal?)\n"); @@ -306,8 +300,6 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_base_r ) WRITE16_MEMBER( m68307_cpu_device::m68307_internal_base_w ) { - m68307_cpu_device *m68k = this; - int pc = space.device().safe_pc(); logerror("%08x m68307_internal_base_w %08x, %04x (%04x)\n", pc, offset*2,data,mem_mask); int base; @@ -317,35 +309,35 @@ WRITE16_MEMBER( m68307_cpu_device::m68307_internal_base_w ) { case 0x2: /* remove old internal handler */ - base = (m68k->m68307_base & 0x0fff) << 12; - //mask = (m68k->m68307_base & 0xe000) >> 13; - //if ( m68k->m68307_base & 0x1000 ) mask |= 7; - m68k->internal->unmap_readwrite(base+0x000, base+0x04f); - m68k->internal->unmap_readwrite(base+0x100, base+0x11f); - m68k->internal->unmap_readwrite(base+0x120, base+0x13f); - m68k->internal->unmap_readwrite(base+0x140, base+0x149); + base = (m_m68307_base & 0x0fff) << 12; + //mask = (m_m68307_base & 0xe000) >> 13; + //if ( m_m68307_base & 0x1000 ) mask |= 7; + m_internal->unmap_readwrite(base+0x000, base+0x04f); + m_internal->unmap_readwrite(base+0x100, base+0x11f); + m_internal->unmap_readwrite(base+0x120, base+0x13f); + m_internal->unmap_readwrite(base+0x140, base+0x149); /* store new base address */ - COMBINE_DATA(&m68k->m68307_base); + COMBINE_DATA(&m_m68307_base); /* install new internal handler */ - base = (m68k->m68307_base & 0x0fff) << 12; - //mask = (m68k->m68307_base & 0xe000) >> 13; - //if ( m68k->m68307_base & 0x1000 ) mask |= 7; - m68k->internal->install_readwrite_handler(base + 0x000, base + 0x04f, read16_delegate(FUNC(m68307_cpu_device::m68307_internal_sim_r),this), write16_delegate(FUNC(m68307_cpu_device::m68307_internal_sim_w),this)); - m68k->internal->install_readwrite_handler(base + 0x100, base + 0x11f, read8_delegate(FUNC(m68307_cpu_device::m68307_internal_serial_r),this), write8_delegate(FUNC(m68307_cpu_device::m68307_internal_serial_w),this), 0xffff); - m68k->internal->install_readwrite_handler(base + 0x120, base + 0x13f, read16_delegate(FUNC(m68307_cpu_device::m68307_internal_timer_r),this), write16_delegate(FUNC(m68307_cpu_device::m68307_internal_timer_w),this)); - m68k->internal->install_readwrite_handler(base + 0x140, base + 0x149, read8_delegate(FUNC(m68307_cpu_device::m68307_internal_mbus_r),this), write8_delegate(FUNC(m68307_cpu_device::m68307_internal_mbus_w),this), 0xffff); + base = (m_m68307_base & 0x0fff) << 12; + //mask = (m_m68307_base & 0xe000) >> 13; + //if ( m_m68307_base & 0x1000 ) mask |= 7; + m_internal->install_readwrite_handler(base + 0x000, base + 0x04f, read16_delegate(FUNC(m68307_cpu_device::m68307_internal_sim_r),this), write16_delegate(FUNC(m68307_cpu_device::m68307_internal_sim_w),this)); + m_internal->install_readwrite_handler(base + 0x100, base + 0x11f, read8_delegate(FUNC(m68307_cpu_device::m68307_internal_serial_r),this), write8_delegate(FUNC(m68307_cpu_device::m68307_internal_serial_w),this), 0xffff); + m_internal->install_readwrite_handler(base + 0x120, base + 0x13f, read16_delegate(FUNC(m68307_cpu_device::m68307_internal_timer_r),this), write16_delegate(FUNC(m68307_cpu_device::m68307_internal_timer_w),this)); + m_internal->install_readwrite_handler(base + 0x140, base + 0x149, read8_delegate(FUNC(m68307_cpu_device::m68307_internal_mbus_r),this), write8_delegate(FUNC(m68307_cpu_device::m68307_internal_mbus_w),this), 0xffff); break; case 0x4: - COMBINE_DATA(&m68k->m68307_scrhigh); + COMBINE_DATA(&m_m68307_scrhigh); break; case 0x6: - COMBINE_DATA(&m68k->m68307_scrlow); + COMBINE_DATA(&m_m68307_scrlow); break; default: diff --git a/src/devices/machine/68307.h b/src/devices/machine/68307.h index a64c9985ce9..4c4d9b90cb3 100644 --- a/src/devices/machine/68307.h +++ b/src/devices/machine/68307.h @@ -36,11 +36,11 @@ public: m68307_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); /* trampolines so we can specify the 68681 serial configuration when adding the CPU */ - template <class Object> static devcb_base &set_irq_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).write_irq.set_callback(std::forward<Object>(cb)); } - template <class Object> static devcb_base &set_a_tx_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).write_a_tx.set_callback(std::forward<Object>(cb)); } - template <class Object> static devcb_base &set_b_tx_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).write_b_tx.set_callback(std::forward<Object>(cb)); } - template <class Object> static devcb_base &set_inport_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).read_inport.set_callback(std::forward<Object>(cb)); } - template <class Object> static devcb_base &set_outport_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).write_outport.set_callback(std::forward<Object>(cb)); } + template <class Object> static devcb_base &set_irq_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).m_write_irq.set_callback(std::forward<Object>(cb)); } + template <class Object> static devcb_base &set_a_tx_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).m_write_a_tx.set_callback(std::forward<Object>(cb)); } + template <class Object> static devcb_base &set_b_tx_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).m_write_b_tx.set_callback(std::forward<Object>(cb)); } + template <class Object> static devcb_base &set_inport_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).m_read_inport.set_callback(std::forward<Object>(cb)); } + template <class Object> static devcb_base &set_outport_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).m_write_outport.set_callback(std::forward<Object>(cb)); } uint16_t simple_read_immediate_16_m68307(offs_t address); @@ -87,30 +87,30 @@ protected: void mbus_interrupt(); DECLARE_WRITE_LINE_MEMBER(m68307_duart_irq_handler); - DECLARE_WRITE_LINE_MEMBER(m68307_duart_txa) { write_a_tx(state); } - DECLARE_WRITE_LINE_MEMBER(m68307_duart_txb) { write_b_tx(state); } - DECLARE_READ8_MEMBER(m68307_duart_input_r) { return read_inport(); } - DECLARE_WRITE8_MEMBER(m68307_duart_output_w) { write_outport(data); } + DECLARE_WRITE_LINE_MEMBER(m68307_duart_txa) { m_write_a_tx(state); } + DECLARE_WRITE_LINE_MEMBER(m68307_duart_txb) { m_write_b_tx(state); } + DECLARE_READ8_MEMBER(m68307_duart_input_r) { return m_read_inport(); } + DECLARE_WRITE8_MEMBER(m68307_duart_output_w) { m_write_outport(data); } void init16_m68307(address_space &space); int calc_cs(offs_t address) const; - devcb_write_line write_irq, write_a_tx, write_b_tx; - devcb_read8 read_inport; - devcb_write8 write_outport; + devcb_write_line m_write_irq, m_write_a_tx, m_write_b_tx; + devcb_read8 m_read_inport; + devcb_write8 m_write_outport; /* 68307 peripheral modules */ - m68307_sim* m68307SIM; - m68307_mbus* m68307MBUS; -// m68307_serial* m68307SERIAL; - m68307_timer* m68307TIMER; + m68307_sim* m_m68307SIM; + m68307_mbus* m_m68307MBUS; +// m68307_serial* m_m68307SERIAL; + m68307_timer* m_m68307TIMER; - uint16_t m68307_base; - uint16_t m68307_scrhigh; - uint16_t m68307_scrlow; + uint16_t m_m68307_base; + uint16_t m_m68307_scrhigh; + uint16_t m_m68307_scrlow; - int m68307_currentcs; + int m_m68307_currentcs; porta_read_delegate m_porta_r; porta_write_delegate m_porta_w; diff --git a/src/devices/machine/68307bus.cpp b/src/devices/machine/68307bus.cpp index 3eea5a0811d..84e165ef919 100644 --- a/src/devices/machine/68307bus.cpp +++ b/src/devices/machine/68307bus.cpp @@ -15,8 +15,8 @@ READ8_MEMBER( m68307_cpu_device::m68307_internal_mbus_r ) { - assert(m68307MBUS); - m68307_mbus &mbus = *m68307MBUS; + assert(m_m68307MBUS); + m68307_mbus &mbus = *m_m68307MBUS; uint8_t retval; int pc = space.device().safe_pc(); @@ -59,8 +59,8 @@ READ8_MEMBER( m68307_cpu_device::m68307_internal_mbus_r ) WRITE8_MEMBER( m68307_cpu_device::m68307_internal_mbus_w ) { - assert(m68307MBUS); - m68307_mbus &mbus = *m68307MBUS; + assert(m_m68307MBUS); + m68307_mbus &mbus = *m_m68307MBUS; int pc = space.device().safe_pc(); diff --git a/src/devices/machine/68307sim.cpp b/src/devices/machine/68307sim.cpp index 2913d64e0a5..d38b20ba391 100644 --- a/src/devices/machine/68307sim.cpp +++ b/src/devices/machine/68307sim.cpp @@ -32,8 +32,8 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_sim_r ) { - assert(m68307SIM); - m68307_sim &sim = *m68307SIM; + assert(m_m68307SIM); + m68307_sim &sim = *m_m68307SIM; int pc = space.device().safe_pc(); @@ -64,8 +64,8 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_sim_r ) WRITE16_MEMBER( m68307_cpu_device::m68307_internal_sim_w ) { - assert(m68307SIM); - m68307_sim &sim = *m68307SIM; + assert(m_m68307SIM); + m68307_sim &sim = *m_m68307SIM; int pc = space.device().safe_pc(); diff --git a/src/devices/machine/68307tmu.cpp b/src/devices/machine/68307tmu.cpp index c83a0855f29..a4a4baf31f8 100644 --- a/src/devices/machine/68307tmu.cpp +++ b/src/devices/machine/68307tmu.cpp @@ -17,8 +17,8 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_timer_r ) { - assert(m68307TIMER); - m68307_timer &timer = *m68307TIMER; + assert(m_m68307TIMER); + m68307_timer &timer = *m_m68307TIMER; int pc = space.device().safe_pc(); int which = offset & 0x8; @@ -39,8 +39,8 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_timer_r ) WRITE16_MEMBER( m68307_cpu_device::m68307_internal_timer_w ) { - assert(m68307TIMER); - m68307_timer &timer = *m68307TIMER; + assert(m_m68307TIMER); + m68307_timer &timer = *m_m68307TIMER; int pc = space.device().safe_pc(); int which = offset & 0x8; @@ -102,7 +102,7 @@ WRITE16_MEMBER( m68307_cpu_device::m68307_internal_timer_w ) TIMER_CALLBACK_MEMBER(m68307_cpu_device::m68307_timer::timer0_callback ) { m68307_cpu_device* m68k = (m68307_cpu_device *)ptr; - single_timer* tptr = &m68k->m68307TIMER->singletimer[0]; + single_timer* tptr = &m68k->m_m68307TIMER->singletimer[0]; tptr->regs[m68307TIMER_TMR] |= 0x2; m68k->timer0_interrupt(); @@ -113,7 +113,7 @@ TIMER_CALLBACK_MEMBER(m68307_cpu_device::m68307_timer::timer0_callback ) TIMER_CALLBACK_MEMBER(m68307_cpu_device::m68307_timer::timer1_callback ) { m68307_cpu_device* m68k = (m68307_cpu_device *)ptr; - single_timer* tptr = &m68k->m68307TIMER->singletimer[1]; + single_timer* tptr = &m68k->m_m68307TIMER->singletimer[1]; tptr->regs[m68307TIMER_TMR] |= 0x2; m68k->timer1_interrupt(); diff --git a/src/devices/machine/68340.cpp b/src/devices/machine/68340.cpp index 3427fb6c7e3..2701909f18b 100644 --- a/src/devices/machine/68340.cpp +++ b/src/devices/machine/68340.cpp @@ -11,17 +11,17 @@ DEFINE_DEVICE_TYPE(M68340, m68340_cpu_device, "mc68340", "MC68340") int m68340_cpu_device::calc_cs(offs_t address) const { - if ( !(m68340SIM->m_ba[0] & 1) ) return 1; + if ( !(m_m68340SIM->m_ba[0] & 1) ) return 1; for (int i=0;i<4;i++) { - if (m68340SIM->m_ba[i] & 1) + if (m_m68340SIM->m_ba[i] & 1) { - int mask = ((m68340SIM->m_am[i]&0xffffff00) | 0xff); - int base = m68340SIM->m_ba[i] & 0xffffff00; - int fcmask = (m68340SIM->m_am[i] & 0xf0); - int fcbase = (m68340SIM->m_ba[i] & 0xf0) & ~(m68340SIM->m_am[i] & 0xf0); - int fc = mmu_tmp_fc; + int mask = ((m_m68340SIM->m_am[i]&0xffffff00) | 0xff); + int base = m_m68340SIM->m_ba[i] & 0xffffff00; + int fcmask = (m_m68340SIM->m_am[i] & 0xf0); + int fcbase = (m_m68340SIM->m_ba[i] & 0xf0) & ~(m_m68340SIM->m_am[i] & 0xf0); + int fc = m_mmu_tmp_fc; if ((address & ~mask) == base && ((fc << 4) & ~fcmask ) == fcbase ) return i+1; } @@ -45,58 +45,56 @@ uint16_t m68340_cpu_device::get_cs(offs_t address) READ32_MEMBER( m68340_cpu_device::m68340_internal_base_r ) { - int pc = space.device().safe_pc(); - logerror("%08x m68340_internal_base_r %08x, (%08x)\n", pc, offset*4,mem_mask); - return m68340_base; + logerror("%08x m68340_internal_base_r %08x, (%08x)\n", m_ppc, offset*4,mem_mask); + return m_m68340_base; } WRITE32_MEMBER( m68340_cpu_device::m68340_internal_base_w ) { - int pc = space.device().safe_pc(); - logerror("%08x m68340_internal_base_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask); + logerror("%08x m68340_internal_base_w %08x, %08x (%08x)\n", m_ppc, offset*4,data,mem_mask); // other conditions? - if (dfc==0x7) + if (m_dfc==0x7) { // unmap old modules - if (m68340_base&1) + if (m_m68340_base&1) { - int base = m68340_base & 0xfffff000; + int base = m_m68340_base & 0xfffff000; - internal->unmap_readwrite(base + 0x000, base + 0x05f); - internal->unmap_readwrite(base + 0x600, base + 0x67f); - internal->unmap_readwrite(base + 0x700, base + 0x723); - internal->unmap_readwrite(base + 0x780, base + 0x7bf); + m_internal->unmap_readwrite(base + 0x000, base + 0x05f); + m_internal->unmap_readwrite(base + 0x600, base + 0x67f); + m_internal->unmap_readwrite(base + 0x700, base + 0x723); + m_internal->unmap_readwrite(base + 0x780, base + 0x7bf); } - COMBINE_DATA(&m68340_base); - logerror("%08x m68340_internal_base_w %08x, %08x (%08x) (m68340_base write)\n", pc, offset*4,data,mem_mask); + COMBINE_DATA(&m_m68340_base); + logerror("%08x m68340_internal_base_w %08x, %08x (%08x) (m_m68340_base write)\n", pc(), offset*4,data,mem_mask); // map new modules - if (m68340_base&1) + if (m_m68340_base&1) { - int base = m68340_base & 0xfffff000; + int base = m_m68340_base & 0xfffff000; - internal->install_readwrite_handler(base + 0x000, base + 0x03f, + m_internal->install_readwrite_handler(base + 0x000, base + 0x03f, read16_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_r),this), write16_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_w),this),0xffffffff); - internal->install_readwrite_handler(base + 0x010, base + 0x01f, // Intentionally punches a hole in previous address mapping + m_internal->install_readwrite_handler(base + 0x010, base + 0x01f, // Intentionally punches a hole in previous address mapping read8_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_ports_r),this), write8_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_ports_w),this),0xffffffff); - internal->install_readwrite_handler(base + 0x040, base + 0x05f, + m_internal->install_readwrite_handler(base + 0x040, base + 0x05f, read32_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_cs_r),this), write32_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_cs_w),this)); - internal->install_readwrite_handler(base + 0x600, base + 0x63f, + m_internal->install_readwrite_handler(base + 0x600, base + 0x63f, READ16_DEVICE_DELEGATE(m_timer1, mc68340_timer_module_device, read), WRITE16_DEVICE_DELEGATE(m_timer1, mc68340_timer_module_device, write),0xffffffff); - internal->install_readwrite_handler(base + 0x640, base + 0x67f, + m_internal->install_readwrite_handler(base + 0x640, base + 0x67f, READ16_DEVICE_DELEGATE(m_timer2, mc68340_timer_module_device, read), WRITE16_DEVICE_DELEGATE(m_timer2, mc68340_timer_module_device, write),0xffffffff); - internal->install_readwrite_handler(base + 0x700, base + 0x723, + m_internal->install_readwrite_handler(base + 0x700, base + 0x723, READ8_DEVICE_DELEGATE(m_serial, mc68340_serial_module_device, read), WRITE8_DEVICE_DELEGATE(m_serial, mc68340_serial_module_device, write),0xffffffff); - internal->install_readwrite_handler(base + 0x780, base + 0x7bf, + m_internal->install_readwrite_handler(base + 0x780, base + 0x7bf, read32_delegate(FUNC(m68340_cpu_device::m68340_internal_dma_r),this), write32_delegate(FUNC(m68340_cpu_device::m68340_internal_dma_w),this)); @@ -105,7 +103,7 @@ WRITE32_MEMBER( m68340_cpu_device::m68340_internal_base_w ) } else { - logerror("%08x m68340_internal_base_w %08x, %04x (%04x) (should fall through?)\n", pc, offset*4,data,mem_mask); + logerror("%08x m68340_internal_base_w %08x, %04x (%04x) (should fall through?)\n", pc(), offset*4,data,mem_mask); } @@ -145,9 +143,9 @@ m68340_cpu_device::m68340_cpu_device(const machine_config &mconfig, const char * , m_pb_out_cb(*this) , m_pb_in_cb(*this) { - m68340SIM = nullptr; - m68340DMA = nullptr; - m68340_base = 0; + m_m68340SIM = nullptr; + m_m68340DMA = nullptr; + m_m68340_base = 0; } void m68340_cpu_device::device_reset() @@ -168,15 +166,15 @@ void m68340_cpu_device::device_start() { fscpu32_device::device_start(); - m68340SIM = new m68340_sim(); - m68340DMA = new m68340_dma(); + m_m68340SIM = new m68340_sim(); + m_m68340DMA = new m68340_dma(); - m68340SIM->reset(); - m68340DMA->reset(); + m_m68340SIM->reset(); + m_m68340DMA->reset(); start_68340_sim(); - m68340_base = 0x00000000; + m_m68340_base = 0x00000000; - internal = &this->space(AS_PROGRAM); + m_internal = &space(AS_PROGRAM); } diff --git a/src/devices/machine/68340.h b/src/devices/machine/68340.h index f183627dcec..76255b412a7 100644 --- a/src/devices/machine/68340.h +++ b/src/devices/machine/68340.h @@ -125,10 +125,10 @@ protected: uint32_t m_extal; /* 68340 peripheral modules */ - m68340_sim* m68340SIM; - m68340_dma* m68340DMA; + m68340_sim* m_m68340SIM; + m68340_dma* m_m68340DMA; - uint32_t m68340_base; + uint32_t m_m68340_base; emu_timer *m_irq_timer; diff --git a/src/devices/machine/68340dma.cpp b/src/devices/machine/68340dma.cpp index e37e573e5e6..cd69e4c9a1b 100644 --- a/src/devices/machine/68340dma.cpp +++ b/src/devices/machine/68340dma.cpp @@ -8,9 +8,6 @@ READ32_MEMBER( m68340_cpu_device::m68340_internal_dma_r ) { - assert(m68340DMA); - //m68340_dma &dma = *m68340DMA; - int pc = space.device().safe_pc(); logerror("%08x m68340_internal_dma_r %08x, (%08x)\n", pc, offset*4,mem_mask); @@ -19,9 +16,6 @@ READ32_MEMBER( m68340_cpu_device::m68340_internal_dma_r ) WRITE32_MEMBER( m68340_cpu_device::m68340_internal_dma_w ) { - assert(m68340DMA); - //m68340_dma &dma = *m68340DMA; - int pc = space.device().safe_pc(); logerror("%08x m68340_internal_dma_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask); } diff --git a/src/devices/machine/68340ser.cpp b/src/devices/machine/68340ser.cpp index 3b86595e07e..714d72476db 100644 --- a/src/devices/machine/68340ser.cpp +++ b/src/devices/machine/68340ser.cpp @@ -150,7 +150,7 @@ WRITE_LINE_MEMBER( mc68340_serial_module_device::irq_w ) LOGINT("IRQ!\n%s\n", FUNCNAME); if (m_ilr > 0) { - if (((m_cpu->m68340SIM->m_avr_rsr >> (8 + m_ilr)) & 1) != 0) // use autovector ? + if (((m_cpu->m_m68340SIM->m_avr_rsr >> (8 + m_ilr)) & 1) != 0) // use autovector ? { LOGINT("- Autovector level %d\n", m_ilr); m_cpu->set_input_line(m_ilr, HOLD_LINE); diff --git a/src/devices/machine/68340sim.cpp b/src/devices/machine/68340sim.cpp index ddc7516b237..62497ad61b7 100644 --- a/src/devices/machine/68340sim.cpp +++ b/src/devices/machine/68340sim.cpp @@ -45,8 +45,8 @@ READ16_MEMBER( m68340_cpu_device::m68340_internal_sim_r ) { LOGR("%s\n", FUNCNAME); - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; int val = 0; int pc = space.device().safe_pc(); @@ -106,8 +106,8 @@ WRITE16_MEMBER( m68340_cpu_device::m68340_internal_sim_w ) ((offset * 2) >= 0x10 && (offset * 2) < 0x20) || (offset * 2) >= 0x60 ? "Error - should not happen" : std::array<char const *, 8> {{"MCR", "reserved", "SYNCR", "AVR/RSR", "SWIV/SYPCR", "PICR", "PITR", "SWSR"}}[(offset * 2) <= m68340_sim::REG_AVR_RSR ? offset : offset - 0x10 + 0x04]); - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; int pc = space.device().safe_pc(); @@ -200,8 +200,8 @@ READ8_MEMBER( m68340_cpu_device::m68340_internal_sim_ports_r ) { LOGR("%s\n", FUNCNAME); offset += 0x10; - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; int pc = space.device().safe_pc(); int val = space.machine().rand(); @@ -287,8 +287,8 @@ WRITE8_MEMBER( m68340_cpu_device::m68340_internal_sim_ports_w ) { LOG("%s", FUNCNAME); offset += 0x10; - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; int pc = space.device().safe_pc(); @@ -352,8 +352,8 @@ READ32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_r ) LOGR("%s\n", FUNCNAME); offset += m68340_sim::REG_AM_CS0>>2; - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; int pc = space.device().safe_pc(); @@ -382,17 +382,17 @@ WRITE32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_w ) if (offset & 1) { - LOGCS("%08x Base address CS%d %08x, %08x (%08x) ", pc, (offset - 0x10) / 2, offset * 4, data, mem_mask); + LOGCS("%08x Base address CS%d %08x, %08x (%08x) ", m_ppc, (offset - 0x10) / 2, offset * 4, data, mem_mask); LOGCS("- Base: %08x BFC:%02x WP:%d FTE:%d NCS:%d Valid: %s\n", data & 0xffffff00, (data & 0xf0) >> 4, data & 0x08 ? 1 : 0, data & 0x04 ? 1 : 0, data & 0x02 ? 1 : 0, data & 0x01 ? "Yes" : "No"); } else { - LOGCS("%08x Address mask CS%d %08x, %08x (%08x) ", pc, (offset - 0x10) / 2, offset * 4, data, mem_mask); + LOGCS("%08x Address mask CS%d %08x, %08x (%08x) ", m_ppc, (offset - 0x10) / 2, offset * 4, data, mem_mask); LOGCS("- Mask: %08x FCM:%02x DD:%d PS: %s\n", data & 0xffffff00, (data & 0xf0) >> 4, (data >> 2) & 0x03, std::array<char const *, 4>{{"Reserved", "16-Bit", "8-bit", "External DSACK response"}}[data & 0x03]); } - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; int pc = space.device().safe_pc(); @@ -438,8 +438,8 @@ WRITE32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_w ) void m68340_cpu_device::do_pit_irq() { - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; //logerror("do_pit_irq\n"); int timer_irq_level = (sim.m_picr & 0x0700) >> 8; @@ -485,8 +485,8 @@ void m68340_cpu_device::start_68340_sim() m_pb_in_cb.resolve(); // Setup correct VCO/clock speed based on reset values and crystal - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; switch (m_clock_mode) { case m68340_sim::CLOCK_MODE_EXT: @@ -534,8 +534,8 @@ void m68340_sim::reset() /* do_tick_pit works on whole clock cycles, no flank support */ void m68340_cpu_device::do_tick_pit() { - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; sim.m_pit_counter--; if ( ( (sim.m_mcr & m68340_sim::REG_MCR_FRZ1) == 0) && diff --git a/src/devices/machine/68340tmu.cpp b/src/devices/machine/68340tmu.cpp index 4c04f49669d..b6a5d7f7749 100644 --- a/src/devices/machine/68340tmu.cpp +++ b/src/devices/machine/68340tmu.cpp @@ -310,8 +310,8 @@ void mc68340_timer_module_device::device_start() void mc68340_timer_module_device::do_timer_irq() { - assert(m_cpu->m68340SIM); - m68340_sim &sim = *m_cpu->m68340SIM; + assert(m_cpu->m_m68340SIM); + m68340_sim &sim = *m_cpu->m_m68340SIM; int timer_irq_level = (m_ir & 0x0700) >> 8; int timer_irq_vector = (m_ir & 0x00ff) >> 0; diff --git a/src/devices/machine/eepromser.cpp b/src/devices/machine/eepromser.cpp index 5e6e08a6a2b..d97ea318407 100644 --- a/src/devices/machine/eepromser.cpp +++ b/src/devices/machine/eepromser.cpp @@ -1007,9 +1007,9 @@ void eeprom_serial_x24c44_device::handle_event(eeprom_event event) if (bit_index % m_data_bits == 0 && (bit_index == 0 || m_streaming_enabled)){ m_shift_register=m_ram_data[m_address]; - //m_shift_register=BITSWAP16(m_shift_register,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15); - //m_shift_register=BITSWAP16(m_shift_register,7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8); - m_shift_register= BITSWAP16(m_shift_register,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); + //m_shift_register=bitswap<16>(m_shift_register,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15); + //m_shift_register=bitswap<16>(m_shift_register,7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8); + m_shift_register= bitswap<16>(m_shift_register,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); m_shift_register=m_shift_register<<16; @@ -1046,9 +1046,9 @@ void eeprom_serial_x24c44_device::handle_event(eeprom_event event) m_shift_register = (m_shift_register << 1) | m_di_state; if (++m_bits_accum == m_data_bits) { - //m_shift_register=BITSWAP16(m_shift_register, 0, 1, 2, 3, 4, 5,6,7, 8, 9,10,11,12,13,14,15); - //m_shift_register=BITSWAP16(m_shift_register, 7, 6, 5, 4, 3, 2,1,0,15,14,13,12,11,10, 9, 8); - m_shift_register=BITSWAP16(m_shift_register,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); + //m_shift_register=bitswap<16>(m_shift_register, 0, 1, 2, 3, 4, 5,6,7, 8, 9,10,11,12,13,14,15); + //m_shift_register=bitswap<16>(m_shift_register, 7, 6, 5, 4, 3, 2,1,0,15,14,13,12,11,10, 9, 8); + m_shift_register=bitswap<16>(m_shift_register,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); m_ram_data[m_address]=m_shift_register; LOG1("write to RAM addr=%02X data=%04X\n",m_address,m_shift_register); diff --git a/src/devices/machine/ldpr8210.cpp b/src/devices/machine/ldpr8210.cpp index 8e1b879d16d..39bb12f97ba 100644 --- a/src/devices/machine/ldpr8210.cpp +++ b/src/devices/machine/ldpr8210.cpp @@ -236,7 +236,7 @@ void pioneer_pr8210_device::control_w(uint8_t data) { // data is stored to the PIA in bit-reverse order uint8_t newcommand = (m_accumulator >> 2) & 0x1f; - m_pia.porta = BITSWAP8(newcommand, 0,1,2,3,4,5,6,7); + m_pia.porta = bitswap<8>(newcommand, 0,1,2,3,4,5,6,7); // the MCU logic requires a 0 to execute many commands; however, nobody // consistently sends a 0, whereas they do tend to send duplicate commands... diff --git a/src/devices/machine/ripple_counter.cpp b/src/devices/machine/ripple_counter.cpp new file mode 100644 index 00000000000..ae38d342d68 --- /dev/null +++ b/src/devices/machine/ripple_counter.cpp @@ -0,0 +1,202 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + Generic binary ripple counter emulation + + This device emulates basic ripple counter logic ICs with falling- + edge clocks and a synchronous reset inputs such as CD4040 and + 74LS393. + + The optional 8-bit ROM interface is intended to help stream ROM + data to sound chips that lack memory interfaces of their own + (e.g. MSM5205, TMS5110). + +**********************************************************************/ + +#include "emu.h" +#include "machine/ripple_counter.h" + +//************************************************************************** +// GLOBAL VARIABLES +//************************************************************************** + +// device type definition +DEFINE_DEVICE_TYPE(RIPPLE_COUNTER, ripple_counter_device, "ripple_counter", "Generic ripple counter") + + +//************************************************************************** +// RIPPLE COUNTER DEVICE +//************************************************************************** + +//------------------------------------------------- +// ripple_counter_device - constructor +//------------------------------------------------- + +ripple_counter_device::ripple_counter_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, RIPPLE_COUNTER, tag, owner, clock), + device_rom_interface(mconfig, *this, 0, ENDIANNESS_LITTLE, 8), + m_count_out_cb(*this), + m_rom_out_cb(*this), + m_count_timer(nullptr), + m_count_mask(0), + m_count(1), + m_clk(false), + m_reset(false) +{ +} + + +//------------------------------------------------- +// static_set_stages - configure the number of +// stages used to count +//------------------------------------------------- + +void ripple_counter_device::static_set_stages(device_t &device, u8 stages) +{ + auto &dev = downcast<ripple_counter_device &>(device); + dev.m_count_mask = (1U << stages) - 1; + dev.set_rom_addr_width(stages); +} + + +//------------------------------------------------- +// memory_space_config - return a description of +// any address spaces owned by this device +//------------------------------------------------- + +device_memory_interface::space_config_vector ripple_counter_device::memory_space_config() const +{ + if (m_rom_out_cb.isnull()) + return space_config_vector(); + else + return device_rom_interface::memory_space_config(); +} + + +//------------------------------------------------- +// device_validity_check - validate a device after +// the configuration has been constructed +//------------------------------------------------- + +void ripple_counter_device::device_validity_check(validity_checker &valid) const +{ + if (m_count_mask == 0) + osd_printf_error("No counting stages configured\n"); +} + + +//------------------------------------------------- +// device_resolve_objects - resolve objects that +// may be needed for other devices to set +// initial conditions at start time +//------------------------------------------------- + +void ripple_counter_device::device_resolve_objects() +{ + // resolve callbacks + m_count_out_cb.resolve_safe(); + m_rom_out_cb.resolve(); +} + + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void ripple_counter_device::device_start() +{ + // initialize timers + m_count_timer = timer_alloc(TIMER_COUNT); + + // register internal state + save_item(NAME(m_count)); + save_item(NAME(m_clk)); + save_item(NAME(m_reset)); +} + + +//------------------------------------------------- +// device_clock_changed - called when the +// device clock is altered in any way +//------------------------------------------------- + +void ripple_counter_device::device_clock_changed() +{ + attotime freq = m_reset ? attotime::never : clocks_to_attotime(1); + m_count_timer->adjust(freq, 0, freq); +} + + +//------------------------------------------------- +// rom_bank_updated - called when the ROM bank +// is changed +//------------------------------------------------- + +void ripple_counter_device::rom_bank_updated() +{ + m_rom_out_cb(read_byte(m_count)); +} + + +//------------------------------------------------- +// set_count - update the count and associated +// outputs +//------------------------------------------------- + +void ripple_counter_device::set_count(u32 count) +{ + m_count = count; + m_count_out_cb(count); + if (!m_rom_out_cb.isnull()) + m_rom_out_cb(read_byte(count)); +} + + +//------------------------------------------------- +// clock_w - handle falling-edge clock input +//------------------------------------------------- + +WRITE_LINE_MEMBER(ripple_counter_device::clock_w) +{ + if (m_clk != bool(state)) + { + m_clk = bool(state); + if (!state && !m_reset) + set_count((m_count + 1) & m_count_mask); + } +} + + +//------------------------------------------------- +// reset_w - handle active-high reset input +//------------------------------------------------- + +WRITE_LINE_MEMBER(ripple_counter_device::reset_w) +{ + if (m_reset != bool(state)) + { + m_reset = bool(state); + if (state && m_count != 0) + set_count(0); + + // stop or start the count timer as required + notify_clock_changed(); + } +} + + +//------------------------------------------------- +// device_timer - called whenever a device timer +// fires +//------------------------------------------------- + +void ripple_counter_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ + switch (id) + { + case TIMER_COUNT: + set_count((m_count + 1) & m_count_mask); + break; + } +} diff --git a/src/devices/machine/ripple_counter.h b/src/devices/machine/ripple_counter.h new file mode 100644 index 00000000000..f9e997f3348 --- /dev/null +++ b/src/devices/machine/ripple_counter.h @@ -0,0 +1,92 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + Generic binary ripple counter emulation + +**********************************************************************/ + +#ifndef MAME_MACHINE_RIPPLE_COUNTER_H +#define MAME_MACHINE_RIPPLE_COUNTER_H + +#pragma once + +//************************************************************************** +// CONFIGURATION MACROS +//************************************************************************** + +#define MCFG_RIPPLE_COUNTER_STAGES(_stages) \ + ripple_counter_device::static_set_stages(*device, _stages); + +// output callbacks +#define MCFG_RIPPLE_COUNTER_COUNT_OUT_CB(_devcb) \ + devcb = &ripple_counter_device::static_set_count_out_cb(*device, DEVCB_##_devcb); +#define MCFG_RIPPLE_COUNTER_ROM_OUT_CB(_devcb) \ + devcb = &ripple_counter_device::static_set_rom_out_cb(*device, DEVCB_##_devcb); + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> ripple_counter_device + +class ripple_counter_device : public device_t, public device_rom_interface +{ +public: + // construction/destruction + ripple_counter_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + + // static configuration + static void static_set_stages(device_t &device, u8 stages); + template<class Object> static devcb_base &static_set_count_out_cb(device_t &device, Object &&cb) + { return downcast<ripple_counter_device &>(device).m_count_out_cb.set_callback(std::forward<Object>(cb)); } + template<class Object> static devcb_base &static_set_rom_out_cb(device_t &device, Object &&cb) + { return downcast<ripple_counter_device &>(device).m_rom_out_cb.set_callback(std::forward<Object>(cb)); } + + // control line handlers + DECLARE_WRITE_LINE_MEMBER(clock_w); + DECLARE_WRITE_LINE_MEMBER(reset_w); + + // getters + u32 count() const { return m_count; } + +protected: + // device-level overrides + virtual void device_validity_check(validity_checker &valid) const override; + virtual void device_resolve_objects() override; + virtual void device_start() override; + virtual void device_clock_changed() override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + + // device_rom_interface overrides + virtual space_config_vector memory_space_config() const override; + virtual void rom_bank_updated() override; + +private: + // internal helpers + void set_count(u32 count); + + // device callbacks + devcb_write32 m_count_out_cb; + devcb_write8 m_rom_out_cb; + + // device timers + enum + { + TIMER_COUNT + }; + emu_timer *m_count_timer; + + // configuration parameters + u32 m_count_mask; + + // running state + u32 m_count; + bool m_clk; + bool m_reset; +}; + +// device type definition +DECLARE_DEVICE_TYPE(RIPPLE_COUNTER, ripple_counter_device) + +#endif // MAME_MACHINE_RIPPLE_COUNTER_H diff --git a/src/devices/machine/roc10937.cpp b/src/devices/machine/roc10937.cpp index 05d332106bb..966d28c38c9 100644 --- a/src/devices/machine/roc10937.cpp +++ b/src/devices/machine/roc10937.cpp @@ -180,7 +180,7 @@ void rocvfd_device::device_reset() /////////////////////////////////////////////////////////////////////////// uint32_t rocvfd_device::set_display(uint32_t segin) { - return BITSWAP32(segin, 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,11,9,15,13,12,8,10,14,7,6,5,4,3,2,1,0); + return bitswap<32>(segin, 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,11,9,15,13,12,8,10,14,7,6,5,4,3,2,1,0); } diff --git a/src/devices/machine/sdlc.cpp b/src/devices/machine/sdlc.cpp index e3cc8cc99ed..870f8aba4e3 100644 --- a/src/devices/machine/sdlc.cpp +++ b/src/devices/machine/sdlc.cpp @@ -282,7 +282,7 @@ void sdlc_logger_device::log_frame(bool partial) const fcs |= std::uint16_t(m_buffer[frame_bytes - 1]) << (8 - residual_bits); if (residual_bits) fcs |= (std::uint16_t(m_buffer[frame_bytes]) & ((1U << residual_bits) - 1U)) << (16 - residual_bits); - fcs = ~BITSWAP16(fcs, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); + fcs = ~bitswap<16>(fcs, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); util::stream_format(msg, " FCS=%04X", fcs); if (!is_frame_check_good()) util::stream_format(msg, " (expected %04X)", m_expected_fcs); diff --git a/src/devices/machine/smc91c9x.cpp b/src/devices/machine/smc91c9x.cpp index b94f7a29d1f..2e9cb12932d 100644 --- a/src/devices/machine/smc91c9x.cpp +++ b/src/devices/machine/smc91c9x.cpp @@ -15,7 +15,8 @@ #include "emu.h" #include "smc91c9x.h" - +// Needed for netdev_count??? +#include "osdnet.h" /*************************************************************************** @@ -120,17 +121,26 @@ smc91c9x_device::smc91c9x_device(const machine_config &mconfig, device_type type void smc91c9x_device::device_start() { + // TX timer + m_tx_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(smc91c9x_device::send_frame), this)); + m_irq_handler.resolve_safe(); + // Set completion queues to max size to save properly + m_comp_rx.resize(ETHER_BUFFERS); + m_comp_tx.resize(ETHER_BUFFERS); + /* register ide states */ save_item(NAME(m_reg)); save_item(NAME(m_regmask)); save_item(NAME(m_irq_state)); - save_item(NAME(m_alloc_count)); - save_item(NAME(m_rx)); - save_item(NAME(m_tx)); + save_item(NAME(m_buffer)); save_item(NAME(m_sent)); save_item(NAME(m_recd)); + save_item(NAME(m_alloc_rx)); + save_item(NAME(m_alloc_tx)); + save_item(NAME(m_comp_rx)); + save_item(NAME(m_comp_tx)); } //------------------------------------------------- @@ -141,37 +151,13 @@ void smc91c9x_device::device_reset() { std::fill(std::begin(m_reg), std::end(m_reg), 0); - std::fill(std::begin(m_rx), std::end(m_rx), 0); - std::fill(std::begin(m_tx), std::end(m_tx), 0); - std::fill(std::begin(m_regmask), std::end(m_regmask), 0); m_irq_state = 0; - m_alloc_count = 0; - rx_fifo_out = 0; - rx_fifo_in = 0; - - tx_fifo_out = 0; - tx_fifo_in = 0; m_sent = 0; m_recd = 0; - osd_list_network_adapters(); - - unsigned char const *const mac = (const unsigned char *)get_mac(); - - if (VERBOSE & LOG_GENERAL) - { - logerror("MAC : "); - for (int i = 0; i < ETHERNET_ADDR_SIZE; i++) - logerror("%.2X", mac[i]); - - logerror("\n"); - } - - set_promisc(true); - m_reg[EREG_TCR] = 0x0000; m_regmask[EREG_TCR] = 0x3d87; m_reg[EREG_EPH_STATUS] = 0x0000; m_regmask[EREG_EPH_STATUS] = 0x0000; m_reg[EREG_RCR] = 0x0000; m_regmask[EREG_RCR] = 0xc307; @@ -188,11 +174,6 @@ void smc91c9x_device::device_reset() m_reg[EREG_IA2_3] = 0x12F7; m_regmask[EREG_IA2_3] = 0xffff; m_reg[EREG_IA4_5] = 0x5634; m_regmask[EREG_IA4_5] = 0xffff; - // Interface MAC - m_reg[EREG_IA0_1] = mac[0] | (mac[1]<<8); - m_reg[EREG_IA2_3] = mac[2] | (mac[3]<<8); - m_reg[EREG_IA4_5] = mac[4] | (mac[5]<<8); - m_reg[EREG_GENERAL_PURP] = 0x0000; m_regmask[EREG_GENERAL_PURP] = 0xffff; m_reg[EREG_CONTROL] = 0x0100; m_regmask[EREG_CONTROL] = 0x68e7; @@ -209,12 +190,52 @@ void smc91c9x_device::device_reset() m_reg[EREG_MT4_5] = 0x0000; m_regmask[EREG_MT4_5] = 0xffff; m_reg[EREG_MT6_7] = 0x0000; m_regmask[EREG_MT6_7] = 0xffff; m_reg[EREG_MGMT] = 0x3030; m_regmask[EREG_MGMT] = 0x0f0f; - m_reg[EREG_REVISION] = 0x3340; m_regmask[EREG_REVISION] = 0x0000; + m_reg[EREG_REVISION] = 0x3345; m_regmask[EREG_REVISION] = 0x0000; m_reg[EREG_ERCV] = 0x331f; m_regmask[EREG_ERCV] = 0x009f; update_ethernet_irq(); + m_tx_timer->reset(); + + // Setup real network if enabled + m_network_available = false; + if (netdev_count()) { + m_network_available = true; + osd_list_network_adapters(); + unsigned char const *const mac = (const unsigned char *)get_mac(); + if (VERBOSE & LOG_GENERAL) + { + logerror("MAC : "); + for (int i = 0; i < ETHERNET_ADDR_SIZE; i++) + logerror("%.2X", mac[i]); + + logerror("\n"); + } + + set_promisc(true); + // Interface MAC + m_reg[EREG_IA0_1] = mac[0] | (mac[1] << 8); + m_reg[EREG_IA2_3] = mac[2] | (mac[3] << 8); + m_reg[EREG_IA4_5] = mac[4] | (mac[5] << 8); + } + + // Reset MMU + mmu_reset(); } +void smc91c9x_device::mmu_reset() +{ + // Reset MMU allocations + m_alloc_rx = 0; + m_alloc_tx = 0; + + // Reset completion FIFOs + m_comp_tx.clear(); + m_comp_rx.clear(); + + // Flush fifos. + clear_tx_fifo(); + clear_rx_fifo(); +} DEFINE_DEVICE_TYPE(SMC91C94, smc91c94_device, "smc91c94", "SMC91C94 Ethernet Controller") @@ -230,21 +251,41 @@ smc91c96_device::smc91c96_device(const machine_config &mconfig, const char *tag, { } +bool smc91c9x_device::alloc_req(const int tx, int &packet_num) +{ + u32 curr_alloc = m_alloc_rx | m_alloc_tx; + + for (int index = 0; index < ETHER_BUFFERS; index++) { + if (!(curr_alloc & (1 << index))) { + packet_num = index; + if (tx) { + m_alloc_tx |= 1 << index; + } else { + m_alloc_rx |= 1 << index; + } + return true; + } + } + + return false; +} + +void smc91c9x_device::alloc_release(const int packet_num) +{ + int clear_mask = ~(1 << packet_num); + m_alloc_tx &= clear_mask; + m_alloc_rx &= clear_mask; +} + void smc91c9x_device::clear_tx_fifo() { - tx_fifo_in = 0; - tx_fifo_out = 0; - std::fill(std::begin(m_tx), std::end(m_tx), 0); } void smc91c9x_device::clear_rx_fifo() { - rx_fifo_in = 0; - rx_fifo_out = 0; - std::fill(std::begin(m_rx), std::end(m_rx), 0); } -int smc91c9x_device::is_broadcast(uint8_t mac_address[]) +int smc91c9x_device::is_broadcast(const uint8_t *mac_address) { int i; @@ -262,28 +303,20 @@ int smc91c9x_device::is_broadcast(uint8_t mac_address[]) } -int smc91c9x_device::ethernet_packet_is_for_me(const uint8_t mac_address[]) +int smc91c9x_device::ethernet_packet_is_for_me(const uint8_t *mac_address) { // tcpdump -i eth0 -q ether host 08:00:1e:01:ae:a5 or ether broadcast or ether dst 09:00:1e:00:00:00 or ether dst 09:00:1e:00:00:01 // wireshark filter: eth.addr eq 08:00:1e:01:ae:a5 or eth.dst eq ff:ff:ff:ff:ff:ff or eth.dst eq 09:00:1e:00:00:00 or eth.dst eq 09:00:1e:00:00:01 int i; - uint8_t local_address[ETHERNET_ADDR_SIZE]; LOG("\n"); - local_address[0] = (m_reg[EREG_IA0_1]>>0) & 0xFF; - local_address[1] = (m_reg[EREG_IA0_1]>>8) & 0xFF; - local_address[2] = (m_reg[EREG_IA2_3]>>0) & 0xFF; - local_address[3] = (m_reg[EREG_IA2_3]>>8) & 0xFF; - local_address[4] = (m_reg[EREG_IA4_5]>>0) & 0xFF; - local_address[5] = (m_reg[EREG_IA4_5]>>8) & 0xFF; - if (VERBOSE & LOG_GENERAL) { for ( i = 0 ; i < ETHERNET_ADDR_SIZE ; i++ ) { - logerror("%.2X",local_address[i]); + logerror("%.2X", ((u8 *)&m_reg[EREG_IA0_1])[i]); } logerror("="); for ( i = 0 ; i < ETHERNET_ADDR_SIZE ; i++ ) @@ -294,13 +327,13 @@ int smc91c9x_device::ethernet_packet_is_for_me(const uint8_t mac_address[]) } // skip Ethernet broadcast packets if RECV_BROAD is not set - if (is_broadcast((uint8_t *)mac_address)) + if (is_broadcast(mac_address)) { LOG(" -- Broadcast rx\n"); return 2; } - if (memcmp(mac_address, local_address, ETHERNET_ADDR_SIZE) == 0) + if (memcmp(mac_address, &m_reg[EREG_IA0_1], ETHERNET_ADDR_SIZE) == 0) { LOG(" -- Address Match\n"); return 1; @@ -335,7 +368,7 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length) logerror(" - IsForMe %d - %d/0x%x bytes\n", isforme, length, length); } - if ( (length < ETHERNET_ADDR_SIZE || !isforme) && !(m_reg[EREG_RCR] & 0x0100) ) + if ( (length < ETHERNET_ADDR_SIZE || !isforme) && !(m_reg[EREG_RCR] & 0x0102) ) { LOG("\n"); @@ -345,13 +378,18 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length) /* signal a receive */ + // Try to request a packet number + int packet_num; + if (!alloc_req(0, packet_num)) { + logerror("recv_cb: Couldn't allocate a receive packet\n"); + return; + } + /* compute the packet length */ if ( ( length < ( ETHER_BUFFER_SIZE - ( 2+2+2 ) ) ) ) { - uint8_t *const packet = &m_rx[ ( rx_fifo_in & ( ETHER_RX_BUFFERS - 1 ) ) * ETHER_BUFFER_SIZE]; - - std::fill_n(packet, ETHER_BUFFER_SIZE, 0); + uint8_t *const packet = &m_buffer[ packet_num * ETHER_BUFFER_SIZE]; int dst = 0; @@ -384,17 +422,15 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length) packet[dst++] = 0x40 | 0x00; // Control } - dst += 2; + //dst += 2; dst &= 0x7FF; packet[2] = (dst&0xFF); packet[3] = (dst) >> 8; - m_reg[EREG_INTERRUPT] |= EINT_RCV; - m_reg[EREG_FIFO_PORTS] &= ~0x8000; - - rx_fifo_in = (rx_fifo_in + 1) & ( ETHER_RX_BUFFERS - 1 ); + // Push packet number to rx completion fifo + m_comp_rx.push_back(packet_num); } else { @@ -416,12 +452,37 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length) void smc91c9x_device::update_ethernet_irq() { + // Check tx completion fifo empty + if (m_comp_tx.empty()) { + m_reg[EREG_INTERRUPT] |= EINT_TX_EMPTY; + } + else { + m_reg[EREG_INTERRUPT] &= ~EINT_TX_EMPTY; + } + //if (m_comp_tx.empty()) { + // m_reg[EREG_INTERRUPT] &= ~EINT_TX; + //} + //else { + // m_reg[EREG_INTERRUPT] |= EINT_TX; + //} + // Check rx completion fifo empty + if (m_comp_rx.empty()) + m_reg[EREG_INTERRUPT] &= ~EINT_RCV; + else + m_reg[EREG_INTERRUPT] |= EINT_RCV; + uint8_t const mask = m_reg[EREG_INTERRUPT] >> 8; uint8_t const state = m_reg[EREG_INTERRUPT] & 0xff; + /* update the IRQ state */ - m_irq_state = ((mask & state) != 0); - m_irq_handler(m_irq_state ? ASSERT_LINE : CLEAR_LINE); + uint8_t new_state = mask & state; + if (m_irq_state ^ new_state) + { + logerror("update_ethernet_irq: old: %02x new: %02x\n", m_irq_state, new_state); + m_irq_state = new_state; + m_irq_handler(m_irq_state ? ASSERT_LINE : CLEAR_LINE); + } } @@ -440,74 +501,102 @@ void smc91c9x_device::update_stats() send_frame - push a frame to the interface -------------------------------------------------*/ -int smc91c9x_device::send_frame() +TIMER_CALLBACK_MEMBER(smc91c9x_device::send_frame) { - bool const is_broadcast = (m_tx[4] == 0xff && m_tx[5] == 0xff && m_tx[6] == 0xff && - m_tx[7] == 0xff && m_tx[8] == 0xff && m_tx[9] == 0xff); + const int packet_num = m_comp_tx.front(); + uint8_t *const tx_buffer = &m_buffer[packet_num * ETHER_BUFFER_SIZE]; - tx_fifo_in = ( tx_fifo_in + 1 ) & ( ETHER_TX_BUFFERS - 1 ); - - uint8_t *const tx_buffer = &m_tx[(tx_fifo_out & (ETHER_TX_BUFFERS-1))* ETHER_BUFFER_SIZE]; - tx_fifo_out = ((tx_fifo_out + 1)& (ETHER_TX_BUFFERS-1)); - - /* update the EPH register and stuff it in the first transmit word */ + /* update the EPH register */ m_reg[EREG_EPH_STATUS] = 0x0001; - if (is_broadcast) + if (is_broadcast(&tx_buffer[4])) m_reg[EREG_EPH_STATUS] |= 0x0040; - tx_buffer[0] = m_reg[EREG_EPH_STATUS]; - tx_buffer[1] = m_reg[EREG_EPH_STATUS] >> 8; - - /* signal a transmit interrupt and mark the transmit buffer empty */ + // Set Tx Empty interrupt + // TODO: If more than 1 packet is enqueued should wait for all to finish + //m_reg[EREG_INTERRUPT] |= EINT_TX_EMPTY; m_reg[EREG_INTERRUPT] |= EINT_TX; - m_reg[EREG_INTERRUPT] |= EINT_TX_EMPTY; - m_reg[EREG_FIFO_PORTS] |= 0x0080; + //m_comp_tx.erase(m_comp_tx.begin()); m_sent++; update_stats(); int buffer_len = ((tx_buffer[3] << 8) | tx_buffer[2]) & 0x7ff; - + // Remove status, length, [pad], control + if (tx_buffer[buffer_len - 1] & 0x20) + buffer_len -= 5; + else + buffer_len -= 6; + // Add padding + if (buffer_len < 64 && (m_reg[EREG_TCR] & 0x0080)) { + while (buffer_len < 64) + tx_buffer[4 + buffer_len++] = 0x00; + } if (VERBOSE & LOG_GENERAL) { logerror("TX: "); - for (int i = 4; i < (4 + ETHERNET_ADDR_SIZE); i++) - logerror("%.2X", tx_buffer[i]); + for (int i = 0; i < ETHERNET_ADDR_SIZE; i++) + logerror("%.2X", tx_buffer[4 + i]); logerror(" "); - for (int i = 0; i < (buffer_len - (ETHERNET_ADDR_SIZE + 4)); i++) - logerror("%.2X", tx_buffer[4 + ETHERNET_ADDR_SIZE + i]); + for (int i = ETHERNET_ADDR_SIZE; i < buffer_len; i++) + logerror("%.2X", tx_buffer[4 + i]); logerror("--- %d/0x%x bytes\n", buffer_len, buffer_len); } - if ( buffer_len > 4 ) + if (buffer_len > 4) { - // odd or even sized frame ? - if (tx_buffer[buffer_len-1] & 0x20) - buffer_len--; - else - buffer_len -= 2; + if (m_link_unconnected) + { + // Set lost carrier + if (m_reg[EREG_TCR] & 0x0400) + { + m_reg[EREG_EPH_STATUS] |= 0x400; + // Clear Tx Enable on error + m_reg[EREG_TCR] &= ~0x1; + } + + // Set signal quality error + if (m_reg[EREG_TCR] & 0x1000) + { + m_reg[EREG_EPH_STATUS] |= 0x20; + // Clear Tx Enable on error + m_reg[EREG_TCR] &= ~0x1; + } - if (!(m_reg[EREG_TCR] & 0x2002)) + // signal a no transmit + m_reg[EREG_INTERRUPT] &= ~EINT_TX; + // Set a ethernet phy status interrupt + m_reg[EREG_INTERRUPT] |= EINT_EPH; + + // Flush fifos. + clear_tx_fifo(); + clear_rx_fifo(); + } + else { - // No loopback... Send the frame - if ( !send(&tx_buffer[4], buffer_len-4) ) + // Send the frame + if (!send(&tx_buffer[4], buffer_len)) { // FIXME: failed to send the Ethernet packet //logerror("failed to send Ethernet packet\n"); //LOG(this,("read_command_port(): !!! failed to send Ethernet packet")); } - } - else - { - // TODO loopback mode : Push the frame to the RX FIFO. + + // Loopback if loopback is set or fduplx is set + // TODO: Figure out correct size + // TODO: Check for addtional filter options for FDUPLX mode + if ((m_reg[EREG_TCR] & 0x2002) || (m_network_available && (m_reg[EREG_TCR] & 0x0800))) + recv_cb(&tx_buffer[4], buffer_len); } } + // Update status in the transmit word + tx_buffer[0] = m_reg[EREG_EPH_STATUS]; + tx_buffer[1] = m_reg[EREG_EPH_STATUS] >> 8; - return 0; + update_ethernet_irq(); } /*------------------------------------------------- @@ -524,10 +613,20 @@ void smc91c9x_device::process_command(uint16_t data) case ECMD_ALLOCATE: LOG(" ALLOCATE MEMORY FOR TX (%d)\n", (data & 7)); - m_reg[EREG_PNR_ARR] &= ~0xff00; - m_reg[EREG_PNR_ARR] |= (m_alloc_count++ & 0x7F) << 8; - m_reg[EREG_INTERRUPT] |= 0x0008; - update_ethernet_irq(); + { + int packet_num; + if (alloc_req(1, packet_num)) { + // Set ARR register + m_reg[EREG_PNR_ARR] &= ~0xff00; + m_reg[EREG_PNR_ARR] |= packet_num << 8; + m_reg[EREG_INTERRUPT] |= EINT_ALLOC; + + update_ethernet_irq(); + } + else { + logerror("ECMD_ALLOCATE: Couldn't allocate TX memory\n"); + } + } break; case ECMD_RESET_MMU: @@ -539,33 +638,24 @@ void smc91c9x_device::process_command(uint16_t data) */ LOG(" RESET MMU\n"); - // Flush fifos. - clear_tx_fifo(); - clear_rx_fifo(); + mmu_reset(); break; case ECMD_REMOVE_TOPFRAME_TX: LOG(" REMOVE FRAME FROM TX FIFO\n"); + m_comp_tx.erase(m_comp_tx.begin()); + // TODO: Should we clear TX_INT? break; + case ECMD_REMOVE_RELEASE_TOPFRAME_RX: + LOG(" REMOVE AND RELEASE FRAME FROM RX FIFO (PACK_NUM=%d)\n", m_comp_rx.front()); + // Release memory allocation + alloc_release(m_comp_rx.front()); + // Fall through case ECMD_REMOVE_TOPFRAME_RX: LOG(" REMOVE FRAME FROM RX FIFO\n"); - - case ECMD_REMOVE_RELEASE_TOPFRAME_RX: - LOG(" REMOVE AND RELEASE FRAME FROM RX FIFO (RXI=%d RXO=%d)\n", rx_fifo_in & (ETHER_RX_BUFFERS - 1), rx_fifo_out & (ETHER_RX_BUFFERS - 1)); - - m_reg[EREG_INTERRUPT] &= ~EINT_RCV; - - if ( (rx_fifo_in & ( ETHER_RX_BUFFERS - 1 ) ) != (rx_fifo_out & ( ETHER_RX_BUFFERS - 1 ) ) ) - rx_fifo_out = ( (rx_fifo_out + 1) & ( ETHER_RX_BUFFERS - 1 ) ); - - if ( (rx_fifo_in & ( ETHER_RX_BUFFERS - 1 ) ) != (rx_fifo_out & ( ETHER_RX_BUFFERS - 1 ) ) ) - { - m_reg[EREG_INTERRUPT] |= EINT_RCV; - m_reg[EREG_FIFO_PORTS] &= ~0x8000; - } - else - m_reg[EREG_FIFO_PORTS] |= 0x8000; + // remove entry from rx queue + m_comp_rx.erase(m_comp_rx.begin()); update_ethernet_irq(); m_recd++; @@ -573,49 +663,29 @@ void smc91c9x_device::process_command(uint16_t data) break; case ECMD_RELEASE_PACKET: - LOG(" RELEASE SPECIFIC PACKET\n"); + { + const int packet_number = m_reg[EREG_PNR_ARR] & 0xff; + alloc_release(packet_number); + LOG(" RELEASE SPECIFIC PACKET %d\n", packet_number); + } break; case ECMD_ENQUEUE_PACKET: LOG(" ENQUEUE TX PACKET\n"); - if ( m_link_unconnected ) + if (m_reg[EREG_TCR] & 0x0001) // TX EN ? { - // Set lost carrier - if ( m_reg[EREG_TCR] & 0x0400 ) - { - m_reg[EREG_EPH_STATUS] |= 0x400; - // Clear Tx Enable on error - m_reg[EREG_TCR] &= ~0x1; - } - - // Set signal quality error - if ( m_reg[EREG_TCR] & 0x1000 ) - { - m_reg[EREG_EPH_STATUS] |= 0x20; - // Clear Tx Enable on error - m_reg[EREG_TCR] &= ~0x1; - } - - // signal a no transmit - m_reg[EREG_INTERRUPT] &= ~EINT_TX; - // Set a ethernet phy status interrupt - m_reg[EREG_INTERRUPT] |= EINT_EPH; - - // Flush fifos. - clear_tx_fifo(); - clear_rx_fifo(); + const int packet_number = m_reg[EREG_PNR_ARR] & 0xff; + // Push packet number tx completion fifo + m_comp_tx.push_back(packet_number); + // Calculate transmit time + uint8_t *const tx_buffer = &m_buffer[packet_number * ETHER_BUFFER_SIZE]; + int buffer_len = ((tx_buffer[3] << 8) | tx_buffer[2]) & 0x7ff; + buffer_len -= 6; + // ~16 Mbps + int usec = ((buffer_len * 8) >> 4) + 1; + m_tx_timer->adjust(attotime::from_usec(usec)); } - else - { - if ( m_reg[EREG_TCR] & 0x0001 ) // TX EN ? - { - send_frame(); - } - } - - update_ethernet_irq(); - break; case ECMD_RESET_FIFOS: @@ -661,11 +731,24 @@ READ16_MEMBER( smc91c9x_device::read ) case EREG_PNR_ARR: if ( ACCESSING_BITS_8_15 ) { - m_reg[EREG_INTERRUPT] &= ~0x0008; + m_reg[EREG_INTERRUPT] &= ~EINT_ALLOC; update_ethernet_irq(); } break; + case EREG_FIFO_PORTS: + result = 0; + if (!m_comp_tx.empty()) + result |= m_comp_tx.front(); + else + result |= 0x80; + if (!m_comp_rx.empty()) + result |= m_comp_rx.front() << 8; + else + result |= 0x80 << 8; + break; + + case EREG_DATA_0: /* data register */ case EREG_DATA_1: /* data register */ { @@ -673,13 +756,9 @@ READ16_MEMBER( smc91c9x_device::read ) int addr = m_reg[EREG_POINTER] & 0x7ff; if ( m_reg[EREG_POINTER] & 0x8000 ) - { - buffer = &m_rx[(rx_fifo_out & ( ETHER_RX_BUFFERS - 1 )) * ETHER_BUFFER_SIZE]; - } + buffer = &m_buffer[m_comp_rx.front() * ETHER_BUFFER_SIZE]; else - { - buffer = (uint8_t *)&m_tx[(tx_fifo_in & (ETHER_TX_BUFFERS-1))* ETHER_BUFFER_SIZE];; - } + buffer = &m_buffer[(m_reg[EREG_PNR_ARR] & 0x1f) * ETHER_BUFFER_SIZE];; result = buffer[addr++]; if ( ACCESSING_BITS_8_15 ) @@ -709,7 +788,7 @@ WRITE16_MEMBER( smc91c9x_device::write ) /* update the data generically */ - if (offset != 7 && offset < sizeof(m_reg)) + if (offset != EREG_BANK && offset < sizeof(m_reg)) LOG("%s:smc91c9x_w(%s) = [%04X]<-%04X & (%04X & %04X)\n", machine().describe_context(), ethernet_regname[offset], offset, data, mem_mask , m_regmask[offset]); mem_mask &= m_regmask[offset]; @@ -799,15 +878,12 @@ WRITE16_MEMBER( smc91c9x_device::write ) uint8_t *buffer; int addr = m_reg[EREG_POINTER] & 0x7ff; - if ( m_reg[EREG_POINTER] & 0x8000 ) - { - buffer = &m_rx[(rx_fifo_out & ( ETHER_RX_BUFFERS - 1 )) * ETHER_BUFFER_SIZE]; - } + if (m_reg[EREG_POINTER] & 0x8000) + buffer = &m_buffer[m_comp_rx.front() * ETHER_BUFFER_SIZE]; else - { - buffer = (uint8_t *)&m_tx[(tx_fifo_in & (ETHER_TX_BUFFERS-1))* ETHER_BUFFER_SIZE];; - } + buffer = &m_buffer[(m_reg[EREG_PNR_ARR] & 0x1f) * ETHER_BUFFER_SIZE];; + // TODO: Should be checking if incr is set buffer[addr++] = data; if ( ACCESSING_BITS_8_15 ) buffer[addr++] = data >> 8; @@ -817,10 +893,12 @@ WRITE16_MEMBER( smc91c9x_device::write ) } case EREG_INTERRUPT: - m_reg[EREG_INTERRUPT] &= ~(data & 0x56); - // Need to clear tx int here for vegas cartfury - if ( m_reg[EREG_FIFO_PORTS] & 0x0080 ) + // Pop tx fifo packet from completion fifo if clear tx int is set + if (m_reg[EREG_INTERRUPT] & data & EINT_TX) { + m_comp_tx.erase(m_comp_tx.begin()); m_reg[EREG_INTERRUPT] &= ~EINT_TX; + } + m_reg[EREG_INTERRUPT] &= ~(data & 0x56); update_ethernet_irq(); break; } diff --git a/src/devices/machine/smc91c9x.h b/src/devices/machine/smc91c9x.h index 9ff6229d466..cd4018c4f65 100644 --- a/src/devices/machine/smc91c9x.h +++ b/src/devices/machine/smc91c9x.h @@ -22,8 +22,10 @@ public: DECLARE_READ16_MEMBER( read ); DECLARE_WRITE16_MEMBER( write ); + TIMER_CALLBACK_MEMBER(send_frame); virtual void recv_cb(uint8_t *data, int length) override; + void set_link_connected(bool connected) { m_link_unconnected = !connected; }; protected: smc91c9x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -34,10 +36,25 @@ protected: private: static constexpr unsigned ETHER_BUFFER_SIZE = 2048; - static constexpr unsigned ETHER_RX_BUFFERS = 16; - static constexpr unsigned ETHER_TX_BUFFERS = 16; + // TODO: 96 device is larger + static constexpr unsigned ETHER_BUFFERS = 16; static constexpr unsigned ETHERNET_ADDR_SIZE = 6; + // external network is present + bool m_network_available; + + // mmu + // The bits in these vectors indicate a packet has been allocated + u32 m_alloc_rx, m_alloc_tx; + std::vector<int> m_comp_tx, m_comp_rx; + // Requests a packet allocation and returns true + // and sets the packet number if successful + bool alloc_req(const int tx, int &packet_num); + // Releases an allocation + void alloc_release(const int packet_num); + // Resets the MMU + void mmu_reset(); + // internal state devcb_write_line m_irq_handler; @@ -51,24 +68,17 @@ private: /* IRQ information */ uint8_t m_irq_state; - /* allocate information */ - uint8_t m_alloc_count; - - /* transmit/receive FIFOs */ - uint32_t rx_fifo_out; - uint32_t rx_fifo_in; - uint8_t m_rx[ETHER_BUFFER_SIZE * ETHER_RX_BUFFERS]; - - uint32_t tx_fifo_out; - uint32_t tx_fifo_in; - uint8_t m_tx[ETHER_BUFFER_SIZE * ETHER_TX_BUFFERS]; + // Main memory + uint8_t m_buffer[ETHER_BUFFER_SIZE * ETHER_BUFFERS]; /* counters */ uint32_t m_sent; uint32_t m_recd; - int ethernet_packet_is_for_me(const uint8_t mac_address[]); - int is_broadcast(uint8_t mac_address[]); + emu_timer* m_tx_timer; + + int ethernet_packet_is_for_me(const uint8_t *mac_address); + int is_broadcast(const uint8_t *mac_address); void update_ethernet_irq(); void update_stats(); @@ -77,8 +87,6 @@ private: void clear_tx_fifo(); void clear_rx_fifo(); - int send_frame(); - }; diff --git a/src/devices/machine/stvcd.cpp b/src/devices/machine/stvcd.cpp index 87b3b9e344c..e3b0cefb6d8 100644 --- a/src/devices/machine/stvcd.cpp +++ b/src/devices/machine/stvcd.cpp @@ -100,7 +100,7 @@ int saturn_state::get_track_index(uint32_t fad) int saturn_state::sega_cdrom_get_adr_control(cdrom_file *file, int track) { - return BITSWAP8(cdrom_get_adr_control(file, cur_track),3,2,1,0,7,6,5,4); + return bitswap<8>(cdrom_get_adr_control(file, cur_track),3,2,1,0,7,6,5,4); } void saturn_state::cr_standard_return(uint16_t cur_status) diff --git a/src/devices/machine/tms6100.cpp b/src/devices/machine/tms6100.cpp index d2fb40cef36..0728a511e8d 100644 --- a/src/devices/machine/tms6100.cpp +++ b/src/devices/machine/tms6100.cpp @@ -182,7 +182,7 @@ void tms6100_device::handle_command(u8 cmd) // M58819S reads serial data reversed if (m_reverse_bits) - m_sa = BITSWAP8(m_sa,0,1,2,3,4,5,6,7); + m_sa = bitswap<8>(m_sa,0,1,2,3,4,5,6,7); } else { diff --git a/src/devices/machine/vrc4373.h b/src/devices/machine/vrc4373.h index e321a4ebde4..9572380fb8b 100644 --- a/src/devices/machine/vrc4373.h +++ b/src/devices/machine/vrc4373.h @@ -11,7 +11,7 @@ #include "cpu/mips/mips3.h" #define MCFG_VRC4373_ADD(_tag, _cpu_tag) \ - MCFG_PCI_HOST_ADD(_tag, VRC4373, 0x005B1033, 0x00, 0x00000000) \ + MCFG_PCI_HOST_ADD(_tag, VRC4373, 0x1033005B, 0x00, 0x00000000) \ downcast<vrc4373_device *>(device)->set_cpu_tag(_cpu_tag); #define MCFG_VRC4373_SET_RAM(_size) \ diff --git a/src/devices/machine/vrc5074.cpp b/src/devices/machine/vrc5074.cpp index 8471d631c47..9959a60f06e 100644 --- a/src/devices/machine/vrc5074.cpp +++ b/src/devices/machine/vrc5074.cpp @@ -236,7 +236,7 @@ void vrc5074_device::device_start() // Save states // m_sdram save_item(NAME(m_sdram[0])); - save_item(NAME(m_sdram[1])); + if (m_sdram_size[1]) save_item(NAME(m_sdram[1])); save_item(NAME(m_cpu_regs)); save_item(NAME(m_nile_irq_state)); save_item(NAME(m_sdram_addr)); diff --git a/src/devices/machine/z80sio.cpp b/src/devices/machine/z80sio.cpp index ddf951161b4..efe83ac2486 100644 --- a/src/devices/machine/z80sio.cpp +++ b/src/devices/machine/z80sio.cpp @@ -1128,7 +1128,7 @@ void z80sio_channel::sync_tx_sr_empty() LOGTX("%s() Channel %c Transmit FCS '%04x' m_wr5:%02x\n", FUNCNAME, 'A' + m_index, m_tx_crc, m_wr5); // just for fun, SDLC sends the FCS inverted in reverse bit order - uint16_t const fcs(BITSWAP16(m_tx_crc, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)); + uint16_t const fcs(bitswap<16>(m_tx_crc, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)); tx_setup(((m_wr4 & WR4_SYNC_MODE_MASK) == WR4_SYNC_MODE_SDLC) ? ~fcs : fcs, 16, 0, false, true); // set the underrun flag so it will send sync next time diff --git a/src/devices/sound/astrocde.cpp b/src/devices/sound/astrocde.cpp index 1e8349bbd9d..36b0f76601a 100644 --- a/src/devices/sound/astrocde.cpp +++ b/src/devices/sound/astrocde.cpp @@ -87,7 +87,7 @@ void astrocade_device::device_start() /* generate a bitswap table for the noise */ for (i = 0; i < 256; i++) - m_bitswap[i] = BITSWAP8(i, 0,1,2,3,4,5,6,7); + m_bitswap[i] = bitswap<8>(i, 0,1,2,3,4,5,6,7); /* allocate a stream for output */ m_stream = stream_alloc(0, 1, clock()); diff --git a/src/devices/sound/rf5c400.cpp b/src/devices/sound/rf5c400.cpp index 39440c66991..6c047935399 100644 --- a/src/devices/sound/rf5c400.cpp +++ b/src/devices/sound/rf5c400.cpp @@ -129,7 +129,7 @@ void rf5c400_device::envelope_tables::init(uint32_t clock) rf5c400_device::rf5c400_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, RF5C400, tag, owner, clock) , device_sound_interface(mconfig, *this) - , m_rom(*this, DEVICE_SELF) + , device_rom_interface(mconfig, *this, 25, ENDIANNESS_LITTLE, 16) , m_stream(nullptr) , m_env_tables() { @@ -155,6 +155,10 @@ void rf5c400_device::device_start() chan.env_scale = 1.0; } + save_item(NAME(m_rf5c400_status)); + save_item(NAME(m_ext_mem_address)); + save_item(NAME(m_ext_mem_data)); + for (int i = 0; i < ARRAY_LENGTH(m_channels); i++) { save_item(NAME(m_channels[i].startH), i); @@ -180,8 +184,6 @@ void rf5c400_device::device_start() } m_stream = stream_alloc(0, 2, clock() / 384); - - m_rommask = m_rom.length() - 1; } //------------------------------------------------- @@ -191,7 +193,6 @@ void rf5c400_device::device_start() void rf5c400_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) { int i, ch; - int16_t *rom = m_rom; uint32_t end, loop; uint64_t pos; uint8_t vol, lvol, rvol, type; @@ -228,7 +229,7 @@ void rf5c400_device::sound_stream_update(sound_stream &stream, stream_sample_t * if (env_phase == PHASE_NONE) break; - tmp = rom[(pos>>16) & m_rommask]; + tmp = read_word((pos>>16)<<1); switch ( type ) { case TYPE_16: @@ -258,7 +259,7 @@ void rf5c400_device::sound_stream_update(sound_stream &stream, stream_sample_t * { env_phase = PHASE_DECAY; env_level = 1.0; - if (channel->decay & 0x0080) + if ((channel->decay & 0x0080) || (channel->decay == 0x100)) { env_step = 0.0; } @@ -295,7 +296,7 @@ void rf5c400_device::sound_stream_update(sound_stream &stream, stream_sample_t * *buf1++ += sample * pan_table[rvol]; pos += channel->step; - if ( (pos>>16) > m_rom.length() || (pos>>16) > end) + if ((pos>>16) > end) { pos -= loop<<16; pos &= 0xFFFFFF0000U; @@ -310,31 +311,57 @@ void rf5c400_device::sound_stream_update(sound_stream &stream, stream_sample_t * } } +void rf5c400_device::rom_bank_updated() +{ + m_stream->update(); +} /*****************************************************************************/ -static uint16_t rf5c400_status = 0; // a static one of these for all instances of the chip? how does that work? READ16_MEMBER( rf5c400_device::rf5c400_r ) { - switch(offset) + if (offset < 0x400) { - case 0x00: + //osd_printf_debug("%s:rf5c400_r: %08X, %08X\n", machine().describe_context().c_str(), offset, mem_mask); + + switch(offset) { - return rf5c400_status; + case 0x00: + { + return m_rf5c400_status; + } + + case 0x04: // unknown read + { + return 0; + } + + case 0x13: // memory read + { + return read_word(m_ext_mem_address<<1); + } + + default: + { + //osd_printf_debug("%s:rf5c400_r: %08X, %08X\n", machine().describe_context().c_str(), offset, mem_mask); + return 0; + } } + } + else + { + //int ch = (offset >> 5) & 0x1f; + int reg = (offset & 0x1f); - case 0x04: + switch (reg) { + case 0x0F: // unknown read return 0; - } - case 0x13: // memory read - { - return m_rom[m_ext_mem_address]; + default: + return 0; } } - - return 0; } WRITE16_MEMBER( rf5c400_device::rf5c400_w ) @@ -345,7 +372,7 @@ WRITE16_MEMBER( rf5c400_device::rf5c400_w ) { case 0x00: { - rf5c400_status = data; + m_rf5c400_status = data; break; } @@ -411,7 +438,7 @@ WRITE16_MEMBER( rf5c400_device::rf5c400_w ) { if ((data & 0x3) == 3) { - m_rom[m_ext_mem_address] = m_ext_mem_data; + this->space().write_word(m_ext_mem_address << 1, m_ext_mem_data); } break; } @@ -431,11 +458,11 @@ WRITE16_MEMBER( rf5c400_device::rf5c400_w ) default: { - //osd_printf_debug("%s:rf5c400_w: %08X, %08X, %08X\n", machine().describe_context(), data, offset, mem_mask); + //osd_printf_debug("%s:rf5c400_w: %08X, %08X, %08X\n", machine().describe_context().c_str(), data, offset, mem_mask); break; } } - //osd_printf_debug("%s:rf5c400_w: %08X, %08X, %08X at %08X\n", machine().describe_context(), data, offset, mem_mask); + //osd_printf_debug("%s:rf5c400_w: %08X, %08X, %08X\n", machine().describe_context().c_str(), data, offset, mem_mask); } else { @@ -504,12 +531,12 @@ WRITE16_MEMBER( rf5c400_device::rf5c400_w ) } case 0x0A: // relative to env attack ? { - // always 0x0100 + // always 0x0100/0x140 break; } case 0x0B: // relative to env decay ? { - // always 0x0100 + // always 0x0100/0x140/0x180 break; } case 0x0C: // env decay @@ -521,7 +548,7 @@ WRITE16_MEMBER( rf5c400_device::rf5c400_w ) } case 0x0D: // relative to env release ? { - // always 0x0100 + // always 0x0100/0x140 break; } case 0x0E: // env release @@ -530,6 +557,11 @@ WRITE16_MEMBER( rf5c400_device::rf5c400_w ) channel->release = data; break; } + case 0x0F: // unknown write + { + // always 0x0000 + break; + } case 0x10: // resonance, cutoff freq. { // bit 15-12: resonance diff --git a/src/devices/sound/rf5c400.h b/src/devices/sound/rf5c400.h index 6fe27863f70..4d681db3a94 100644 --- a/src/devices/sound/rf5c400.h +++ b/src/devices/sound/rf5c400.h @@ -25,7 +25,8 @@ // ======================> rf5c400_device class rf5c400_device : public device_t, - public device_sound_interface + public device_sound_interface, + public device_rom_interface { public: rf5c400_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -40,6 +41,9 @@ protected: // sound stream update overrides virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) override; + // device_rom_interface overrides + virtual void rom_bank_updated() override; + private: struct rf5c400_channel { @@ -88,16 +92,13 @@ private: uint8_t decode80(uint8_t val); - required_region_ptr<int16_t> m_rom; - - uint32_t m_rommask; - sound_stream *m_stream; envelope_tables m_env_tables; rf5c400_channel m_channels[32]; + uint16_t m_rf5c400_status; uint32_t m_ext_mem_address; uint16_t m_ext_mem_data; }; diff --git a/src/devices/sound/tms5110.cpp b/src/devices/sound/tms5110.cpp index 5f7ee0bddb0..b7bef7f741e 100644 --- a/src/devices/sound/tms5110.cpp +++ b/src/devices/sound/tms5110.cpp @@ -1345,7 +1345,7 @@ void tmsprom_device::device_timer(emu_timer &timer, device_timer_id id, int para if (ctrl & (1 << m_reset_bit)) m_address = 0; - m_ctl_cb((offs_t)0, BITSWAP8(ctrl,0,0,0,0,m_ctl8_bit, + m_ctl_cb((offs_t)0, bitswap<8>(ctrl,0,0,0,0,m_ctl8_bit, m_ctl4_bit,m_ctl2_bit,m_ctl1_bit)); m_pdc_cb((ctrl >> m_pdc_bit) & 0x01); diff --git a/src/devices/sound/ymz770.cpp b/src/devices/sound/ymz770.cpp index ae7a995ce21..968a1514072 100644 --- a/src/devices/sound/ymz770.cpp +++ b/src/devices/sound/ymz770.cpp @@ -110,6 +110,13 @@ void ymz770_device::device_start() save_item(NAME(m_sequences[ch].bank), ch); save_item(NAME(m_sequences[ch].is_playing), ch); } + for (int ch = 0; ch < 8; ch++) + { + save_item(NAME(m_sqcs[ch].sqc), ch); + save_item(NAME(m_sqcs[ch].loop), ch); + save_item(NAME(m_sqcs[ch].is_playing), ch); + save_item(NAME(m_sqcs[ch].is_waiting), ch); + } } @@ -144,6 +151,11 @@ void ymz770_device::device_reset() sequence.bank = 0; sequence.is_playing = false; } + for (auto & sqc : m_sqcs) + { + sqc.is_playing = false; + sqc.loop = 0; + } } @@ -522,7 +534,7 @@ void ymz774_device::internal_reg_write(uint8_t reg, uint8_t data) if (reg & 1) m_sequences[sq].sequence = (m_sequences[sq].sequence & 0xff00) | data; else - m_sequences[sq].sequence = (m_sequences[sq].sequence & 0x00ff) | ((data & 0x0f) << 8); // TODO check if total number really upto 0x1000 + m_sequences[sq].sequence = (m_sequences[sq].sequence & 0x00ff) | ((data & 0x0f) << 8); break; case 0x70: // Start / Stop if (data) @@ -545,7 +557,7 @@ void ymz774_device::internal_reg_write(uint8_t reg, uint8_t data) break; case 0x88: // timer H and L case 0x90: - sq = (reg >> 1) & 7; + sq = (reg - 0x88) >> 1; if (reg & 1) m_sequences[sq].timer = (m_sequences[sq].timer & 0xff00) | data; else @@ -566,7 +578,26 @@ void ymz774_device::internal_reg_write(uint8_t reg, uint8_t data) } else { - if (data) logerror("SQC unimplemented %02X %02X\n", reg, data); + int sq = reg & 7; + switch (reg & 0xf8) + { + case 0xb0: + m_sqcs[sq].sqc = data; + break; + case 0xb8: + if (data) + { + m_sqcs[sq].data = &m_rom[get_sqc_offs(m_sqcs[sq].sqc)]; + m_sqcs[sq].is_playing = true; + m_sqcs[sq].is_waiting = false; + } + else + m_sqcs[sq].is_playing = false; + break; + case 0xc0: + m_sqcs[sq].loop = data; + break; + } } } // else bank1 - Equalizer control @@ -596,7 +627,32 @@ void ymz774_device::sequencer() { for (int i = 0; i < 8; i++) { + auto & sqc = m_sqcs[i]; auto & sequence = m_sequences[i]; + + if (sqc.is_playing && !sqc.is_waiting) + { + sequence.sequence = ((sqc.data[0] << 8) | sqc.data[1]) & 0xfff; + sequence.loop = sqc.data[2]; + sequence.data = &m_rom[get_seq_offs(sequence.sequence)]; + sequence.delay = 0; + sequence.is_playing = true; + sqc.is_waiting = true; + if (sqc.data[3] == 0xff) + { + if (sqc.loop) + { + if (sqc.loop != 255) + --sqc.loop; + sqc.data = &m_rom[get_sqc_offs(sqc.sqc)]; + } + else + sqc.is_playing = false; + } + else + sqc.data += 4; + } + if (sequence.is_playing) { if (sequence.delay > 0) @@ -623,6 +679,7 @@ void ymz774_device::sequencer() else { sequence.is_playing = false; + sqc.is_waiting = false; } break; case 0xfe: // timer delay diff --git a/src/devices/sound/ymz770.h b/src/devices/sound/ymz770.h index b640d780ef5..6723ac2bf1c 100644 --- a/src/devices/sound/ymz770.h +++ b/src/devices/sound/ymz770.h @@ -104,9 +104,18 @@ protected: uint8_t bank; bool is_playing; }; + struct ymz_sqc + { + uint8_t sqc; + uint8_t loop; + uint8_t *data; + bool is_playing; + bool is_waiting; + }; ymz_channel m_channels[16]; ymz_sequence m_sequences[8]; + ymz_sqc m_sqcs[8]; }; // ======================> ymz774_device @@ -122,6 +131,7 @@ protected: virtual void internal_reg_write(uint8_t reg, uint8_t data) override; virtual uint32_t get_phrase_offs(int phrase) override { int ph = phrase * 4; return ((m_rom[ph] & 0x0f) << 24 | m_rom[ph + 1] << 16 | m_rom[ph + 2] << 8 | m_rom[ph + 3]) * 2; }; virtual uint32_t get_seq_offs(int sqn) override { int sq = sqn * 4 + 0x2000; return ((m_rom[sq] & 0x0f) << 24 | m_rom[sq + 1] << 16 | m_rom[sq + 2] << 8 | m_rom[sq + 3]) * 2; }; + uint32_t get_sqc_offs(int sqc) { int sq = sqc * 4 + 0x6000; return ((m_rom[sq] & 0x0f) << 24 | m_rom[sq + 1] << 16 | m_rom[sq + 2] << 8 | m_rom[sq + 3]) * 2; }; virtual void sequencer() override; private: int m_bank; diff --git a/src/devices/video/dp8510.cpp b/src/devices/video/dp8510.cpp new file mode 100644 index 00000000000..a98ea433322 --- /dev/null +++ b/src/devices/video/dp8510.cpp @@ -0,0 +1,211 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay + +/* + * An implementation of the National Semiconductor DP8510 BITBLT Processing Unit. + * + * This device is designed to perform shifting, masking and logic operations on + * source and destination video memory data values. The device relies on + * external logic to drive the system video memory, and to control input lines + * on the device to enable it to read or write its inputs and outputs on the + * data bus. The device has a 16 bit data bus, as well as a 16 slot internal + * fifo, which enables it to work with up to 16 words containing 16 bits of + * pixel data at a time. The expected design was that a single BPU would handle + * each video bitplane, with multiple devices being used in parallel to handle + * multiple planes. + * + * This device is used in the InterPro GT family graphics, which do not make + * use of the line drawing mode, and is therefore currently unimplemented. + * + * Reference: http://bitsavers.org/components/national/_dataBooks/1988_National_Graphics_Handbook.pdf + * + * TODO + * - line drawing mode + */ + +#include "emu.h" +#include "dp8510.h" + +#define VERBOSE 0 +#include "logmacro.h" + +DEFINE_DEVICE_TYPE(DP8510, dp8510_device, "dp8510", "National Semiconductor BITBLT Processing Unit") + +const char *const dp8510_device::BITBLT_OP[] = { + "0", "~s & ~d", "~s & d", "~s", "s & ~d", "~d", "s ^ d", "~s | ~d", + "s & d", "~s ^ ~d", "d", "~s | d", "s", "s | ~d", "s | d", "1" +}; + +dp8510_device::dp8510_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, DP8510, tag, owner, clock) + , m_line_drawing(CLEAR_LINE) + , m_barrel_input_select(CLEAR_LINE) + , m_pixel_data_input(CLEAR_LINE) + , m_data_output_select(CLEAR_LINE) + , m_left_mask(CLEAR_LINE) + , m_right_mask(CLEAR_LINE) +{ +} + +void dp8510_device::device_start() +{ + // input lines + save_item(NAME(m_line_drawing)); + save_item(NAME(m_barrel_input_select)); + save_item(NAME(m_pixel_data_input)); + save_item(NAME(m_data_output_select)); + save_item(NAME(m_left_mask)); + save_item(NAME(m_right_mask)); + + // registers and latches + save_item(NAME(m_control)); + save_item(NAME(m_barrel_input_latch)); + save_item(NAME(m_logic_output)); + save_item(NAME(m_fifo_output_latch)); + + // fifo + save_item(NAME(m_fifo)); + save_item(NAME(m_fifo_head)); + save_item(NAME(m_fifo_tail)); + + // helper internal state + save_item(NAME(m_f0)); + save_item(NAME(m_f1)); + save_item(NAME(m_f2)); + save_item(NAME(m_f3)); +} + +void dp8510_device::device_reset() +{ + m_fifo_head = 0; + m_fifo_tail = 0; +} + +void dp8510_device::control_w(const u16 data) +{ + LOG("control_w function select %d shift number %d left mask %d right mask %d (%s)\n", + (data & CONTROL_FS) >> 12, + (data & CONTROL_SN) >> 8, + (data & CONTROL_LM) >> 4, + (data & CONTROL_RM) >> 0, + machine().describe_context()); + + m_control = data; + + // expand function select bits to 16 bit size for convenience + m_f0 = (data & FS_0) ? ~u16(0) : 0; + m_f1 = (data & FS_1) ? ~u16(0) : 0; + m_f2 = (data & FS_2) ? ~u16(0) : 0; + m_f3 = (data & FS_3) ? ~u16(0) : 0; +} + +void dp8510_device::source_w(const u16 data, const bool fifo_write) +{ + if (fifo_write) + { + // execute barrel shift + const u8 shift_amount = (m_control & CONTROL_SN) >> 8; + const u16 shift_result = m_barrel_input_select + ? (data << shift_amount) | (m_barrel_input_latch >> (16 - shift_amount)) + : (m_barrel_input_latch << shift_amount) | (data >> (16 - shift_amount)); + + LOG("source_w 0x%04x shifted data 0x%04x written to fifo\n", data, shift_result); + + // write result to fifo + fifo_w(shift_result); + } + else + LOG("source_w barrel input latch 0x%04x\n", data); + + // save data in input latch + m_barrel_input_latch = data; +} + +u16 dp8510_device::logic_unit(const u16 src, const u16 dst) const +{ + // compute logic unit result + const u16 result = + (m_f3 & src & dst) + + (m_f2 & src & ~dst) + + (m_f1 & ~src & dst) + + (m_f0 & ~src & ~dst); + + LOG("logic_unit operation %s source 0x%04x destination 0x%04x result 0x%04x\n", + BITBLT_OP[(m_control & CONTROL_FS) >> 12], src, dst, result); + + return result; +} + +void dp8510_device::destination_w(const u16 data, const bool fifo_write) +{ + // fetch the source from the pixel data input or fifo + const u16 source = m_line_drawing ? m_pixel_data_input ? 0xffff : 0 : m_fifo_output_latch = fifo_r(); + + // compute the result + u16 result = logic_unit(source, data); + + // apply left mask + if (m_left_mask) + { + const u16 left_mask = 0xffffU >> ((m_control & CONTROL_LM) >> 4); + if (left_mask != 0xffff) + LOG("destination_w left mask 0x%04x applied\n", left_mask); + + result = (result & left_mask) | (data & ~left_mask); + } + + // apply right mask + if (m_right_mask) + { + const u16 right_mask = s16(0x8000) >> (m_control & CONTROL_RM); + if (right_mask != 0xffff) + LOG("destination_w right mask 0x%04x applied\n", right_mask); + + result = (result & right_mask) | (data & ~right_mask); + } + + // latch output + m_logic_output = result; + + // write the result back to the fifo + if (fifo_write) + { + LOG("destination_w masked data 0x%04x written to fifo\n", m_logic_output); + fifo_w(m_logic_output); + } + else + LOG("destination_w masked data 0x%04x latched\n", m_logic_output); +} + +u16 dp8510_device::output_r() const +{ + // return output from fifo or logic unit + if (m_data_output_select) + return m_fifo_output_latch; + else + return m_logic_output; +} + +u8 dp8510_device::pixel_r(const offs_t pixel_address) const +{ + return (m_logic_output >> (~pixel_address & 0xf)) & 0x1; +} + +u16 dp8510_device::fifo_r() +{ + const u16 data = m_fifo[m_fifo_head++]; + + m_fifo_head %= FIFO_SIZE; + + return data; +} + +void dp8510_device::fifo_w(const u16 data) +{ + m_fifo[m_fifo_tail++] = data; + + m_fifo_tail %= FIFO_SIZE; + + if (m_fifo_tail == m_fifo_head) + logerror("fifo_w warning fifo full (%s)\n", machine().describe_context()); +} diff --git a/src/devices/video/dp8510.h b/src/devices/video/dp8510.h new file mode 100644 index 00000000000..04a0c2b1676 --- /dev/null +++ b/src/devices/video/dp8510.h @@ -0,0 +1,87 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay +#ifndef MAME_VIDEO_DP8510_H +#define MAME_VIDEO_DP8510_H + +#pragma once + + +class dp8510_device : public device_t +{ +public: + dp8510_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + + static const char *const BITBLT_OP[]; + static const int FIFO_SIZE = 16; + + DECLARE_WRITE_LINE_MEMBER(line_drawing) { m_line_drawing = state; } + DECLARE_WRITE_LINE_MEMBER(barrel_input_select) { m_barrel_input_select = state; } + DECLARE_WRITE_LINE_MEMBER(pixel_data_input) { m_pixel_data_input = state; } + DECLARE_WRITE_LINE_MEMBER(data_output_select) { m_data_output_select = state; } + DECLARE_WRITE_LINE_MEMBER(left_mask_enable) { m_left_mask = state; } + DECLARE_WRITE_LINE_MEMBER(right_mask_enable) { m_right_mask = state; } + + enum control_mask : u16 + { + CONTROL_RM = 0x000f, // right mask + CONTROL_LM = 0x00f0, // left mask + CONTROL_SN = 0x0f00, // shift number + CONTROL_FS = 0xf000 // function select + }; + + enum control_fs_mask : u16 + { + FS_0 = 0x1000, + FS_1 = 0x2000, + FS_2 = 0x4000, + FS_3 = 0x8000 + }; + + void control_w(const u16 data); + + void source_w(const u16 data, const bool fifo_write = true); + void destination_w(const u16 data, const bool fifo_write = false); + + u16 output_r() const; + u8 pixel_r(const offs_t pixel_address) const; + +protected: + virtual void device_start() override; + virtual void device_reset() override; + + u16 logic_unit(const u16 src, const u16 dst) const; + + u16 fifo_r(); + void fifo_w(const u16 data); + +private: + // input lines + int m_line_drawing; + int m_barrel_input_select; + int m_pixel_data_input; + int m_data_output_select; + int m_left_mask; + int m_right_mask; + + // registers and latches + u16 m_control; + u16 m_barrel_input_latch; + u16 m_logic_output; + u16 m_fifo_output_latch; + + // fifo + u16 m_fifo[FIFO_SIZE]; + u8 m_fifo_head; + u8 m_fifo_tail; + + // helper internal state + u16 m_f0; + u16 m_f1; + u16 m_f2; + u16 m_f3; +}; + +// device type definition +DECLARE_DEVICE_TYPE(DP8510, dp8510_device) + +#endif // MAME_VIDEO_DP8510_H diff --git a/src/devices/video/ef9340_1.cpp b/src/devices/video/ef9340_1.cpp index 484cc67cfbf..54c6f651dac 100644 --- a/src/devices/video/ef9340_1.cpp +++ b/src/devices/video/ef9340_1.cpp @@ -213,7 +213,7 @@ void ef9340_1_device::ef9341_write( uint8_t command, uint8_t b, uint8_t data ) if ( b >= 0xa0 ) { - m_ef934x_ext_char_ram[ ( ( a & 0x80 ) << 3 ) | external_chargen_address( b, slice ) ] = BITSWAP8(m_ef9341.TA,0,1,2,3,4,5,6,7); + m_ef934x_ext_char_ram[ ( ( a & 0x80 ) << 3 ) | external_chargen_address( b, slice ) ] = bitswap<8>(m_ef9341.TA,0,1,2,3,4,5,6,7); } // Increment slice number diff --git a/src/devices/video/gba_lcd.cpp b/src/devices/video/gba_lcd.cpp index c73996e32a3..ba63bca0008 100644 --- a/src/devices/video/gba_lcd.cpp +++ b/src/devices/video/gba_lcd.cpp @@ -1620,34 +1620,6 @@ WRITE32_MEMBER(gba_lcd_device::video_w) } } -static inline uint32_t combine_data_32_16(uint32_t prev, uint32_t data, uint32_t mem_mask) -{ - COMBINE_DATA(&prev); - - switch (mem_mask) - { - case 0x000000ff: - prev &= 0xffff00ff; - prev |= data << 8; - break; - case 0x0000ff00: - prev &= 0xffffff00; - prev |= data >> 8; - break; - case 0x00ff0000: - prev &= 0x00ffffff; - prev |= data << 8; - break; - case 0xff000000: - prev &= 0xff00ffff; - prev |= data >> 8; - break; - default: - break; - } - return prev; -} - READ32_MEMBER(gba_lcd_device::gba_pram_r) { return m_pram[offset]; @@ -1655,7 +1627,7 @@ READ32_MEMBER(gba_lcd_device::gba_pram_r) WRITE32_MEMBER(gba_lcd_device::gba_pram_w) { - m_pram[offset] = combine_data_32_16(m_pram[offset], data, mem_mask); + COMBINE_DATA(&m_pram[offset]); } READ32_MEMBER(gba_lcd_device::gba_vram_r) @@ -1665,7 +1637,7 @@ READ32_MEMBER(gba_lcd_device::gba_vram_r) WRITE32_MEMBER(gba_lcd_device::gba_vram_w) { - m_vram[offset] = combine_data_32_16(m_vram[offset], data, mem_mask); + COMBINE_DATA(&m_vram[offset]); } READ32_MEMBER(gba_lcd_device::gba_oam_r) @@ -1675,7 +1647,7 @@ READ32_MEMBER(gba_lcd_device::gba_oam_r) WRITE32_MEMBER(gba_lcd_device::gba_oam_w) { - m_oam[offset] = combine_data_32_16(m_oam[offset], data, mem_mask); + COMBINE_DATA(&m_oam[offset]); } TIMER_CALLBACK_MEMBER(gba_lcd_device::perform_hbl) diff --git a/src/devices/video/voodoo.cpp b/src/devices/video/voodoo.cpp index 259e24899e5..26de3c787b3 100644 --- a/src/devices/video/voodoo.cpp +++ b/src/devices/video/voodoo.cpp @@ -5174,7 +5174,10 @@ void voodoo_device::device_start() banshee.io[io_sipMonitor] = 0x40000000; banshee.io[io_lfbMemoryConfig] = 0x000a2200; banshee.io[io_dramInit0] = 0x00579d29; - banshee.io[io_dramInit0] |= 0x08000000; // Konami Viper expects 16MBit SGRAMs + if (m_fbmem == 16) + banshee.io[io_dramInit0] |= 0x0c000000; // Midway Vegas (denver) expects 2 banks of 16MBit SGRAMs + else + banshee.io[io_dramInit0] |= 0x08000000; // Konami Viper expects 16MBit SGRAMs banshee.io[io_dramInit1] = 0x00f02200; banshee.io[io_tmuGbeInit] = 0x00000bfb; |