diff options
Diffstat (limited to 'src/devices/machine')
25 files changed, 416 insertions, 771 deletions
diff --git a/src/devices/machine/6522via.cpp b/src/devices/machine/6522via.cpp index a4ba3e58478..ae1b7da0f61 100644 --- a/src/devices/machine/6522via.cpp +++ b/src/devices/machine/6522via.cpp @@ -4,6 +4,9 @@ Rockwell 6522 VIA interface and emulation + This function emulates the functionality of up to 8 6522 + versatile interface adapters. + This is based on the M6821 emulation in MAME. To do: @@ -208,6 +211,12 @@ void via6522_device::device_start() m_shift_timer = timer_alloc(TIMER_SHIFT); m_shift_irq_timer = timer_alloc(TIMER_SHIFT_IRQ); + /* Default clock is from CPU1 */ + if (clock() == 0) + { + set_unscaled_clock(machine().firstcpu->clock()); + } + /* save state register */ save_item(NAME(m_in_a)); save_item(NAME(m_in_ca1)); diff --git a/src/devices/machine/68307.cpp b/src/devices/machine/68307.cpp index e3ce8bc549d..adc65ce199b 100644 --- a/src/devices/machine/68307.cpp +++ b/src/devices/machine/68307.cpp @@ -23,13 +23,17 @@ DEFINE_DEVICE_TYPE(M68307, m68307_cpu_device, "mc68307", "MC68307") */ READ8_MEMBER( m68307_cpu_device::m68307_internal_serial_r ) { - if (offset&1) return m_duart->read(*m_program, offset>>1); + m68307_cpu_device *m68k = this; + + if (offset&1) return m_duart->read(*m68k->program, offset>>1); return 0x0000; } WRITE8_MEMBER(m68307_cpu_device::m68307_internal_serial_w) { - if (offset & 1) m_duart->write(*m_program, offset >> 1, data); + m68307_cpu_device *m68k = this; + + if (offset & 1) m_duart->write(*m68k->program, offset >> 1, data); } @@ -51,20 +55,20 @@ MACHINE_CONFIG_END m68307_cpu_device::m68307_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : m68000_device(mconfig, tag, owner, clock, M68307, 16, 24, ADDRESS_MAP_NAME(m68307_internal_map)), - m_write_irq(*this), - m_write_a_tx(*this), - m_write_b_tx(*this), - m_read_inport(*this), - m_write_outport(*this), + write_irq(*this), + write_a_tx(*this), + write_b_tx(*this), + read_inport(*this), + write_outport(*this), m_duart(*this, "internal68681") { - m_m68307SIM = nullptr; - m_m68307MBUS = nullptr; - m_m68307TIMER = nullptr; - m_m68307_base = 0; - m_m68307_scrhigh = 0; - m_m68307_scrlow = 0; - m_m68307_currentcs = 0; + m68307SIM = nullptr; + m68307MBUS = nullptr; + m68307TIMER = nullptr; + m68307_base = 0; + m68307_scrhigh = 0; + m68307_scrlow = 0; + m68307_currentcs = 0; } @@ -76,13 +80,13 @@ void m68307_cpu_device::device_reset() { m68000_device::device_reset(); - if (m_m68307SIM) m_m68307SIM->reset(); - if (m_m68307MBUS) m_m68307MBUS->reset(); - if (m_m68307TIMER) m_m68307TIMER->reset(); + if (m68307SIM) m68307SIM->reset(); + if (m68307MBUS) m68307MBUS->reset(); + if (m68307TIMER) m68307TIMER->reset(); - m_m68307_base = 0xbfff; - m_m68307_scrhigh = 0x0007; - m_m68307_scrlow = 0xf010; + m68307_base = 0xbfff; + m68307_scrhigh = 0x0007; + m68307_scrlow = 0xf010; } @@ -93,7 +97,7 @@ void m68307_cpu_device::device_reset() inline int m68307_cpu_device::calc_cs(offs_t address) const { - m68307_sim const &sim = *m_m68307SIM; + m68307_sim const &sim = *m68307SIM; for (int i=0; i < 4; i++) { int const br = sim.m_br[i] & 1; @@ -108,43 +112,43 @@ inline int m68307_cpu_device::calc_cs(offs_t address) const uint16_t m68307_cpu_device::simple_read_immediate_16_m68307(offs_t address) { -// m_m68307_currentcs = calc_cs(address); +// m68307_currentcs = calc_cs(address); return m_direct->read_word(address); } uint8_t m68307_cpu_device::read_byte_m68307(offs_t address) { -// m_m68307_currentcs = calc_cs(address); +// m68307_currentcs = calc_cs(address); return m_space->read_byte(address); } uint16_t m68307_cpu_device::read_word_m68307(offs_t address) { -// m_m68307_currentcs = calc_cs(address); +// m68307_currentcs = calc_cs(address); return m_space->read_word(address); } uint32_t m68307_cpu_device::read_dword_m68307(offs_t address) { -// m_m68307_currentcs = calc_cs(address); +// m68307_currentcs = calc_cs(address); return m_space->read_dword(address); } void m68307_cpu_device::write_byte_m68307(offs_t address, uint8_t data) { -// m_m68307_currentcs = calc_cs(address); +// m68307_currentcs = calc_cs(address); m_space->write_byte(address, data); } void m68307_cpu_device::write_word_m68307(offs_t address, uint16_t data) { -// m_m68307_currentcs = calc_cs(address); +// m68307_currentcs = calc_cs(address); m_space->write_word(address, data); } void m68307_cpu_device::write_dword_m68307(offs_t address, uint32_t data) { -// m_m68307_currentcs = calc_cs(address); +// m68307_currentcs = calc_cs(address); m_space->write_dword(address, data); } @@ -155,15 +159,15 @@ void m68307_cpu_device::init16_m68307(address_space &space) { m_space = &space; m_direct = space.direct<0>(); - m_opcode_xor = 0; - - m_readimm16 = m68k_readimm16_delegate(&m68307_cpu_device::simple_read_immediate_16_m68307, this); - m_read8 = m68k_read8_delegate(&m68307_cpu_device::read_byte_m68307, this); - m_read16 = m68k_read16_delegate(&m68307_cpu_device::read_word_m68307, this); - m_read32 = m68k_read32_delegate(&m68307_cpu_device::read_dword_m68307, this); - m_write8 = m68k_write8_delegate(&m68307_cpu_device::write_byte_m68307, this); - m_write16 = m68k_write16_delegate(&m68307_cpu_device::write_word_m68307, this); - m_write32 = m68k_write32_delegate(&m68307_cpu_device::write_dword_m68307, this); + opcode_xor = 0; + + readimm16 = m68k_readimm16_delegate(&m68307_cpu_device::simple_read_immediate_16_m68307, this); + read8 = m68k_read8_delegate(&m68307_cpu_device::read_byte_m68307, this); + read16 = m68k_read16_delegate(&m68307_cpu_device::read_word_m68307, this); + read32 = m68k_read32_delegate(&m68307_cpu_device::read_dword_m68307, this); + write8 = m68k_write8_delegate(&m68307_cpu_device::write_byte_m68307, this); + write16 = m68k_write16_delegate(&m68307_cpu_device::write_word_m68307, this); + write32 = m68k_write32_delegate(&m68307_cpu_device::write_dword_m68307, this); } @@ -186,9 +190,9 @@ void m68307_cpu_device::set_port_callbacks( uint16_t m68307_cpu_device::get_cs(offs_t address) { - m_m68307_currentcs = calc_cs(address); + m68307_currentcs = calc_cs(address); - return m_m68307_currentcs; + return m68307_currentcs; } @@ -201,22 +205,22 @@ void m68307_cpu_device::set_interrupt(int level, int vector) void m68307_cpu_device::timer0_interrupt() { - int prioritylevel = (m_m68307SIM->m_picr & 0x7000)>>12; - int vector = (m_m68307SIM->m_pivr & 0x00f0) | 0xa; + int prioritylevel = (m68307SIM->m_picr & 0x7000)>>12; + int vector = (m68307SIM->m_pivr & 0x00f0) | 0xa; set_interrupt(prioritylevel, vector); } void m68307_cpu_device::timer1_interrupt() { - int prioritylevel = (m_m68307SIM->m_picr & 0x0700)>>8; - int vector = (m_m68307SIM->m_pivr & 0x00f0) | 0xb; + int prioritylevel = (m68307SIM->m_picr & 0x0700)>>8; + int vector = (m68307SIM->m_pivr & 0x00f0) | 0xb; set_interrupt(prioritylevel, vector); } void m68307_cpu_device::serial_interrupt(int vector) { - int prioritylevel = (m_m68307SIM->m_picr & 0x0070)>>4; + int prioritylevel = (m68307SIM->m_picr & 0x0070)>>4; set_interrupt(prioritylevel, vector); } @@ -230,16 +234,16 @@ WRITE_LINE_MEMBER(m68307_cpu_device::m68307_duart_irq_handler) void m68307_cpu_device::mbus_interrupt() { - int prioritylevel = (m_m68307SIM->m_picr & 0x0007)>>0; - int vector = (m_m68307SIM->m_pivr & 0x00f0) | 0xd; + int prioritylevel = (m68307SIM->m_picr & 0x0007)>>0; + int vector = (m68307SIM->m_pivr & 0x00f0) | 0xd; set_interrupt(prioritylevel, vector); } void m68307_cpu_device::licr2_interrupt() { - int prioritylevel = (m_m68307SIM->m_licr2 & 0x0007)>>0; - int vector = (m_m68307SIM->m_pivr & 0x00f0) | 0x9; - m_m68307SIM->m_licr2 |= 0x8; + int prioritylevel = (m68307SIM->m_licr2 & 0x0007)>>0; + int vector = (m68307SIM->m_pivr & 0x00f0) | 0x9; + m68307SIM->m_licr2 |= 0x8; set_interrupt(prioritylevel, vector); @@ -253,28 +257,28 @@ void m68307_cpu_device::device_start() set via remappable register */ - init16_m68307(*m_program); + init16_m68307(*program); - m_m68307SIM = new m68307_sim(); - m_m68307MBUS = new m68307_mbus(); - m_m68307TIMER = new m68307_timer(); + m68307SIM = new m68307_sim(); + m68307MBUS = new m68307_mbus(); + m68307TIMER = new m68307_timer(); - m_m68307TIMER->init(this); + m68307TIMER->init(this); - m_m68307SIM->reset(); - m_m68307MBUS->reset(); - m_m68307TIMER->reset(); + m68307SIM->reset(); + m68307MBUS->reset(); + m68307TIMER->reset(); - m_internal = &space(AS_PROGRAM); - m_m68307_base = 0xbfff; - m_m68307_scrhigh = 0x0007; - m_m68307_scrlow = 0xf010; + internal = &this->space(AS_PROGRAM); + m68307_base = 0xbfff; + m68307_scrhigh = 0x0007; + m68307_scrlow = 0xf010; - m_write_irq.resolve_safe(); - m_write_a_tx.resolve_safe(); - m_write_b_tx.resolve_safe(); - m_read_inport.resolve(); - m_write_outport.resolve_safe(); + write_irq.resolve_safe(); + write_a_tx.resolve_safe(); + write_b_tx.resolve_safe(); + read_inport.resolve(); + write_outport.resolve_safe(); set_port_callbacks(porta_read_delegate(), porta_write_delegate(), portb_read_delegate(), portb_write_delegate()); } @@ -283,14 +287,16 @@ void m68307_cpu_device::device_start() READ16_MEMBER( m68307_cpu_device::m68307_internal_base_r ) { + m68307_cpu_device *m68k = this; + int pc = space.device().safe_pc(); logerror("%08x m68307_internal_base_r %08x, (%04x)\n", pc, offset*2,mem_mask); switch (offset<<1) { - case 0x2: return m_m68307_base; - case 0x4: return m_m68307_scrhigh; - case 0x6: return m_m68307_scrlow; + case 0x2: return m68k->m68307_base; + case 0x4: return m68k->m68307_scrhigh; + case 0x6: return m68k->m68307_scrlow; } logerror("(read was illegal?)\n"); @@ -300,6 +306,8 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_base_r ) WRITE16_MEMBER( m68307_cpu_device::m68307_internal_base_w ) { + m68307_cpu_device *m68k = this; + int pc = space.device().safe_pc(); logerror("%08x m68307_internal_base_w %08x, %04x (%04x)\n", pc, offset*2,data,mem_mask); int base; @@ -309,35 +317,35 @@ WRITE16_MEMBER( m68307_cpu_device::m68307_internal_base_w ) { case 0x2: /* remove old internal handler */ - base = (m_m68307_base & 0x0fff) << 12; - //mask = (m_m68307_base & 0xe000) >> 13; - //if ( m_m68307_base & 0x1000 ) mask |= 7; - m_internal->unmap_readwrite(base+0x000, base+0x04f); - m_internal->unmap_readwrite(base+0x100, base+0x11f); - m_internal->unmap_readwrite(base+0x120, base+0x13f); - m_internal->unmap_readwrite(base+0x140, base+0x149); + base = (m68k->m68307_base & 0x0fff) << 12; + //mask = (m68k->m68307_base & 0xe000) >> 13; + //if ( m68k->m68307_base & 0x1000 ) mask |= 7; + m68k->internal->unmap_readwrite(base+0x000, base+0x04f); + m68k->internal->unmap_readwrite(base+0x100, base+0x11f); + m68k->internal->unmap_readwrite(base+0x120, base+0x13f); + m68k->internal->unmap_readwrite(base+0x140, base+0x149); /* store new base address */ - COMBINE_DATA(&m_m68307_base); + COMBINE_DATA(&m68k->m68307_base); /* install new internal handler */ - base = (m_m68307_base & 0x0fff) << 12; - //mask = (m_m68307_base & 0xe000) >> 13; - //if ( m_m68307_base & 0x1000 ) mask |= 7; - m_internal->install_readwrite_handler(base + 0x000, base + 0x04f, read16_delegate(FUNC(m68307_cpu_device::m68307_internal_sim_r),this), write16_delegate(FUNC(m68307_cpu_device::m68307_internal_sim_w),this)); - m_internal->install_readwrite_handler(base + 0x100, base + 0x11f, read8_delegate(FUNC(m68307_cpu_device::m68307_internal_serial_r),this), write8_delegate(FUNC(m68307_cpu_device::m68307_internal_serial_w),this), 0xffff); - m_internal->install_readwrite_handler(base + 0x120, base + 0x13f, read16_delegate(FUNC(m68307_cpu_device::m68307_internal_timer_r),this), write16_delegate(FUNC(m68307_cpu_device::m68307_internal_timer_w),this)); - m_internal->install_readwrite_handler(base + 0x140, base + 0x149, read8_delegate(FUNC(m68307_cpu_device::m68307_internal_mbus_r),this), write8_delegate(FUNC(m68307_cpu_device::m68307_internal_mbus_w),this), 0xffff); + base = (m68k->m68307_base & 0x0fff) << 12; + //mask = (m68k->m68307_base & 0xe000) >> 13; + //if ( m68k->m68307_base & 0x1000 ) mask |= 7; + m68k->internal->install_readwrite_handler(base + 0x000, base + 0x04f, read16_delegate(FUNC(m68307_cpu_device::m68307_internal_sim_r),this), write16_delegate(FUNC(m68307_cpu_device::m68307_internal_sim_w),this)); + m68k->internal->install_readwrite_handler(base + 0x100, base + 0x11f, read8_delegate(FUNC(m68307_cpu_device::m68307_internal_serial_r),this), write8_delegate(FUNC(m68307_cpu_device::m68307_internal_serial_w),this), 0xffff); + m68k->internal->install_readwrite_handler(base + 0x120, base + 0x13f, read16_delegate(FUNC(m68307_cpu_device::m68307_internal_timer_r),this), write16_delegate(FUNC(m68307_cpu_device::m68307_internal_timer_w),this)); + m68k->internal->install_readwrite_handler(base + 0x140, base + 0x149, read8_delegate(FUNC(m68307_cpu_device::m68307_internal_mbus_r),this), write8_delegate(FUNC(m68307_cpu_device::m68307_internal_mbus_w),this), 0xffff); break; case 0x4: - COMBINE_DATA(&m_m68307_scrhigh); + COMBINE_DATA(&m68k->m68307_scrhigh); break; case 0x6: - COMBINE_DATA(&m_m68307_scrlow); + COMBINE_DATA(&m68k->m68307_scrlow); break; default: diff --git a/src/devices/machine/68307.h b/src/devices/machine/68307.h index 4c4d9b90cb3..a64c9985ce9 100644 --- a/src/devices/machine/68307.h +++ b/src/devices/machine/68307.h @@ -36,11 +36,11 @@ public: m68307_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); /* trampolines so we can specify the 68681 serial configuration when adding the CPU */ - template <class Object> static devcb_base &set_irq_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).m_write_irq.set_callback(std::forward<Object>(cb)); } - template <class Object> static devcb_base &set_a_tx_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).m_write_a_tx.set_callback(std::forward<Object>(cb)); } - template <class Object> static devcb_base &set_b_tx_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).m_write_b_tx.set_callback(std::forward<Object>(cb)); } - template <class Object> static devcb_base &set_inport_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).m_read_inport.set_callback(std::forward<Object>(cb)); } - template <class Object> static devcb_base &set_outport_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).m_write_outport.set_callback(std::forward<Object>(cb)); } + template <class Object> static devcb_base &set_irq_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).write_irq.set_callback(std::forward<Object>(cb)); } + template <class Object> static devcb_base &set_a_tx_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).write_a_tx.set_callback(std::forward<Object>(cb)); } + template <class Object> static devcb_base &set_b_tx_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).write_b_tx.set_callback(std::forward<Object>(cb)); } + template <class Object> static devcb_base &set_inport_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).read_inport.set_callback(std::forward<Object>(cb)); } + template <class Object> static devcb_base &set_outport_cb(device_t &device, Object &&cb) { return downcast<m68307_cpu_device &>(device).write_outport.set_callback(std::forward<Object>(cb)); } uint16_t simple_read_immediate_16_m68307(offs_t address); @@ -87,30 +87,30 @@ protected: void mbus_interrupt(); DECLARE_WRITE_LINE_MEMBER(m68307_duart_irq_handler); - DECLARE_WRITE_LINE_MEMBER(m68307_duart_txa) { m_write_a_tx(state); } - DECLARE_WRITE_LINE_MEMBER(m68307_duart_txb) { m_write_b_tx(state); } - DECLARE_READ8_MEMBER(m68307_duart_input_r) { return m_read_inport(); } - DECLARE_WRITE8_MEMBER(m68307_duart_output_w) { m_write_outport(data); } + DECLARE_WRITE_LINE_MEMBER(m68307_duart_txa) { write_a_tx(state); } + DECLARE_WRITE_LINE_MEMBER(m68307_duart_txb) { write_b_tx(state); } + DECLARE_READ8_MEMBER(m68307_duart_input_r) { return read_inport(); } + DECLARE_WRITE8_MEMBER(m68307_duart_output_w) { write_outport(data); } void init16_m68307(address_space &space); int calc_cs(offs_t address) const; - devcb_write_line m_write_irq, m_write_a_tx, m_write_b_tx; - devcb_read8 m_read_inport; - devcb_write8 m_write_outport; + devcb_write_line write_irq, write_a_tx, write_b_tx; + devcb_read8 read_inport; + devcb_write8 write_outport; /* 68307 peripheral modules */ - m68307_sim* m_m68307SIM; - m68307_mbus* m_m68307MBUS; -// m68307_serial* m_m68307SERIAL; - m68307_timer* m_m68307TIMER; + m68307_sim* m68307SIM; + m68307_mbus* m68307MBUS; +// m68307_serial* m68307SERIAL; + m68307_timer* m68307TIMER; - uint16_t m_m68307_base; - uint16_t m_m68307_scrhigh; - uint16_t m_m68307_scrlow; + uint16_t m68307_base; + uint16_t m68307_scrhigh; + uint16_t m68307_scrlow; - int m_m68307_currentcs; + int m68307_currentcs; porta_read_delegate m_porta_r; porta_write_delegate m_porta_w; diff --git a/src/devices/machine/68307bus.cpp b/src/devices/machine/68307bus.cpp index 84e165ef919..3eea5a0811d 100644 --- a/src/devices/machine/68307bus.cpp +++ b/src/devices/machine/68307bus.cpp @@ -15,8 +15,8 @@ READ8_MEMBER( m68307_cpu_device::m68307_internal_mbus_r ) { - assert(m_m68307MBUS); - m68307_mbus &mbus = *m_m68307MBUS; + assert(m68307MBUS); + m68307_mbus &mbus = *m68307MBUS; uint8_t retval; int pc = space.device().safe_pc(); @@ -59,8 +59,8 @@ READ8_MEMBER( m68307_cpu_device::m68307_internal_mbus_r ) WRITE8_MEMBER( m68307_cpu_device::m68307_internal_mbus_w ) { - assert(m_m68307MBUS); - m68307_mbus &mbus = *m_m68307MBUS; + assert(m68307MBUS); + m68307_mbus &mbus = *m68307MBUS; int pc = space.device().safe_pc(); diff --git a/src/devices/machine/68307sim.cpp b/src/devices/machine/68307sim.cpp index d38b20ba391..2913d64e0a5 100644 --- a/src/devices/machine/68307sim.cpp +++ b/src/devices/machine/68307sim.cpp @@ -32,8 +32,8 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_sim_r ) { - assert(m_m68307SIM); - m68307_sim &sim = *m_m68307SIM; + assert(m68307SIM); + m68307_sim &sim = *m68307SIM; int pc = space.device().safe_pc(); @@ -64,8 +64,8 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_sim_r ) WRITE16_MEMBER( m68307_cpu_device::m68307_internal_sim_w ) { - assert(m_m68307SIM); - m68307_sim &sim = *m_m68307SIM; + assert(m68307SIM); + m68307_sim &sim = *m68307SIM; int pc = space.device().safe_pc(); diff --git a/src/devices/machine/68307tmu.cpp b/src/devices/machine/68307tmu.cpp index a4a4baf31f8..c83a0855f29 100644 --- a/src/devices/machine/68307tmu.cpp +++ b/src/devices/machine/68307tmu.cpp @@ -17,8 +17,8 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_timer_r ) { - assert(m_m68307TIMER); - m68307_timer &timer = *m_m68307TIMER; + assert(m68307TIMER); + m68307_timer &timer = *m68307TIMER; int pc = space.device().safe_pc(); int which = offset & 0x8; @@ -39,8 +39,8 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_timer_r ) WRITE16_MEMBER( m68307_cpu_device::m68307_internal_timer_w ) { - assert(m_m68307TIMER); - m68307_timer &timer = *m_m68307TIMER; + assert(m68307TIMER); + m68307_timer &timer = *m68307TIMER; int pc = space.device().safe_pc(); int which = offset & 0x8; @@ -102,7 +102,7 @@ WRITE16_MEMBER( m68307_cpu_device::m68307_internal_timer_w ) TIMER_CALLBACK_MEMBER(m68307_cpu_device::m68307_timer::timer0_callback ) { m68307_cpu_device* m68k = (m68307_cpu_device *)ptr; - single_timer* tptr = &m68k->m_m68307TIMER->singletimer[0]; + single_timer* tptr = &m68k->m68307TIMER->singletimer[0]; tptr->regs[m68307TIMER_TMR] |= 0x2; m68k->timer0_interrupt(); @@ -113,7 +113,7 @@ TIMER_CALLBACK_MEMBER(m68307_cpu_device::m68307_timer::timer0_callback ) TIMER_CALLBACK_MEMBER(m68307_cpu_device::m68307_timer::timer1_callback ) { m68307_cpu_device* m68k = (m68307_cpu_device *)ptr; - single_timer* tptr = &m68k->m_m68307TIMER->singletimer[1]; + single_timer* tptr = &m68k->m68307TIMER->singletimer[1]; tptr->regs[m68307TIMER_TMR] |= 0x2; m68k->timer1_interrupt(); diff --git a/src/devices/machine/68340.cpp b/src/devices/machine/68340.cpp index 2701909f18b..3427fb6c7e3 100644 --- a/src/devices/machine/68340.cpp +++ b/src/devices/machine/68340.cpp @@ -11,17 +11,17 @@ DEFINE_DEVICE_TYPE(M68340, m68340_cpu_device, "mc68340", "MC68340") int m68340_cpu_device::calc_cs(offs_t address) const { - if ( !(m_m68340SIM->m_ba[0] & 1) ) return 1; + if ( !(m68340SIM->m_ba[0] & 1) ) return 1; for (int i=0;i<4;i++) { - if (m_m68340SIM->m_ba[i] & 1) + if (m68340SIM->m_ba[i] & 1) { - int mask = ((m_m68340SIM->m_am[i]&0xffffff00) | 0xff); - int base = m_m68340SIM->m_ba[i] & 0xffffff00; - int fcmask = (m_m68340SIM->m_am[i] & 0xf0); - int fcbase = (m_m68340SIM->m_ba[i] & 0xf0) & ~(m_m68340SIM->m_am[i] & 0xf0); - int fc = m_mmu_tmp_fc; + int mask = ((m68340SIM->m_am[i]&0xffffff00) | 0xff); + int base = m68340SIM->m_ba[i] & 0xffffff00; + int fcmask = (m68340SIM->m_am[i] & 0xf0); + int fcbase = (m68340SIM->m_ba[i] & 0xf0) & ~(m68340SIM->m_am[i] & 0xf0); + int fc = mmu_tmp_fc; if ((address & ~mask) == base && ((fc << 4) & ~fcmask ) == fcbase ) return i+1; } @@ -45,56 +45,58 @@ uint16_t m68340_cpu_device::get_cs(offs_t address) READ32_MEMBER( m68340_cpu_device::m68340_internal_base_r ) { - logerror("%08x m68340_internal_base_r %08x, (%08x)\n", m_ppc, offset*4,mem_mask); - return m_m68340_base; + int pc = space.device().safe_pc(); + logerror("%08x m68340_internal_base_r %08x, (%08x)\n", pc, offset*4,mem_mask); + return m68340_base; } WRITE32_MEMBER( m68340_cpu_device::m68340_internal_base_w ) { - logerror("%08x m68340_internal_base_w %08x, %08x (%08x)\n", m_ppc, offset*4,data,mem_mask); + int pc = space.device().safe_pc(); + logerror("%08x m68340_internal_base_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask); // other conditions? - if (m_dfc==0x7) + if (dfc==0x7) { // unmap old modules - if (m_m68340_base&1) + if (m68340_base&1) { - int base = m_m68340_base & 0xfffff000; + int base = m68340_base & 0xfffff000; - m_internal->unmap_readwrite(base + 0x000, base + 0x05f); - m_internal->unmap_readwrite(base + 0x600, base + 0x67f); - m_internal->unmap_readwrite(base + 0x700, base + 0x723); - m_internal->unmap_readwrite(base + 0x780, base + 0x7bf); + internal->unmap_readwrite(base + 0x000, base + 0x05f); + internal->unmap_readwrite(base + 0x600, base + 0x67f); + internal->unmap_readwrite(base + 0x700, base + 0x723); + internal->unmap_readwrite(base + 0x780, base + 0x7bf); } - COMBINE_DATA(&m_m68340_base); - logerror("%08x m68340_internal_base_w %08x, %08x (%08x) (m_m68340_base write)\n", pc(), offset*4,data,mem_mask); + COMBINE_DATA(&m68340_base); + logerror("%08x m68340_internal_base_w %08x, %08x (%08x) (m68340_base write)\n", pc, offset*4,data,mem_mask); // map new modules - if (m_m68340_base&1) + if (m68340_base&1) { - int base = m_m68340_base & 0xfffff000; + int base = m68340_base & 0xfffff000; - m_internal->install_readwrite_handler(base + 0x000, base + 0x03f, + internal->install_readwrite_handler(base + 0x000, base + 0x03f, read16_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_r),this), write16_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_w),this),0xffffffff); - m_internal->install_readwrite_handler(base + 0x010, base + 0x01f, // Intentionally punches a hole in previous address mapping + internal->install_readwrite_handler(base + 0x010, base + 0x01f, // Intentionally punches a hole in previous address mapping read8_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_ports_r),this), write8_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_ports_w),this),0xffffffff); - m_internal->install_readwrite_handler(base + 0x040, base + 0x05f, + internal->install_readwrite_handler(base + 0x040, base + 0x05f, read32_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_cs_r),this), write32_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_cs_w),this)); - m_internal->install_readwrite_handler(base + 0x600, base + 0x63f, + internal->install_readwrite_handler(base + 0x600, base + 0x63f, READ16_DEVICE_DELEGATE(m_timer1, mc68340_timer_module_device, read), WRITE16_DEVICE_DELEGATE(m_timer1, mc68340_timer_module_device, write),0xffffffff); - m_internal->install_readwrite_handler(base + 0x640, base + 0x67f, + internal->install_readwrite_handler(base + 0x640, base + 0x67f, READ16_DEVICE_DELEGATE(m_timer2, mc68340_timer_module_device, read), WRITE16_DEVICE_DELEGATE(m_timer2, mc68340_timer_module_device, write),0xffffffff); - m_internal->install_readwrite_handler(base + 0x700, base + 0x723, + internal->install_readwrite_handler(base + 0x700, base + 0x723, READ8_DEVICE_DELEGATE(m_serial, mc68340_serial_module_device, read), WRITE8_DEVICE_DELEGATE(m_serial, mc68340_serial_module_device, write),0xffffffff); - m_internal->install_readwrite_handler(base + 0x780, base + 0x7bf, + internal->install_readwrite_handler(base + 0x780, base + 0x7bf, read32_delegate(FUNC(m68340_cpu_device::m68340_internal_dma_r),this), write32_delegate(FUNC(m68340_cpu_device::m68340_internal_dma_w),this)); @@ -103,7 +105,7 @@ WRITE32_MEMBER( m68340_cpu_device::m68340_internal_base_w ) } else { - logerror("%08x m68340_internal_base_w %08x, %04x (%04x) (should fall through?)\n", pc(), offset*4,data,mem_mask); + logerror("%08x m68340_internal_base_w %08x, %04x (%04x) (should fall through?)\n", pc, offset*4,data,mem_mask); } @@ -143,9 +145,9 @@ m68340_cpu_device::m68340_cpu_device(const machine_config &mconfig, const char * , m_pb_out_cb(*this) , m_pb_in_cb(*this) { - m_m68340SIM = nullptr; - m_m68340DMA = nullptr; - m_m68340_base = 0; + m68340SIM = nullptr; + m68340DMA = nullptr; + m68340_base = 0; } void m68340_cpu_device::device_reset() @@ -166,15 +168,15 @@ void m68340_cpu_device::device_start() { fscpu32_device::device_start(); - m_m68340SIM = new m68340_sim(); - m_m68340DMA = new m68340_dma(); + m68340SIM = new m68340_sim(); + m68340DMA = new m68340_dma(); - m_m68340SIM->reset(); - m_m68340DMA->reset(); + m68340SIM->reset(); + m68340DMA->reset(); start_68340_sim(); - m_m68340_base = 0x00000000; + m68340_base = 0x00000000; - m_internal = &space(AS_PROGRAM); + internal = &this->space(AS_PROGRAM); } diff --git a/src/devices/machine/68340.h b/src/devices/machine/68340.h index 76255b412a7..f183627dcec 100644 --- a/src/devices/machine/68340.h +++ b/src/devices/machine/68340.h @@ -125,10 +125,10 @@ protected: uint32_t m_extal; /* 68340 peripheral modules */ - m68340_sim* m_m68340SIM; - m68340_dma* m_m68340DMA; + m68340_sim* m68340SIM; + m68340_dma* m68340DMA; - uint32_t m_m68340_base; + uint32_t m68340_base; emu_timer *m_irq_timer; diff --git a/src/devices/machine/68340dma.cpp b/src/devices/machine/68340dma.cpp index cd69e4c9a1b..e37e573e5e6 100644 --- a/src/devices/machine/68340dma.cpp +++ b/src/devices/machine/68340dma.cpp @@ -8,6 +8,9 @@ READ32_MEMBER( m68340_cpu_device::m68340_internal_dma_r ) { + assert(m68340DMA); + //m68340_dma &dma = *m68340DMA; + int pc = space.device().safe_pc(); logerror("%08x m68340_internal_dma_r %08x, (%08x)\n", pc, offset*4,mem_mask); @@ -16,6 +19,9 @@ READ32_MEMBER( m68340_cpu_device::m68340_internal_dma_r ) WRITE32_MEMBER( m68340_cpu_device::m68340_internal_dma_w ) { + assert(m68340DMA); + //m68340_dma &dma = *m68340DMA; + int pc = space.device().safe_pc(); logerror("%08x m68340_internal_dma_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask); } diff --git a/src/devices/machine/68340ser.cpp b/src/devices/machine/68340ser.cpp index 714d72476db..3b86595e07e 100644 --- a/src/devices/machine/68340ser.cpp +++ b/src/devices/machine/68340ser.cpp @@ -150,7 +150,7 @@ WRITE_LINE_MEMBER( mc68340_serial_module_device::irq_w ) LOGINT("IRQ!\n%s\n", FUNCNAME); if (m_ilr > 0) { - if (((m_cpu->m_m68340SIM->m_avr_rsr >> (8 + m_ilr)) & 1) != 0) // use autovector ? + if (((m_cpu->m68340SIM->m_avr_rsr >> (8 + m_ilr)) & 1) != 0) // use autovector ? { LOGINT("- Autovector level %d\n", m_ilr); m_cpu->set_input_line(m_ilr, HOLD_LINE); diff --git a/src/devices/machine/68340sim.cpp b/src/devices/machine/68340sim.cpp index 62497ad61b7..ddc7516b237 100644 --- a/src/devices/machine/68340sim.cpp +++ b/src/devices/machine/68340sim.cpp @@ -45,8 +45,8 @@ READ16_MEMBER( m68340_cpu_device::m68340_internal_sim_r ) { LOGR("%s\n", FUNCNAME); - assert(m_m68340SIM); - m68340_sim &sim = *m_m68340SIM; + assert(m68340SIM); + m68340_sim &sim = *m68340SIM; int val = 0; int pc = space.device().safe_pc(); @@ -106,8 +106,8 @@ WRITE16_MEMBER( m68340_cpu_device::m68340_internal_sim_w ) ((offset * 2) >= 0x10 && (offset * 2) < 0x20) || (offset * 2) >= 0x60 ? "Error - should not happen" : std::array<char const *, 8> {{"MCR", "reserved", "SYNCR", "AVR/RSR", "SWIV/SYPCR", "PICR", "PITR", "SWSR"}}[(offset * 2) <= m68340_sim::REG_AVR_RSR ? offset : offset - 0x10 + 0x04]); - assert(m_m68340SIM); - m68340_sim &sim = *m_m68340SIM; + assert(m68340SIM); + m68340_sim &sim = *m68340SIM; int pc = space.device().safe_pc(); @@ -200,8 +200,8 @@ READ8_MEMBER( m68340_cpu_device::m68340_internal_sim_ports_r ) { LOGR("%s\n", FUNCNAME); offset += 0x10; - assert(m_m68340SIM); - m68340_sim &sim = *m_m68340SIM; + assert(m68340SIM); + m68340_sim &sim = *m68340SIM; int pc = space.device().safe_pc(); int val = space.machine().rand(); @@ -287,8 +287,8 @@ WRITE8_MEMBER( m68340_cpu_device::m68340_internal_sim_ports_w ) { LOG("%s", FUNCNAME); offset += 0x10; - assert(m_m68340SIM); - m68340_sim &sim = *m_m68340SIM; + assert(m68340SIM); + m68340_sim &sim = *m68340SIM; int pc = space.device().safe_pc(); @@ -352,8 +352,8 @@ READ32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_r ) LOGR("%s\n", FUNCNAME); offset += m68340_sim::REG_AM_CS0>>2; - assert(m_m68340SIM); - m68340_sim &sim = *m_m68340SIM; + assert(m68340SIM); + m68340_sim &sim = *m68340SIM; int pc = space.device().safe_pc(); @@ -382,17 +382,17 @@ WRITE32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_w ) if (offset & 1) { - LOGCS("%08x Base address CS%d %08x, %08x (%08x) ", m_ppc, (offset - 0x10) / 2, offset * 4, data, mem_mask); + LOGCS("%08x Base address CS%d %08x, %08x (%08x) ", pc, (offset - 0x10) / 2, offset * 4, data, mem_mask); LOGCS("- Base: %08x BFC:%02x WP:%d FTE:%d NCS:%d Valid: %s\n", data & 0xffffff00, (data & 0xf0) >> 4, data & 0x08 ? 1 : 0, data & 0x04 ? 1 : 0, data & 0x02 ? 1 : 0, data & 0x01 ? "Yes" : "No"); } else { - LOGCS("%08x Address mask CS%d %08x, %08x (%08x) ", m_ppc, (offset - 0x10) / 2, offset * 4, data, mem_mask); + LOGCS("%08x Address mask CS%d %08x, %08x (%08x) ", pc, (offset - 0x10) / 2, offset * 4, data, mem_mask); LOGCS("- Mask: %08x FCM:%02x DD:%d PS: %s\n", data & 0xffffff00, (data & 0xf0) >> 4, (data >> 2) & 0x03, std::array<char const *, 4>{{"Reserved", "16-Bit", "8-bit", "External DSACK response"}}[data & 0x03]); } - assert(m_m68340SIM); - m68340_sim &sim = *m_m68340SIM; + assert(m68340SIM); + m68340_sim &sim = *m68340SIM; int pc = space.device().safe_pc(); @@ -438,8 +438,8 @@ WRITE32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_w ) void m68340_cpu_device::do_pit_irq() { - assert(m_m68340SIM); - m68340_sim &sim = *m_m68340SIM; + assert(m68340SIM); + m68340_sim &sim = *m68340SIM; //logerror("do_pit_irq\n"); int timer_irq_level = (sim.m_picr & 0x0700) >> 8; @@ -485,8 +485,8 @@ void m68340_cpu_device::start_68340_sim() m_pb_in_cb.resolve(); // Setup correct VCO/clock speed based on reset values and crystal - assert(m_m68340SIM); - m68340_sim &sim = *m_m68340SIM; + assert(m68340SIM); + m68340_sim &sim = *m68340SIM; switch (m_clock_mode) { case m68340_sim::CLOCK_MODE_EXT: @@ -534,8 +534,8 @@ void m68340_sim::reset() /* do_tick_pit works on whole clock cycles, no flank support */ void m68340_cpu_device::do_tick_pit() { - assert(m_m68340SIM); - m68340_sim &sim = *m_m68340SIM; + assert(m68340SIM); + m68340_sim &sim = *m68340SIM; sim.m_pit_counter--; if ( ( (sim.m_mcr & m68340_sim::REG_MCR_FRZ1) == 0) && diff --git a/src/devices/machine/68340tmu.cpp b/src/devices/machine/68340tmu.cpp index b6a5d7f7749..4c04f49669d 100644 --- a/src/devices/machine/68340tmu.cpp +++ b/src/devices/machine/68340tmu.cpp @@ -310,8 +310,8 @@ void mc68340_timer_module_device::device_start() void mc68340_timer_module_device::do_timer_irq() { - assert(m_cpu->m_m68340SIM); - m68340_sim &sim = *m_cpu->m_m68340SIM; + assert(m_cpu->m68340SIM); + m68340_sim &sim = *m_cpu->m68340SIM; int timer_irq_level = (m_ir & 0x0700) >> 8; int timer_irq_vector = (m_ir & 0x00ff) >> 0; diff --git a/src/devices/machine/eepromser.cpp b/src/devices/machine/eepromser.cpp index d97ea318407..5e6e08a6a2b 100644 --- a/src/devices/machine/eepromser.cpp +++ b/src/devices/machine/eepromser.cpp @@ -1007,9 +1007,9 @@ void eeprom_serial_x24c44_device::handle_event(eeprom_event event) if (bit_index % m_data_bits == 0 && (bit_index == 0 || m_streaming_enabled)){ m_shift_register=m_ram_data[m_address]; - //m_shift_register=bitswap<16>(m_shift_register,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15); - //m_shift_register=bitswap<16>(m_shift_register,7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8); - m_shift_register= bitswap<16>(m_shift_register,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); + //m_shift_register=BITSWAP16(m_shift_register,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15); + //m_shift_register=BITSWAP16(m_shift_register,7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8); + m_shift_register= BITSWAP16(m_shift_register,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); m_shift_register=m_shift_register<<16; @@ -1046,9 +1046,9 @@ void eeprom_serial_x24c44_device::handle_event(eeprom_event event) m_shift_register = (m_shift_register << 1) | m_di_state; if (++m_bits_accum == m_data_bits) { - //m_shift_register=bitswap<16>(m_shift_register, 0, 1, 2, 3, 4, 5,6,7, 8, 9,10,11,12,13,14,15); - //m_shift_register=bitswap<16>(m_shift_register, 7, 6, 5, 4, 3, 2,1,0,15,14,13,12,11,10, 9, 8); - m_shift_register=bitswap<16>(m_shift_register,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); + //m_shift_register=BITSWAP16(m_shift_register, 0, 1, 2, 3, 4, 5,6,7, 8, 9,10,11,12,13,14,15); + //m_shift_register=BITSWAP16(m_shift_register, 7, 6, 5, 4, 3, 2,1,0,15,14,13,12,11,10, 9, 8); + m_shift_register=BITSWAP16(m_shift_register,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); m_ram_data[m_address]=m_shift_register; LOG1("write to RAM addr=%02X data=%04X\n",m_address,m_shift_register); diff --git a/src/devices/machine/ldpr8210.cpp b/src/devices/machine/ldpr8210.cpp index 39bb12f97ba..8e1b879d16d 100644 --- a/src/devices/machine/ldpr8210.cpp +++ b/src/devices/machine/ldpr8210.cpp @@ -236,7 +236,7 @@ void pioneer_pr8210_device::control_w(uint8_t data) { // data is stored to the PIA in bit-reverse order uint8_t newcommand = (m_accumulator >> 2) & 0x1f; - m_pia.porta = bitswap<8>(newcommand, 0,1,2,3,4,5,6,7); + m_pia.porta = BITSWAP8(newcommand, 0,1,2,3,4,5,6,7); // the MCU logic requires a 0 to execute many commands; however, nobody // consistently sends a 0, whereas they do tend to send duplicate commands... diff --git a/src/devices/machine/ripple_counter.cpp b/src/devices/machine/ripple_counter.cpp deleted file mode 100644 index ae38d342d68..00000000000 --- a/src/devices/machine/ripple_counter.cpp +++ /dev/null @@ -1,202 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:AJR -/********************************************************************** - - Generic binary ripple counter emulation - - This device emulates basic ripple counter logic ICs with falling- - edge clocks and a synchronous reset inputs such as CD4040 and - 74LS393. - - The optional 8-bit ROM interface is intended to help stream ROM - data to sound chips that lack memory interfaces of their own - (e.g. MSM5205, TMS5110). - -**********************************************************************/ - -#include "emu.h" -#include "machine/ripple_counter.h" - -//************************************************************************** -// GLOBAL VARIABLES -//************************************************************************** - -// device type definition -DEFINE_DEVICE_TYPE(RIPPLE_COUNTER, ripple_counter_device, "ripple_counter", "Generic ripple counter") - - -//************************************************************************** -// RIPPLE COUNTER DEVICE -//************************************************************************** - -//------------------------------------------------- -// ripple_counter_device - constructor -//------------------------------------------------- - -ripple_counter_device::ripple_counter_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) - : device_t(mconfig, RIPPLE_COUNTER, tag, owner, clock), - device_rom_interface(mconfig, *this, 0, ENDIANNESS_LITTLE, 8), - m_count_out_cb(*this), - m_rom_out_cb(*this), - m_count_timer(nullptr), - m_count_mask(0), - m_count(1), - m_clk(false), - m_reset(false) -{ -} - - -//------------------------------------------------- -// static_set_stages - configure the number of -// stages used to count -//------------------------------------------------- - -void ripple_counter_device::static_set_stages(device_t &device, u8 stages) -{ - auto &dev = downcast<ripple_counter_device &>(device); - dev.m_count_mask = (1U << stages) - 1; - dev.set_rom_addr_width(stages); -} - - -//------------------------------------------------- -// memory_space_config - return a description of -// any address spaces owned by this device -//------------------------------------------------- - -device_memory_interface::space_config_vector ripple_counter_device::memory_space_config() const -{ - if (m_rom_out_cb.isnull()) - return space_config_vector(); - else - return device_rom_interface::memory_space_config(); -} - - -//------------------------------------------------- -// device_validity_check - validate a device after -// the configuration has been constructed -//------------------------------------------------- - -void ripple_counter_device::device_validity_check(validity_checker &valid) const -{ - if (m_count_mask == 0) - osd_printf_error("No counting stages configured\n"); -} - - -//------------------------------------------------- -// device_resolve_objects - resolve objects that -// may be needed for other devices to set -// initial conditions at start time -//------------------------------------------------- - -void ripple_counter_device::device_resolve_objects() -{ - // resolve callbacks - m_count_out_cb.resolve_safe(); - m_rom_out_cb.resolve(); -} - - -//------------------------------------------------- -// device_start - device-specific startup -//------------------------------------------------- - -void ripple_counter_device::device_start() -{ - // initialize timers - m_count_timer = timer_alloc(TIMER_COUNT); - - // register internal state - save_item(NAME(m_count)); - save_item(NAME(m_clk)); - save_item(NAME(m_reset)); -} - - -//------------------------------------------------- -// device_clock_changed - called when the -// device clock is altered in any way -//------------------------------------------------- - -void ripple_counter_device::device_clock_changed() -{ - attotime freq = m_reset ? attotime::never : clocks_to_attotime(1); - m_count_timer->adjust(freq, 0, freq); -} - - -//------------------------------------------------- -// rom_bank_updated - called when the ROM bank -// is changed -//------------------------------------------------- - -void ripple_counter_device::rom_bank_updated() -{ - m_rom_out_cb(read_byte(m_count)); -} - - -//------------------------------------------------- -// set_count - update the count and associated -// outputs -//------------------------------------------------- - -void ripple_counter_device::set_count(u32 count) -{ - m_count = count; - m_count_out_cb(count); - if (!m_rom_out_cb.isnull()) - m_rom_out_cb(read_byte(count)); -} - - -//------------------------------------------------- -// clock_w - handle falling-edge clock input -//------------------------------------------------- - -WRITE_LINE_MEMBER(ripple_counter_device::clock_w) -{ - if (m_clk != bool(state)) - { - m_clk = bool(state); - if (!state && !m_reset) - set_count((m_count + 1) & m_count_mask); - } -} - - -//------------------------------------------------- -// reset_w - handle active-high reset input -//------------------------------------------------- - -WRITE_LINE_MEMBER(ripple_counter_device::reset_w) -{ - if (m_reset != bool(state)) - { - m_reset = bool(state); - if (state && m_count != 0) - set_count(0); - - // stop or start the count timer as required - notify_clock_changed(); - } -} - - -//------------------------------------------------- -// device_timer - called whenever a device timer -// fires -//------------------------------------------------- - -void ripple_counter_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) -{ - switch (id) - { - case TIMER_COUNT: - set_count((m_count + 1) & m_count_mask); - break; - } -} diff --git a/src/devices/machine/ripple_counter.h b/src/devices/machine/ripple_counter.h deleted file mode 100644 index f9e997f3348..00000000000 --- a/src/devices/machine/ripple_counter.h +++ /dev/null @@ -1,92 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:AJR -/********************************************************************** - - Generic binary ripple counter emulation - -**********************************************************************/ - -#ifndef MAME_MACHINE_RIPPLE_COUNTER_H -#define MAME_MACHINE_RIPPLE_COUNTER_H - -#pragma once - -//************************************************************************** -// CONFIGURATION MACROS -//************************************************************************** - -#define MCFG_RIPPLE_COUNTER_STAGES(_stages) \ - ripple_counter_device::static_set_stages(*device, _stages); - -// output callbacks -#define MCFG_RIPPLE_COUNTER_COUNT_OUT_CB(_devcb) \ - devcb = &ripple_counter_device::static_set_count_out_cb(*device, DEVCB_##_devcb); -#define MCFG_RIPPLE_COUNTER_ROM_OUT_CB(_devcb) \ - devcb = &ripple_counter_device::static_set_rom_out_cb(*device, DEVCB_##_devcb); - -//************************************************************************** -// TYPE DEFINITIONS -//************************************************************************** - -// ======================> ripple_counter_device - -class ripple_counter_device : public device_t, public device_rom_interface -{ -public: - // construction/destruction - ripple_counter_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - - // static configuration - static void static_set_stages(device_t &device, u8 stages); - template<class Object> static devcb_base &static_set_count_out_cb(device_t &device, Object &&cb) - { return downcast<ripple_counter_device &>(device).m_count_out_cb.set_callback(std::forward<Object>(cb)); } - template<class Object> static devcb_base &static_set_rom_out_cb(device_t &device, Object &&cb) - { return downcast<ripple_counter_device &>(device).m_rom_out_cb.set_callback(std::forward<Object>(cb)); } - - // control line handlers - DECLARE_WRITE_LINE_MEMBER(clock_w); - DECLARE_WRITE_LINE_MEMBER(reset_w); - - // getters - u32 count() const { return m_count; } - -protected: - // device-level overrides - virtual void device_validity_check(validity_checker &valid) const override; - virtual void device_resolve_objects() override; - virtual void device_start() override; - virtual void device_clock_changed() override; - virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; - - // device_rom_interface overrides - virtual space_config_vector memory_space_config() const override; - virtual void rom_bank_updated() override; - -private: - // internal helpers - void set_count(u32 count); - - // device callbacks - devcb_write32 m_count_out_cb; - devcb_write8 m_rom_out_cb; - - // device timers - enum - { - TIMER_COUNT - }; - emu_timer *m_count_timer; - - // configuration parameters - u32 m_count_mask; - - // running state - u32 m_count; - bool m_clk; - bool m_reset; -}; - -// device type definition -DECLARE_DEVICE_TYPE(RIPPLE_COUNTER, ripple_counter_device) - -#endif // MAME_MACHINE_RIPPLE_COUNTER_H diff --git a/src/devices/machine/roc10937.cpp b/src/devices/machine/roc10937.cpp index 966d28c38c9..05d332106bb 100644 --- a/src/devices/machine/roc10937.cpp +++ b/src/devices/machine/roc10937.cpp @@ -180,7 +180,7 @@ void rocvfd_device::device_reset() /////////////////////////////////////////////////////////////////////////// uint32_t rocvfd_device::set_display(uint32_t segin) { - return bitswap<32>(segin, 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,11,9,15,13,12,8,10,14,7,6,5,4,3,2,1,0); + return BITSWAP32(segin, 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,11,9,15,13,12,8,10,14,7,6,5,4,3,2,1,0); } diff --git a/src/devices/machine/sdlc.cpp b/src/devices/machine/sdlc.cpp index 870f8aba4e3..e3cc8cc99ed 100644 --- a/src/devices/machine/sdlc.cpp +++ b/src/devices/machine/sdlc.cpp @@ -282,7 +282,7 @@ void sdlc_logger_device::log_frame(bool partial) const fcs |= std::uint16_t(m_buffer[frame_bytes - 1]) << (8 - residual_bits); if (residual_bits) fcs |= (std::uint16_t(m_buffer[frame_bytes]) & ((1U << residual_bits) - 1U)) << (16 - residual_bits); - fcs = ~bitswap<16>(fcs, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); + fcs = ~BITSWAP16(fcs, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); util::stream_format(msg, " FCS=%04X", fcs); if (!is_frame_check_good()) util::stream_format(msg, " (expected %04X)", m_expected_fcs); diff --git a/src/devices/machine/smc91c9x.cpp b/src/devices/machine/smc91c9x.cpp index 2e9cb12932d..b94f7a29d1f 100644 --- a/src/devices/machine/smc91c9x.cpp +++ b/src/devices/machine/smc91c9x.cpp @@ -15,8 +15,7 @@ #include "emu.h" #include "smc91c9x.h" -// Needed for netdev_count??? -#include "osdnet.h" + /*************************************************************************** @@ -121,26 +120,17 @@ smc91c9x_device::smc91c9x_device(const machine_config &mconfig, device_type type void smc91c9x_device::device_start() { - // TX timer - m_tx_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(smc91c9x_device::send_frame), this)); - m_irq_handler.resolve_safe(); - // Set completion queues to max size to save properly - m_comp_rx.resize(ETHER_BUFFERS); - m_comp_tx.resize(ETHER_BUFFERS); - /* register ide states */ save_item(NAME(m_reg)); save_item(NAME(m_regmask)); save_item(NAME(m_irq_state)); - save_item(NAME(m_buffer)); + save_item(NAME(m_alloc_count)); + save_item(NAME(m_rx)); + save_item(NAME(m_tx)); save_item(NAME(m_sent)); save_item(NAME(m_recd)); - save_item(NAME(m_alloc_rx)); - save_item(NAME(m_alloc_tx)); - save_item(NAME(m_comp_rx)); - save_item(NAME(m_comp_tx)); } //------------------------------------------------- @@ -151,13 +141,37 @@ void smc91c9x_device::device_reset() { std::fill(std::begin(m_reg), std::end(m_reg), 0); + std::fill(std::begin(m_rx), std::end(m_rx), 0); + std::fill(std::begin(m_tx), std::end(m_tx), 0); + std::fill(std::begin(m_regmask), std::end(m_regmask), 0); m_irq_state = 0; + m_alloc_count = 0; + rx_fifo_out = 0; + rx_fifo_in = 0; + + tx_fifo_out = 0; + tx_fifo_in = 0; m_sent = 0; m_recd = 0; + osd_list_network_adapters(); + + unsigned char const *const mac = (const unsigned char *)get_mac(); + + if (VERBOSE & LOG_GENERAL) + { + logerror("MAC : "); + for (int i = 0; i < ETHERNET_ADDR_SIZE; i++) + logerror("%.2X", mac[i]); + + logerror("\n"); + } + + set_promisc(true); + m_reg[EREG_TCR] = 0x0000; m_regmask[EREG_TCR] = 0x3d87; m_reg[EREG_EPH_STATUS] = 0x0000; m_regmask[EREG_EPH_STATUS] = 0x0000; m_reg[EREG_RCR] = 0x0000; m_regmask[EREG_RCR] = 0xc307; @@ -174,6 +188,11 @@ void smc91c9x_device::device_reset() m_reg[EREG_IA2_3] = 0x12F7; m_regmask[EREG_IA2_3] = 0xffff; m_reg[EREG_IA4_5] = 0x5634; m_regmask[EREG_IA4_5] = 0xffff; + // Interface MAC + m_reg[EREG_IA0_1] = mac[0] | (mac[1]<<8); + m_reg[EREG_IA2_3] = mac[2] | (mac[3]<<8); + m_reg[EREG_IA4_5] = mac[4] | (mac[5]<<8); + m_reg[EREG_GENERAL_PURP] = 0x0000; m_regmask[EREG_GENERAL_PURP] = 0xffff; m_reg[EREG_CONTROL] = 0x0100; m_regmask[EREG_CONTROL] = 0x68e7; @@ -190,52 +209,12 @@ void smc91c9x_device::device_reset() m_reg[EREG_MT4_5] = 0x0000; m_regmask[EREG_MT4_5] = 0xffff; m_reg[EREG_MT6_7] = 0x0000; m_regmask[EREG_MT6_7] = 0xffff; m_reg[EREG_MGMT] = 0x3030; m_regmask[EREG_MGMT] = 0x0f0f; - m_reg[EREG_REVISION] = 0x3345; m_regmask[EREG_REVISION] = 0x0000; + m_reg[EREG_REVISION] = 0x3340; m_regmask[EREG_REVISION] = 0x0000; m_reg[EREG_ERCV] = 0x331f; m_regmask[EREG_ERCV] = 0x009f; update_ethernet_irq(); - m_tx_timer->reset(); - - // Setup real network if enabled - m_network_available = false; - if (netdev_count()) { - m_network_available = true; - osd_list_network_adapters(); - unsigned char const *const mac = (const unsigned char *)get_mac(); - if (VERBOSE & LOG_GENERAL) - { - logerror("MAC : "); - for (int i = 0; i < ETHERNET_ADDR_SIZE; i++) - logerror("%.2X", mac[i]); - - logerror("\n"); - } - - set_promisc(true); - // Interface MAC - m_reg[EREG_IA0_1] = mac[0] | (mac[1] << 8); - m_reg[EREG_IA2_3] = mac[2] | (mac[3] << 8); - m_reg[EREG_IA4_5] = mac[4] | (mac[5] << 8); - } - - // Reset MMU - mmu_reset(); } -void smc91c9x_device::mmu_reset() -{ - // Reset MMU allocations - m_alloc_rx = 0; - m_alloc_tx = 0; - - // Reset completion FIFOs - m_comp_tx.clear(); - m_comp_rx.clear(); - - // Flush fifos. - clear_tx_fifo(); - clear_rx_fifo(); -} DEFINE_DEVICE_TYPE(SMC91C94, smc91c94_device, "smc91c94", "SMC91C94 Ethernet Controller") @@ -251,41 +230,21 @@ smc91c96_device::smc91c96_device(const machine_config &mconfig, const char *tag, { } -bool smc91c9x_device::alloc_req(const int tx, int &packet_num) -{ - u32 curr_alloc = m_alloc_rx | m_alloc_tx; - - for (int index = 0; index < ETHER_BUFFERS; index++) { - if (!(curr_alloc & (1 << index))) { - packet_num = index; - if (tx) { - m_alloc_tx |= 1 << index; - } else { - m_alloc_rx |= 1 << index; - } - return true; - } - } - - return false; -} - -void smc91c9x_device::alloc_release(const int packet_num) -{ - int clear_mask = ~(1 << packet_num); - m_alloc_tx &= clear_mask; - m_alloc_rx &= clear_mask; -} - void smc91c9x_device::clear_tx_fifo() { + tx_fifo_in = 0; + tx_fifo_out = 0; + std::fill(std::begin(m_tx), std::end(m_tx), 0); } void smc91c9x_device::clear_rx_fifo() { + rx_fifo_in = 0; + rx_fifo_out = 0; + std::fill(std::begin(m_rx), std::end(m_rx), 0); } -int smc91c9x_device::is_broadcast(const uint8_t *mac_address) +int smc91c9x_device::is_broadcast(uint8_t mac_address[]) { int i; @@ -303,20 +262,28 @@ int smc91c9x_device::is_broadcast(const uint8_t *mac_address) } -int smc91c9x_device::ethernet_packet_is_for_me(const uint8_t *mac_address) +int smc91c9x_device::ethernet_packet_is_for_me(const uint8_t mac_address[]) { // tcpdump -i eth0 -q ether host 08:00:1e:01:ae:a5 or ether broadcast or ether dst 09:00:1e:00:00:00 or ether dst 09:00:1e:00:00:01 // wireshark filter: eth.addr eq 08:00:1e:01:ae:a5 or eth.dst eq ff:ff:ff:ff:ff:ff or eth.dst eq 09:00:1e:00:00:00 or eth.dst eq 09:00:1e:00:00:01 int i; + uint8_t local_address[ETHERNET_ADDR_SIZE]; LOG("\n"); + local_address[0] = (m_reg[EREG_IA0_1]>>0) & 0xFF; + local_address[1] = (m_reg[EREG_IA0_1]>>8) & 0xFF; + local_address[2] = (m_reg[EREG_IA2_3]>>0) & 0xFF; + local_address[3] = (m_reg[EREG_IA2_3]>>8) & 0xFF; + local_address[4] = (m_reg[EREG_IA4_5]>>0) & 0xFF; + local_address[5] = (m_reg[EREG_IA4_5]>>8) & 0xFF; + if (VERBOSE & LOG_GENERAL) { for ( i = 0 ; i < ETHERNET_ADDR_SIZE ; i++ ) { - logerror("%.2X", ((u8 *)&m_reg[EREG_IA0_1])[i]); + logerror("%.2X",local_address[i]); } logerror("="); for ( i = 0 ; i < ETHERNET_ADDR_SIZE ; i++ ) @@ -327,13 +294,13 @@ int smc91c9x_device::ethernet_packet_is_for_me(const uint8_t *mac_address) } // skip Ethernet broadcast packets if RECV_BROAD is not set - if (is_broadcast(mac_address)) + if (is_broadcast((uint8_t *)mac_address)) { LOG(" -- Broadcast rx\n"); return 2; } - if (memcmp(mac_address, &m_reg[EREG_IA0_1], ETHERNET_ADDR_SIZE) == 0) + if (memcmp(mac_address, local_address, ETHERNET_ADDR_SIZE) == 0) { LOG(" -- Address Match\n"); return 1; @@ -368,7 +335,7 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length) logerror(" - IsForMe %d - %d/0x%x bytes\n", isforme, length, length); } - if ( (length < ETHERNET_ADDR_SIZE || !isforme) && !(m_reg[EREG_RCR] & 0x0102) ) + if ( (length < ETHERNET_ADDR_SIZE || !isforme) && !(m_reg[EREG_RCR] & 0x0100) ) { LOG("\n"); @@ -378,18 +345,13 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length) /* signal a receive */ - // Try to request a packet number - int packet_num; - if (!alloc_req(0, packet_num)) { - logerror("recv_cb: Couldn't allocate a receive packet\n"); - return; - } - /* compute the packet length */ if ( ( length < ( ETHER_BUFFER_SIZE - ( 2+2+2 ) ) ) ) { - uint8_t *const packet = &m_buffer[ packet_num * ETHER_BUFFER_SIZE]; + uint8_t *const packet = &m_rx[ ( rx_fifo_in & ( ETHER_RX_BUFFERS - 1 ) ) * ETHER_BUFFER_SIZE]; + + std::fill_n(packet, ETHER_BUFFER_SIZE, 0); int dst = 0; @@ -422,15 +384,17 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length) packet[dst++] = 0x40 | 0x00; // Control } - //dst += 2; + dst += 2; dst &= 0x7FF; packet[2] = (dst&0xFF); packet[3] = (dst) >> 8; - // Push packet number to rx completion fifo - m_comp_rx.push_back(packet_num); + m_reg[EREG_INTERRUPT] |= EINT_RCV; + m_reg[EREG_FIFO_PORTS] &= ~0x8000; + + rx_fifo_in = (rx_fifo_in + 1) & ( ETHER_RX_BUFFERS - 1 ); } else { @@ -452,37 +416,12 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length) void smc91c9x_device::update_ethernet_irq() { - // Check tx completion fifo empty - if (m_comp_tx.empty()) { - m_reg[EREG_INTERRUPT] |= EINT_TX_EMPTY; - } - else { - m_reg[EREG_INTERRUPT] &= ~EINT_TX_EMPTY; - } - //if (m_comp_tx.empty()) { - // m_reg[EREG_INTERRUPT] &= ~EINT_TX; - //} - //else { - // m_reg[EREG_INTERRUPT] |= EINT_TX; - //} - // Check rx completion fifo empty - if (m_comp_rx.empty()) - m_reg[EREG_INTERRUPT] &= ~EINT_RCV; - else - m_reg[EREG_INTERRUPT] |= EINT_RCV; - uint8_t const mask = m_reg[EREG_INTERRUPT] >> 8; uint8_t const state = m_reg[EREG_INTERRUPT] & 0xff; - /* update the IRQ state */ - uint8_t new_state = mask & state; - if (m_irq_state ^ new_state) - { - logerror("update_ethernet_irq: old: %02x new: %02x\n", m_irq_state, new_state); - m_irq_state = new_state; - m_irq_handler(m_irq_state ? ASSERT_LINE : CLEAR_LINE); - } + m_irq_state = ((mask & state) != 0); + m_irq_handler(m_irq_state ? ASSERT_LINE : CLEAR_LINE); } @@ -501,102 +440,74 @@ void smc91c9x_device::update_stats() send_frame - push a frame to the interface -------------------------------------------------*/ -TIMER_CALLBACK_MEMBER(smc91c9x_device::send_frame) +int smc91c9x_device::send_frame() { - const int packet_num = m_comp_tx.front(); - uint8_t *const tx_buffer = &m_buffer[packet_num * ETHER_BUFFER_SIZE]; + bool const is_broadcast = (m_tx[4] == 0xff && m_tx[5] == 0xff && m_tx[6] == 0xff && + m_tx[7] == 0xff && m_tx[8] == 0xff && m_tx[9] == 0xff); - /* update the EPH register */ + tx_fifo_in = ( tx_fifo_in + 1 ) & ( ETHER_TX_BUFFERS - 1 ); + + uint8_t *const tx_buffer = &m_tx[(tx_fifo_out & (ETHER_TX_BUFFERS-1))* ETHER_BUFFER_SIZE]; + tx_fifo_out = ((tx_fifo_out + 1)& (ETHER_TX_BUFFERS-1)); + + /* update the EPH register and stuff it in the first transmit word */ m_reg[EREG_EPH_STATUS] = 0x0001; - if (is_broadcast(&tx_buffer[4])) + if (is_broadcast) m_reg[EREG_EPH_STATUS] |= 0x0040; - // Set Tx Empty interrupt - // TODO: If more than 1 packet is enqueued should wait for all to finish - //m_reg[EREG_INTERRUPT] |= EINT_TX_EMPTY; + tx_buffer[0] = m_reg[EREG_EPH_STATUS]; + tx_buffer[1] = m_reg[EREG_EPH_STATUS] >> 8; + + /* signal a transmit interrupt and mark the transmit buffer empty */ m_reg[EREG_INTERRUPT] |= EINT_TX; - //m_comp_tx.erase(m_comp_tx.begin()); + m_reg[EREG_INTERRUPT] |= EINT_TX_EMPTY; + m_reg[EREG_FIFO_PORTS] |= 0x0080; m_sent++; update_stats(); int buffer_len = ((tx_buffer[3] << 8) | tx_buffer[2]) & 0x7ff; - // Remove status, length, [pad], control - if (tx_buffer[buffer_len - 1] & 0x20) - buffer_len -= 5; - else - buffer_len -= 6; - // Add padding - if (buffer_len < 64 && (m_reg[EREG_TCR] & 0x0080)) { - while (buffer_len < 64) - tx_buffer[4 + buffer_len++] = 0x00; - } + if (VERBOSE & LOG_GENERAL) { logerror("TX: "); - for (int i = 0; i < ETHERNET_ADDR_SIZE; i++) - logerror("%.2X", tx_buffer[4 + i]); + for (int i = 4; i < (4 + ETHERNET_ADDR_SIZE); i++) + logerror("%.2X", tx_buffer[i]); logerror(" "); - for (int i = ETHERNET_ADDR_SIZE; i < buffer_len; i++) - logerror("%.2X", tx_buffer[4 + i]); + for (int i = 0; i < (buffer_len - (ETHERNET_ADDR_SIZE + 4)); i++) + logerror("%.2X", tx_buffer[4 + ETHERNET_ADDR_SIZE + i]); logerror("--- %d/0x%x bytes\n", buffer_len, buffer_len); } - if (buffer_len > 4) + if ( buffer_len > 4 ) { - if (m_link_unconnected) - { - // Set lost carrier - if (m_reg[EREG_TCR] & 0x0400) - { - m_reg[EREG_EPH_STATUS] |= 0x400; - // Clear Tx Enable on error - m_reg[EREG_TCR] &= ~0x1; - } - - // Set signal quality error - if (m_reg[EREG_TCR] & 0x1000) - { - m_reg[EREG_EPH_STATUS] |= 0x20; - // Clear Tx Enable on error - m_reg[EREG_TCR] &= ~0x1; - } - - // signal a no transmit - m_reg[EREG_INTERRUPT] &= ~EINT_TX; - // Set a ethernet phy status interrupt - m_reg[EREG_INTERRUPT] |= EINT_EPH; - - // Flush fifos. - clear_tx_fifo(); - clear_rx_fifo(); - } + // odd or even sized frame ? + if (tx_buffer[buffer_len-1] & 0x20) + buffer_len--; else + buffer_len -= 2; + + if (!(m_reg[EREG_TCR] & 0x2002)) { - // Send the frame - if (!send(&tx_buffer[4], buffer_len)) + // No loopback... Send the frame + if ( !send(&tx_buffer[4], buffer_len-4) ) { // FIXME: failed to send the Ethernet packet //logerror("failed to send Ethernet packet\n"); //LOG(this,("read_command_port(): !!! failed to send Ethernet packet")); } - - // Loopback if loopback is set or fduplx is set - // TODO: Figure out correct size - // TODO: Check for addtional filter options for FDUPLX mode - if ((m_reg[EREG_TCR] & 0x2002) || (m_network_available && (m_reg[EREG_TCR] & 0x0800))) - recv_cb(&tx_buffer[4], buffer_len); + } + else + { + // TODO loopback mode : Push the frame to the RX FIFO. } } - // Update status in the transmit word - tx_buffer[0] = m_reg[EREG_EPH_STATUS]; - tx_buffer[1] = m_reg[EREG_EPH_STATUS] >> 8; - update_ethernet_irq(); + return 0; } /*------------------------------------------------- @@ -613,20 +524,10 @@ void smc91c9x_device::process_command(uint16_t data) case ECMD_ALLOCATE: LOG(" ALLOCATE MEMORY FOR TX (%d)\n", (data & 7)); - { - int packet_num; - if (alloc_req(1, packet_num)) { - // Set ARR register - m_reg[EREG_PNR_ARR] &= ~0xff00; - m_reg[EREG_PNR_ARR] |= packet_num << 8; - m_reg[EREG_INTERRUPT] |= EINT_ALLOC; - - update_ethernet_irq(); - } - else { - logerror("ECMD_ALLOCATE: Couldn't allocate TX memory\n"); - } - } + m_reg[EREG_PNR_ARR] &= ~0xff00; + m_reg[EREG_PNR_ARR] |= (m_alloc_count++ & 0x7F) << 8; + m_reg[EREG_INTERRUPT] |= 0x0008; + update_ethernet_irq(); break; case ECMD_RESET_MMU: @@ -638,24 +539,33 @@ void smc91c9x_device::process_command(uint16_t data) */ LOG(" RESET MMU\n"); - mmu_reset(); + // Flush fifos. + clear_tx_fifo(); + clear_rx_fifo(); break; case ECMD_REMOVE_TOPFRAME_TX: LOG(" REMOVE FRAME FROM TX FIFO\n"); - m_comp_tx.erase(m_comp_tx.begin()); - // TODO: Should we clear TX_INT? break; - case ECMD_REMOVE_RELEASE_TOPFRAME_RX: - LOG(" REMOVE AND RELEASE FRAME FROM RX FIFO (PACK_NUM=%d)\n", m_comp_rx.front()); - // Release memory allocation - alloc_release(m_comp_rx.front()); - // Fall through case ECMD_REMOVE_TOPFRAME_RX: LOG(" REMOVE FRAME FROM RX FIFO\n"); - // remove entry from rx queue - m_comp_rx.erase(m_comp_rx.begin()); + + case ECMD_REMOVE_RELEASE_TOPFRAME_RX: + LOG(" REMOVE AND RELEASE FRAME FROM RX FIFO (RXI=%d RXO=%d)\n", rx_fifo_in & (ETHER_RX_BUFFERS - 1), rx_fifo_out & (ETHER_RX_BUFFERS - 1)); + + m_reg[EREG_INTERRUPT] &= ~EINT_RCV; + + if ( (rx_fifo_in & ( ETHER_RX_BUFFERS - 1 ) ) != (rx_fifo_out & ( ETHER_RX_BUFFERS - 1 ) ) ) + rx_fifo_out = ( (rx_fifo_out + 1) & ( ETHER_RX_BUFFERS - 1 ) ); + + if ( (rx_fifo_in & ( ETHER_RX_BUFFERS - 1 ) ) != (rx_fifo_out & ( ETHER_RX_BUFFERS - 1 ) ) ) + { + m_reg[EREG_INTERRUPT] |= EINT_RCV; + m_reg[EREG_FIFO_PORTS] &= ~0x8000; + } + else + m_reg[EREG_FIFO_PORTS] |= 0x8000; update_ethernet_irq(); m_recd++; @@ -663,29 +573,49 @@ void smc91c9x_device::process_command(uint16_t data) break; case ECMD_RELEASE_PACKET: - { - const int packet_number = m_reg[EREG_PNR_ARR] & 0xff; - alloc_release(packet_number); - LOG(" RELEASE SPECIFIC PACKET %d\n", packet_number); - } + LOG(" RELEASE SPECIFIC PACKET\n"); break; case ECMD_ENQUEUE_PACKET: LOG(" ENQUEUE TX PACKET\n"); - if (m_reg[EREG_TCR] & 0x0001) // TX EN ? + if ( m_link_unconnected ) { - const int packet_number = m_reg[EREG_PNR_ARR] & 0xff; - // Push packet number tx completion fifo - m_comp_tx.push_back(packet_number); - // Calculate transmit time - uint8_t *const tx_buffer = &m_buffer[packet_number * ETHER_BUFFER_SIZE]; - int buffer_len = ((tx_buffer[3] << 8) | tx_buffer[2]) & 0x7ff; - buffer_len -= 6; - // ~16 Mbps - int usec = ((buffer_len * 8) >> 4) + 1; - m_tx_timer->adjust(attotime::from_usec(usec)); + // Set lost carrier + if ( m_reg[EREG_TCR] & 0x0400 ) + { + m_reg[EREG_EPH_STATUS] |= 0x400; + // Clear Tx Enable on error + m_reg[EREG_TCR] &= ~0x1; + } + + // Set signal quality error + if ( m_reg[EREG_TCR] & 0x1000 ) + { + m_reg[EREG_EPH_STATUS] |= 0x20; + // Clear Tx Enable on error + m_reg[EREG_TCR] &= ~0x1; + } + + // signal a no transmit + m_reg[EREG_INTERRUPT] &= ~EINT_TX; + // Set a ethernet phy status interrupt + m_reg[EREG_INTERRUPT] |= EINT_EPH; + + // Flush fifos. + clear_tx_fifo(); + clear_rx_fifo(); } + else + { + if ( m_reg[EREG_TCR] & 0x0001 ) // TX EN ? + { + send_frame(); + } + } + + update_ethernet_irq(); + break; case ECMD_RESET_FIFOS: @@ -731,24 +661,11 @@ READ16_MEMBER( smc91c9x_device::read ) case EREG_PNR_ARR: if ( ACCESSING_BITS_8_15 ) { - m_reg[EREG_INTERRUPT] &= ~EINT_ALLOC; + m_reg[EREG_INTERRUPT] &= ~0x0008; update_ethernet_irq(); } break; - case EREG_FIFO_PORTS: - result = 0; - if (!m_comp_tx.empty()) - result |= m_comp_tx.front(); - else - result |= 0x80; - if (!m_comp_rx.empty()) - result |= m_comp_rx.front() << 8; - else - result |= 0x80 << 8; - break; - - case EREG_DATA_0: /* data register */ case EREG_DATA_1: /* data register */ { @@ -756,9 +673,13 @@ READ16_MEMBER( smc91c9x_device::read ) int addr = m_reg[EREG_POINTER] & 0x7ff; if ( m_reg[EREG_POINTER] & 0x8000 ) - buffer = &m_buffer[m_comp_rx.front() * ETHER_BUFFER_SIZE]; + { + buffer = &m_rx[(rx_fifo_out & ( ETHER_RX_BUFFERS - 1 )) * ETHER_BUFFER_SIZE]; + } else - buffer = &m_buffer[(m_reg[EREG_PNR_ARR] & 0x1f) * ETHER_BUFFER_SIZE];; + { + buffer = (uint8_t *)&m_tx[(tx_fifo_in & (ETHER_TX_BUFFERS-1))* ETHER_BUFFER_SIZE];; + } result = buffer[addr++]; if ( ACCESSING_BITS_8_15 ) @@ -788,7 +709,7 @@ WRITE16_MEMBER( smc91c9x_device::write ) /* update the data generically */ - if (offset != EREG_BANK && offset < sizeof(m_reg)) + if (offset != 7 && offset < sizeof(m_reg)) LOG("%s:smc91c9x_w(%s) = [%04X]<-%04X & (%04X & %04X)\n", machine().describe_context(), ethernet_regname[offset], offset, data, mem_mask , m_regmask[offset]); mem_mask &= m_regmask[offset]; @@ -878,12 +799,15 @@ WRITE16_MEMBER( smc91c9x_device::write ) uint8_t *buffer; int addr = m_reg[EREG_POINTER] & 0x7ff; - if (m_reg[EREG_POINTER] & 0x8000) - buffer = &m_buffer[m_comp_rx.front() * ETHER_BUFFER_SIZE]; + if ( m_reg[EREG_POINTER] & 0x8000 ) + { + buffer = &m_rx[(rx_fifo_out & ( ETHER_RX_BUFFERS - 1 )) * ETHER_BUFFER_SIZE]; + } else - buffer = &m_buffer[(m_reg[EREG_PNR_ARR] & 0x1f) * ETHER_BUFFER_SIZE];; + { + buffer = (uint8_t *)&m_tx[(tx_fifo_in & (ETHER_TX_BUFFERS-1))* ETHER_BUFFER_SIZE];; + } - // TODO: Should be checking if incr is set buffer[addr++] = data; if ( ACCESSING_BITS_8_15 ) buffer[addr++] = data >> 8; @@ -893,12 +817,10 @@ WRITE16_MEMBER( smc91c9x_device::write ) } case EREG_INTERRUPT: - // Pop tx fifo packet from completion fifo if clear tx int is set - if (m_reg[EREG_INTERRUPT] & data & EINT_TX) { - m_comp_tx.erase(m_comp_tx.begin()); - m_reg[EREG_INTERRUPT] &= ~EINT_TX; - } m_reg[EREG_INTERRUPT] &= ~(data & 0x56); + // Need to clear tx int here for vegas cartfury + if ( m_reg[EREG_FIFO_PORTS] & 0x0080 ) + m_reg[EREG_INTERRUPT] &= ~EINT_TX; update_ethernet_irq(); break; } diff --git a/src/devices/machine/smc91c9x.h b/src/devices/machine/smc91c9x.h index cd4018c4f65..9ff6229d466 100644 --- a/src/devices/machine/smc91c9x.h +++ b/src/devices/machine/smc91c9x.h @@ -22,10 +22,8 @@ public: DECLARE_READ16_MEMBER( read ); DECLARE_WRITE16_MEMBER( write ); - TIMER_CALLBACK_MEMBER(send_frame); virtual void recv_cb(uint8_t *data, int length) override; - void set_link_connected(bool connected) { m_link_unconnected = !connected; }; protected: smc91c9x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -36,25 +34,10 @@ protected: private: static constexpr unsigned ETHER_BUFFER_SIZE = 2048; - // TODO: 96 device is larger - static constexpr unsigned ETHER_BUFFERS = 16; + static constexpr unsigned ETHER_RX_BUFFERS = 16; + static constexpr unsigned ETHER_TX_BUFFERS = 16; static constexpr unsigned ETHERNET_ADDR_SIZE = 6; - // external network is present - bool m_network_available; - - // mmu - // The bits in these vectors indicate a packet has been allocated - u32 m_alloc_rx, m_alloc_tx; - std::vector<int> m_comp_tx, m_comp_rx; - // Requests a packet allocation and returns true - // and sets the packet number if successful - bool alloc_req(const int tx, int &packet_num); - // Releases an allocation - void alloc_release(const int packet_num); - // Resets the MMU - void mmu_reset(); - // internal state devcb_write_line m_irq_handler; @@ -68,17 +51,24 @@ private: /* IRQ information */ uint8_t m_irq_state; - // Main memory - uint8_t m_buffer[ETHER_BUFFER_SIZE * ETHER_BUFFERS]; + /* allocate information */ + uint8_t m_alloc_count; + + /* transmit/receive FIFOs */ + uint32_t rx_fifo_out; + uint32_t rx_fifo_in; + uint8_t m_rx[ETHER_BUFFER_SIZE * ETHER_RX_BUFFERS]; + + uint32_t tx_fifo_out; + uint32_t tx_fifo_in; + uint8_t m_tx[ETHER_BUFFER_SIZE * ETHER_TX_BUFFERS]; /* counters */ uint32_t m_sent; uint32_t m_recd; - emu_timer* m_tx_timer; - - int ethernet_packet_is_for_me(const uint8_t *mac_address); - int is_broadcast(const uint8_t *mac_address); + int ethernet_packet_is_for_me(const uint8_t mac_address[]); + int is_broadcast(uint8_t mac_address[]); void update_ethernet_irq(); void update_stats(); @@ -87,6 +77,8 @@ private: void clear_tx_fifo(); void clear_rx_fifo(); + int send_frame(); + }; diff --git a/src/devices/machine/stvcd.cpp b/src/devices/machine/stvcd.cpp index e3b0cefb6d8..87b3b9e344c 100644 --- a/src/devices/machine/stvcd.cpp +++ b/src/devices/machine/stvcd.cpp @@ -100,7 +100,7 @@ int saturn_state::get_track_index(uint32_t fad) int saturn_state::sega_cdrom_get_adr_control(cdrom_file *file, int track) { - return bitswap<8>(cdrom_get_adr_control(file, cur_track),3,2,1,0,7,6,5,4); + return BITSWAP8(cdrom_get_adr_control(file, cur_track),3,2,1,0,7,6,5,4); } void saturn_state::cr_standard_return(uint16_t cur_status) diff --git a/src/devices/machine/tms6100.cpp b/src/devices/machine/tms6100.cpp index 0728a511e8d..d2fb40cef36 100644 --- a/src/devices/machine/tms6100.cpp +++ b/src/devices/machine/tms6100.cpp @@ -182,7 +182,7 @@ void tms6100_device::handle_command(u8 cmd) // M58819S reads serial data reversed if (m_reverse_bits) - m_sa = bitswap<8>(m_sa,0,1,2,3,4,5,6,7); + m_sa = BITSWAP8(m_sa,0,1,2,3,4,5,6,7); } else { diff --git a/src/devices/machine/vrc4373.h b/src/devices/machine/vrc4373.h index 9572380fb8b..e321a4ebde4 100644 --- a/src/devices/machine/vrc4373.h +++ b/src/devices/machine/vrc4373.h @@ -11,7 +11,7 @@ #include "cpu/mips/mips3.h" #define MCFG_VRC4373_ADD(_tag, _cpu_tag) \ - MCFG_PCI_HOST_ADD(_tag, VRC4373, 0x1033005B, 0x00, 0x00000000) \ + MCFG_PCI_HOST_ADD(_tag, VRC4373, 0x005B1033, 0x00, 0x00000000) \ downcast<vrc4373_device *>(device)->set_cpu_tag(_cpu_tag); #define MCFG_VRC4373_SET_RAM(_size) \ diff --git a/src/devices/machine/vrc5074.cpp b/src/devices/machine/vrc5074.cpp index 9959a60f06e..8471d631c47 100644 --- a/src/devices/machine/vrc5074.cpp +++ b/src/devices/machine/vrc5074.cpp @@ -236,7 +236,7 @@ void vrc5074_device::device_start() // Save states // m_sdram save_item(NAME(m_sdram[0])); - if (m_sdram_size[1]) save_item(NAME(m_sdram[1])); + save_item(NAME(m_sdram[1])); save_item(NAME(m_cpu_regs)); save_item(NAME(m_nile_irq_state)); save_item(NAME(m_sdram_addr)); diff --git a/src/devices/machine/z80sio.cpp b/src/devices/machine/z80sio.cpp index efe83ac2486..ddf951161b4 100644 --- a/src/devices/machine/z80sio.cpp +++ b/src/devices/machine/z80sio.cpp @@ -1128,7 +1128,7 @@ void z80sio_channel::sync_tx_sr_empty() LOGTX("%s() Channel %c Transmit FCS '%04x' m_wr5:%02x\n", FUNCNAME, 'A' + m_index, m_tx_crc, m_wr5); // just for fun, SDLC sends the FCS inverted in reverse bit order - uint16_t const fcs(bitswap<16>(m_tx_crc, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)); + uint16_t const fcs(BITSWAP16(m_tx_crc, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)); tx_setup(((m_wr4 & WR4_SYNC_MODE_MASK) == WR4_SYNC_MODE_SDLC) ? ~fcs : fcs, 16, 0, false, true); // set the underrun flag so it will send sync next time |