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Diffstat (limited to 'src/devices/machine/6850acia.cpp')
-rw-r--r--src/devices/machine/6850acia.cpp12
1 files changed, 7 insertions, 5 deletions
diff --git a/src/devices/machine/6850acia.cpp b/src/devices/machine/6850acia.cpp
index ed763825b59..efd557daff1 100644
--- a/src/devices/machine/6850acia.cpp
+++ b/src/devices/machine/6850acia.cpp
@@ -219,7 +219,10 @@ void acia6850_device::control_w(uint8_t data)
m_tx_state = STATE_START;
output_txd(1);
- m_status &= SR_CTS;
+ /// TODO: find out whether this has any immediate effect on TDRE
+ /// TDRE probably shouldn't be cleared here if TDR wasn't loaded, despite what the datasheet implies
+ /// If TDRE is cleared, then a separate internal flag is needed to avoid transmitting a spurious first character
+ m_status &= SR_CTS | SR_TDRE;
if (m_dcd)
{
@@ -252,13 +255,13 @@ void acia6850_device::data_w(uint8_t data)
{
LOG("MC6850 '%s' Data: %02x\n", tag(), data);
- /// TODO: find out if data stored during master reset is sent after divider is set
+ /// TODO: find out if data stored during master reset is sent after divider is set (and if TDRE can be cleared by such a write)
if (m_divide == 0)
{
- logerror("%s:ACIA %p: Data write while in reset!\n", machine().describe_context(), (void *)this);
+ logerror("%s: ACIA data write while in reset!\n", machine().describe_context());
}
- /// TODO: find out what happens if TDRE is already clear when you write
+ /// TODO: find out whether this overwrites previous data or has no effect if TDRE is already clear when you write
m_tdr = data;
m_status &= ~SR_TDRE;
@@ -484,7 +487,6 @@ WRITE_LINE_MEMBER( acia6850_device::write_txc )
{
m_tx_counter++;
- /// TODO: check txd is correctly generated, check atarist mcu is reading data, start checking receive data.
switch (m_tx_state)
{
case STATE_START: