diff options
Diffstat (limited to 'src/devices/cpu/sharc')
-rw-r--r-- | src/devices/cpu/sharc/sharc.cpp | 10 | ||||
-rw-r--r-- | src/devices/cpu/sharc/sharc.h | 5 | ||||
-rw-r--r-- | src/devices/cpu/sharc/sharcdrc.cpp | 6 | ||||
-rw-r--r-- | src/devices/cpu/sharc/sharcdsm.cpp | 764 | ||||
-rw-r--r-- | src/devices/cpu/sharc/sharcdsm.h | 129 | ||||
-rw-r--r-- | src/devices/cpu/sharc/sharcmem.hxx | 12 | ||||
-rw-r--r-- | src/devices/cpu/sharc/sharcops.hxx | 4 |
7 files changed, 463 insertions, 467 deletions
diff --git a/src/devices/cpu/sharc/sharc.cpp b/src/devices/cpu/sharc/sharc.cpp index b8f3b104eb0..c85a915a2f7 100644 --- a/src/devices/cpu/sharc/sharc.cpp +++ b/src/devices/cpu/sharc/sharc.cpp @@ -8,6 +8,7 @@ #include "emu.h" #include "sharc.h" #include "sharcfe.h" +#include "sharcdsm.h" #include "debugger.h" @@ -96,10 +97,9 @@ device_memory_interface::space_config_vector adsp21062_device::memory_space_conf }; } -offs_t adsp21062_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) +util::disasm_interface *adsp21062_device::create_disassembler() { - extern CPU_DISASSEMBLE( sharc ); - return CPU_DISASSEMBLE_NAME(sharc)(this, stream, pc, oprom, opram, options); + return new sharc_disassembler; } void adsp21062_device::enable_recompiler() @@ -400,7 +400,7 @@ void adsp21062_device::external_iop_write(uint32_t address, uint32_t data) else { osd_printf_debug("SHARC IOP write %08X, %08X\n", address, data); - m_data->write_dword(address << 2, data); + m_data->write_dword(address, data); } } @@ -1031,7 +1031,7 @@ void adsp21062_device::execute_run() debugger_instruction_hook(this, m_core->pc); - m_core->opcode = m_program->read_qword(m_core->pc << 3); + m_core->opcode = m_program->read_qword(m_core->pc); // handle looping if (m_core->pc == m_core->laddr.addr) diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h index 806b3053ee4..d4a56e1d525 100644 --- a/src/devices/cpu/sharc/sharc.h +++ b/src/devices/cpu/sharc/sharc.h @@ -220,10 +220,7 @@ protected: virtual space_config_vector memory_space_config() const override; // device_disasm_interface overrides - static constexpr uint32_t OPCODE_BYTES = 8; // actually 6, but emulation requires padding to 64 bits - virtual uint32_t disasm_min_opcode_bytes() const override { return OPCODE_BYTES; } - virtual uint32_t disasm_max_opcode_bytes() const override { return OPCODE_BYTES; } - virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override; + virtual util::disasm_interface *create_disassembler() override; private: struct alignas(16) SHARC_DAG diff --git a/src/devices/cpu/sharc/sharcdrc.cpp b/src/devices/cpu/sharc/sharcdrc.cpp index b8ab1a1f975..c21a1c2e997 100644 --- a/src/devices/cpu/sharc/sharcdrc.cpp +++ b/src/devices/cpu/sharc/sharcdrc.cpp @@ -307,34 +307,28 @@ void adsp21062_device::static_generate_memory_accessor(MEM_ACCESSOR_TYPE type, c switch (type) { case MEM_ACCESSOR_PM_READ48: - UML_SHL(block, I1, I1, 3); UML_DREAD(block, I0, I1, SIZE_QWORD, SPACE_PROGRAM); break; case MEM_ACCESSOR_PM_WRITE48: - UML_SHL(block, I1, I1, 3); UML_DWRITE(block, I1, I0, SIZE_QWORD, SPACE_PROGRAM); UML_MOV(block, mem(&m_core->force_recompile), 1); break; case MEM_ACCESSOR_PM_READ32: - UML_SHL(block, I1, I1, 3); UML_READ(block, I0, I1, SIZE_DWORD, SPACE_PROGRAM); break; case MEM_ACCESSOR_PM_WRITE32: - UML_SHL(block, I1, I1, 3); UML_WRITE(block, I1, I0, SIZE_DWORD, SPACE_PROGRAM); UML_MOV(block, mem(&m_core->force_recompile), 1); break; case MEM_ACCESSOR_DM_READ32: - UML_SHL(block, I1, I1, 2); UML_READ(block, I0, I1, SIZE_DWORD, SPACE_DATA); break; case MEM_ACCESSOR_DM_WRITE32: - UML_SHL(block, I1, I1, 2); UML_WRITE(block, I1, I0, SIZE_DWORD, SPACE_DATA); break; } diff --git a/src/devices/cpu/sharc/sharcdsm.cpp b/src/devices/cpu/sharc/sharcdsm.cpp index 7d570c13e87..ebab8add599 100644 --- a/src/devices/cpu/sharc/sharcdsm.cpp +++ b/src/devices/cpu/sharc/sharcdsm.cpp @@ -9,8 +9,76 @@ #include "emu.h" #include "sharcdsm.h" -static uint32_t (* sharcdasm_table[256])(uint32_t, uint64_t); -static int dasm_table_built = 0; +const char sharc_disassembler::ureg_names[256][16] = +{ + "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", + "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15", + "I0", "I1", "I2", "I3", "I4", "I5", "I6", "I7", + "I8", "I9", "I10", "I11", "I12", "I13", "I14", "I15", + "M0", "M1", "M2", "M3", "M4", "M5", "M6", "M7", + "M8", "M9", "M10", "M11", "M12", "M13", "M14", "M15", + "L0", "L1", "L2", "L3", "L4", "L5", "L6", "L7", + "L8", "L9", "L10", "L11", "L12", "L13", "L14", "L15", + "B0", "B1", "B2", "B3", "B4", "B5", "B6", "B7", + "B8", "B9", "B10", "B11", "B12", "B13", "B14", "B15", + "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???", + "FADDR", "DADDR", "???", "PC", "PCSTK", "PCSTKP", "LADDR", "CURLCNTR", + "LCNTR", "???", "???", "???", "???", "???", "???", "???", + "USTAT1", "USTAT2", "???", "???", "???", "???", "???", "???", + "???", "IRPTL", "MODE2", "MODE1", "ASTAT", "IMASK", "STKY", "IMASKP", + "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "PX", "PX1", "PX2", "TPERIOD", "TCOUNT", + "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???" +}; + +const char sharc_disassembler::bopnames[8][8] = +{ + "SET", "CLEAR", "TOGGLE", "???", "TEST", "XOR", "???", "???" +}; + +const char sharc_disassembler::condition_codes_if[32][32] = +{ + "EQ", "LT", "LE", "AC", + "AV", "MV", "MS", "SV", + "SZ", "FLAG0_IN", "FLAG1_IN", "FLAG2_IN", + "FLAG3_IN", "TF", "BM", "NOT LCE", + "NE", "GE", "GT", "NOT AC", + "NOT AV", "NOT MV", "NOT MS", "NOT SV", + "NOT SZ", "NOT FLAG0_IN", "NOT FLAG1_IN", "NOT FLAG2_IN", + "NOT FLAG3_IN", "NOT TF", "NBM", "" +}; + +const char sharc_disassembler::condition_codes_do[32][32] = +{ + "EQ", "LT", "LE", "AC", + "AV", "MV", "MS", "SV", + "SZ", "FLAG0_IN", "FLAG1_IN", "FLAG2_IN", + "FLAG3_IN", "TF", "BM", "LCE", + "NE", "GE", "GT", "NOT AC", + "NOT AV", "NOT MV", "NOT MS", "NOT SV", + "NOT SZ", "NOT FLAG0_IN", "NOT FLAG1_IN", "NOT FLAG2_IN", + "NOT FLAG3_IN", "NOT TF", "NBM", "FOREVER" +}; + +const char sharc_disassembler::mr_regnames[16][8] = +{ + "MR0F", "MR1F", "MR2F", "MR0B", "MR1B", "MR2B", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???" +}; #define GET_UREG(x) (ureg_names[x]) #define GET_SREG(x) (GET_UREG(0x70 | (x & 0xf))) @@ -28,19 +96,7 @@ static int dasm_table_built = 0; #define SIGN_EXTEND24(x) ((x & 0x800000) ? (0xff000000 | x) : x) -static char *output; -static void ATTR_PRINTF(1,2) print(const char *fmt, ...) -{ - va_list vl; - - va_start(vl, fmt); - output += vsprintf(output, fmt, vl); - va_end(vl); -} - - - -static void compute(uint32_t opcode) +void sharc_disassembler::compute(std::ostream &stream, uint32_t opcode) { int op = (opcode >> 12) & 0xff; int cu = (opcode >> 20) & 0x3; @@ -61,41 +117,41 @@ static void compute(uint32_t opcode) switch(multiop) { - case 0x04: print("R%d = R%d * R%d (SSFR), R%d = R%d + R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x05: print("R%d = R%d * R%d (SSFR), R%d = R%d - R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x06: print("R%d = R%d * R%d (SSFR), R%d = (R%d + R%d)/2", rm, rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x08: print("MRF = MRF + R%d * R%d (SSF), R%d = R%d + R%d", rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x09: print("MRF = MRF + R%d * R%d (SSF), R%d = R%d - R%d", rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x0a: print("MRF = MRF + R%d * R%d (SSF), R%d = (R%d + R%d)/2", rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x0c: print("R%d = MRF + R%d * R%d (SSFR), R%d = R%d + R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x0d: print("R%d = MRF + R%d * R%d (SSFR), R%d = R%d - R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x0e: print("R%d = MRF + R%d * R%d (SSFR), R%d = (R%d + R%d)/2", rm, rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x10: print("MRF = MRF - R%d * R%d (SSF), R%d = R%d + R%d", rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x11: print("MRF = MRF - R%d * R%d (SSF), R%d = R%d - R%d", rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x12: print("MRF = MRF - R%d * R%d (SSF), R%d = (R%d + R%d)/2", rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x14: print("R%d = MRF - R%d * R%d (SSFR), R%d = R%d + R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x15: print("R%d = MRF - R%d * R%d (SSFR), R%d = R%d - R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x16: print("R%d = MRF - R%d * R%d (SSFR), R%d = (R%d + R%d)/2", rm, rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x18: print("F%d = F%d * F%d, F%d = F%d + F%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x19: print("F%d = F%d * F%d, F%d = F%d - F%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x1a: print("F%d = F%d * F%d, F%d = FLOAT F%d BY F%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x1b: print("F%d = F%d * F%d, F%d = FIX F%d BY F%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x1c: print("F%d = F%d * F%d, F%d = (F%d + F%d)/2", rm, rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x1d: print("F%d = F%d * F%d, F%d = ABS F%d", rm, rxm, rym+4, ra, rxa+8); break; - case 0x1e: print("F%d = F%d * F%d, F%d = MAX(F%d, F%d)", rm, rxm, rym+4, ra, rxa+8, rya+12); break; - case 0x1f: print("F%d = F%d * F%d, F%d = MIN(F%d, F%d)", rm, rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x04: util::stream_format(stream, "R%d = R%d * R%d (SSFR), R%d = R%d + R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x05: util::stream_format(stream, "R%d = R%d * R%d (SSFR), R%d = R%d - R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x06: util::stream_format(stream, "R%d = R%d * R%d (SSFR), R%d = (R%d + R%d)/2", rm, rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x08: util::stream_format(stream, "MRF = MRF + R%d * R%d (SSF), R%d = R%d + R%d", rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x09: util::stream_format(stream, "MRF = MRF + R%d * R%d (SSF), R%d = R%d - R%d", rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x0a: util::stream_format(stream, "MRF = MRF + R%d * R%d (SSF), R%d = (R%d + R%d)/2", rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x0c: util::stream_format(stream, "R%d = MRF + R%d * R%d (SSFR), R%d = R%d + R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x0d: util::stream_format(stream, "R%d = MRF + R%d * R%d (SSFR), R%d = R%d - R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x0e: util::stream_format(stream, "R%d = MRF + R%d * R%d (SSFR), R%d = (R%d + R%d)/2", rm, rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x10: util::stream_format(stream, "MRF = MRF - R%d * R%d (SSF), R%d = R%d + R%d", rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x11: util::stream_format(stream, "MRF = MRF - R%d * R%d (SSF), R%d = R%d - R%d", rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x12: util::stream_format(stream, "MRF = MRF - R%d * R%d (SSF), R%d = (R%d + R%d)/2", rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x14: util::stream_format(stream, "R%d = MRF - R%d * R%d (SSFR), R%d = R%d + R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x15: util::stream_format(stream, "R%d = MRF - R%d * R%d (SSFR), R%d = R%d - R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x16: util::stream_format(stream, "R%d = MRF - R%d * R%d (SSFR), R%d = (R%d + R%d)/2", rm, rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x18: util::stream_format(stream, "F%d = F%d * F%d, F%d = F%d + F%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x19: util::stream_format(stream, "F%d = F%d * F%d, F%d = F%d - F%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x1a: util::stream_format(stream, "F%d = F%d * F%d, F%d = FLOAT F%d BY F%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x1b: util::stream_format(stream, "F%d = F%d * F%d, F%d = FIX F%d BY F%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x1c: util::stream_format(stream, "F%d = F%d * F%d, F%d = (F%d + F%d)/2", rm, rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x1d: util::stream_format(stream, "F%d = F%d * F%d, F%d = ABS F%d", rm, rxm, rym+4, ra, rxa+8); break; + case 0x1e: util::stream_format(stream, "F%d = F%d * F%d, F%d = MAX(F%d, F%d)", rm, rxm, rym+4, ra, rxa+8, rya+12); break; + case 0x1f: util::stream_format(stream, "F%d = F%d * F%d, F%d = MIN(F%d, F%d)", rm, rxm, rym+4, ra, rxa+8, rya+12); break; case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: { - print("R%d = R%d * R%d (SSFR), R%d = R%d + R%d, R%d = R%d - R%d", rm, rxm, rym+4, ra, rxa+8, rya+12, (opcode >> 16) & 0xf, rxa+8, rya+12); + util::stream_format(stream, "R%d = R%d * R%d (SSFR), R%d = R%d + R%d, R%d = R%d - R%d", rm, rxm, rym+4, ra, rxa+8, rya+12, (opcode >> 16) & 0xf, rxa+8, rya+12); break; } case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f: { - print("F%d = F%d * F%d, F%d = F%d + F%d, F%d = F%d - F%d", rm, rxm, rym+4, ra, rxa+8, rya+12, (opcode >> 16) & 0xf, rxa+8, rya+12); + util::stream_format(stream, "F%d = F%d * F%d, F%d = F%d + F%d, F%d = F%d - F%d", rm, rxm, rym+4, ra, rxa+8, rya+12, (opcode >> 16) & 0xf, rxa+8, rya+12); break; } @@ -103,20 +159,20 @@ static void compute(uint32_t opcode) { int rk = (opcode >> 8) & 0xf; int ai = (opcode >> 12) & 0xf; - print("R%d = %s", rk, mr_regnames[ai]); + util::stream_format(stream, "R%d = %s", rk, mr_regnames[ai]); break; } case 0x01: { int rk = (opcode >> 8) & 0xf; int ai = (opcode >> 12) & 0xf; - print("%s = R%d", mr_regnames[ai], rk); + util::stream_format(stream, "%s = R%d", mr_regnames[ai], rk); break; } default: { - print("??? (COMPUTE, MULTIOP)"); + util::stream_format(stream, "??? (COMPUTE, MULTIOP)"); break; } } @@ -133,68 +189,68 @@ static void compute(uint32_t opcode) switch(op) { /* Fixed-point */ - case 0x01: print("R%d = R%d + R%d", rn, rx, ry); break; - case 0x02: print("R%d = R%d - R%d", rn, rx, ry); break; - case 0x05: print("R%d = R%d + R%d + CI", rn, rx, ry); break; - case 0x06: print("R%d = R%d - R%d + CI - 1", rn, rx, ry); break; - case 0x09: print("R%d = (R%d + R%d)/2", rn, rx, ry); break; - case 0x0a: print("COMP(R%d, R%d)", rx, ry); break; - case 0x25: print("R%d = R%d + CI", rn, rx); break; - case 0x26: print("R%d = R%d + CI - 1", rn, rx); break; - case 0x29: print("R%d = R%d + 1", rn, rx); break; - case 0x2a: print("R%d = R%d - 1", rn, rx); break; - case 0x22: print("R%d = -R%d", rn, rx); break; - case 0x30: print("R%d = ABS R%d", rn, rx); break; - case 0x21: print("R%d = PASS R%d", rn, rx); break; - case 0x40: print("R%d = R%d AND R%d", rn, rx, ry); break; - case 0x41: print("R%d = R%d OR R%d", rn, rx, ry); break; - case 0x42: print("R%d = R%d XOR R%d", rn, rx, ry); break; - case 0x43: print("R%d = NOT R%d", rn, rx); break; - case 0x61: print("R%d = MIN(R%d, R%d)", rn, rx, ry); break; - case 0x62: print("R%d = MAX(R%d, R%d)", rn, rx, ry); break; - case 0x63: print("R%d = CLIP R%d BY R%d", rn, rx, ry); break; + case 0x01: util::stream_format(stream, "R%d = R%d + R%d", rn, rx, ry); break; + case 0x02: util::stream_format(stream, "R%d = R%d - R%d", rn, rx, ry); break; + case 0x05: util::stream_format(stream, "R%d = R%d + R%d + CI", rn, rx, ry); break; + case 0x06: util::stream_format(stream, "R%d = R%d - R%d + CI - 1", rn, rx, ry); break; + case 0x09: util::stream_format(stream, "R%d = (R%d + R%d)/2", rn, rx, ry); break; + case 0x0a: util::stream_format(stream, "COMP(R%d, R%d)", rx, ry); break; + case 0x25: util::stream_format(stream, "R%d = R%d + CI", rn, rx); break; + case 0x26: util::stream_format(stream, "R%d = R%d + CI - 1", rn, rx); break; + case 0x29: util::stream_format(stream, "R%d = R%d + 1", rn, rx); break; + case 0x2a: util::stream_format(stream, "R%d = R%d - 1", rn, rx); break; + case 0x22: util::stream_format(stream, "R%d = -R%d", rn, rx); break; + case 0x30: util::stream_format(stream, "R%d = ABS R%d", rn, rx); break; + case 0x21: util::stream_format(stream, "R%d = PASS R%d", rn, rx); break; + case 0x40: util::stream_format(stream, "R%d = R%d AND R%d", rn, rx, ry); break; + case 0x41: util::stream_format(stream, "R%d = R%d OR R%d", rn, rx, ry); break; + case 0x42: util::stream_format(stream, "R%d = R%d XOR R%d", rn, rx, ry); break; + case 0x43: util::stream_format(stream, "R%d = NOT R%d", rn, rx); break; + case 0x61: util::stream_format(stream, "R%d = MIN(R%d, R%d)", rn, rx, ry); break; + case 0x62: util::stream_format(stream, "R%d = MAX(R%d, R%d)", rn, rx, ry); break; + case 0x63: util::stream_format(stream, "R%d = CLIP R%d BY R%d", rn, rx, ry); break; /* Floating-point */ - case 0x81: print("F%d = F%d + F%d", rn, rx, ry); break; - case 0x82: print("F%d = F%d - F%d", rn, rx, ry); break; - case 0x91: print("F%d = ABS(F%d + F%d)", rn, rx, ry); break; - case 0x92: print("F%d = ABS(F%d - F%d)", rn, rx, ry); break; - case 0x89: print("F%d = (F%d + F%d)/2", rn, rx, ry); break; - case 0x8a: print("COMP(F%d, F%d)", rx, ry); break; - case 0xa2: print("F%d = -F%d", rn, rx); break; - case 0xb0: print("F%d = ABS F%d", rn, rx); break; - case 0xa1: print("F%d = PASS F%d", rn, rx); break; - case 0xa5: print("F%d = RND R%d", rn, rx); break; - case 0xbd: print("F%d = SCALB F%d BY R%d", rn, rx, ry); break; - case 0xad: print("R%d = MANT F%d", rn, rx); break; - case 0xc1: print("R%d = LOGB F%d", rn, rx); break; - case 0xd9: print("R%d = FIX F%d BY R%d", rn, rx, ry); break; - case 0xc9: print("R%d = FIX F%d", rn, rx); break; - case 0xdd: print("R%d = TRUNC F%d BY R%d", rn, rx, ry); break; - case 0xcd: print("R%d = TRUNC F%d", rn, rx); break; - case 0xda: print("F%d = FLOAT R%d BY R%d", rn, rx, ry); break; - case 0xca: print("F%d = FLOAT R%d", rn, rx); break; - case 0xc4: print("F%d = RECIPS F%d", rn, rx); break; - case 0xc5: print("F%d = RSQRTS F%d", rn, rx); break; - case 0xe0: print("F%d = F%d COPYSIGN F%d", rn, rx, ry); break; - case 0xe1: print("F%d = MIN(F%d, F%d)", rn, rx, ry); break; - case 0xe2: print("F%d = MAX(F%d, F%d)", rn, rx, ry); break; - case 0xe3: print("F%d = CLIP F%d BY F%d", rn, rx, ry); break; + case 0x81: util::stream_format(stream, "F%d = F%d + F%d", rn, rx, ry); break; + case 0x82: util::stream_format(stream, "F%d = F%d - F%d", rn, rx, ry); break; + case 0x91: util::stream_format(stream, "F%d = ABS(F%d + F%d)", rn, rx, ry); break; + case 0x92: util::stream_format(stream, "F%d = ABS(F%d - F%d)", rn, rx, ry); break; + case 0x89: util::stream_format(stream, "F%d = (F%d + F%d)/2", rn, rx, ry); break; + case 0x8a: util::stream_format(stream, "COMP(F%d, F%d)", rx, ry); break; + case 0xa2: util::stream_format(stream, "F%d = -F%d", rn, rx); break; + case 0xb0: util::stream_format(stream, "F%d = ABS F%d", rn, rx); break; + case 0xa1: util::stream_format(stream, "F%d = PASS F%d", rn, rx); break; + case 0xa5: util::stream_format(stream, "F%d = RND R%d", rn, rx); break; + case 0xbd: util::stream_format(stream, "F%d = SCALB F%d BY R%d", rn, rx, ry); break; + case 0xad: util::stream_format(stream, "R%d = MANT F%d", rn, rx); break; + case 0xc1: util::stream_format(stream, "R%d = LOGB F%d", rn, rx); break; + case 0xd9: util::stream_format(stream, "R%d = FIX F%d BY R%d", rn, rx, ry); break; + case 0xc9: util::stream_format(stream, "R%d = FIX F%d", rn, rx); break; + case 0xdd: util::stream_format(stream, "R%d = TRUNC F%d BY R%d", rn, rx, ry); break; + case 0xcd: util::stream_format(stream, "R%d = TRUNC F%d", rn, rx); break; + case 0xda: util::stream_format(stream, "F%d = FLOAT R%d BY R%d", rn, rx, ry); break; + case 0xca: util::stream_format(stream, "F%d = FLOAT R%d", rn, rx); break; + case 0xc4: util::stream_format(stream, "F%d = RECIPS F%d", rn, rx); break; + case 0xc5: util::stream_format(stream, "F%d = RSQRTS F%d", rn, rx); break; + case 0xe0: util::stream_format(stream, "F%d = F%d COPYSIGN F%d", rn, rx, ry); break; + case 0xe1: util::stream_format(stream, "F%d = MIN(F%d, F%d)", rn, rx, ry); break; + case 0xe2: util::stream_format(stream, "F%d = MAX(F%d, F%d)", rn, rx, ry); break; + case 0xe3: util::stream_format(stream, "F%d = CLIP F%d BY F%d", rn, rx, ry); break; case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77: case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f: { - print("R%d = R%d + R%d, R%d = R%d - R%d", ra, rx, ry, rs, rx, ry); + util::stream_format(stream, "R%d = R%d + R%d, R%d = R%d - R%d", ra, rx, ry, rs, rx, ry); break; } case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7: case 0xf8: case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe: case 0xff: { - print("F%d = F%d + F%d, F%d = F%d - F%d", ra, rx, ry, rs, rx, ry); + util::stream_format(stream, "F%d = F%d + F%d, F%d = F%d - F%d", ra, rx, ry, rs, rx, ry); break; } default: { - print("??? (COMPUTE, ALU)"); + util::stream_format(stream, "??? (COMPUTE, ALU)"); break; } } @@ -207,44 +263,44 @@ static void compute(uint32_t opcode) case 1: { if( op == 0x30 ) { - print("F%d = F%d * F%d", rn, rx, ry); + util::stream_format(stream, "F%d = F%d * F%d", rn, rx, ry); return; } switch((op >> 1) & 0x3) { case 0: - case 1: print("R%d = ", rn); break; - case 2: print("MRF = "); break; - case 3: print("MRB = "); break; + case 1: util::stream_format(stream, "R%d = ", rn); break; + case 2: util::stream_format(stream, "MRF = "); break; + case 3: util::stream_format(stream, "MRB = "); break; } switch((op >> 6) & 0x3) { case 0: switch((op >> 4) & 0x3) { - case 0: print("SAT %s", (op & 0x2) ? "MRB" : "MRF"); break; + case 0: util::stream_format(stream, "SAT %s", (op & 0x2) ? "MRB" : "MRF"); break; case 1: if (op & 0x8) { - print("RND %s", (op & 0x2) ? "MRB" : "MRF"); + util::stream_format(stream, "RND %s", (op & 0x2) ? "MRB" : "MRF"); } else { - print("0"); + util::stream_format(stream, "0"); } break; } break; case 1: - print("R%d * R%d", rx, ry); break; + util::stream_format(stream, "R%d * R%d", rx, ry); break; case 2: - print("%s +(R%d * R%d)", (op & 0x2) ? "MRB" : "MRF", rx, ry); break; + util::stream_format(stream, "%s +(R%d * R%d)", (op & 0x2) ? "MRB" : "MRF", rx, ry); break; case 3: - print("%s -(R%d * R%d)", (op & 0x2) ? "MRB" : "MRF", rx, ry); break; + util::stream_format(stream, "%s -(R%d * R%d)", (op & 0x2) ? "MRB" : "MRF", rx, ry); break; } break; } @@ -256,50 +312,50 @@ static void compute(uint32_t opcode) { switch(op) { - case 0x00: print("R%d = LSHIFT R%d BY R%d", rn, rx, ry); break; - case 0x20: print("R%d = R%d OR LSHIFT R%d BY R%d", rn, rn, rx, ry); break; - case 0x04: print("R%d = ASHIFT R%d BY R%d", rn, rx, ry); break; - case 0x24: print("R%d = R%d OR ASHIFT R%d BY R%d", rn, rn, rx, ry); break; - case 0x08: print("R%d = ROT R%d BY R%d", rn, rx, ry); break; - case 0xc4: print("R%d = BCLR R%d BY R%d", rn, rx, ry); break; - case 0xc0: print("R%d = BSET R%d BY R%d", rn, rx, ry); break; - case 0xc8: print("R%d = BTGL R%d BY R%d", rn, rx, ry); break; - case 0xcc: print("BTST R%d BY R%d", rx, ry); break; - case 0x44: print("R%d = FDEP R%d BY R%d", rn, rx, ry); break; - case 0x64: print("R%d = R%d OR FDEP R%d BY R%d", rn, rn, rx, ry); break; - case 0x4c: print("R%d = FDEP R%d BY R%d (SE)", rn, rx, ry); break; - case 0x6c: print("R%d = R%d OR FDEP R%d BY R%d (SE)", rn, rn, rx, ry); break; - case 0x40: print("R%d = FEXT R%d BY R%d", rn, rx, ry); break; - case 0x48: print("R%d = FEXT R%d BY R%d (SE)", rn, rx, ry); break; - case 0x80: print("R%d = EXP R%d", rn, rx); break; - case 0x84: print("R%d = EXP R%d (EX)", rn, rx); break; - case 0x88: print("R%d = LEFTZ R%d", rn, rx); break; - case 0x8c: print("R%d = LEFTO R%d", rn, rx); break; - case 0x90: print("R%d = FPACK F%d", rn, rx); break; - case 0x94: print("F%d = FUNPACK R%d", rn, rx); break; - default: print("??? (COMPUTE, SHIFT)"); break; + case 0x00: util::stream_format(stream, "R%d = LSHIFT R%d BY R%d", rn, rx, ry); break; + case 0x20: util::stream_format(stream, "R%d = R%d OR LSHIFT R%d BY R%d", rn, rn, rx, ry); break; + case 0x04: util::stream_format(stream, "R%d = ASHIFT R%d BY R%d", rn, rx, ry); break; + case 0x24: util::stream_format(stream, "R%d = R%d OR ASHIFT R%d BY R%d", rn, rn, rx, ry); break; + case 0x08: util::stream_format(stream, "R%d = ROT R%d BY R%d", rn, rx, ry); break; + case 0xc4: util::stream_format(stream, "R%d = BCLR R%d BY R%d", rn, rx, ry); break; + case 0xc0: util::stream_format(stream, "R%d = BSET R%d BY R%d", rn, rx, ry); break; + case 0xc8: util::stream_format(stream, "R%d = BTGL R%d BY R%d", rn, rx, ry); break; + case 0xcc: util::stream_format(stream, "BTST R%d BY R%d", rx, ry); break; + case 0x44: util::stream_format(stream, "R%d = FDEP R%d BY R%d", rn, rx, ry); break; + case 0x64: util::stream_format(stream, "R%d = R%d OR FDEP R%d BY R%d", rn, rn, rx, ry); break; + case 0x4c: util::stream_format(stream, "R%d = FDEP R%d BY R%d (SE)", rn, rx, ry); break; + case 0x6c: util::stream_format(stream, "R%d = R%d OR FDEP R%d BY R%d (SE)", rn, rn, rx, ry); break; + case 0x40: util::stream_format(stream, "R%d = FEXT R%d BY R%d", rn, rx, ry); break; + case 0x48: util::stream_format(stream, "R%d = FEXT R%d BY R%d (SE)", rn, rx, ry); break; + case 0x80: util::stream_format(stream, "R%d = EXP R%d", rn, rx); break; + case 0x84: util::stream_format(stream, "R%d = EXP R%d (EX)", rn, rx); break; + case 0x88: util::stream_format(stream, "R%d = LEFTZ R%d", rn, rx); break; + case 0x8c: util::stream_format(stream, "R%d = LEFTO R%d", rn, rx); break; + case 0x90: util::stream_format(stream, "R%d = FPACK F%d", rn, rx); break; + case 0x94: util::stream_format(stream, "F%d = FUNPACK R%d", rn, rx); break; + default: util::stream_format(stream, "??? (COMPUTE, SHIFT)"); break; } break; } default: { - print("??? (COMPUTE)"); + util::stream_format(stream, "??? (COMPUTE)"); break; } } } } -static void get_if_condition(int cond) +void sharc_disassembler::get_if_condition(std::ostream &stream, int cond) { if (cond != 31) { - print("IF %s, ", condition_codes_if[cond]); + util::stream_format(stream, "IF %s, ", condition_codes_if[cond]); } } -static void pm_dm_ureg(int g, int d, int i, int m, int ureg, int update) +void sharc_disassembler::pm_dm_ureg(std::ostream &stream, int g, int d, int i, int m, int ureg, int update) { if (update) // post-modify { @@ -307,22 +363,22 @@ static void pm_dm_ureg(int g, int d, int i, int m, int ureg, int update) { if (g) { - print("PM(%s, %s) = %s", GET_DAG2_I(i), GET_DAG2_M(m), GET_UREG(ureg)); + util::stream_format(stream, "PM(%s, %s) = %s", GET_DAG2_I(i), GET_DAG2_M(m), GET_UREG(ureg)); } else { - print("DM(%s, %s) = %s", GET_DAG1_I(i), GET_DAG1_M(m), GET_UREG(ureg)); + util::stream_format(stream, "DM(%s, %s) = %s", GET_DAG1_I(i), GET_DAG1_M(m), GET_UREG(ureg)); } } else { if (g) { - print("%s = PM(%s, %s)", GET_UREG(ureg), GET_DAG2_I(i), GET_DAG2_M(m)); + util::stream_format(stream, "%s = PM(%s, %s)", GET_UREG(ureg), GET_DAG2_I(i), GET_DAG2_M(m)); } else { - print("%s = DM(%s, %s)", GET_UREG(ureg), GET_DAG1_I(i), GET_DAG1_M(m)); + util::stream_format(stream, "%s = DM(%s, %s)", GET_UREG(ureg), GET_DAG1_I(i), GET_DAG1_M(m)); } } @@ -333,28 +389,28 @@ static void pm_dm_ureg(int g, int d, int i, int m, int ureg, int update) { if (g) { - print("PM(%s, %s) = %s", GET_DAG2_M(m), GET_DAG2_I(i), GET_UREG(ureg)); + util::stream_format(stream, "PM(%s, %s) = %s", GET_DAG2_M(m), GET_DAG2_I(i), GET_UREG(ureg)); } else { - print("DM(%s, %s) = %s", GET_DAG1_M(m), GET_DAG1_I(i), GET_UREG(ureg)); + util::stream_format(stream, "DM(%s, %s) = %s", GET_DAG1_M(m), GET_DAG1_I(i), GET_UREG(ureg)); } } else { if (g) { - print("%s = PM(%s, %s)", GET_UREG(ureg), GET_DAG2_M(m), GET_DAG2_I(i)); + util::stream_format(stream, "%s = PM(%s, %s)", GET_UREG(ureg), GET_DAG2_M(m), GET_DAG2_I(i)); } else { - print("%s = DM(%s, %s)", GET_UREG(ureg), GET_DAG1_M(m), GET_DAG1_I(i)); + util::stream_format(stream, "%s = DM(%s, %s)", GET_UREG(ureg), GET_DAG1_M(m), GET_DAG1_I(i)); } } } } -static void pm_dm_imm_dreg(int g, int d, int i, int data, int dreg, int update) +void sharc_disassembler::pm_dm_imm_dreg(std::ostream &stream, int g, int d, int i, int data, int dreg, int update) { const char *sign = ""; if (data & 0x20) @@ -369,22 +425,22 @@ static void pm_dm_imm_dreg(int g, int d, int i, int data, int dreg, int update) { if (g) { - print("PM(%s, %s0x%02X) = %s", GET_DAG2_I(i), sign, data, GET_DREG(dreg)); + util::stream_format(stream, "PM(%s, %s0x%02X) = %s", GET_DAG2_I(i), sign, data, GET_DREG(dreg)); } else { - print("DM(%s, %s0x%02X) = %s", GET_DAG1_I(i), sign, data, GET_DREG(dreg)); + util::stream_format(stream, "DM(%s, %s0x%02X) = %s", GET_DAG1_I(i), sign, data, GET_DREG(dreg)); } } else { if (g) { - print("%s = PM(%s, %s0x%02X)", GET_DREG(dreg), GET_DAG2_I(i), sign, data); + util::stream_format(stream, "%s = PM(%s, %s0x%02X)", GET_DREG(dreg), GET_DAG2_I(i), sign, data); } else { - print("%s = DM(%s, %s0x%02X)", GET_DREG(dreg), GET_DAG1_I(i), sign, data); + util::stream_format(stream, "%s = DM(%s, %s0x%02X)", GET_DREG(dreg), GET_DAG1_I(i), sign, data); } } } @@ -394,54 +450,54 @@ static void pm_dm_imm_dreg(int g, int d, int i, int data, int dreg, int update) { if (g) { - print("PM(%s0x%02X, %s) = %s", sign, data, GET_DAG2_I(i), GET_DREG(dreg)); + util::stream_format(stream, "PM(%s0x%02X, %s) = %s", sign, data, GET_DAG2_I(i), GET_DREG(dreg)); } else { - print("DM(%s0x%02X, %s) = %s", sign, data, GET_DAG1_I(i), GET_DREG(dreg)); + util::stream_format(stream, "DM(%s0x%02X, %s) = %s", sign, data, GET_DAG1_I(i), GET_DREG(dreg)); } } else { if (g) { - print("%s = PM(%s0x%02X, %s)", GET_DREG(dreg), sign, data, GET_DAG2_I(i)); + util::stream_format(stream, "%s = PM(%s0x%02X, %s)", GET_DREG(dreg), sign, data, GET_DAG2_I(i)); } else { - print("%s = DM(%s0x%02X, %s)", GET_DREG(dreg), sign, data, GET_DAG1_I(i)); + util::stream_format(stream, "%s = DM(%s0x%02X, %s)", GET_DREG(dreg), sign, data, GET_DAG1_I(i)); } } } } -static void pm_dm_dreg(int g, int d, int i, int m, int dreg) +void sharc_disassembler::pm_dm_dreg(std::ostream &stream, int g, int d, int i, int m, int dreg) { if (d) { if (g) { - print("PM(%s, %s) = %s", GET_DAG2_I(i), GET_DAG2_M(m), GET_DREG(dreg)); + util::stream_format(stream, "PM(%s, %s) = %s", GET_DAG2_I(i), GET_DAG2_M(m), GET_DREG(dreg)); } else { - print("DM(%s, %s) = %s", GET_DAG1_I(i), GET_DAG1_M(m), GET_DREG(dreg)); + util::stream_format(stream, "DM(%s, %s) = %s", GET_DAG1_I(i), GET_DAG1_M(m), GET_DREG(dreg)); } } else { if (g) { - print("%s = PM(%s, %s)", GET_DREG(dreg), GET_DAG2_I(i), GET_DAG2_M(m)); + util::stream_format(stream, "%s = PM(%s, %s)", GET_DREG(dreg), GET_DAG2_I(i), GET_DAG2_M(m)); } else { - print("%s = DM(%s, %s)", GET_DREG(dreg), GET_DAG1_I(i), GET_DAG1_M(m)); + util::stream_format(stream, "%s = DM(%s, %s)", GET_DREG(dreg), GET_DAG1_I(i), GET_DAG1_M(m)); } } } -static void shiftop(int shift, int data, int rn, int rx) +void sharc_disassembler::shiftop(std::ostream &stream, int shift, int data, int rn, int rx) { int8_t data8 = data & 0xff; int bit6 = data & 0x3f; @@ -449,36 +505,32 @@ static void shiftop(int shift, int data, int rn, int rx) switch(shift) { - case 0x00: print("R%d = LSHIFT R%d BY %d", rn, rx, data8); break; - case 0x08: print("R%d = R%d OR LSHIFT R%d BY %d", rn, rn, rx, data8); break; - case 0x01: print("R%d = ASHIFT R%d BY %d", rn, rx, data8); break; - case 0x09: print("R%d = R%d OR ASHIFT R%d BY %d", rn, rn, rx, data8); break; - case 0x02: print("R%d = ROT R%d BY %d", rn, rx, data8); break; - case 0x31: print("R%d = BCLR R%d BY %d", rn, rx, data8); break; - case 0x30: print("R%d = BSET R%d BY %d", rn, rx, data8); break; - case 0x32: print("R%d = BTGL R%d BY %d", rn, rx, data8); break; - case 0x33: print("BTST R%d BY %d", rx, data8); break; - case 0x11: print("R%d = FDEP R%d BY %d:%d", rn, rx, bit6, len); break; - case 0x19: print("R%d = R%d OR FDEP R%d BY %d:%d", rn, rn, rx, bit6, len); break; - case 0x13: print("R%d = FDEP R%d BY %d:%d (SE)", rn, rx, bit6, len); break; - case 0x1b: print("R%d = R%d OR FDEP R%d BY %d:%d (SE)", rn, rn, rx, bit6, len); break; - case 0x10: print("R%d = FEXT R%d BY %d:%d", rn, rx, bit6, len); break; - case 0x12: print("R%d = FEXT R%d BY %d:%d (SE)", rn, rx, bit6, len); break; - case 0x20: print("R%d = EXP R%d", rn, rx); break; - case 0x21: print("R%d = EXP R%d (EX)", rn, rx); break; - case 0x22: print("R%d = LEFTZ R%d", rn, rx); break; - case 0x23: print("R%d = LEFTO R%d", rn, rx); break; - case 0x24: print("R%d = FPACK F%d", rn, rx); break; - case 0x25: print("F%d = FUNPACK R%d", rn, rx); break; - default: print("??? (SHIFTOP)"); break; + case 0x00: util::stream_format(stream, "R%d = LSHIFT R%d BY %d", rn, rx, data8); break; + case 0x08: util::stream_format(stream, "R%d = R%d OR LSHIFT R%d BY %d", rn, rn, rx, data8); break; + case 0x01: util::stream_format(stream, "R%d = ASHIFT R%d BY %d", rn, rx, data8); break; + case 0x09: util::stream_format(stream, "R%d = R%d OR ASHIFT R%d BY %d", rn, rn, rx, data8); break; + case 0x02: util::stream_format(stream, "R%d = ROT R%d BY %d", rn, rx, data8); break; + case 0x31: util::stream_format(stream, "R%d = BCLR R%d BY %d", rn, rx, data8); break; + case 0x30: util::stream_format(stream, "R%d = BSET R%d BY %d", rn, rx, data8); break; + case 0x32: util::stream_format(stream, "R%d = BTGL R%d BY %d", rn, rx, data8); break; + case 0x33: util::stream_format(stream, "BTST R%d BY %d", rx, data8); break; + case 0x11: util::stream_format(stream, "R%d = FDEP R%d BY %d:%d", rn, rx, bit6, len); break; + case 0x19: util::stream_format(stream, "R%d = R%d OR FDEP R%d BY %d:%d", rn, rn, rx, bit6, len); break; + case 0x13: util::stream_format(stream, "R%d = FDEP R%d BY %d:%d (SE)", rn, rx, bit6, len); break; + case 0x1b: util::stream_format(stream, "R%d = R%d OR FDEP R%d BY %d:%d (SE)", rn, rn, rx, bit6, len); break; + case 0x10: util::stream_format(stream, "R%d = FEXT R%d BY %d:%d", rn, rx, bit6, len); break; + case 0x12: util::stream_format(stream, "R%d = FEXT R%d BY %d:%d (SE)", rn, rx, bit6, len); break; + case 0x20: util::stream_format(stream, "R%d = EXP R%d", rn, rx); break; + case 0x21: util::stream_format(stream, "R%d = EXP R%d (EX)", rn, rx); break; + case 0x22: util::stream_format(stream, "R%d = LEFTZ R%d", rn, rx); break; + case 0x23: util::stream_format(stream, "R%d = LEFTO R%d", rn, rx); break; + case 0x24: util::stream_format(stream, "R%d = FPACK F%d", rn, rx); break; + case 0x25: util::stream_format(stream, "F%d = FUNPACK R%d", rn, rx); break; + default: util::stream_format(stream, "??? (SHIFTOP)"); break; } } - - - - -static uint32_t dasm_compute_dreg_dmpm(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_compute_dreg_dmpm(std::ostream &stream, uint32_t pc, uint64_t opcode) { int dmi = (opcode >> 41) & 0x7; int dmm = (opcode >> 38) & 0x7; @@ -492,42 +544,42 @@ static uint32_t dasm_compute_dreg_dmpm(uint32_t pc, uint64_t opcode) if (comp) { - compute(comp); - print(", "); + compute(stream, comp); + util::stream_format(stream, ", "); } if (dmd) { - print("DM(%s, %s) = R%d, ", GET_DAG1_I(dmi), GET_DAG1_M(dmm), dmdreg); + util::stream_format(stream, "DM(%s, %s) = R%d, ", GET_DAG1_I(dmi), GET_DAG1_M(dmm), dmdreg); } else { - print("R%d = DM(%s, %s), ", dmdreg, GET_DAG1_I(dmi), GET_DAG1_M(dmm)); + util::stream_format(stream, "R%d = DM(%s, %s), ", dmdreg, GET_DAG1_I(dmi), GET_DAG1_M(dmm)); } if (pmd) { - print("PM(%s, %s) = R%d", GET_DAG2_I(pmi), GET_DAG2_M(pmm), pmdreg); + util::stream_format(stream, "PM(%s, %s) = R%d", GET_DAG2_I(pmi), GET_DAG2_M(pmm), pmdreg); } else { - print("R%d = PM(%s, %s)", pmdreg, GET_DAG2_I(pmi), GET_DAG2_M(pmm)); + util::stream_format(stream, "R%d = PM(%s, %s)", pmdreg, GET_DAG2_I(pmi), GET_DAG2_M(pmm)); } return 0; } -static uint32_t dasm_compute(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_compute(std::ostream &stream, uint32_t pc, uint64_t opcode) { int cond = (opcode >> 33) & 0x1f; int comp = opcode & 0x7fffff; if (comp) { - get_if_condition(cond); - compute(comp); + get_if_condition(stream, cond); + compute(stream, comp); } return 0; } -static uint32_t dasm_compute_uregdmpm_regmod(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_compute_uregdmpm_regmod(std::ostream &stream, uint32_t pc, uint64_t opcode) { int cond = (opcode >> 33) & 0x1f; int g = (opcode >> 32) & 0x1; @@ -538,17 +590,17 @@ static uint32_t dasm_compute_uregdmpm_regmod(uint32_t pc, uint64_t opcode) int ureg = (opcode >> 23) & 0xff; int comp = opcode & 0x7fffff; - get_if_condition(cond); + get_if_condition(stream, cond); if (comp) { - compute(comp); - print(", "); + compute(stream, comp); + util::stream_format(stream, ", "); } - pm_dm_ureg(g,d,i,m, ureg, u); + pm_dm_ureg(stream, g,d,i,m, ureg, u); return 0; } -static uint32_t dasm_compute_dregdmpm_immmod(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_compute_dregdmpm_immmod(std::ostream &stream, uint32_t pc, uint64_t opcode) { int cond = (opcode >> 33) & 0x1f; int g = (opcode >> 40) & 0x1; @@ -559,34 +611,34 @@ static uint32_t dasm_compute_dregdmpm_immmod(uint32_t pc, uint64_t opcode) int data = (opcode >> 27) & 0x3f; int comp = opcode & 0x7fffff; - get_if_condition(cond); + get_if_condition(stream, cond); if (comp) { - compute(comp); - print(", "); + compute(stream, comp); + util::stream_format(stream, ", "); } - pm_dm_imm_dreg(g,d,i, data, dreg, u); + pm_dm_imm_dreg(stream, g,d,i, data, dreg, u); return 0; } -static uint32_t dasm_compute_ureg_ureg(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_compute_ureg_ureg(std::ostream &stream, uint32_t pc, uint64_t opcode) { int cond = (opcode >> 31) & 0x1f; int uregs = (opcode >> 36) & 0xff; int uregd = (opcode >> 23) & 0xff; int comp = opcode & 0x7fffff; - get_if_condition(cond); + get_if_condition(stream, cond); if (comp) { - compute(comp); - print(", "); + compute(stream, comp); + util::stream_format(stream, ", "); } - print("%s = %s", GET_UREG(uregd), GET_UREG(uregs)); + util::stream_format(stream, "%s = %s", GET_UREG(uregd), GET_UREG(uregs)); return 0; } -static uint32_t dasm_immshift_dregdmpm(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_immshift_dregdmpm(std::ostream &stream, uint32_t pc, uint64_t opcode) { int cond = (opcode >> 33) & 0x1f; int g = (opcode >> 32) & 0x1; @@ -599,14 +651,14 @@ static uint32_t dasm_immshift_dregdmpm(uint32_t pc, uint64_t opcode) int dreg = (opcode >> 23) & 0xf; int data = (((opcode >> 27) & 0xf) << 8) | ((opcode >> 8) & 0xff); - get_if_condition(cond); - shiftop(shift, data, rn, rx); - print(", "); - pm_dm_dreg(g,d,i,m, dreg); + get_if_condition(stream, cond); + shiftop(stream, shift, data, rn, rx); + util::stream_format(stream, ", "); + pm_dm_dreg(stream, g,d,i,m, dreg); return 0; } -static uint32_t dasm_immshift_dregdmpm_nodata(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_immshift_dregdmpm_nodata(std::ostream &stream, uint32_t pc, uint64_t opcode) { int cond = (opcode >> 33) & 0x1f; int rn = (opcode >> 4) & 0xf; @@ -614,12 +666,12 @@ static uint32_t dasm_immshift_dregdmpm_nodata(uint32_t pc, uint64_t opcode) int shift = (opcode >> 16) & 0x3f; int data = (((opcode >> 27) & 0xf) << 8) | ((opcode >> 8) & 0xff); - get_if_condition(cond); - shiftop(shift, data, rn, rx); + get_if_condition(stream, cond); + shiftop(stream, shift, data, rn, rx); return 0; } -static uint32_t dasm_compute_modify(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_compute_modify(std::ostream &stream, uint32_t pc, uint64_t opcode) { int cond = (opcode >> 33) & 0x1f; int g = (opcode >> 38) & 0x7; @@ -627,17 +679,17 @@ static uint32_t dasm_compute_modify(uint32_t pc, uint64_t opcode) int m = (opcode >> 27) & 0x7; int comp = opcode & 0x7fffff; - get_if_condition(cond); + get_if_condition(stream, cond); if (comp) { - compute(comp); - print(", "); + compute(stream, comp); + util::stream_format(stream, ", "); } - print("MODIFY(I%d, M%d)", (g ? 8+i : i), (g ? 8+m : m)); + util::stream_format(stream, "MODIFY(I%d, M%d)", (g ? 8+i : i), (g ? 8+m : m)); return 0; } -static uint32_t dasm_direct_jump(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_direct_jump(std::ostream &stream, uint32_t pc, uint64_t opcode) { int j = (opcode >> 26) & 0x1; int cond = (opcode >> 33) & 0x1f; @@ -645,37 +697,37 @@ static uint32_t dasm_direct_jump(uint32_t pc, uint64_t opcode) uint32_t addr = opcode & 0xffffff; uint32_t flags = 0; - get_if_condition(cond); + get_if_condition(stream, cond); if (opcode & 0x8000000000U) { - print("CALL"); - flags = DASMFLAG_STEP_OVER; + util::stream_format(stream, "CALL"); + flags = STEP_OVER; } else { - print("JUMP"); + util::stream_format(stream, "JUMP"); } if (opcode & 0x10000000000U) /* PC-relative branch */ { - print(" (0x%08X)", pc + SIGN_EXTEND24(addr)); + util::stream_format(stream, " (0x%08X)", pc + SIGN_EXTEND24(addr)); } else /* Indirect branch */ { - print(" (0x%08X)", addr); + util::stream_format(stream, " (0x%08X)", addr); } if (j) { - print(" (DB)"); + util::stream_format(stream, " (DB)"); } if (ci) { - print(" (CI)"); + util::stream_format(stream, " (CI)"); } return flags; } -static uint32_t dasm_indirect_jump_compute(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_indirect_jump_compute(std::ostream &stream, uint32_t pc, uint64_t opcode) { int b = (opcode >> 39) & 0x1; int j = (opcode >> 26) & 0x1; @@ -688,48 +740,48 @@ static uint32_t dasm_indirect_jump_compute(uint32_t pc, uint64_t opcode) int comp = opcode & 0x7fffff; uint32_t flags = 0; - get_if_condition(cond); + get_if_condition(stream, cond); if (b) { - print("CALL"); - flags = DASMFLAG_STEP_OVER; + util::stream_format(stream, "CALL"); + flags = STEP_OVER; } else { - print("JUMP"); + util::stream_format(stream, "JUMP"); } if (opcode & 0x10000000000U) /* PC-relative branch */ { - print(" (0x%08X)", pc + SIGN_EXTEND6(reladdr)); + util::stream_format(stream, " (0x%08X)", pc + SIGN_EXTEND6(reladdr)); } else /* Indirect branch */ { - print(" (%s, %s)", GET_DAG2_M(pmm), GET_DAG2_I(pmi)); + util::stream_format(stream, " (%s, %s)", GET_DAG2_M(pmm), GET_DAG2_I(pmi)); } if (j) { - print(" (DB)"); + util::stream_format(stream, " (DB)"); } if (ci) { - print(" (CI)"); + util::stream_format(stream, " (CI)"); } if (comp) { - print(", "); + util::stream_format(stream, ", "); if (e) { - print("ELSE "); + util::stream_format(stream, "ELSE "); } - compute(comp); + compute(stream, comp); } return flags; } -static uint32_t dasm_indirect_jump_compute_dregdm(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_indirect_jump_compute_dregdm(std::ostream &stream, uint32_t pc, uint64_t opcode) { int d = (opcode >> 44) & 0x1; int cond = (opcode >> 33) & 0x1f; @@ -741,36 +793,36 @@ static uint32_t dasm_indirect_jump_compute_dregdm(uint32_t pc, uint64_t opcode) int dreg = (opcode >> 23) & 0xf; int comp = opcode & 0x7fffff; - get_if_condition(cond); - print("JUMP"); + get_if_condition(stream, cond); + util::stream_format(stream, "JUMP"); if (opcode & 0x200000000000U) /* PC-relative branch */ { - print(" (0x%08X)", pc + SIGN_EXTEND6(reladdr)); + util::stream_format(stream, " (0x%08X)", pc + SIGN_EXTEND6(reladdr)); } else /* Indirect branch */ { - print(" (%s, %s)", GET_DAG2_M(pmm), GET_DAG2_I(pmi)); + util::stream_format(stream, " (%s, %s)", GET_DAG2_M(pmm), GET_DAG2_I(pmi)); } - print(", ELSE "); + util::stream_format(stream, ", ELSE "); if (comp) { - compute(comp); - print(", "); + compute(stream, comp); + util::stream_format(stream, ", "); } if (d) { - print("%s = DM(%s, %s)", GET_DREG(dreg), GET_DAG1_I(dmi), GET_DAG1_M(dmm)); + util::stream_format(stream, "%s = DM(%s, %s)", GET_DREG(dreg), GET_DAG1_I(dmi), GET_DAG1_M(dmm)); } else { - print("DM(%s, %s) = %s", GET_DAG1_I(dmi), GET_DAG1_M(dmm), GET_DREG(dreg)); + util::stream_format(stream, "DM(%s, %s) = %s", GET_DAG1_I(dmi), GET_DAG1_M(dmm), GET_DREG(dreg)); } return 0; } -static uint32_t dasm_rts_compute(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_rts_compute(std::ostream &stream, uint32_t pc, uint64_t opcode) { int j = (opcode >> 26) & 0x1; int e = (opcode >> 25) & 0x1; @@ -778,40 +830,40 @@ static uint32_t dasm_rts_compute(uint32_t pc, uint64_t opcode) int cond = (opcode >> 33) & 0x1f; int comp = opcode & 0x7fffff; - get_if_condition(cond); + get_if_condition(stream, cond); if (opcode & 0x10000000000U) { - print("RTI"); + util::stream_format(stream, "RTI"); } else { - print("RTS"); + util::stream_format(stream, "RTS"); } if (j) { - print(" (DB)"); + util::stream_format(stream, " (DB)"); } if (lr) { - print(" (LR)"); + util::stream_format(stream, " (LR)"); } if (comp) { - print(", "); + util::stream_format(stream, ", "); if (e) { - print("ELSE "); + util::stream_format(stream, "ELSE "); } - compute(comp); + compute(stream, comp); } - return DASMFLAG_STEP_OUT; + return STEP_OUT; } -static uint32_t dasm_do_until_counter(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_do_until_counter(std::ostream &stream, uint32_t pc, uint64_t opcode) { int data = (opcode >> 24) & 0xffff; int ureg = (opcode >> 32) & 0xff; @@ -819,27 +871,27 @@ static uint32_t dasm_do_until_counter(uint32_t pc, uint64_t opcode) if (opcode & 0x10000000000U) /* Loop counter from universal register */ { - print("LCNTR = %s, ", GET_UREG(ureg)); - print("DO (0x%08X)", pc + SIGN_EXTEND24(addr)); + util::stream_format(stream, "LCNTR = %s, ", GET_UREG(ureg)); + util::stream_format(stream, "DO (0x%08X)", pc + SIGN_EXTEND24(addr)); } else /* Loop counter from immediate */ { - print("LCNTR = 0x%04X, ", data); - print("DO (0x%08X) UNTIL LCE", pc + SIGN_EXTEND24(addr)); + util::stream_format(stream, "LCNTR = 0x%04X, ", data); + util::stream_format(stream, "DO (0x%08X) UNTIL LCE", pc + SIGN_EXTEND24(addr)); } return 0; } -static uint32_t dasm_do_until(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_do_until(std::ostream &stream, uint32_t pc, uint64_t opcode) { int term = (opcode >> 33) & 0x1f; uint32_t addr = opcode & 0xffffff; - print("DO (0x%08X) UNTIL %s", pc + SIGN_EXTEND24(addr), condition_codes_do[term]); + util::stream_format(stream, "DO (0x%08X) UNTIL %s", pc + SIGN_EXTEND24(addr), condition_codes_do[term]); return 0; } -static uint32_t dasm_immmove_uregdmpm(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_immmove_uregdmpm(std::ostream &stream, uint32_t pc, uint64_t opcode) { int d = (opcode >> 40) & 0x1; int g = (opcode >> 41) & 0x1; @@ -850,28 +902,28 @@ static uint32_t dasm_immmove_uregdmpm(uint32_t pc, uint64_t opcode) { if (d) { - print("PM(0x%08X) = %s", addr, GET_UREG(ureg)); + util::stream_format(stream, "PM(0x%08X) = %s", addr, GET_UREG(ureg)); } else { - print("%s = PM(0x%08X)", GET_UREG(ureg), addr); + util::stream_format(stream, "%s = PM(0x%08X)", GET_UREG(ureg), addr); } } else { if (d) { - print("DM(0x%08X) = %s", addr, GET_UREG(ureg)); + util::stream_format(stream, "DM(0x%08X) = %s", addr, GET_UREG(ureg)); } else { - print("%s = DM(0x%08X)", GET_UREG(ureg), addr); + util::stream_format(stream, "%s = DM(0x%08X)", GET_UREG(ureg), addr); } } return 0; } -static uint32_t dasm_immmove_uregdmpm_indirect(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_immmove_uregdmpm_indirect(std::ostream &stream, uint32_t pc, uint64_t opcode) { int d = (opcode >> 40) & 0x1; int g = (opcode >> 44) & 0x1; @@ -883,28 +935,28 @@ static uint32_t dasm_immmove_uregdmpm_indirect(uint32_t pc, uint64_t opcode) { if (d) { - print("PM(0x%08X, %s) = %s", addr, GET_DAG2_I(i), GET_UREG(ureg)); + util::stream_format(stream, "PM(0x%08X, %s) = %s", addr, GET_DAG2_I(i), GET_UREG(ureg)); } else { - print("%s = PM(0x%08X, %s)", GET_UREG(ureg), addr, GET_DAG2_I(i)); + util::stream_format(stream, "%s = PM(0x%08X, %s)", GET_UREG(ureg), addr, GET_DAG2_I(i)); } } else { if (d) { - print("DM(0x%08X, %s) = %s", addr, GET_DAG1_I(i), GET_UREG(ureg)); + util::stream_format(stream, "DM(0x%08X, %s) = %s", addr, GET_DAG1_I(i), GET_UREG(ureg)); } else { - print("%s = DM(0x%08X, %s)", GET_UREG(ureg), addr, GET_DAG1_I(i)); + util::stream_format(stream, "%s = DM(0x%08X, %s)", GET_UREG(ureg), addr, GET_DAG1_I(i)); } } return 0; } -static uint32_t dasm_immmove_immdata_dmpm(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_immmove_immdata_dmpm(std::ostream &stream, uint32_t pc, uint64_t opcode) { int g = (opcode >> 37) & 0x1; int i = (opcode >> 41) & 0x7; @@ -913,38 +965,38 @@ static uint32_t dasm_immmove_immdata_dmpm(uint32_t pc, uint64_t opcode) if (g) { - print("PM(%s, %s) = 0x%08X", GET_DAG2_I(i), GET_DAG2_M(m), data); + util::stream_format(stream, "PM(%s, %s) = 0x%08X", GET_DAG2_I(i), GET_DAG2_M(m), data); } else { - print("DM(%s, %s) = 0x%08X", GET_DAG1_I(i), GET_DAG1_M(m), data); + util::stream_format(stream, "DM(%s, %s) = 0x%08X", GET_DAG1_I(i), GET_DAG1_M(m), data); } return 0; } -static uint32_t dasm_immmove_immdata_ureg(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_immmove_immdata_ureg(std::ostream &stream, uint32_t pc, uint64_t opcode) { int ureg = (opcode >> 32) & 0xff; uint32_t data = opcode & 0xffffffff; - print("%s = 0x%08X", GET_UREG(ureg), data); + util::stream_format(stream, "%s = 0x%08X", GET_UREG(ureg), data); return 0; } -static uint32_t dasm_sysreg_bitop(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_sysreg_bitop(std::ostream &stream, uint32_t pc, uint64_t opcode) { int bop = (opcode >> 37) & 0x7; int sreg = (opcode >> 32) & 0xf; uint32_t data = opcode & 0xffffffff; - print("BIT "); - print("%s ", bopnames[bop]); - print("%s ", GET_SREG(sreg)); - print("0x%08X", data); + util::stream_format(stream, "BIT "); + util::stream_format(stream, "%s ", bopnames[bop]); + util::stream_format(stream, "%s ", GET_SREG(sreg)); + util::stream_format(stream, "0x%08X", data); return 0; } -static uint32_t dasm_ireg_modify(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_ireg_modify(std::ostream &stream, uint32_t pc, uint64_t opcode) { int g = (opcode >> 38) & 0x1; int i = (opcode >> 32) & 0x7; @@ -954,28 +1006,28 @@ static uint32_t dasm_ireg_modify(uint32_t pc, uint64_t opcode) { if (g) { - print("BITREV (%s, 0x%08X)", GET_DAG2_I(i), data); + util::stream_format(stream, "BITREV (%s, 0x%08X)", GET_DAG2_I(i), data); } else { - print("BITREV (%s, 0x%08X)", GET_DAG1_I(i), data); + util::stream_format(stream, "BITREV (%s, 0x%08X)", GET_DAG1_I(i), data); } } else /* without bit-reverse */ { if (g) { - print("MODIFY (%s, 0x%08X)", GET_DAG2_I(i), data); + util::stream_format(stream, "MODIFY (%s, 0x%08X)", GET_DAG2_I(i), data); } else { - print("MODIFY (%s, 0x%08X)", GET_DAG1_I(i), data); + util::stream_format(stream, "MODIFY (%s, 0x%08X)", GET_DAG1_I(i), data); } } return 0; } -static uint32_t dasm_misc(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_misc(std::ostream &stream, uint32_t pc, uint64_t opcode) { int bits = (opcode >> 33) & 0x7f; int lpu = (opcode >> 39) & 0x1; @@ -988,171 +1040,169 @@ static uint32_t dasm_misc(uint32_t pc, uint64_t opcode) if (lpu) { - print("PUSH LOOP"); + util::stream_format(stream, "PUSH LOOP"); if (bits & 0x3f) { - print(", "); + util::stream_format(stream, ", "); } } if (lpo) { - print("POP LOOP"); + util::stream_format(stream, "POP LOOP"); if (bits & 0x1f) { - print(", "); + util::stream_format(stream, ", "); } } if (spu) { - print("PUSH STS"); + util::stream_format(stream, "PUSH STS"); if (bits & 0xf) { - print(", "); + util::stream_format(stream, ", "); } } if (spo) { - print("POP STS"); + util::stream_format(stream, "POP STS"); if (bits & 0x7) { - print(", "); + util::stream_format(stream, ", "); } } if (ppu) { - print("PUSH PCSTK"); + util::stream_format(stream, "PUSH PCSTK"); if (bits & 0x3) { - print(", "); + util::stream_format(stream, ", "); } } if (ppo) { - print("POP PCSTK"); + util::stream_format(stream, "POP PCSTK"); if (bits & 0x1) { - print(", "); + util::stream_format(stream, ", "); } } if (fc) { - print("FLUSH CACHE"); + util::stream_format(stream, "FLUSH CACHE"); } return 0; } -static uint32_t dasm_idlenop(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_idlenop(std::ostream &stream, uint32_t pc, uint64_t opcode) { if (opcode & 0x8000000000U) { - print("IDLE"); + util::stream_format(stream, "IDLE"); } else { - print("NOP"); + util::stream_format(stream, "NOP"); } return 0; } -#ifdef UNUSED_FUNCTION -static uint32_t dasm_cjump_rframe(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_cjump_rframe(std::ostream &stream, uint32_t pc, uint64_t opcode) { /* TODO */ if (opcode & 0x10000000000U) /* RFRAME */ { - print("TODO: RFRAME"); + util::stream_format(stream, "TODO: RFRAME"); } else { - print("TODO: CJUMP"); + util::stream_format(stream, "TODO: CJUMP"); } return 0; } -#endif -static uint32_t dasm_invalid(uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_invalid(std::ostream &stream, uint32_t pc, uint64_t opcode) { - print("?"); + util::stream_format(stream, "?"); return 0; } -static const SHARC_DASM_OP sharc_dasm_ops[] = +const sharc_disassembler::SHARC_DASM_OP sharc_disassembler::sharc_dasm_ops[] = { // |0 0 1| - { 0xe000, 0x2000, dasm_compute_dreg_dmpm }, + { 0xe000, 0x2000, &sharc_disassembler::dasm_compute_dreg_dmpm }, // |0 0 0|0 0 0 0 1| - { 0xff00, 0x0100, dasm_compute }, + { 0xff00, 0x0100, &sharc_disassembler::dasm_compute }, // |0 1 0| - { 0xe000, 0x4000, dasm_compute_uregdmpm_regmod }, + { 0xe000, 0x4000, &sharc_disassembler::dasm_compute_uregdmpm_regmod }, // |0 1 1|0| - { 0xf000, 0x6000, dasm_compute_dregdmpm_immmod }, + { 0xf000, 0x6000, &sharc_disassembler::dasm_compute_dregdmpm_immmod }, // |0 1 1|1| - { 0xf000, 0x7000, dasm_compute_ureg_ureg }, + { 0xf000, 0x7000, &sharc_disassembler::dasm_compute_ureg_ureg }, // |1 0 0|0| - { 0xf000, 0x8000, dasm_immshift_dregdmpm }, + { 0xf000, 0x8000, &sharc_disassembler::dasm_immshift_dregdmpm }, // |0 0 0|0 0 0 1 0| - { 0xff00, 0x0200, dasm_immshift_dregdmpm_nodata }, + { 0xff00, 0x0200, &sharc_disassembler::dasm_immshift_dregdmpm_nodata }, // |0 0 0|0 0 1 0 0| - { 0xff00, 0x0400, dasm_compute_modify }, + { 0xff00, 0x0400, &sharc_disassembler::dasm_compute_modify }, // |0 0 0|0 0 1 1 x| - { 0xfe00, 0x0600, dasm_direct_jump }, + { 0xfe00, 0x0600, &sharc_disassembler::dasm_direct_jump }, // |0 0 0|0 1 0 0 x| - { 0xfe00, 0x0800, dasm_indirect_jump_compute }, + { 0xfe00, 0x0800, &sharc_disassembler::dasm_indirect_jump_compute }, // |1 1 x| - { 0xc000, 0xc000, dasm_indirect_jump_compute_dregdm }, + { 0xc000, 0xc000, &sharc_disassembler::dasm_indirect_jump_compute_dregdm }, // |0 0 0|0 1 0 1 x| - { 0xfe00, 0x0a00, dasm_rts_compute }, + { 0xfe00, 0x0a00, &sharc_disassembler::dasm_rts_compute }, // |0 0 0|0 1 1 0 x| - { 0xfe00, 0x0c00, dasm_do_until_counter }, + { 0xfe00, 0x0c00, &sharc_disassembler::dasm_do_until_counter }, // |0 0 0|0 1 1 1 0| - { 0xff00, 0x0e00, dasm_do_until }, + { 0xff00, 0x0e00, &sharc_disassembler::dasm_do_until }, // |0 0 0|1 0 0|x|x| - { 0xfc00, 0x1000, dasm_immmove_uregdmpm }, + { 0xfc00, 0x1000, &sharc_disassembler::dasm_immmove_uregdmpm }, // |1 0 1|x|x x x|x| - { 0xe000, 0xa000, dasm_immmove_uregdmpm_indirect }, + { 0xe000, 0xa000, &sharc_disassembler::dasm_immmove_uregdmpm_indirect }, // |1 0 0|1| - { 0xf000, 0x9000, dasm_immmove_immdata_dmpm }, + { 0xf000, 0x9000, &sharc_disassembler::dasm_immmove_immdata_dmpm }, // |0 0 0|0 1 1 1 1| - { 0xff00, 0x0f00, dasm_immmove_immdata_ureg }, + { 0xff00, 0x0f00, &sharc_disassembler::dasm_immmove_immdata_ureg }, // |0 0 0|1 0 1 0 0| - { 0xff00, 0x1400, dasm_sysreg_bitop }, + { 0xff00, 0x1400, &sharc_disassembler::dasm_sysreg_bitop }, // |0 0 0|1 0 1 1 0| - { 0xff00, 0x1600, dasm_ireg_modify }, + { 0xff00, 0x1600, &sharc_disassembler::dasm_ireg_modify }, // |0 0 0|1 0 1 1 1| - { 0xff00, 0x1700, dasm_misc }, + { 0xff00, 0x1700, &sharc_disassembler::dasm_misc }, // |0 0 0|0 0 0 0 0| - { 0xff00, 0x0000, dasm_idlenop }, + { 0xff00, 0x0000, &sharc_disassembler::dasm_idlenop }, }; -static void build_dasm_table(void) +sharc_disassembler::sharc_disassembler() { int i, j; int num_ops = sizeof(sharc_dasm_ops) / sizeof(SHARC_DASM_OP); for (i=0; i < 256; i++) { - sharcdasm_table[i] = dasm_invalid; + sharcdasm_table[i] = &sharc_disassembler::dasm_invalid; } for (i=0; i < 256; i++) @@ -1163,7 +1213,7 @@ static void build_dasm_table(void) { if ((sharc_dasm_ops[j].op_mask & op) == sharc_dasm_ops[j].op_bits) { - if (sharcdasm_table[i] != dasm_invalid) + if (sharcdasm_table[i] != &sharc_disassembler::dasm_invalid) { fatalerror("build_dasm_table: table already filled! (i=%04X, j=%d)\n", i, j); } @@ -1176,45 +1226,15 @@ static void build_dasm_table(void) } } -static uint32_t sharc_dasm_one(std::ostream &stream, offs_t pc, uint64_t opcode) +offs_t sharc_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) { - #define DEFAULT_DASM_WIDTH (64) - - char dasm_buffer[2000]; - int i; + u64 opcode = opcodes.r64(pc); int op = (opcode >> 40) & 0xff; - uint32_t flags; - - if (!dasm_table_built) - { - build_dasm_table(); - dasm_table_built = 1; - } - memset(dasm_buffer, 0, sizeof(dasm_buffer)); - - /* set buffer for print */ - output = dasm_buffer; - - flags = (*sharcdasm_table[op])(pc, opcode); - - for (i=0; i < DEFAULT_DASM_WIDTH && dasm_buffer[i]; i++) - { - stream << dasm_buffer[i]; - } - return flags; + return 1 | (this->*sharcdasm_table[op])(stream, pc, opcode) | SUPPORTED; } - -CPU_DISASSEMBLE( sharc ) +u32 sharc_disassembler::opcode_alignment() const { - uint64_t op; - uint32_t flags; - - op = ((uint64_t)oprom[0] << 0) | ((uint64_t)oprom[1] << 8) | - ((uint64_t)oprom[2] << 16) | ((uint64_t)oprom[3] << 24) | - ((uint64_t)oprom[4] << 32) | ((uint64_t)oprom[5] << 40); - - flags = sharc_dasm_one(stream, pc, op); - return 1 | flags | DASMFLAG_SUPPORTED; + return 1; } diff --git a/src/devices/cpu/sharc/sharcdsm.h b/src/devices/cpu/sharc/sharcdsm.h index e4a52e94ea6..f752a133d6a 100644 --- a/src/devices/cpu/sharc/sharcdsm.h +++ b/src/devices/cpu/sharc/sharcdsm.h @@ -1,79 +1,68 @@ // license:BSD-3-Clause // copyright-holders:Ville Linde -static const char ureg_names[256][16] = -{ - "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", - "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15", - "I0", "I1", "I2", "I3", "I4", "I5", "I6", "I7", - "I8", "I9", "I10", "I11", "I12", "I13", "I14", "I15", - "M0", "M1", "M2", "M3", "M4", "M5", "M6", "M7", - "M8", "M9", "M10", "M11", "M12", "M13", "M14", "M15", - "L0", "L1", "L2", "L3", "L4", "L5", "L6", "L7", - "L8", "L9", "L10", "L11", "L12", "L13", "L14", "L15", - "B0", "B1", "B2", "B3", "B4", "B5", "B6", "B7", - "B8", "B9", "B10", "B11", "B12", "B13", "B14", "B15", - "???", "???", "???", "???", "???", "???", "???", "???", - "???", "???", "???", "???", "???", "???", "???", "???", - "FADDR", "DADDR", "???", "PC", "PCSTK", "PCSTKP", "LADDR", "CURLCNTR", - "LCNTR", "???", "???", "???", "???", "???", "???", "???", - "USTAT1", "USTAT2", "???", "???", "???", "???", "???", "???", - "???", "IRPTL", "MODE2", "MODE1", "ASTAT", "IMASK", "STKY", "IMASKP", - "???", "???", "???", "???", "???", "???", "???", "???", - "???", "???", "???", "???", "???", "???", "???", "???", - "???", "???", "???", "???", "???", "???", "???", "???", - "???", "???", "???", "???", "???", "???", "???", "???", - "???", "???", "???", "???", "???", "???", "???", "???", - "???", "???", "???", "???", "???", "???", "???", "???", - "???", "???", "???", "???", "???", "???", "???", "???", - "???", "???", "???", "???", "???", "???", "???", "???", - "???", "???", "???", "???", "???", "???", "???", "???", - "???", "???", "???", "???", "???", "???", "???", "???", - "???", "???", "???", "???", "???", "???", "???", "???", - "???", "???", "???", "PX", "PX1", "PX2", "TPERIOD", "TCOUNT", - "???", "???", "???", "???", "???", "???", "???", "???", - "???", "???", "???", "???", "???", "???", "???", "???", - "???", "???", "???", "???", "???", "???", "???", "???", - "???", "???", "???", "???", "???", "???", "???", "???" -}; -static const char bopnames[8][8] = -{ - "SET", "CLEAR", "TOGGLE", "???", "TEST", "XOR", "???", "???" -}; +#ifndef MAME_CPU_SHARC_SHARCDSM_H +#define MAME_CPU_SHARC_SHARCDSM_H -static const char condition_codes_if[32][32] = -{ - "EQ", "LT", "LE", "AC", - "AV", "MV", "MS", "SV", - "SZ", "FLAG0_IN", "FLAG1_IN", "FLAG2_IN", - "FLAG3_IN", "TF", "BM", "NOT LCE", - "NE", "GE", "GT", "NOT AC", - "NOT AV", "NOT MV", "NOT MS", "NOT SV", - "NOT SZ", "NOT FLAG0_IN", "NOT FLAG1_IN", "NOT FLAG2_IN", - "NOT FLAG3_IN", "NOT TF", "NBM", "" -}; +#pragma once -static const char condition_codes_do[32][32] = +class sharc_disassembler : public util::disasm_interface { - "EQ", "LT", "LE", "AC", - "AV", "MV", "MS", "SV", - "SZ", "FLAG0_IN", "FLAG1_IN", "FLAG2_IN", - "FLAG3_IN", "TF", "BM", "LCE", - "NE", "GE", "GT", "NOT AC", - "NOT AV", "NOT MV", "NOT MS", "NOT SV", - "NOT SZ", "NOT FLAG0_IN", "NOT FLAG1_IN", "NOT FLAG2_IN", - "NOT FLAG3_IN", "NOT TF", "NBM", "FOREVER" -}; +public: + sharc_disassembler(); + virtual ~sharc_disassembler() = default; -static const char mr_regnames[16][8] = -{ - "MR0F", "MR1F", "MR2F", "MR0B", "MR1B", "MR2B", "???", "???", - "???", "???", "???", "???", "???", "???", "???", "???" -}; + virtual u32 opcode_alignment() const override; + virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; -struct SHARC_DASM_OP -{ - uint32_t op_mask; - uint32_t op_bits; - uint32_t (* handler)(uint32_t, uint64_t); +private: + struct SHARC_DASM_OP + { + uint32_t op_mask; + uint32_t op_bits; + uint32_t (sharc_disassembler::*handler)(std::ostream &, uint32_t, uint64_t); + }; + + static const char ureg_names[256][16]; + static const char bopnames[8][8]; + static const char condition_codes_if[32][32]; + static const char condition_codes_do[32][32]; + static const char mr_regnames[16][8]; + static const SHARC_DASM_OP sharc_dasm_ops[]; + + uint32_t (sharc_disassembler::*sharcdasm_table[256])(std::ostream &, uint32_t, uint64_t); + + void compute(std::ostream &stream, uint32_t opcode); + void get_if_condition(std::ostream &stream, int cond); + void pm_dm_ureg(std::ostream &stream, int g, int d, int i, int m, int ureg, int update); + void pm_dm_imm_dreg(std::ostream &stream, int g, int d, int i, int data, int dreg, int update); + void pm_dm_dreg(std::ostream &stream, int g, int d, int i, int m, int dreg); + void shiftop(std::ostream &stream, int shift, int data, int rn, int rx); + + uint32_t dasm_compute_dreg_dmpm(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_compute(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_compute_uregdmpm_regmod(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_compute_dregdmpm_immmod(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_compute_ureg_ureg(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_immshift_dregdmpm(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_immshift_dregdmpm_nodata(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_compute_modify(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_direct_jump(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_indirect_jump_compute(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_indirect_jump_compute_dregdm(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_rts_compute(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_do_until_counter(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_do_until(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_immmove_uregdmpm(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_immmove_uregdmpm_indirect(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_immmove_immdata_dmpm(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_immmove_immdata_ureg(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_sysreg_bitop(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_ireg_modify(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_misc(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_idlenop(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_cjump_rframe(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_invalid(std::ostream &stream, uint32_t pc, uint64_t opcode); }; + +#endif diff --git a/src/devices/cpu/sharc/sharcmem.hxx b/src/devices/cpu/sharc/sharcmem.hxx index b297799c036..73bfa0e69f0 100644 --- a/src/devices/cpu/sharc/sharcmem.hxx +++ b/src/devices/cpu/sharc/sharcmem.hxx @@ -4,30 +4,30 @@ uint32_t adsp21062_device::pm_read32(uint32_t address) { - return m_program->read_dword(address << 3); + return m_program->read_dword(address); } void adsp21062_device::pm_write32(uint32_t address, uint32_t data) { - m_program->write_dword(address << 3, data); + m_program->write_dword(address, data); } uint64_t adsp21062_device::pm_read48(uint32_t address) { - return m_program->read_qword(address << 3); + return m_program->read_qword(address); } void adsp21062_device::pm_write48(uint32_t address, uint64_t data) { - m_program->write_qword(address << 3, data); + m_program->write_qword(address, data); } uint32_t adsp21062_device::dm_read32(uint32_t address) { - return m_data->read_dword(address << 2); + return m_data->read_dword(address); } void adsp21062_device::dm_write32(uint32_t address, uint32_t data) { - m_data->write_dword(address << 2, data); + m_data->write_dword(address, data); } diff --git a/src/devices/cpu/sharc/sharcops.hxx b/src/devices/cpu/sharc/sharcops.hxx index af1beed292b..8e7a03d974e 100644 --- a/src/devices/cpu/sharc/sharcops.hxx +++ b/src/devices/cpu/sharc/sharcops.hxx @@ -2721,9 +2721,5 @@ void adsp21062_device::sharcop_idle() void adsp21062_device::sharcop_unimplemented() { - extern CPU_DISASSEMBLE(sharc); - std::ostringstream dasm; - CPU_DISASSEMBLE_NAME(sharc)(nullptr, dasm, m_core->pc, nullptr, nullptr, 0); - osd_printf_debug("SHARC: %08X: %s\n", m_core->pc, dasm.str().c_str()); fatalerror("SHARC: Unimplemented opcode %04X%08X at %08X\n", (uint16_t)(m_core->opcode >> 32), (uint32_t)(m_core->opcode), m_core->pc); } |