diff options
Diffstat (limited to 'src/devices/cpu/powerpc/ppcdrc.cpp')
-rw-r--r-- | src/devices/cpu/powerpc/ppcdrc.cpp | 56 |
1 files changed, 24 insertions, 32 deletions
diff --git a/src/devices/cpu/powerpc/ppcdrc.cpp b/src/devices/cpu/powerpc/ppcdrc.cpp index 7390f9284e9..a974511e504 100644 --- a/src/devices/cpu/powerpc/ppcdrc.cpp +++ b/src/devices/cpu/powerpc/ppcdrc.cpp @@ -2224,8 +2224,8 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op) UML_CALLH(block, *m_read32[m_core->mode]); // callh read32 - UML_MOV(block, mem(&m_core->tempdata.w.l), I0); // mov [tempdata],i0 - UML_FDFRFLT(block, F64(G_RD(op)), mem(&m_core->tempdata.w.l), SIZE_DWORD); // fdfrflt fd,[tempdata],dword + UML_FSCOPYI(block, F0, I0); // fscopyi f0,i0 + UML_FDFRFLT(block, F64(G_RD(op)), F0, SIZE_DWORD); // fdfrflt fd,f0,dword generate_update_cycles(block, compiler, desc->pc + 4, TRUE); // <update cycles> return TRUE; @@ -2233,8 +2233,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op) UML_CALLH(block, *m_read64[m_core->mode]); // callh read64 - UML_DMOV(block, mem(&m_core->tempdata.d), I0); // dmov [tempdata],i0 - UML_FDMOV(block, F64(G_RD(op)), mem(&m_core->tempdata.d)); // fdmov fd,[tempdata] + UML_FDCOPYI(block, F64(G_RD(op)), I0); // fdcopyi fd,i0 generate_update_cycles(block, compiler, desc->pc + 4, TRUE); // <update cycles> return TRUE; @@ -2243,8 +2242,8 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0 UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op) UML_CALLH(block, *m_read32[m_core->mode]); // callh read32 - UML_MOV(block, mem(&m_core->tempdata.w.l), I0); // mov [tempdata],i0 - UML_FDFRFLT(block, F64(G_RD(op)), mem(&m_core->tempdata.w.l), SIZE_DWORD); // fdfrflt fd,[tempdata],dword + UML_FSCOPYI(block, F0, I0); // fscopyi f0,i0 + UML_FDFRFLT(block, F64(G_RD(op)), F0, SIZE_DWORD); // fdfrflt fd,f0,dword UML_MOV(block, R32(G_RA(op)), mem(&m_core->updateaddr)); // mov ra,[updateaddr] generate_update_cycles(block, compiler, desc->pc + 4, TRUE); // <update cycles> return TRUE; @@ -2254,16 +2253,15 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0 UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op) UML_CALLH(block, *m_read64[m_core->mode]); // callh read64 - UML_DMOV(block, mem(&m_core->tempdata.d), I0); // dmov [tempdata],i0 - UML_FDMOV(block, F64(G_RD(op)), mem(&m_core->tempdata.d)); // fdmov fd,[tempdata] + UML_FDCOPYI(block, F64(G_RD(op)), I0); // fdcopyi fd,i0 UML_MOV(block, R32(G_RA(op)), mem(&m_core->updateaddr)); // mov ra,[updateaddr] generate_update_cycles(block, compiler, desc->pc + 4, TRUE); // <update cycles> return TRUE; case 0x34: /* STFS */ UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm - UML_FSFRFLT(block, mem(&m_core->tempdata.w.l), F64(G_RS(op)), SIZE_QWORD); // fsfrflt [tempdata],rs,qword - UML_MOV(block, I1, mem(&m_core->tempdata.w.l)); // mov i1,[tempdata] + UML_FSFRFLT(block, F0, F64(G_RS(op)), SIZE_QWORD); // fsfrflt f0,fs,qword + UML_ICOPYFS(block, I1, F0); // icopyfs i1,f0 UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op) UML_CALLH(block, *m_write32[m_core->mode]); // callh write32 generate_update_cycles(block, compiler, desc->pc + 4, TRUE); // <update cycles> @@ -2271,8 +2269,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c case 0x36: /* STFD */ UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm - UML_FDMOV(block, mem(&m_core->tempdata.d), F64(G_RS(op))); // fdmov [tempdata],rs - UML_DMOV(block, I1, mem(&m_core->tempdata.d)); // dmov i1,[tempdata] + UML_ICOPYFD(block, I1, F64(G_RS(op))); // icopyfd i1,fs UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op) UML_CALLH(block, *m_write64[m_core->mode]); // callh write64 generate_update_cycles(block, compiler, desc->pc + 4, TRUE); // <update cycles> @@ -2280,8 +2277,8 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c case 0x35: /* STFSU */ UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm - UML_FSFRFLT(block, mem(&m_core->tempdata.w.l), F64(G_RS(op)), SIZE_QWORD); // fsfrflt [tempdata],rs,qword - UML_MOV(block, I1, mem(&m_core->tempdata.w.l)); // mov i1,[tempdata] + UML_FSFRFLT(block, F0, F64(G_RS(op)), SIZE_QWORD); // fsfrflt f0,fs,qword + UML_ICOPYFS(block, I1, F0); // icopyfs i1,f0 UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0 UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op) UML_CALLH(block, *m_write32[m_core->mode]); // callh write32 @@ -2291,8 +2288,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c case 0x37: /* STFDU */ UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm - UML_FDMOV(block, mem(&m_core->tempdata.d), F64(G_RS(op))); // fdmov [tempdata],rs - UML_DMOV(block, I1, mem(&m_core->tempdata.d)); // dmov i1,[tempdata] + UML_ICOPYFD(block, I1, F64(G_RS(op))); // icopyfd i1,fs UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0 UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op) UML_CALLH(block, *m_write64[m_core->mode]); // callh write64 @@ -2909,8 +2905,8 @@ int ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *com UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op) UML_CALLH(block, *m_read32[m_core->mode]); // callh read32 - UML_MOV(block, mem(&m_core->tempdata.w.l), I0); // mov [tempdata],i0 - UML_FDFRFLT(block, F64(G_RD(op)), mem(&m_core->tempdata.w.l), SIZE_DWORD); // fdfrflt fd,[tempdata],dword + UML_FSCOPYI(block, F0, I0); // fscopyi f0,i0 + UML_FDFRFLT(block, F64(G_RD(op)), F0, SIZE_DWORD); // fdfrflt fd,f0,dword generate_update_cycles(block, compiler, desc->pc + 4, TRUE); // <update cycles> return TRUE; @@ -2918,8 +2914,7 @@ int ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *com UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op) UML_CALLH(block, *m_read64[m_core->mode]); // callh read64 - UML_DMOV(block, mem(&m_core->tempdata.d), I0); // dmov [tempdata],i0 - UML_FDMOV(block, F64(G_RD(op)), mem(&m_core->tempdata.d)); // fdmov fd,[tempdata] + UML_FDCOPYI(block, F64(G_RD(op)), I0); // fdcopyi fd,i0 generate_update_cycles(block, compiler, desc->pc + 4, TRUE); // <update cycles> return TRUE; @@ -2985,8 +2980,8 @@ int ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *com UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0 UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op) UML_CALLH(block, *m_read32[m_core->mode]); // callh read32 - UML_MOV(block, mem(&m_core->tempdata.w.l), I0); // mov [tempdata],i0 - UML_FDFRFLT(block, F64(G_RD(op)), mem(&m_core->tempdata.w.l), SIZE_DWORD); // fdfrflt fd,[tempdata],dword + UML_FSCOPYI(block, F0, I0); // fscopyi f0,i0 + UML_FDFRFLT(block, F64(G_RD(op)), F0, SIZE_DWORD); // fdfrflt fd,f0,dword UML_MOV(block, R32(G_RA(op)), mem(&m_core->updateaddr)); // mov ra,[updateaddr] generate_update_cycles(block, compiler, desc->pc + 4, TRUE); // <update cycles> return TRUE; @@ -2996,8 +2991,7 @@ int ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *com UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0 UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op) UML_CALLH(block, *m_read64[m_core->mode]); // callh read64 - UML_DMOV(block, mem(&m_core->tempdata.d), I0); // dmov [tempdata],i0 - UML_FDMOV(block, F64(G_RD(op)), mem(&m_core->tempdata.d)); // fdmov fd,[tempdata] + UML_FDCOPYI(block, F64(G_RD(op)), I0); // fdcopyi fd,i0 UML_MOV(block, R32(G_RA(op)), mem(&m_core->updateaddr)); // mov ra,[updateaddr] generate_update_cycles(block, compiler, desc->pc + 4, TRUE); // <update cycles> return TRUE; @@ -3055,8 +3049,8 @@ int ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *com case 0x297: /* STFSX */ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb - UML_FSFRFLT(block, mem(&m_core->tempdata.w.l), F64(G_RS(op)), SIZE_QWORD); // fsfrflt [tempdata],rs,qword - UML_MOV(block, I1, mem(&m_core->tempdata.w.l)); // mov i1,[tempdata] + UML_FSFRFLT(block, F0, F64(G_RS(op)), SIZE_QWORD); // fsfrflt f0,fs,qword + UML_ICOPYFS(block, I1, F0); // icopyfs i1,f0 UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op) UML_CALLH(block, *m_write32[m_core->mode]); // callh write32 generate_update_cycles(block, compiler, desc->pc + 4, TRUE); // <update cycles> @@ -3073,8 +3067,7 @@ int ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *com case 0x2d7: /* STFDX */ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb - UML_FDMOV(block, mem(&m_core->tempdata.d), F64(G_RS(op))); // fdmov [tempdata],rs - UML_DMOV(block, I1, mem(&m_core->tempdata.d)); // dmov i1,[tempdata] + UML_ICOPYFD(block, I1, F64(G_RS(op))); // icopyfd i1,fs UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op) UML_CALLH(block, *m_write64[m_core->mode]); // callh write64 generate_update_cycles(block, compiler, desc->pc + 4, TRUE); // <update cycles> @@ -3129,8 +3122,8 @@ int ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *com case 0x2b7: /* STFSUX */ UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb - UML_FSFRFLT(block, mem(&m_core->tempdata.w.l), F64(G_RS(op)), SIZE_QWORD); // fsfrflt [tempdata],rs,qword - UML_MOV(block, I1, mem(&m_core->tempdata.w.l)); // mov i1,[tempdata] + UML_FSFRFLT(block, F0, F64(G_RS(op)), SIZE_QWORD); // fsfrflt f0,fs,qword + UML_ICOPYFS(block, I1, F0); // icopyfs i1,f0 UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0 UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op) UML_CALLH(block, *m_write32[m_core->mode]); // callh write32 @@ -3140,8 +3133,7 @@ int ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *com case 0x2f7: /* STFDUX */ UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb - UML_FDMOV(block, mem(&m_core->tempdata.d), F64(G_RS(op))); // fdmov [tempdata],rs - UML_DMOV(block, I1, mem(&m_core->tempdata.d)); // dmov i1,[tempdata] + UML_ICOPYFD(block, I1, F64(G_RS(op))); // icopyfd i1,fs UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0 UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op) UML_CALLH(block, *m_write64[m_core->mode]); // callh write64 |