diff options
Diffstat (limited to 'src/devices/cpu/pic16c62x/16c62xdsm.cpp')
-rw-r--r-- | src/devices/cpu/pic16c62x/16c62xdsm.cpp | 151 |
1 files changed, 60 insertions, 91 deletions
diff --git a/src/devices/cpu/pic16c62x/16c62xdsm.cpp b/src/devices/cpu/pic16c62x/16c62xdsm.cpp index f9fb88a88d1..8206a362869 100644 --- a/src/devices/cpu/pic16c62x/16c62xdsm.cpp +++ b/src/devices/cpu/pic16c62x/16c62xdsm.cpp @@ -27,93 +27,68 @@ \**************************************************************************/ #include "emu.h" -#include <ctype.h> - -static const uint8_t *rombase; -static const uint8_t *rambase; -static offs_t pcbase; -#define READOP16(A) (rombase[(A) - pcbase] | (rombase[(A) + 1 - pcbase] << 8)) -#define READARG16(A) (rambase[(A) - pcbase] | (rambase[(A) + 1 - pcbase] << 8)) - - - -typedef unsigned char byte; -typedef unsigned short int word; +#include "16c62xdsm.h" -#define FMT(a,b) a, b -#define PTRS_PER_FORMAT 2 +#include <ctype.h> /* Registers bank 0/1 */ -static const char *const regfile[32] = { "Reg$00 (INDF)", "Reg$01 (TMR0/OPTION)", "Reg$02 (PCL)", "Reg$03 (STATUS)", "Reg$04 (FSR)", "Reg$05 (PORTA/TRISA)", "Reg$06 (PORTB/TRISB)", "Reg$07", +const char *const pic16c62x_disassembler::regfile[32] = { "Reg$00 (INDF)", "Reg$01 (TMR0/OPTION)", "Reg$02 (PCL)", "Reg$03 (STATUS)", "Reg$04 (FSR)", "Reg$05 (PORTA/TRISA)", "Reg$06 (PORTB/TRISB)", "Reg$07", "Reg$08", "Reg$09", "Reg$0A (PCLATH)", "Reg$0B (INTCON)", "Reg$0C (PIR1/PIE1)", "Reg$0D", "Reg$0E (none/PCON)", "Reg$0F", "Reg$10", "Reg$11", "Reg$12", "Reg$13", "Reg$14", "Reg$15", "Reg$16", "Reg$17", "Reg$18", "Reg$19", "Reg$1A", "Reg$1B", "Reg$1C", "Reg$1D", "Reg$1E", "Reg$1F (CMCON/VRCON)" }; /* Registers bank 1 */ -/*static const char *const regfile1[32] = { "Reg$00 (INDF)", "Reg$01 (OPTION)", "Reg$02 (PCL)", "Reg$03 (STATUS)", "Reg$04 (FSR)", "Reg$05 (TRISA)", "Reg$06 (TRISB)", "Reg$07", +/*const char *const regfile1[32] = { "Reg$00 (INDF)", "Reg$01 (OPTION)", "Reg$02 (PCL)", "Reg$03 (STATUS)", "Reg$04 (FSR)", "Reg$05 (TRISA)", "Reg$06 (TRISB)", "Reg$07", "Reg$08", "Reg$09", "Reg$0A (PCLATH)", "Reg$0B (INTCON)", "Reg$0C (PIE1)", "Reg$0D", "Reg$0E (PCON)", "Reg$0F", "Reg$10", "Reg$11", "Reg$12", "Reg$13", "Reg$14", "Reg$15", "Reg$16", "Reg$17", "Reg$18", "Reg$19", "Reg$1A", "Reg$1B", "Reg$1C", "Reg$1D", "Reg$1E", "Reg$1F (VRCON)" }; -static const char **regfile[2] = { regfile0, regfile1 };*/ - -static const char *const dest[2] = { "W", "Reg" }; - -static const char *const PIC16C62xFormats[] = { - FMT("0000000xx00000", "nop"), - FMT("00000000001000", "return"), - FMT("00000000001001", "retfie"), - FMT("00000001100011", "sleep"), - FMT("00000001100100", "clrwdt"), - FMT("0000001fffffff", "movwf %F"), - FMT("00000100000011", "clrw"), - FMT("0000011fffffff", "clrf %F"), - FMT("000010dfffffff", "subwf %F,%D"), - FMT("000011dfffffff", "decf %F,%D"), - FMT("000100dfffffff", "iorwf %F,%D"), - FMT("000101dfffffff", "andwf %F,%D"), - FMT("000110dfffffff", "xorwf %F,%D"), - FMT("000111dfffffff", "addwf %F,%D"), - FMT("001000dfffffff", "movf %F,%D"), - FMT("001001dfffffff", "comf %F,%D"), - FMT("001010dfffffff", "incf %F,%D"), - FMT("001011dfffffff", "decfsz %F,%D"), - FMT("001100dfffffff", "rrf %F,%D"), - FMT("001101dfffffff", "rlf %F,%D"), - FMT("001110dfffffff", "swapf %F,%D"), - FMT("001111dfffffff", "incfsz %F,%D"), - FMT("0100bbbfffffff", "bcf %F,%B"), - FMT("0101bbbfffffff", "bsf %F,%B"), - FMT("0110bbbfffffff", "btfsc %F,%B"), - FMT("0111bbbfffffff", "btfss %F,%B"), - FMT("1101xxkkkkkkkk", "retlw %K"), - FMT("100aaaaaaaaaaa", "call %A"), - FMT("101aaaaaaaaaaa", "goto %A"), - FMT("1100xxkkkkkkkk", "movlw %K"), - FMT("111000kkkkkkkk", "iorlw %K"), - FMT("111001kkkkkkkk", "andlw %K"), - FMT("111010kkkkkkkk", "xorlw %K"), - FMT("11110xkkkkkkkk", "sublw %K"), - FMT("11111xkkkkkkkk", "addlw %K"), +const char **regfile[2] = { regfile0, regfile1 };*/ + +const char *const pic16c62x_disassembler::dest[2] = { "W", "Reg" }; + +const char *const pic16c62x_disassembler::PIC16C62xFormats[] = { + "0000000xx00000", "nop", + "00000000001000", "return", + "00000000001001", "retfie", + "00000001100011", "sleep", + "00000001100100", "clrwdt", + "0000001fffffff", "movwf %F", + "00000100000011", "clrw", + "0000011fffffff", "clrf %F", + "000010dfffffff", "subwf %F,%D", + "000011dfffffff", "decf %F,%D", + "000100dfffffff", "iorwf %F,%D", + "000101dfffffff", "andwf %F,%D", + "000110dfffffff", "xorwf %F,%D", + "000111dfffffff", "addwf %F,%D", + "001000dfffffff", "movf %F,%D", + "001001dfffffff", "comf %F,%D", + "001010dfffffff", "incf %F,%D", + "001011dfffffff", "decfsz %F,%D", + "001100dfffffff", "rrf %F,%D", + "001101dfffffff", "rlf %F,%D", + "001110dfffffff", "swapf %F,%D", + "001111dfffffff", "incfsz %F,%D", + "0100bbbfffffff", "bcf %F,%B", + "0101bbbfffffff", "bsf %F,%B", + "0110bbbfffffff", "btfsc %F,%B", + "0111bbbfffffff", "btfss %F,%B", + "1101xxkkkkkkkk", "retlw %K", + "100aaaaaaaaaaa", "call %A", + "101aaaaaaaaaaa", "goto %A", + "1100xxkkkkkkkk", "movlw %K", + "111000kkkkkkkk", "iorlw %K", + "111001kkkkkkkk", "andlw %K", + "111010kkkkkkkk", "xorlw %K", + "11110xkkkkkkkk", "sublw %K", + "11111xkkkkkkkk", "addlw %K", nullptr }; -#define MAX_OPS ((ARRAY_LENGTH(PIC16C62xFormats) - 1) / PTRS_PER_FORMAT) - -struct PIC16C62xOpcode { - word mask; /* instruction mask */ - word bits; /* constant bits */ - word extcode; /* value that gets extension code */ - const char *parse; /* how to parse bits */ - const char *fmt; /* instruction format */ -}; - -static PIC16C62xOpcode Op[MAX_OPS+1]; -static int OpInizialized = 0; - -static void InitDasm16C5x(void) +pic16c62x_disassembler::pic16c62x_disassembler() { const char *p; const char *const *ops; - word mask, bits; + u16 mask, bits; int bit; int i; @@ -147,20 +122,15 @@ static void InitDasm16C5x(void) ops[0],ops[1],bit); } while (isspace((uint8_t)*p)) p++; - if (*p) Op[i].extcode = *p; - Op[i].bits = bits; - Op[i].mask = mask; - Op[i].fmt = ops[1]; - Op[i].parse = ops[0]; + Op.emplace_back(bits, mask, *p, ops[0], ops[1]); - ops += PTRS_PER_FORMAT; + ops += 2; i++; } - OpInizialized = 1; } -CPU_DISASSEMBLE(pic16c62x) +offs_t pic16c62x_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) { int a, b, d, f, k; /* these can all be filled in by parsing an instruction */ int i; @@ -172,15 +142,9 @@ CPU_DISASSEMBLE(pic16c62x) const char *cp; /* character pointer in OpFormats */ uint32_t flags = 0; - rombase = oprom; - rambase = opram; - pcbase = 2*pc; - - if (!OpInizialized) InitDasm16C5x(); - op = -1; /* no matching opcode */ - code = READOP16(2*pc); - for ( i = 0; i < MAX_OPS; i++) + code = opcodes.r16(pc); + for ( i = 0; i < int(Op.size()); i++) { if ((code & Op[i].mask) == Op[i].bits) { @@ -202,7 +166,7 @@ CPU_DISASSEMBLE(pic16c62x) { bit = 29; code <<= 16; - code |= READARG16(2*(pc+cnt)); + code |= params.r16(pc+cnt); cnt++; } else @@ -234,9 +198,9 @@ CPU_DISASSEMBLE(pic16c62x) /* now traverse format string */ cp = Op[op].fmt; if (!strncmp(cp, "call", 4)) - flags = DASMFLAG_STEP_OVER; + flags = STEP_OVER; else if (!strncmp(cp, "ret", 3)) - flags = DASMFLAG_STEP_OUT; + flags = STEP_OUT; while (*cp) { @@ -259,5 +223,10 @@ CPU_DISASSEMBLE(pic16c62x) stream << *cp++; } } - return cnt | flags | DASMFLAG_SUPPORTED; + return cnt | flags | SUPPORTED; +} + +uint32_t pic16c62x_disassembler::opcode_alignment() const +{ + return 1; } |