diff options
Diffstat (limited to 'src/devices/cpu/mb86235')
-rw-r--r-- | src/devices/cpu/mb86235/mb86235.cpp | 4 | ||||
-rw-r--r-- | src/devices/cpu/mb86235/mb86235.h | 48 | ||||
-rw-r--r-- | src/devices/cpu/mb86235/mb86235drc.cpp | 490 |
3 files changed, 270 insertions, 272 deletions
diff --git a/src/devices/cpu/mb86235/mb86235.cpp b/src/devices/cpu/mb86235/mb86235.cpp index 17ce8f0fb42..eb1baa4565e 100644 --- a/src/devices/cpu/mb86235/mb86235.cpp +++ b/src/devices/cpu/mb86235/mb86235.cpp @@ -288,9 +288,9 @@ void mb86235_device::state_string_export(const device_state_entry &entry, std::s } } -util::disasm_interface *mb86235_device::create_disassembler() +std::unique_ptr<util::disasm_interface> mb86235_device::create_disassembler() { - return new mb86235_disassembler; + return std::make_unique<mb86235_disassembler>(); } diff --git a/src/devices/cpu/mb86235/mb86235.h b/src/devices/cpu/mb86235/mb86235.h index 58e8f645dda..72301d39bfd 100644 --- a/src/devices/cpu/mb86235/mb86235.h +++ b/src/devices/cpu/mb86235/mb86235.h @@ -78,7 +78,7 @@ protected: virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; // device_disasm_interface overrides - virtual util::disasm_interface *create_disassembler() override; + virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; direct_read_data<-3> *m_direct; @@ -200,6 +200,8 @@ private: /* internal compiler state */ struct compiler_state { + compiler_state &operator=(compiler_state const &) = delete; + uint32_t cycles; /* accumulated cycles */ uint8_t checkints; /* need to check interrupts before next instruction */ uml::code_label labelnum; /* index for local labels */ @@ -207,37 +209,37 @@ private: void run_drc(); void flush_cache(); - void alloc_handle(drcuml_state *drcuml, uml::code_handle **handleptr, const char *name); + void alloc_handle(uml::code_handle *&handleptr, const char *name); void compile_block(offs_t pc); - void load_fast_iregs(drcuml_block *block); - void save_fast_iregs(drcuml_block *block); + void load_fast_iregs(drcuml_block &block); + void save_fast_iregs(drcuml_block &block); void static_generate_entry_point(); void static_generate_nocode_handler(); void static_generate_out_of_cycles(); void static_generate_fifo(); void static_generate_memory_accessors(); - void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception); - bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_alu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int aluop, bool alu_temp); - void generate_mul(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int mulop, bool mul_temp); - void generate_pre_control(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_control(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_xfer1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_double_xfer1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_xfer2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_double_xfer2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_xfer3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ea(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int md, int arx, int ary, int disp); - void generate_reg_read(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter dst); - void generate_reg_write(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter src); - void generate_alumul_input(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter dst, bool fp, bool mul); + void generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + void generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception); + bool generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + void generate_alu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int aluop, bool alu_temp); + void generate_mul(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int mulop, bool mul_temp); + void generate_pre_control(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + void generate_control(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + void generate_xfer1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + void generate_double_xfer1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + void generate_xfer2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + void generate_double_xfer2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + void generate_xfer3(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + void generate_branch(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + void generate_ea(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int md, int arx, int ary, int disp); + void generate_reg_read(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int reg, uml::parameter dst); + void generate_reg_write(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int reg, uml::parameter src); + void generate_alumul_input(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int reg, uml::parameter dst, bool fp, bool mul); uml::parameter get_alu1_input(int reg); uml::parameter get_alu_output(int reg); uml::parameter get_mul1_input(int reg); - void generate_condition(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int cc, bool n, uml::code_label skip_label, bool condtemp); - void generate_branch_target(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int type, int ef2); + void generate_condition(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int cc, bool n, uml::code_label skip_label, bool condtemp); + void generate_branch_target(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int type, int ef2); bool has_register_clash(const opcode_desc *desc, int outreg); bool aluop_has_result(int aluop); bool check_previous_op_stall(); diff --git a/src/devices/cpu/mb86235/mb86235drc.cpp b/src/devices/cpu/mb86235/mb86235drc.cpp index e94bd726210..941f0f39f36 100644 --- a/src/devices/cpu/mb86235/mb86235drc.cpp +++ b/src/devices/cpu/mb86235/mb86235drc.cpp @@ -27,12 +27,9 @@ -using namespace uml; - - // map variables -#define MAPVAR_PC M0 -#define MAPVAR_CYCLES M1 +#define MAPVAR_PC uml::M0 +#define MAPVAR_CYCLES uml::M1 // exit codes #define EXECUTE_OUT_OF_CYCLES 0 @@ -41,30 +38,30 @@ using namespace uml; #define EXECUTE_RESET_CACHE 3 -#define AR(reg) mem(&m_core->ar[(reg)]) +#define AR(reg) uml::mem(&m_core->ar[(reg)]) #define AA(reg) m_regmap[(reg)] #define AB(reg) m_regmap[(reg)+8] #define MA(reg) m_regmap[(reg)+16] #define MB(reg) m_regmap[(reg)+24] -#define FLAGS_AZ mem(&m_core->flags.az) -#define FLAGS_AN mem(&m_core->flags.an) -#define FLAGS_AV mem(&m_core->flags.av) -#define FLAGS_AU mem(&m_core->flags.au) -#define FLAGS_AD mem(&m_core->flags.ad) -#define FLAGS_ZC mem(&m_core->flags.zc) -#define FLAGS_IL mem(&m_core->flags.il) -#define FLAGS_NR mem(&m_core->flags.nr) -#define FLAGS_ZD mem(&m_core->flags.zd) -#define FLAGS_MN mem(&m_core->flags.mn) -#define FLAGS_MZ mem(&m_core->flags.mz) -#define FLAGS_MV mem(&m_core->flags.mv) -#define FLAGS_MU mem(&m_core->flags.mu) -#define FLAGS_MD mem(&m_core->flags.md) - -#define PRP mem(&m_core->prp) -#define PWP mem(&m_core->pwp) -#define RPC mem(&m_core->rpc) -#define LPC mem(&m_core->lpc) +#define FLAGS_AZ uml::mem(&m_core->flags.az) +#define FLAGS_AN uml::mem(&m_core->flags.an) +#define FLAGS_AV uml::mem(&m_core->flags.av) +#define FLAGS_AU uml::mem(&m_core->flags.au) +#define FLAGS_AD uml::mem(&m_core->flags.ad) +#define FLAGS_ZC uml::mem(&m_core->flags.zc) +#define FLAGS_IL uml::mem(&m_core->flags.il) +#define FLAGS_NR uml::mem(&m_core->flags.nr) +#define FLAGS_ZD uml::mem(&m_core->flags.zd) +#define FLAGS_MN uml::mem(&m_core->flags.mn) +#define FLAGS_MZ uml::mem(&m_core->flags.mz) +#define FLAGS_MV uml::mem(&m_core->flags.mv) +#define FLAGS_MU uml::mem(&m_core->flags.mu) +#define FLAGS_MD uml::mem(&m_core->flags.md) + +#define PRP uml::mem(&m_core->prp) +#define PWP uml::mem(&m_core->pwp) +#define RPC uml::mem(&m_core->rpc) +#define LPC uml::mem(&m_core->lpc) #define AZ_CALC_REQUIRED ((desc->regreq[1] & 0x1) || desc->flags & OPFLAG_IN_DELAY_SLOT) #define AN_CALC_REQUIRED ((desc->regreq[1] & 0x2) || desc->flags & OPFLAG_IN_DELAY_SLOT) @@ -81,21 +78,21 @@ using namespace uml; #define MU_CALC_REQUIRED ((desc->regreq[1] & 0x1000) || desc->flags & OPFLAG_IN_DELAY_SLOT) #define MD_CALC_REQUIRED ((desc->regreq[1] & 0x2000) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define FIFOIN_RPOS mem(&m_core->fifoin.rpos) -#define FIFOIN_WPOS mem(&m_core->fifoin.wpos) -#define FIFOIN_NUM mem(&m_core->fifoin.num) -#define FIFOOUT0_RPOS mem(&m_core->fifoout0.rpos) -#define FIFOOUT0_WPOS mem(&m_core->fifoout0.wpos) -#define FIFOOUT0_NUM mem(&m_core->fifoout0.num) -#define FIFOOUT1_RPOS mem(&m_core->fifoout1.rpos) -#define FIFOOUT1_WPOS mem(&m_core->fifoout1.wpos) -#define FIFOOUT1_NUM mem(&m_core->fifoout1.num) +#define FIFOIN_RPOS uml::mem(&m_core->fifoin.rpos) +#define FIFOIN_WPOS uml::mem(&m_core->fifoin.wpos) +#define FIFOIN_NUM uml::mem(&m_core->fifoin.num) +#define FIFOOUT0_RPOS uml::mem(&m_core->fifoout0.rpos) +#define FIFOOUT0_WPOS uml::mem(&m_core->fifoout0.wpos) +#define FIFOOUT0_NUM uml::mem(&m_core->fifoout0.num) +#define FIFOOUT1_RPOS uml::mem(&m_core->fifoout1.rpos) +#define FIFOOUT1_WPOS uml::mem(&m_core->fifoout1.wpos) +#define FIFOOUT1_NUM uml::mem(&m_core->fifoout1.num) -inline void mb86235_device::alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const char *name) +inline void mb86235_device::alloc_handle(uml::code_handle *&handleptr, const char *name) { - if (*handleptr == nullptr) - *handleptr = drcuml->handle_alloc(name); + if (!handleptr) + handleptr = m_drcuml->handle_alloc(name); } @@ -199,7 +196,7 @@ load_fast_iregs - load any fast integer registers -------------------------------------------------*/ -inline void mb86235_device::load_fast_iregs(drcuml_block *block) +inline void mb86235_device::load_fast_iregs(drcuml_block &block) { int regnum; @@ -217,7 +214,7 @@ save_fast_iregs - save any fast integer registers -------------------------------------------------*/ -void mb86235_device::save_fast_iregs(drcuml_block *block) +void mb86235_device::save_fast_iregs(drcuml_block &block) { int regnum; @@ -266,8 +263,6 @@ void mb86235_device::compile_block(offs_t pc) const opcode_desc *desclist; bool override = false; - drcuml_block *block; - desclist = m_drcfe->describe_code(pc); bool succeeded = false; @@ -275,7 +270,7 @@ void mb86235_device::compile_block(offs_t pc) { try { - block = m_drcuml->begin_block(4096); + drcuml_block &block(m_drcuml->begin_block(4096)); for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next()) { @@ -314,7 +309,7 @@ void mb86235_device::compile_block(offs_t pc) /* iterate over instructions in the sequence and compile them */ for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next()) - generate_sequence_instruction(block, &compiler, curdesc); + generate_sequence_instruction(block, compiler, curdesc); /* if we need to return to the start, do it */ if (seqlast->flags & OPFLAG_RETURN_TO_START) @@ -324,13 +319,13 @@ void mb86235_device::compile_block(offs_t pc) nextpc = seqlast->pc + (seqlast->skipslots + 1); /* count off cycles and go there */ - generate_update_cycles(block, &compiler, nextpc, true); // <subtract cycles> + generate_update_cycles(block, compiler, nextpc, true); // <subtract cycles> if (seqlast->next() == nullptr || seqlast->next()->pc != nextpc) UML_HASHJMP(block, 0, nextpc, *m_nocode); // hashjmp <mode>,nextpc,nocode } - block->end(); + block.end(); succeeded = true; } catch (drcuml_block::abort_compilation &) @@ -344,16 +339,14 @@ void mb86235_device::compile_block(offs_t pc) void mb86235_device::static_generate_entry_point() { - //code_label skip = 1; - drcuml_block *block; - + //uml::code_label const skip = 1; /* begin generating */ - block = m_drcuml->begin_block(20); + drcuml_block &block(m_drcuml->begin_block(20)); /* forward references */ - alloc_handle(m_drcuml.get(), &m_nocode, "nocode"); + alloc_handle(m_nocode, "nocode"); - alloc_handle(m_drcuml.get(), &m_entry, "entry"); + alloc_handle(m_entry, "entry"); UML_HANDLE(block, *m_entry); // handle entry load_fast_iregs(block); // <load fastregs> @@ -361,176 +354,179 @@ void mb86235_device::static_generate_entry_point() /* generate a hash jump via the current mode and PC */ UML_HASHJMP(block, 0, mem(&m_core->pc), *m_nocode); // hashjmp <mode>,<pc>,nocode - block->end(); + block.end(); } void mb86235_device::static_generate_nocode_handler() { - drcuml_block *block; - /* begin generating */ - block = m_drcuml->begin_block(10); + drcuml_block &block(m_drcuml->begin_block(10)); /* generate a hash jump via the current mode and PC */ - alloc_handle(m_drcuml.get(), &m_nocode, "nocode"); + alloc_handle(m_nocode, "nocode"); UML_HANDLE(block, *m_nocode); // handle nocode UML_GETEXP(block, I0); // getexp i0 UML_MOV(block, mem(&m_core->pc), I0); // mov [pc],i0 save_fast_iregs(block); // <save fastregs> UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE - block->end(); + block.end(); } void mb86235_device::static_generate_out_of_cycles() { - drcuml_block *block; - /* begin generating */ - block = m_drcuml->begin_block(10); + drcuml_block &block(m_drcuml->begin_block(10)); /* generate a hash jump via the current mode and PC */ - alloc_handle(m_drcuml.get(), &m_out_of_cycles, "out_of_cycles"); + alloc_handle(m_out_of_cycles, "out_of_cycles"); UML_HANDLE(block, *m_out_of_cycles); // handle out_of_cycles UML_GETEXP(block, I0); // getexp i0 UML_MOV(block, mem(&m_core->pc), I0); // mov <pc>,i0 save_fast_iregs(block); // <save fastregs> UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES - block->end(); + block.end(); } void mb86235_device::static_generate_fifo() { - drcuml_block *block; - - // clear fifo in - block = m_drcuml->begin_block(20); - - alloc_handle(m_drcuml.get(), &m_clear_fifo_in, "clear_fifo_in"); - UML_HANDLE(block, *m_clear_fifo_in); - UML_MOV(block, FIFOIN_NUM, 0); - UML_MOV(block, FIFOIN_RPOS, 0); - UML_MOV(block, FIFOIN_WPOS, 0); - UML_RET(block); - - block->end(); - - // clear fifo out0 - block = m_drcuml->begin_block(20); - - alloc_handle(m_drcuml.get(), &m_clear_fifo_out0, "clear_fifo_out0"); - UML_HANDLE(block, *m_clear_fifo_out0); - UML_MOV(block, FIFOOUT0_NUM, 0); - UML_MOV(block, FIFOOUT0_RPOS, 0); - UML_MOV(block, FIFOOUT0_WPOS, 0); - UML_RET(block); - - block->end(); - - // clear fifo out1 - block = m_drcuml->begin_block(20); - - alloc_handle(m_drcuml.get(), &m_clear_fifo_out1, "clear_fifo_out1"); - UML_HANDLE(block, *m_clear_fifo_out1); - UML_MOV(block, FIFOOUT1_NUM, 0); - UML_MOV(block, FIFOOUT1_RPOS, 0); - UML_MOV(block, FIFOOUT1_WPOS, 0); - UML_RET(block); - - block->end(); - - // read fifo in - // I0 = return value - block = m_drcuml->begin_block(32); - alloc_handle(m_drcuml.get(), &m_read_fifo_in, "read_fifo_in"); - UML_HANDLE(block, *m_read_fifo_in); - UML_MOV(block, I1, FIFOIN_RPOS); - UML_LOAD(block, I0, m_core->fifoin.data, I1, SIZE_QWORD, SCALE_x8); - UML_ADD(block, I1, I1, 1); - UML_AND(block, I1, I1, FIFOIN_SIZE-1); - UML_MOV(block, FIFOIN_RPOS, I1); - UML_SUB(block, FIFOIN_NUM, FIFOIN_NUM, 1); - UML_RET(block); - - block->end(); - - // write fifo out0 - // I0 = input value - block = m_drcuml->begin_block(32); - alloc_handle(m_drcuml.get(), &m_write_fifo_out0, "write_fifo_out0"); - UML_HANDLE(block, *m_write_fifo_out0); - UML_MOV(block, I1, FIFOOUT0_WPOS); - UML_STORE(block, m_core->fifoout0.data, I1, I0, SIZE_QWORD, SCALE_x8); - UML_ADD(block, I1, I1, 1); - UML_AND(block, I1, I1, FIFOOUT0_SIZE - 1); - UML_MOV(block, FIFOOUT0_WPOS, I1); - UML_ADD(block, FIFOOUT0_NUM, FIFOOUT0_NUM, 1); - UML_RET(block); - - block->end(); - - // write fifo out1 - block = m_drcuml->begin_block(32); - alloc_handle(m_drcuml.get(), &m_write_fifo_out1, "write_fifo_out1"); - UML_HANDLE(block, *m_write_fifo_out1); - // TODO - UML_RET(block); - - block->end(); + { + // clear fifo in + drcuml_block &block(m_drcuml->begin_block(20)); + + alloc_handle(m_clear_fifo_in, "clear_fifo_in"); + UML_HANDLE(block, *m_clear_fifo_in); + UML_MOV(block, FIFOIN_NUM, 0); + UML_MOV(block, FIFOIN_RPOS, 0); + UML_MOV(block, FIFOIN_WPOS, 0); + UML_RET(block); + + block.end(); + } + { + // clear fifo out0 + drcuml_block &block(m_drcuml->begin_block(20)); + + alloc_handle(m_clear_fifo_out0, "clear_fifo_out0"); + UML_HANDLE(block, *m_clear_fifo_out0); + UML_MOV(block, FIFOOUT0_NUM, 0); + UML_MOV(block, FIFOOUT0_RPOS, 0); + UML_MOV(block, FIFOOUT0_WPOS, 0); + UML_RET(block); + + block.end(); + } + { + // clear fifo out1 + drcuml_block &block(m_drcuml->begin_block(20)); + + alloc_handle(m_clear_fifo_out1, "clear_fifo_out1"); + UML_HANDLE(block, *m_clear_fifo_out1); + UML_MOV(block, FIFOOUT1_NUM, 0); + UML_MOV(block, FIFOOUT1_RPOS, 0); + UML_MOV(block, FIFOOUT1_WPOS, 0); + UML_RET(block); + + block.end(); + } + { + // read fifo in + // I0 = return value + drcuml_block &block(m_drcuml->begin_block(32)); + alloc_handle(m_read_fifo_in, "read_fifo_in"); + UML_HANDLE(block, *m_read_fifo_in); + UML_MOV(block, I1, FIFOIN_RPOS); + UML_LOAD(block, I0, m_core->fifoin.data, I1, SIZE_QWORD, SCALE_x8); + UML_ADD(block, I1, I1, 1); + UML_AND(block, I1, I1, FIFOIN_SIZE-1); + UML_MOV(block, FIFOIN_RPOS, I1); + UML_SUB(block, FIFOIN_NUM, FIFOIN_NUM, 1); + UML_RET(block); + + block.end(); + } + { + // write fifo out0 + // I0 = input value + drcuml_block &block(m_drcuml->begin_block(32)); + alloc_handle(m_write_fifo_out0, "write_fifo_out0"); + UML_HANDLE(block, *m_write_fifo_out0); + UML_MOV(block, I1, FIFOOUT0_WPOS); + UML_STORE(block, m_core->fifoout0.data, I1, I0, SIZE_QWORD, SCALE_x8); + UML_ADD(block, I1, I1, 1); + UML_AND(block, I1, I1, FIFOOUT0_SIZE - 1); + UML_MOV(block, FIFOOUT0_WPOS, I1); + UML_ADD(block, FIFOOUT0_NUM, FIFOOUT0_NUM, 1); + UML_RET(block); + + block.end(); + } + { + // write fifo out1 + drcuml_block &block(m_drcuml->begin_block(32)); + alloc_handle(m_write_fifo_out1, "write_fifo_out1"); + UML_HANDLE(block, *m_write_fifo_out1); + // TODO + UML_RET(block); + + block.end(); + } } void mb86235_device::static_generate_memory_accessors() { - drcuml_block *block; - code_label label = 1; - - // A-Bus read handler - // I0 = address - // I1 = return data - // I2 = trashed - block = m_drcuml->begin_block(128); - - alloc_handle(m_drcuml.get(), &m_read_abus, "read_abus"); - UML_HANDLE(block, *m_read_abus); - UML_CMP(block, I0, 0x400); - UML_JMPc(block, COND_GE, label); - // internal A-RAM - UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA); - UML_RET(block); - // external - UML_LABEL(block, label++); - UML_AND(block, I0, I0, 0x3fff); - UML_AND(block, I2, mem(&m_core->eb), ~0x3fff); - UML_OR(block, I0, I0, I2); - UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA); - UML_RET(block); - - block->end(); - - // A-Bus write handler - // I0 = address - // I1 = data - // I2 = trashed - block = m_drcuml->begin_block(128); - - alloc_handle(m_drcuml.get(), &m_write_abus, "write_abus"); - UML_HANDLE(block, *m_write_abus); - UML_CMP(block, I0, 0x400); - UML_JMPc(block, COND_GE, label); - // internal A-RAM - UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA); - UML_RET(block); - // external - UML_LABEL(block, label++); - UML_AND(block, I0, I0, 0x3fff); - UML_AND(block, I2, mem(&m_core->eb), ~0x3fff); - UML_OR(block, I0, I0, I2); - UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA); - UML_RET(block); - - block->end(); + uml::code_label label = 1; + + { + // A-Bus read handler + // I0 = address + // I1 = return data + // I2 = trashed + drcuml_block &block(m_drcuml->begin_block(128)); + + alloc_handle(m_read_abus, "read_abus"); + UML_HANDLE(block, *m_read_abus); + UML_CMP(block, I0, 0x400); + UML_JMPc(block, COND_GE, label); + // internal A-RAM + UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA); + UML_RET(block); + // external + UML_LABEL(block, label++); + UML_AND(block, I0, I0, 0x3fff); + UML_AND(block, I2, mem(&m_core->eb), ~0x3fff); + UML_OR(block, I0, I0, I2); + UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA); + UML_RET(block); + + block.end(); + } + { + // A-Bus write handler + // I0 = address + // I1 = data + // I2 = trashed + drcuml_block &block(m_drcuml->begin_block(128)); + + alloc_handle(m_write_abus, "write_abus"); + UML_HANDLE(block, *m_write_abus); + UML_CMP(block, I0, 0x400); + UML_JMPc(block, COND_GE, label); + // internal A-RAM + UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA); + UML_RET(block); + // external + UML_LABEL(block, label++); + UML_AND(block, I0, I0, 0x3fff); + UML_AND(block, I2, mem(&m_core->eb), ~0x3fff); + UML_OR(block, I0, I0, I2); + UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA); + UML_RET(block); + + block.end(); + } } @@ -562,7 +558,7 @@ void mb86235_device::flush_cache() -void mb86235_device::generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +void mb86235_device::generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { /* add an entry for the log */ // if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) @@ -572,10 +568,10 @@ void mb86235_device::generate_sequence_instruction(drcuml_block *block, compiler UML_MAPVAR(block, MAPVAR_PC, desc->pc); // mapvar PC,desc->pc /* accumulate total cycles */ - compiler->cycles += desc->cycles; + compiler.cycles += desc->cycles; /* update the icount map variable */ - UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles + UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles /* if we are debugging, call the debugger */ if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0) @@ -610,21 +606,21 @@ void mb86235_device::generate_sequence_instruction(drcuml_block *block, compiler } } -void mb86235_device::generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception) +void mb86235_device::generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception) { /* account for cycles */ - if (compiler->cycles > 0) + if (compiler.cycles > 0) { UML_SUB(block, mem(&m_core->icount), mem(&m_core->icount), MAPVAR_CYCLES); // sub icount,icount,cycles UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0 if (allow_exception) UML_EXHc(block, COND_S, *m_out_of_cycles, param); // exh out_of_cycles,nextpc } - compiler->cycles = 0; + compiler.cycles = 0; } -void mb86235_device::generate_ea(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int md, int arx, int ary, int disp) +void mb86235_device::generate_ea(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int md, int arx, int ary, int disp) { // Calculates EA into register I0 @@ -660,7 +656,7 @@ void mb86235_device::generate_ea(drcuml_block *block, compiler_state *compiler, -void mb86235_device::generate_reg_read(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter dst) +void mb86235_device::generate_reg_read(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int reg, uml::parameter dst) { switch (reg) { @@ -705,7 +701,7 @@ void mb86235_device::generate_reg_read(drcuml_block *block, compiler_state *comp } -void mb86235_device::generate_reg_write(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter src) +void mb86235_device::generate_reg_write(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int reg, uml::parameter src) { switch (reg) { @@ -818,7 +814,7 @@ bool mb86235_device::aluop_has_result(int aluop) -bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +bool mb86235_device::generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { uint64_t opcode = desc->opptr.q[0]; @@ -856,7 +852,7 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil // insert FIFO IN check if needed if (fifoin_check) { - code_label not_empty = compiler->labelnum++; + uml::code_label const not_empty = compiler.labelnum++; UML_CMP(block, FIFOIN_NUM, 0); UML_JMPc(block, COND_G, not_empty); @@ -869,7 +865,7 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil // insert FIFO OUT0 check if needed if (fifoout0_check) { - code_label not_full = compiler->labelnum++; + uml::code_label const not_full = compiler.labelnum++; UML_CMP(block, FIFOOUT0_NUM, FIFOOUT0_SIZE - 1); UML_JMPc(block, COND_L, not_full); @@ -882,7 +878,7 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil // insert FIFO OUT1 check if needed if (fifoout1_check) { - code_label not_full = compiler->labelnum++; + uml::code_label const not_full = compiler.labelnum++; UML_CMP(block, FIFOOUT1_NUM, FIFOOUT1_SIZE - 1); UML_JMPc(block, COND_L, not_full); @@ -1035,7 +1031,7 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil // handle repeat if (desc->userflags & OP_USERFLAG_REPEATED_OP) { - code_label no_repeat = compiler->labelnum++; + uml::code_label const no_repeat = compiler.labelnum++; UML_SUB(block, RPC, RPC, 1); UML_CMP(block, RPC, 0); UML_JMPc(block, COND_LE, no_repeat); @@ -1054,7 +1050,7 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil -void mb86235_device::generate_alumul_input(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter dst, bool fp, bool mul) +void mb86235_device::generate_alumul_input(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int reg, uml::parameter dst, bool fp, bool mul) { switch (reg) { @@ -1169,7 +1165,7 @@ uml::parameter mb86235_device::get_mul1_input(int reg) -void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int aluop, bool alutemp) +void mb86235_device::generate_alu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int aluop, bool alutemp) { int i1 = (aluop >> 10) & 0xf; int i2 = (aluop >> 5) & 0x1f; @@ -1179,7 +1175,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, switch (op) { case 0x00: // FADD - generate_alumul_input(block, compiler, desc, i2, I0, true, false); + generate_alumul_input(block, compiler, desc, i2, uml::I0, true, false); UML_FSCOPYI(block, F0, I0); UML_FSCOPYI(block, F1, get_alu1_input(i1)); UML_FSADD(block, F0, F0, F1); @@ -1194,7 +1190,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, break; case 0x02: // FSUB - generate_alumul_input(block, compiler, desc, i2, I0, true, false); + generate_alumul_input(block, compiler, desc, i2, uml::I0, true, false); UML_FSCOPYI(block, F0, I0); UML_FSCOPYI(block, F1, get_alu1_input(i1)); UML_FSSUB(block, F0, F0, F1); @@ -1209,7 +1205,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, break; case 0x04: // FCMP - generate_alumul_input(block, compiler, desc, i2, I0, true, false); + generate_alumul_input(block, compiler, desc, i2, uml::I0, true, false); UML_FSCOPYI(block, F0, I0); UML_FSCOPYI(block, F1, get_alu1_input(i1)); UML_FSCMP(block, F0, F1); @@ -1228,7 +1224,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, break; case 0x06: // FABC - generate_alumul_input(block, compiler, desc, i2, I0, true, false); + generate_alumul_input(block, compiler, desc, i2, uml::I0, true, false); UML_AND(block, I0, I0, 0x7fffffff); UML_AND(block, I1, get_alu1_input(i1), 0x7fffffff); UML_FSCOPYI(block, F0, I0); @@ -1244,7 +1240,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, break; case 0x0d: // CIF - generate_alumul_input(block, compiler, desc, i1, I1, true, false); + generate_alumul_input(block, compiler, desc, i1, uml::I1, true, false); UML_FSFRINT(block, F0, I1, SIZE_DWORD); if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) UML_CMP(block, I1, 0); @@ -1255,8 +1251,8 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, case 0x0e: // CFI { - code_label truncate = compiler->labelnum++; - code_label end = compiler->labelnum++; + uml::code_label const truncate = compiler.labelnum++; + uml::code_label const end = compiler.labelnum++; UML_FSCOPYI(block, F0, get_alu1_input(i1)); UML_TEST(block, mem(&m_core->mod), 0x80); UML_JMPc(block, COND_Z, truncate); @@ -1281,7 +1277,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, } case 0x10: // ADD - generate_alumul_input(block, compiler, desc, i2, I1, false, false); + generate_alumul_input(block, compiler, desc, i2, uml::I1, false, false); UML_ADD(block, I0, I1, get_alu1_input(i1)); if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ); if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN); @@ -1295,7 +1291,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, break; case 0x12: // SUB - generate_alumul_input(block, compiler, desc, i2, I1, false, false); + generate_alumul_input(block, compiler, desc, i2, uml::I1, false, false); UML_SUB(block, I0, I1, get_alu1_input(i1)); if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ); if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN); @@ -1309,7 +1305,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, break; case 0x14: // CMP - generate_alumul_input(block, compiler, desc, i2, I1, false, false); + generate_alumul_input(block, compiler, desc, i2, uml::I1, false, false); UML_SUB(block, I0, I1, get_alu1_input(i1)); if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ); if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN); @@ -1327,7 +1323,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, break; case 0x18: // AND - generate_alumul_input(block, compiler, desc, i2, I0, false, false); + generate_alumul_input(block, compiler, desc, i2, uml::I0, false, false); UML_AND(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0, get_alu1_input(i1)); if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN); if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ); @@ -1336,7 +1332,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, break; case 0x19: // OR - generate_alumul_input(block, compiler, desc, i2, I0, false, false); + generate_alumul_input(block, compiler, desc, i2, uml::I0, false, false); UML_OR(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0, get_alu1_input(i1)); if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN); if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ); @@ -1345,7 +1341,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, break; case 0x1a: // XOR - generate_alumul_input(block, compiler, desc, i2, I0, false, false); + generate_alumul_input(block, compiler, desc, i2, uml::I0, false, false); UML_XOR(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0, get_alu1_input(i1)); if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN); if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ); @@ -1354,7 +1350,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, break; case 0x1c: // LSR - generate_alumul_input(block, compiler, desc, i1, I0, false, false); + generate_alumul_input(block, compiler, desc, i1, uml::I0, false, false); UML_SHR(block, I0, I0, i2); if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) UML_CMP(block, I0, 0); @@ -1366,7 +1362,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, break; case 0x1d: // LSL - generate_alumul_input(block, compiler, desc, i1, I0, false, false); + generate_alumul_input(block, compiler, desc, i1, uml::I0, false, false); UML_SHL(block, I0, I0, i2); if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) UML_CMP(block, I0, 0); @@ -1385,7 +1381,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, } } -void mb86235_device::generate_mul(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int mulop, bool multemp) +void mb86235_device::generate_mul(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int mulop, bool multemp) { int i1 = (mulop >> 10) & 0xf; int i2 = (mulop >> 5) & 0x1f; @@ -1395,7 +1391,7 @@ void mb86235_device::generate_mul(drcuml_block *block, compiler_state *compiler, if (m) { // FMUL - generate_alumul_input(block, compiler, desc, i2, I1, true, true); + generate_alumul_input(block, compiler, desc, i2, uml::I1, true, true); UML_FSCOPYI(block, F1, I1); UML_FSCOPYI(block, F0, get_mul1_input(i1)); UML_FSMUL(block, F1, F0, F1); @@ -1411,7 +1407,7 @@ void mb86235_device::generate_mul(drcuml_block *block, compiler_state *compiler, else { // MUL - generate_alumul_input(block, compiler, desc, i2, I1, false, true); + generate_alumul_input(block, compiler, desc, i2, uml::I1, false, true); UML_MULS(block, I0, I0, I1, get_mul1_input(i1)); if (MZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_MZ); if (MN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_MN); @@ -1426,11 +1422,11 @@ void mb86235_device::generate_mul(drcuml_block *block, compiler_state *compiler, } -void mb86235_device::generate_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +void mb86235_device::generate_branch(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { // I0 = target pc for dynamic branches - compiler_state compiler_temp = *compiler; + compiler_state compiler_temp(compiler); // save branch target if (desc->targetpc == BRANCH_TARGET_DYNAMIC) @@ -1439,12 +1435,12 @@ void mb86235_device::generate_branch(drcuml_block *block, compiler_state *compil } // compile delay slots - generate_sequence_instruction(block, &compiler_temp, desc->delay.first()); + generate_sequence_instruction(block, compiler_temp, desc->delay.first()); // update cycles and hash jump if (desc->targetpc != BRANCH_TARGET_DYNAMIC) { - generate_update_cycles(block, &compiler_temp, desc->targetpc, true); + generate_update_cycles(block, compiler_temp, desc->targetpc, true); if (desc->flags & OPFLAG_INTRABLOCK_BRANCH) UML_JMP(block, desc->targetpc | 0x80000000); // jmp targetpc | 0x80000000 else @@ -1452,20 +1448,20 @@ void mb86235_device::generate_branch(drcuml_block *block, compiler_state *compil } else { - generate_update_cycles(block, &compiler_temp, mem(&m_core->jmpdest), true); + generate_update_cycles(block, compiler_temp, uml::mem(&m_core->jmpdest), true); UML_HASHJMP(block, 0, mem(&m_core->jmpdest), *m_nocode); // hashjmp 0,jmpdest,nocode } // update compiler label - compiler->labelnum = compiler_temp.labelnum; + compiler.labelnum = compiler_temp.labelnum; /* reset the mapvar to the current cycles and account for skipped slots */ - compiler->cycles += desc->skipslots; - UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles + compiler.cycles += desc->skipslots; + UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles } -void mb86235_device::generate_branch_target(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int type, int ef2) +void mb86235_device::generate_branch_target(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int type, int ef2) { // Calculates dynamic targets into I0 @@ -1495,7 +1491,7 @@ void mb86235_device::generate_branch_target(drcuml_block *block, compiler_state } -void mb86235_device::generate_condition(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int cc, bool n, uml::code_label skip_label, bool condtemp) +void mb86235_device::generate_condition(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int cc, bool n, uml::code_label skip_label, bool condtemp) { switch (cc) { @@ -1562,7 +1558,7 @@ void mb86235_device::generate_condition(drcuml_block *block, compiler_state *com } -void mb86235_device::generate_control(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +void mb86235_device::generate_control(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { uint64_t op = desc->opptr.q[0]; int ef1 = (op >> 16) & 0x3f; @@ -1597,7 +1593,7 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi case 0x10: // DBcc { - code_label skip_label = compiler->labelnum++; + uml::code_label const skip_label = compiler.labelnum++; generate_branch_target(block, compiler, desc, (op >> 12) & 0xf, ef2); generate_condition(block, compiler, desc, ef1, false, skip_label, true); @@ -1608,7 +1604,7 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi case 0x11: // DBNcc { - code_label skip_label = compiler->labelnum++; + uml::code_label const skip_label = compiler.labelnum++; generate_branch_target(block, compiler, desc, (op >> 12) & 0xf, ef2); generate_condition(block, compiler, desc, ef1, true, skip_label, true); @@ -1627,7 +1623,7 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi case 0x1a: // DCALL { // push PC - code_label no_overflow = compiler->labelnum++; + uml::code_label const no_overflow = compiler.labelnum++; UML_CMP(block, mem(&m_core->pcp), 4); UML_JMPc(block, COND_L, no_overflow); UML_MOV(block, mem(&m_core->pc), desc->pc); @@ -1645,7 +1641,7 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi case 0x1b: // DRET { // pop PC - code_label no_underflow = compiler->labelnum++; + uml::code_label const no_underflow = compiler.labelnum++; UML_CMP(block, mem(&m_core->pcp), 0); UML_JMPc(block, COND_G, no_underflow); UML_MOV(block, mem(&m_core->pc), desc->pc); @@ -1667,7 +1663,7 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi } } -void mb86235_device::generate_xfer1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +void mb86235_device::generate_xfer1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { uint64_t opcode = desc->opptr.q[0]; @@ -1690,7 +1686,7 @@ void mb86235_device::generate_xfer1(drcuml_block *block, compiler_state *compile { if ((sr & 0x40) == 0) { - generate_reg_read(block, compiler, desc, sr & 0x3f, I1); + generate_reg_read(block, compiler, desc, sr & 0x3f, uml::I1); } else { @@ -1707,7 +1703,7 @@ void mb86235_device::generate_xfer1(drcuml_block *block, compiler_state *compile if ((dr & 0x40) == 0) { - generate_reg_write(block, compiler, desc, dr & 0x3f, I1); + generate_reg_write(block, compiler, desc, dr & 0x3f, uml::I1); } else { @@ -1730,14 +1726,14 @@ void mb86235_device::generate_xfer1(drcuml_block *block, compiler_state *compile } } -void mb86235_device::generate_double_xfer1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +void mb86235_device::generate_double_xfer1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { UML_MOV(block, mem(&m_core->pc), desc->pc); UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); UML_CALLC(block, cfunc_unimplemented_double_xfer1, this); } -void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +void mb86235_device::generate_xfer2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { uint64_t opcode = desc->opptr.q[0]; @@ -1765,7 +1761,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile { if ((sr & 0x40) == 0) { - generate_reg_read(block, compiler, desc, sr & 0x3f, I1); + generate_reg_read(block, compiler, desc, sr & 0x3f, uml::I1); } else { @@ -1782,7 +1778,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile if ((dr & 0x40) == 0) { - generate_reg_write(block, compiler, desc, dr & 0x3f, I1); + generate_reg_write(block, compiler, desc, dr & 0x3f, uml::I1); } else { @@ -1803,7 +1799,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile // external transfer if (dir == 0) { - generate_reg_read(block, compiler, desc, dr & 0x3f, I0); + generate_reg_read(block, compiler, desc, dr & 0x3f, uml::I0); UML_ADD(block, I1, mem(&m_core->eb), mem(&m_core->eo)); UML_ADD(block, I1, I1, disp14); UML_WRITE(block, I1, I0, SIZE_DWORD, SPACE_DATA); @@ -1813,7 +1809,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile UML_ADD(block, I1, mem(&m_core->eb), mem(&m_core->eo)); UML_ADD(block, I1, I1, disp14); UML_READ(block, I0, I1, SIZE_DWORD, SPACE_DATA); - generate_reg_write(block, compiler, desc, dr & 0x3f, I0); + generate_reg_write(block, compiler, desc, dr & 0x3f, uml::I0); } // update EO @@ -1826,14 +1822,14 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile } } -void mb86235_device::generate_double_xfer2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +void mb86235_device::generate_double_xfer2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { UML_MOV(block, mem(&m_core->pc), desc->pc); UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); UML_CALLC(block, cfunc_unimplemented_double_xfer2, this); } -void mb86235_device::generate_xfer3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +void mb86235_device::generate_xfer3(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { uint64_t opcode = desc->opptr.q[0]; @@ -1866,7 +1862,7 @@ void mb86235_device::generate_xfer3(drcuml_block *block, compiler_state *compile } -void mb86235_device::generate_pre_control(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +void mb86235_device::generate_pre_control(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { uint64_t op = desc->opptr.q[0]; int ef1 = (op >> 16) & 0x3f; |