summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/cpu/arm7/arm7.h
diff options
context:
space:
mode:
Diffstat (limited to 'src/devices/cpu/arm7/arm7.h')
-rw-r--r--src/devices/cpu/arm7/arm7.h82
1 files changed, 68 insertions, 14 deletions
diff --git a/src/devices/cpu/arm7/arm7.h b/src/devices/cpu/arm7/arm7.h
index 3f7f82fed8a..2fde4b1805a 100644
--- a/src/devices/cpu/arm7/arm7.h
+++ b/src/devices/cpu/arm7/arm7.h
@@ -23,6 +23,8 @@
#pragma once
+#include "arm7dasm.h"
+
#include "cpu/drcfe.h"
#include "cpu/drcuml.h"
#include "cpu/drcumlsh.h"
@@ -31,6 +33,9 @@
#define ARM7_MAX_FASTRAM 4
#define ARM7_MAX_HOTSPOTS 16
+#define MCFG_ARM_HIGH_VECTORS() \
+ arm7_cpu_device::set_high_vectors(*device);
+
/***************************************************************************
COMPILER-SPECIFIC OPTIONS
@@ -46,12 +51,18 @@
* PUBLIC FUNCTIONS
***************************************************************************************************/
-class arm7_cpu_device : public cpu_device
+class arm7_cpu_device : public cpu_device, public arm7_disassembler::config
{
public:
// construction/destruction
arm7_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ static void set_high_vectors(device_t &device)
+ {
+ arm7_cpu_device &dev = downcast<arm7_cpu_device &>(device);
+ dev.m_vectorbase = 0xffff0000;
+ }
+
protected:
enum
{
@@ -121,13 +132,26 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
- virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
+ virtual util::disasm_interface *create_disassembler() override;
+ virtual bool get_t_flag() const override;
address_space_config m_program_config;
uint32_t m_r[/*NUM_REGS*/37];
+
+ void update_insn_prefetch(uint32_t curr_pc);
+ virtual uint16_t insn_fetch_thumb(uint32_t pc);
+ uint32_t insn_fetch_arm(uint32_t pc);
+ int get_insn_prefetch_index(uint32_t address);
+
+ uint32_t m_insn_prefetch_depth;
+ uint32_t m_insn_prefetch_count;
+ uint32_t m_insn_prefetch_index;
+ uint32_t m_insn_prefetch_buffer[3];
+ uint32_t m_insn_prefetch_address[3];
+ const uint32_t m_prefetch_word0_shift;
+ const uint32_t m_prefetch_word1_shift;
+
bool m_pendingIrq;
bool m_pendingFiq;
bool m_pendingAbtD;
@@ -138,7 +162,7 @@ protected:
int m_icount;
endianness_t m_endian;
address_space *m_program;
- direct_read_data *m_direct;
+ direct_read_data<0> *m_direct;
/* Coprocessor Registers */
uint32_t m_control;
@@ -154,6 +178,8 @@ protected:
uint8_t m_archRev; // ARM architecture revision (3, 4, and 5 are valid)
uint8_t m_archFlags; // architecture flags
+ uint32_t m_vectorbase;
+
//#if ARM7_MMU_ENABLE_HACK
// uint32_t mmu_enable_addr; // workaround for "MMU is enabled when PA != VA" problem
//#endif
@@ -201,22 +227,22 @@ protected:
void arm9ops_e(uint32_t insn);
void set_cpsr(uint32_t val);
- bool arm7_tlb_translate(offs_t &addr, int flags);
+ bool arm7_tlb_translate(offs_t &addr, int flags, bool no_exception = false);
uint32_t arm7_tlb_get_second_level_descriptor( uint32_t granularity, uint32_t first_desc, uint32_t vaddr );
int detect_fault(int desc_lvl1, int ap, int flags);
void arm7_check_irq_state();
void update_irq_state();
- void arm7_cpu_write32(uint32_t addr, uint32_t data);
- void arm7_cpu_write16(uint32_t addr, uint16_t data);
- void arm7_cpu_write8(uint32_t addr, uint8_t data);
- uint32_t arm7_cpu_read32(uint32_t addr);
- uint16_t arm7_cpu_read16(uint32_t addr);
- uint8_t arm7_cpu_read8(uint32_t addr);
+ virtual void arm7_cpu_write32(uint32_t addr, uint32_t data);
+ virtual void arm7_cpu_write16(uint32_t addr, uint16_t data);
+ virtual void arm7_cpu_write8(uint32_t addr, uint8_t data);
+ virtual uint32_t arm7_cpu_read32(uint32_t addr);
+ virtual uint16_t arm7_cpu_read16(uint32_t addr);
+ virtual uint8_t arm7_cpu_read8(uint32_t addr);
// Coprocessor support
DECLARE_WRITE32_MEMBER( arm7_do_callback );
- DECLARE_READ32_MEMBER( arm7_rt_r_callback );
- DECLARE_WRITE32_MEMBER( arm7_rt_w_callback );
+ virtual DECLARE_READ32_MEMBER( arm7_rt_r_callback );
+ virtual DECLARE_WRITE32_MEMBER( arm7_rt_w_callback );
void arm7_dt_r_callback(uint32_t insn, uint32_t *prn);
void arm7_dt_w_callback(uint32_t insn, uint32_t *prn);
@@ -588,6 +614,25 @@ class arm946es_cpu_device : public arm9_cpu_device
public:
// construction/destruction
arm946es_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ // 946E-S has Protection Unit instead of ARM MMU so CP15 is quite different
+ virtual DECLARE_READ32_MEMBER( arm7_rt_r_callback ) override;
+ virtual DECLARE_WRITE32_MEMBER( arm7_rt_w_callback ) override;
+
+ virtual void arm7_cpu_write32(uint32_t addr, uint32_t data) override;
+ virtual void arm7_cpu_write16(uint32_t addr, uint16_t data) override;
+ virtual void arm7_cpu_write8(uint32_t addr, uint8_t data) override;
+ virtual uint32_t arm7_cpu_read32(uint32_t addr) override;
+ virtual uint16_t arm7_cpu_read16(uint32_t addr) override;
+ virtual uint8_t arm7_cpu_read8(uint32_t addr) override;
+
+private:
+ uint32_t cp15_control, cp15_itcm_base, cp15_dtcm_base, cp15_itcm_size, cp15_dtcm_size;
+ uint32_t cp15_itcm_end, cp15_dtcm_end, cp15_itcm_reg, cp15_dtcm_reg;
+ uint8_t ITCM[0x8000], DTCM[0x4000];
+
+ void RefreshITCM();
+ void RefreshDTCM();
};
@@ -606,6 +651,14 @@ public:
sa1110_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
+class igs036_cpu_device : public arm9_cpu_device
+{
+public:
+ // construction/destruction
+ igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ virtual DECLARE_WRITE32_MEMBER( arm7_rt_w_callback ) override;
+};
+
DECLARE_DEVICE_TYPE(ARM7, arm7_cpu_device)
DECLARE_DEVICE_TYPE(ARM7_BE, arm7_be_cpu_device)
@@ -615,5 +668,6 @@ DECLARE_DEVICE_TYPE(ARM920T, arm920t_cpu_device)
DECLARE_DEVICE_TYPE(ARM946ES, arm946es_cpu_device)
DECLARE_DEVICE_TYPE(PXA255, pxa255_cpu_device)
DECLARE_DEVICE_TYPE(SA1110, sa1110_cpu_device)
+DECLARE_DEVICE_TYPE(IGS036, igs036_cpu_device)
#endif // MAME_CPU_ARM7_ARM7_H