diff options
Diffstat (limited to 'regtests/jedutil/eqns/PALASM/palce16v8/pal16l8-as-palce16v8.pds')
-rw-r--r-- | regtests/jedutil/eqns/PALASM/palce16v8/pal16l8-as-palce16v8.pds | 119 |
1 files changed, 119 insertions, 0 deletions
diff --git a/regtests/jedutil/eqns/PALASM/palce16v8/pal16l8-as-palce16v8.pds b/regtests/jedutil/eqns/PALASM/palce16v8/pal16l8-as-palce16v8.pds new file mode 100644 index 00000000000..74d858e67f4 --- /dev/null +++ b/regtests/jedutil/eqns/PALASM/palce16v8/pal16l8-as-palce16v8.pds @@ -0,0 +1,119 @@ +;PALASM Design Description + +;---------------------------------- Declaration Segment ------------ +TITLE PAL16L8 Test 1 +PATTERN A +REVISION 1.0 +AUTHOR MAMEDev +COMPANY MAMEDev +DATE 08/25/13 + +CHIP PAL16L8 PALCE16V8 + +SIGNATURE #b1110011001100110011001100110011001100110011001100110011001100110 + +;---------------------------------- PIN Declarations --------------- +PIN 1 I1 COMBINATORIAL ; +PIN 2 I2 COMBINATORIAL ; +PIN 3 I3 COMBINATORIAL ; +PIN 4 I4 COMBINATORIAL ; +PIN 5 I5 COMBINATORIAL ; +PIN 6 I6 COMBINATORIAL ; +PIN 7 I7 COMBINATORIAL ; +PIN 8 I8 COMBINATORIAL ; +PIN 9 I9 COMBINATORIAL ; +PIN 10 GND ; +PIN 11 I11 COMBINATORIAL ; +PIN 12 O12 COMBINATORIAL ; +PIN 13 O13 COMBINATORIAL ; +PIN 14 O14 COMBINATORIAL ; +PIN 15 O15 COMBINATORIAL ; +PIN 16 O16 COMBINATORIAL ; +PIN 17 O17 COMBINATORIAL ; +PIN 18 O18 COMBINATORIAL ; +PIN 19 O19 COMBINATORIAL ; +PIN 20 VCC ; + +;----------------------------------- Boolean Equation Segment ------ +EQUATIONS + +MINIMIZE_OFF + +O12 = I1 * /I2 + + /I1 * I3 + + /I3 * I7 + + I4 * O13 + + I6 * /O13 + + I6 * /I7 + + /I6 * /I8 * /I9 +O12.TRST = /I5 + +/O13 = I3 + + O14 + + /I11 + + I2 + + /I4 * /O14 + + I8 * I9 + + I5 +O13.TRST = VCC + +/O14 = I4 + + /I8 * I11 + + O15 + + /I2 + + I5 * /I11 + + I7 + + /I3 * /I9 +O14.TRST = I1 + +/O15 = I5 + + /O16 + + I1 * I7 + + /I3 + + /I3 * O16 + + I2 * I9 + + /I8 +O15.TRST = VCC + +/O16 = I6 + + I3 * I11 + + I6 * O17 + + /I1 + + /O17 + + /I7 * /I8 + + /I2 * /I9 +O16.TRST = /I11 + +/O17 = I7 + + I2 * O18 + + I3 * I4 + + /I5 + + /I9 + + /O18 + + /I1 * /I11 +O17.TRST = VCC + +O18 = I3 + + I8 + + I9 * I11 + + I1 + + /I4 + + I2 + + I5 * /I7 +O18.TRST = VCC + +O19 = O18 + + O17 + + O16 + + O15 + + O14 + + O13 + + /O13 * /O14 * /O15 * /O16 * /O17 * /O18 +O19.TRST = I3 + +MINIMIZE_ON + +;----------------------------------- Simulation Segment ------------ +SIMULATION + +;------------------------------------------------------------------- |