diff options
Diffstat (limited to 'nl_examples')
-rw-r--r-- | nl_examples/2N6027.cpp | 101 | ||||
-rw-r--r-- | nl_examples/cmos_inverter.cpp | 42 | ||||
-rw-r--r-- | nl_examples/cmos_inverter_clk.cpp | 63 | ||||
-rw-r--r-- | nl_examples/nmos_fet.cpp | 54 |
4 files changed, 260 insertions, 0 deletions
diff --git a/nl_examples/2N6027.cpp b/nl_examples/2N6027.cpp new file mode 100644 index 00000000000..8b414317087 --- /dev/null +++ b/nl_examples/2N6027.cpp @@ -0,0 +1,101 @@ +// license:GPL-2.0+ +// copyright-holders:Couriersud + +#include "netlist/devices/net_lib.h" + +/* + * Run with + * ./nltool -t 1 -f nl_examples/2N6027.cpp -l PUT.A -l PUT.K -l PUT.G -v + */ + +/* ---------------------------------------------------------------------------- + * Library section header START + * ---------------------------------------------------------------------------*/ + +#ifndef __PLIB_PREPROCESSOR__ + +#define PUT_2N6027(_name) \ + NET_REGISTER_DEV(G501534_DIP, _name) + +//NETLIST_EXTERNAL(ex2N6027) +NETLIST_EXTERNAL(loc_lib) + +#endif + +/* ---------------------------------------------------------------------------- + * Library section header END + * ---------------------------------------------------------------------------*/ + +NETLIST_START(ex2N6027) + + /* This is a circuit pushing the solvers to the limits + * 50,000 maximum NR loops. + */ + SOLVER(Solver, 48000) + PARAM(Solver.ACCURACY, 1e-5) + PARAM(Solver.DYNAMIC_TS, 1) + PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 1e-9) + PARAM(Solver.NR_LOOPS, 50000) + PARAM(Solver.METHOD, "MAT_CR") + + LOCAL_SOURCE(loc_lib) + INCLUDE(loc_lib) + + ANALOG_INPUT(VB, 10) + + PUT_2N6027(PUT) + + // Figure 3 from datasheet + RES(R1, RES_K(510)) + RES(R2, RES_K(16)) + RES(R3, RES_K(27)) + RES(R4, 20) + CAP(C, CAP_U(0.1)) + + NET_C(VB, R1.1, R2.1) + NET_C(R1.2, C.1, PUT.A) + NET_C(PUT.K, R4.1) + NET_C(PUT.G, R2.2, R3.1) + + NET_C(GND, C.2, R4.2, R3.2) + +NETLIST_END() + + +NETLIST_START(PUT_2N6027) + + NET_MODEL("2N6027_NPN NPN(IS=5E-15 VAF=100 IKF=0.3 ISE=1.85E-12 NE=1.45 RE=0.15 RC=0.15 CJE=7E-10 TF=0.6E-8 CJC=2.2E-10 TR=4.76E-8 XTB=3)") + NET_MODEL("2N6027_PNP PNP(IS=2E-15 VAF=100 IKF=0.3 ISE=1.90E-12 NE=1.5 RE=0.15 RC=0.15 CJE=7E-10 TF=1.6E-8 CJC=2.2E-10 TR=5.1E-8 XTB=3)") + + QBJT_EB(Q1, "2N6027_NPN") + QBJT_EB(Q2, "2N6027_PNP") + + /* The netlist transistor model currently doesn't support + * BE and BC capacitances. + * Adding those here significantly reduces NR loops. + * FIXME: Needs to be removed when added to the + * transistor EB model. + */ +#if 0 + CAP(CJE1, CAP_N(1)) + CAP(CJE2, CAP_N(1)) + + NET_C(CJE1.1, Q1.B) + NET_C(CJE1.2, Q1.E) + NET_C(CJE2.1, Q2.B) + NET_C(CJE2.2, Q2.E) +#endif + NET_C(Q1.C, Q2.B) + NET_C(Q1.B, Q2.C) + + ALIAS(G, Q2.B) + ALIAS(A, Q2.E) + ALIAS(K, Q1.E) + +NETLIST_END() + +NETLIST_START(loc_lib) + + LOCAL_LIB_ENTRY(PUT_2N6027) + +NETLIST_END() diff --git a/nl_examples/cmos_inverter.cpp b/nl_examples/cmos_inverter.cpp new file mode 100644 index 00000000000..e0936bfd3bc --- /dev/null +++ b/nl_examples/cmos_inverter.cpp @@ -0,0 +1,42 @@ +// license:GPL-2.0+ +// copyright-holders:Couriersud +/* + * bjt.c + * + */ + + +#include "netlist/devices/net_lib.h" +#include "netlist/analog/nld_twoterm.h" + +NETLIST_START(cmos_inverter) + /* Standard stuff */ + + SOLVER(Solver, 48000) + PARAM(Solver.ACCURACY, 1e-7) + PARAM(Solver.NR_LOOPS, 5000) + PARAM(Solver.METHOD, "MAT_CR") + ANALOG_INPUT(V5, 5) + + VS(IN, 5) + PARAM(IN.FUNC, "T 5 *") + + MOSFET(P, "PMOS(VTO=-1.0 KP=2e-3 LAMBDA=2E-2)") + MOSFET(M, "NMOS(VTO=1.0 KP=2e-3 LAMBDA=2E-2)") + + NET_C(P.S, V5) + NET_C(P.D, M.D) + NET_C(GND, M.S, IN.N) + + NET_C(IN.P, M.G, P.G) + + // capacitance over D - S +#if 0 + CAP(C, CAP_N(1)) + NET_C(M.D, C.1) + NET_C(M.S, C.2) +#endif + LOG(log_G, M.G) + LOG(log_D, M.D) + +NETLIST_END() diff --git a/nl_examples/cmos_inverter_clk.cpp b/nl_examples/cmos_inverter_clk.cpp new file mode 100644 index 00000000000..e869a478a6c --- /dev/null +++ b/nl_examples/cmos_inverter_clk.cpp @@ -0,0 +1,63 @@ +// license:GPL-2.0+ +// copyright-holders:Couriersud +/* + * cmos_inverter_clk + * + */ + + +#include "netlist/devices/net_lib.h" +#include "netlist/analog/nld_twoterm.h" + +#define USE_CLOCK (1) + +NETLIST_START(cmos_inverter_clk) + /* Standard stuff */ + + //SOLVER(Solver, 480000) + SOLVER(Solver, 1e5) + //SOLVER(Solver, 100000000000) + PARAM(Solver.ACCURACY, 1e-7 ) + PARAM(Solver.NR_LOOPS, 500000) + PARAM(Solver.DYNAMIC_TS, 1) + PARAM(Solver.DYNAMIC_LTE, 1e-5) + PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-8) + ANALOG_INPUT(V5, 5) + +// CLOCK(clk, 0.5e6) + +#if (USE_CLOCK) + CLOCK(V, 5000) + //CLOCK(V, 500000) +#else + VS(V, 5) + PARAM(V.FUNC, "T 5e6 *") +#endif + + MOSFET(P, "PMOS(VTO=-0.5 GAMMA=0.5 TOX=20n)") + MOSFET(M, "NMOS(VTO=0.5 GAMMA=0.5 TOX=20n)") + RES(RG, 1) + + NET_C(P.S, V5) + NET_C(P.D, M.D) +#if (USE_CLOCK) + NET_C(GND, M.S) + NET_C(V.Q, RG.1) +#else + NET_C(GND, M.S, V.N) + NET_C(V.P, RG.1) +#endif + NET_C(RG.2, M.G, P.G) + + // capacitance over D - S +#if 0 + CAP(C, CAP_N(1)) + NET_C(M.D, C.1) + NET_C(M.S, C.2) +#endif +#if 0 + LOG(log_G, M.G) + LOG(log_D, M.D) + LOGD(log_X, RG.1, RG.2) +#endif +NETLIST_END() diff --git a/nl_examples/nmos_fet.cpp b/nl_examples/nmos_fet.cpp new file mode 100644 index 00000000000..8a096af59ac --- /dev/null +++ b/nl_examples/nmos_fet.cpp @@ -0,0 +1,54 @@ +// license:GPL-2.0+ +// copyright-holders:Couriersud +/* + * bjt.c + * + */ + + +#include "netlist/devices/net_lib.h" +#include "netlist/analog/nld_twoterm.h" + +NETLIST_START(nmos) + /* Standard stuff */ + + CLOCK(clk, 100) // 100 Hz + SOLVER(Solver, 48000) + PARAM(Solver.ACCURACY, 1e-9) + PARAM(Solver.NR_LOOPS, 50000) + PARAM(Solver.DYNAMIC_TS, 1) + PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 1e-9) + ANALOG_INPUT(V5, 5) + ANALOG_INPUT(V3, 3.5) + + /* NMOS - example */ + + NET_MODEL("MM NMOS(VTO=1.0 KP=2e-3 LAMBDA=2E-2)") + MOSFET(M, "MM") + + RES(RB, 1000) + RES(RC, 10000) + + NET_C(RC.1, V5) + NET_C(RC.2, M.D) + NET_C(RB.1, clk) + //NET_C(RB.1, V3) + NET_C(RB.2, M.G) + NET_C(M.S, GND) + + // put some load on M.D + + RES(RCE, 150000) + NET_C(RCE.1, M.D) + NET_C(RCE.2, GND) + + // capacitance over G - S + + CAP(C, CAP_N(1)) + NET_C(M.D, C.1) + NET_C(M.S, C.2) + + LOG(log_G, M.G) + LOG(log_D, M.D) + +NETLIST_END() |