diff options
-rw-r--r-- | scripts/src/cpu.lua | 1 | ||||
-rw-r--r-- | src/devices/cpu/nec/nec.cpp | 20 | ||||
-rw-r--r-- | src/devices/cpu/nec/nec.h | 252 | ||||
-rw-r--r-- | src/devices/cpu/nec/nec80inst.hxx | 260 | ||||
-rw-r--r-- | src/devices/cpu/nec/necdasm.cpp | 282 | ||||
-rw-r--r-- | src/devices/cpu/nec/necdasm.h | 10 | ||||
-rw-r--r-- | src/devices/cpu/nec/necinstr.h | 260 | ||||
-rw-r--r-- | src/devices/cpu/nec/necinstr.hxx | 2 | ||||
-rw-r--r-- | src/devices/cpu/nec/necmacro.h | 16 | ||||
-rw-r--r-- | src/devices/cpu/nec/necpriv.h | 6 | ||||
-rw-r--r-- | src/devices/cpu/nec/v25.cpp | 2 | ||||
-rw-r--r-- | src/devices/cpu/nec/v25.h | 4 | ||||
-rw-r--r-- | src/devices/cpu/nec/v25priv.h | 1 | ||||
-rw-r--r-- | src/devices/cpu/v30mz/v30mz.cpp | 2 | ||||
-rw-r--r-- | src/devices/cpu/v30mz/v30mz.h | 4 | ||||
-rw-r--r-- | src/tools/unidasm.cpp | 10 |
16 files changed, 1119 insertions, 13 deletions
diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index 3f32cc9b193..ac904576e65 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -1835,6 +1835,7 @@ if (CPUS["NEC"]~=null) then MAME_DIR .. "src/devices/cpu/nec/necea.h", MAME_DIR .. "src/devices/cpu/nec/necinstr.h", MAME_DIR .. "src/devices/cpu/nec/necinstr.hxx", + MAME_DIR .. "src/devices/cpu/nec/nec80inst.hxx", MAME_DIR .. "src/devices/cpu/nec/necmacro.h", MAME_DIR .. "src/devices/cpu/nec/necmodrm.h", MAME_DIR .. "src/devices/cpu/nec/necpriv.h", diff --git a/src/devices/cpu/nec/nec.cpp b/src/devices/cpu/nec/nec.cpp index 19a2e6c54e9..e72b5fa4603 100644 --- a/src/devices/cpu/nec/nec.cpp +++ b/src/devices/cpu/nec/nec.cpp @@ -207,7 +207,7 @@ bool v33_base_device::memory_translate(int spacenum, int intention, offs_t &addr std::unique_ptr<util::disasm_interface> nec_common_device::create_disassembler() { - return std::make_unique<nec_disassembler>(); + return std::make_unique<nec_disassembler>(this); } @@ -288,7 +288,8 @@ void nec_common_device::device_reset() m_TF = 0; m_IF = 0; m_DF = 0; - m_MF = 1; // brkem should set to 0 when implemented + m_MF = 1; + m_em = 1; m_SignVal = 0; m_AuxVal = 0; m_OverVal = 0; @@ -319,6 +320,7 @@ void nec_common_device::nec_interrupt(unsigned int_num, int/*INTSOURCES*/ source i_pushf(); m_TF = m_IF = 0; + m_MF = 1; if (source == INT_IRQ) /* get vector */ int_num = (standard_irq_callback)(0); @@ -341,6 +343,14 @@ void nec_common_device::nec_trap() void nec_common_device::nec_brk(unsigned int_num) { + if (m_chip_type != V33_TYPE) + { + m_em = 0; + m_MF = 0; + i_pushf(); + PUSH(Sreg(PS)); + PUSH(m_ip); + } m_ip = read_mem_word(int_num*4); Sreg(PS) = read_mem_word(int_num*4+2); CHANGE_PC; @@ -368,6 +378,7 @@ void nec_common_device::external_int() /****************************************************************************/ #include "necinstr.hxx" +#include "nec80inst.hxx" /*****************************************************************************/ @@ -625,7 +636,10 @@ void nec_common_device::execute_run() debugger_instruction_hook((Sreg(PS)<<4) + m_ip); prev_ICount = m_icount; - (this->*s_nec_instruction[fetchop()])(); + if (m_MF) + (this->*s_nec_instruction[fetchop()])(); + else + (this->*s_nec80_instruction[fetchop()])(); do_prefetch(prev_ICount); } } diff --git a/src/devices/cpu/nec/nec.h b/src/devices/cpu/nec/nec.h index 9d7d9a2a97b..1e3a0dbc22f 100644 --- a/src/devices/cpu/nec/nec.h +++ b/src/devices/cpu/nec/nec.h @@ -6,6 +6,7 @@ #pragma once +#include "necdasm.h" #define NEC_INPUT_LINE_POLL 20 @@ -19,7 +20,7 @@ enum }; -class nec_common_device : public cpu_device +class nec_common_device : public cpu_device, public nec_disassembler::config { friend class device_v5x_interface; @@ -50,6 +51,7 @@ protected: // device_disasm_interface overrides virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; + virtual int get_mode() const override { return m_MF; }; virtual u8 io_read_byte(offs_t a) { return m_io->read_byte(a); } virtual u16 io_read_word(offs_t a) { return m_io->read_word_unaligned(a); } @@ -115,10 +117,12 @@ private: uint16_t m_E16; uint32_t m_debugger_temp; + uint8_t m_em; typedef void (nec_common_device::*nec_ophandler)(); typedef uint32_t (nec_common_device::*nec_eahandler)(); static const nec_ophandler s_nec_instruction[256]; + static const nec_ophandler s_nec80_instruction[256]; static const nec_eahandler s_GetEA[192]; protected: @@ -410,6 +414,252 @@ private: uint32_t EA_205(); uint32_t EA_206(); uint32_t EA_207(); + + void i_nop_80(); + void i_lxib_80(); + void i_staxb_80(); + void i_inxb_80(); + void i_inrb_80(); + void i_dcrb_80(); + void i_mvib_80(); + void i_rlc_80(); + void i_dadb_80(); + void i_ldaxb_80(); + void i_dcxb_80(); + void i_inrc_80(); + void i_dcrc_80(); + void i_mvic_80(); + void i_rrc_80(); + void i_lxid_80(); + void i_staxd_80(); + void i_inxd_80(); + void i_inrd_80(); + void i_dcrd_80(); + void i_mvid_80(); + void i_ral_80(); + void i_dadd_80(); + void i_ldaxd_80(); + void i_dcxd_80(); + void i_inre_80(); + void i_dcre_80(); + void i_mvie_80(); + void i_rar_80(); + void i_lxih_80(); + void i_shld_80(); + void i_inxh_80(); + void i_inrh_80(); + void i_dcrh_80(); + void i_mvih_80(); + void i_daa_80(); + void i_dadh_80(); + void i_lhld_80(); + void i_dcxh_80(); + void i_inrl_80(); + void i_dcrl_80(); + void i_mvil_80(); + void i_cma_80(); + void i_lxis_80(); + void i_sta_80(); + void i_inxs_80(); + void i_inrm_80(); + void i_dcrm_80(); + void i_mvim_80(); + void i_stc_80(); + void i_dads_80(); + void i_lda_80(); + void i_dcxs_80(); + void i_inra_80(); + void i_dcra_80(); + void i_mvia_80(); + void i_cmc_80(); + void i_movbb_80(); + void i_movbc_80(); + void i_movbd_80(); + void i_movbe_80(); + void i_movbh_80(); + void i_movbl_80(); + void i_movbm_80(); + void i_movba_80(); + void i_movcb_80(); + void i_movcc_80(); + void i_movcd_80(); + void i_movce_80(); + void i_movch_80(); + void i_movcl_80(); + void i_movcm_80(); + void i_movca_80(); + void i_movdb_80(); + void i_movdc_80(); + void i_movdd_80(); + void i_movde_80(); + void i_movdh_80(); + void i_movdl_80(); + void i_movdm_80(); + void i_movda_80(); + void i_moveb_80(); + void i_movec_80(); + void i_moved_80(); + void i_movee_80(); + void i_moveh_80(); + void i_movel_80(); + void i_movem_80(); + void i_movea_80(); + void i_movhb_80(); + void i_movhc_80(); + void i_movhd_80(); + void i_movhe_80(); + void i_movhh_80(); + void i_movhl_80(); + void i_movhm_80(); + void i_movha_80(); + void i_movlb_80(); + void i_movlc_80(); + void i_movld_80(); + void i_movle_80(); + void i_movlh_80(); + void i_movll_80(); + void i_movlm_80(); + void i_movla_80(); + void i_movmb_80(); + void i_movmc_80(); + void i_movmd_80(); + void i_movme_80(); + void i_movmh_80(); + void i_movml_80(); + void i_hlt_80(); + void i_movma_80(); + void i_movab_80(); + void i_movac_80(); + void i_movad_80(); + void i_movae_80(); + void i_movah_80(); + void i_moval_80(); + void i_movam_80(); + void i_movaa_80(); + void i_addb_80(); + void i_addc_80(); + void i_addd_80(); + void i_adde_80(); + void i_addh_80(); + void i_addl_80(); + void i_addm_80(); + void i_adda_80(); + void i_adcb_80(); + void i_adcc_80(); + void i_adcd_80(); + void i_adce_80(); + void i_adch_80(); + void i_adcl_80(); + void i_adcm_80(); + void i_adca_80(); + void i_subb_80(); + void i_subc_80(); + void i_subd_80(); + void i_sube_80(); + void i_subh_80(); + void i_subl_80(); + void i_subm_80(); + void i_suba_80(); + void i_sbbb_80(); + void i_sbbc_80(); + void i_sbbd_80(); + void i_sbbe_80(); + void i_sbbh_80(); + void i_sbbl_80(); + void i_sbbm_80(); + void i_sbba_80(); + void i_anab_80(); + void i_anac_80(); + void i_anad_80(); + void i_anae_80(); + void i_anah_80(); + void i_anal_80(); + void i_anam_80(); + void i_anaa_80(); + void i_xrab_80(); + void i_xrac_80(); + void i_xrad_80(); + void i_xrae_80(); + void i_xrah_80(); + void i_xral_80(); + void i_xram_80(); + void i_xraa_80(); + void i_orab_80(); + void i_orac_80(); + void i_orad_80(); + void i_orae_80(); + void i_orah_80(); + void i_oral_80(); + void i_oram_80(); + void i_oraa_80(); + void i_cmpb_80(); + void i_cmpc_80(); + void i_cmpd_80(); + void i_cmpe_80(); + void i_cmph_80(); + void i_cmpl_80(); + void i_cmpm_80(); + void i_cmpa_80(); + void i_rnz_80(); + void i_popb_80(); + void i_jnz_80(); + void i_jmp_80(); + void i_cnz_80(); + void i_pushb_80(); + void i_adi_80(); + void i_rst0_80(); + void i_rz_80(); + void i_ret_80(); + void i_jz_80(); + void i_cz_80(); + void i_call_80(); + void i_aci_80(); + void i_rst1_80(); + void i_rnc_80(); + void i_popd_80(); + void i_jnc_80(); + void i_out_80(); + void i_cnc_80(); + void i_pushd_80(); + void i_sui_80(); + void i_rst2_80(); + void i_rc_80(); + void i_jc_80(); + void i_in_80(); + void i_cc_80(); + void i_sbi_80(); + void i_rst3_80(); + void i_rpo_80(); + void i_poph_80(); + void i_jpo_80(); + void i_xthl_80(); + void i_cpo_80(); + void i_pushh_80(); + void i_ani_80(); + void i_rst4_80(); + void i_rpe_80(); + void i_pchl_80(); + void i_jpe_80(); + void i_xchg_80(); + void i_cpe_80(); + void i_calln_80(); + void i_xri_80(); + void i_rst5_80(); + void i_rp_80(); + void i_popf_80(); + void i_jp_80(); + void i_di_80(); + void i_cp_80(); + void i_pushf_80(); + void i_ori_80(); + void i_rst6_80(); + void i_rm_80(); + void i_sphl_80(); + void i_jm_80(); + void i_ei_80(); + void i_cm_80(); + void i_cpi_80(); + void i_rst7_80(); }; diff --git a/src/devices/cpu/nec/nec80inst.hxx b/src/devices/cpu/nec/nec80inst.hxx new file mode 100644 index 00000000000..c4d2eef22b9 --- /dev/null +++ b/src/devices/cpu/nec/nec80inst.hxx @@ -0,0 +1,260 @@ +// license:BSD-3-Clause +// copyright-holders:Bryan McPhail + +// 8080 mode ops, all timings unknown +#define OP80(num,func_name) void nec_common_device::func_name##_80() + +OP80( 0x00, i_nop ) { CLK(1); } // 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38 +OP80( 0x01, i_lxib ) { Wreg(CW) = fetchword(); CLK(1); } +OP80( 0x02, i_staxb ) { PutMemB(DS0, Wreg(CW), Breg(AL)); CLK(1); } +OP80( 0x03, i_inxb ) { Wreg(CW)++; CLK(1); } +OP80( 0x04, i_inrb ) { IncByteReg(CH); CLK(1); } +OP80( 0x05, i_dcrb ) { DecByteReg(CH); CLK(1); } +OP80( 0x06, i_mvib ) { Breg(CH) = fetch(); CLK(1); } +OP80( 0x07, i_rlc ) { uint32_t dst = Breg(AL); ROL_BYTE; Breg(AL) = dst; CLK(1); } +OP80( 0x09, i_dadb ) { uint32_t dst = Wreg(BW) + Wreg(CW); SetCFW(dst); Wreg(BW) = dst; CLK(1); } +OP80( 0x0a, i_ldaxb ) { Breg(AL) = GetMemB(DS0, Wreg(CW)); CLK(1); } +OP80( 0x0b, i_dcxb ) { Wreg(CW)--; CLK(1); } +OP80( 0x0c, i_inrc ) { IncByteReg(CL); CLK(1); } +OP80( 0x0d, i_dcrc ) { DecByteReg(CL); CLK(1); } +OP80( 0x0e, i_mvic ) { Breg(CL) = fetch(); CLK(1); } +OP80( 0x0f, i_rrc ) { uint32_t dst = Breg(AL); ROR_BYTE; Breg(AL) = dst; CLK(1); } +OP80( 0x11, i_lxid ) { Wreg(DW) = fetchword(); CLK(1); } +OP80( 0x12, i_staxd ) { PutMemB(DS0, Wreg(DW), Breg(AL)); CLK(1); } +OP80( 0x13, i_inxd ) { Wreg(DW)++; CLK(1); } +OP80( 0x14, i_inrd ) { IncByteReg(DH); CLK(1); } +OP80( 0x15, i_dcrd ) { DecByteReg(DH); CLK(1); } +OP80( 0x16, i_mvid ) { Breg(DH) = fetch(); CLK(1); } +OP80( 0x17, i_ral ) { uint32_t dst = Breg(AL); ROLC_BYTE; Breg(AL) = dst; CLK(1); } +OP80( 0x19, i_dadd ) { uint32_t dst = Wreg(BW) + Wreg(DW); SetCFW(dst); Wreg(BW) = dst; CLK(1); } +OP80( 0x1a, i_ldaxd ) { Breg(AL) = GetMemB(DS0, Wreg(DW)); CLK(1); } +OP80( 0x1b, i_dcxd ) { Wreg(DW)--; CLK(1); } +OP80( 0x1c, i_inre ) { IncByteReg(DL); CLK(1); } +OP80( 0x1d, i_dcre ) { DecByteReg(DL); CLK(1); } +OP80( 0x1e, i_mvie ) { Breg(DL) = fetch(); CLK(1); } +OP80( 0x1f, i_rar ) { uint32_t dst = Breg(AL); RORC_BYTE; Breg(AL) = dst; CLK(1); } +OP80( 0x21, i_lxih ) { Wreg(BW) = fetchword(); CLK(1); } +OP80( 0x22, i_shld ) { PutMemW(DS0, fetchword(), Wreg(BW)); CLK(1); } +OP80( 0x23, i_inxh ) { Wreg(BW)++; CLK(1); } +OP80( 0x24, i_inrh ) { IncByteReg(BH); CLK(1); } +OP80( 0x25, i_dcrh ) { DecByteReg(BH); CLK(1); } +OP80( 0x26, i_mvih ) { Breg(BH) = fetch(); CLK(1); } +OP80( 0x27, i_daa ) { ADJ4(6, 0x60); CLK(1); } +OP80( 0x29, i_dadh ) { uint32_t dst = Wreg(BW) + Wreg(BW); SetCFW(dst); Wreg(BW) = dst; CLK(1); } +OP80( 0x2a, i_lhld ) { Wreg(BW) = GetMemW(DS0, fetchword()); CLK(1); } +OP80( 0x2b, i_dcxh ) { Wreg(BW)--; CLK(1); } +OP80( 0x2c, i_inrl ) { IncByteReg(BL); CLK(1); } +OP80( 0x2d, i_dcrl ) { DecByteReg(BL); CLK(1); } +OP80( 0x2e, i_mvil ) { Breg(BL) = fetch(); CLK(1); } +OP80( 0x2f, i_cma ) { Breg(AL) = ~Breg(AL); CLK(1); } +OP80( 0x31, i_lxis ) { Wreg(BP) = fetchword(); CLK(1); } +OP80( 0x32, i_sta ) { PutMemB(DS0, fetchword(), Breg(AL)); CLK(1); } +OP80( 0x33, i_inxs ) { Wreg(BP)++; CLK(1); } +OP80( 0x34, i_inrm ) { uint32_t tmp = GetMemB(DS0, Wreg(BW)); uint32_t tmp1 = tmp+1; m_OverVal = (tmp==0x7f); SetAF(tmp1,tmp,1); SetSZPF_Byte(tmp1); PutMemB(DS0, Wreg(BW), (BYTE)tmp1); CLK(1); } +OP80( 0x35, i_dcrm ) { uint32_t tmp = GetMemB(DS0, Wreg(BW)); uint32_t tmp1 = tmp-1; m_OverVal = (tmp==0x80); SetAF(tmp1,tmp,1); SetSZPF_Byte(tmp1); PutMemB(DS0, Wreg(BW), (BYTE)tmp1); CLK(1); } +OP80( 0x36, i_mvim ) { PutMemB(DS0, Wreg(BW), fetch()); CLK(1); } +OP80( 0x37, i_stc ) { m_CarryVal = 1; CLK(1); } +OP80( 0x39, i_dads ) { uint32_t dst = Wreg(BW) + Wreg(BP); SetCFW(dst); Wreg(BW) = dst; CLK(1); } +OP80( 0x3a, i_lda ) { Breg(AL) = GetMemB(DS0, fetchword()); CLK(1); } +OP80( 0x3b, i_dcxs ) { Wreg(BP)--; CLK(1); } +OP80( 0x3c, i_inra ) { IncByteReg(AL); CLK(1); } +OP80( 0x3d, i_dcra ) { DecByteReg(AL); CLK(1); } +OP80( 0x3e, i_mvia ) { Breg(AL) = fetch(); CLK(1); } +OP80( 0x3f, i_cmc ) { m_CarryVal = !m_CarryVal; CLK(1); } +OP80( 0x40, i_movbb ) { CLK(1); } +OP80( 0x41, i_movbc ) { Breg(CH) = Breg(CL); CLK(1); } +OP80( 0x42, i_movbd ) { Breg(CH) = Breg(DH); CLK(1); } +OP80( 0x43, i_movbe ) { Breg(CH) = Breg(DL); CLK(1); } +OP80( 0x44, i_movbh ) { Breg(CH) = Breg(BH); CLK(1); } +OP80( 0x45, i_movbl ) { Breg(CH) = Breg(BL); CLK(1); } +OP80( 0x46, i_movbm ) { Breg(CH) = GetMemB(DS0, Wreg(BW)); CLK(1); } +OP80( 0x47, i_movba ) { Breg(CH) = Breg(AL); CLK(1); } +OP80( 0x48, i_movcb ) { Breg(CL) = Breg(CH); CLK(1); } +OP80( 0x49, i_movcc ) { CLK(1); } +OP80( 0x4a, i_movcd ) { Breg(CL) = Breg(DH); CLK(1); } +OP80( 0x4b, i_movce ) { Breg(CL) = Breg(DL); CLK(1); } +OP80( 0x4c, i_movch ) { Breg(CL) = Breg(BH); CLK(1); } +OP80( 0x4d, i_movcl ) { Breg(CL) = Breg(BL); CLK(1); } +OP80( 0x4e, i_movcm ) { Breg(CL) = GetMemB(DS0, Wreg(BW)); CLK(1); } +OP80( 0x4f, i_movca ) { Breg(CL) = Breg(AL); CLK(1); } +OP80( 0x50, i_movdb ) { Breg(DH) = Breg(CH); CLK(1); } +OP80( 0x51, i_movdc ) { Breg(DH) = Breg(CL); CLK(1); } +OP80( 0x52, i_movdd ) { CLK(1); } +OP80( 0x53, i_movde ) { Breg(DH) = Breg(DL); CLK(1); } +OP80( 0x54, i_movdh ) { Breg(DH) = Breg(BH); CLK(1); } +OP80( 0x55, i_movdl ) { Breg(DH) = Breg(BL); CLK(1); } +OP80( 0x56, i_movdm ) { Breg(DH) = GetMemB(DS0, Wreg(BW)); CLK(1); } +OP80( 0x57, i_movda ) { Breg(DH) = Breg(AL); CLK(1); } +OP80( 0x58, i_moveb ) { Breg(DL) = Breg(CH); CLK(1); } +OP80( 0x59, i_movec ) { Breg(DL) = Breg(CL); CLK(1); } +OP80( 0x5a, i_moved ) { Breg(DL) = Breg(DH); CLK(1); } +OP80( 0x5b, i_movee ) { CLK(1); } +OP80( 0x5c, i_moveh ) { Breg(DL) = Breg(BH); CLK(1); } +OP80( 0x5d, i_movel ) { Breg(DL) = Breg(BL); CLK(1); } +OP80( 0x5e, i_movem ) { Breg(DL) = GetMemB(DS0, Wreg(BW)); CLK(1); } +OP80( 0x5f, i_movea ) { Breg(DL) = Breg(AL); CLK(1); } +OP80( 0x60, i_movhb ) { Breg(BH) = Breg(CH); CLK(1); } +OP80( 0x61, i_movhc ) { Breg(BH) = Breg(CL); CLK(1); } +OP80( 0x62, i_movhd ) { Breg(BH) = Breg(DH); CLK(1); } +OP80( 0x63, i_movhe ) { Breg(BH) = Breg(DL); CLK(1); } +OP80( 0x64, i_movhh ) { CLK(1); } +OP80( 0x65, i_movhl ) { Breg(BH) = Breg(BL); CLK(1); } +OP80( 0x66, i_movhm ) { Breg(BH) = GetMemB(DS0, Wreg(BW)); CLK(1); } +OP80( 0x67, i_movha ) { Breg(BH) = Breg(AL); CLK(1); } +OP80( 0x68, i_movlb ) { Breg(BL) = Breg(CH); CLK(1); } +OP80( 0x69, i_movlc ) { Breg(BL) = Breg(CL); CLK(1); } +OP80( 0x6a, i_movld ) { Breg(BL) = Breg(DH); CLK(1); } +OP80( 0x6b, i_movle ) { Breg(BL) = Breg(DL); CLK(1); } +OP80( 0x6c, i_movlh ) { Breg(BL) = Breg(BH); CLK(1); } +OP80( 0x6d, i_movll ) { CLK(1); } +OP80( 0x6e, i_movlm ) { Breg(BL) = GetMemB(DS0, Wreg(BW)); CLK(1); } +OP80( 0x6f, i_movla ) { Breg(BL) = Breg(AL); CLK(1); } +OP80( 0x70, i_movmb ) { PutMemB(DS0, Wreg(BW), Breg(CH)); CLK(1); } +OP80( 0x71, i_movmc ) { PutMemB(DS0, Wreg(BW), Breg(CL)); CLK(1); } +OP80( 0x72, i_movmd ) { PutMemB(DS0, Wreg(BW), Breg(DH)); CLK(1); } +OP80( 0x73, i_movme ) { PutMemB(DS0, Wreg(BW), Breg(DL)); CLK(1); } +OP80( 0x74, i_movmh ) { PutMemB(DS0, Wreg(BW), Breg(BH)); CLK(1); } +OP80( 0x75, i_movml ) { PutMemB(DS0, Wreg(BW), Breg(BL)); CLK(1); } +OP80( 0x76, i_hlt ) { logerror("%06x: HALT\n",PC()); m_halted=1; m_icount=0; } +OP80( 0x77, i_movma ) { PutMemB(DS0, Wreg(BW), Breg(AL)); CLK(1); } +OP80( 0x78, i_movab ) { Breg(AL) = Breg(CH); CLK(1); } +OP80( 0x79, i_movac ) { Breg(AL) = Breg(CL); CLK(1); } +OP80( 0x7a, i_movad ) { Breg(AL) = Breg(DH); CLK(1); } +OP80( 0x7b, i_movae ) { Breg(AL) = Breg(DL); CLK(1); } +OP80( 0x7c, i_movah ) { Breg(AL) = Breg(BH); CLK(1); } +OP80( 0x7d, i_moval ) { Breg(AL) = Breg(BL); CLK(1); } +OP80( 0x7e, i_movam ) { Breg(AL) = GetMemB(DS0, Wreg(BW)); CLK(1); } +OP80( 0x7f, i_movaa ) { CLK(1); } +OP80( 0x80, i_addb ) { uint32_t src = Breg(CH), dst = Breg(AL); ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0x81, i_addc ) { uint32_t src = Breg(CL), dst = Breg(AL); ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0x82, i_addd ) { uint32_t src = Breg(DH), dst = Breg(AL); ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0x83, i_adde ) { uint32_t src = Breg(DL), dst = Breg(AL); ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0x84, i_addh ) { uint32_t src = Breg(BH), dst = Breg(AL); ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0x85, i_addl ) { uint32_t src = Breg(BL), dst = Breg(AL); ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0x86, i_addm ) { uint32_t src = GetMemB(DS0, Wreg(BW)), dst = Breg(AL); ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0x87, i_adda ) { uint32_t src = Breg(AL), dst = Breg(AL); ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0x88, i_adcb ) { uint32_t src = Breg(CH), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0x89, i_adcc ) { uint32_t src = Breg(CL), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0x8a, i_adcd ) { uint32_t src = Breg(DH), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0x8b, i_adce ) { uint32_t src = Breg(DL), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0x8c, i_adch ) { uint32_t src = Breg(BH), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0x8d, i_adcl ) { uint32_t src = Breg(BL), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0x8e, i_adcm ) { uint32_t src = GetMemB(DS0, Wreg(BW)), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0x8f, i_adca ) { uint32_t src = Breg(AL), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0x90, i_subb ) { uint32_t src = Breg(CH), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0x91, i_subc ) { uint32_t src = Breg(CL), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0x92, i_subd ) { uint32_t src = Breg(DH), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0x93, i_sube ) { uint32_t src = Breg(DL), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0x94, i_subh ) { uint32_t src = Breg(BH), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0x95, i_subl ) { uint32_t src = Breg(BL), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0x96, i_subm ) { uint32_t src = GetMemB(DS0, Wreg(BW)), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0x97, i_suba ) { uint32_t src = Breg(AL), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0x98, i_sbbb ) { uint32_t src = Breg(CH), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0x99, i_sbbc ) { uint32_t src = Breg(CL), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0x9a, i_sbbd ) { uint32_t src = Breg(DH), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0x9b, i_sbbe ) { uint32_t src = Breg(DL), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0x9c, i_sbbh ) { uint32_t src = Breg(BH), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0x9d, i_sbbl ) { uint32_t src = Breg(BL), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0x9e, i_sbbm ) { uint32_t src = GetMemB(DS0, Wreg(BW)), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0x9f, i_sbba ) { uint32_t src = Breg(AL), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0xa0, i_anab ) { uint32_t src = Breg(CH), dst = Breg(AL); ANDB; Breg(AL) = dst; CLK(1); } +OP80( 0xa1, i_anac ) { uint32_t src = Breg(CL), dst = Breg(AL); ANDB; Breg(AL) = dst; CLK(1); } +OP80( 0xa2, i_anad ) { uint32_t src = Breg(DH), dst = Breg(AL); ANDB; Breg(AL) = dst; CLK(1); } +OP80( 0xa3, i_anae ) { uint32_t src = Breg(DL), dst = Breg(AL); ANDB; Breg(AL) = dst; CLK(1); } +OP80( 0xa4, i_anah ) { uint32_t src = Breg(BH), dst = Breg(AL); ANDB; Breg(AL) = dst; CLK(1); } +OP80( 0xa5, i_anal ) { uint32_t src = Breg(BL), dst = Breg(AL); ANDB; Breg(AL) = dst; CLK(1); } +OP80( 0xa6, i_anam ) { uint32_t src = GetMemB(DS0, Wreg(BW)), dst = Breg(AL); ANDB; Breg(AL) = dst; CLK(1); } +OP80( 0xa7, i_anaa ) { uint32_t src = Breg(AL), dst = Breg(AL); ANDB; Breg(AL) = dst; CLK(1); } +OP80( 0xa8, i_xrab ) { uint32_t src = Breg(CH), dst = Breg(AL); XORB; Breg(AL) = dst; CLK(1); } +OP80( 0xa9, i_xrac ) { uint32_t src = Breg(CL), dst = Breg(AL); XORB; Breg(AL) = dst; CLK(1); } +OP80( 0xaa, i_xrad ) { uint32_t src = Breg(DH), dst = Breg(AL); XORB; Breg(AL) = dst; CLK(1); } +OP80( 0xab, i_xrae ) { uint32_t src = Breg(DL), dst = Breg(AL); XORB; Breg(AL) = dst; CLK(1); } +OP80( 0xac, i_xrah ) { uint32_t src = Breg(BH), dst = Breg(AL); XORB; Breg(AL) = dst; CLK(1); } +OP80( 0xad, i_xral ) { uint32_t src = Breg(BL), dst = Breg(AL); XORB; Breg(AL) = dst; CLK(1); } +OP80( 0xae, i_xram ) { uint32_t src = GetMemB(DS0, Wreg(BW)), dst = Breg(AL); XORB; Breg(AL) = dst; CLK(1); } +OP80( 0xaf, i_xraa ) { uint32_t src = Breg(AL), dst = Breg(AL); XORB; Breg(AL) = dst; CLK(1); } +OP80( 0xb0, i_orab ) { uint32_t src = Breg(CH), dst = Breg(AL); ORB; Breg(AL) = dst; CLK(1); } +OP80( 0xb1, i_orac ) { uint32_t src = Breg(CL), dst = Breg(AL); ORB; Breg(AL) = dst; CLK(1); } +OP80( 0xb2, i_orad ) { uint32_t src = Breg(DH), dst = Breg(AL); ORB; Breg(AL) = dst; CLK(1); } +OP80( 0xb3, i_orae ) { uint32_t src = Breg(DL), dst = Breg(AL); ORB; Breg(AL) = dst; CLK(1); } +OP80( 0xb4, i_orah ) { uint32_t src = Breg(BH), dst = Breg(AL); ORB; Breg(AL) = dst; CLK(1); } +OP80( 0xb5, i_oral ) { uint32_t src = Breg(BL), dst = Breg(AL); ORB; Breg(AL) = dst; CLK(1); } +OP80( 0xb6, i_oram ) { uint32_t src = GetMemB(DS0, Wreg(BW)), dst = Breg(AL); ORB; Breg(AL) = dst; CLK(1); } +OP80( 0xb7, i_oraa ) { uint32_t src = Breg(AL), dst = Breg(AL); ORB; Breg(AL) = dst; CLK(1); } +OP80( 0xb8, i_cmpb ) { uint32_t src = Breg(CH), dst = Breg(AL); SUBB; CLK(1); } +OP80( 0xb9, i_cmpc ) { uint32_t src = Breg(CL), dst = Breg(AL); SUBB; CLK(1); } +OP80( 0xba, i_cmpd ) { uint32_t src = Breg(DH), dst = Breg(AL); SUBB; CLK(1); } +OP80( 0xbb, i_cmpe ) { uint32_t src = Breg(DL), dst = Breg(AL); SUBB; CLK(1); } +OP80( 0xbc, i_cmph ) { uint32_t src = Breg(BH), dst = Breg(AL); SUBB; CLK(1); } +OP80( 0xbd, i_cmpl ) { uint32_t src = Breg(BL), dst = Breg(AL); SUBB; CLK(1); } +OP80( 0xbe, i_cmpm ) { uint32_t src = GetMemB(DS0, Wreg(BW)), dst = Breg(AL); SUBB; CLK(1); } +OP80( 0xbf, i_cmpa ) { uint32_t src = Breg(AL), dst = Breg(AL); SUBB; CLK(1); } +OP80( 0xc0, i_rnz ) { if (!ZF) { POP80(m_ip); CHANGE_PC; } CLK(1); } +OP80( 0xc1, i_popb ) { POP80(Wreg(CW)); } +OP80( 0xc2, i_jnz ) { uint32_t addr = fetchword(); if (!ZF) { m_ip = addr; CHANGE_PC; } CLK(1); } +OP80( 0xc3, i_jmp ) { m_ip = fetchword(); CHANGE_PC; CLK(1); } // 0xcb +OP80( 0xc4, i_cnz ) { uint32_t addr = fetchword(); if (!ZF) { PUSH80(m_ip); m_ip = addr; CHANGE_PC; } CLK(1); } +OP80( 0xc5, i_pushb ) { PUSH80(Wreg(CW)); } +OP80( 0xc6, i_adi ) { uint32_t src = fetch(), dst = Breg(AL); ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0xc7, i_rst0 ) { PUSH80(m_ip); m_ip = 0; CHANGE_PC; CLK(1); } +OP80( 0xc8, i_rz ) { if (ZF) { POP80(m_ip); CHANGE_PC; } CLK(1); } +OP80( 0xc9, i_ret ) { POP80(m_ip); CHANGE_PC; CLK(1); } //0xd9 +OP80( 0xca, i_jz ) { uint32_t addr = fetchword(); if (ZF) { m_ip = addr; CHANGE_PC; } CLK(1); } +OP80( 0xcc, i_cz ) { uint32_t addr = fetchword(); if (ZF) { PUSH80(m_ip); m_ip = addr; CHANGE_PC; } CLK(1); } +OP80( 0xcd, i_call ) { uint32_t addr = fetchword(); PUSH80(m_ip); m_ip = addr; CHANGE_PC; CLK(1); } // 0xdd, 0xfd +OP80( 0xce, i_aci ) { uint32_t src = fetch(), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0xcf, i_rst1 ) { PUSH80(m_ip); m_ip = 8; CHANGE_PC; CLK(1); } +OP80( 0xd0, i_rnc ) { if (!CF) { POP80(m_ip); CHANGE_PC; } CLK(1); } +OP80( 0xd1, i_popd ) { POP80(Wreg(DW)); } +OP80( 0xd2, i_jnc ) { uint32_t addr = fetchword(); if (!CF) { m_ip = addr; CHANGE_PC; } CLK(1); } +OP80( 0xd3, i_out ) { uint8_t port = fetch(); write_port_byte(port, Breg(AL)); CLK(1); } +OP80( 0xd4, i_cnc ) { uint32_t addr = fetchword(); if (!CF) { PUSH80(m_ip); m_ip = addr; CHANGE_PC; } CLK(1); } +OP80( 0xd5, i_pushd ) { PUSH80(Wreg(DW)); } +OP80( 0xd6, i_sui ) { uint32_t src = fetch(), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0xd7, i_rst2 ) { PUSH80(m_ip); m_ip = 0x10; CHANGE_PC; CLK(1); } +OP80( 0xd8, i_rc ) { if (CF) { POP80(m_ip); CHANGE_PC; } CLK(1); } +OP80( 0xda, i_jc ) { uint32_t addr = fetchword(); if (CF) { m_ip = addr; CHANGE_PC; } CLK(1); } +OP80( 0xdb, i_in ) { uint8_t port = fetch(); Breg(AL) = read_port_byte(port); CLK(1); } +OP80( 0xdc, i_cc ) { uint32_t addr = fetchword(); if (CF) { PUSH80(m_ip); m_ip = addr; CHANGE_PC; } CLK(1); } +OP80( 0xde, i_sbi ) { uint32_t src = fetch(), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0xdf, i_rst3 ) { PUSH80(m_ip); m_ip = 0x18; CHANGE_PC; CLK(1); } +OP80( 0xe0, i_rpo ) { if (!PF) { POP80(m_ip); CHANGE_PC; } CLK(1); } +OP80( 0xe1, i_poph ) { POP80(Wreg(BW)); } +OP80( 0xe2, i_jpo ) { uint32_t addr = fetchword(); if (!PF) { m_ip = addr; CHANGE_PC; } CLK(1); } +OP80( 0xe3, i_xthl ) { uint32_t tmp = Wreg(BW); POP80(Wreg(BW)); PUSH80(tmp); CLK(1); } +OP80( 0xe4, i_cpo ) { uint32_t addr = fetchword(); if (!PF) { PUSH80(m_ip); m_ip = addr; CHANGE_PC; } CLK(1); } +OP80( 0xe5, i_pushh ) { PUSH80(Wreg(BW)); } +OP80( 0xe6, i_ani ) { uint32_t src = fetch(), dst = Breg(AL); ANDB; Breg(AL) = dst; CLK(1); } +OP80( 0xe7, i_rst4 ) { PUSH80(m_ip); m_ip = 0x20; CHANGE_PC; CLK(1); } +OP80( 0xe8, i_rpe ) { if (PF) { POP80(m_ip); CHANGE_PC; } CLK(1); } +OP80( 0xe9, i_pchl ) { m_ip = Wreg(BW); CHANGE_PC; CLK(1); }; +OP80( 0xea, i_jpe ) { uint32_t addr = fetchword(); if (PF) { m_ip = addr; CHANGE_PC; } CLK(1); } +OP80( 0xeb, i_xchg ) { uint32_t tmp = Wreg(BW); Wreg(BW) = Wreg(DW); Wreg(DW) = tmp; CLK(1); } +OP80( 0xec, i_cpe ) { uint32_t addr = fetchword(); if (PF) { PUSH80(m_ip); m_ip = addr; CHANGE_PC; } CLK(1); } +OP80( 0xed, i_calln ) { uint32_t addr = fetch(); + switch (addr) { + case 0xed: + nec_interrupt(fetch(), BRK); break; + case 0xfd: + m_em = 1; POP(m_ip); POP(Sreg(PS)); i_popf(); CHANGE_PC; CLK(1); break; + default: + PUSH80(m_ip); m_ip = addr | (fetch() << 8); CHANGE_PC; CLK(1); break; + } +} +OP80( 0xee, i_xri ) { uint32_t src = fetch(), dst = Breg(AL); XORB; Breg(AL) = dst; CLK(1); } +OP80( 0xef, i_rst5 ) { PUSH80(m_ip); m_ip = 0x28; CHANGE_PC; CLK(1); } +OP80( 0xf0, i_rp ) { if (!SF) { POP80(m_ip); CHANGE_PC; } CLK(1); } +OP80( 0xf1, i_popf ) { uint16_t tmp; POP80(tmp); Breg(AL) = tmp >> 8; ExpandFlags((CompressFlags() & 0xff00) | (tmp & 0xff))} +OP80( 0xf2, i_jp ) { uint32_t addr = fetchword(); if (!SF) { m_ip = addr; CHANGE_PC; } CLK(1); } +OP80( 0xf3, i_di ) { SetIF(0); CLK(1); } +OP80( 0xf4, i_cp ) { uint32_t addr = fetchword(); if (!SF) { PUSH80(m_ip); m_ip = addr; CHANGE_PC; } CLK(1); } +OP80( 0xf5, i_pushf ) { uint16_t f = CompressFlags(); PUSH80((Breg(AL) << 8) | (f & 0xff)); } +OP80( 0xf6, i_ori ) { uint32_t src = fetch(), dst = Breg(AL); ORB; Breg(AL) = dst; CLK(1); } +OP80( 0xf7, i_rst6 ) { PUSH80(m_ip); m_ip = 0x30; CHANGE_PC; CLK(1); } +OP80( 0xf8, i_rm ) { if (SF) { POP80(m_ip); CHANGE_PC; } CLK(1); } +OP80( 0xf9, i_sphl ) { Wreg(BP) = Wreg(BW); CLK(1); }; +OP80( 0xfa, i_jm ) { uint32_t addr = fetchword(); if (SF) { m_ip = addr; CHANGE_PC; } CLK(1); } +OP80( 0xfb, i_ei ) { SetIF(1); CLK(1); } +OP80( 0xfc, i_cm ) { uint32_t addr = fetchword(); if (SF) { PUSH80(m_ip); m_ip = addr; CHANGE_PC; } CLK(1); } +OP80( 0xfe, i_cpi ) { uint32_t src = fetch(), dst = Breg(AL); SUBB; CLK(1); } +OP80( 0xff, i_rst7 ) { PUSH80(m_ip); m_ip = 0x38; CHANGE_PC; CLK(1); } diff --git a/src/devices/cpu/nec/necdasm.cpp b/src/devices/cpu/nec/necdasm.cpp index 36f155d2527..690ec4867e2 100644 --- a/src/devices/cpu/nec/necdasm.cpp +++ b/src/devices/cpu/nec/necdasm.cpp @@ -1453,10 +1453,290 @@ void nec_disassembler::decode_opcode(std::ostream &stream, const NEC_I386_OPCODE handle_unknown: util::stream_format(stream, "???"); + +} +offs_t nec_disassembler::dis80(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) +{ + offs_t flags = 0; + uint8_t op; + unsigned prevpc = pc; + switch (op = opcodes.r8(pc++)) + { + case 0x00: util::stream_format(stream, "nop"); break; + case 0x01: util::stream_format(stream, "lxi cw,$%04x", params.r16(pc)); pc+=2; break; + case 0x02: util::stream_format(stream, "stax cw"); break; + case 0x03: util::stream_format(stream, "inx cw"); break; + case 0x04: util::stream_format(stream, "inr ch"); break; + case 0x05: util::stream_format(stream, "dcr ch"); break; + case 0x06: util::stream_format(stream, "mvi ch,$%02x", params.r8(pc)); pc++; break; + case 0x07: util::stream_format(stream, "rlc"); break; + case 0x08: util::stream_format(stream, "nop"); break; + case 0x09: util::stream_format(stream, "dad cw"); break; + case 0x0a: util::stream_format(stream, "ldax cw"); break; + case 0x0b: util::stream_format(stream, "dcx cw"); break; + case 0x0c: util::stream_format(stream, "inr cl"); break; + case 0x0d: util::stream_format(stream, "dcr cl"); break; + case 0x0e: util::stream_format(stream, "mvi cl,$%02x", params.r8(pc)); pc++; break; + case 0x0f: util::stream_format(stream, "rrc"); break; + case 0x10: util::stream_format(stream, "nop"); break; + case 0x11: util::stream_format(stream, "lxi dw,$%04x", params.r16(pc)); pc+=2; break; + case 0x12: util::stream_format(stream, "stax dw"); break; + case 0x13: util::stream_format(stream, "inx dw"); break; + case 0x14: util::stream_format(stream, "inr dh"); break; + case 0x15: util::stream_format(stream, "dcr dh"); break; + case 0x16: util::stream_format(stream, "mvi dh,$%02x", params.r8(pc)); pc++; break; + case 0x17: util::stream_format(stream, "ral"); break; + case 0x18: util::stream_format(stream, "nop"); break; + case 0x19: util::stream_format(stream, "dad dw"); break; + case 0x1a: util::stream_format(stream, "ldax dw"); break; + case 0x1b: util::stream_format(stream, "dcx dw"); break; + case 0x1c: util::stream_format(stream, "inr dl"); break; + case 0x1d: util::stream_format(stream, "dcr dl"); break; + case 0x1e: util::stream_format(stream, "mvi dl,$%02x", params.r8(pc)); pc++; break; + case 0x1f: util::stream_format(stream, "rar"); break; + case 0x20: util::stream_format(stream, "nop"); break; + case 0x21: util::stream_format(stream, "lxi bw,$%04x", params.r16(pc)); pc+=2; break; + case 0x22: util::stream_format(stream, "shld $%04x", params.r16(pc)); pc+=2; break; + case 0x23: util::stream_format(stream, "inx bw"); break; + case 0x24: util::stream_format(stream, "inr bh"); break; + case 0x25: util::stream_format(stream, "dcr bh"); break; + case 0x26: util::stream_format(stream, "mvi bh,$%02x", params.r8(pc)); pc++; break; + case 0x27: util::stream_format(stream, "daa"); break; + case 0x28: util::stream_format(stream, "nop"); break; + case 0x29: util::stream_format(stream, "dad bw"); break; + case 0x2a: util::stream_format(stream, "lhld $%04x", params.r16(pc)); pc+=2; break; + case 0x2b: util::stream_format(stream, "dcx bw"); break; + case 0x2c: util::stream_format(stream, "inr bl"); break; + case 0x2d: util::stream_format(stream, "dcr bl"); break; + case 0x2e: util::stream_format(stream, "mvi bl,$%02x", params.r8(pc)); pc++; break; + case 0x2f: util::stream_format(stream, "cma"); break; + case 0x30: util::stream_format(stream, "nop"); break; + case 0x31: util::stream_format(stream, "lxi bp,$%04x", params.r16(pc)); pc+=2; break; + case 0x32: util::stream_format(stream, "stax $%04x", params.r16(pc)); pc+=2; break; + case 0x33: util::stream_format(stream, "inx bp"); break; + case 0x34: util::stream_format(stream, "inr m"); break; + case 0x35: util::stream_format(stream, "dcr m"); break; + case 0x36: util::stream_format(stream, "mvi m,$%02x", params.r8(pc)); pc++; break; + case 0x37: util::stream_format(stream, "stc"); break; + case 0x38: util::stream_format(stream, "nop"); break; + case 0x39: util::stream_format(stream, "dad bp"); break; + case 0x3a: util::stream_format(stream, "ldax $%04x", params.r16(pc)); pc+=2; break; + case 0x3b: util::stream_format(stream, "dcx bp"); break; + case 0x3c: util::stream_format(stream, "inr al"); break; + case 0x3d: util::stream_format(stream, "dcr al"); break; + case 0x3e: util::stream_format(stream, "mvi al,$%02x", params.r8(pc)); pc++; break; + case 0x3f: util::stream_format(stream, "cmc"); break; + case 0x40: util::stream_format(stream, "mov ch,ch"); break; + case 0x41: util::stream_format(stream, "mov ch,cl"); break; + case 0x42: util::stream_format(stream, "mov ch,dh"); break; + case 0x43: util::stream_format(stream, "mov ch,dl"); break; + case 0x44: util::stream_format(stream, "mov ch,bh"); break; + case 0x45: util::stream_format(stream, "mov ch,bl"); break; + case 0x46: util::stream_format(stream, "mov ch,m"); break; + case 0x47: util::stream_format(stream, "mov ch,al"); break; + case 0x48: util::stream_format(stream, "mov cl,ch"); break; + case 0x49: util::stream_format(stream, "mov cl,cl"); break; + case 0x4a: util::stream_format(stream, "mov cl,dh"); break; + case 0x4b: util::stream_format(stream, "mov cl,dl"); break; + case 0x4c: util::stream_format(stream, "mov cl,bh"); break; + case 0x4d: util::stream_format(stream, "mov cl,bl"); break; + case 0x4e: util::stream_format(stream, "mov cl,m"); break; + case 0x4f: util::stream_format(stream, "mov cl,al"); break; + case 0x50: util::stream_format(stream, "mov dh,ch"); break; + case 0x51: util::stream_format(stream, "mov dh,cl"); break; + case 0x52: util::stream_format(stream, "mov dh,dh"); break; + case 0x53: util::stream_format(stream, "mov dh,dl"); break; + case 0x54: util::stream_format(stream, "mov dh,bh"); break; + case 0x55: util::stream_format(stream, "mov dh,bl"); break; + case 0x56: util::stream_format(stream, "mov dh,m"); break; + case 0x57: util::stream_format(stream, "mov dh,al"); break; + case 0x58: util::stream_format(stream, "mov dl,ch"); break; + case 0x59: util::stream_format(stream, "mov dl,cl"); break; + case 0x5a: util::stream_format(stream, "mov dl,dh"); break; + case 0x5b: util::stream_format(stream, "mov dl,dl"); break; + case 0x5c: util::stream_format(stream, "mov dl,bh"); break; + case 0x5d: util::stream_format(stream, "mov dl,bl"); break; + case 0x5e: util::stream_format(stream, "mov dl,m"); break; + case 0x5f: util::stream_format(stream, "mov dl,al"); break; + case 0x60: util::stream_format(stream, "mov bh,ch"); break; + case 0x61: util::stream_format(stream, "mov bh,cl"); break; + case 0x62: util::stream_format(stream, "mov bh,dh"); break; + case 0x63: util::stream_format(stream, "mov bh,dl"); break; + case 0x64: util::stream_format(stream, "mov bh,bh"); break; + case 0x65: util::stream_format(stream, "mov bh,bl"); break; + case 0x66: util::stream_format(stream, "mov bh,m"); break; + case 0x67: util::stream_format(stream, "mov bh,al"); break; + case 0x68: util::stream_format(stream, "mov bl,ch"); break; + case 0x69: util::stream_format(stream, "mov bl,cl"); break; + case 0x6a: util::stream_format(stream, "mov bl,dh"); break; + case 0x6b: util::stream_format(stream, "mov bl,dl"); break; + case 0x6c: util::stream_format(stream, "mov bl,bh"); break; + case 0x6d: util::stream_format(stream, "mov bl,bl"); break; + case 0x6e: util::stream_format(stream, "mov bl,m"); break; + case 0x6f: util::stream_format(stream, "mov bl,al"); break; + case 0x70: util::stream_format(stream, "mov m,ch"); break; + case 0x71: util::stream_format(stream, "mov m,cl"); break; + case 0x72: util::stream_format(stream, "mov m,dh"); break; + case 0x73: util::stream_format(stream, "mov m,dl"); break; + case 0x74: util::stream_format(stream, "mov m,bh"); break; + case 0x75: util::stream_format(stream, "mov m,bl"); break; + case 0x76: util::stream_format(stream, "hlt"); break; + case 0x77: util::stream_format(stream, "mov m,al"); break; + case 0x78: util::stream_format(stream, "mov al,ch"); break; + case 0x79: util::stream_format(stream, "mov al,cl"); break; + case 0x7a: util::stream_format(stream, "mov al,dh"); break; + case 0x7b: util::stream_format(stream, "mov al,dl"); break; + case 0x7c: util::stream_format(stream, "mov al,bh"); break; + case 0x7d: util::stream_format(stream, "mov al,bl"); break; + case 0x7e: util::stream_format(stream, "mov al,m"); break; + case 0x7f: util::stream_format(stream, "mov al,al"); break; + case 0x80: util::stream_format(stream, "add ch"); break; + case 0x81: util::stream_format(stream, "add cl"); break; + case 0x82: util::stream_format(stream, "add dh"); break; + case 0x83: util::stream_format(stream, "add dl"); break; + case 0x84: util::stream_format(stream, "add bh"); break; + case 0x85: util::stream_format(stream, "add bl"); break; + case 0x86: util::stream_format(stream, "add m"); break; + case 0x87: util::stream_format(stream, "add al"); break; + case 0x88: util::stream_format(stream, "adc ch"); break; + case 0x89: util::stream_format(stream, "adc cl"); break; + case 0x8a: util::stream_format(stream, "adc dh"); break; + case 0x8b: util::stream_format(stream, "adc dl"); break; + case 0x8c: util::stream_format(stream, "adc bh"); break; + case 0x8d: util::stream_format(stream, "adc bl"); break; + case 0x8e: util::stream_format(stream, "adc m"); break; + case 0x8f: util::stream_format(stream, "adc al"); break; + case 0x90: util::stream_format(stream, "sub ch"); break; + case 0x91: util::stream_format(stream, "sub cl"); break; + case 0x92: util::stream_format(stream, "sub dh"); break; + case 0x93: util::stream_format(stream, "sub dl"); break; + case 0x94: util::stream_format(stream, "sub bh"); break; + case 0x95: util::stream_format(stream, "sub bl"); break; + case 0x96: util::stream_format(stream, "sub m"); break; + case 0x97: util::stream_format(stream, "sub al"); break; + case 0x98: util::stream_format(stream, "sbb ch"); break; + case 0x99: util::stream_format(stream, "sbb cl"); break; + case 0x9a: util::stream_format(stream, "sbb dh"); break; + case 0x9b: util::stream_format(stream, "sbb dl"); break; + case 0x9c: util::stream_format(stream, "sbb bh"); break; + case 0x9d: util::stream_format(stream, "sbb bl"); break; + case 0x9e: util::stream_format(stream, "sbb m"); break; + case 0x9f: util::stream_format(stream, "sbb al"); break; + case 0xa0: util::stream_format(stream, "ana ch"); break; + case 0xa1: util::stream_format(stream, "ana cl"); break; + case 0xa2: util::stream_format(stream, "ana dh"); break; + case 0xa3: util::stream_format(stream, "ana dl"); break; + case 0xa4: util::stream_format(stream, "ana bh"); break; + case 0xa5: util::stream_format(stream, "ana bl"); break; + case 0xa6: util::stream_format(stream, "ana m"); break; + case 0xa7: util::stream_format(stream, "ana al"); break; + case 0xa8: util::stream_format(stream, "xra ch"); break; + case 0xa9: util::stream_format(stream, "xra cl"); break; + case 0xaa: util::stream_format(stream, "xra dh"); break; + case 0xab: util::stream_format(stream, "xra dl"); break; + case 0xac: util::stream_format(stream, "xra bh"); break; + case 0xad: util::stream_format(stream, "xra bl"); break; + case 0xae: util::stream_format(stream, "xra m"); break; + case 0xaf: util::stream_format(stream, "xra al"); break; + case 0xb0: util::stream_format(stream, "ora ch"); break; + case 0xb1: util::stream_format(stream, "ora cl"); break; + case 0xb2: util::stream_format(stream, "ora dh"); break; + case 0xb3: util::stream_format(stream, "ora dl"); break; + case 0xb4: util::stream_format(stream, "ora bh"); break; + case 0xb5: util::stream_format(stream, "ora bl"); break; + case 0xb6: util::stream_format(stream, "ora m"); break; + case 0xb7: util::stream_format(stream, "ora al"); break; + case 0xb8: util::stream_format(stream, "cmp ch"); break; + case 0xb9: util::stream_format(stream, "cmp cl"); break; + case 0xba: util::stream_format(stream, "cmp dh"); break; + case 0xbb: util::stream_format(stream, "cmp dl"); break; + case 0xbc: util::stream_format(stream, "cmp bh"); break; + case 0xbd: util::stream_format(stream, "cmp bl"); break; + case 0xbe: util::stream_format(stream, "cmp m"); break; + case 0xbf: util::stream_format(stream, "cmp al"); break; + case 0xc0: util::stream_format(stream, "rnz"); flags = STEP_OUT; break; + case 0xc1: util::stream_format(stream, "pop cw"); break; + case 0xc2: util::stream_format(stream, "jnz $%04x", params.r16(pc)); pc+=2; break; + case 0xc3: util::stream_format(stream, "jmp $%04x", params.r16(pc)); pc+=2; break; + case 0xc4: util::stream_format(stream, "cnz $%04x", params.r16(pc)); pc+=2; flags = STEP_OVER; break; + case 0xc5: util::stream_format(stream, "push cw"); break; + case 0xc6: util::stream_format(stream, "adi $%02x", params.r8(pc)); pc++; break; + case 0xc7: util::stream_format(stream, "rst 0"); flags = STEP_OVER; break; + case 0xc8: util::stream_format(stream, "rz"); flags = STEP_OUT; break; + case 0xc9: util::stream_format(stream, "ret"); flags = STEP_OUT; break; + case 0xca: util::stream_format(stream, "jz $%04x", params.r16(pc)); pc+=2; break; + case 0xcb: util::stream_format(stream, "jmp $%04x", params.r16(pc)); pc+=2; break; + case 0xcc: util::stream_format(stream, "cz $%04x", params.r16(pc)); pc+=2; flags = STEP_OVER; break; + case 0xcd: util::stream_format(stream, "call $%04x", params.r16(pc)); pc+=2; flags = STEP_OVER; break; + case 0xce: util::stream_format(stream, "aci $%02x", params.r8(pc)); pc++; break; + case 0xcf: util::stream_format(stream, "rst 1"); flags = STEP_OVER; break; + case 0xd0: util::stream_format(stream, "rnc"); flags = STEP_OUT; break; + case 0xd1: util::stream_format(stream, "pop dw"); break; + case 0xd2: util::stream_format(stream, "jnc $%04x", params.r16(pc)); pc+=2; break; + case 0xd3: util::stream_format(stream, "out $%02x", params.r8(pc)); pc++; break; + case 0xd4: util::stream_format(stream, "cnc $%04x", params.r16(pc)); pc+=2; flags = STEP_OVER; break; + case 0xd5: util::stream_format(stream, "push dw"); break; + case 0xd6: util::stream_format(stream, "sui $%02x", params.r8(pc)); pc++; break; + case 0xd7: util::stream_format(stream, "rst 2"); flags = STEP_OVER; break; + case 0xd8: util::stream_format(stream, "rc"); flags = STEP_OUT; break; + case 0xd9: util::stream_format(stream, "shlx d (*)"); break; + case 0xda: util::stream_format(stream, "jc $%04x", params.r16(pc)); pc+=2; break; + case 0xdb: util::stream_format(stream, "in $%02x", params.r8(pc)); pc++; break; + case 0xdc: util::stream_format(stream, "cc $%04x", params.r16(pc)); pc+=2; flags = STEP_OVER; break; + case 0xdd: util::stream_format(stream, "call $%04x", params.r16(pc)); pc+=2; flags = STEP_OVER; break; + case 0xde: util::stream_format(stream, "sbi $%02x", params.r8(pc)); pc++; break; + case 0xdf: util::stream_format(stream, "rst 3"); flags = STEP_OVER; break; + case 0xe0: util::stream_format(stream, "rpo"); flags = STEP_OUT; break; + case 0xe1: util::stream_format(stream, "pop bw"); break; + case 0xe2: util::stream_format(stream, "jpo $%04x", params.r16(pc)); pc+=2; break; + case 0xe3: util::stream_format(stream, "xthl"); break; + case 0xe4: util::stream_format(stream, "cpo $%04x", params.r16(pc)); pc+=2; flags = STEP_OVER; break; + case 0xe5: util::stream_format(stream, "push bw"); break; + case 0xe6: util::stream_format(stream, "ani $%02x", params.r8(pc)); pc++; break; + case 0xe7: util::stream_format(stream, "rst 4"); flags = STEP_OVER; break; + case 0xe8: util::stream_format(stream, "rpe"); flags = STEP_OUT; break; + case 0xe9: util::stream_format(stream, "pchl"); break; + case 0xea: util::stream_format(stream, "jpe $%04x", params.r16(pc)); pc+=2; break; + case 0xeb: util::stream_format(stream, "xchg"); break; + case 0xec: util::stream_format(stream, "cpe $%04x", params.r16(pc)); pc+=2; flags = STEP_OVER; break; + case 0xed: + switch (params.r8(pc)) + { + case 0xed: + util::stream_format(stream, "calln $%02x", params.r8(++pc)); pc++; flags = STEP_OVER; break; + case 0xfd: + util::stream_format(stream, "retem $%02x", params.r8(pc)); pc++; flags = STEP_OUT; break; + default: + util::stream_format(stream, "call $%04x", params.r16(pc)); pc+=2; flags = STEP_OVER; break; + } + break; + case 0xee: util::stream_format(stream, "xri $%02x", params.r8(pc)); pc++; break; + case 0xef: util::stream_format(stream, "rst 5"); flags = STEP_OVER; break; + case 0xf0: util::stream_format(stream, "rp"); flags = STEP_OUT; break; + case 0xf1: util::stream_format(stream, "pop psw"); break; + case 0xf2: util::stream_format(stream, "jp $%04x", params.r16(pc)); pc+=2; break; + case 0xf3: util::stream_format(stream, "di"); break; + case 0xf4: util::stream_format(stream, "cp $%04x", params.r16(pc)); pc+=2; break; + case 0xf5: util::stream_format(stream, "push psw"); break; + case 0xf6: util::stream_format(stream, "ori $%02x", params.r8(pc)); pc++; break; + case 0xf7: util::stream_format(stream, "rst 6"); flags = STEP_OVER; break; + case 0xf8: util::stream_format(stream, "rm"); flags = STEP_OUT; break; + case 0xf9: util::stream_format(stream, "sphl"); break; + case 0xfa: util::stream_format(stream, "jm $%04x", params.r16(pc)); pc+=2; break; + case 0xfb: util::stream_format(stream, "ei"); break; + case 0xfc: util::stream_format(stream, "cm $%04x", params.r16(pc)); pc+=2; flags = STEP_OVER; break; + case 0xfd: util::stream_format(stream, "call $%04x", params.r16(pc)); pc+=2; flags = STEP_OVER; break; + case 0xfe: util::stream_format(stream, "cpi $%02x", params.r8(pc)); pc++; break; + case 0xff: util::stream_format(stream, "rst 7"); flags = STEP_OVER; break; + } + return (pc - prevpc) | flags | SUPPORTED; } offs_t nec_disassembler::disassemble(std::ostream &stream, offs_t eip, const data_buffer &opcodes, const data_buffer ¶ms) { + if(!(m_config->get_mode())) + return dis80(stream, eip, opcodes, params); + uint8_t op; offs_t pc = eip; @@ -1472,7 +1752,7 @@ offs_t nec_disassembler::disassemble(std::ostream &stream, offs_t eip, const dat return (pc-eip) | m_dasm_flags | SUPPORTED; } -nec_disassembler::nec_disassembler(const u8 *decryption_table) : m_decryption_table(decryption_table) +nec_disassembler::nec_disassembler(config *conf, const u8 *decryption_table) : m_config(conf), m_decryption_table(decryption_table) { } diff --git a/src/devices/cpu/nec/necdasm.h b/src/devices/cpu/nec/necdasm.h index 9b243ffe66f..2f0bc594ae1 100644 --- a/src/devices/cpu/nec/necdasm.h +++ b/src/devices/cpu/nec/necdasm.h @@ -11,7 +11,13 @@ class nec_disassembler : public util::disasm_interface { public: - nec_disassembler(const u8 *decryption_table = nullptr); + struct config { + public: + virtual ~config() = default; + virtual int get_mode() const = 0; + }; + + nec_disassembler(config *conf, const u8 *decryption_table = nullptr); virtual ~nec_disassembler() = default; virtual u32 opcode_alignment() const override; @@ -107,6 +113,7 @@ private: static const char *const nec_sreg[8]; static const char *const nec_sfreg[256]; + config *m_config; const u8 *m_decryption_table; u8 m_modrm; @@ -123,6 +130,7 @@ private: void handle_fpu(std::ostream &stream, uint8_t op1, uint8_t op2, offs_t pc_base, offs_t &pc, const data_buffer ¶ms); void decode_opcode(std::ostream &stream, const NEC_I386_OPCODE *op, uint8_t op1, offs_t pc_base, offs_t &pc, const data_buffer &opcodes, const data_buffer ¶ms); + offs_t dis80(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms); }; diff --git a/src/devices/cpu/nec/necinstr.h b/src/devices/cpu/nec/necinstr.h index 6dd8d52aa49..b364a56e6c5 100644 --- a/src/devices/cpu/nec/necinstr.h +++ b/src/devices/cpu/nec/necinstr.h @@ -260,3 +260,263 @@ const nec_common_device::nec_ophandler nec_common_device::s_nec_instruction[256] &nec_common_device::i_fepre, /* 0xfe */ &nec_common_device::i_ffpre /* 0xff */ }; + +const nec_common_device::nec_ophandler nec_common_device::s_nec80_instruction[256] = +{ + &nec_common_device::i_nop_80, + &nec_common_device::i_lxib_80, + &nec_common_device::i_staxb_80, + &nec_common_device::i_inxb_80, + &nec_common_device::i_inrb_80, + &nec_common_device::i_dcrb_80, + &nec_common_device::i_mvib_80, + &nec_common_device::i_rlc_80, + &nec_common_device::i_nop_80, + &nec_common_device::i_dadb_80, + &nec_common_device::i_ldaxb_80, + &nec_common_device::i_dcxb_80, + &nec_common_device::i_inrc_80, + &nec_common_device::i_dcrc_80, + &nec_common_device::i_mvic_80, + &nec_common_device::i_rrc_80, + &nec_common_device::i_nop_80, + &nec_common_device::i_lxid_80, + &nec_common_device::i_staxd_80, + &nec_common_device::i_inxd_80, + &nec_common_device::i_inrd_80, + &nec_common_device::i_dcrd_80, + &nec_common_device::i_mvid_80, + &nec_common_device::i_ral_80, + &nec_common_device::i_nop_80, + &nec_common_device::i_dadd_80, + &nec_common_device::i_ldaxd_80, + &nec_common_device::i_dcxd_80, + &nec_common_device::i_inre_80, + &nec_common_device::i_dcre_80, + &nec_common_device::i_mvie_80, + &nec_common_device::i_rar_80, + &nec_common_device::i_nop_80, + &nec_common_device::i_lxih_80, + &nec_common_device::i_shld_80, + &nec_common_device::i_inxh_80, + &nec_common_device::i_inrh_80, + &nec_common_device::i_dcrh_80, + &nec_common_device::i_mvih_80, + &nec_common_device::i_daa_80, + &nec_common_device::i_nop_80, + &nec_common_device::i_dadh_80, + &nec_common_device::i_lhld_80, + &nec_common_device::i_dcxh_80, + &nec_common_device::i_inrl_80, + &nec_common_device::i_dcrl_80, + &nec_common_device::i_mvil_80, + &nec_common_device::i_cma_80, + &nec_common_device::i_nop_80, + &nec_common_device::i_lxis_80, + &nec_common_device::i_sta_80, + &nec_common_device::i_inxs_80, + &nec_common_device::i_inrm_80, + &nec_common_device::i_dcrm_80, + &nec_common_device::i_mvim_80, + &nec_common_device::i_stc_80, + &nec_common_device::i_nop_80, + &nec_common_device::i_dads_80, + &nec_common_device::i_lda_80, + &nec_common_device::i_dcxs_80, + &nec_common_device::i_inra_80, + &nec_common_device::i_dcra_80, + &nec_common_device::i_mvia_80, + &nec_common_device::i_cmc_80, + &nec_common_device::i_movbb_80, + &nec_common_device::i_movbc_80, + &nec_common_device::i_movbd_80, + &nec_common_device::i_movbe_80, + &nec_common_device::i_movbh_80, + &nec_common_device::i_movbl_80, + &nec_common_device::i_movbm_80, + &nec_common_device::i_movba_80, + &nec_common_device::i_movcb_80, + &nec_common_device::i_movcc_80, + &nec_common_device::i_movcd_80, + &nec_common_device::i_movce_80, + &nec_common_device::i_movch_80, + &nec_common_device::i_movcl_80, + &nec_common_device::i_movcm_80, + &nec_common_device::i_movca_80, + &nec_common_device::i_movdb_80, + &nec_common_device::i_movdc_80, + &nec_common_device::i_movdd_80, + &nec_common_device::i_movde_80, + &nec_common_device::i_movdh_80, + &nec_common_device::i_movdl_80, + &nec_common_device::i_movdm_80, + &nec_common_device::i_movda_80, + &nec_common_device::i_moveb_80, + &nec_common_device::i_movec_80, + &nec_common_device::i_moved_80, + &nec_common_device::i_movee_80, + &nec_common_device::i_moveh_80, + &nec_common_device::i_movel_80, + &nec_common_device::i_movem_80, + &nec_common_device::i_movea_80, + &nec_common_device::i_movhb_80, + &nec_common_device::i_movhc_80, + &nec_common_device::i_movhd_80, + &nec_common_device::i_movhe_80, + &nec_common_device::i_movhh_80, + &nec_common_device::i_movhl_80, + &nec_common_device::i_movhm_80, + &nec_common_device::i_movha_80, + &nec_common_device::i_movlb_80, + &nec_common_device::i_movlc_80, + &nec_common_device::i_movld_80, + &nec_common_device::i_movle_80, + &nec_common_device::i_movlh_80, + &nec_common_device::i_movll_80, + &nec_common_device::i_movlm_80, + &nec_common_device::i_movla_80, + &nec_common_device::i_movmb_80, + &nec_common_device::i_movmc_80, + &nec_common_device::i_movmd_80, + &nec_common_device::i_movme_80, + &nec_common_device::i_movmh_80, + &nec_common_device::i_movml_80, + &nec_common_device::i_hlt_80, + &nec_common_device::i_movma_80, + &nec_common_device::i_movab_80, + &nec_common_device::i_movac_80, + &nec_common_device::i_movad_80, + &nec_common_device::i_movae_80, + &nec_common_device::i_movah_80, + &nec_common_device::i_moval_80, + &nec_common_device::i_movam_80, + &nec_common_device::i_movaa_80, + &nec_common_device::i_addb_80, + &nec_common_device::i_addc_80, + &nec_common_device::i_addd_80, + &nec_common_device::i_adde_80, + &nec_common_device::i_addh_80, + &nec_common_device::i_addl_80, + &nec_common_device::i_addm_80, + &nec_common_device::i_adda_80, + &nec_common_device::i_adcb_80, + &nec_common_device::i_adcc_80, + &nec_common_device::i_adcd_80, + &nec_common_device::i_adce_80, + &nec_common_device::i_adch_80, + &nec_common_device::i_adcl_80, + &nec_common_device::i_adcm_80, + &nec_common_device::i_adca_80, + &nec_common_device::i_subb_80, + &nec_common_device::i_subc_80, + &nec_common_device::i_subd_80, + &nec_common_device::i_sube_80, + &nec_common_device::i_subh_80, + &nec_common_device::i_subl_80, + &nec_common_device::i_subm_80, + &nec_common_device::i_suba_80, + &nec_common_device::i_sbbb_80, + &nec_common_device::i_sbbc_80, + &nec_common_device::i_sbbd_80, + &nec_common_device::i_sbbe_80, + &nec_common_device::i_sbbh_80, + &nec_common_device::i_sbbl_80, + &nec_common_device::i_sbbm_80, + &nec_common_device::i_sbba_80, + &nec_common_device::i_anab_80, + &nec_common_device::i_anac_80, + &nec_common_device::i_anad_80, + &nec_common_device::i_anae_80, + &nec_common_device::i_anah_80, + &nec_common_device::i_anal_80, + &nec_common_device::i_anam_80, + &nec_common_device::i_anaa_80, + &nec_common_device::i_xrab_80, + &nec_common_device::i_xrac_80, + &nec_common_device::i_xrad_80, + &nec_common_device::i_xrae_80, + &nec_common_device::i_xrah_80, + &nec_common_device::i_xral_80, + &nec_common_device::i_xram_80, + &nec_common_device::i_xraa_80, + &nec_common_device::i_orab_80, + &nec_common_device::i_orac_80, + &nec_common_device::i_orad_80, + &nec_common_device::i_orae_80, + &nec_common_device::i_orah_80, + &nec_common_device::i_oral_80, + &nec_common_device::i_oram_80, + &nec_common_device::i_oraa_80, + &nec_common_device::i_cmpb_80, + &nec_common_device::i_cmpc_80, + &nec_common_device::i_cmpd_80, + &nec_common_device::i_cmpe_80, + &nec_common_device::i_cmph_80, + &nec_common_device::i_cmpl_80, + &nec_common_device::i_cmpm_80, + &nec_common_device::i_cmpa_80, + &nec_common_device::i_rnz_80, + &nec_common_device::i_popb_80, + &nec_common_device::i_jnz_80, + &nec_common_device::i_jmp_80, + &nec_common_device::i_cnz_80, + &nec_common_device::i_pushb_80, + &nec_common_device::i_adi_80, + &nec_common_device::i_rst0_80, + &nec_common_device::i_rz_80, + &nec_common_device::i_ret_80, + &nec_common_device::i_jz_80, + &nec_common_device::i_jmp_80, + &nec_common_device::i_cz_80, + &nec_common_device::i_call_80, + &nec_common_device::i_aci_80, + &nec_common_device::i_rst1_80, + &nec_common_device::i_rnc_80, + &nec_common_device::i_popd_80, + &nec_common_device::i_jnc_80, + &nec_common_device::i_out_80, + &nec_common_device::i_cnc_80, + &nec_common_device::i_pushd_80, + &nec_common_device::i_sui_80, + &nec_common_device::i_rst2_80, + &nec_common_device::i_rc_80, + &nec_common_device::i_ret_80, + &nec_common_device::i_jc_80, + &nec_common_device::i_in_80, + &nec_common_device::i_cc_80, + &nec_common_device::i_call_80, + &nec_common_device::i_sbi_80, + &nec_common_device::i_rst3_80, + &nec_common_device::i_rpo_80, + &nec_common_device::i_poph_80, + &nec_common_device::i_jpo_80, + &nec_common_device::i_xthl_80, + &nec_common_device::i_cpo_80, + &nec_common_device::i_pushh_80, + &nec_common_device::i_ani_80, + &nec_common_device::i_rst4_80, + &nec_common_device::i_rpe_80, + &nec_common_device::i_pchl_80, + &nec_common_device::i_jpe_80, + &nec_common_device::i_xchg_80, + &nec_common_device::i_cpe_80, + &nec_common_device::i_calln_80, + &nec_common_device::i_xri_80, + &nec_common_device::i_rst5_80, + &nec_common_device::i_rp_80, + &nec_common_device::i_popf_80, + &nec_common_device::i_jp_80, + &nec_common_device::i_di_80, + &nec_common_device::i_cp_80, + &nec_common_device::i_pushf_80, + &nec_common_device::i_ori_80, + &nec_common_device::i_rst6_80, + &nec_common_device::i_rm_80, + &nec_common_device::i_sphl_80, + &nec_common_device::i_jm_80, + &nec_common_device::i_ei_80, + &nec_common_device::i_cm_80, + &nec_common_device::i_call_80, + &nec_common_device::i_cpi_80, + &nec_common_device::i_rst7_80 +}; diff --git a/src/devices/cpu/nec/necinstr.hxx b/src/devices/cpu/nec/necinstr.hxx index f1209d675a9..19959bdebd5 100644 --- a/src/devices/cpu/nec/necinstr.hxx +++ b/src/devices/cpu/nec/necinstr.hxx @@ -47,7 +47,7 @@ OP( 0x0f, i_pre_nec ) { uint32_t ModRM, tmp, tmp2; case 0x33 : ModRM = fetch(); ModRM=0; logerror("%06x: Unimplemented bitfield EXT\n",PC()); break; case 0xe0 : BRKXA(true); CLK(12); break; case 0xf0 : BRKXA(false); CLK(12); break; - case 0xff : ModRM = fetch(); ModRM=0; logerror("%06x: unimplemented BRKEM (break to 8080 emulation mode)\n",PC()); break; + case 0xff : BRKEM; CLK(50); break; default: logerror("%06x: Unknown V20 instruction\n",PC()); break; } } diff --git a/src/devices/cpu/nec/necmacro.h b/src/devices/cpu/nec/necmacro.h index 582c233979f..ecde5766897 100644 --- a/src/devices/cpu/nec/necmacro.h +++ b/src/devices/cpu/nec/necmacro.h @@ -53,6 +53,22 @@ SetSZPF_Word(tmp1); \ Wreg(Reg)=tmp1 +#define IncByteReg(Reg) \ + unsigned tmp = (unsigned)Breg(Reg); \ + unsigned tmp1 = tmp+1; \ + m_OverVal = (tmp == 0x7f); \ + SetAF(tmp1,tmp,1); \ + SetSZPF_Byte(tmp1); \ + Breg(Reg)=tmp1 + +#define DecByteReg(Reg) \ + unsigned tmp = (unsigned)Breg(Reg); \ + unsigned tmp1 = tmp-1; \ + m_OverVal = (tmp == 0x80); \ + SetAF(tmp1,tmp,1); \ + SetSZPF_Byte(tmp1); \ + Breg(Reg)=tmp1 + #define JMP(flag) \ int tmp; \ EMPTY_PREfetch(); \ diff --git a/src/devices/cpu/nec/necpriv.h b/src/devices/cpu/nec/necpriv.h index b21ccb1d901..474a95382dc 100644 --- a/src/devices/cpu/nec/necpriv.h +++ b/src/devices/cpu/nec/necpriv.h @@ -84,7 +84,11 @@ enum BREGS { #define PUSH(val) { Wreg(SP) -= 2; write_mem_word(((Sreg(SS)<<4)+Wreg(SP)), val); } #define POP(var) { Wreg(SP) += 2; var = read_mem_word(((Sreg(SS)<<4) + ((Wreg(SP)-2) & 0xffff))); } +#define PUSH80(val) { Wreg(BP) -= 2; write_mem_word(((Sreg(DS0)<<4)+Wreg(BP)), val); } +#define POP80(var) { Wreg(BP) += 2; var = read_mem_word(((Sreg(DS0)<<4) + ((Wreg(BP)-2) & 0xffff))); } + #define BRKXA(xa) { if (m_chip_type == V33_TYPE) { nec_brk(fetch()); m_xa = xa; } else logerror("%06x: %sXA instruction is V33 exclusive\n", PC(), xa ? "BRK" : "RET"); } +#define BRKEM { if (m_chip_type == V33_TYPE) logerror("%06x: BRKEM not supported on V33\n",PC()); else nec_brk(fetch()); } #define GetModRM uint32_t ModRM=fetch() @@ -122,5 +126,5 @@ enum BREGS { m_IF = ((f) & 0x0200) == 0x0200; \ m_DF = ((f) & 0x0400) == 0x0400; \ m_OverVal = (f) & 0x0800; \ - m_MF = ((f) & 0x8000) == 0x8000; \ + m_MF = (((f) & 0x8000) == 0x8000) || m_em; \ } diff --git a/src/devices/cpu/nec/v25.cpp b/src/devices/cpu/nec/v25.cpp index 952cff5bd0c..e6d948dc5ee 100644 --- a/src/devices/cpu/nec/v25.cpp +++ b/src/devices/cpu/nec/v25.cpp @@ -513,7 +513,7 @@ void v25_common_device::execute_set_input(int irqline, int state) std::unique_ptr<util::disasm_interface> v25_common_device::create_disassembler() { - return std::make_unique<nec_disassembler>(m_v25v35_decryptiontable); + return std::make_unique<nec_disassembler>(this, m_v25v35_decryptiontable); } void v25_common_device::device_start() diff --git a/src/devices/cpu/nec/v25.h b/src/devices/cpu/nec/v25.h index 4e1abc14683..6669006886d 100644 --- a/src/devices/cpu/nec/v25.h +++ b/src/devices/cpu/nec/v25.h @@ -6,6 +6,7 @@ #pragma once +#include "necdasm.h" #define NEC_INPUT_LINE_INTP0 10 #define NEC_INPUT_LINE_INTP1 11 @@ -21,7 +22,7 @@ enum V25_PENDING }; -class v25_common_device : public cpu_device +class v25_common_device : public cpu_device, public nec_disassembler::config { public: // configuration helpers @@ -68,6 +69,7 @@ protected: // device_disasm_interface overrides virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; + virtual int get_mode() const override { return 1; }; private: address_space_config m_program_config; diff --git a/src/devices/cpu/nec/v25priv.h b/src/devices/cpu/nec/v25priv.h index 018bd5c94d9..e212314d1d9 100644 --- a/src/devices/cpu/nec/v25priv.h +++ b/src/devices/cpu/nec/v25priv.h @@ -142,6 +142,7 @@ enum BREGS { #define POP(var) { Wreg(SP) += 2; var = read_mem_word(((Sreg(SS)<<4) + ((Wreg(SP)-2) & 0xffff))); } #define BRKXA(xa) { logerror("%06x: %sXA instruction is V33 exclusive\n", PC(), xa ? "BRK" : "RET"); } +#define BRKEM #define GetModRM uint32_t ModRM=fetch() diff --git a/src/devices/cpu/v30mz/v30mz.cpp b/src/devices/cpu/v30mz/v30mz.cpp index 7c0e767da75..c556f3f01f3 100644 --- a/src/devices/cpu/v30mz/v30mz.cpp +++ b/src/devices/cpu/v30mz/v30mz.cpp @@ -1307,7 +1307,7 @@ void v30mz_cpu_device::execute_set_input( int inptnum, int state ) std::unique_ptr<util::disasm_interface> v30mz_cpu_device::create_disassembler() { - return std::make_unique<nec_disassembler>(); + return std::make_unique<nec_disassembler>(this); } diff --git a/src/devices/cpu/v30mz/v30mz.h b/src/devices/cpu/v30mz/v30mz.h index cda0dd8cd91..5e575ba8dc2 100644 --- a/src/devices/cpu/v30mz/v30mz.h +++ b/src/devices/cpu/v30mz/v30mz.h @@ -3,6 +3,7 @@ #ifndef MAME_CPU_V32MZ_V30MZ_H #define MAME_CPU_V32MZ_V30MZ_H +#include "cpu/nec/necdasm.h" struct nec_config { @@ -22,7 +23,7 @@ enum DECLARE_DEVICE_TYPE(V30MZ, v30mz_cpu_device) -class v30mz_cpu_device : public cpu_device +class v30mz_cpu_device : public cpu_device, public nec_disassembler::config { public: // construction/destruction @@ -49,6 +50,7 @@ protected: // device_disasm_interface overrides virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; + virtual int get_mode() const override { return 1; }; void interrupt(int int_num); diff --git a/src/tools/unidasm.cpp b/src/tools/unidasm.cpp index 7f8a34190a1..4b420b90853 100644 --- a/src/tools/unidasm.cpp +++ b/src/tools/unidasm.cpp @@ -297,6 +297,14 @@ struct hyperstone_unidasm_t : hyperstone_disassembler::config virtual bool get_h() const { return h; } } hyperstone_unidasm; +// Configuration missing +struct nec_unidasm_t : nec_disassembler::config +{ + int mode; + nec_unidasm_t() { mode = 1; } + virtual ~nec_unidasm_t() override = default; + virtual int get_mode() const override { return mode; } +} nec_unidasm; enum endianness { le, be }; @@ -461,7 +469,7 @@ static const dasm_table_entry dasm_table[] = { "mips3le", le, 0, []() -> util::disasm_interface * { return new mips3_disassembler; } }, { "mn10200", le, 0, []() -> util::disasm_interface * { return new mn10200_disassembler; } }, { "nanoprocessor", le, 0, []() -> util::disasm_interface * { return new hp_nanoprocessor_disassembler; } }, - { "nec", le, 0, []() -> util::disasm_interface * { return new nec_disassembler; } }, + { "nec", le, 0, []() -> util::disasm_interface * { return new nec_disassembler(&nec_unidasm); } }, { "ns32000", le, 0, []() -> util::disasm_interface * { return new ns32000_disassembler; } }, { "nuon", be, 0, []() -> util::disasm_interface * { return new nuon_disassembler; } }, { "nsc8105", be, 0, []() -> util::disasm_interface * { return new m680x_disassembler(8105); } }, |