diff options
60 files changed, 6040 insertions, 1411 deletions
diff --git a/hash/hp_ipc.xml b/hash/hp_ipc.xml new file mode 100644 index 00000000000..b5f64a99549 --- /dev/null +++ b/hash/hp_ipc.xml @@ -0,0 +1,461 @@ +<?xml version="1.0"?> +<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd"> +<softwarelist name="hp_ipc" description="HP Integral PC diskettes"> + + <software name="memomakr"> + <description>MemoMaker for Integral</description> + <year>1984</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="652950"> + <rom name="ipcmemom.td0" size="652950" crc="41dd72a2" sha1="1bd3dde57a83a09dbd8ad2f18e52f7d96ee45f63" offset="0" /> + </dataarea> + </part> + </software> + + <software name="multipln"> + <description>Multiplan for Integral</description> + <year>1984</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="172162"> + <rom name="multipl.td0" size="172162" crc="e8e929d7" sha1="2ddbab7b6683fd2ba30238fb013ff2f25c1bcdd7" offset="0" /> + </dataarea> + </part> + </software> + + <software name="basic_r5"> + <description>Integral BASIC Release 5</description> + <year>1984</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="602609"> + <rom name="intbasic.td0" size="602609" crc="49a70601" sha1="f884a3ff678b57167451a269d1b551374614f679" offset="0" /> + </dataarea> + </part> + </software> + + <software name="datacomm"> + <description>Datacomm r1.0.1</description> + <year>1984</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="220544"> + <rom name="ipcdatac.td0" size="220544" crc="97c35bcb" sha1="a4e006459b24400383c2e136645ae5ab863e7483" offset="0" /> + </dataarea> + </part> + </software> + + <software name="ipccdoc"> + <description>C Language 1of3 (docs)</description> + <year>1984</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="456537"> + <rom name="ipccdoc.td0" size="456537" crc="5c90332c" sha1="1f1a971e99d929a45d28654d6c32dbfeb20feb4d" offset="0" /> + </dataarea> + </part> + </software> + + <software name="ipccprep"> + <description>C Language 2of3 (preprocessor)</description> + <year>1984</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="554063"> + <rom name="ipccprep.td0" size="554063" crc="f80fb865" sha1="547aa6174d4c0e08cc9005bb3c59fc88c288c8a1" offset="0" /> + </dataarea> + </part> + </software> + + <software name="ipcctran"> + <description>C Language 3of3 (translator)</description> + <year>1984</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="452140"> + <rom name="ipcctran.td0" size="452140" crc="ef2494e0" sha1="ffd764fd701f4ffe896b919b18dc3474eff95f2a" offset="0" /> + </dataarea> + </part> + </software> + + <software name="basicut"> + <description>HP-UX BASIC Utilities for Integral</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="218967"> + <rom name="basicut.td0" size="218967" crc="bd92ec7a" sha1="611eea08494ce123052453cd8cf45ce6fcc3e09f" offset="0" /> + </dataarea> + </part> + </software> + + <software name="ipcforut"> + <description>FORTRAN r5.0.0 1of2 (utilities)</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="581442"> + <rom name="ipcforut.td0" size="581442" crc="fb7c2093" sha1="2d8492a8c74e06c405998d848826a4fd139cf6fe" offset="0" /> + </dataarea> + </part> + </software> + + <software name="ipcforcp"> + <description>FORTRAN r5.0.0 2of2 (translator)</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="549753"> + <rom name="ipcforcp.td0" size="549753" crc="a4a8c914" sha1="ec76c80f81e0b55843ff4028baacb0137b94ec84" offset="0" /> + </dataarea> + </part> + </software> + + <software name="lisppilt"> + <description>LISP and PILOT Languages</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="565866"> + <rom name="lisppilt.td0" size="565866" crc="096d357b" sha1="3c4cbd4ddbb39ff02e0844ab5de36f1aaa418598" offset="0" /> + </dataarea> + </part> + </software> + + <software name="tksolve"> + <description>Tk!Solver</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="190676"> + <rom name="tksolve.td0" size="190676" crc="76d7752e" sha1="024ae038239c651898e9df62ce8a1256a73ea542" offset="0" /> + </dataarea> + </part> + </software> + + <software name="diagpgrm"> + <description>Diagraph for Integral 1of2 (program)</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="634074"> + <rom name="diagpgrm.td0" size="634074" crc="7963e6fa" sha1="e9b65d758fbb9d5d68b21d5fb05dcd72c8d38f0e" offset="0" /> + </dataarea> + </part> + </software> + + <software name="diagsymb"> + <description>Diagraph for Integral 2of2 (symbols)</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="690608"> + <rom name="diagsymb.td0" size="690608" crc="8f038cd1" sha1="5006444a81ac785db5e448a63c741ab3218084ea" offset="0" /> + </dataarea> + </part> + </software> + + <software name="microtrk"> + <description>MicroTrak v1.4f</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="111659"> + <rom name="ipcmictk.td0" size="111659" crc="6be07a20" sha1="4d0a60c1bd2e7c83b648270154d5c6fed8b2696a" offset="0" /> + </dataarea> + </part> + </software> + + <software name="ipcpascp"> + <description>PASCAL v5.0 1of2 (compiler)</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="670738"> + <rom name="ipcpascp.td0" size="670738" crc="3c33177e" sha1="37f9a461d15961b436fddc6890710005a7438c5c" offset="0" /> + </dataarea> + </part> + </software> + + <software name="ipcpasdc"> + <description>PASCAL v5.0 2of2 (docs)</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="557887"> + <rom name="ipcpasdc.td0" size="557887" crc="873b0f30" sha1="aa1e9c73b213780862567eced9073a843900304f" offset="0" /> + </dataarea> + </part> + </software> + + <software name="ipcforth"> + <description>FORTH v1.0 for Integral</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="296521"> + <rom name="ipcforth.td0" size="296521" crc="13b25447" sha1="bb8f08a8247ad5d6743832d949bf19fb789b0aac" offset="0" /> + </dataarea> + </part> + </software> + + <software name="tutor"> + <description>Utility Discs for Integral 1of6 (Tutor)</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="404018"> + <rom name="tutor.td0" size="404018" crc="c5af6ff5" sha1="47eb431f609fcc6f87d3a7b5c9cafb7f9c232135" offset="0" /> + </dataarea> + </part> + </software> + + <software name="utilitie"> + <description>Utility Discs for Integral 2of6 (Utilities)</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="571098"> + <rom name="utilitie.td0" size="571098" crc="1f9420ad" sha1="97ef267109214f2bdc183032f4d87bd1cc0e7be3" offset="0" /> + </dataarea> + </part> + </software> + + <software name="diagnstc"> + <description>Utility Discs for Integral 3of6 (Diagnostic)</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="206296"> + <rom name="diagnstc.td0" size="206296" crc="e3b7461e" sha1="276f82b1b4cc1bb4cf8a40311afa3ee15716004c" offset="0" /> + </dataarea> + </part> + </software> + + <software name="sysmdisc"> + <description>Utility Discs for Integral 4of6 (System Disc)</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="325235"> + <rom name="sysmdisc.td0" size="325235" crc="5773decd" sha1="46a23f0fb2c4ea9b738ee68390bb349dd738ae6b" offset="0" /> + </dataarea> + </part> + </software> + + <software name="hp_ux1"> + <description>Utility Discs for Integral 5of6 (HP-UX Commands 1)</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="626512"> + <rom name="hp-ux1.td0" size="626512" crc="cf5da5fa" sha1="4bde09a9d37f5f8f6e55925f2428c342d95db19c" offset="0" /> + </dataarea> + </part> + </software> + + <software name="hp_ux2"> + <description>Utility Discs for Integral 6of6 (HP-UX Commands 2)</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="648152"> + <rom name="hp-ux2.td0" size="648152" crc="9f843794" sha1="de4b2276aba66d4c28e9bb44db60c62472ec6441" offset="0" /> + </dataarea> + </part> + </software> + + <software name="intgame1"> + <description>Integral Games 1of3</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="683944"> + <rom name="intgame1.td0" size="683944" crc="f142dece" sha1="a6436079839667456be5f7dfd05978b1c7290d71" offset="0" /> + </dataarea> + </part> + </software> + + <software name="intgame2"> + <description>Integral Games 2of3</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="389053"> + <rom name="intgame2.td0" size="389053" crc="8e4b6266" sha1="3a5727367f580a4d8b2109ba880147f5c3025d62" offset="0" /> + </dataarea> + </part> + </software> + + <software name="intgame3"> + <description>Integral Games 3of3</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="184147"> + <rom name="intgame3.td0" size="184147" crc="a78f471d" sha1="9020b09ee1a256b2d085cc886d5998e2b2dc9d23" offset="0" /> + </dataarea> + </part> + </software> + + <software name="inthack"> + <description>Hack 3.0.2 for Integral</description> + <year>1985</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="548830"> + <rom name="inthack.td0" size="548830" crc="6a371529" sha1="de37526aabfc4c326a3bd89a0f5b5d9fd830b915" offset="0" /> + </dataarea> + </part> + </software> + + <software name="plotrack"> + <description>PlotTrack Rev 1.2b</description> + <year>1986</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="297583"> + <rom name="plotrack.td0" size="297583" crc="b9b5975c" sha1="1a315b196cd353e1d2d79a5e8b84e935b8f99a72" offset="0" /> + </dataarea> + </part> + </software> + + <software name="ipcromtl"> + <description>EPROM/ROM Tools r5.0</description> + <year>1986</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="400488"> + <rom name="ipcromtl.td0" size="400488" crc="1c302801" sha1="8341446066be25649357614dd4aa937eb66f118e" offset="0" /> + </dataarea> + </part> + </software> + + <software name="ipcapl"> + <description>APL Plus v3.0 1of2</description> + <year>1986</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="486723"> + <rom name="ipcapl.td0" size="486723" crc="1413db63" sha1="9b6e7f5f6fa66ecfad4071fd460b0faa20eb06ca" offset="0" /> + </dataarea> + </part> + </software> + + <software name="ipcaplw"> + <description>APL Plus v3.0 2of2</description> + <year>1986</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="381652"> + <rom name="ipcaplw.td0" size="381652" crc="ede2be4d" sha1="8f85f6e4e4238fa9f21efc3beea82860157884ee" offset="0" /> + </dataarea> + </part> + </software> + + <software name="ipctranu"> + <description>PC File Translation Utilities</description> + <year>1986</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="641077"> + <rom name="ipctranu.td0" size="641077" crc="6d3d5de7" sha1="b1b27f9846544dbcaa8442140bdad7b29c61fcc0" offset="0" /> + </dataarea> + </part> + </software> + + <software name="ipcsuput"> + <description>Super Utilities (LIF format file!)</description> + <year>1986</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="587264"> + <rom name="ipcsuput.td0" size="587264" crc="15a881cd" sha1="c4673a2f7188ea0b29b8a4d9bd4a60856ed8f3d2" offset="0" /> + </dataarea> + </part> + </software> + + <software name="ipcart"> + <description>Graphics, Text and Misc Utilities</description> + <year>1987</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="534655"> + <rom name="ipcart.td0" size="534655" crc="fc6070bc" sha1="794216f066e1ae77c4d331b5cdb66c7735fffeaf" offset="0" /> + </dataarea> + </part> + </software> + + <software name="ipcbasbn"> + <description>BASIC Bonus Disc</description> + <year>1987</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="413321"> + <rom name="ipcbasbn.td0" size="413321" crc="b6d8f987" sha1="3bce09a5e53e64f0ad602b67016b035f1266b910" offset="0" /> + </dataarea> + </part> + </software> + + <software name="ipcdwd"> + <description>Driver Writers Disc</description> + <year>1987</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="641039"> + <rom name="ipcdwd.td0" size="641039" crc="1e604853" sha1="ac5d69917a026a70ce8142d12a401279e627554c" offset="0" /> + </dataarea> + </part> + </software> + + <software name="ipcmandl"> + <description>Mandelbrot</description> + <year>1988</year> + <publisher>???</publisher> + + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size="285987"> + <rom name="ipcmandl.td0" size="285987" crc="e31c0a41" sha1="59045fcecc336b048595d589815cfb301c594389" offset="0" /> + </dataarea> + </part> + </software> + +</softwarelist> diff --git a/hash/ibm5150.xml b/hash/ibm5150.xml index d2a2ccc94a8..0b4f6e1edff 100644 --- a/hash/ibm5150.xml +++ b/hash/ibm5150.xml @@ -2702,6 +2702,310 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went </part> </software> + <software name="msword1d"> + <description>Word (PC World Demo)</description> + <year>1983</year> + <publisher>Microsoft</publisher> + <part name="flop1" interface="floppy_5_25"> + <dataarea name="flop" size = "163840"> + <rom name="worddemo.img" size="163840" crc="c3004ad2" sha1="24b4d7894bbfa335de49f968c86758f43a82a00c" offset="0"/> + </dataarea> + </part> + </software> + + <software name="msword3"> + <description>Word 3.0 (6-23-86)</description> + <year>1986</year> + <publisher>Microsoft</publisher> + <info name="version" value="3.00" /> + <part name="flop1" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="Disk01.img" size="368640" crc="5b63c742" sha1="3a981e0a6835b9a2d1f3db40a53b20d1815264d7" offset="0"/> + </dataarea> + </part> + <part name="flop2" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="Disk02.img" size="368640" crc="8f164895" sha1="b552d0164babca85e10d9eb0eb287ebaabf63e96" offset="0"/> + </dataarea> + </part> + <part name="flop3" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="Disk03.img" size="368640" crc="ad890b26" sha1="99a37abd36ae8f016bd54d3bb0ab3b3a1ed5983b" offset="0"/> + </dataarea> + </part> + <part name="flop4" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="Disk04.img" size="368640" crc="f4dafa3b" sha1="e788f8f9778ea97a556fe4f14ab0a684bf7ab6c8" offset="0"/> + </dataarea> + </part> + <part name="flop5" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="Disk05.img" size="368640" crc="0428a8c5" sha1="8390cf8b728fbad8f8c7c0908d2208379afd358a" offset="0"/> + </dataarea> + </part> + <part name="flop6" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="Disk06.img" size="368640" crc="4c9b966b" sha1="caad8e07790a85db5c89831b25ccc5b941ea741f" offset="0"/> + </dataarea> + </part> + </software> + + <software name="msword3a" cloneof="msword3"> + <description>Word 3.0 (4-10-86)</description> + <year>1986</year> + <publisher>Microsoft</publisher> + <info name="version" value="3.00" /> + <part name="flop1" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="Disk01a.img" size="368640" crc="058ae09c" sha1="4cc7d7c4c0ec84c1854f50cb22f2989e3a5d6005" offset="0"/> + </dataarea> + </part> + <part name="flop2" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="Disk02.img" size="368640" crc="8f164895" sha1="b552d0164babca85e10d9eb0eb287ebaabf63e96" offset="0"/> + </dataarea> + </part> + <part name="flop3" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="Disk03.img" size="368640" crc="ad890b26" sha1="99a37abd36ae8f016bd54d3bb0ab3b3a1ed5983b" offset="0"/> + </dataarea> + </part> + <part name="flop4" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="Disk04a.img" size="368640" crc="84d614d6" sha1="e40e0040d5eca604e1ec80eec2e661ba51a0701b" offset="0"/> + </dataarea> + </part> + <part name="flop5" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="Disk05.img" size="368640" crc="0428a8c5" sha1="8390cf8b728fbad8f8c7c0908d2208379afd358a" offset="0"/> + </dataarea> + </part> + <part name="flop6" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="Disk06a.img" size="368640" crc="b237925e" sha1="0716511c4084fe8a43b771e90a9b99f9bd9263df" offset="0"/> + </dataarea> + </part> + </software> + + <software name="msword3dem" cloneof="msword3"> + <description>Word 3.0 Demonstration</description> + <year>1986</year> + <publisher>Microsoft</publisher> + <info name="version" value="3.00" /> + <part name="flop1" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="MS Word 3.0 preview.img" size="368640" crc="31c38dd9" sha1="dbcd579164186a317cf70f3ecb6c092a32c888c1" offset="0"/> + </dataarea> + </part> + </software> + + <software name="msword31"> + <description>Word 3.1 (5.25")</description> + <year>1986</year> + <publisher>Microsoft</publisher> + <info name="version" value="3.10" /> + <part name="flop1" interface="floppy_5_25"> + <feature name="part_id" value="Word Program" /> + <dataarea name="flop" size = "368640"> + <rom name="Disk01.img" size="368640" crc="2ea91be6" sha1="a7a7499c55b527e0d5fe925a04069ffacf060f94" offset="0"/> + </dataarea> + </part> + <part name="flop2" interface="floppy_5_25"> + <feature name="part_id" value="Spell Disk" /> + <dataarea name="flop" size = "368640"> + <rom name="Disk02.img" size="368640" crc="c18ca306" sha1="c201f9f970fa0f8733a59a6808d244606939fdcb" offset="0"/> + </dataarea> + </part> + <part name="flop3" interface="floppy_5_25"> + <feature name="part_id" value="Thesaurus" /> + <dataarea name="flop" size = "368640"> + <rom name="Disk03.img" size="368640" crc="e097dbac" sha1="fe6638c21c6b8a00e5fc69dc15ec21bd3f1ee91e" offset="0"/> + </dataarea> + </part> + <part name="flop4" interface="floppy_5_25"> + <feature name="part_id" value="Utilities" /> + <dataarea name="flop" size = "368640"> + <rom name="Disk04.img" size="368640" crc="6220d6de" sha1="b6cc22cd978c11bc70a1a529801fcf66a3b3f21f" offset="0"/> + </dataarea> + </part> + <part name="flop5" interface="floppy_5_25"> + <feature name="part_id" value="Printers 1" /> + <dataarea name="flop" size = "368640"> + <rom name="Disk05.img" size="368640" crc="32cdf3b8" sha1="6cfc7bdf41c636a565cf434ca34631f39e05cdd1" offset="0"/> + </dataarea> + </part> + <part name="flop6" interface="floppy_5_25"> + <feature name="part_id" value="Printers 2" /> + <dataarea name="flop" size = "368640"> + <rom name="Disk06.img" size="368640" crc="5fdc4f51" sha1="c8847fdfc7b639ece4d37299ed210dd96ed001c2" offset="0"/> + </dataarea> + </part> + <part name="flop7" interface="floppy_5_25"> + <feature name="part_id" value="Learn Mouse" /> + <dataarea name="flop" size = "368640"> + <rom name="Disk07.img" size="368640" crc="22a7a4b6" sha1="c4b5c2d325a58d4c53fb6b908719142c50c066fa" offset="0"/> + </dataarea> + </part> + <part name="flop8" interface="floppy_5_25"> + <feature name="part_id" value="Learn Keyboard" /> + <dataarea name="flop" size = "368640"> + <rom name="Disk08.img" size="368640" crc="418bedd0" sha1="171f5c2c504522b1e0949194d69c7cc4acbfb855" offset="0"/> + </dataarea> + </part> + </software> + + <software name="msword31_35" cloneof="msword31"> + <description>Word 3.11 (3.5")</description> + <year>1986</year> + <publisher>Microsoft</publisher> + <info name="version" value="3.11" /> + <part name="flop1" interface="floppy_3_5"> + <feature name="part_id" value="Program, Thesaurus" /> + <dataarea name="flop" size = "737280"> + <rom name="Program, Thesaurus.img" size="737280" crc="60653d3a" sha1="5870c549bcd4b57c6488fe756251a9de52de2144" offset="0"/> + </dataarea> + </part> + <part name="flop2" interface="floppy_3_5"> + <feature name="part_id" value="Setup, Utilities, Spell" /> + <dataarea name="flop" size = "737280"> + <rom name="Setup, Utilities, Spell.img" size="737280" crc="fd5aab9a" sha1="1695a10e308c8e3cf5e6b35d5f7f4cd962a10c1f" offset="0"/> + </dataarea> + </part> + <part name="flop3" interface="floppy_3_5"> + <feature name="part_id" value="Printers" /> + <dataarea name="flop" size = "737280"> + <rom name="Printers.img" size="737280" crc="ed9de1d4" sha1="06e10f0b88845ca2aec997d25243d4b72f205802" offset="0"/> + </dataarea> + </part> + <part name="flop4" interface="floppy_3_5"> + <feature name="part_id" value="Learning" /> + <dataarea name="flop" size = "737280"> + <rom name="Learning.img" size="737280" crc="e05bfc06" sha1="b86dcba316469d864c0761e7a99eddc735516227" offset="0"/> + </dataarea> + </part> + </software> + + <software name="msword4"> + <description>Word 4.0 (5.25")</description> + <year>1987</year> + <publisher>Microsoft</publisher> + <part name="flop1" interface="floppy_5_25"> + <feature name="part_id" value="Word Program" /> + <dataarea name="flop" size = "368640"> + <rom name="Disk01.img" size="368640" crc="fd013952" sha1="dec5a1dea21472500fc3a3b4264bfc6fbbcc3659" offset="0"/> + </dataarea> + </part> + <part name="flop2" interface="floppy_5_25"> + <feature name="part_id" value="Spell" /> + <dataarea name="flop" size = "368640"> + <rom name="Disk02.img" size="368640" crc="216c9e20" sha1="97304d3278b5131eb353628d38ebf0341af4e6e4" offset="0"/> + </dataarea> + </part> + <part name="flop3" interface="floppy_5_25"> + <feature name="part_id" value="Thesaurus" /> + <dataarea name="flop" size = "368640"> + <rom name="Disk03.img" size="368640" crc="3c8f7031" sha1="a144debd293ced7b5a139f617cf2a7019357dcfe" offset="0"/> + </dataarea> + </part> + <part name="flop4" interface="floppy_5_25"> + <feature name="part_id" value="Utilities" /> + <dataarea name="flop" size = "368640"> + <rom name="Disk04.img" size="368640" crc="d722a2cb" sha1="027cd6936777af5ea490c5d859114e15c50bbf34" offset="0"/> + </dataarea> + </part> + <part name="flop5" interface="floppy_5_25"> + <feature name="part_id" value="Printer 1" /> + <dataarea name="flop" size = "368640"> + <rom name="Disk05.img" size="368640" crc="8f8567ef" sha1="5db06b563135dd36e15be8d0583990d695f8171f" offset="0"/> + </dataarea> + </part> + <part name="flop6" interface="floppy_5_25"> + <feature name="part_id" value="Printer 2" /> + <dataarea name="flop" size = "368640"> + <rom name="Disk06.img" size="368640" crc="5417cd99" sha1="1c75513b6e1de5d21422398334445e7943922598" offset="0"/> + </dataarea> + </part> + </software> + + <software name="msword4_35" cloneof="msword4"> + <description>Word 4.0 (3.5")</description> + <year>1987</year> + <publisher>Microsoft</publisher> + <info name="version" value="4.00" /> + <part name="flop1" interface="floppy_3_5"> + <feature name="part_id" value="Program, Thesaurus" /> + <dataarea name="flop" size = "737280"> + <rom name="Word 4 disk1.img" size="737280" crc="75d0eb50" sha1="3c8e076682749b1d66a7d9b44f22c76415a7db2b" offset="0"/> + </dataarea> + </part> + <part name="flop2" interface="floppy_3_5"> + <feature name="part_id" value="Spell, Utilities" /> + <dataarea name="flop" size = "737280"> + <rom name="Word 4 disk2.img" size="737280" crc="ad7ed55b" sha1="85aa0e7785709821b301ecc454dd9f5a4db52e3d" offset="0"/> + </dataarea> + </part> + <part name="flop3" interface="floppy_3_5"> + <feature name="part_id" value="Printers" /> + <dataarea name="flop" size = "737280"> + <rom name="Word 4 disk3.img" size="737280" crc="4b7e3a41" sha1="cd91bb567b792bcf0e8bcaf1f6876fd18be4c70a" offset="0"/> + </dataarea> + </part> + <part name="flop4" interface="floppy_3_5"> + <feature name="part_id" value="Learn disk 1" /> + <dataarea name="flop" size = "737280"> + <rom name="Word 4 Learn disk 1.img" size="737280" crc="443ada90" sha1="4e6830b661e62c69ac9f501b45d0dbba8e0db210" offset="0"/> + </dataarea> + </part> + <part name="flop5" interface="floppy_3_5"> + <feature name="part_id" value="Learn disk 2" /> + <dataarea name="flop" size = "737280"> + <rom name="Word 4 Learn disk 2.img" size="737280" crc="a7a8a3ca" sha1="ccdca131ed512f546289debd308527b390303162" offset="0"/> + </dataarea> + </part> + </software> + + <software name="msword4sv" cloneof="msword4"> + <description>Word 4.0 (Swedish)</description> + <year>1988</year> + <publisher>Microsoft</publisher> + <part name="flop1" interface="floppy_5_25"> + <feature name="part_id" value="Programdiskett" /> + <dataarea name="flop" size = "368640"> + <rom name="Programdiskett.img" size="368640" crc="7bc313fd" sha1="7d6b956fb04c92a46eeb2a55de272b9cd1190507" offset="0"/> + </dataarea> + </part> + <part name="flop2" interface="floppy_5_25"> + <feature name="part_id" value="Stavningsprogram 1" /> + <dataarea name="flop" size = "368640"> + <rom name="Stavningsprogram 1.img" size="368640" crc="b3857087" sha1="49577c092e76a880bd1128bccd933d02619ab798" offset="0"/> + </dataarea> + </part> + <part name="flop3" interface="floppy_5_25"> + <feature name="part_id" value="Stavningsprogram 2" /> + <dataarea name="flop" size = "368640"> + <rom name="Stavningsprogram 2.img" size="368640" crc="da0290d7" sha1="c9c2dcad732e6534211872be4db65892ca8612c9" offset="0"/> + </dataarea> + </part> + <part name="flop4" interface="floppy_5_25"> + <feature name="part_id" value="Tilläggsprogram" /> + <dataarea name="flop" size = "368640"> + <rom name="Tillaggsprogram.img" size="368640" crc="0018212a" sha1="f241d214f3bfac37392fc6b0ba16582da02f88f0" offset="0"/> + </dataarea> + </part> + <part name="flop5" interface="floppy_5_25"> + <feature name="part_id" value="Skrivare 1" /> + <dataarea name="flop" size = "368640"> + <rom name="Skrivare 1.img" size="368640" crc="fb7dd96f" sha1="bb8e512c5d25c2827a332803eb3917486ce91a9e" offset="0"/> + </dataarea> + </part> + <part name="flop6" interface="floppy_5_25"> + <feature name="part_id" value="Skrivare 2" /> + <dataarea name="flop" size = "368640"> + <rom name="Skrivare 2.img" size="368640" crc="cc1b0806" sha1="3f0626794d6607bb3572e749849e8825c3ab50c4" offset="0"/> + </dataarea> + </part> + </software> + <!-- SDK --> <software name="win13sdk"> @@ -3062,6 +3366,55 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went </part> </software> + <software name="goldrush"> + <description>Gold Rush (Version 2.01, 5.25")</description> + <year>1988</year> + <publisher>Sierra</publisher> + <info name="version" value="2.01" /> + <part name="flop1" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="Gold Rush [1988] [Sierra On-Line] [5.25] [1 of 5].ima" size="368640" crc="1120e384" sha1="8b80213593f8d76f7903380e5003904a0232beea" offset="0"/> + </dataarea> + </part> + <part name="flop2" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="Gold Rush [1988] [Sierra On-Line] [5.25] [2 of 5].ima" size="368640" crc="ae812659" sha1="af0a62d6ab8882bf1c517756394395c8304653f3" offset="0"/> + </dataarea> + </part> + <part name="flop3" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="Gold Rush [1988] [Sierra On-Line] [5.25] [3 of 5].ima" size="368640" crc="6c6d7d41" sha1="e379988de70cf4d6be9d151b70927ff21e560189" offset="0"/> + </dataarea> + </part> + <part name="flop4" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="Gold Rush [1988] [Sierra On-Line] [5.25] [4 of 5].ima" size="368640" crc="eb1ca8f0" sha1="d6b916f003e01af904c57ddd9ee0f76cd00200b7" offset="0"/> + </dataarea> + </part> + <part name="flop5" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="Gold Rush [1988] [Sierra On-Line] [5.25] [5 of 5].ima" size="368640" crc="ad940acf" sha1="592edc5c1da10fcfb689bc89660cf120a7e15102" offset="0"/> + </dataarea> + </part> + </software> + + <software name="goldrush35" cloneof="goldrush"> + <description>Gold Rush (Version 2.01, 3.5")</description> + <year>1988</year> + <publisher>Sierra</publisher> + <info name="version" value="2.01" /> + <part name="flop1" interface="floppy_3_5"> + <dataarea name="flop" size = "737280"> + <rom name="Gold Rush [1988] [Sierra On-Line] [3.5] [1 of 2].ima" size="737280" crc="5d6de39c" sha1="3b230cc9456ff93cd08123606a2e05630ff73556" offset="0"/> + </dataarea> + </part> + <part name="flop2" interface="floppy_3_5"> + <dataarea name="flop" size = "737280"> + <rom name="Gold Rush [1988] [Sierra On-Line] [3.5] [2 of 2].ima" size="737280" crc="db6bcf7e" sha1="bafeaca31872785f4b7b22496beac2dc12816c72" offset="0"/> + </dataarea> + </part> + </software> + <software name="armorik"> <description>Les 8 Conquêtes d'Armorik le Viking</description> <year>1988</year> @@ -3400,4 +3753,29 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went </dataarea> </part> </software> + + <!-- Demoscene --> + + <software name="8088mph"> + <description>8088 MPH (Final Version)</description> + <year>2015</year> + <publisher>Hornet + CRTC + DESiRE</publisher> + <part name="flop1" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="8088mph final.360" size="368640" crc="a30504e8" sha1="5f637b83dca774b7104fed0d20195dd769e0838b" offset="0"/> + </dataarea> + </part> + </software> + + <software name="8088mphp" cloneof="8088mph"> + <description>8088 MPH (Revision 2015 Party version)</description> + <year>2015</year> + <publisher>Hornet + CRTC + DESiRE</publisher> + <part name="flop1" interface="floppy_5_25"> + <dataarea name="flop" size = "368640"> + <rom name="8088mph.360" size="368640" crc="4f5f4871" sha1="b7f61ad133edf7e80d2ccd0bc7767baf0b13f34d" offset="0"/> + </dataarea> + </part> + </software> + </softwarelist> diff --git a/hash/neogeo.xml b/hash/neogeo.xml index 1e559f4e242..85efc934b2e 100644 --- a/hash/neogeo.xml +++ b/hash/neogeo.xml @@ -4792,7 +4792,44 @@ </part> </software> - + <software name="rbff1k" cloneof="rbff1"> + <description>Real Bout Fatal Fury / Real Bout Garou Densetsu (Korean release)</description> + <year>1995</year> + <publisher>SNK</publisher> + <info name="serial" value="NGM-095 (MVS), NGH-095 (AES)"/> + <info name="release" value="19951221 (MVS), 19960126 (AES)"/> + <info name="alt_title" value="リアルバウト 餓狼伝説"/> + <sharedfeat name="release" value="MVS,AES" /> + <sharedfeat name="compatibility" value="MVS,AES" /> + <part name="cart" interface="neo_cart"> + <dataarea name="maincpu" width="16" endianness="big" size="0x300000"> + <rom loadflag="load16_word_swap" name="095-p1k.p1" offset="0x000000" size="0x100000" crc="f705364b" sha1="2668e15663a2c7ec7396f40e4f5f454505968ce8" /> <!-- TC538200 --> + <rom loadflag="load16_word_swap" name="095-p2.sp2" offset="0x100000" size="0x200000" crc="cc15826e" sha1="44d6ac6c0ca697a6f367dcfd809b1e1771cb0635" /> <!-- TC5316200 --> + </dataarea> + <dataarea name="fixed" size="0x040000"> + <rom offset="0x000000" size="0x020000" name="095-s1.s1" crc="b6bf5e08" sha1="b527355c35ea097f3448676f2ffa65b8e56ae30c" /> <!-- TC531000 --> + </dataarea> + <dataarea name="audiocpu" size="0x020000"> + <rom offset="0x000000" size="0x020000" name="095-m1.m1" crc="653492a7" sha1="39e511fb9ed5d2135dc8428a31d0baafb2ab36e0" /> <!-- TC531001 --> + </dataarea> + <dataarea name="ymsnd" size="0xc00000"> + <rom name="069-v1.v1" offset="0x000000" size="0x400000" crc="2bdbd4db" sha1="5f4fecf69c2329d699cbd45829c19303b1e2a80e" /> <!-- TC5332204 --> + <rom name="069-v2.v2" offset="0x400000" size="0x400000" crc="a698a487" sha1="11b8bc53bc26a51f4a408e900e3769958625c4ed" /> <!-- TC5332204 --> + <rom name="095-v3.v3" offset="0x800000" size="0x400000" crc="189d1c6c" sha1="f0b8cd1ee40ea3feeb2800f0723b451ec8240203" /> <!-- TC5332201 --> + </dataarea> + <dataarea name="sprites" size="0x1c00000"> + <rom loadflag="load16_byte" name="069-c1.c1" offset="0x000000" size="0x400000" crc="e302f93c" sha1="d8610b14900b2b8fe691b67ca9b1abb335dbff74" /> <!-- TC5332205 --> + <rom loadflag="load16_byte" name="069-c2.c2" offset="0x000001" size="0x400000" crc="1053a455" sha1="69501bfac68739e63d798045b812badd251d57b8" /> <!-- TC5332205 --> + <rom loadflag="load16_byte" name="069-c3.c3" offset="0x800000" size="0x400000" crc="1c0fde2f" sha1="cf6c2ef56c03a861de3b0b6dc0d7c9204d947f9d" /> <!-- TC5332205 --> + <rom loadflag="load16_byte" name="069-c4.c4" offset="0x800001" size="0x400000" crc="a25fc3d0" sha1="83cb349e2f1032652060b233e741fb893be5af16" /> <!-- TC5332205 --> + <rom loadflag="load16_byte" name="095-c5.c5" offset="0x1000000" size="0x400000" crc="8b9b65df" sha1="e2a7e20855501f240bcd22f5cc92fcb4a9806abe" /> <!-- TC5332202 --> + <rom loadflag="load16_byte" name="095-c6.c6" offset="0x1000001" size="0x400000" crc="3e164718" sha1="53217f938c8964c1ca68a6fd5249c4169a5ac8e6" /> <!-- TC5332202 --> + <rom loadflag="load16_byte" name="095-c7.c7" offset="0x1800000" size="0x200000" crc="ca605e12" sha1="5150b835247fd705bc1dece97d423d9c20a51416" /> <!-- TC5316200 --> + <rom loadflag="load16_byte" name="095-c8.c8" offset="0x1800001" size="0x200000" crc="4e6beb6c" sha1="c0ac7cfc832ace6ad52c58f5da3a8101baead749" /> <!-- TC5316200 --> + </dataarea> + </part> + </software> + <!-- ID-0096 . NGM-096 diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index 30393418485..4af0e78d6ab 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -2416,6 +2416,7 @@ if (BUSES["COCO"]~=null) then MAME_DIR .. "src/devices/bus/coco/coco_dwsock.cpp", MAME_DIR .. "src/devices/bus/coco/coco_dwsock.h", MAME_DIR .. "src/devices/bus/coco/dragon_fdc.cpp", + MAME_DIR .. "src/devices/bus/coco/coco_t4426.cpp", } end diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index 126d28ed524..af82ec72f1e 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -13,7 +13,7 @@ -- Dynamic recompiler objects -------------------------------------------------- -if (CPUS["SH2"]~=null or CPUS["MIPS"]~=null or CPUS["POWERPC"]~=null or CPUS["RSP"]~=null or CPUS["ARM7"]~=null or CPUS["ADSP21062"]~=null) then +if (CPUS["SH2"]~=null or CPUS["MIPS"]~=null or CPUS["POWERPC"]~=null or CPUS["RSP"]~=null or CPUS["ARM7"]~=null or CPUS["ADSP21062"]~=null or CPUS["MB86235"]~=null) then files { MAME_DIR .. "src/devices/cpu/drcbec.cpp", MAME_DIR .. "src/devices/cpu/drcbec.h", @@ -1064,6 +1064,9 @@ if (CPUS["MB86235"]~=null) then files { MAME_DIR .. "src/devices/cpu/mb86235/mb86235.cpp", MAME_DIR .. "src/devices/cpu/mb86235/mb86235.h", + MAME_DIR .. "src/devices/cpu/mb86235/mb86235drc.cpp", + MAME_DIR .. "src/devices/cpu/mb86235/mb86235fe.cpp", + MAME_DIR .. "src/devices/cpu/mb86235/mb86235fe.h", } end diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua index ea84fe73138..8a05a5c7825 100644 --- a/scripts/target/mame/arcade.lua +++ b/scripts/target/mame/arcade.lua @@ -2513,6 +2513,7 @@ files { MAME_DIR .. "src/mame/includes/mcr68.h", MAME_DIR .. "src/mame/machine/mcr68.cpp", MAME_DIR .. "src/mame/video/mcr68.cpp", + MAME_DIR .. "src/mame/drivers/zwackery.cpp", MAME_DIR .. "src/mame/drivers/midqslvr.cpp", MAME_DIR .. "src/mame/drivers/midtunit.cpp", MAME_DIR .. "src/mame/includes/midtunit.h", diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua index b2fa12977c0..63f393a2914 100644 --- a/scripts/target/mame/mess.lua +++ b/scripts/target/mame/mess.lua @@ -2443,6 +2443,7 @@ files { MAME_DIR .. "src/mame/drivers/pc.cpp", MAME_DIR .. "src/mame/drivers/pcipc.cpp", MAME_DIR .. "src/mame/drivers/tandy1t.cpp", + MAME_DIR .. "src/mame/drivers/tosh1000.cpp", MAME_DIR .. "src/mame/video/pc_t1t.cpp", MAME_DIR .. "src/mame/video/pc_t1t.h", } diff --git a/src/devices/bus/coco/coco_t4426.cpp b/src/devices/bus/coco/coco_t4426.cpp new file mode 100644 index 00000000000..4a1185e1d0c --- /dev/null +++ b/src/devices/bus/coco/coco_t4426.cpp @@ -0,0 +1,201 @@ +// license:BSD-3-Clause +// copyright-holders:Joakim Larsson Edstrom +/*************************************************************************** + * + * coco_t4426.c + * + * Terco T4426 CNC Programming Station multi cart + * + * The code here is heavily inspired by coco_pak and coco_232 + * + * +-------------------------------------------------------------------------------+ + * ||__|+-----+ oo 75 |O ||||||||||||||| O| | + * |XTL||MC | oo 110 | + * |1.8||14411| oo .. +--+ +--+ | + * |432||BRG | == 600 |74| |74| +------+ | + * |MHz|| | oo .. |LS| |LS| |MC1488| | + * +---+| | oo 7200 |139 |00| +------+ | + * | +-----+ oo 9600 +--+ +--+ +--+ | + * | +-------------+ |MC| | + * | +-----+ +-----+ +-----+ | EF68B50P | |14| | + * | | 2764| | 2764| | | | ACIA | |89| | + * | | | | | | | +-------------+ +--+ | + * | |CA | |CA | |PMOS | | + * | | 4426| | 4426| | 4426| +-------------------+ | + * | | -6 | | -7 | | | | EP68B21P | | + * | | | | | | | | PIA | | + * | | | | | +-----+ +-------------------+ | + * | +-----+ +-----+ | + * | +-----+ +-----+ +-----+ +-----+ +-----+ +-----+ | + * | | 2764| | 2764| | 2764| | 2764| | 2764| | 2764| | + * | | | | | | | | | | | | | | + * | |CA | |CA | |PD | |PD | |ED | |ED | | + * | | 4426| | 4426| | 4426| | 4426| | 4426| | 4426| | + * | | -5 | | -4 | | -3 | | -2 | | -1 | | -0 | | + * | | | | | | | | | | | | | OO | + * | | | | | | | | | | | | | | + * | +-----+ +-----+ +-----+ +-----+ +-----+ +-----+ | + * +-------------------------------------------------------------------------------+ + * + ***************************************************************************/ + +#include "emu.h" +#include "coco_t4426.h" +#include "includes/coco.h" + +#define LOG_GENERAL 0x01 +#define LOG_SETUP 0x02 +#define LOG_PRINTF 0x04 + +#define VERBOSE 0 // (LOG_PRINTF | LOG_SETUP | LOG_GENERAL) + +#define LOGMASK(mask, ...) do { if (VERBOSE & mask) logerror(__VA_ARGS__); } while (0) +#define LOGLEVEL(mask, level, ...) do { if ((VERBOSE & mask) >= level) logerror(__VA_ARGS__); } while (0) + +#define LOG(...) LOGMASK(LOG_GENERAL, __VA_ARGS__) +#define LOGSETUP(...) LOGMASK(LOG_SETUP, __VA_ARGS__) + +#if VERBOSE & LOG_PRINTF +#define logerror printf +#endif + +#ifdef _MSC_VER +#define FUNCNAME __func__ +#else +#define FUNCNAME __PRETTY_FUNCTION__ +#endif + +/*************************************************************************** + CONSTANTS +***************************************************************************/ + +#define UART_TAG "acia" +#define PIA_TAG "pia" +#define CARTSLOT_TAG "t4426" + +/*************************************************************************** + IMPLEMENTATION +***************************************************************************/ + +// TODO: Figure out address mapping for these devices +static MACHINE_CONFIG_FRAGMENT(coco_t4426) + MCFG_DEVICE_ADD(UART_TAG, ACIA6850, 0) + MCFG_DEVICE_ADD(PIA_TAG, PIA6821, 0) +MACHINE_CONFIG_END + +ROM_START( coco_t4426 ) + ROM_REGION(0x8000, CARTSLOT_TAG, ROMREGION_ERASE00) + // First of 8 banked ROM:s TODO: Add the banking and the other ROM:s + ROM_LOAD("tercoED4426-0-8549-5.3.bin", 0x0000, 0x2000, CRC(45665428) SHA1(ff49a79275772c4c4ab1ae29db662c9b10a744a7)) + + // Main cartridge ROM + ROM_LOAD("tercoPMOS4426-8549-4.31.bin", 0x2000, 0x1000, CRC(bc65c45c) SHA1(e50cfd1d61e29fe05eb795d8bf6303e7b91ed8e5)) +ROM_END + +//************************************************************************** +// GLOBAL VARIABLES +//************************************************************************** + +const device_type COCO_T4426 = &device_creator<coco_t4426_device>; + +//************************************************************************** +// LIVE DEVICE +//************************************************************************** + +//------------------------------------------------- +// coco_t4426_device - constructor +//------------------------------------------------- + +coco_t4426_device::coco_t4426_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) + : device_t(mconfig, type, name, tag, owner, clock, shortname, source) + ,device_cococart_interface( mconfig, *this ) + ,m_cart(nullptr) + ,m_owner(nullptr) + ,m_autostart(*this, ":" CART_AUTOSTART_TAG) + ,m_uart(*this, UART_TAG) + ,m_pia(*this, PIA_TAG) +{ +} + +coco_t4426_device::coco_t4426_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, COCO_T4426, "Terco CNC Programming Station 4426 multi cart", tag, owner, clock, "coco_t4426", __FILE__) + ,device_cococart_interface( mconfig, *this ) + ,m_cart(nullptr) + ,m_owner(nullptr) + ,m_autostart(*this, ":" CART_AUTOSTART_TAG) + ,m_uart(*this, UART_TAG) + ,m_pia(*this, PIA_TAG) +{ +} + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void coco_t4426_device::device_start() +{ + m_cart = dynamic_cast<device_image_interface *>(owner()); + m_owner = dynamic_cast<cococart_slot_device *>(owner()); +} + +//------------------------------------------------- +// machine_config_additions - device-specific +// machine configurations +//------------------------------------------------- + +machine_config_constructor coco_t4426_device::device_mconfig_additions() const +{ + return MACHINE_CONFIG_NAME( coco_t4426 ); +} + +//------------------------------------------------- +// rom_region - device-specific ROM region +//------------------------------------------------- + +const tiny_rom_entry *coco_t4426_device::device_rom_region() const +{ + return ROM_NAME( coco_t4426 ); +} + +/*------------------------------------------------- + device_reset - device-specific startup +-------------------------------------------------*/ + +void coco_t4426_device::device_reset() +{ + auto cart_line = cococart_slot_device::line_value::Q; + m_owner->cart_set_line(cococart_slot_device::line::CART, cart_line); +} + +/*------------------------------------------------- + get_cart_base +-------------------------------------------------*/ + +uint8_t* coco_t4426_device::get_cart_base() +{ + return memregion(CARTSLOT_TAG)->base(); +} + +/*------------------------------------------------- + read +-------------------------------------------------*/ + +READ8_MEMBER(coco_t4426_device::read) +{ + uint8_t result = 0x00; + + LOG("%s()\n", FUNCNAME); + LOGSETUP(" * Offs:%02x -> %02x\n", offset, result); + + return result; +} + +/*------------------------------------------------- + write +-------------------------------------------------*/ + +WRITE8_MEMBER(coco_t4426_device::write) +{ + LOG("%s(%02x)\n", FUNCNAME, data); + LOGSETUP(" * Offs:%02x <- %02x\n", offset, data); +} diff --git a/src/devices/bus/coco/coco_t4426.h b/src/devices/bus/coco/coco_t4426.h new file mode 100644 index 00000000000..72cd86a811d --- /dev/null +++ b/src/devices/bus/coco/coco_t4426.h @@ -0,0 +1,56 @@ +// license:BSD-3-Clause +// copyright-holders:Nathan Woods +#ifndef MAME_BUS_COCO_T4426_H +#define MAME_BUS_COCO_T4426_H + +#pragma once + +#include "emu.h" +#include "cococart.h" +#include "machine/6850acia.h" +#include "machine/6821pia.h" + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> coco_t4426_device + +class coco_t4426_device : + public device_t, + public device_cococart_interface +{ +public: + // construction/destruction + coco_t4426_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source); + coco_t4426_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // optional information overrides + virtual machine_config_constructor device_mconfig_additions() const override; + virtual const tiny_rom_entry *device_rom_region() const override; + + virtual uint8_t* get_cart_base() override; +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + // internal state + device_image_interface *m_cart; + cococart_slot_device *m_owner; + + optional_ioport m_autostart; + + virtual DECLARE_READ8_MEMBER(read) override; + virtual DECLARE_WRITE8_MEMBER(write) override; +private: + // internal state + required_device<acia6850_device> m_uart; + required_device<pia6821_device> m_pia; +}; + + +// device type definition +extern const device_type COCO_T4426; + +#endif /* MAME_BUS_COCO_T4426_H */ diff --git a/src/devices/cpu/mb86235/mb86235.cpp b/src/devices/cpu/mb86235/mb86235.cpp index c2641521ad4..8dd67ab83c5 100644 --- a/src/devices/cpu/mb86235/mb86235.cpp +++ b/src/devices/cpu/mb86235/mb86235.cpp @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Angelo Salese, ElSemi +// copyright-holders:Angelo Salese, ElSemi, Ville Linde /***************************************************************************** * * MB86235 "TGPx4" (c) Fujitsu @@ -14,69 +14,169 @@ #include "emu.h" #include "debugger.h" #include "mb86235.h" +#include "mb86235fe.h" -const device_type MB86235 = &device_creator<mb86235_cpu_device>; +#define ENABLE_DRC 0 +#define CACHE_SIZE (1 * 1024 * 1024) +#define COMPILE_BACKWARDS_BYTES 128 +#define COMPILE_FORWARDS_BYTES 512 +#define COMPILE_MAX_INSTRUCTIONS ((COMPILE_BACKWARDS_BYTES/4) + (COMPILE_FORWARDS_BYTES/4)) +#define COMPILE_MAX_SEQUENCE 64 -#define mb86235_readop(A) m_program->read_dword(A) -#define mb86235_readmem(A) m_program->read_dword(A) -#define mb86235_writemem(A,B) m_program->write_dword((A),B) +const device_type MB86235 = &device_creator<mb86235_device>; -/*********************************** - * illegal opcodes - ***********************************/ -void mb86235_cpu_device::mb86235_illegal() +static ADDRESS_MAP_START(internal_abus, AS_DATA, 32, mb86235_device) + AM_RANGE(0x000000, 0x0003ff) AM_RAM +ADDRESS_MAP_END + +static ADDRESS_MAP_START(internal_bbus, AS_IO, 32, mb86235_device) + AM_RANGE(0x000000, 0x0003ff) AM_RAM +ADDRESS_MAP_END + + + +/* Execute cycles */ +void mb86235_device::execute_run() { - //logerror("mb86235 illegal opcode at 0x%04x\n", m_pc); - m_icount -= 1; +#if ENABLE_DRC + run_drc(); +#else + m_core->icount = 0; +#endif } -/* Execute cycles */ -void mb86235_cpu_device::execute_run() + +void mb86235_device::device_start() { - uint32_t opcode; + m_program = &space(AS_PROGRAM); + m_direct = &m_program->direct(); + m_dataa = &space(AS_DATA); + m_datab = &space(AS_IO); + + m_core = (mb86235_internal_state *)m_cache.alloc_near(sizeof(mb86235_internal_state)); + memset(m_core, 0, sizeof(mb86235_internal_state)); + - do + // init UML generator + uint32_t umlflags = 0; + m_drcuml = std::make_unique<drcuml_state>(*this, m_cache, umlflags, 1, 24, 0); + + // add UML symbols + m_drcuml->symbol_add(&m_core->pc, sizeof(m_core->pc), "pc"); + m_drcuml->symbol_add(&m_core->icount, sizeof(m_core->icount), "icount"); + + for (int i = 0; i < 8; i++) { - debugger_instruction_hook(this, m_pc); + char buf[10]; + sprintf(buf, "aa%d", i); + m_drcuml->symbol_add(&m_core->aa[i], sizeof(m_core->aa[i]), buf); + sprintf(buf, "ab%d", i); + m_drcuml->symbol_add(&m_core->ab[i], sizeof(m_core->ab[i]), buf); + sprintf(buf, "ma%d", i); + m_drcuml->symbol_add(&m_core->ma[i], sizeof(m_core->ma[i]), buf); + sprintf(buf, "mb%d", i); + m_drcuml->symbol_add(&m_core->mb[i], sizeof(m_core->mb[i]), buf); + sprintf(buf, "ar%d", i); + m_drcuml->symbol_add(&m_core->ar[i], sizeof(m_core->ar[i]), buf); + } - opcode = mb86235_readop(m_pc); - //m_pc++; + m_drcuml->symbol_add(&m_core->flags.az, sizeof(m_core->flags.az), "flags_az"); + m_drcuml->symbol_add(&m_core->flags.an, sizeof(m_core->flags.an), "flags_an"); + m_drcuml->symbol_add(&m_core->flags.av, sizeof(m_core->flags.av), "flags_av"); + m_drcuml->symbol_add(&m_core->flags.au, sizeof(m_core->flags.au), "flags_au"); + m_drcuml->symbol_add(&m_core->flags.ad, sizeof(m_core->flags.ad), "flags_ad"); + m_drcuml->symbol_add(&m_core->flags.zc, sizeof(m_core->flags.zc), "flags_zc"); + m_drcuml->symbol_add(&m_core->flags.il, sizeof(m_core->flags.il), "flags_il"); + m_drcuml->symbol_add(&m_core->flags.nr, sizeof(m_core->flags.nr), "flags_nr"); + m_drcuml->symbol_add(&m_core->flags.zd, sizeof(m_core->flags.zd), "flags_zd"); + m_drcuml->symbol_add(&m_core->flags.mn, sizeof(m_core->flags.mn), "flags_mn"); + m_drcuml->symbol_add(&m_core->flags.mz, sizeof(m_core->flags.mz), "flags_mz"); + m_drcuml->symbol_add(&m_core->flags.mv, sizeof(m_core->flags.mv), "flags_mv"); + m_drcuml->symbol_add(&m_core->flags.mu, sizeof(m_core->flags.mu), "flags_mu"); + m_drcuml->symbol_add(&m_core->flags.md, sizeof(m_core->flags.md), "flags_md"); - switch( opcode ) - { - default: - mb86235_illegal(); - break; - } - } while( m_icount > 0 ); -} + m_drcuml->symbol_add(&m_core->arg0, sizeof(m_core->arg0), "arg0"); + m_drcuml->symbol_add(&m_core->arg1, sizeof(m_core->arg1), "arg1"); + m_drcuml->symbol_add(&m_core->arg2, sizeof(m_core->arg2), "arg2"); + m_drcuml->symbol_add(&m_core->arg3, sizeof(m_core->arg3), "arg3"); + m_drcuml->symbol_add(&m_core->alutemp, sizeof(m_core->alutemp), "alutemp"); + m_drcuml->symbol_add(&m_core->multemp, sizeof(m_core->multemp), "multemp"); + m_drcuml->symbol_add(&m_core->pcs_ptr, sizeof(m_core->pcs_ptr), "pcs_ptr"); -void mb86235_cpu_device::device_start() -{ - m_program = &space(AS_PROGRAM); - save_item(NAME(m_pc)); - save_item(NAME(m_flags)); + m_drcfe = std::make_unique<mb86235_frontend>(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, COMPILE_MAX_SEQUENCE); + + for (int i = 0; i < 8; i++) + { + m_regmap[i] = uml::mem(&m_core->aa[i]); + m_regmap[i + 8] = uml::mem(&m_core->ab[i]); + m_regmap[i + 16] = uml::mem(&m_core->ma[i]); + m_regmap[i + 24] = uml::mem(&m_core->mb[i]); + } + // Register state for debugger - //state_add( CP1610_R0, "PC", m_pc ).formatstr("%02X"); - state_add( STATE_GENPC, "GENPC", m_pc ).noshow(); - state_add( STATE_GENPCBASE, "CURPC", m_pc ).noshow(); - state_add( STATE_GENFLAGS, "GENFLAGS", m_flags ).noshow(); + state_add(MB86235_PC, "PC", m_core->pc).formatstr("%08X"); + state_add(MB86235_AR0, "AR0", m_core->ar[0]).formatstr("%08X"); + state_add(MB86235_AR1, "AR1", m_core->ar[1]).formatstr("%08X"); + state_add(MB86235_AR2, "AR2", m_core->ar[2]).formatstr("%08X"); + state_add(MB86235_AR3, "AR3", m_core->ar[3]).formatstr("%08X"); + state_add(MB86235_AR4, "AR4", m_core->ar[4]).formatstr("%08X"); + state_add(MB86235_AR5, "AR5", m_core->ar[5]).formatstr("%08X"); + state_add(MB86235_AR6, "AR6", m_core->ar[6]).formatstr("%08X"); + state_add(MB86235_AR7, "AR7", m_core->ar[7]).formatstr("%08X"); + state_add(MB86235_AA0, "AA0", m_core->aa[0]).formatstr("%08X"); + state_add(MB86235_AA1, "AA1", m_core->aa[1]).formatstr("%08X"); + state_add(MB86235_AA2, "AA2", m_core->aa[2]).formatstr("%08X"); + state_add(MB86235_AA3, "AA3", m_core->aa[3]).formatstr("%08X"); + state_add(MB86235_AA4, "AA4", m_core->aa[4]).formatstr("%08X"); + state_add(MB86235_AA5, "AA5", m_core->aa[5]).formatstr("%08X"); + state_add(MB86235_AA6, "AA6", m_core->aa[6]).formatstr("%08X"); + state_add(MB86235_AA7, "AA7", m_core->aa[7]).formatstr("%08X"); + state_add(MB86235_AB0, "AB0", m_core->ab[0]).formatstr("%08X"); + state_add(MB86235_AB1, "AB1", m_core->ab[1]).formatstr("%08X"); + state_add(MB86235_AB2, "AB2", m_core->ab[2]).formatstr("%08X"); + state_add(MB86235_AB3, "AB3", m_core->ab[3]).formatstr("%08X"); + state_add(MB86235_AB4, "AB4", m_core->ab[4]).formatstr("%08X"); + state_add(MB86235_AB5, "AB5", m_core->ab[5]).formatstr("%08X"); + state_add(MB86235_AB6, "AB6", m_core->ab[6]).formatstr("%08X"); + state_add(MB86235_AB7, "AB7", m_core->ab[7]).formatstr("%08X"); + state_add(MB86235_MA0, "MA0", m_core->ma[0]).formatstr("%08X"); + state_add(MB86235_MA1, "MA1", m_core->ma[1]).formatstr("%08X"); + state_add(MB86235_MA2, "MA2", m_core->ma[2]).formatstr("%08X"); + state_add(MB86235_MA3, "MA3", m_core->ma[3]).formatstr("%08X"); + state_add(MB86235_MA4, "MA4", m_core->ma[4]).formatstr("%08X"); + state_add(MB86235_MA5, "MA5", m_core->ma[5]).formatstr("%08X"); + state_add(MB86235_MA6, "MA6", m_core->ma[6]).formatstr("%08X"); + state_add(MB86235_MA7, "MA7", m_core->ma[7]).formatstr("%08X"); + state_add(MB86235_MB0, "MB0", m_core->mb[0]).formatstr("%08X"); + state_add(MB86235_MB1, "MB1", m_core->mb[1]).formatstr("%08X"); + state_add(MB86235_MB2, "MB2", m_core->mb[2]).formatstr("%08X"); + state_add(MB86235_MB3, "MB3", m_core->mb[3]).formatstr("%08X"); + state_add(MB86235_MB4, "MB4", m_core->mb[4]).formatstr("%08X"); + state_add(MB86235_MB5, "MB5", m_core->mb[5]).formatstr("%08X"); + state_add(MB86235_MB6, "MB6", m_core->mb[6]).formatstr("%08X"); + state_add(MB86235_MB7, "MB7", m_core->mb[7]).formatstr("%08X"); + state_add(STATE_GENPC, "GENPC", m_core->pc ).noshow(); + + m_icountptr = &m_core->icount; - m_icountptr = &m_icount; + m_core->fp0 = 0.0f; } -void mb86235_cpu_device::device_reset() +void mb86235_device::device_reset() { + flush_cache(); + + m_core->pc = 0; } #if 0 @@ -102,29 +202,76 @@ void mb86235_cpu_device::execute_set_input(int irqline, int state) } #endif -mb86235_cpu_device::mb86235_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +mb86235_device::mb86235_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : cpu_device(mconfig, MB86235, "MB86235", tag, owner, clock, "mb86235", __FILE__) , m_program_config("program", ENDIANNESS_LITTLE, 64, 32, -3) + , m_dataa_config("data_a", ENDIANNESS_LITTLE, 32, 24, -2, ADDRESS_MAP_NAME(internal_abus)) + , m_datab_config("data_b", ENDIANNESS_LITTLE, 32, 10, -2, ADDRESS_MAP_NAME(internal_bbus)) + , m_cache(CACHE_SIZE + sizeof(mb86235_internal_state)) + , m_drcuml(nullptr) + , m_drcfe(nullptr) { } -void mb86235_cpu_device::state_string_export(const device_state_entry &entry, std::string &str) const +void mb86235_device::state_string_export(const device_state_entry &entry, std::string &str) const { switch (entry.index()) { case STATE_GENFLAGS: - str = string_format("%c%c%c%c", - m_flags & 0x80 ? 'S':'.', - m_flags & 0x40 ? 'Z':'.', - m_flags & 0x20 ? 'V':'.', - m_flags & 0x10 ? 'C':'.'); + str = string_format("?"); break; } } -offs_t mb86235_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) +offs_t mb86235_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { extern CPU_DISASSEMBLE( mb86235 ); return CPU_DISASSEMBLE_NAME(mb86235)(this, stream, pc, oprom, opram, options); } + + +void mb86235_device::fifoin_w(uint64_t data) +{ +#if ENABLE_DRC + if (m_core->fifoin.num >= FIFOIN_SIZE) + { + fatalerror("fifoin_w: pushing to full fifo"); + } + + printf("FIFOIN push %08X%08X\n", (uint32_t)(data >> 32), (uint32_t)(data)); + + m_core->fifoin.data[m_core->fifoin.wpos] = data; + + m_core->fifoin.wpos++; + m_core->fifoin.wpos &= FIFOIN_SIZE-1; + m_core->fifoin.num++; +#endif +} + +bool mb86235_device::is_fifoin_full() +{ +#if ENABLE_DRC + return m_core->fifoin.num >= FIFOIN_SIZE; +#else + return false; +#endif +} + +uint64_t mb86235_device::fifoout0_r() +{ +#if ENABLE_DRC + fatalerror("fifoout0_r"); +#else + return 0; +#endif +} + +bool mb86235_device::is_fifoout0_empty() +{ +#if ENABLE_DRC + return m_core->fifoout0.num == 0; +#else + return false; +#endif +}
\ No newline at end of file diff --git a/src/devices/cpu/mb86235/mb86235.h b/src/devices/cpu/mb86235/mb86235.h index 8a8bd867609..783ddfab0c0 100644 --- a/src/devices/cpu/mb86235/mb86235.h +++ b/src/devices/cpu/mb86235/mb86235.h @@ -11,20 +11,64 @@ #ifndef __MB86235_H__ #define __MB86235_H__ -#if 0 -enum -{ - MB86235_R0=1, MB86235_R1, MB86235_R2, MB86235_R3, - MB86235_R4, MB86235_R5, MB86235_R6, MB86235_R7 -}; -#endif +#include "cpu/drcfe.h" +#include "cpu/drcuml.h" + +class mb86235_frontend; + + + + +#define OP_USERFLAG_FIFOIN 0x1 +#define OP_USERFLAG_FIFOOUT0 0x2 +#define OP_USERFLAG_FIFOOUT1 0x4 +#define OP_USERFLAG_REPEAT 0x8 +#define OP_USERFLAG_REPEATED_OP 0x10 +#define OP_USERFLAG_PR_MASK 0x300 +#define OP_USERFLAG_PR_INC 0x100 +#define OP_USERFLAG_PR_DEC 0x200 +#define OP_USERFLAG_PR_ZERO 0x300 +#define OP_USERFLAG_PW_MASK 0xc00 +#define OP_USERFLAG_PW_INC 0x400 +#define OP_USERFLAG_PW_DEC 0x800 +#define OP_USERFLAG_PW_ZERO 0xc00 -class mb86235_cpu_device : public cpu_device +class mb86235_device : public cpu_device { + friend class mb86235_frontend; + public: // construction/destruction - mb86235_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock); + mb86235_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t clock); + + void unimplemented_op(); + void unimplemented_alu(); + void unimplemented_control(); + void unimplemented_xfer1(); + void unimplemented_double_xfer1(); + void unimplemented_double_xfer2(); + void pcs_overflow(); + void pcs_underflow(); + + void fifoin_w(uint64_t data); + bool is_fifoin_full(); + uint64_t fifoout0_r(); + bool is_fifoout0_empty(); + + enum + { + MB86235_PC = 1, + MB86235_AA0, MB86235_AA1, MB86235_AA2, MB86235_AA3, MB86235_AA4, MB86235_AA5, MB86235_AA6, MB86235_AA7, + MB86235_AB0, MB86235_AB1, MB86235_AB2, MB86235_AB3, MB86235_AB4, MB86235_AB5, MB86235_AB6, MB86235_AB7, + MB86235_MA0, MB86235_MA1, MB86235_MA2, MB86235_MA3, MB86235_MA4, MB86235_MA5, MB86235_MA6, MB86235_MA7, + MB86235_MB0, MB86235_MB1, MB86235_MB2, MB86235_MB3, MB86235_MB4, MB86235_MB5, MB86235_MB6, MB86235_MB7, + MB86235_AR0, MB86235_AR1, MB86235_AR2, MB86235_AR3, MB86235_AR4, MB86235_AR5, MB86235_AR6, MB86235_AR7, + }; + + const int FIFOIN_SIZE = 16; + const int FIFOOUT0_SIZE = 16; + const int FIFOOUT1_SIZE = 16; protected: // device-level overrides @@ -39,7 +83,7 @@ protected: //virtual void execute_set_input(int inputnum, int state); // device_memory_interface overrides - virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : nullptr; } + virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ((spacenum == AS_DATA) ? &m_dataa_config : (spacenum == AS_IO) ? &m_datab_config : nullptr); } // device_state_interface overrides virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; @@ -49,16 +93,154 @@ protected: virtual uint32_t disasm_max_opcode_bytes() const override { return 8; } virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override; + direct_read_data *m_direct; + private: - address_space_config m_program_config; - uint8_t m_pc; /* registers */ - uint8_t m_flags; /* flags */ - address_space *m_program; - int m_icount; + struct mb86235_flags + { + uint32_t az; + uint32_t an; + uint32_t av; + uint32_t au; + uint32_t ad; + uint32_t zc; + uint32_t il; + uint32_t nr; + uint32_t zd; + uint32_t mn; + uint32_t mz; + uint32_t mv; + uint32_t mu; + uint32_t md; + }; + + struct fifo + { + int rpos; + int wpos; + int num; + uint64_t data[16]; + }; + + struct mb86235_internal_state + { + uint32_t pc; + uint32_t aa[8]; + uint32_t ab[8]; + uint32_t ma[8]; + uint32_t mb[8]; + uint32_t ar[8]; + + uint32_t sp; + uint32_t eb; + uint32_t eo; + uint32_t rpc; + uint32_t lpc; + + uint32_t prp; + uint32_t pwp; + uint32_t pr[24]; + + uint32_t mod; + mb86235_flags flags; + + int icount; + + uint32_t arg0; + uint32_t arg1; + uint32_t arg2; + uint32_t arg3; + uint64_t arg64; + + uint32_t pcs[4]; + int pcs_ptr; + + uint32_t jmpdest; + uint32_t alutemp; + uint32_t multemp; + uint32_t condtemp; + + uint32_t pdr; + uint32_t ddr; + + float fp0; + + fifo fifoin; + fifo fifoout0; + fifo fifoout1; + }; + + mb86235_internal_state *m_core; + + uml::parameter m_regmap[32]; + + uml::code_handle *m_entry; /* entry point */ + uml::code_handle *m_nocode; /* nocode exception handler */ + uml::code_handle *m_out_of_cycles; /* out of cycles exception handler */ + uml::code_handle *m_clear_fifo_in; + uml::code_handle *m_clear_fifo_out0; + uml::code_handle *m_clear_fifo_out1; + uml::code_handle *m_read_fifo_in; + uml::code_handle *m_write_fifo_out0; + uml::code_handle *m_write_fifo_out1; + uml::code_handle *m_read_abus; + uml::code_handle *m_write_abus; - void mb86235_illegal(); + address_space_config m_program_config; + address_space_config m_dataa_config; + address_space_config m_datab_config; + drc_cache m_cache; + std::unique_ptr<drcuml_state> m_drcuml; + std::unique_ptr<mb86235_frontend> m_drcfe; + address_space *m_program; + address_space *m_dataa; + address_space *m_datab; + + /* internal compiler state */ + struct compiler_state + { + uint32_t cycles; /* accumulated cycles */ + uint8_t checkints; /* need to check interrupts before next instruction */ + uml::code_label labelnum; /* index for local labels */ + }; + + void run_drc(); + void flush_cache(); + void alloc_handle(drcuml_state *drcuml, uml::code_handle **handleptr, const char *name); + void compile_block(offs_t pc); + void load_fast_iregs(drcuml_block *block); + void save_fast_iregs(drcuml_block *block); + void static_generate_entry_point(); + void static_generate_nocode_handler(); + void static_generate_out_of_cycles(); + void static_generate_fifo(); + void static_generate_memory_accessors(); + void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception); + bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_alu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int aluop, bool alu_temp); + void generate_mul(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int mulop, bool mul_temp); + void generate_pre_control(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_control(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_xfer1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_double_xfer1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_xfer2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_double_xfer2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_xfer3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_ea(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int md, int arx, int ary, int disp); + void generate_reg_read(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter dst); + void generate_reg_write(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter src); + void generate_alumul_input(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter dst, bool fp, bool mul); + uml::parameter get_alu1_input(int reg); + uml::parameter get_alu_output(int reg); + uml::parameter get_mul1_input(int reg); + void generate_condition(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int cc, bool n, uml::code_label skip_label, bool condtemp); + void generate_branch_target(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int type, int ef2); + bool has_register_clash(const opcode_desc *desc, int outreg); + bool aluop_has_result(int aluop); }; diff --git a/src/devices/cpu/mb86235/mb86235drc.cpp b/src/devices/cpu/mb86235/mb86235drc.cpp new file mode 100644 index 00000000000..2b1815a50d4 --- /dev/null +++ b/src/devices/cpu/mb86235/mb86235drc.cpp @@ -0,0 +1,1787 @@ +// license:BSD-3-Clause +// copyright-holders:Ville Linde + +/****************************************************************************** + + MB86235 UML recompiler core + +******************************************************************************/ + +#include "emu.h" +#include "debugger.h" +#include "mb86235.h" +#include "mb86235fe.h" +#include "cpu/drcfe.h" +#include "cpu/drcuml.h" +#include "cpu/drcumlsh.h" + +/* + TODO: + - check jump condition before parallel ALU/MUL (flags!) + +*/ + + + + +using namespace uml; + + +// map variables +#define MAPVAR_PC M0 +#define MAPVAR_CYCLES M1 + +// exit codes +#define EXECUTE_OUT_OF_CYCLES 0 +#define EXECUTE_MISSING_CODE 1 +#define EXECUTE_UNMAPPED_CODE 2 +#define EXECUTE_RESET_CACHE 3 + + +#define AR(reg) mem(&m_core->ar[(reg)]) +#define AA(reg) m_regmap[(reg)] +#define AB(reg) m_regmap[(reg)+8] +#define MA(reg) m_regmap[(reg)+16] +#define MB(reg) m_regmap[(reg)+24] +#define FLAGS_AZ mem(&m_core->flags.az) +#define FLAGS_AN mem(&m_core->flags.an) +#define FLAGS_AV mem(&m_core->flags.av) +#define FLAGS_AU mem(&m_core->flags.au) +#define FLAGS_AD mem(&m_core->flags.ad) +#define FLAGS_ZC mem(&m_core->flags.zc) +#define FLAGS_IL mem(&m_core->flags.il) +#define FLAGS_NR mem(&m_core->flags.nr) +#define FLAGS_ZD mem(&m_core->flags.zd) +#define FLAGS_MN mem(&m_core->flags.mn) +#define FLAGS_MZ mem(&m_core->flags.mz) +#define FLAGS_MV mem(&m_core->flags.mv) +#define FLAGS_MU mem(&m_core->flags.mu) +#define FLAGS_MD mem(&m_core->flags.md) + +#define PRP mem(&m_core->prp) +#define PWP mem(&m_core->pwp) +#define RPC mem(&m_core->rpc) +#define LPC mem(&m_core->lpc) + +#define AZ_CALC_REQUIRED ((desc->regreq[1] & 0x1) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define AN_CALC_REQUIRED ((desc->regreq[1] & 0x2) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define AV_CALC_REQUIRED ((desc->regreq[1] & 0x4) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define AU_CALC_REQUIRED ((desc->regreq[1] & 0x8) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define AD_CALC_REQUIRED ((desc->regreq[1] & 0x10) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define ZC_CALC_REQUIRED ((desc->regreq[1] & 0x20) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define IL_CALC_REQUIRED ((desc->regreq[1] & 0x40) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define NR_CALC_REQUIRED ((desc->regreq[1] & 0x80) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define ZD_CALC_REQUIRED ((desc->regreq[1] & 0x100) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define MN_CALC_REQUIRED ((desc->regreq[1] & 0x200) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define MZ_CALC_REQUIRED ((desc->regreq[1] & 0x400) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define MV_CALC_REQUIRED ((desc->regreq[1] & 0x800) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define MU_CALC_REQUIRED ((desc->regreq[1] & 0x1000) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define MD_CALC_REQUIRED ((desc->regreq[1] & 0x2000) || desc->flags & OPFLAG_IN_DELAY_SLOT) + +#define FIFOIN_RPOS mem(&m_core->fifoin.rpos) +#define FIFOIN_WPOS mem(&m_core->fifoin.wpos) +#define FIFOIN_NUM mem(&m_core->fifoin.num) +#define FIFOOUT0_RPOS mem(&m_core->fifoout0.rpos) +#define FIFOOUT0_WPOS mem(&m_core->fifoout0.wpos) +#define FIFOOUT0_NUM mem(&m_core->fifoout0.num) +#define FIFOOUT1_RPOS mem(&m_core->fifoout1.rpos) +#define FIFOOUT1_WPOS mem(&m_core->fifoout1.wpos) +#define FIFOOUT1_NUM mem(&m_core->fifoout1.num) + + +inline void mb86235_device::alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const char *name) +{ + if (*handleptr == nullptr) + *handleptr = drcuml->handle_alloc(name); +} + + + +static void cfunc_unimplemented(void *param) +{ + mb86235_device *cpu = (mb86235_device *)param; + cpu->unimplemented_op(); +} + +static void cfunc_unimplemented_alu(void *param) +{ + mb86235_device *cpu = (mb86235_device *)param; + cpu->unimplemented_alu(); +} + +static void cfunc_unimplemented_control(void *param) +{ + mb86235_device *cpu = (mb86235_device *)param; + cpu->unimplemented_control(); +} + +static void cfunc_unimplemented_xfer1(void *param) +{ + mb86235_device *cpu = (mb86235_device *)param; + cpu->unimplemented_xfer1(); +} + +static void cfunc_unimplemented_double_xfer1(void *param) +{ + mb86235_device *cpu = (mb86235_device *)param; + cpu->unimplemented_double_xfer1(); +} + +static void cfunc_unimplemented_double_xfer2(void *param) +{ + mb86235_device *cpu = (mb86235_device *)param; + cpu->unimplemented_double_xfer2(); +} + +static void cfunc_pcs_overflow(void *param) +{ + mb86235_device *cpu = (mb86235_device *)param; + cpu->pcs_overflow(); +} + +static void cfunc_pcs_underflow(void *param) +{ + mb86235_device *cpu = (mb86235_device *)param; + cpu->pcs_underflow(); +} + + + +void mb86235_device::unimplemented_op() +{ + uint64_t op = m_core->arg64; + printf("MB86235: PC=%08X: Unimplemented op %04X%08X\n", m_core->pc, (uint32_t)(op >> 32), (uint32_t)(op)); + fatalerror("MB86235: PC=%08X: Unimplemented op %04X%08X\n", m_core->pc, (uint32_t)(op >> 32), (uint32_t)(op)); +} + +void mb86235_device::unimplemented_alu() +{ + uint32_t op = m_core->arg0; + printf("MB86235: PC=%08X: Unimplemented alu %02X\n", m_core->pc, op); + fatalerror("MB86235: PC=%08X: Unimplemented alu %02X\n", m_core->pc, op); +} + +void mb86235_device::unimplemented_control() +{ + uint32_t cop = m_core->arg0; + printf("MB86235: PC=%08X: Unimplemented control %02X\n", m_core->pc, cop); + fatalerror("MB86235: PC=%08X: Unimplemented control %02X\n", m_core->pc, cop); +} + +void mb86235_device::unimplemented_xfer1() +{ + uint64_t op = m_core->arg64; + printf("MB86235: PC=%08X: Unimplemented xfer1 %04X%08X\n", m_core->pc, (uint32_t)(op >> 32), (uint32_t)(op)); + fatalerror("MB86235: PC=%08X: Unimplemented xfer1 %04X%08X\n", m_core->pc, (uint32_t)(op >> 32), (uint32_t)(op)); +} + +void mb86235_device::unimplemented_double_xfer1() +{ + uint64_t op = m_core->arg64; + printf("MB86235: PC=%08X: Unimplemented double xfer1 %04X%08X\n", m_core->pc, (uint32_t)(op >> 32), (uint32_t)(op)); + fatalerror("MB86235: PC=%08X: Unimplemented double xfer1 %04X%08X\n", m_core->pc, (uint32_t)(op >> 32), (uint32_t)(op)); +} + +void mb86235_device::unimplemented_double_xfer2() +{ + uint64_t op = m_core->arg64; + printf("MB86235: PC=%08X: Unimplemented double xfer2 %04X%08X\n", m_core->pc, (uint32_t)(op >> 32), (uint32_t)(op)); + fatalerror("MB86235: PC=%08X: Unimplemented double xfer2 %04X%08X\n", m_core->pc, (uint32_t)(op >> 32), (uint32_t)(op)); +} + +void mb86235_device::pcs_overflow() +{ + printf("MB86235: PC=%08X: PCS overflow\n", m_core->pc); + fatalerror("MB86235: PC=%08X: PCS overflow\n", m_core->pc); +} + +void mb86235_device::pcs_underflow() +{ + printf("MB86235: PC=%08X: PCS underflow\n", m_core->pc); + fatalerror("MB86235: PC=%08X: PCS underflow\n", m_core->pc); +} + + + + +/*------------------------------------------------- +load_fast_iregs - load any fast integer +registers +-------------------------------------------------*/ + +inline void mb86235_device::load_fast_iregs(drcuml_block *block) +{ + int regnum; + + for (regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++) + { + if (m_regmap[regnum].is_int_register()) + { + } + } +} + + +/*------------------------------------------------- +save_fast_iregs - save any fast integer +registers +-------------------------------------------------*/ + +void mb86235_device::save_fast_iregs(drcuml_block *block) +{ + int regnum; + + for (regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++) + { + if (m_regmap[regnum].is_int_register()) + { + } + } +} + + + + +void mb86235_device::run_drc() +{ + drcuml_state *drcuml = m_drcuml.get(); + int execute_result; + + /* execute */ + do + { + execute_result = drcuml->execute(*m_entry); + + /* if we need to recompile, do it */ + if (execute_result == EXECUTE_MISSING_CODE) + { + compile_block(m_core->pc); + } + else if (execute_result == EXECUTE_UNMAPPED_CODE) + { + fatalerror("Attempted to execute unmapped code at PC=%08X\n", m_core->pc); + } + else if (execute_result == EXECUTE_RESET_CACHE) + { + flush_cache(); + } + } while (execute_result != EXECUTE_OUT_OF_CYCLES); +} + +void mb86235_device::compile_block(offs_t pc) +{ + compiler_state compiler = { 0 }; + + const opcode_desc *seqhead, *seqlast; + const opcode_desc *desclist; + bool override = false; + + drcuml_block *block; + + desclist = m_drcfe->describe_code(pc); + + bool succeeded = false; + while (!succeeded) + { + try + { + block = m_drcuml->begin_block(4096); + + for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next()) + { + const opcode_desc *curdesc; + uint32_t nextpc; + + /* determine the last instruction in this sequence */ + for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next()) + if (seqlast->flags & OPFLAG_END_SEQUENCE) + break; + assert(seqlast != nullptr); + + /* if we don't have a hash for this mode/pc, or if we are overriding all, add one */ + if (override || m_drcuml->hash_exists(0, seqhead->pc)) + UML_HASH(block, 0, seqhead->pc); // hash mode,pc + + /* if we already have a hash, and this is the first sequence, assume that we */ + /* are recompiling due to being out of sync and allow future overrides */ + else if (seqhead == desclist) + { + override = true; + UML_HASH(block, 0, seqhead->pc); // hash mode,pc + } + + /* otherwise, redispatch to that fixed PC and skip the rest of the processing */ + else + { + UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc + UML_HASHJMP(block, 0, seqhead->pc, *m_nocode); // hashjmp <0>,seqhead->pc,nocode + continue; + } + + /* label this instruction, if it may be jumped to locally */ + if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET) + UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc + + /* iterate over instructions in the sequence and compile them */ + for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next()) + generate_sequence_instruction(block, &compiler, curdesc); + + /* if we need to return to the start, do it */ + if (seqlast->flags & OPFLAG_RETURN_TO_START) + nextpc = pc; + /* otherwise we just go to the next instruction */ + else + nextpc = seqlast->pc + (seqlast->skipslots + 1); + + /* count off cycles and go there */ + generate_update_cycles(block, &compiler, nextpc, true); // <subtract cycles> + + if (seqlast->next() == nullptr || seqlast->next()->pc != nextpc) + UML_HASHJMP(block, 0, nextpc, *m_nocode); // hashjmp <mode>,nextpc,nocode + } + + block->end(); + succeeded = true; + } + catch (drcuml_block::abort_compilation &) + { + flush_cache(); + } + } +} + + + +void mb86235_device::static_generate_entry_point() +{ + //code_label skip = 1; + drcuml_block *block; + + /* begin generating */ + block = m_drcuml->begin_block(20); + + /* forward references */ + alloc_handle(m_drcuml.get(), &m_nocode, "nocode"); + + alloc_handle(m_drcuml.get(), &m_entry, "entry"); + UML_HANDLE(block, *m_entry); // handle entry + + load_fast_iregs(block); // <load fastregs> + + /* generate a hash jump via the current mode and PC */ + UML_HASHJMP(block, 0, mem(&m_core->pc), *m_nocode); // hashjmp <mode>,<pc>,nocode + + block->end(); +} + + +void mb86235_device::static_generate_nocode_handler() +{ + drcuml_block *block; + + /* begin generating */ + block = m_drcuml->begin_block(10); + + /* generate a hash jump via the current mode and PC */ + alloc_handle(m_drcuml.get(), &m_nocode, "nocode"); + UML_HANDLE(block, *m_nocode); // handle nocode + UML_GETEXP(block, I0); // getexp i0 + UML_MOV(block, mem(&m_core->pc), I0); // mov [pc],i0 + save_fast_iregs(block); // <save fastregs> + UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE + + block->end(); +} + +void mb86235_device::static_generate_out_of_cycles() +{ + drcuml_block *block; + + /* begin generating */ + block = m_drcuml->begin_block(10); + + /* generate a hash jump via the current mode and PC */ + alloc_handle(m_drcuml.get(), &m_out_of_cycles, "out_of_cycles"); + UML_HANDLE(block, *m_out_of_cycles); // handle out_of_cycles + UML_GETEXP(block, I0); // getexp i0 + UML_MOV(block, mem(&m_core->pc), I0); // mov <pc>,i0 + save_fast_iregs(block); // <save fastregs> + UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES + + block->end(); +} + +void mb86235_device::static_generate_fifo() +{ + drcuml_block *block; + + // clear fifo in + block = m_drcuml->begin_block(20); + + alloc_handle(m_drcuml.get(), &m_clear_fifo_in, "clear_fifo_in"); + UML_HANDLE(block, *m_clear_fifo_in); + UML_MOV(block, FIFOIN_NUM, 0); + UML_MOV(block, FIFOIN_RPOS, 0); + UML_MOV(block, FIFOIN_WPOS, 0); + UML_RET(block); + + block->end(); + + // clear fifo out0 + block = m_drcuml->begin_block(20); + + alloc_handle(m_drcuml.get(), &m_clear_fifo_out0, "clear_fifo_out0"); + UML_HANDLE(block, *m_clear_fifo_out0); + UML_MOV(block, FIFOOUT0_NUM, 0); + UML_MOV(block, FIFOOUT0_RPOS, 0); + UML_MOV(block, FIFOOUT0_WPOS, 0); + UML_RET(block); + + block->end(); + + // clear fifo out1 + block = m_drcuml->begin_block(20); + + alloc_handle(m_drcuml.get(), &m_clear_fifo_out1, "clear_fifo_out1"); + UML_HANDLE(block, *m_clear_fifo_out1); + UML_MOV(block, FIFOOUT1_NUM, 0); + UML_MOV(block, FIFOOUT1_RPOS, 0); + UML_MOV(block, FIFOOUT1_WPOS, 0); + UML_RET(block); + + block->end(); + + // read fifo in + block = m_drcuml->begin_block(32); + alloc_handle(m_drcuml.get(), &m_read_fifo_in, "read_fifo_in"); + UML_HANDLE(block, *m_read_fifo_in); + UML_MOV(block, I1, FIFOIN_RPOS); + UML_LOAD(block, I0, m_core->fifoin.data, I1, SIZE_QWORD, SCALE_x8); + UML_ADD(block, I1, I1, 1); + UML_AND(block, I1, I1, FIFOIN_SIZE-1); + UML_MOV(block, FIFOIN_RPOS, I1); + UML_SUB(block, FIFOIN_NUM, FIFOIN_NUM, 1); + UML_RET(block); + + block->end(); + + // write fifo out0 + block = m_drcuml->begin_block(32); + alloc_handle(m_drcuml.get(), &m_write_fifo_out0, "write_fifo_out0"); + UML_HANDLE(block, *m_write_fifo_out0); + // TODO + UML_RET(block); + + block->end(); + + // write fifo out1 + block = m_drcuml->begin_block(32); + alloc_handle(m_drcuml.get(), &m_write_fifo_out1, "write_fifo_out1"); + UML_HANDLE(block, *m_write_fifo_out1); + // TODO + UML_RET(block); + + block->end(); +} + +void mb86235_device::static_generate_memory_accessors() +{ + drcuml_block *block; + code_label label = 1; + + // A-Bus read handler + // I0 = address + // I1 = return data + // I2 = trashed + block = m_drcuml->begin_block(128); + + alloc_handle(m_drcuml.get(), &m_read_abus, "read_abus"); + UML_HANDLE(block, *m_read_abus); + UML_CMP(block, I0, 0x400); + UML_JMPc(block, COND_GE, label); + // internal A-RAM + UML_SHL(block, I0, I0, 2); + UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA); + UML_RET(block); + // external + UML_LABEL(block, label++); + UML_AND(block, I0, I0, 0x3fff); + UML_AND(block, I2, mem(&m_core->eb), ~0x3fff); + UML_OR(block, I0, I0, I2); + UML_SHL(block, I0, I0, 2); + UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA); + UML_RET(block); + + block->end(); + + // A-Bus write handler + // I0 = address + // I1 = data + // I2 = trashed + block = m_drcuml->begin_block(128); + + alloc_handle(m_drcuml.get(), &m_write_abus, "write_abus"); + UML_HANDLE(block, *m_write_abus); + UML_CMP(block, I0, 0x400); + UML_JMPc(block, COND_GE, label); + // internal A-RAM + UML_SHL(block, I0, I0, 2); + UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA); + UML_RET(block); + // external + UML_LABEL(block, label++); + UML_AND(block, I0, I0, 0x3fff); + UML_AND(block, I2, mem(&m_core->eb), ~0x3fff); + UML_OR(block, I0, I0, I2); + UML_SHL(block, I0, I0, 2); + UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA); + UML_RET(block); + + block->end(); +} + + +void mb86235_device::flush_cache() +{ + /* empty the transient cache contents */ + m_drcuml->reset(); + + try + { + // generate the entry point and out-of-cycles handlers + static_generate_entry_point(); + static_generate_nocode_handler(); + static_generate_out_of_cycles(); + + // generate utility functions + static_generate_fifo(); + + // generate exception handlers + + // generate memory accessors + static_generate_memory_accessors(); + } + catch (drcuml_block::abort_compilation &) + { + fatalerror("Error generating MB86235 static handlers\n"); + } +} + + + +void mb86235_device::generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + /* add an entry for the log */ + // if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) + // log_add_disasm_comment(block, desc->pc, desc->opptr.l[0]); + + /* set the PC map variable */ + UML_MAPVAR(block, MAPVAR_PC, desc->pc); // mapvar PC,desc->pc + + /* accumulate total cycles */ + compiler->cycles += desc->cycles; + + /* update the icount map variable */ + UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles + + /* if we are debugging, call the debugger */ + if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0) + { + UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc + save_fast_iregs(block); // <save fastregs> + UML_DEBUG(block, desc->pc); // debug desc->pc + } + + /* if we hit an unmapped address, fatal error */ + if (desc->flags & OPFLAG_COMPILER_UNMAPPED) + { + UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc + save_fast_iregs(block); // <save fastregs> + UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE + } + + /* if this is an invalid opcode, generate the exception now */ + // if (desc->flags & OPFLAG_INVALID_OPCODE) + // UML_EXH(block, *m_exception[EXCEPTION_PROGRAM], 0x80000); // exh exception_program,0x80000 + + /* unless this is a virtual no-op, it's a regular instruction */ + if (!(desc->flags & OPFLAG_VIRTUAL_NOOP)) + { + /* compile the instruction */ + if (!generate_opcode(block, compiler, desc)) + { + UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc + UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); // dmov [arg64],*desc->opptr.q + UML_CALLC(block, cfunc_unimplemented, this); // callc cfunc_unimplemented,ppc + } + } +} + +void mb86235_device::generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception) +{ + /* account for cycles */ + if (compiler->cycles > 0) + { + UML_SUB(block, mem(&m_core->icount), mem(&m_core->icount), MAPVAR_CYCLES); // sub icount,icount,cycles + UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0 + if (allow_exception) + UML_EXHc(block, COND_S, *m_out_of_cycles, param); // exh out_of_cycles,nextpc + } + compiler->cycles = 0; +} + + +void mb86235_device::generate_ea(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int md, int arx, int ary, int disp) +{ + // Calculates EA into register I0 + + switch (md) + { + case 0x1: // @ARx++ + UML_MOV(block, I0, AR(arx)); + UML_ADD(block, AR(arx), AR(arx), 1); + break; + case 0x4: // @ARx+ARy + UML_ADD(block, I0, AR(arx), AR(ary)); + break; + case 0xa: // @ARx+disp12 + UML_ADD(block, I0, AR(arx), disp); + break; + + default: + fatalerror("generate_ea: md = %02X, PC = %08X", md, desc->pc); + break; + } +} + + + +void mb86235_device::generate_reg_read(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter dst) +{ + switch (reg) + { + case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: + // AA0-7 + UML_MOV(block, dst, AA(reg & 7)); + break; + + case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: + // AR0-7 + UML_MOV(block, dst, AR(reg & 7)); + break; + + case 0x30: // PR + UML_LOAD(block, dst, m_core->pr, PRP, SIZE_DWORD, SCALE_x4); + break; + + case 0x31: // FI + UML_CALLH(block, *m_read_fifo_in); + UML_MOV(block, dst, I0); + break; + + default: + fatalerror("generate_reg_read: unimplemented register %02X at %08X", reg, desc->pc); + break; + } +} + + +void mb86235_device::generate_reg_write(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter src) +{ + switch (reg) + { + case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: + // MA0-7 + UML_MOV(block, MA(reg & 7), src); + break; + + case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: + // AA0-7 + UML_MOV(block, AA(reg & 7), src); + break; + + case 0x10: // EB + UML_MOV(block, mem(&m_core->eb), src); + break; + + case 0x13: // EO + UML_MOV(block, mem(&m_core->eo), src); + break; + + case 0x14: // SP + UML_MOV(block, mem(&m_core->sp), src); + break; + + case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: + // AR0-7 + UML_MOV(block, AR(reg & 7), src); + break; + + case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: + // MB0-7 + UML_MOV(block, MB(reg & 7), src); + break; + + case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: + // AB0-7 + UML_MOV(block, AB(reg & 7), src); + break; + + case 0x30: // PR + UML_STORE(block, m_core->pr, PWP, src, SIZE_DWORD, SCALE_x4); + break; + + case 0x34: // PDR + UML_MOV(block, mem(&m_core->pdr), src); + break; + + case 0x35: // DDR + UML_MOV(block, mem(&m_core->ddr), src); + break; + + case 0x36: // PRP + UML_MOV(block, PRP, src); + break; + + case 0x37: // PWP + UML_MOV(block, PWP, src); + break; + + default: + fatalerror("generate_reg_write: unimplemented register %02X at %08X", reg, desc->pc); + break; + } +} + +bool mb86235_device::has_register_clash(const opcode_desc *desc, int outreg) +{ + switch (outreg) + { + case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: + // MA0-7 + if (desc->regin[0] & (1 << (16 + (outreg & 7)))) return true; + break; + case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: + // MB0-7 + if (desc->regin[0] & (1 << (24 + (outreg & 7)))) return true; + break; + case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17: + // AA0-7 + if (desc->regin[0] & (1 << (outreg & 7))) return true; + break; + case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: + // AB0-7 + if (desc->regin[0] & (1 << (8 + (outreg & 7)))) return true; + break; + } + return false; +} + +bool mb86235_device::aluop_has_result(int aluop) +{ + switch (aluop) + { + case 0x04: // FCMP + case 0x07: // NOP + case 0x14: // CMP + return false; + + default: + break; + } + return true; +} + + + +bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + uint64_t opcode = desc->opptr.q[0]; + + bool fifoin_check = false; + bool fifoout0_check = false; + bool fifoout1_check = false; + + // enable fifo in check if this opcode or the delay slot reads from FIFO + if (desc->userflags & OP_USERFLAG_FIFOIN) + fifoin_check = true; + if (desc->delayslots > 0) + { + if (desc->delay.first()->userflags & OP_USERFLAG_FIFOIN) + fifoin_check = true; + } + + // enable fifoout0 check if this opcode or the delay slot writes to FIFO0 + if (desc->userflags & OP_USERFLAG_FIFOOUT0) + fifoout0_check = true; + if (desc->delayslots > 0) + { + if (desc->delay.first()->userflags & OP_USERFLAG_FIFOOUT0) + fifoout0_check = true; + } + + // enable fifoout1 check if this opcode or the delay slot writes to FIFO1 + if (desc->userflags & OP_USERFLAG_FIFOOUT1) + fifoout1_check = true; + if (desc->delayslots > 0) + { + if (desc->delay.first()->userflags & OP_USERFLAG_FIFOOUT1) + fifoout1_check = true; + } + + // insert FIFO IN check if needed + if (fifoin_check) + { + code_label not_empty = compiler->labelnum++; + UML_CMP(block, FIFOIN_NUM, 0); + UML_JMPc(block, COND_G, not_empty); + + UML_MOV(block, mem(&m_core->icount), 0); + UML_EXH(block, *m_out_of_cycles, desc->pc); + + UML_LABEL(block, not_empty); + } + + // insert FIFO OUT0 check if needed + if (fifoout0_check) + { + fatalerror("generate_opcode: fifoout0_check"); + } + + // insert FIFO OUT1 check if needed + if (fifoout1_check) + { + fatalerror("generate_opcode: fifoout1_check"); + } + + + switch ((opcode >> 61) & 7) + { + case 0: // ALU / MUL / double transfer (type 1) + { + bool alu_temp = has_register_clash(desc, (opcode >> 42) & 0x1f) && aluop_has_result((opcode >> 56) & 0x1f); + bool mul_temp = has_register_clash(desc, (opcode >> 27) & 0x1f); + generate_alu(block, compiler, desc, (opcode >> 42) & 0x7ffff, alu_temp); + generate_mul(block, compiler, desc, (opcode >> 27) & 0x7fff, mul_temp); + generate_double_xfer1(block, compiler, desc); + if (alu_temp) UML_MOV(block, get_alu_output((opcode >> 42) & 0x1f), mem(&m_core->alutemp)); + if (mul_temp) UML_MOV(block, get_alu_output((opcode >> 27) & 0x1f), mem(&m_core->multemp)); + break; + } + case 1: // ALU / MUL / transfer (type 1) + { + bool alu_temp = has_register_clash(desc, (opcode >> 42) & 0x1f) && aluop_has_result((opcode >> 56) & 0x1f); + bool mul_temp = has_register_clash(desc, (opcode >> 27) & 0x1f); + generate_alu(block, compiler, desc, (opcode >> 42) & 0x7ffff, alu_temp); + generate_mul(block, compiler, desc, (opcode >> 27) & 0x7fff, mul_temp); + generate_xfer1(block, compiler, desc); + if (alu_temp) UML_MOV(block, get_alu_output((opcode >> 42) & 0x1f), mem(&m_core->alutemp)); + if (mul_temp) UML_MOV(block, get_alu_output((opcode >> 27) & 0x1f), mem(&m_core->multemp)); + break; + } + case 2: // ALU / MUL / control + { + generate_pre_control(block, compiler, desc); + generate_alu(block, compiler, desc, (opcode >> 42) & 0x7ffff, false); + generate_mul(block, compiler, desc, (opcode >> 27) & 0x7fff, false); + generate_control(block, compiler, desc); + break; + } + case 4: // ALU or MUL / double transfer (type 2) + { + bool comp_temp; + if (opcode & ((uint64_t)(1) << 41)) + { + comp_temp = has_register_clash(desc, (opcode >> 42) & 0x1f) && aluop_has_result((opcode >> 56) & 0x1f); + generate_alu(block, compiler, desc, (opcode >> 42) & 0x7ffff, comp_temp); + } + else + { + comp_temp = has_register_clash(desc, (opcode >> 42) & 0x1f); + generate_mul(block, compiler, desc, (opcode >> 42) & 0x7fff, comp_temp); + } + generate_double_xfer2(block, compiler, desc); + if (comp_temp) + { + if (opcode & ((uint64_t)(1) << 41)) + UML_MOV(block, get_alu_output((opcode >> 42) & 0x1f), mem(&m_core->alutemp)); + else + UML_MOV(block, get_alu_output((opcode >> 42) & 0x1f), mem(&m_core->multemp)); + } + break; + } + case 5: // ALU or MUL / transfer (type 2) + { + bool comp_temp; + if (opcode & ((uint64_t)(1) << 41)) + { + comp_temp = has_register_clash(desc, (opcode >> 42) & 0x1f) && aluop_has_result((opcode >> 56) & 0x1f); + generate_alu(block, compiler, desc, (opcode >> 42) & 0x7ffff, comp_temp); + } + else + { + comp_temp = has_register_clash(desc, (opcode >> 42) & 0x1f); + generate_mul(block, compiler, desc, (opcode >> 42) & 0x7fff, comp_temp); + } + generate_xfer2(block, compiler, desc); + if (comp_temp) + { + if (opcode & ((uint64_t)(1) << 41)) + UML_MOV(block, get_alu_output((opcode >> 42) & 0x1f), mem(&m_core->alutemp)); + else + UML_MOV(block, get_alu_output((opcode >> 42) & 0x1f), mem(&m_core->multemp)); + } + break; + } + case 6: // ALU or MUL / control + { + generate_pre_control(block, compiler, desc); + if (opcode & ((uint64_t)(1) << 41)) + generate_alu(block, compiler, desc, (opcode >> 42) & 0x7ffff, false); + else + generate_mul(block, compiler, desc, (opcode >> 42) & 0x7fff, false); + generate_control(block, compiler, desc); + break; + } + case 7: // transfer (type 3) + { + generate_xfer3(block, compiler, desc); + break; + } + + default: + return false; + } + + // update PR and PW if needed + if ((desc->userflags & OP_USERFLAG_PR_MASK) != 0) + { + switch ((desc->userflags & OP_USERFLAG_PR_MASK) >> 8) + { + case 1: // PR++ + UML_ADD(block, PRP, PRP, 1); + UML_CMP(block, PRP, 24); + UML_MOVc(block, COND_GE, PRP, 0); + break; + case 2: // PR-- + UML_SUB(block, PRP, PRP, 1); + UML_CMP(block, PRP, 0); + UML_MOVc(block, COND_L, PRP, 23); + break; + case 3: // PR#0 + UML_MOV(block, PRP, 0); + break; + } + } + + if ((desc->userflags & OP_USERFLAG_PW_MASK) != 0) + { + switch ((desc->userflags & OP_USERFLAG_PW_MASK) >> 10) + { + case 1: // PW++ + UML_ADD(block, PWP, PWP, 1); + UML_CMP(block, PWP, 24); + UML_MOVc(block, COND_GE, PWP, 0); + break; + case 2: // PW-- + UML_SUB(block, PWP, PWP, 1); + UML_CMP(block, PWP, 0); + UML_MOVc(block, COND_L, PWP, 23); + break; + case 3: // PW#0 + UML_MOV(block, PWP, 0); + break; + } + } + + // handle repeat + if (desc->userflags & OP_USERFLAG_REPEATED_OP) + { + code_label no_repeat = compiler->labelnum++; + UML_SUB(block, RPC, RPC, 1); + UML_CMP(block, RPC, 0); + UML_JMPc(block, COND_LE, no_repeat); + + generate_update_cycles(block, compiler, desc->pc, true); + if (desc->flags & OPFLAG_INTRABLOCK_BRANCH) + UML_JMP(block, desc->pc | 0x80000000); + else + UML_HASHJMP(block, 0, desc->pc, *m_nocode); + + UML_LABEL(block, no_repeat); + } + + return true; +} + + + +void mb86235_device::generate_alumul_input(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter dst, bool fp, bool mul) +{ + switch (reg) + { + case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: + if (mul) + UML_MOV(block, dst, MA(reg & 7)); + else + UML_MOV(block, dst, AA(reg & 7)); + break; + + case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: + if (mul) + UML_MOV(block, dst, MB(reg & 7)); + else + UML_MOV(block, dst, AB(reg & 7)); + break; + + case 0x10: // PR + case 0x11: // PR++ + case 0x12: // PR-- + case 0x13: // PR#0 + UML_LOAD(block, dst, m_core->pr, PRP, SIZE_DWORD, SCALE_x4); + break; + + case 0x18: // 0 / -1.0E+0 + if (fp) + UML_MOV(block, dst, 0xbf800000); + else + UML_MOV(block, dst, 0); + break; + + case 0x19: // 1 / 0.0E+0 + if (fp) + UML_MOV(block, dst, 0); + else + UML_MOV(block, dst, 1); + break; + + case 0x1a: // -1 / 0.5+0 + if (fp) + UML_MOV(block, dst, 0x3f000000); + else + UML_MOV(block, dst, -1); + break; + + case 0x1b: // 1.0E+0 + UML_MOV(block, dst, 0x3f800000); + break; + + case 0x1c: // 1.5E+0 + UML_MOV(block, dst, 0x3fc00000); + break; + + case 0x1d: // 2.0E+0 + UML_MOV(block, dst, 0x40000000); + break; + + case 0x1e: // 3.0E+0 + UML_MOV(block, dst, 0x40400000); + break; + + case 0x1f: // 5.0E+0 + UML_MOV(block, dst, 0x40a00000); + break; + + default: + fatalerror("generate_alu_input: invalid register %02X", reg); + } +} + +uml::parameter mb86235_device::get_alu_output(int reg) +{ + switch (reg) + { + case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: + return MA(reg & 7); + case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: + return MB(reg & 7); + case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17: + return AA(reg & 7); + case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: + return AB(reg & 7); + } + return uml::parameter(0); +} + +uml::parameter mb86235_device::get_alu1_input(int reg) +{ + switch (reg) + { + case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: + return AA(reg & 7); + + case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: + return AB(reg & 7); + } + return uml::parameter(0); +} + +uml::parameter mb86235_device::get_mul1_input(int reg) +{ + switch (reg) + { + case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: + return MA(reg & 7); + + case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: + return MB(reg & 7); + } + return uml::parameter(0); +} + + + +void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int aluop, bool alutemp) +{ + int i1 = (aluop >> 10) & 0xf; + int i2 = (aluop >> 5) & 0x1f; + int io = aluop & 0x1f; + int op = (aluop >> 14) & 0x1f; + + switch (op) + { + case 0x00: // FADD + generate_alumul_input(block, compiler, desc, i2, I0, true, false); + UML_FSCOPYI(block, F0, I0); + UML_FSCOPYI(block, F1, get_alu1_input(i1)); + UML_FSADD(block, F0, F0, F1); + UML_ICOPYFS(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), F0); + if (AN_CALC_REQUIRED || AZ_CALC_REQUIRED) + UML_FSCMP(block, F0, mem(&m_core->fp0)); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, FLAGS_AN); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ); + // TODO: AV flag + // TODO: AU flag + // TODO: AD flag + break; + + case 0x02: // FSUB + generate_alumul_input(block, compiler, desc, i2, I0, true, false); + UML_FSCOPYI(block, F0, I0); + UML_FSCOPYI(block, F1, get_alu1_input(i1)); + UML_FSSUB(block, F0, F0, F1); + UML_ICOPYFS(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), F0); + if (AN_CALC_REQUIRED || AZ_CALC_REQUIRED) + UML_FSCMP(block, F0, mem(&m_core->fp0)); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, FLAGS_AN); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ); + // TODO: AV flag + // TODO: AU flag + // TODO: AD flag + break; + + case 0x04: // FCMP + generate_alumul_input(block, compiler, desc, i2, I0, true, false); + UML_FSCOPYI(block, F0, I0); + UML_FSCOPYI(block, F1, get_alu1_input(i1)); + UML_FSCMP(block, F0, F1); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, FLAGS_AN); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ); + // TODO: AV flag + // TODO: AU flag + // TODO: AD flag + break; + + case 0x05: // FABS + UML_AND(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), get_alu1_input(i1), 0x7fffffff); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ); + if (AN_CALC_REQUIRED) UML_MOV(block, FLAGS_AN, 0); + // TODO: AD flag + break; + + case 0x06: // FABC + generate_alumul_input(block, compiler, desc, i2, I0, true, false); + UML_AND(block, I0, I0, 0x7fffffff); + UML_AND(block, I1, get_alu1_input(i1), 0x7fffffff); + UML_FSCOPYI(block, F0, I0); + UML_FSCOPYI(block, F1, I1); + UML_FSCMP(block, F0, F1); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, FLAGS_AN); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ); + if (AU_CALC_REQUIRED) UML_MOV(block, FLAGS_AU, 1); + // TODO: AD flag + break; + + case 0x07: // NOP + break; + + case 0x0d: // CIF + generate_alumul_input(block, compiler, desc, i1, I1, true, false); + UML_FSFRINT(block, F0, I1, SIZE_DWORD); + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_CMP(block, I1, 0); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_L, FLAGS_AN); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_E, FLAGS_AZ); + UML_ICOPYFS(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), F0); + break; + + case 0x0e: // CFI + { + code_label truncate = compiler->labelnum++; + code_label end = compiler->labelnum++; + UML_FSCOPYI(block, F0, get_alu1_input(i1)); + UML_TEST(block, mem(&m_core->mod), 0x80); + UML_JMPc(block, COND_Z, truncate); + UML_FSTOINT(block, I0, F0, SIZE_DWORD, ROUND_ROUND); + UML_JMP(block, end); + UML_LABEL(block, truncate); + UML_FSTOINT(block, I0, F0, SIZE_DWORD, ROUND_TRUNC); + UML_LABEL(block, end); + + UML_CMP(block, I0, 0xff800000); + UML_MOVc(block, COND_L, I0, 0xff800000); + if (AV_CALC_REQUIRED) UML_MOVc(block, COND_L, FLAGS_AV, 1); + UML_CMP(block, I0, 0x007fffff); + UML_MOVc(block, COND_G, I0, 0x007fffff); + if (AV_CALC_REQUIRED) UML_MOVc(block, COND_G, FLAGS_AV, 1); + if (AN_CALC_REQUIRED || AZ_CALC_REQUIRED) + UML_CMP(block, I0, 0); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_L, FLAGS_AN); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ); + UML_MOV(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0); + break; + } + + case 0x10: // ADD + generate_alumul_input(block, compiler, desc, i2, I1, false, false); + UML_ADD(block, I0, I1, get_alu1_input(i1)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN); + UML_CMP(block, I0, 0xff800000); + UML_MOVc(block, COND_L, I0, 0xff800000); + if (AV_CALC_REQUIRED) UML_MOVc(block, COND_L, FLAGS_AV, 1); + UML_CMP(block, I0, 0x007fffff); + UML_MOVc(block, COND_G, I0, 0x007fffff); + if (AV_CALC_REQUIRED) UML_MOVc(block, COND_G, FLAGS_AV, 1); + UML_MOV(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0); + break; + + case 0x14: // CMP + generate_alumul_input(block, compiler, desc, i2, I1, false, false); + UML_SUB(block, I0, I1, get_alu1_input(i1)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN); + if (AV_CALC_REQUIRED) + { + UML_CMP(block, I0, 0xff800000); + UML_MOVc(block, COND_L, FLAGS_AV, 1); + UML_CMP(block, I0, 0x007fffff); + UML_MOVc(block, COND_G, FLAGS_AV, 1); + } + break; + + case 0x16: // ATR + UML_MOV(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), get_alu1_input(i1)); + break; + + case 0x18: // AND + generate_alumul_input(block, compiler, desc, i2, I0, false, false); + UML_AND(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0, get_alu1_input(i1)); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ); + if (AV_CALC_REQUIRED) UML_MOV(block, FLAGS_AV, 0); + if (AU_CALC_REQUIRED) UML_MOV(block, FLAGS_AU, 0); + break; + + case 0x1c: // LSR + generate_alumul_input(block, compiler, desc, i1, I0, false, false); + UML_SHR(block, I0, I0, i2); + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_CMP(block, I0, 0); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_L, FLAGS_AN); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_E, FLAGS_AZ); + if (AV_CALC_REQUIRED) UML_MOV(block, FLAGS_AV, 0); + if (AU_CALC_REQUIRED) UML_MOV(block, FLAGS_AU, 0); + UML_MOV(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0); + break; + + case 0x1d: // LSL + generate_alumul_input(block, compiler, desc, i1, I0, false, false); + UML_SHL(block, I0, I0, i2); + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_CMP(block, I0, 0); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_L, FLAGS_AN); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_E, FLAGS_AZ); + if (AV_CALC_REQUIRED) UML_MOV(block, FLAGS_AV, 0); + if (AU_CALC_REQUIRED) UML_MOV(block, FLAGS_AU, 0); + UML_MOV(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0); + break; + + default: + UML_MOV(block, mem(&m_core->pc), desc->pc); + UML_MOV(block, mem(&m_core->arg0), op); + UML_CALLC(block, cfunc_unimplemented_alu, this); + break; + } +} + +void mb86235_device::generate_mul(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int mulop, bool multemp) +{ + int i1 = (mulop >> 10) & 0xf; + int i2 = (mulop >> 5) & 0x1f; + int io = mulop & 0x1f; + int m = mulop & 0x4000; + + if (m) + { + // FMUL + generate_alumul_input(block, compiler, desc, i2, I1, true, true); + UML_FSCOPYI(block, F1, I1); + UML_FSCOPYI(block, F0, get_mul1_input(i1)); + UML_FSMUL(block, F1, F0, F1); + if (MZ_CALC_REQUIRED || MN_CALC_REQUIRED) + UML_FSCMP(block, F1, mem(&m_core->fp0)); + if (MZ_CALC_REQUIRED) UML_SETc(block, COND_E, FLAGS_MZ); + if (MN_CALC_REQUIRED) UML_SETc(block, COND_C, FLAGS_MN); + // TODO: MV flag + // TODO: MU flag + // TODO: MD flag + UML_ICOPYFS(block, multemp ? mem(&m_core->multemp) : get_alu_output(io), F1); + } + else + { + // MUL + generate_alumul_input(block, compiler, desc, i2, I1, false, true); + UML_MULS(block, I0, I0, I1, get_mul1_input(i1)); + if (MZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_MZ); + if (MN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_MN); + UML_CMP(block, I0, 0xff800000); + UML_MOVc(block, COND_L, I0, 0xff800000); + if (MV_CALC_REQUIRED) UML_MOVc(block, COND_L, FLAGS_MV, 1); + UML_CMP(block, I0, 0x007fffff); + UML_MOVc(block, COND_G, I0, 0x007fffff); + if (MV_CALC_REQUIRED) UML_MOVc(block, COND_G, FLAGS_MV, 1); + UML_MOV(block, multemp ? mem(&m_core->multemp) : get_alu_output(io), I0); + } +} + + +void mb86235_device::generate_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + // I0 = target pc for dynamic branches + + compiler_state compiler_temp = *compiler; + + // save branch target + if (desc->targetpc == BRANCH_TARGET_DYNAMIC) + { + UML_MOV(block, mem(&m_core->jmpdest), I0); // mov [jmpdest],i0 + } + + // compile delay slots + generate_sequence_instruction(block, &compiler_temp, desc->delay.first()); + + // update cycles and hash jump + if (desc->targetpc != BRANCH_TARGET_DYNAMIC) + { + generate_update_cycles(block, &compiler_temp, desc->targetpc, true); + if (desc->flags & OPFLAG_INTRABLOCK_BRANCH) + UML_JMP(block, desc->targetpc | 0x80000000); // jmp targetpc | 0x80000000 + else + UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); // hashjmp 0,targetpc,nocode + } + else + { + generate_update_cycles(block, &compiler_temp, mem(&m_core->jmpdest), true); + UML_HASHJMP(block, 0, mem(&m_core->jmpdest), *m_nocode); // hashjmp 0,jmpdest,nocode + } + + // update compiler label + compiler->labelnum = compiler_temp.labelnum; + + /* reset the mapvar to the current cycles and account for skipped slots */ + compiler->cycles += desc->skipslots; + UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles +} + + +void mb86235_device::generate_branch_target(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int type, int ef2) +{ + // Calculates dynamic targets into I0 + + switch (type) + { + case 0x0: break; + case 0x1: break; + case 0x2: // ARx + { + int reg = (ef2 >> 6) & 7; + UML_MOV(block, I0, AR(reg)); + break; + } + default: + fatalerror("generate_branch_target: type %02X at %08X", type, desc->pc); + break; + } +} + + +void mb86235_device::generate_condition(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int cc, bool n, uml::code_label skip_label, bool condtemp) +{ + switch (cc) + { + case 0x00: // MN + UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_MN, 0); + UML_JMPc(block, n ? COND_NE : COND_E, skip_label); + break; + case 0x01: // MZ + UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_MZ, 0); + UML_JMPc(block, n ? COND_NE : COND_E, skip_label); + break; + case 0x02: // MV + UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_MV, 0); + UML_JMPc(block, n ? COND_NE : COND_E, skip_label); + break; + case 0x03: // MU + UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_MU, 0); + UML_JMPc(block, n ? COND_NE : COND_E, skip_label); + break; + case 0x04: // ZD + UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_ZD, 0); + UML_JMPc(block, n ? COND_NE : COND_E, skip_label); + break; + case 0x05: // NR + UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_NR, 0); + UML_JMPc(block, n ? COND_NE : COND_E, skip_label); + break; + case 0x06: // IL + UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_IL, 0); + UML_JMPc(block, n ? COND_NE : COND_E, skip_label); + break; + case 0x07: // ZC + UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_ZC, 0); + UML_JMPc(block, n ? COND_NE : COND_E, skip_label); + break; + case 0x08: // AN + UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_AN, 0); + UML_JMPc(block, n ? COND_NE : COND_E, skip_label); + break; + case 0x09: // AZ + UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_AZ, 0); + UML_JMPc(block, n ? COND_NE : COND_E, skip_label); + break; + case 0x0a: // AV + UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_AV, 0); + UML_JMPc(block, n ? COND_NE : COND_E, skip_label); + break; + case 0x0b: // AU + UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_AU, 0); + UML_JMPc(block, n ? COND_NE : COND_E, skip_label); + break; + case 0x0c: // MD + UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_MD, 0); + UML_JMPc(block, n ? COND_NE : COND_E, skip_label); + break; + case 0x0d: // AD + UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_AD, 0); + UML_JMPc(block, n ? COND_NE : COND_E, skip_label); + break; + default: + fatalerror("generate_condition: unimplemented cc %02X at %08X", cc, desc->pc); + break; + } +} + + +void mb86235_device::generate_control(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + uint64_t op = desc->opptr.q[0]; + int ef1 = (op >> 16) & 0x3f; + int ef2 = op & 0xffff; + int cop = (op >> 22) & 0x1f; +// int rel12 = (op & 0x800) ? (0xfffff000 | (op & 0xfff)) : (op & 0xfff); + + switch (cop) + { + case 0x00: // NOP + break; + + case 0x03: // + if (ef1 == 1) // CLRFI + UML_CALLH(block, *m_clear_fifo_in); + else if (ef1 == 2) // CLRFO + { + UML_CALLH(block, *m_clear_fifo_out0); + UML_CALLH(block, *m_clear_fifo_out1); + } + else if (ef1 == 3) // CLRF + { + UML_CALLH(block, *m_clear_fifo_in); + UML_CALLH(block, *m_clear_fifo_out0); + UML_CALLH(block, *m_clear_fifo_out1); + } + break; + + case 0x08: // SETM #imm16 + UML_MOV(block, mem(&m_core->mod), ef2); + break; + + case 0x10: // DBcc + { + code_label skip_label = compiler->labelnum++; + + generate_branch_target(block, compiler, desc, (op >> 12) & 0xf, ef2); + generate_condition(block, compiler, desc, ef1, false, skip_label, true); + generate_branch(block, compiler, desc); + UML_LABEL(block, skip_label); + break; + } + + case 0x11: // DBNcc + { + code_label skip_label = compiler->labelnum++; + + generate_branch_target(block, compiler, desc, (op >> 12) & 0xf, ef2); + generate_condition(block, compiler, desc, ef1, true, skip_label, true); + generate_branch(block, compiler, desc); + UML_LABEL(block, skip_label); + break; + } + + case 0x12: // DJMP + { + generate_branch_target(block, compiler, desc, (op >> 12) & 0xf, ef2); + generate_branch(block, compiler, desc); + break; + } + + case 0x1a: // DCALL + { + // push PC + code_label no_overflow = compiler->labelnum++; + UML_CMP(block, mem(&m_core->pcs_ptr), 4); + UML_JMPc(block, COND_L, no_overflow); + UML_MOV(block, mem(&m_core->pc), desc->pc); + UML_CALLC(block, cfunc_pcs_overflow, this); + + UML_LABEL(block, no_overflow); + UML_STORE(block, m_core->pcs, mem(&m_core->pcs_ptr), desc->pc + 2, SIZE_DWORD, SCALE_x4); + UML_ADD(block, mem(&m_core->pcs_ptr), mem(&m_core->pcs_ptr), 1); + + generate_branch_target(block, compiler, desc, (op >> 12) & 0xf, ef2); + generate_branch(block, compiler, desc); + break; + } + + case 0x1b: // DRET + { + // pop PC + code_label no_underflow = compiler->labelnum++; + UML_CMP(block, mem(&m_core->pcs_ptr), 0); + UML_JMPc(block, COND_G, no_underflow); + UML_MOV(block, mem(&m_core->pc), desc->pc); + UML_CALLC(block, cfunc_pcs_underflow, this); + + UML_LABEL(block, no_underflow); + UML_SUB(block, mem(&m_core->pcs_ptr), mem(&m_core->pcs_ptr), 1); + UML_LOAD(block, I0, m_core->pcs, mem(&m_core->pcs_ptr), SIZE_DWORD, SCALE_x4); + + generate_branch(block, compiler, desc); + break; + } + + default: + UML_MOV(block, mem(&m_core->pc), desc->pc); + UML_MOV(block, mem(&m_core->arg0), cop); + UML_CALLC(block, cfunc_unimplemented_control, this); + break; + } +} + +void mb86235_device::generate_xfer1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + UML_MOV(block, mem(&m_core->pc), desc->pc); + UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); + UML_CALLC(block, cfunc_unimplemented_xfer1, this); +} + +void mb86235_device::generate_double_xfer1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + UML_MOV(block, mem(&m_core->pc), desc->pc); + UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); + UML_CALLC(block, cfunc_unimplemented_double_xfer1, this); +} + +void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + uint64_t opcode = desc->opptr.q[0]; + + int op = (opcode >> 39) & 3; + int trm = (opcode >> 38) & 1; + int dir = (opcode >> 37) & 1; + int sr = (opcode >> 31) & 0x7f; + int dr = (opcode >> 24) & 0x7f; + int ary = (opcode >> 4) & 7; + int md = opcode & 0xf; + + int disp14 = (opcode >> 7) & 0x3fff; + if (disp14 & 0x2000) disp14 |= 0xffffc000; + + if (op == 0) // MOV2 + { + if (trm == 0) + { + if (sr == 0x58) + { + // MOV2 #imm24, DR + generate_reg_write(block, compiler, desc, dr & 0x3f, uml::parameter(opcode & 0xffffff)); + } + else + { + if ((sr & 0x40) == 0) + { + generate_reg_read(block, compiler, desc, sr & 0x3f, I1); + } + else + { + generate_ea(block, compiler, desc, md, sr & 7, ary, disp14); + if (sr & 0x20) // RAM-B + { + UML_SHL(block, I0, I0, 2); + UML_READ(block, I1, I0, SIZE_DWORD, SPACE_IO); + } + else // RAM-A + { + UML_CALLH(block, *m_read_abus); + } + } + + if ((dr & 0x40) == 0) + { + generate_reg_write(block, compiler, desc, dr & 0x3f, I1); + } + else + { + generate_ea(block, compiler, desc, md, dr & 7, ary, disp14); + if (dr & 0x20) // RAM-B + { + UML_SHL(block, I0, I0, 2); + UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_IO); + } + else // RAM-A + { + UML_CALLH(block, *m_write_abus); + } + } + } + } + else + { + // external transfer + if (dir == 0) + { + generate_reg_read(block, compiler, desc, dr & 0x3f, I0); + UML_ADD(block, I1, mem(&m_core->eb), mem(&m_core->eo)); + UML_ADD(block, I1, I1, disp14); + UML_SHL(block, I1, I1, 2); + UML_WRITE(block, I1, I0, SIZE_DWORD, SPACE_DATA); + } + else + { + UML_ADD(block, I1, mem(&m_core->eb), mem(&m_core->eo)); + UML_ADD(block, I1, I1, disp14); + UML_SHL(block, I1, I1, 2); + UML_READ(block, I0, I1, SIZE_DWORD, SPACE_DATA); + generate_reg_write(block, compiler, desc, dr & 0x3f, I0); + } + + // update EO + UML_ADD(block, mem(&m_core->eo), mem(&m_core->eo), disp14); + } + } + else if (op == 2) // MOV4 + { + fatalerror("generate_xfer2 MOV4 at %08X (%08X%08X)", desc->pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode)); + } +} + +void mb86235_device::generate_double_xfer2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + UML_MOV(block, mem(&m_core->pc), desc->pc); + UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); + UML_CALLC(block, cfunc_unimplemented_double_xfer2, this); +} + +void mb86235_device::generate_xfer3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + uint64_t opcode = desc->opptr.q[0]; + + uint32_t imm = (uint32_t)(opcode >> 27); + int dr = (opcode >> 19) & 0x7f; + int ary = (opcode >> 4) & 7; + int md = opcode & 0xf; + + int disp = (opcode >> 7) & 0xfff; + if (disp & 0x800) disp |= 0xfffff800; + + switch (dr >> 5) + { + case 0: + case 1: // reg + generate_reg_write(block, compiler, desc, dr & 0x3f, uml::parameter(imm)); + break; + + case 2: // RAM-A + generate_ea(block, compiler, desc, md, dr & 7, ary, disp); + UML_MOV(block, I1, imm); + UML_CALLH(block, *m_write_abus); + break; + + case 3: // RAM-B + generate_ea(block, compiler, desc, md, dr & 7, ary, disp); + UML_SHL(block, I0, I0, 2); + UML_WRITE(block, I0, imm, SIZE_DWORD, SPACE_IO); + break; + } +} + + +void mb86235_device::generate_pre_control(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + uint64_t op = desc->opptr.q[0]; + int ef1 = (op >> 16) & 0x3f; + int ef2 = op & 0xffff; + int cop = (op >> 22) & 0x1f; + + switch (cop) + { + case 0x10: // DBcc + case 0x11: // DBNcc + case 0x18: // DCcc + case 0x19: // DCNcc + switch (ef1) + { + case 0x00: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MN); break; // MN + case 0x01: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MZ); break; // MZ + case 0x02: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MV); break; // MV + case 0x03: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MU); break; // MU + case 0x04: UML_MOV(block, mem(&m_core->condtemp), FLAGS_ZD); break; // ZD + case 0x05: UML_MOV(block, mem(&m_core->condtemp), FLAGS_NR); break; // NR + case 0x06: UML_MOV(block, mem(&m_core->condtemp), FLAGS_IL); break; // IL + case 0x07: UML_MOV(block, mem(&m_core->condtemp), FLAGS_ZC); break; // ZC + case 0x08: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AN); break; // AN + case 0x09: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AZ); break; // AZ + case 0x0a: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AV); break; // AV + case 0x0b: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AU); break; // AU + case 0x0c: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MD); break; // MD + case 0x0d: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AD); break; // AD + default: + fatalerror("generate_pre_control: unimplemented cc %02X at %08X", ef1, desc->pc); + break; + } + break; + + case 0x14: // DBBC ARx:y, rel12 + // TODO: copy ARx + UML_MOV(block, mem(&m_core->condtemp), AR((ef2 >> 13) & 7)); + break; + + case 0x15: // DBBS ARx:y, rel12 + // TODO: copy ARx + UML_MOV(block, mem(&m_core->condtemp), AR((ef2 >> 13) & 7)); + break; + + default: + break; + } +} diff --git a/src/devices/cpu/mb86235/mb86235fe.cpp b/src/devices/cpu/mb86235/mb86235fe.cpp new file mode 100644 index 00000000000..4c4e0717034 --- /dev/null +++ b/src/devices/cpu/mb86235/mb86235fe.cpp @@ -0,0 +1,873 @@ +// license:BSD-3-Clause +// copyright-holders:Ville Linde + +/****************************************************************************** + + Front-end for MB86235 recompiler + +******************************************************************************/ + +#include "emu.h" +#include "mb86235fe.h" + + +#define AA_USED(desc,x) do { (desc).regin[0] |= 1 << (x); } while(0) +#define AA_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (x); } while(0) +#define AB_USED(desc,x) do { (desc).regin[0] |= 1 << (8+(x)); } while(0) +#define AB_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (8+(x)); } while(0) +#define MA_USED(desc,x) do { (desc).regin[0] |= 1 << (16+(x)); } while(0) +#define MA_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (16+(x)); } while(0) +#define MB_USED(desc,x) do { (desc).regin[0] |= 1 << (24+(x)); } while(0) +#define MB_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (24+(x)); } while(0) +#define AR_USED(desc,x) do { (desc).regin[1] |= 1 << (24+(x)); } while(0) +#define AR_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << (24+(x)); } while(0) + +#define AZ_USED(desc) do { (desc).regin[1] |= 1 << 0; } while (0) +#define AZ_MODIFIED(desc) do { (desc).regout[1] |= 1 << 0; } while (0) +#define AN_USED(desc) do { (desc).regin[1] |= 1 << 1; } while (0) +#define AN_MODIFIED(desc) do { (desc).regout[1] |= 1 << 1; } while (0) +#define AV_USED(desc) do { (desc).regin[1] |= 1 << 2; } while (0) +#define AV_MODIFIED(desc) do { (desc).regout[1] |= 1 << 2; } while (0) +#define AU_USED(desc) do { (desc).regin[1] |= 1 << 3; } while (0) +#define AU_MODIFIED(desc) do { (desc).regout[1] |= 1 << 3; } while (0) +#define AD_USED(desc) do { (desc).regin[1] |= 1 << 4; } while (0) +#define AD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 4; } while (0) +#define ZC_USED(desc) do { (desc).regin[1] |= 1 << 5; } while (0) +#define ZC_MODIFIED(desc) do { (desc).regout[1] |= 1 << 5; } while (0) +#define IL_USED(desc) do { (desc).regin[1] |= 1 << 6; } while (0) +#define IL_MODIFIED(desc) do { (desc).regout[1] |= 1 << 6; } while (0) +#define NR_USED(desc) do { (desc).regin[1] |= 1 << 7; } while (0) +#define NR_MODIFIED(desc) do { (desc).regout[1] |= 1 << 7; } while (0) +#define ZD_USED(desc) do { (desc).regin[1] |= 1 << 8; } while (0) +#define ZD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 8; } while (0) +#define MN_USED(desc) do { (desc).regin[1] |= 1 << 9; } while (0) +#define MN_MODIFIED(desc) do { (desc).regout[1] |= 1 << 9; } while (0) +#define MZ_USED(desc) do { (desc).regin[1] |= 1 << 10; } while (0) +#define MZ_MODIFIED(desc) do { (desc).regout[1] |= 1 << 10; } while (0) +#define MV_USED(desc) do { (desc).regin[1] |= 1 << 11; } while (0) +#define MV_MODIFIED(desc) do { (desc).regout[1] |= 1 << 11; } while (0) +#define MU_USED(desc) do { (desc).regin[1] |= 1 << 12; } while (0) +#define MU_MODIFIED(desc) do { (desc).regout[1] |= 1 << 12; } while (0) +#define MD_USED(desc) do { (desc).regin[1] |= 1 << 13; } while (0) +#define MD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 13; } while (0) + + +mb86235_frontend::mb86235_frontend(mb86235_device *core, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) + : drc_frontend(*core, window_start, window_end, max_sequence), + m_core(core) +{ +} + + +bool mb86235_frontend::describe(opcode_desc &desc, const opcode_desc *prev) +{ + uint64_t opcode = desc.opptr.q[0] = m_core->m_direct->read_qword(desc.pc * 8, 0); + + desc.length = 1; + desc.cycles = 1; + + // repeatable instruction needs an entry point + if (prev != nullptr) + { + if (prev->userflags & OP_USERFLAG_REPEAT) + { + desc.flags |= OPFLAG_IS_BRANCH_TARGET; + desc.userflags |= OP_USERFLAG_REPEATED_OP; + } + } + + switch ((opcode >> 61) & 7) + { + case 0: // ALU / MUL / double transfer (type 1) + describe_alu(desc, (opcode >> 42) & 0x7ffff); + describe_mul(desc, (opcode >> 27) & 0x7fff); + describe_double_xfer1(desc); + break; + case 1: // ALU / MUL / transfer (type 1) + describe_alu(desc, (opcode >> 42) & 0x7ffff); + describe_mul(desc, (opcode >> 27) & 0x7fff); + describe_xfer1(desc); + break; + case 2: // ALU / MUL / control + describe_alu(desc, (opcode >> 42) & 0x7ffff); + describe_mul(desc, (opcode >> 27) & 0x7fff); + describe_control(desc); + break; + case 4: // ALU or MUL / double transfer (type 2) + if (opcode & ((uint64_t)(1) << 41)) + describe_alu(desc, (opcode >> 42) & 0x7ffff); + else + describe_mul(desc, (opcode >> 42) & 0x7fff); + describe_double_xfer2(desc); + break; + case 5: // ALU or MUL / transfer (type 2) + if (opcode & ((uint64_t)(1) << 41)) + describe_alu(desc, (opcode >> 42) & 0x7ffff); + else + describe_mul(desc, (opcode >> 42) & 0x7fff); + describe_xfer2(desc); + break; + case 6: // ALU or MUL / control + if (opcode & ((uint64_t)(1) << 41)) + describe_alu(desc, (opcode >> 42) & 0x7ffff); + else + describe_mul(desc, (opcode >> 42) & 0x7fff); + describe_control(desc); + break; + case 7: // transfer (type 3) + describe_xfer3(desc); + break; + + default: + return false; + } + + return true; +} + +void mb86235_frontend::describe_alu_input(opcode_desc &desc, int reg) +{ + switch (reg) + { + case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: + AA_USED(desc, reg & 7); + break; + + case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: + AB_USED(desc, reg & 7); + break; + + case 0x10: // PR + break; + + case 0x11: // PR++ + desc.userflags &= ~OP_USERFLAG_PR_MASK; + desc.userflags |= OP_USERFLAG_PR_INC; + break; + case 0x12: // PR-- + desc.userflags &= ~OP_USERFLAG_PR_MASK; + desc.userflags |= OP_USERFLAG_PR_DEC; + break; + case 0x13: // PR#0 + desc.userflags &= ~OP_USERFLAG_PR_MASK; + desc.userflags |= OP_USERFLAG_PR_ZERO; + break; + + + default: + break; + } +} + +void mb86235_frontend::describe_mul_input(opcode_desc &desc, int reg) +{ + switch (reg) + { + case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: + MA_USED(desc, reg & 7); + break; + + case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: + MB_USED(desc, reg & 7); + break; + + case 0x10: // PR + break; + + case 0x11: // PR++ + if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority + { + desc.userflags |= OP_USERFLAG_PR_INC; + } + break; + case 0x12: // PR-- + if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority + { + desc.userflags |= OP_USERFLAG_PR_DEC; + } + break; + case 0x13: // PR#0 + if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority + { + desc.userflags |= OP_USERFLAG_PR_ZERO; + } + break; + + default: + break; + } +} + +void mb86235_frontend::describe_alumul_output(opcode_desc &desc, int reg) +{ + switch (reg >> 3) + { + case 0: + MA_MODIFIED(desc, reg & 7); + break; + + case 1: + MB_MODIFIED(desc, reg & 7); + break; + + case 2: + AA_MODIFIED(desc, reg & 7); + break; + + case 3: + AB_MODIFIED(desc, reg & 7); + break; + + default: + break; + } +} + +void mb86235_frontend::describe_reg_read(opcode_desc &desc, int reg) +{ + switch (reg) + { + case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: + // MA0-7 + MA_USED(desc, reg & 7); + break; + case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: + // AA0-7 + AA_USED(desc, reg & 7); + break; + case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: + // AR0-7 + AR_USED(desc, reg & 7); + break; + case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: + // MB0-7 + MB_USED(desc, reg & 7); + break; + case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: + // AB0-7 + AB_USED(desc, reg & 7); + break; + + case 0x31: // FI + desc.userflags |= OP_USERFLAG_FIFOIN; + desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target + break; + + case 0x32: // FO0 + break; + case 0x33: // FO1 + break; + + case 0x10: // EB + case 0x11: // EBU + case 0x12: // EBL + case 0x13: // EO + case 0x15: // ST + case 0x16: // MOD + case 0x17: // LRPC + case 0x34: // PDR + case 0x35: // DDR + case 0x36: // PRP + case 0x37: // PWP + break; + + case 0x30: // PR + if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU and MUL PR updates have higher priority + { + desc.userflags |= OP_USERFLAG_PR_INC; + } + break; + } +} + +void mb86235_frontend::describe_reg_write(opcode_desc &desc, int reg) +{ + switch (reg) + { + case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: + // MA0-7 + MA_MODIFIED(desc, reg & 7); + break; + case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: + // AA0-7 + AA_MODIFIED(desc, reg & 7); + break; + case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: + // AR0-7 + AR_MODIFIED(desc, reg & 7); + break; + case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: + // MB0-7 + MB_MODIFIED(desc, reg & 7); + break; + case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: + // AB0-7 + AB_MODIFIED(desc, reg & 7); + break; + + case 0x31: // FI + break; + + case 0x32: // FO0 + desc.userflags |= OP_USERFLAG_FIFOOUT0; + desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target + break; + case 0x33: // FO1 + desc.userflags |= OP_USERFLAG_FIFOOUT1; + desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target + break; + + case 0x10: // EB + case 0x11: // EBU + case 0x12: // EBL + case 0x13: // EO + case 0x15: // ST + case 0x16: // MOD + case 0x17: // LRPC + case 0x34: // PDR + case 0x35: // DDR + case 0x36: // PRP + case 0x37: // PWP + break; + + case 0x30: // PR + desc.userflags &= ~OP_USERFLAG_PW_MASK; + desc.userflags |= OP_USERFLAG_PW_INC; + break; + } +} + + +void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop) +{ + int i1 = (aluop >> 10) & 0xf; + int i2 = (aluop >> 5) & 0x1f; + int io = aluop & 0x1f; + int op = (aluop >> 14) & 0x1f; + + switch (op) + { + case 0x00: // FADD + describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + AU_MODIFIED(desc); + break; + case 0x01: // FADDZ + describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); + ZC_MODIFIED(desc); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + AU_MODIFIED(desc); + AD_MODIFIED(desc); + break; + case 0x02: // FSUB + describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + AU_MODIFIED(desc); + AD_MODIFIED(desc); + break; + case 0x03: // FSUBZ + describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); + ZC_MODIFIED(desc); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + AU_MODIFIED(desc); + AD_MODIFIED(desc); + break; + case 0x04: // FCMP + describe_alu_input(desc, i1); describe_alu_input(desc, i2); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + AU_MODIFIED(desc); + AD_MODIFIED(desc); + break; + case 0x05: // FABS + describe_alu_input(desc, i1); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AD_MODIFIED(desc); + break; + case 0x06: // FABC + describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AU_MODIFIED(desc); + AD_MODIFIED(desc); + break; + case 0x07: // NOP + break; + case 0x08: // FEA + describe_alu_input(desc, i1); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + AD_MODIFIED(desc); + break; + case 0x09: // FES + describe_alu_input(desc, i1); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AU_MODIFIED(desc); + AD_MODIFIED(desc); + break; + case 0x0a: // FRCP + describe_alu_input(desc, i1); describe_alumul_output(desc, io); + ZD_MODIFIED(desc); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AU_MODIFIED(desc); + AD_MODIFIED(desc); + break; + case 0x0b: // FRSQ + describe_alu_input(desc, i1); describe_alumul_output(desc, io); + NR_MODIFIED(desc); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AU_MODIFIED(desc); + AD_MODIFIED(desc); + break; + case 0x0c: // FLOG + describe_alu_input(desc, i1); describe_alumul_output(desc, io); + IL_MODIFIED(desc); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AD_MODIFIED(desc); + break; + case 0x0d: // CIF + describe_alu_input(desc, i1); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + break; + case 0x0e: // CFI + describe_alu_input(desc, i1); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + AD_MODIFIED(desc); + break; + case 0x0f: // CFIB + describe_alu_input(desc, i1); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + AD_MODIFIED(desc); + AU_MODIFIED(desc); + break; + case 0x10: // ADD + describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + break; + case 0x11: // ADDZ + describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); + ZC_MODIFIED(desc); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + break; + case 0x12: // SUB + describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + break; + case 0x13: // SUBZ + describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); + ZC_MODIFIED(desc); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + break; + case 0x14: // CMP + describe_alu_input(desc, i1); describe_alu_input(desc, i2); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + break; + case 0x15: // ABS + describe_alu_input(desc, i1); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + break; + case 0x16: // ATR + describe_alu_input(desc, i1); describe_alumul_output(desc, io); + break; + case 0x17: // ATRZ + describe_alu_input(desc, i1); describe_alumul_output(desc, io); + ZC_MODIFIED(desc); + break; + case 0x18: // AND + describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + AU_MODIFIED(desc); + break; + case 0x19: // OR + describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + AU_MODIFIED(desc); + break; + case 0x1a: // XOR + describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + AU_MODIFIED(desc); + break; + case 0x1b: // NOT + describe_alu_input(desc, i1); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + AU_MODIFIED(desc); + break; + case 0x1c: // LSR + describe_alu_input(desc, i1); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + AU_MODIFIED(desc); + break; + case 0x1d: // LSL + describe_alu_input(desc, i1); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + AV_MODIFIED(desc); + AU_MODIFIED(desc); + break; + case 0x1e: // ASR + describe_alu_input(desc, i1); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + break; + case 0x1f: // ASL + describe_alu_input(desc, i1); describe_alumul_output(desc, io); + AN_MODIFIED(desc); + AZ_MODIFIED(desc); + break; + } +} + +void mb86235_frontend::describe_mul(opcode_desc &desc, uint32_t mulop) +{ + int i1 = (mulop >> 10) & 0xf; + int i2 = (mulop >> 5) & 0x1f; + int io = mulop & 0x1f; + int m = mulop & 0x4000; + + describe_mul_input(desc, i1); + describe_mul_input(desc, i2); + describe_alumul_output(desc, io); + + if (m) + { + // FMUL + MN_MODIFIED(desc); + MZ_MODIFIED(desc); + MV_MODIFIED(desc); + MU_MODIFIED(desc); + MD_MODIFIED(desc); + } + else + { + // MUL + MN_MODIFIED(desc); + MZ_MODIFIED(desc); + MV_MODIFIED(desc); + } +} + +void mb86235_frontend::describe_ea(opcode_desc &desc, int md, int arx, int ary, int disp) +{ + switch (md) + { + case 0x0: // @ARx + AR_USED(desc, arx); + break; + case 0x1: // @ARx++ + AR_USED(desc, arx); AR_MODIFIED(desc, arx); + break; + case 0x2: // @ARx-- + AR_USED(desc, arx); AR_MODIFIED(desc, arx); + break; + case 0x3: // @ARx++disp + AR_USED(desc, arx); AR_MODIFIED(desc, arx); + break; + case 0x4: // @ARx+ARy + AR_USED(desc, arx); AR_USED(desc, ary); + break; + case 0x5: // @ARx+ARy++ + AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); + break; + case 0x6: // @ARx+ARy-- + AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); + break; + case 0x7: // @ARx+ARy++disp + AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); + break; + case 0x8: // @ARx+ARyU + AR_USED(desc, arx); AR_USED(desc, ary); + break; + case 0x9: // @ARx+ARyL + AR_USED(desc, arx); AR_USED(desc, ary); + break; + case 0xa: // @ARx+disp + AR_USED(desc, arx); + break; + case 0xb: // @ARx+ARy+disp + AR_USED(desc, arx); AR_USED(desc, ary); + break; + case 0xc: // @disp + break; + case 0xd: // @ARx+[ARy++] + AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); + break; + case 0xe: // @ARx+[ARy--] + AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); + break; + case 0xf: // @ARx+[ARy++disp] + AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); + break; + } +} + +void mb86235_frontend::describe_xfer1(opcode_desc &desc) +{ + uint64_t opcode = desc.opptr.q[0]; + fatalerror("mb86235_frontend: describe_xfer1 at %08X (%08X%08X)", desc.pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode)); +} + +void mb86235_frontend::describe_double_xfer1(opcode_desc &desc) +{ + uint64_t opcode = desc.opptr.q[0]; + fatalerror("mb86235_frontend: describe_double_xfer1 at %08X (%08X%08X)", desc.pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode)); +} + +void mb86235_frontend::describe_xfer2(opcode_desc &desc) +{ + uint64_t opcode = desc.opptr.q[0]; + + int op = (opcode >> 39) & 3; + int trm = (opcode >> 38) & 1; + int dir = (opcode >> 37) & 1; + int sr = (opcode >> 31) & 0x7f; + int dr = (opcode >> 24) & 0x7f; + int ary = (opcode >> 4) & 7; + int md = opcode & 0xf; + int disp14 = (opcode >> 7) & 0x3fff; + + if (op == 0) // MOV2 + { + if (trm == 0) + { + if ((sr & 0x40) == 0) + { + describe_reg_read(desc, sr & 0x3f); + } + else if (sr == 0x58) + { + // MOV2 #imm24, DR + } + else + { + describe_ea(desc, md, sr & 7, ary, disp14); + desc.flags |= OPFLAG_READS_MEMORY; + } + + if ((dr & 0x40) == 0) + { + describe_reg_write(desc, dr & 0x3f); + } + else + { + describe_ea(desc, md, dr & 7, ary, disp14); + desc.flags |= OPFLAG_WRITES_MEMORY; + } + } + else + { + // external transfer + if (dir == 0) + { + describe_reg_read(desc, dr & 0x3f); + desc.flags |= OPFLAG_WRITES_MEMORY; + } + else + { + describe_reg_write(desc, dr & 0x3f); + desc.flags |= OPFLAG_READS_MEMORY; + } + } + } + else if (op == 2) // MOV4 + { + fatalerror("mb86235_frontend: describe_xfer2 MOV4 at %08X (%08X%08X)", desc.pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode)); + } + +} + +void mb86235_frontend::describe_double_xfer2(opcode_desc &desc) +{ + uint64_t opcode = desc.opptr.q[0]; + fatalerror("mb86235_frontend: describe_double_xfer2 at %08X (%08X%08X)", desc.pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode)); +} + +void mb86235_frontend::describe_xfer3(opcode_desc &desc) +{ + uint64_t opcode = desc.opptr.q[0]; + + int dr = (opcode >> 19) & 0x7f; + int disp = (opcode >> 7) & 0xfff; + int ary = (opcode >> 4) & 7; + int md = opcode & 0xf; + + switch (dr >> 4) + { + case 0: + case 1: // reg + describe_reg_write(desc, dr & 0x3f); + break; + + case 2: // RAM-A + case 3: // RAM-B + desc.flags |= OPFLAG_WRITES_MEMORY; + describe_ea(desc, md, dr & 7, ary, disp); + break; + } +} + +void mb86235_frontend::describe_control(opcode_desc &desc) +{ + int ef1 = (desc.opptr.q[0] >> 16) & 0x3f; + int ef2 = desc.opptr.q[0] & 0xffff; + int cop = (desc.opptr.q[0] >> 22) & 0x1f; + int rel12 = (desc.opptr.q[0] & 0x800) ? (0xfffff000 | (desc.opptr.q[0] & 0xfff)) : (desc.opptr.q[0] & 0xfff); + + switch (cop) + { + case 0x00: // NOP + break; + case 0x01: // REP + if (ef1 != 0) // ARx + AR_USED(desc, (ef2 >> 12) & 7); + + desc.userflags |= OP_USERFLAG_REPEAT; + break; + case 0x02: // SETL + if (ef1 != 0) // ARx + AR_USED(desc, (ef2 >> 12) & 7); + break; + case 0x03: // CLRFI/CLRFO/CLRF + break; + case 0x04: // PUSH + describe_reg_read(desc, (ef2 >> 6) & 0x3f); + break; + case 0x05: // POP + describe_reg_write(desc, (ef2 >> 6) & 0x3f); + break; + case 0x08: // SETM #imm16 + break; + case 0x09: // SETM #imm3, CBSA + break; + case 0x0a: // SETM #imm3, CBSB + break; + case 0x0b: // SETM #imm1, RF + break; + case 0x0c: // SETM #imm1, RDY + break; + case 0x0d: // SETM #imm1, WAIT + break; + case 0x13: // DBLP rel12 + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.targetpc = desc.pc + rel12; + desc.delayslots = 1; + break; + case 0x14: // DBBC ARx:y, rel12 + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.targetpc = desc.pc + rel12; + desc.delayslots = 1; + AR_USED(desc, ((desc.opptr.q[0] >> 13) & 7)); + break; + case 0x15: // DBBS ARx:y, rel12 + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.targetpc = desc.pc + rel12; + desc.delayslots = 1; + AR_USED(desc, ((desc.opptr.q[0] >> 13) & 7)); + break; + case 0x1b: // DRET + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.delayslots = 1; + break; + + case 0x10: // DBcc + case 0x11: // DBNcc + case 0x18: // DCcc + case 0x19: // DCNcc + { + switch ((desc.opptr.q[0] >> 12) & 0xf) + { + case 0x0: desc.targetpc = ef2 & 0xfff; break; + case 0x1: desc.targetpc = desc.pc + rel12; break; + case 0x2: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0x3: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0x4: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0x5: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0x6: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0x7: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0x8: desc.targetpc = BRANCH_TARGET_DYNAMIC; break; + case 0x9: desc.targetpc = BRANCH_TARGET_DYNAMIC; break; + case 0xa: desc.targetpc = BRANCH_TARGET_DYNAMIC; break; + case 0xb: desc.targetpc = BRANCH_TARGET_DYNAMIC; break; + case 0xc: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0xd: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0xe: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0xf: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + } + + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.delayslots = 1; + break; + } + + case 0x1a: // DCALL + case 0x12: // DJMP + { + switch ((desc.opptr.q[0] >> 12) & 0xf) + { + case 0x0: desc.targetpc = ef2 & 0xfff; break; + case 0x1: desc.targetpc = desc.pc + rel12; break; + case 0x2: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0x3: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0x4: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0x5: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0x6: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0x7: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0x8: desc.targetpc = BRANCH_TARGET_DYNAMIC; break; + case 0x9: desc.targetpc = BRANCH_TARGET_DYNAMIC; break; + case 0xa: desc.targetpc = BRANCH_TARGET_DYNAMIC; break; + case 0xb: desc.targetpc = BRANCH_TARGET_DYNAMIC; break; + case 0xc: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0xd: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0xe: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + case 0xf: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; + } + + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.delayslots = 1; + break; + } + } +}
\ No newline at end of file diff --git a/src/devices/cpu/mb86235/mb86235fe.h b/src/devices/cpu/mb86235/mb86235fe.h new file mode 100644 index 00000000000..ef8bff02df8 --- /dev/null +++ b/src/devices/cpu/mb86235/mb86235fe.h @@ -0,0 +1,47 @@ +// license:BSD-3-Clause +// copyright-holders:Ville Linde + +/****************************************************************************** + + Front-end for MB86235 recompiler + +******************************************************************************/ + +#pragma once + +#include "mb86235.h" +#include "cpu/drcfe.h" + +#ifndef __MB86235FE_H__ +#define __MB86235FE_H__ + +class mb86235_frontend : public drc_frontend +{ +public: + mb86235_frontend(mb86235_device *core, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + +protected: + // required overrides + virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override; + +private: + + mb86235_device *m_core; + + void describe_alu(opcode_desc &desc, uint32_t aluop); + void describe_mul(opcode_desc &desc, uint32_t mulop); + void describe_xfer1(opcode_desc &desc); + void describe_double_xfer1(opcode_desc &desc); + void describe_xfer2(opcode_desc &desc); + void describe_double_xfer2(opcode_desc &desc); + void describe_xfer3(opcode_desc &desc); + void describe_control(opcode_desc &desc); + void describe_alu_input(opcode_desc &desc, int reg); + void describe_mul_input(opcode_desc &desc, int reg); + void describe_alumul_output(opcode_desc &desc, int reg); + void describe_reg_read(opcode_desc &desc, int reg); + void describe_reg_write(opcode_desc &desc, int reg); + void describe_ea(opcode_desc &desc, int md, int arx, int ary, int disp); +}; + +#endif /* __MB86235FE_H__ */ diff --git a/src/devices/machine/74157.cpp b/src/devices/machine/74157.cpp index d02d2f5c936..88f7b1dd03d 100644 --- a/src/devices/machine/74157.cpp +++ b/src/devices/machine/74157.cpp @@ -3,7 +3,7 @@ /*************************************************************************** - 74LS157 Quad 2-Line to 1-Line Data Selectors/Multiplexers (TTL) + 74LS157/74HCT157 Quad 2 to 1-Line Data Selectors/Multiplexers (TTL) Often used to help feed 8-bit ROM data into a MSM5205, and for many other purposes. @@ -27,7 +27,12 @@ const device_type LS157 = &device_creator<ls157_device>; //------------------------------------------------- ls157_device::ls157_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, LS157, "74LS157 Data Selectors/Multiplexers", tag, owner, clock, "74ls157", __FILE__) + : ls157_device(mconfig, LS157, "74LS157 Quad 2-to-1 Multiplexer", tag, owner, clock, "74ls157", __FILE__) +{ +} + +ls157_device::ls157_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, u32 clock, const char *shortname, const char *source) + : device_t(mconfig, type, name, tag, owner, clock, shortname, source) , m_out_cb(*this) { m_a = 0; @@ -200,3 +205,15 @@ void ls157_device::update_output() if (!m_strobe) m_out_cb(m_select ? m_b : m_a); } + + +//************************************************************************** +// 74HCT157 DEVICE +//************************************************************************** + +const device_type HCT157 = &device_creator<hct157_device>; + +hct157_device::hct157_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : ls157_device(mconfig, HCT157, "74HCT157 Quad 2-to-1 Multiplexer", tag, owner, clock, "74hct157", __FILE__) +{ +} diff --git a/src/devices/machine/74157.h b/src/devices/machine/74157.h index 18b6f641075..0a677e549dc 100644 --- a/src/devices/machine/74157.h +++ b/src/devices/machine/74157.h @@ -30,7 +30,7 @@ // DEVICE CONFIGURATION MACROS //************************************************************************** -#define MCFG_74LS157_OUT_CB(_devcb) \ +#define MCFG_74157_OUT_CB(_devcb) \ devcb = &ls157_device::set_out_callback(*device, DEVCB_##_devcb); @@ -44,7 +44,8 @@ class ls157_device : public device_t { public: // construction/destruction - ls157_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + ls157_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + ls157_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, u32 clock, const char *shortname, const char *source); // static configuration template<class _Object> static devcb_base &set_out_callback(device_t &device, _Object object) { return downcast<ls157_device &>(device).m_out_cb.set_callback(object); } @@ -83,6 +84,13 @@ private: bool m_strobe; }; +class hct157_device : public ls157_device +{ +public: + // construction/destruction + hct157_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); +}; + //************************************************************************** // GLOBAL VARIABLES @@ -90,6 +98,7 @@ private: // device type definition extern const device_type LS157; +extern const device_type HCT157; #endif diff --git a/src/mame/arcade.flt b/src/mame/arcade.flt index 24317bf6c26..5fdab2a318f 100644 --- a/src/mame/arcade.flt +++ b/src/mame/arcade.flt @@ -1330,6 +1330,7 @@ zerozone.cpp zn.cpp zodiack.cpp zr107.cpp +zwackery.cpp //exceptions + to add - to remove from imported list //3do.cpp -3do diff --git a/src/mame/audio/midway.cpp b/src/mame/audio/midway.cpp index f6f72684252..f7393ffb247 100644 --- a/src/mame/audio/midway.cpp +++ b/src/mame/audio/midway.cpp @@ -629,7 +629,7 @@ static MACHINE_CONFIG_FRAGMENT(midway_chip_squeak_deluxe) MCFG_PIA_IRQA_HANDLER(WRITELINE(midway_chip_squeak_deluxe_device, irq_w)) MCFG_PIA_IRQB_HANDLER(WRITELINE(midway_chip_squeak_deluxe_device, irq_w)) - MCFG_SOUND_ADD("dac", DAC_10BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, DEVICE_SELF_OWNER, 1.0) // unknown DAC + MCFG_SOUND_ADD("dac", AD7533, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, DEVICE_SELF_OWNER, 1.0) MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0) MCFG_SOUND_ROUTE_EX(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac", -1.0, DAC_VREF_NEG_INPUT) MACHINE_CONFIG_END @@ -965,7 +965,7 @@ static MACHINE_CONFIG_FRAGMENT(midway_turbo_chip_squeak) MCFG_PIA_IRQA_HANDLER(WRITELINE(midway_turbo_chip_squeak_device, irq_w)) MCFG_PIA_IRQB_HANDLER(WRITELINE(midway_turbo_chip_squeak_device, irq_w)) - MCFG_SOUND_ADD("dac", DAC_10BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, DEVICE_SELF_OWNER, 1.0) // unknown DAC + MCFG_SOUND_ADD("dac", AD7533, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, DEVICE_SELF_OWNER, 1.0) MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0) MCFG_SOUND_ROUTE_EX(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac", -1.0, DAC_VREF_NEG_INPUT) MACHINE_CONFIG_END diff --git a/src/mame/drivers/amusco.cpp b/src/mame/drivers/amusco.cpp index 06ecffe728d..b367be69283 100644 --- a/src/mame/drivers/amusco.cpp +++ b/src/mame/drivers/amusco.cpp @@ -91,6 +91,7 @@ #include "machine/pic8259.h" #include "machine/pit8253.h" #include "machine/msm5832.h" +#include "machine/ticket.h" #include "amusco.lh" @@ -102,10 +103,12 @@ public: m_videoram(*this, "videoram"), m_maincpu(*this, "maincpu"), m_gfxdecode(*this, "gfxdecode"), + m_pit(*this, "pit8253"), m_pic(*this, "pic8259"), m_rtc(*this, "rtc"), m_crtc(*this, "crtc"), - m_screen(*this, "screen") + m_screen(*this, "screen"), + m_hopper(*this, "hopper") { } required_shared_ptr<uint8_t> m_videoram; @@ -128,10 +131,12 @@ public: required_device<cpu_device> m_maincpu; required_device<gfxdecode_device> m_gfxdecode; + required_device<pit8253_device> m_pit; required_device<pic8259_device> m_pic; required_device<msm5832_device> m_rtc; required_device<mc6845_device> m_crtc; required_device<screen_device> m_screen; + required_device<ticket_dispenser_device> m_hopper; uint8_t m_mc6845_address; uint16_t m_video_update_address; }; @@ -240,22 +245,39 @@ WRITE8_MEMBER(amusco_state::output_b_w) 7654 3210 ---- --x- Unknown lamp (lits when all holds/disc are ON. Could be a Cancel lamp in an inverted Hold system). ---- -x-- Start/Draw lamp. - ---x ---- Low when sound data queued. - --x- ---- Safe to shutdown? - -x-- ---- Allow NMI? - x--- x--x Unknown. + ---- x--x Unknown. + ---x ---- Special: low when sound data queued. + --x- ---- Special: set by NMI routine (trigger shutdown?) + -x-- ---- Special: cleared in NMI routine (safe to shutdown?) + x--- ---- Special: NMI enable (cleared and set along with CPU interrupt flag). */ output().set_lamp_value(6, (data >> 2) & 1); // Lamp 6 (Start/Draw) output().set_lamp_value(7, (data >> 1) & 1); // Lamp 7 (Unknown) - //machine().bookkeeping().coin_counter_w(0, ~data & 0x10); // Probably not coin-related + m_pit->write_gate0(!BIT(data, 4)); // logerror("Writing %02Xh to PPI output B\n", data); } WRITE8_MEMBER(amusco_state::output_c_w) { +/* Lamps and counters from port C + + 7654 3210 + ---- ---x Unknown (used by Draw 88 Poker only?) + ---- --x- Coin counter (bills not included). + ---- -x-- Unknown counter (points won?) + ---- x--- Unknown counter (points played?) + ---x ---- Coin out pulse. + xxx- ---- Unused. +*/ + if (!data) + return; + + machine().bookkeeping().coin_counter_w(0, !BIT(data, 1)); + m_hopper->motor_w(BIT(data, 4)); + // logerror("Writing %02Xh to PPI output C\n", data); } @@ -475,6 +497,8 @@ static MACHINE_CONFIG_START( amusco, amusco_state ) MCFG_I8155_IN_PORTC_CB(DEVREAD8("rtc", msm5832_device, data_r)) MCFG_I8155_OUT_PORTC_CB(DEVWRITE8("rtc", msm5832_device, data_w)) + MCFG_TICKET_DISPENSER_ADD("hopper", attotime::from_msec(30), TICKET_MOTOR_ACTIVE_LOW, TICKET_STATUS_ACTIVE_HIGH) + /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_REFRESH_RATE(60) diff --git a/src/mame/drivers/aristmk6.cpp b/src/mame/drivers/aristmk6.cpp index 1ba39870c35..bbe82626e13 100644 --- a/src/mame/drivers/aristmk6.cpp +++ b/src/mame/drivers/aristmk6.cpp @@ -650,7 +650,7 @@ ROM_START( apocof ) ROM_LOAD32_WORD("0151105.u86", 0x0000000, 0x0400000, CRC(d1f0a2a6) SHA1(d88fd4153b9a5f655c7949883caf3f947a50652f) ) ROM_LOAD32_WORD("0151105.u73", 0x0000002, 0x0400000, CRC(675ee721) SHA1(3f4afe6196fc39c2544fc3731f39adef0198b9a3) ) ROM_LOAD32_WORD("0151105.u85", 0x0800000, 0x0400000, CRC(daa8cc4f) SHA1(2a71c7dbd0691654b614fcd09dae4ff47a60b655) ) - ROM_LOAD32_WORD("0151105.u72", 0x0800002, 0x01c0000, CRC(f3733388) SHA1(cf01799770b785a0f7527aedf627f16642a60ff3) ) + ROM_LOAD32_WORD("0151105.u72", 0x0800002, 0x01c0000, BAD_DUMP CRC(f3733388) SHA1(cf01799770b785a0f7527aedf627f16642a60ff3) ) ROM_END diff --git a/src/mame/drivers/chihiro.cpp b/src/mame/drivers/chihiro.cpp index 796d0c929c1..02b2842bfe7 100644 --- a/src/mame/drivers/chihiro.cpp +++ b/src/mame/drivers/chihiro.cpp @@ -56,13 +56,13 @@ Games on this system include.... | | 2005 | Sega Network Taisen Mahjong MJ 3 (Rev E) | Sega | GDROM | GDX-0017E | 317-0414-JPN | |*| 2005 | Sega Network Taisen Mahjong MJ 3 (Rev F) | Sega | GDROM | GDX-0017F | 317-0414-JPN | | | 2005 | Sega Club Golf 2006: Next Tours | Sega | GDROM | GDX-0018 | | -|*| 2005 | Sega Club Golf 2006: Next Tours (Rev A) | Sega | GDROM | GDX-0018A | | +|*| 2005 | Sega Club Golf 2006: Next Tours (Rev A) | Sega | GDROM | GDX-0018A | ? | | | 2006 | Sega Network Taisen Mahjong MJ 3 Evolution | Sega | GDROM | GDX-0021 | | | | 2006 | Sega Network Taisen Mahjong MJ 3 Evolution (Rev A) | Sega | GDROM | GDX-0021A | | -|*| 2007 | Sega Network Taisen Mahjong MJ 3 Evolution (Rev B) | Sega | GDROM | GDX-0021B | | +|*| 2007 | Sega Network Taisen Mahjong MJ 3 Evolution (Rev B) | Sega | GDROM | GDX-0021B | ? | | | 2009 | Firmware Update For Compact Flash Box | Sega | GDROM | GDX-0024 | | |*| 2009 | Firmware Update For Compact Flash Box (Rev A) | Sega | GDROM | GDX-0024A | 317-0567-EXP | -|*| 2004 | Quest Of D Ver.1.01C | Sega | CDROM | CDV-10005C | | +|*| 2004 | Quest Of D Ver.1.01C | Sega | CDROM | CDV-10005C | 317-0376-JPN | |*| 2005 | Sangokushi Taisen Ver.1.002 | Sega | DVDROM | CDV-10009D | | |*| 2005 | Mobile Suit Gundam 0079 Card Builder | Banpresto | DVDROM | CDV-10010 | 317-0415-JPN | |*| 2006 | Sangokushi Taisen 2 Ver.2.007 | Sega | DVDROM | CDV-10019A | | @@ -2027,8 +2027,8 @@ ROM_START( questofd ) DISK_IMAGE_READONLY( "cdv-10005c", 0, SHA1(b30238cf8697fb7313fedbe75b70641e9418090f) ) ROM_REGION( 0x4000, "pic", ROMREGION_ERASEFF) - //PIC16C621A brute-forced key, label is unknown - ROM_LOAD("317-xxxx-xxx.pic", 0x00, 0x4000, CRC(c6914d97) SHA1(e86897efcca86f303117d1ead6ede53ac410add8) ) + //PIC16C621A (317-0376-JPN) + ROM_LOAD("317-0376-jpn.pic", 0x00, 0x4000, CRC(c6914d97) SHA1(e86897efcca86f303117d1ead6ede53ac410add8) ) ROM_END ROM_START( gundcb79 ) diff --git a/src/mame/drivers/coco12.cpp b/src/mame/drivers/coco12.cpp index aa9ec9350ad..af52bc2da74 100644 --- a/src/mame/drivers/coco12.cpp +++ b/src/mame/drivers/coco12.cpp @@ -24,6 +24,7 @@ ***************************************************************************/ #include "includes/coco12.h" +#include "bus/coco/coco_t4426.h" #include "bus/coco/coco_232.h" #include "bus/coco/coco_orch90.h" #include "bus/coco/coco_pak.h" @@ -264,7 +265,13 @@ SLOT_INTERFACE_START( coco_cart ) SLOT_INTERFACE("multi", COCO_MULTIPAK) SLOT_INTERFACE_END +//------------------------------------------------- +// SLOT_INTERFACE_START(t4426_cart) +//------------------------------------------------- +SLOT_INTERFACE_START( t4426_cart ) + SLOT_INTERFACE("t4426", COCO_T4426) +SLOT_INTERFACE_END //------------------------------------------------- // MACHINE_CONFIG_FRAGMENT( coco_sound ) @@ -392,6 +399,14 @@ static MACHINE_CONFIG_DERIVED( cp400, coco ) MCFG_COCO_CARTRIDGE_HALT_CB(INPUTLINE(MAINCPU_TAG, INPUT_LINE_HALT)) MACHINE_CONFIG_END +static MACHINE_CONFIG_DERIVED( t4426, coco2 ) + MCFG_COCO_CARTRIDGE_REMOVE(CARTRIDGE_TAG) + MCFG_COCO_CARTRIDGE_ADD(CARTRIDGE_TAG, t4426_cart, "t4426") + MCFG_COCO_CARTRIDGE_CART_CB(WRITELINE(coco_state, cart_w)) + MCFG_COCO_CARTRIDGE_NMI_CB(INPUTLINE(MAINCPU_TAG, INPUT_LINE_NMI)) + MCFG_COCO_CARTRIDGE_HALT_CB(INPUTLINE(MAINCPU_TAG, INPUT_LINE_HALT)) + MCFG_SLOT_FIXED(true) // This cart is fixed so no way to change it +MACHINE_CONFIG_END //************************************************************************** // ROMS @@ -431,6 +446,12 @@ ROM_START(mx1600 ) ROM_LOAD("mx1600extbas.rom", 0x0000, 0x2000, CRC(322a3d58) SHA1(9079a477c3f22e46cebb1e68b61df5bd607c71a4)) ROM_END +ROM_START( t4426 ) + ROM_REGION(0x8000,MAINCPU_TAG,0) + ROM_LOAD("SOFT4426-U13-1.2.bin", 0x2000, 0x2000, CRC(3c1af94a) SHA1(1dc57b3e4a6ef6a743ca21d8f111a74b1ea9d54e)) + ROM_LOAD("SOFT4426-U14-1.2.bin", 0x0000, 0x2000, CRC(e031d076) SHA1(7275f1e3f165ff6a4657e4e5e24cb8b817239f54)) +ROM_END + ROM_START(lzcolor64 ) ROM_REGION(0x8000,MAINCPU_TAG,0) ROM_LOAD("color64bas.rom", 0x2000, 0x2000, CRC(b0717d71) SHA1(ad1beef9d6f095ada69f91d0b8ad75985172d86f)) @@ -444,8 +465,9 @@ ROM_END /* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */ COMP( 1980, coco, 0, 0, coco, coco, driver_device, 0, "Tandy Radio Shack", "Color Computer", 0) COMP( 1981, cocoe, coco, 0, cocoe, coco, driver_device, 0, "Tandy Radio Shack", "Color Computer (Extended BASIC 1.0)", 0) -COMP( 1983, coco2, coco, 0, coco2, coco, driver_device, 0, "Tandy Radio Shack", "Color Computer 2", 0) -COMP( 1985?, coco2b, coco, 0, coco2b, coco, driver_device, 0, "Tandy Radio Shack", "Color Computer 2B", 0) +COMP( 1983, coco2, coco, 0, coco2, coco, driver_device, 0, "Tandy Radio Shack", "Color Computer 2", 0) +COMP( 1985?, coco2b, coco, 0, coco2b, coco, driver_device, 0, "Tandy Radio Shack", "Color Computer 2B", 0) COMP( 1984, cp400, coco, 0, cp400, coco, driver_device, 0, "Prologica", "CP400", 0) COMP( 1984, lzcolor64, coco, 0, coco, coco, driver_device, 0, "Digiponto", "LZ Color64", 0) COMP( 1984, mx1600, coco, 0, coco, coco, driver_device, 0, "Dynacom", "MX-1600", 0) +COMP( 1986, t4426, coco, 0, t4426, coco, driver_device, 0, "Terco AB", "Terco 4426 CNC Programming station", MACHINE_NOT_WORKING) diff --git a/src/mame/drivers/dec0.cpp b/src/mame/drivers/dec0.cpp index 1b21ab2514e..d350869cec1 100644 --- a/src/mame/drivers/dec0.cpp +++ b/src/mame/drivers/dec0.cpp @@ -1476,10 +1476,10 @@ static MACHINE_CONFIG_START( automat, dec0_automat_state ) MCFG_SOUND_ROUTE(3, "mono", 0.35) MCFG_DEVICE_ADD("adpcm_select1", LS157, 0) - MCFG_74LS157_OUT_CB(DEVWRITE8("msm1", msm5205_device, data_w)) + MCFG_74157_OUT_CB(DEVWRITE8("msm1", msm5205_device, data_w)) MCFG_DEVICE_ADD("adpcm_select2", LS157, 0) - MCFG_74LS157_OUT_CB(DEVWRITE8("msm2", msm5205_device, data_w)) + MCFG_74157_OUT_CB(DEVWRITE8("msm2", msm5205_device, data_w)) MCFG_SOUND_ADD("msm1", MSM5205, 384000) MCFG_MSM5205_VCLK_CB(WRITELINE(dec0_automat_state, msm1_vclk_cb)) @@ -1547,10 +1547,10 @@ static MACHINE_CONFIG_START( secretab, dec0_automat_state ) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80) MCFG_DEVICE_ADD("adpcm_select1", LS157, 0) - MCFG_74LS157_OUT_CB(DEVWRITE8("msm1", msm5205_device, data_w)) + MCFG_74157_OUT_CB(DEVWRITE8("msm1", msm5205_device, data_w)) MCFG_DEVICE_ADD("adpcm_select2", LS157, 0) - MCFG_74LS157_OUT_CB(DEVWRITE8("msm2", msm5205_device, data_w)) + MCFG_74157_OUT_CB(DEVWRITE8("msm2", msm5205_device, data_w)) MCFG_SOUND_ADD("msm1", MSM5205, 384000) MCFG_MSM5205_VCLK_CB(WRITELINE(dec0_automat_state, msm1_vclk_cb)) diff --git a/src/mame/drivers/discoboy.cpp b/src/mame/drivers/discoboy.cpp index 184a56d9a75..094f359a805 100644 --- a/src/mame/drivers/discoboy.cpp +++ b/src/mame/drivers/discoboy.cpp @@ -518,7 +518,7 @@ static MACHINE_CONFIG_START( discoboy, discoboy_state ) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.6) MCFG_DEVICE_ADD("adpcm_select", LS157, 0) - MCFG_74LS157_OUT_CB(DEVWRITE8("msm", msm5205_device, data_w)) + MCFG_74157_OUT_CB(DEVWRITE8("msm", msm5205_device, data_w)) MCFG_SOUND_ADD("msm", MSM5205, XTAL_400kHz) MCFG_MSM5205_VCLK_CB(WRITELINE(discoboy_state, yunsung8_adpcm_int)) /* interrupt function */ diff --git a/src/mame/drivers/hh_cop400.cpp b/src/mame/drivers/hh_cop400.cpp index 30b49d38ee7..29286a18b69 100644 --- a/src/mame/drivers/hh_cop400.cpp +++ b/src/mame/drivers/hh_cop400.cpp @@ -25,6 +25,7 @@ #include "funrlgl.lh" #include "h2hbaskb.lh" #include "lightfgt.lh" // clickable +#include "qkracer.lh" //#include "hh_cop400_test.lh" // common test-layout - use external artwork @@ -497,8 +498,7 @@ public: void einvaderc_state::prepare_display() { // D0-D2 are 7segs - for (int y = 0; y < 3; y++) - m_display_segmask[y] = 0x7f; + set_display_segmask(7, 0x7f); // update display uint8_t l = BITSWAP8(m_l,7,6,0,1,2,3,4,5); @@ -1150,6 +1150,133 @@ MACHINE_CONFIG_END /*************************************************************************** + National Semiconductor QuizKid Racer (COP420 version) + * COP420 MCU label COP420-NPG/N + + This is the COP420 version, the first release was on a MM5799 MCU. + +***************************************************************************/ + +class qkracer_state : public hh_cop400_state +{ +public: + qkracer_state(const machine_config &mconfig, device_type type, const char *tag) + : hh_cop400_state(mconfig, type, tag) + { } + + void prepare_display(); + DECLARE_WRITE8_MEMBER(write_d); + DECLARE_WRITE8_MEMBER(write_g); + DECLARE_WRITE8_MEMBER(write_l); + DECLARE_READ8_MEMBER(read_in); + DECLARE_WRITE_LINE_MEMBER(write_sk); +}; + +// handlers + +void qkracer_state::prepare_display() +{ + set_display_segmask(0xdf, 0x7f); + set_display_segmask(0x20, 0x41); // equals sign + + display_matrix(7, 9, m_l, ~(m_d | m_g << 4 | m_sk << 8)); +} + +WRITE8_MEMBER(qkracer_state::write_d) +{ + // D: select digit, D3: input mux high bit + m_inp_mux = (m_inp_mux & 0xf) | (data << 1 & 0x10); + m_d = data; +} + +WRITE8_MEMBER(qkracer_state::write_g) +{ + // G: select digit, input mux + m_inp_mux = (m_inp_mux & 0x10) | (data & 0xf); + m_g = data; +} + +WRITE8_MEMBER(qkracer_state::write_l) +{ + // L0-L6: digit segment data + // strobe display + m_l = data; + prepare_display(); + m_l = 0; + prepare_display(); +} + +READ8_MEMBER(qkracer_state::read_in) +{ + // IN: multiplexed inputs + return read_inputs(5) & 0xf; +} + +WRITE_LINE_MEMBER(qkracer_state::write_sk) +{ + // SK: green led + m_sk = state; + prepare_display(); +} + + +// config + +static INPUT_PORTS_START( qkracer ) + PORT_START("IN.0") // G0 port IN + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_7) PORT_CODE(KEYCODE_7_PAD) PORT_NAME("7") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_8) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("8") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_9) PORT_CODE(KEYCODE_9_PAD) PORT_NAME("9") + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_SLASH_PAD) PORT_NAME(UTF8_DIVIDE) + + PORT_START("IN.1") // G1 port IN + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_4) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("4") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_5) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("5") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_6) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("6") + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_ASTERISK) PORT_NAME(UTF8_MULTIPLY) + + PORT_START("IN.2") // G2 port IN + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_1) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("1") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_2) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("2") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_3) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("3") + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_MINUS_PAD) PORT_NAME("-") + + PORT_START("IN.3") // G3 port IN + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_MINUS) PORT_NAME("Slow") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_EQUALS) PORT_NAME("Fast") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_0) PORT_CODE(KEYCODE_0_PAD) PORT_NAME("0") + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_PLUS_PAD) PORT_NAME("+") + + PORT_START("IN.4") // D3 port IN + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_Q) PORT_NAME("Amateur") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_W) PORT_NAME("Pro") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_E) PORT_NAME("Complex") + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_R) PORT_NAME("Tables") +INPUT_PORTS_END + +static MACHINE_CONFIG_START( qkracer, qkracer_state ) + + /* basic machine hardware */ + MCFG_CPU_ADD("maincpu", COP420, 1000000) // approximation - RC osc. R=47K, C=100pf + MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_32, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed + MCFG_COP400_WRITE_D_CB(WRITE8(qkracer_state, write_d)) + MCFG_COP400_WRITE_G_CB(WRITE8(qkracer_state, write_g)) + MCFG_COP400_WRITE_L_CB(WRITE8(qkracer_state, write_l)) + MCFG_COP400_READ_IN_CB(READ8(qkracer_state, read_in)) + MCFG_COP400_WRITE_SK_CB(WRITELINE(qkracer_state, write_sk)) + + MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_cop400_state, display_decay_tick, attotime::from_msec(1)) + MCFG_DEFAULT_LAYOUT(layout_qkracer) + + /* no sound! */ +MACHINE_CONFIG_END + + + + + +/*************************************************************************** + Game driver(s) ***************************************************************************/ @@ -1202,6 +1329,12 @@ ROM_START( bship82 ) ROM_END +ROM_START( qkracer ) + ROM_REGION( 0x0400, "maincpu", 0 ) + ROM_LOAD( "cop420-npg_n", 0x0000, 0x0400, CRC(17f8e538) SHA1(23d1a1819e6ba552d8da83da2948af1cf5b13d5b) ) +ROM_END + + /* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY, FULLNAME, FLAGS */ CONS( 1979, ctstein, 0, 0, ctstein, ctstein, driver_device, 0, "Castle Toy", "Einstein (Castle Toy)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) @@ -1217,5 +1350,7 @@ CONS( 1980, plus1, 0, 0, plus1, plus1, driver_device, 0, "Mil CONS( 1981, lightfgt, 0, 0, lightfgt, lightfgt, driver_device, 0, "Milton Bradley", "Lightfight", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) CONS( 1982, bship82, bship, 0, bship82, bship82, driver_device, 0, "Milton Bradley", "Electronic Battleship (1982 version)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) // *** +CONS( 1978, qkracer, 0, 0, qkracer, qkracer, driver_device, 0, "National Semiconductor", "QuizKid Racer (COP420 version)", MACHINE_SUPPORTS_SAVE | MACHINE_NO_SOUND_HW ) + // ***: As far as MAME is concerned, the game is emulated fine. But for it to be playable, it requires interaction // with other, unemulatable, things eg. game board/pieces, playing cards, pen & paper, etc. diff --git a/src/mame/drivers/inder.cpp b/src/mame/drivers/inder.cpp index b9a9fb2eef9..67c7bf014d2 100644 --- a/src/mame/drivers/inder.cpp +++ b/src/mame/drivers/inder.cpp @@ -35,6 +35,7 @@ #include "sound/ay8910.h" #include "sound/msm5205.h" #include "machine/7474.h" +#include "machine/74157.h" #include "inder.lh" class inder_state : public genpin_class @@ -49,6 +50,7 @@ public: , m_7a(*this, "7a") , m_9a(*this, "9a") , m_9b(*this, "9b") + , m_13(*this, "13") , m_switches(*this, "SW.%u", 0) { } @@ -77,6 +79,7 @@ public: DECLARE_DRIVER_INIT(inder); DECLARE_DRIVER_INIT(inder1); private: + void update_mus(); bool m_pc0; uint8_t m_game; uint8_t m_portc; @@ -94,6 +97,7 @@ private: optional_device<ttl7474_device> m_7a; optional_device<ttl7474_device> m_9a; optional_device<ttl7474_device> m_9b; + optional_device<hct157_device> m_13; required_ioport_array<11> m_switches; }; @@ -1232,24 +1236,25 @@ WRITE8_MEMBER( inder_state::sndbank_w ) for (i = 0; i < 4; i++) if (!(BIT(data, i))) m_sound_addr = (m_sound_addr & 0x0ffff) | (i << 16); + update_mus(); +} + +void inder_state::update_mus() +{ + if ((m_sound_addr < 0x40000) && (m_sndbank != 0xff)) + m_13->ba_w(m_p_speech[m_sound_addr]); + else + m_13->ba_w(0); } WRITE_LINE_MEMBER( inder_state::vck_w ) { - m_9a->clock_w(0); + // The order of these writes is sensitive, though the schematic (not to scale) + // makes it seem that both 74HCT74 clock inputs should be raised simultaneously m_9b->clock_w(0); - m_9a->clock_w(1); + m_9a->clock_w(0); m_9b->clock_w(1); - - if ((m_sound_addr < 0x40000) && (m_sndbank != 0xff)) - { - if (!m_pc0) - m_msm->data_w(m_p_speech[m_sound_addr] & 15); - else - m_msm->data_w(m_p_speech[m_sound_addr] >> 4); - } - else - m_msm->data_w(0); + m_9a->clock_w(1); } WRITE_LINE_MEMBER( inder_state::qc7a_w ) @@ -1268,6 +1273,7 @@ WRITE_LINE_MEMBER( inder_state::qc9b_w ) { m_9a->d_w(state); m_9b->d_w(state); + m_13->select_w(state); } READ8_MEMBER( inder_state::ppic_r ) @@ -1278,11 +1284,13 @@ READ8_MEMBER( inder_state::ppic_r ) WRITE8_MEMBER( inder_state::ppia_w ) { m_sound_addr = (m_sound_addr & 0x3ff00) | data; + update_mus(); } WRITE8_MEMBER( inder_state::ppib_w ) { m_sound_addr = (m_sound_addr & 0x300ff) | (data << 8); + update_mus(); } WRITE8_MEMBER( inder_state::ppic_w ) @@ -1302,14 +1310,17 @@ void inder_state::machine_reset() m_sound_addr = 0; m_sndbank = 0xff; m_row = 0; - if (m_7a) + if (m_7a.found()) + { m_7a->clear_w(1); + update_mus(); + } } DRIVER_INIT_MEMBER( inder_state, inder ) { m_p_speech = memregion("speech")->base(); - if (m_7a) + if (m_7a.found()) { m_7a->d_w(0); m_7a->clear_w(0); @@ -1321,7 +1332,7 @@ DRIVER_INIT_MEMBER( inder_state, inder ) DRIVER_INIT_MEMBER( inder_state, inder1 ) { m_p_speech = memregion("speech")->base(); - if (m_7a) + if (m_7a.found()) { m_7a->d_w(0); m_7a->clear_w(0); @@ -1461,6 +1472,9 @@ static MACHINE_CONFIG_START( inder, inder_state ) MCFG_DEVICE_ADD("9b", TTL7474, 0) MCFG_7474_COMP_OUTPUT_CB(WRITELINE(inder_state, qc9b_w)) + + MCFG_DEVICE_ADD("13", HCT157, 0) + MCFG_74157_OUT_CB(DEVWRITE8("msm", msm5205_device, data_w)) MACHINE_CONFIG_END diff --git a/src/mame/drivers/ladybug.cpp b/src/mame/drivers/ladybug.cpp index dc15d96b067..e32a7c6b9f7 100644 --- a/src/mame/drivers/ladybug.cpp +++ b/src/mame/drivers/ladybug.cpp @@ -602,7 +602,7 @@ ROM_START( ladybugb ) ROM_LOAD( "10-3.c4", 0x0040, 0x0020, CRC(27fa3a50) SHA1(7cf59b7a37c156640d6ea91554d1c4276c1780e0) ) /* ?? */ ROM_END -ROM_START( ladybgb2 ) +ROM_START( ladybugb2 ) // bootleg by Model Racing, PCB marked CS299, manual names it "Coccinelle" (ladybugs in Italian) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "lb1b.cpu", 0x0000, 0x1000, CRC(35d61e65) SHA1(43b797f1882e0acbf6685deea82de77e78d2c917) ) ROM_LOAD( "lb2b.cpu", 0x1000, 0x1000, CRC(a13e0fe4) SHA1(9e2876d8390d2b072d064b197057089a25c13a4a) ) @@ -615,7 +615,7 @@ ROM_START( ladybgb2 ) ROM_LOAD( "l9.f7", 0x0000, 0x1000, CRC(77b1da1e) SHA1(58cb82417396a3d96acfc864f091b1a5988f228d) ) ROM_LOAD( "l0.h7", 0x1000, 0x1000, CRC(aa82e00b) SHA1(83a5b745e58844b6dd7d05dfe9dbb5959aaf5c40) ) - ROM_REGION( 0x2000, "gfx2", 0 ) /* Located on the UNIVERSAL 8106-A2 CPU PCB */ + ROM_REGION( 0x2000, "gfx2", 0 ) ROM_LOAD( "l8.l7", 0x0000, 0x1000, CRC(8b99910b) SHA1(0bc812cf872f04eacedb50feed53f1aa8a1f24b9) ) ROM_LOAD( "l7.m7", 0x1000, 0x1000, CRC(86a5b448) SHA1(f8585a6fcf921e3e21f112dd2de474cb53cef290) ) @@ -733,10 +733,10 @@ DRIVER_INIT_MEMBER(ladybug_state,dorodon) } -GAME( 1981, cavenger, 0, ladybug, cavenger, driver_device, 0, ROT0, "Universal", "Cosmic Avenger", MACHINE_SUPPORTS_SAVE ) -GAME( 1981, ladybug, 0, ladybug, ladybug, driver_device, 0, ROT270, "Universal", "Lady Bug", MACHINE_SUPPORTS_SAVE ) -GAME( 1981, ladybugb, ladybug, ladybug, ladybug, driver_device, 0, ROT270, "bootleg", "Lady Bug (bootleg set 1)", MACHINE_SUPPORTS_SAVE ) -GAME( 1981, ladybgb2, ladybug, ladybug, ladybug, driver_device, 0, ROT270, "bootleg", "Lady Bug (bootleg set 2)", MACHINE_SUPPORTS_SAVE ) -GAME( 1982, dorodon, 0, dorodon, dorodon, ladybug_state, dorodon, ROT270, "UPL (Falcon license?)", "Dorodon (set 1)", MACHINE_SUPPORTS_SAVE ) // license or bootleg? -GAME( 1982, dorodon2, dorodon, dorodon, dorodon, ladybug_state, dorodon, ROT270, "UPL (Falcon license?)", "Dorodon (set 2)", MACHINE_SUPPORTS_SAVE ) // " -GAME( 1982, snapjack, 0, ladybug, snapjack, driver_device, 0, ROT0, "Universal", "Snap Jack", MACHINE_SUPPORTS_SAVE ) +GAME( 1981, cavenger, 0, ladybug, cavenger, driver_device, 0, ROT0, "Universal", "Cosmic Avenger", MACHINE_SUPPORTS_SAVE ) +GAME( 1981, ladybug, 0, ladybug, ladybug, driver_device, 0, ROT270, "Universal", "Lady Bug", MACHINE_SUPPORTS_SAVE ) +GAME( 1981, ladybugb, ladybug, ladybug, ladybug, driver_device, 0, ROT270, "bootleg", "Lady Bug (bootleg set 1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1981, ladybugb2, ladybug, ladybug, ladybug, driver_device, 0, ROT270, "bootleg (Model Racing)", "Coccinelle (bootleg of Lady Bug, set 2)", MACHINE_SUPPORTS_SAVE ) // title removed, but manual names it Coccinelle +GAME( 1982, dorodon, 0, dorodon, dorodon, ladybug_state, dorodon, ROT270, "UPL (Falcon license?)", "Dorodon (set 1)", MACHINE_SUPPORTS_SAVE ) // license or bootleg? +GAME( 1982, dorodon2, dorodon, dorodon, dorodon, ladybug_state, dorodon, ROT270, "UPL (Falcon license?)", "Dorodon (set 2)", MACHINE_SUPPORTS_SAVE ) // " +GAME( 1982, snapjack, 0, ladybug, snapjack, driver_device, 0, ROT0, "Universal", "Snap Jack", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/mcr68.cpp b/src/mame/drivers/mcr68.cpp index f81a0329026..ff5df1af729 100644 --- a/src/mame/drivers/mcr68.cpp +++ b/src/mame/drivers/mcr68.cpp @@ -7,7 +7,6 @@ driver by Bryan McPhail, Aaron Giles Games supported: - * Zwackery (Chip Squeak Deluxe) * Xenopohobe (Sounds Good) * Spy Hunter II (Sounds Good/Turbo Chip Squeak) * Blasted (Sounds Good) @@ -64,37 +63,6 @@ /************************************* * - * Zwackery-specific handlers - * - *************************************/ - -READ8_MEMBER(mcr68_state::zwackery_port_2_r) -{ - int result = ioport("IN2")->read(); - int wheel = ioport("IN5")->read(); - - return result | ((wheel >> 2) & 0x3e); -} - - -READ16_MEMBER(mcr68_state::zwackery_6840_r) -{ - /* Zwackery does a timer test: */ - /* It loads $1388 into one of the timers clocked by E */ - /* Then it sits in a tight loop counting down from $4E4 */ - /* BTST #$1,($2,A0) */ - /* DBNE D1,*-6 */ - /* It expects D1 to end up between 0 and 5; in order to */ - /* make this happen, we must assume that reads from the */ - /* 6840 take 14 additional cycles */ - space.device().execute().adjust_icount(-14); - return mcr68_6840_upper_r(space,offset,0xffff); -} - - - -/************************************* - * * Xenophobe-specific handlers * *************************************/ @@ -308,7 +276,7 @@ static ADDRESS_MAP_START( mcr68_map, AS_PROGRAM, 16, mcr68_state ) AM_RANGE(0x071000, 0x071fff) AM_RAM AM_RANGE(0x080000, 0x080fff) AM_RAM AM_SHARE("spriteram") AM_RANGE(0x090000, 0x09007f) AM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") - AM_RANGE(0x0a0000, 0x0a000f) AM_READWRITE(mcr68_6840_upper_r, mcr68_6840_upper_w) + AM_RANGE(0x0a0000, 0x0a000f) AM_DEVREADWRITE8("ptm", ptm6840_device, read, write, 0xff00) AM_RANGE(0x0b0000, 0x0bffff) AM_DEVWRITE("watchdog", watchdog_timer_device, reset16_w) AM_RANGE(0x0d0000, 0x0dffff) AM_READ_PORT("IN0") AM_RANGE(0x0e0000, 0x0effff) AM_READ_PORT("IN1") @@ -319,28 +287,6 @@ ADDRESS_MAP_END /************************************* * - * Zwackery main CPU memory handlers - * - *************************************/ - -static ADDRESS_MAP_START( zwackery_map, AS_PROGRAM, 16, mcr68_state ) - ADDRESS_MAP_UNMAP_HIGH - AM_RANGE(0x000000, 0x037fff) AM_ROM - AM_RANGE(0x080000, 0x080fff) AM_RAM - AM_RANGE(0x084000, 0x084fff) AM_RAM - AM_RANGE(0x100000, 0x10000f) AM_READ(zwackery_6840_r) AM_WRITE(mcr68_6840_upper_w) - AM_RANGE(0x104000, 0x104007) AM_DEVREADWRITE8("pia0", pia6821_device, read, write, 0xff00) - AM_RANGE(0x108000, 0x108007) AM_DEVREADWRITE8("pia1", pia6821_device, read, write, 0x00ff) - AM_RANGE(0x10c000, 0x10c007) AM_DEVREADWRITE8("pia2", pia6821_device, read, write, 0x00ff) - AM_RANGE(0x800000, 0x800fff) AM_RAM_WRITE(zwackery_videoram_w) AM_SHARE("videoram") - AM_RANGE(0x802000, 0x803fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") - AM_RANGE(0xc00000, 0xc00fff) AM_RAM_WRITE(zwackery_spriteram_w) AM_SHARE("spriteram") -ADDRESS_MAP_END - - - -/************************************* - * * Pigskin CPU memory handlers * *************************************/ @@ -357,7 +303,7 @@ static ADDRESS_MAP_START( pigskin_map, AS_PROGRAM, 16, mcr68_state ) AM_RANGE(0x120000, 0x120001) AM_READWRITE(pigskin_protection_r, pigskin_protection_w) AM_RANGE(0x140000, 0x143fff) AM_RAM AM_RANGE(0x160000, 0x1607ff) AM_RAM AM_SHARE("spriteram") - AM_RANGE(0x180000, 0x18000f) AM_READWRITE(mcr68_6840_upper_r, mcr68_6840_upper_w) + AM_RANGE(0x180000, 0x18000f) AM_DEVREADWRITE8("ptm", ptm6840_device, read, write, 0xff00) AM_RANGE(0x1a0000, 0x1affff) AM_WRITE(archrivl_control_w) AM_RANGE(0x1e0000, 0x1effff) AM_READ_PORT("IN0") ADDRESS_MAP_END @@ -380,7 +326,7 @@ static ADDRESS_MAP_START( trisport_map, AS_PROGRAM, 16, mcr68_state ) AM_RANGE(0x120000, 0x12007f) AM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") AM_RANGE(0x140000, 0x1407ff) AM_RAM AM_SHARE("spriteram") AM_RANGE(0x160000, 0x160fff) AM_RAM_WRITE(mcr68_videoram_w) AM_SHARE("videoram") - AM_RANGE(0x180000, 0x18000f) AM_READWRITE(mcr68_6840_upper_r, mcr68_6840_upper_w) + AM_RANGE(0x180000, 0x18000f) AM_DEVREADWRITE8("ptm", ptm6840_device, read, write, 0xff00) AM_RANGE(0x1a0000, 0x1affff) AM_WRITE(archrivl_control_w) AM_RANGE(0x1c0000, 0x1cffff) AM_DEVWRITE("watchdog", watchdog_timer_device, reset16_w) AM_RANGE(0x1e0000, 0x1effff) AM_READ_PORT("IN0") @@ -394,62 +340,6 @@ ADDRESS_MAP_END * *************************************/ -static INPUT_PORTS_START( zwackery ) - PORT_START("IN0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 ) - PORT_SERVICE( 0x0010, IP_ACTIVE_LOW ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_TILT ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) /* sword */ - - PORT_START("IN1") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY - PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_SPECIAL ) /* sound communications */ - - PORT_START("IN2") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 ) /* spell up */ - PORT_BIT( 0x3e, IP_ACTIVE_HIGH, IPT_UNUSED ) /* encoder wheel */ - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) /* shield */ - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4 ) /* spell down */ - - PORT_START("IN3") - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_START("DSW") - PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2,3") - PORT_DIPSETTING( 0x05, DEF_STR( 6C_1C ) ) - PORT_DIPSETTING( 0x04, DEF_STR( 5C_1C ) ) - PORT_DIPSETTING( 0x03, DEF_STR( 4C_1C ) ) - PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) ) - PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x06, DEF_STR( 1C_2C ) ) - PORT_DIPSETTING( 0x07, DEF_STR( Free_Play ) ) - PORT_DIPNAME( 0x38, 0x00, "Buy-in" ) PORT_DIPLOCATION("SW1:4,5,6") - PORT_DIPSETTING( 0x00, "1 coin" ) - PORT_DIPSETTING( 0x08, "2 coins" ) - PORT_DIPSETTING( 0x10, "3 coins" ) - PORT_DIPSETTING( 0x18, "4 coins" ) - PORT_DIPSETTING( 0x20, "5 coins" ) - PORT_DIPSETTING( 0x28, "6 coins" ) - PORT_DIPSETTING( 0x30, "7 coins" ) - PORT_DIPSETTING( 0x38, DEF_STR( None ) ) - PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7,8") - PORT_DIPSETTING( 0xc0, DEF_STR( Easier ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Normal ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Harder ) ) - PORT_DIPSETTING( 0x80, DEF_STR( Hardest ) ) - - PORT_START("IN5") - PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_CODE_DEC(KEYCODE_Z) PORT_CODE_INC(KEYCODE_X) PORT_REVERSE -INPUT_PORTS_END - static INPUT_PORTS_START( xenophob ) PORT_START("IN0") @@ -956,29 +846,11 @@ static const gfx_layout mcr68_sprite_layout = 32*32 }; -static const gfx_layout zwackery_layout = -{ - 16,16, - RGN_FRAC(1,2), - 8, - { 0, 0, 0, 0, 0, 0, 0, 0 }, - { STEP4(3,-1), STEP4(11,-1), STEP4(19,-1), STEP4(27,-1) }, - { 4, RGN_FRAC(1,2)+4, 0, RGN_FRAC(1,2)+0, 36, RGN_FRAC(1,2)+36, 32, RGN_FRAC(1,2)+32, - 68, RGN_FRAC(1,2)+68, 64, RGN_FRAC(1,2)+64, 100, RGN_FRAC(1,2)+100, 96, RGN_FRAC(1,2)+96 }, - 128 -}; - static GFXDECODE_START( mcr68 ) GFXDECODE_SCALE( "gfx1", 0, mcr68_bg_layout, 0, 4, 2, 2 ) GFXDECODE_ENTRY( "gfx2", 0, mcr68_sprite_layout, 0, 4 ) GFXDECODE_END -static GFXDECODE_START( zwackery ) - GFXDECODE_ENTRY( "gfx1", 0, zwackery_layout, 0, 16 ) - GFXDECODE_ENTRY( "gfx2", 0, mcr68_sprite_layout, 0x800, 32 ) - GFXDECODE_ENTRY( "gfx1", 0, zwackery_layout, 0, 16 ) /* yes, an extra copy */ -GFXDECODE_END - /************************************* @@ -1002,7 +874,6 @@ GFXDECODE_END Ideal CPU timings, based on counter usage: - Zwackery: 7652400 Xenophobe: 7723800 Spy Hunter II:7723800 Blasted: 7798800 @@ -1015,68 +886,20 @@ GFXDECODE_END =================================================================*/ -static MACHINE_CONFIG_START( zwackery, mcr68_state ) - - /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M68000, 7652400) /* should be XTAL_16MHz/2 */ - MCFG_CPU_PROGRAM_MAP(zwackery_map) - MCFG_CPU_VBLANK_INT_DRIVER("screen", mcr68_state, mcr68_interrupt) - - MCFG_WATCHDOG_ADD("watchdog") -// MCFG_WATCHDOG_VBLANK_INIT("screen", 8) - MCFG_MACHINE_START_OVERRIDE(mcr68_state,zwackery) - MCFG_MACHINE_RESET_OVERRIDE(mcr68_state,zwackery) - - MCFG_DEVICE_ADD("pia0", PIA6821, 0) - MCFG_PIA_READPB_HANDLER(IOPORT("IN0")) - MCFG_PIA_WRITEPA_HANDLER(WRITE8(mcr68_state, zwackery_pia0_w)) - MCFG_PIA_IRQA_HANDLER(WRITELINE(mcr68_state, zwackery_pia_irq)) - MCFG_PIA_IRQB_HANDLER(WRITELINE(mcr68_state, zwackery_pia_irq)) - - MCFG_DEVICE_ADD("pia1", PIA6821, 0) - MCFG_PIA_READPA_HANDLER(READ8(mcr68_state,zwackery_port_1_r)) - MCFG_PIA_READPB_HANDLER(READ8(mcr68_state, zwackery_port_2_r)) - MCFG_PIA_WRITEPA_HANDLER(WRITE8(mcr68_state, zwackery_pia1_w)) - MCFG_PIA_CA2_HANDLER(WRITELINE(mcr68_state, zwackery_ca2_w)) - - MCFG_DEVICE_ADD("pia2", PIA6821, 0) - MCFG_PIA_READPA_HANDLER(READ8(mcr68_state, zwackery_port_3_r)) - MCFG_PIA_READPB_HANDLER(IOPORT("DSW")) - - /* video hardware */ - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE(30) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */) - MCFG_SCREEN_SIZE(32*16, 30*16) - MCFG_SCREEN_VISIBLE_AREA(0, 32*16-1, 0, 30*16-1) - MCFG_SCREEN_UPDATE_DRIVER(mcr68_state, screen_update_zwackery) - MCFG_SCREEN_PALETTE("palette") - - MCFG_GFXDECODE_ADD("gfxdecode", "palette", zwackery) - MCFG_PALETTE_ADD("palette", 4096) - MCFG_PALETTE_FORMAT(xRRRRRBBBBBGGGGG_inverted) - - MCFG_VIDEO_START_OVERRIDE(mcr68_state,zwackery) - - /* sound hardware */ - MCFG_SPEAKER_STANDARD_MONO("speaker") - MCFG_SOUND_ADD("csd", MIDWAY_CHIP_SQUEAK_DELUXE, 0) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.0) -MACHINE_CONFIG_END - - static MACHINE_CONFIG_START( mcr68, mcr68_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", M68000, 7723800) MCFG_CPU_PROGRAM_MAP(mcr68_map) - MCFG_CPU_VBLANK_INT_DRIVER("screen", mcr68_state, mcr68_interrupt) MCFG_WATCHDOG_ADD("watchdog") MCFG_WATCHDOG_VBLANK_INIT("screen", 8) MCFG_MACHINE_START_OVERRIDE(mcr68_state,mcr68) MCFG_MACHINE_RESET_OVERRIDE(mcr68_state,mcr68) + MCFG_DEVICE_ADD("ptm", PTM6840, 7723800 / 10) + MCFG_PTM6840_IRQ_CB(INPUTLINE("maincpu", 2)) + /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_REFRESH_RATE(30) @@ -1086,6 +909,8 @@ static MACHINE_CONFIG_START( mcr68, mcr68_state ) MCFG_SCREEN_UPDATE_DRIVER(mcr68_state, screen_update_mcr68) MCFG_SCREEN_PALETTE("palette") + MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", mcr68_state, scanline_cb, "screen", 0, 1) + MCFG_GFXDECODE_ADD("gfxdecode", "palette", mcr68) MCFG_PALETTE_ADD("palette", 64) MCFG_PALETTE_FORMAT(xxxxxxxRRRBBBGGG) @@ -1164,67 +989,6 @@ MACHINE_CONFIG_END * *************************************/ -ROM_START( zwackery ) - ROM_REGION( 0x40000, "maincpu", 0 ) - ROM_LOAD16_BYTE( "pro0.bin", 0x00000, 0x4000, CRC(6fb9731c) SHA1(ee5b297ef2b4cf20df5e776f1c585b51f174bfa7) ) - ROM_LOAD16_BYTE( "pro1.bin", 0x00001, 0x4000, CRC(84b92555) SHA1(9b4af81374828c1742c1e13fc425eea2973b0867) ) - ROM_LOAD16_BYTE( "pro2.bin", 0x08000, 0x4000, CRC(e6977a2a) SHA1(602bf3f7e0f4080cb5b72d8fd3ee9fd11f27c558) ) - ROM_LOAD16_BYTE( "pro3.bin", 0x08001, 0x4000, CRC(f5d0a60e) SHA1(7e0e4936cb37ac16d6db5533ae4aecdfb07ead93) ) - ROM_LOAD16_BYTE( "pro4.bin", 0x10000, 0x4000, CRC(ec5841d9) SHA1(4bafe614e8993994b0ea9aedc8dc2474361e4594) ) - ROM_LOAD16_BYTE( "pro5.bin", 0x10001, 0x4000, CRC(d7d99ce0) SHA1(fdf428ab9c96dae555d49bac47495613ba265452) ) - ROM_LOAD16_BYTE( "pro6.bin", 0x18000, 0x4000, CRC(b9fe7bf5) SHA1(a94f80f49b4520a2c1098eee8983560b4ecdf3d5) ) - ROM_LOAD16_BYTE( "pro7.bin", 0x18001, 0x4000, CRC(5e261b3b) SHA1(dcf99f528c9e3b4f8b52d413c088559bfb37d733) ) - ROM_LOAD16_BYTE( "pro8.bin", 0x20000, 0x4000, CRC(55e380a5) SHA1(e3fef8486858cd714086449327a93b4a70ae73ff) ) - ROM_LOAD16_BYTE( "pro9.bin", 0x20001, 0x4000, CRC(12249dca) SHA1(154170286047ea78645d45dfdd895a597dad17da) ) - ROM_LOAD16_BYTE( "pro10.bin", 0x28000, 0x4000, CRC(6a39a8ca) SHA1(8ac9c3e60dc6f1918bfb95acf3ee170cedfb20ea) ) - ROM_LOAD16_BYTE( "pro11.bin", 0x28001, 0x4000, CRC(ad6b45bc) SHA1(118496e898654b028f008a3d493e693ba000ef38) ) - ROM_LOAD16_BYTE( "pro12.bin", 0x30000, 0x4000, CRC(e2d25e1f) SHA1(5d8ff303441eccf431422b453a173983a4513630) ) - ROM_LOAD16_BYTE( "pro13.bin", 0x30001, 0x4000, CRC(e131f9b8) SHA1(08b131f2acc84d4c2c931bfd24e7de3d92a8a817) ) - - ROM_REGION( 0x20000, "csd:cpu", 0 ) - ROM_LOAD16_BYTE( "csd7.bin", 0x00000, 0x2000, CRC(5501f54b) SHA1(84c0851fb868e81400cfe3ebfd7b91fe98a47bac) ) - ROM_LOAD16_BYTE( "csd17.bin", 0x00001, 0x2000, CRC(2e482580) SHA1(92bd3e64ff580800ee16579d97bcb8b3bd9f755c) ) - ROM_LOAD16_BYTE( "csd8.bin", 0x04000, 0x2000, CRC(13366575) SHA1(bcf25a7d4c6b2ccd7cd9978edafc66ef0cadfe72) ) - ROM_LOAD16_BYTE( "csd18.bin", 0x04001, 0x2000, CRC(bcfe5820) SHA1(ca32daa645851a2373b3cdb8a5e63ebda84aa762) ) - - ROM_REGION( 0x8000, "gfx1", ROMREGION_INVERT ) - ROM_LOAD( "tileh.bin", 0x00000, 0x4000, CRC(a7237eb1) SHA1(197e5838ac2bc732ae9eb33a9257b9391d50abf8) ) - ROM_LOAD( "tileg.bin", 0x04000, 0x4000, CRC(626cc69b) SHA1(86142bafa78f45d1a0bed0b83f3558b21384fa1a) ) - - ROM_REGION( 0x20000, "gfx2", 0 ) - ROM_LOAD( "spr6h.bin", 0x00000, 0x4000, CRC(a51158dc) SHA1(8d3b0054950443fdf57f83dcb973d05f6c7ad9c8) ) - ROM_LOAD( "spr7h.bin", 0x04000, 0x4000, CRC(941feecf) SHA1(8e88c956332e78dc7e55139879f2272116415714) ) - ROM_LOAD( "spr6j.bin", 0x08000, 0x4000, CRC(f3eef316) SHA1(026e18bdfdda8cc9d0774e6d9d758686bf16992c) ) - ROM_LOAD( "spr7j.bin", 0x0c000, 0x4000, CRC(a8a34033) SHA1(abd9fde84bb079c84126ad04d584ec03b44b60cd) ) - ROM_LOAD( "spr10h.bin", 0x10000, 0x4000, CRC(a99daea6) SHA1(c323e05f398b7e9e04b75fd8ac5e8ab675236d66) ) - ROM_LOAD( "spr11h.bin", 0x14000, 0x4000, CRC(c1a767fb) SHA1(c16e09b39b09d409b534ce4c53366e43237a3759) ) - ROM_LOAD( "spr10j.bin", 0x18000, 0x4000, CRC(4dd04376) SHA1(069b64397e7a961c1fc246671472f759bd9f6c03) ) - ROM_LOAD( "spr11j.bin", 0x1c000, 0x4000, CRC(e8c6a880) SHA1(dd3d52ddbc36e244b96cfb87e6a80adb94626407) ) - - ROM_REGION( 0x8000, "gfx3", 0 ) /* bg color maps */ - ROM_LOAD16_BYTE( "tilef.bin", 0x0000, 0x4000, CRC(a0dfcd7e) SHA1(0fc6723eddef2a96de9bf1f48006dd067c148540) ) - ROM_LOAD16_BYTE( "tilee.bin", 0x0001, 0x4000, CRC(ab504dc8) SHA1(4ebdcd42624e94c29ccdb8247bfff2d8e936ddd7) ) - - ROM_REGION( 0x000D, "plds", 0 ) - /* According to the manual these pal's are located on the "Venus CPU" board */ - ROM_LOAD( "pal.d5", 0x0000, 0x00001, NO_DUMP ) /* marked H-T in manual */ - ROM_LOAD( "pal.d2", 0x0001, 0x00001, NO_DUMP ) /* marked V-T in manual */ - ROM_LOAD( "pal.d4", 0x0002, 0x00001, NO_DUMP ) /* marked MISC V&H PAL in manual */ - ROM_LOAD( "pal.d3", 0x0003, 0x00001, NO_DUMP ) /* marked MISC CUSTOM PAL in manual */ - ROM_LOAD( "pal.e6", 0x0004, 0x00001, NO_DUMP ) /* marked CPU WTS PAL in manual*/ - ROM_LOAD( "pal.f8", 0x0005, 0x00001, NO_DUMP ) /* marked CPU IOC PAL in manual*/ - ROM_LOAD( "pal.a5", 0x0006, 0x00001, NO_DUMP ) /* marked CPU RMD PAL in manual*/ - /* According to the manual these pal's are located on the "Venus VIDEO" board */ - ROM_LOAD( "pal.1f", 0x0007, 0x00001, NO_DUMP ) /* marked PAL FGBDCD in manual*/ - ROM_LOAD( "pal.1d", 0x0008, 0x00001, NO_DUMP ) /* marked PAL HCT in manual*/ - /* According to the manual these pal's are located on the "Venus BACKGROUND" board */ - ROM_LOAD( "pal.1c", 0x0009, 0x00001, NO_DUMP ) /* marked BGBPE PAL in manual*/ - ROM_LOAD( "pal.5c", 0x000a, 0x00001, NO_DUMP ) /* marked HCT PAL in manual*/ - ROM_LOAD( "pal.5j", 0x000b, 0x00001, NO_DUMP ) /* marked BGBDCD PAL in manual*/ - /* According to the manual this pal is located on the "Artificial Artist" board */ - ROM_LOAD( "pal20.u15", 0x000c, 0x00001, NO_DUMP ) /* marked CSD002R0 in manual, pal type not specified */ -ROM_END - /* Xenophobe @@ -1700,15 +1464,6 @@ void mcr68_state::mcr68_common_init(int clip, int xoffset) } -DRIVER_INIT_MEMBER(mcr68_state,zwackery) -{ - mcr68_common_init(0, 0); - - /* Zwackery doesn't care too much about this value; currently taken from Blasted */ - m_timing_factor = attotime::from_hz(m_maincpu->unscaled_clock() / 10) * (256 + 16); -} - - DRIVER_INIT_MEMBER(mcr68_state,xenophob) { mcr68_common_init(0, -4); @@ -1748,7 +1503,7 @@ DRIVER_INIT_MEMBER(mcr68_state,blasted) m_maincpu->space(AS_PROGRAM).install_write_handler(0x0c0000, 0x0cffff, write16_delegate(FUNC(mcr68_state::blasted_control_w),this)); /* 6840 is mapped to the lower 8 bits */ - m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x0a0000, 0x0a000f, read16_delegate(FUNC(mcr68_state::mcr68_6840_lower_r),this), write16_delegate(FUNC(mcr68_state::mcr68_6840_lower_w),this)); + m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x0a0000, 0x0a000f, read8_delegate(FUNC(ptm6840_device::read), &(*m_ptm)), write8_delegate(FUNC(ptm6840_device::write), &(*m_ptm)), 0x00ff); } DRIVER_INIT_MEMBER(mcr68_state,intlaser) @@ -1779,7 +1534,7 @@ DRIVER_INIT_MEMBER(mcr68_state,archrivl) m_maincpu->space(AS_PROGRAM).install_read_handler(0x0e0000, 0x0effff, read16_delegate(FUNC(mcr68_state::archrivl_port_1_r),this)); /* 6840 is mapped to the lower 8 bits */ - m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x0a0000, 0x0a000f, read16_delegate(FUNC(mcr68_state::mcr68_6840_lower_r),this), write16_delegate(FUNC(mcr68_state::mcr68_6840_lower_w),this)); + m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x0a0000, 0x0a000f, read8_delegate(FUNC(ptm6840_device::read), &(*m_ptm)), write8_delegate(FUNC(ptm6840_device::write), &(*m_ptm)), 0x00ff); } READ16_MEMBER(mcr68_state::archrivlb_port_1_r) @@ -1801,7 +1556,7 @@ DRIVER_INIT_MEMBER(mcr68_state,archrivlb) m_maincpu->space(AS_PROGRAM).install_read_handler(0x0e0000, 0x0effff, read16_delegate(FUNC(mcr68_state::archrivlb_port_1_r),this)); /* 6840 is mapped to the lower 8 bits */ - m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x0a0000, 0x0a000f, read16_delegate(FUNC(mcr68_state::mcr68_6840_lower_r),this), write16_delegate(FUNC(mcr68_state::mcr68_6840_lower_w),this)); + m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x0a0000, 0x0a000f, read8_delegate(FUNC(ptm6840_device::read), &(*m_ptm)), write8_delegate(FUNC(ptm6840_device::write), &(*m_ptm)), 0x00ff); } @@ -1835,8 +1590,6 @@ DRIVER_INIT_MEMBER(mcr68_state,trisport) * *************************************/ -GAME( 1984, zwackery, 0, zwackery, zwackery, mcr68_state, zwackery, ROT0, "Bally Midway", "Zwackery", MACHINE_SUPPORTS_SAVE ) - GAME( 1987, xenophob, 0, xenophob, xenophob, mcr68_state, xenophob, ROT0, "Bally Midway", "Xenophobe", MACHINE_SUPPORTS_SAVE ) GAME( 1987, spyhunt2, 0, spyhunt2, spyhunt2, mcr68_state, spyhunt2, ROT0, "Bally Midway", "Spy Hunter II (rev 2)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/mitchell.cpp b/src/mame/drivers/mitchell.cpp index a00456dbf47..8f6c676a608 100644 --- a/src/mame/drivers/mitchell.cpp +++ b/src/mame/drivers/mitchell.cpp @@ -363,13 +363,18 @@ static ADDRESS_MAP_START( spangbl_map, AS_PROGRAM, 8, mitchell_state ) AM_RANGE(0xe000, 0xffff) AM_RAM AM_SHARE("ram") /* Work RAM */ ADDRESS_MAP_END +WRITE8_MEMBER(mitchell_state::sound_command_w) +{ + m_soundlatch->write(space, 0, data); + m_audiocpu->set_input_line(0, HOLD_LINE); +} + static ADDRESS_MAP_START( spangbl_io_map, AS_IO, 8, mitchell_state ) ADDRESS_MAP_GLOBAL_MASK(0xff) AM_RANGE(0x00, 0x02) AM_READ(input_r) AM_RANGE(0x00, 0x00) AM_WRITE(pangbl_gfxctrl_w) /* Palette bank, layer enable, coin counters, more */ AM_RANGE(0x02, 0x02) AM_WRITE(pang_bankswitch_w) /* Code bank register */ - AM_RANGE(0x03, 0x03) AM_DEVWRITE("ymsnd", ym2413_device, data_port_w) - AM_RANGE(0x04, 0x04) AM_DEVWRITE("ymsnd", ym2413_device, register_port_w) + AM_RANGE(0x03, 0x03) AM_WRITE(sound_command_w) AM_RANGE(0x05, 0x05) AM_READ_PORT("SYS0") AM_RANGE(0x06, 0x06) AM_WRITENOP /* watchdog? irq ack? */ AM_RANGE(0x07, 0x07) AM_WRITE(pang_video_bank_w) /* Video RAM bank register */ @@ -378,22 +383,37 @@ static ADDRESS_MAP_START( spangbl_io_map, AS_IO, 8, mitchell_state ) AM_RANGE(0x18, 0x18) AM_WRITE(eeprom_serial_w) ADDRESS_MAP_END +READ8_MEMBER(mitchell_state::sound_command_r) +{ + m_audiocpu->set_input_line(0, CLEAR_LINE); + return m_soundlatch->read(space, 0); +} -#ifdef UNUSED_FUNCTION -WRITE8_MEMBER(mitchell_state::spangbl_msm5205_data_w) +WRITE8_MEMBER(mitchell_state::sound_bankswitch_w) { - m_sample_buffer = data; + m_msm->reset_w(BIT(data, 3)); + + m_soundbank->set_entry(data & 7); } -#endif static ADDRESS_MAP_START( spangbl_sound_map, AS_PROGRAM, 8, mitchell_state ) - AM_RANGE(0x0000, 0x3fff) AM_ROM -// AM_RANGE(0xec00, 0xec00) AM_WRITE(spangbl_msm5205_data_w ) - AM_RANGE(0xf000, 0xf3ff) AM_RAM + AM_RANGE(0x0000, 0x7fff) AM_ROM + AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("soundbank") + AM_RANGE(0xe000, 0xe000) AM_WRITE(sound_bankswitch_w) + AM_RANGE(0xe400, 0xe400) AM_DEVWRITE("adpcm_select", ls157_device, ba_w) + AM_RANGE(0xec00, 0xec01) AM_DEVWRITE("ymsnd", ym2413_device, write) + AM_RANGE(0xf000, 0xf4ff) AM_RAM + AM_RANGE(0xf800, 0xf800) AM_READ(sound_command_r) ADDRESS_MAP_END -static ADDRESS_MAP_START( spangbl_sound_io_map, AS_IO, 8, mitchell_state ) - ADDRESS_MAP_GLOBAL_MASK(0xff) +static ADDRESS_MAP_START( pangba_sound_map, AS_PROGRAM, 8, mitchell_state ) + AM_RANGE(0x0000, 0x7fff) AM_ROM + AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("soundbank") + AM_RANGE(0xe000, 0xe000) AM_WRITE(sound_bankswitch_w) + AM_RANGE(0xe400, 0xe400) AM_DEVWRITE("adpcm_select", ls157_device, ba_w) + AM_RANGE(0xec00, 0xec01) AM_DEVWRITE("ymsnd", ym3812_device, write) + AM_RANGE(0xf000, 0xf4ff) AM_RAM + AM_RANGE(0xf800, 0xf800) AM_READ(sound_command_r) ADDRESS_MAP_END @@ -1101,20 +1121,25 @@ GFXDECODE_END MACHINE_START_MEMBER(mitchell_state,mitchell) { - save_item(NAME(m_sample_buffer)); - save_item(NAME(m_sample_select)); save_item(NAME(m_dial_selected)); save_item(NAME(m_keymatrix)); save_item(NAME(m_dir)); save_item(NAME(m_dial)); save_item(NAME(m_irq_source)); // save_item(NAME(init_eeprom_count)); + + if (m_soundbank.found()) + { + m_soundbank->configure_entries(0, 8, memregion("audiocpu")->base(), 0x4000); + m_soundbank->set_entry(0); + + save_item(NAME(m_sample_select)); + } } MACHINE_RESET_MEMBER(mitchell_state,mitchell) { - m_sample_buffer = 0; - m_sample_select = 0; + m_sample_select = false; m_dial_selected = 0; m_dial[0] = 0; m_dial[1] = 0; @@ -1241,11 +1266,12 @@ GFXDECODE_END WRITE_LINE_MEMBER(mitchell_state::spangbl_adpcm_int) { - m_msm->data_w(m_sample_buffer & 0x0f); - m_sample_buffer >>= 4; - m_sample_select ^= 1; - if(m_sample_select == 0) - m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE); + if (!state) + return; + + m_sample_select = !m_sample_select; + m_adpcm_select->select_w(m_sample_select); + m_audiocpu->set_input_line(INPUT_LINE_NMI, m_sample_select); } @@ -1261,17 +1287,27 @@ static MACHINE_CONFIG_DERIVED( spangbl, pangnv ) MCFG_CPU_ADD("audiocpu", Z80, 8000000) MCFG_CPU_PROGRAM_MAP(spangbl_sound_map) - MCFG_CPU_IO_MAP(spangbl_sound_io_map) - MCFG_CPU_VBLANK_INT_DRIVER("screen", mitchell_state, irq0_line_hold) - MCFG_CPU_VBLANK_INT_DRIVER("screen", mitchell_state, nmi_line_pulse) MCFG_GFXDECODE_MODIFY("gfxdecode", spangbl) + MCFG_GENERIC_LATCH_8_ADD("soundlatch") + MCFG_DEVICE_REMOVE("oki") MCFG_SOUND_ADD("msm", MSM5205, 384000) MCFG_MSM5205_VCLK_CB(WRITELINE(mitchell_state, spangbl_adpcm_int)) /* interrupt function */ MCFG_MSM5205_PRESCALER_SELECTOR(MSM5205_S48_4B) /* 4KHz 4-bit */ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50) + + MCFG_DEVICE_ADD("adpcm_select", LS157, 0) + MCFG_74157_OUT_CB(DEVWRITE8("msm", msm5205_device, data_w)) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( pangba, spangbl ) + MCFG_CPU_MODIFY("audiocpu") + MCFG_CPU_PROGRAM_MAP(pangba_sound_map) + + MCFG_DEVICE_REPLACE("ymsnd", YM3812, 4000000) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) MACHINE_CONFIG_END static MACHINE_CONFIG_START( mstworld, mitchell_state ) @@ -2365,14 +2401,14 @@ GAME( 1989, bbros, pang, pang, pang, mitchell_state, pang, GAME( 1989, pompingw, pang, pang, pang, mitchell_state, pang, ROT0, "Mitchell", "Pomping World (Japan)", MACHINE_SUPPORTS_SAVE ) GAME( 1989, pangb, pang, pang, pang, mitchell_state, pangb, ROT0, "bootleg", "Pang (bootleg, set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1989, pangbold, pang, pang, pang, mitchell_state, pangb, ROT0, "bootleg", "Pang (bootleg, set 2)", MACHINE_SUPPORTS_SAVE ) -GAME( 1989, pangba, pang, spangbl, pang, mitchell_state, pangb, ROT0, "bootleg", "Pang (bootleg, set 3)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE ) +GAME( 1989, pangba, pang, pangba, pang, mitchell_state, pangb, ROT0, "bootleg", "Pang (bootleg, set 3)", MACHINE_SUPPORTS_SAVE ) GAME( 1989, pangb2, pang, pang, pang, mitchell_state, pangb, ROT0, "bootleg", "Pang (bootleg, set 4)", MACHINE_SUPPORTS_SAVE ) GAME( 1989, cworld, 0, pang, qtono1, mitchell_state, cworld, ROT0, "Capcom", "Capcom World (Japan)", MACHINE_SUPPORTS_SAVE ) GAME( 1990, hatena, 0, pang, qtono1, mitchell_state, hatena, ROT0, "Capcom", "Adventure Quiz 2 - Hatena? no Daibouken (Japan 900228)", MACHINE_SUPPORTS_SAVE ) GAME( 1990, spang, 0, pangnv, pang, mitchell_state, spang, ROT0, "Mitchell", "Super Pang (World 900914)", MACHINE_SUPPORTS_SAVE ) GAME( 1990, sbbros, spang, pangnv, pang, mitchell_state, sbbros, ROT0, "Mitchell (Capcom license)", "Super Buster Bros. (USA 901001)", MACHINE_SUPPORTS_SAVE ) GAME( 1990, spangj, spang, pangnv, pang, mitchell_state, spangj, ROT0, "Mitchell", "Super Pang (Japan 901023)", MACHINE_SUPPORTS_SAVE ) -GAME( 1990, spangbl, spang, spangbl, spangbl, mitchell_state, spangbl, ROT0, "bootleg", "Super Pang (World 900914, bootleg)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE ) // different sound hardware +GAME( 1990, spangbl, spang, spangbl, spangbl, mitchell_state, spangbl, ROT0, "bootleg", "Super Pang (World 900914, bootleg)", MACHINE_SUPPORTS_SAVE ) // different sound hardware GAME( 1994, mstworld, 0, mstworld, mstworld, mitchell_state, mstworld, ROT0, "bootleg (TCH)", "Monsters World (bootleg of Super Pang)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) GAME( 1990, marukin, 0, marukin, marukin, mitchell_state, marukin, ROT0, "Yuga", "Super Marukin-Ban (Japan 901017)", MACHINE_SUPPORTS_SAVE ) GAME( 1991, qtono1, 0, pang, qtono1, mitchell_state, qtono1, ROT0, "Capcom", "Quiz Tonosama no Yabou (Japan)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/model1.cpp b/src/mame/drivers/model1.cpp index dc9f1a59de6..82aaebdfb48 100644 --- a/src/mame/drivers/model1.cpp +++ b/src/mame/drivers/model1.cpp @@ -1059,7 +1059,7 @@ static INPUT_PORTS_START( vr ) PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_START("IN.2") + PORT_START("IN.2") /* 8Bit RX-line from drive board */ PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) INPUT_PORTS_END @@ -1096,7 +1096,7 @@ static INPUT_PORTS_START( wingwar ) PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_START("IN.2") + PORT_START("IN.2") /* 8Bit RX-line from r360 board */ PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) INPUT_PORTS_END @@ -1668,12 +1668,76 @@ static MACHINE_CONFIG_START( model1_vr, model1_state ) MCFG_M1COMM_ADD("m1comm") MACHINE_CONFIG_END -GAME( 1993, vf, 0, model1, vf, driver_device, 0, ROT0, "Sega", "Virtua Fighter", MACHINE_IMPERFECT_GRAPHICS ) -GAMEL(1992, vr, 0, model1_vr, vr, driver_device, 0, ROT0, "Sega", "Virtua Racing", MACHINE_IMPERFECT_GRAPHICS, layout_vr ) -GAME( 1993, vformula, vr, model1_vr, vr, driver_device, 0, ROT0, "Sega", "Virtua Formula", MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1993, swa, 0, swa, swa, driver_device, 0, ROT0, "Sega", "Star Wars Arcade", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) -GAME( 1994, wingwar, 0, model1, wingwar, driver_device, 0, ROT0, "Sega", "Wing War (World)", MACHINE_NOT_WORKING ) -GAME( 1994, wingwaru, wingwar, model1, wingwar, driver_device, 0, ROT0, "Sega", "Wing War (US)", MACHINE_NOT_WORKING ) -GAME( 1994, wingwarj, wingwar, model1, wingwar, driver_device, 0, ROT0, "Sega", "Wing War (Japan)", MACHINE_NOT_WORKING ) -GAME( 1994, wingwar360, wingwar, model1, wingwar, driver_device, 0, ROT0, "Sega", "Wing War R360 (US)", MACHINE_NOT_WORKING ) -GAME( 1993, netmerc, 0, model1, vf, driver_device, 0, ROT0, "Sega", "NetMerc?", MACHINE_NOT_WORKING ) +DRIVER_INIT_MEMBER(model1_state,wingwar360) +{ + // install r360 hack + m_maincpu->space(AS_PROGRAM).install_read_handler(0xc00014, 0xc00015, read16_delegate(FUNC(model1_state::r360_r),this)); + m_maincpu->space(AS_PROGRAM).install_write_handler(0xc00022, 0xc00023, write16_delegate(FUNC(model1_state::r360_w),this)); +} + +READ16_MEMBER(model1_state::r360_r) +{ + return m_r360_state; +} + +WRITE16_MEMBER(model1_state::r360_w) +{ + /* + this uses the feedback board protocol + command group B - these seem to be gamestates + + bf = init + be = attract + bd = setup #1 (lower safety bar etc.) + bc = setup #2 (push emergency button) + bb = ready to go + ba = ingame + b9 = game over + + results: + 40 = default status + 41 = * (setup #1 ack) + 42 = lowered safety bar + 43 = closed belt + 44 = lever up + 45 = pushed button + 46 = game start + 47 = game over + 48 = lever down + 49 = released belt + */ + switch (data & 0xff) + { + case 0xbf: + case 0xbe: + m_r360_state = ~0x40; + break; + + case 0xbd: + m_r360_state = ~0x44; + break; + + case 0xbc: + m_r360_state = ~0x45; + break; + + case 0xbb: + m_r360_state = ~0x46; + break; + + case 0xba: + case 0xb9: + m_r360_state = ~0x40; + break; + } +} + +GAME( 1993, vf, 0, model1, vf, driver_device, 0, ROT0, "Sega", "Virtua Fighter", MACHINE_IMPERFECT_GRAPHICS ) +GAMEL(1992, vr, 0, model1_vr, vr, driver_device, 0, ROT0, "Sega", "Virtua Racing", MACHINE_IMPERFECT_GRAPHICS, layout_vr ) +GAME( 1993, vformula, vr, model1_vr, vr, driver_device, 0, ROT0, "Sega", "Virtua Formula", MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1993, swa, 0, swa, swa, driver_device, 0, ROT0, "Sega", "Star Wars Arcade", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) +GAME( 1994, wingwar, 0, model1, wingwar, driver_device, 0, ROT0, "Sega", "Wing War (World)", MACHINE_NOT_WORKING ) +GAME( 1994, wingwaru, wingwar, model1, wingwar, driver_device, 0, ROT0, "Sega", "Wing War (US)", MACHINE_NOT_WORKING ) +GAME( 1994, wingwarj, wingwar, model1, wingwar, driver_device, 0, ROT0, "Sega", "Wing War (Japan)", MACHINE_NOT_WORKING ) +GAME( 1994, wingwar360, wingwar, model1, wingwar, model1_state, wingwar360, ROT0, "Sega", "Wing War R360 (US)", MACHINE_NOT_WORKING ) +GAME( 1993, netmerc, 0, model1, vf, driver_device, 0, ROT0, "Sega", "NetMerc?", MACHINE_NOT_WORKING ) diff --git a/src/mame/drivers/model2.cpp b/src/mame/drivers/model2.cpp index a39977bc375..0849e185cc3 100644 --- a/src/mame/drivers/model2.cpp +++ b/src/mame/drivers/model2.cpp @@ -752,14 +752,42 @@ WRITE32_MEMBER(model2_state::copro_function_port_w) //logerror("copro_function_port_w: %08X, %08X, %08X\n", data, offset, mem_mask); if (m_dsp_type == DSP_TYPE_SHARC) copro_fifoin_push(machine().device("dsp"), d,offset,mem_mask); - else + else if (m_dsp_type == DSP_TYPE_TGP) copro_fifoin_push(machine().device("tgp"), d,offset,mem_mask); + else if (m_dsp_type == DSP_TYPE_TGPX4) + { + if (m_tgpx4->is_fifoin_full()) + printf("trying to push to full fifo! (function port)\n"); + + m_tgpx4->fifoin_w(d); + } } READ32_MEMBER(model2_state::copro_fifo_r) { //logerror("copro_fifo_r: %08X, %08X\n", offset, mem_mask); - return copro_fifoout_pop(space,offset,mem_mask); + if (m_dsp_type == DSP_TYPE_SHARC || m_dsp_type == DSP_TYPE_TGP) + { + return copro_fifoout_pop(space, offset, mem_mask); + } + else + { + // TODO +// printf("FIFO OUT read\n"); + if (m_tgpx4->is_fifoout0_empty()) + { + /* Reading from empty FIFO causes the i960 to enter wait state */ + downcast<i960_cpu_device &>(space.device()).i960_stall(); + /* spin the main cpu and let the TGP catch up */ + space.device().execute().spin_until_time(attotime::from_usec(100)); + printf("stalled\n"); + } + else + { + return (uint32_t)(m_tgpx4->fifoout0_r()); + } + } + return 0; } WRITE32_MEMBER(model2_state::copro_fifo_w) @@ -774,6 +802,19 @@ WRITE32_MEMBER(model2_state::copro_fifo_w) { m_tgp_program[m_coprocnt] = data; } + else if (m_dsp_type == DSP_TYPE_TGPX4) + { + if (m_coprocnt & 1) + { + m_tgpx4_program[m_coprocnt / 2] &= 0xffffffffU; + m_tgpx4_program[m_coprocnt / 2] |= u64(data) << 32; + } + else + { + m_tgpx4_program[m_coprocnt / 2] &= 0xffffffff00000000U; + m_tgpx4_program[m_coprocnt / 2] |= data; + } + } m_coprocnt++; } @@ -785,8 +826,16 @@ WRITE32_MEMBER(model2_state::copro_fifo_w) //osd_printf_debug("copro_fifo_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space.device().safe_pc()); if (m_dsp_type == DSP_TYPE_SHARC) copro_fifoin_push(machine().device("dsp"), data,offset,mem_mask); - else + else if (m_dsp_type == DSP_TYPE_TGP) copro_fifoin_push(machine().device("tgp"), data,offset,mem_mask); + else if (m_dsp_type == DSP_TYPE_TGPX4) + { + if (m_tgpx4->is_fifoin_full()) + printf("trying to push to full fifo!\n"); + +// printf("push %08X at %08X\n", data, space.device().safe_pc()); + m_tgpx4->fifoin_w(data); + } } } @@ -1624,7 +1673,8 @@ static ADDRESS_MAP_START( model2c_crx_mem, AS_PROGRAM, 32, model2_state ) AM_RANGE(0x00200000, 0x0023ffff) AM_RAM AM_RANGE(0x00804000, 0x00807fff) AM_READWRITE(geo_prg_r, geo_prg_w) - AM_RANGE(0x00884000, 0x00887fff) AM_READWRITE(copro_prg_r, copro_prg_w) + AM_RANGE(0x00880000, 0x00883fff) AM_WRITE(copro_function_port_w) + AM_RANGE(0x00884000, 0x00887fff) AM_READWRITE(copro_fifo_r, copro_fifo_w) AM_RANGE(0x00980000, 0x00980003) AM_READWRITE(copro_ctl1_r,copro_ctl1_w) AM_RANGE(0x00980008, 0x0098000b) AM_WRITE(geo_ctl1_w ) diff --git a/src/mame/drivers/naomi.cpp b/src/mame/drivers/naomi.cpp index 8077cc523b3..0bf42216ae4 100644 --- a/src/mame/drivers/naomi.cpp +++ b/src/mame/drivers/naomi.cpp @@ -402,8 +402,8 @@ Guilty Gear X 841-0013C 23356 14 (64Mb) Gun Spike 841-0012C 23210 12 (64Mb) present 315-6213 317-5060-COM \same ROM board Cannon Spike 841-0012C-01 23210 12 (64Mb) present 315-6213 317-5060-COM / Heavy Metal Geomatrix (Rev B) HMG016007 23716A 11 (64Mb) present 315-6213 317-5071-COM joystick + 2 buttons -House of the Dead 2 834-13636 21385 20 (64Mb) not present 315-6213 not present -House of the Dead 2 (USA) 834-13636 21585 20 (64Mb) not present 315-6213 not present PCB s/n is 834-13636-01 +House of the Dead 2 834-13636 21385 20 (64Mb) not present not present \ ROM board type is 837-13390 +House of the Dead 2 (USA) 834-13636-01 21585 20 (64Mb) not present not present / uses Lattice ispLSI 2032 80LJ instead of Xilinx Idol Janshi Suchie-Pai 3 841-0002C 21979 14 (64Mb) ? 315-6213 317-5047-JPN requires mahjong panel Jambo! Safari (Rev A) 840-0013C 22826A 8 (64Mb) ? 315-6213 317-0264-COM Mars TV 840-0025C 22993 15 (64Mb) present 315-6213 317-0274-JPN diff --git a/src/mame/drivers/neodriv.hxx b/src/mame/drivers/neodriv.hxx index 9f73e5e211e..777ece76c70 100644 --- a/src/mame/drivers/neodriv.hxx +++ b/src/mame/drivers/neodriv.hxx @@ -3833,6 +3833,31 @@ ROM_START( rbff1a ) /* MVS VERSION */ ROM_LOAD16_BYTE( "095-c8.c8", 0x1800001, 0x200000, CRC(4e6beb6c) SHA1(c0ac7cfc832ace6ad52c58f5da3a8101baead749) ) /* Plane 2,3 */ /* TC5316200 */ ROM_END +ROM_START( rbff1k ) /* KOREAN VERSION */ + ROM_REGION( 0x300000, "cslot1:maincpu", ROMREGION_BE|ROMREGION_16BIT ) + ROM_LOAD16_WORD_SWAP( "095-p1k.p1", 0x000000, 0x100000, CRC(f705364b) SHA1(2668e15663a2c7ec7396f40e4f5f454505968ce8) ) /* TC538200 */ + ROM_LOAD16_WORD_SWAP( "095-p2.sp2", 0x100000, 0x200000, CRC(cc15826e) SHA1(44d6ac6c0ca697a6f367dcfd809b1e1771cb0635) ) /* TC5316200 */ + + NEO_SFIX_128K( "095-s1.s1", CRC(b6bf5e08) SHA1(b527355c35ea097f3448676f2ffa65b8e56ae30c) ) /* TC531000 */ + + NEO_BIOS_AUDIO_128K( "095-m1.m1", CRC(653492a7) SHA1(39e511fb9ed5d2135dc8428a31d0baafb2ab36e0) ) /* TC531001 */ + + ROM_REGION( 0xc00000, "cslot1:ymsnd", 0 ) + ROM_LOAD( "069-v1.v1", 0x000000, 0x400000, CRC(2bdbd4db) SHA1(5f4fecf69c2329d699cbd45829c19303b1e2a80e) ) /* TC5332204 */ + ROM_LOAD( "069-v2.v2", 0x400000, 0x400000, CRC(a698a487) SHA1(11b8bc53bc26a51f4a408e900e3769958625c4ed) ) /* TC5332204 */ + ROM_LOAD( "095-v3.v3", 0x800000, 0x400000, CRC(189d1c6c) SHA1(f0b8cd1ee40ea3feeb2800f0723b451ec8240203) ) /* TC5332201 */ + + ROM_REGION( 0x1c00000, "cslot1:sprites", 0 ) + ROM_LOAD16_BYTE( "069-c1.c1", 0x0000000, 0x400000, CRC(e302f93c) SHA1(d8610b14900b2b8fe691b67ca9b1abb335dbff74) ) /* Plane 0,1 */ /* TC5332205 */ + ROM_LOAD16_BYTE( "069-c2.c2", 0x0000001, 0x400000, CRC(1053a455) SHA1(69501bfac68739e63d798045b812badd251d57b8) ) /* Plane 2,3 */ /* TC5332205 */ + ROM_LOAD16_BYTE( "069-c3.c3", 0x0800000, 0x400000, CRC(1c0fde2f) SHA1(cf6c2ef56c03a861de3b0b6dc0d7c9204d947f9d) ) /* Plane 0,1 */ /* TC5332205 */ + ROM_LOAD16_BYTE( "069-c4.c4", 0x0800001, 0x400000, CRC(a25fc3d0) SHA1(83cb349e2f1032652060b233e741fb893be5af16) ) /* Plane 2,3 */ /* TC5332205 */ + ROM_LOAD16_BYTE( "095-c5.c5", 0x1000000, 0x400000, CRC(8b9b65df) SHA1(e2a7e20855501f240bcd22f5cc92fcb4a9806abe) ) /* Plane 0,1 */ /* TC5332202 */ + ROM_LOAD16_BYTE( "095-c6.c6", 0x1000001, 0x400000, CRC(3e164718) SHA1(53217f938c8964c1ca68a6fd5249c4169a5ac8e6) ) /* Plane 2,3 */ /* TC5332202 */ + ROM_LOAD16_BYTE( "095-c7.c7", 0x1800000, 0x200000, CRC(ca605e12) SHA1(5150b835247fd705bc1dece97d423d9c20a51416) ) /* Plane 0,1 */ /* TC5316200 */ + ROM_LOAD16_BYTE( "095-c8.c8", 0x1800001, 0x200000, CRC(4e6beb6c) SHA1(c0ac7cfc832ace6ad52c58f5da3a8101baead749) ) /* Plane 2,3 */ /* TC5316200 */ +ROM_END + /**************************************** ID-0096 . NGM-096 @@ -8705,6 +8730,7 @@ GAME( 1995, samsho3h, samsho3, neobase, neogeo, neogeo_state, neogeo, R GAME( 1995, fswords, samsho3, neobase, neogeo, neogeo_state, neogeo, ROT0, "SNK", "Fighters Swords (Korean release of Samurai Shodown III)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, rbff1, neogeo, neobase, neogeo, neogeo_state, neogeo, ROT0, "SNK", "Real Bout Fatal Fury / Real Bout Garou Densetsu (NGM-095 ~ NGH-095)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, rbff1a, rbff1, neobase, neogeo, neogeo_state, neogeo, ROT0, "SNK", "Real Bout Fatal Fury / Real Bout Garou Densetsu (bug fix revision)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, rbff1k, rbff1, neobase, neogeo, neogeo_state, neogeo, ROT0, "SNK", "Real Bout Fatal Fury / Real Bout Garou Densetsu (Korean release)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, aof3, neogeo, neobase, neogeo, neogeo_state, neogeo, ROT0, "SNK", "Art of Fighting 3 - The Path of the Warrior / Art of Fighting - Ryuuko no Ken Gaiden", MACHINE_SUPPORTS_SAVE ) GAME( 1996, aof3k, aof3, neobase, neogeo, neogeo_state, neogeo, ROT0, "SNK", "Art of Fighting 3 - The Path of the Warrior (Korean release)", MACHINE_SUPPORTS_SAVE ) // no Japanese title / mode GAME( 1996, kof96, neogeo, neobase, neogeo, neogeo_state, neogeo, ROT0, "SNK", "The King of Fighters '96 (NGM-214)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/playmark.cpp b/src/mame/drivers/playmark.cpp index 114a667d6ef..cc094efa456 100644 --- a/src/mame/drivers/playmark.cpp +++ b/src/mame/drivers/playmark.cpp @@ -207,17 +207,11 @@ READ8_MEMBER(playmark_state::playmark_snd_flag_r) WRITE8_MEMBER(playmark_state::playmark_oki_banking_w) { - logerror("PC$%03x Writing %02x to PortA (OKI bank select) previous bank was %02x\n",space.device().safe_pcbase(),data,m_old_oki_bank); + logerror("PC$%03x Writing %02x to PortA (OKI bank select)\n",space.device().safe_pcbase(),data); - if (m_old_oki_bank != (data & 7)) - { - m_old_oki_bank = data & 7; + int bank = data & 7; - if (((m_old_oki_bank - 1) * 0x40000) < memregion("oki")->bytes()) - { - m_oki->set_rom_bank(m_old_oki_bank - 1); - } - } + m_okibank->set_entry(bank & (m_oki_numbanks - 1)); } WRITE8_MEMBER(playmark_state::playmark_oki_w) @@ -252,17 +246,8 @@ WRITE8_MEMBER(playmark_state::hrdtimes_snd_control_w) { /* This port controls communications to and from the 68K and the OKI device. See playmark_snd_control_w above. OKI banking is also handled here. */ - if (m_old_oki_bank != (data & 3)) - { -// logerror("PC$%03x Writing %02x to PortC (OKI bank select bits). Previous bank was %02x\n",space.device().safe_pcbase(),(data&3),m_old_oki_bank); - - m_old_oki_bank = data & 3; - - if ((m_old_oki_bank * 0x40000) < memregion("oki")->bytes()) - { - m_oki->set_rom_bank(m_old_oki_bank); - } - } + int bank = data & 3; + m_okibank->set_entry(bank & (m_oki_numbanks - 1)); m_oki_control = data; @@ -340,7 +325,7 @@ static ADDRESS_MAP_START( wbeachvl_main_map, AS_PROGRAM, 16, playmark_state ) AM_RANGE(0x710018, 0x710019) AM_READ_PORT("P3") AM_RANGE(0x71001a, 0x71001b) AM_READ_PORT("P4") // AM_RANGE(0x71001c, 0x71001d) AM_READ(playmark_snd_status???) -// AM_RANGE(0x71001e, 0x71001f) AM_WRITE(playmark_snd_command_w) + AM_RANGE(0x71001e, 0x71001f) AM_WRITE(playmark_snd_command_w) AM_RANGE(0x780000, 0x780fff) AM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") AM_RANGE(0xff0000, 0xffffff) AM_RAM ADDRESS_MAP_END @@ -426,6 +411,12 @@ static ADDRESS_MAP_START( luckboomh_main_map, AS_PROGRAM, 16, playmark_state ) AM_RANGE(0xff8000, 0xffffff) AM_RAM ADDRESS_MAP_END +static ADDRESS_MAP_START( oki_map, AS_0, 8, playmark_state ) + AM_RANGE(0x00000, 0x1ffff) AM_ROM + AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK("okibank") +ADDRESS_MAP_END + + static INPUT_PORTS_START( bigtwin ) PORT_START("SYSTEM") @@ -1169,6 +1160,20 @@ static GFXDECODE_START( bigtwinb ) GFXDECODE_ENTRY( "gfx1", 0x40000, hotmind_charlayout, 0x200, 16 ) /* colors 0x200-0x2ff */ GFXDECODE_END +void playmark_state::configure_oki_banks() +{ + if (m_okibank) + { + const uint32_t len = memregion("oki")->bytes(); + uint8_t *rgn = memregion("oki")->base(); + + m_oki_numbanks = len / 0x20000; + + m_okibank->configure_entries(0, m_oki_numbanks, rgn, 0x20000); + m_okibank->set_entry(1); + } +} + MACHINE_START_MEMBER(playmark_state,playmark) { save_item(NAME(m_bgscrollx)); @@ -1183,10 +1188,13 @@ MACHINE_START_MEMBER(playmark_state,playmark) save_item(NAME(m_snd_flag)); save_item(NAME(m_oki_control)); save_item(NAME(m_oki_command)); - save_item(NAME(m_old_oki_bank)); save_item(NAME(m_dispenser_latch)); + + configure_oki_banks(); } + + MACHINE_RESET_MEMBER(playmark_state,playmark) { m_bgscrollx = 0; @@ -1201,7 +1209,6 @@ MACHINE_RESET_MEMBER(playmark_state,playmark) m_snd_flag = 0; m_oki_control = 0; m_oki_command = 0; - m_old_oki_bank = 0; m_dispenser_latch = 0; } @@ -1243,6 +1250,7 @@ static MACHINE_CONFIG_START( bigtwin, playmark_state ) MCFG_OKIM6295_ADD("oki", 1000000, OKIM6295_PIN7_HIGH) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) + MCFG_DEVICE_ADDRESS_MAP(AS_0, oki_map) MACHINE_CONFIG_END static MACHINE_CONFIG_START( bigtwinb, playmark_state ) @@ -1283,6 +1291,7 @@ static MACHINE_CONFIG_START( bigtwinb, playmark_state ) MCFG_OKIM6295_ADD("oki", 1000000, OKIM6295_PIN7_HIGH) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) + MCFG_DEVICE_ADDRESS_MAP(AS_0, oki_map) MACHINE_CONFIG_END static MACHINE_CONFIG_START( wbeachvl, playmark_state ) @@ -1293,13 +1302,13 @@ static MACHINE_CONFIG_START( wbeachvl, playmark_state ) MCFG_CPU_VBLANK_INT_DRIVER("screen", playmark_state, irq2_line_hold) MCFG_CPU_ADD("audiocpu", PIC16C57, XTAL_24MHz/2) /* 12MHz with internal 4x divisor */ - MCFG_PIC16C5x_WRITE_A_CB(WRITE8(playmark_state, playmark_oki_banking_w)) + MCFG_PIC16C5x_WRITE_A_CB(WRITE8(playmark_state, playmark_oki_banking_w)) // wrong? MCFG_PIC16C5x_READ_B_CB(READ8(playmark_state, playmark_snd_command_r)) MCFG_PIC16C5x_WRITE_B_CB(WRITE8(playmark_state, playmark_oki_w)) MCFG_PIC16C5x_READ_C_CB(READ8(playmark_state, playmark_snd_flag_r)) MCFG_PIC16C5x_WRITE_C_CB(WRITE8(playmark_state, playmark_snd_control_w)) +// MCFG_PIC16C5x_WRITE_C_CB(WRITE8(playmark_state, hrdtimes_snd_control_w)) // probably closer to this, but this only supports 2 sample bank bits MCFG_PIC16C5x_T0_CB(READLINE(playmark_state, PIC16C5X_T0_clk_r)) - MCFG_DEVICE_DISABLE() /* Internal code is not dumped yet */ MCFG_EEPROM_SERIAL_93C46_ADD("eeprom") MCFG_EEPROM_SERIAL_DEFAULT_VALUE(0) @@ -1327,6 +1336,7 @@ static MACHINE_CONFIG_START( wbeachvl, playmark_state ) MCFG_OKIM6295_ADD("oki", 1000000, OKIM6295_PIN7_HIGH) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) + MCFG_DEVICE_ADDRESS_MAP(AS_0, oki_map) MACHINE_CONFIG_END static MACHINE_CONFIG_START( excelsr, playmark_state ) @@ -1367,6 +1377,7 @@ static MACHINE_CONFIG_START( excelsr, playmark_state ) MCFG_OKIM6295_ADD("oki", XTAL_1MHz, OKIM6295_PIN7_HIGH) /* 1MHz resonator */ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) + MCFG_DEVICE_ADDRESS_MAP(AS_0, oki_map) MACHINE_CONFIG_END static MACHINE_CONFIG_START( hrdtimes, playmark_state ) @@ -1408,6 +1419,7 @@ static MACHINE_CONFIG_START( hrdtimes, playmark_state ) MCFG_OKIM6295_ADD("oki", XTAL_1MHz, OKIM6295_PIN7_HIGH) /* verified on pcb */ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) + MCFG_DEVICE_ADDRESS_MAP(AS_0, oki_map) MACHINE_CONFIG_END static MACHINE_CONFIG_START( hotmind, playmark_state ) @@ -1454,6 +1466,7 @@ static MACHINE_CONFIG_START( hotmind, playmark_state ) MCFG_OKIM6295_ADD("oki", XTAL_1MHz, OKIM6295_PIN7_HIGH) /* verified on pcb */ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) + MCFG_DEVICE_ADDRESS_MAP(AS_0, oki_map) MACHINE_CONFIG_END static MACHINE_CONFIG_START( luckboomh, playmark_state ) @@ -1499,6 +1512,7 @@ static MACHINE_CONFIG_START( luckboomh, playmark_state ) MCFG_OKIM6295_ADD("oki", XTAL_1MHz, OKIM6295_PIN7_HIGH) /* verified on pcb */ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) + MCFG_DEVICE_ADDRESS_MAP(AS_0, oki_map) MACHINE_CONFIG_END @@ -1573,8 +1587,9 @@ ROM_START( wbeachvl ) ROM_LOAD16_BYTE( "wbv_02.bin", 0x000000, 0x40000, CRC(c7cca29e) SHA1(03af361081d688c4204a95f7f5babcc598b72c23) ) ROM_LOAD16_BYTE( "wbv_03.bin", 0x000001, 0x40000, CRC(db4e69d5) SHA1(119bf35a463d279ddde67ab08f6f1bab9f05cf0c) ) - ROM_REGION( 0x1000, "audiocpu", ROMREGION_ERASE00 ) /* sound (PIC16C57) */ - ROM_LOAD( "pic16c57", 0x0000, 0x1000, NO_DUMP ) + ROM_REGION( 0x1009, "audiocpu", ROMREGION_ERASE00 ) /* sound (PIC16C57) */ + // 0x1000 rom data (actually 0x800 12-bit words), + 0x9 config bytes + ROM_LOAD( "pic16c57", 0x00000, 0x1009, CRC(35439064) SHA1(ab0c5bafd76a2cb2a2e5ddb9d0578fd7e2241e43) ) ROM_REGION( 0x600000, "gfx1", 0 ) ROM_LOAD( "wbv_10.bin", 0x000000, 0x80000, CRC(50680f0b) SHA1(ed76ef6ced70ba7e9558162aa94bbe9f19bbabe6) ) @@ -1591,26 +1606,10 @@ ROM_START( wbeachvl ) ROM_LOAD( "wbv_09.bin", 0x580000, 0x20000, CRC(894ce354) SHA1(331aeabbe10cd645776da2dc0829acc2275e72dc) ) /* 5a0000-5fffff is empty */ - ROM_REGION( 0x100000, "user2", 0 ) /* OKIM6295 samples */ - ROM_LOAD( "wbv_01.bin", 0x00000, 0x100000, CRC(ac33f25f) SHA1(5d9ed16650aeb297d565376a99b31c88ab611668) ) - /* $00000-$20000 stays the same in all sound banks, */ /* the second half of the bank is what gets switched */ - ROM_REGION( 0x1c0000, "oki", 0 ) /* Samples */ - ROM_COPY( "user2", 0x000000, 0x000000, 0x020000) - ROM_COPY( "user2", 0x020000, 0x020000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x040000, 0x020000) - ROM_COPY( "user2", 0x040000, 0x060000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x080000, 0x020000) - ROM_COPY( "user2", 0x060000, 0x0a0000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x0c0000, 0x020000) - ROM_COPY( "user2", 0x080000, 0x0e0000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x100000, 0x020000) - ROM_COPY( "user2", 0x0a0000, 0x120000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x140000, 0x020000) - ROM_COPY( "user2", 0x0c0000, 0x160000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x180000, 0x020000) - ROM_COPY( "user2", 0x0e0000, 0x1a0000, 0x020000) + ROM_REGION( 0x100000, "oki", 0 ) /* Samples */ + ROM_LOAD( "wbv_01.bin", 0x00000, 0x100000, CRC(ac33f25f) SHA1(5d9ed16650aeb297d565376a99b31c88ab611668) ) ROM_END ROM_START( wbeachvl2 ) @@ -1618,8 +1617,9 @@ ROM_START( wbeachvl2 ) ROM_LOAD16_BYTE( "2.bin", 0x000000, 0x40000, CRC(8993487e) SHA1(c927ae655807f9046f66ff96a30bd2c6fa671566) ) ROM_LOAD16_BYTE( "3.bin", 0x000001, 0x40000, CRC(15904789) SHA1(640c80bbf7302529e1a39c2ae60e018ecb176478) ) - ROM_REGION( 0x1000, "audiocpu", ROMREGION_ERASE00 ) /* sound (PIC16C57) */ - ROM_LOAD( "pic16c57", 0x0000, 0x1000, NO_DUMP ) + ROM_REGION( 0x1009, "audiocpu", ROMREGION_ERASE00 ) /* sound (PIC16C57) */ + // 0x1000 rom data (actually 0x800 12-bit words), + 0x9 config bytes + ROM_LOAD( "pic16c57", 0x00000, 0x1009, CRC(35439064) SHA1(ab0c5bafd76a2cb2a2e5ddb9d0578fd7e2241e43) ) ROM_REGION( 0x600000, "gfx1", 0 ) ROM_LOAD( "wbv_10.bin", 0x000000, 0x80000, CRC(50680f0b) SHA1(ed76ef6ced70ba7e9558162aa94bbe9f19bbabe6) ) @@ -1636,26 +1636,10 @@ ROM_START( wbeachvl2 ) ROM_LOAD( "wbv_09.bin", 0x580000, 0x20000, CRC(894ce354) SHA1(331aeabbe10cd645776da2dc0829acc2275e72dc) ) /* 5a0000-5fffff is empty */ - ROM_REGION( 0x100000, "user2", 0 ) /* OKIM6295 samples */ - ROM_LOAD( "wbv_01.bin", 0x00000, 0x100000, CRC(ac33f25f) SHA1(5d9ed16650aeb297d565376a99b31c88ab611668) ) - /* $00000-$20000 stays the same in all sound banks, */ /* the second half of the bank is what gets switched */ - ROM_REGION( 0x1c0000, "oki", 0 ) /* Samples */ - ROM_COPY( "user2", 0x000000, 0x000000, 0x020000) - ROM_COPY( "user2", 0x020000, 0x020000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x040000, 0x020000) - ROM_COPY( "user2", 0x040000, 0x060000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x080000, 0x020000) - ROM_COPY( "user2", 0x060000, 0x0a0000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x0c0000, 0x020000) - ROM_COPY( "user2", 0x080000, 0x0e0000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x100000, 0x020000) - ROM_COPY( "user2", 0x0a0000, 0x120000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x140000, 0x020000) - ROM_COPY( "user2", 0x0c0000, 0x160000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x180000, 0x020000) - ROM_COPY( "user2", 0x0e0000, 0x1a0000, 0x020000) + ROM_REGION( 0x100000, "oki", 0 ) /* Samples */ + ROM_LOAD( "wbv_01.bin", 0x00000, 0x100000, CRC(ac33f25f) SHA1(5d9ed16650aeb297d565376a99b31c88ab611668) ) ROM_END ROM_START( wbeachvl3 ) @@ -1663,8 +1647,9 @@ ROM_START( wbeachvl3 ) ROM_LOAD16_BYTE( "2.u16", 0x000000, 0x40000, CRC(f0f4c282) SHA1(94850b45368c3d09629852adc8ca08164b7a7a94) ) ROM_LOAD16_BYTE( "3.u15", 0x000001, 0x40000, CRC(99775c21) SHA1(fa80a81c59142abcf751352d7a7f9e0d3b5172c9) ) - ROM_REGION( 0x1000, "audiocpu", ROMREGION_ERASE00 ) /* sound (PIC16C57) */ - ROM_LOAD( "pic16c57", 0x0000, 0x1000, NO_DUMP ) + ROM_REGION( 0x1009, "audiocpu", ROMREGION_ERASE00 ) /* sound (PIC16C57) */ + // 0x1000 rom data (actually 0x800 12-bit words), + 0x9 config bytes + ROM_LOAD( "pic16c57", 0x00000, 0x1009, CRC(35439064) SHA1(ab0c5bafd76a2cb2a2e5ddb9d0578fd7e2241e43) ) ROM_REGION( 0x600000, "gfx1", 0 ) ROM_LOAD( "wbv_10.bin", 0x000000, 0x80000, CRC(50680f0b) SHA1(ed76ef6ced70ba7e9558162aa94bbe9f19bbabe6) ) @@ -1681,26 +1666,10 @@ ROM_START( wbeachvl3 ) ROM_LOAD( "wbv_09.bin", 0x580000, 0x20000, CRC(894ce354) SHA1(331aeabbe10cd645776da2dc0829acc2275e72dc) ) /* 5a0000-5fffff is empty */ - ROM_REGION( 0x100000, "user2", 0 ) /* OKIM6295 samples */ - ROM_LOAD( "wbv_01.bin", 0x00000, 0x100000, CRC(ac33f25f) SHA1(5d9ed16650aeb297d565376a99b31c88ab611668) ) - /* $00000-$20000 stays the same in all sound banks, */ /* the second half of the bank is what gets switched */ - ROM_REGION( 0x1c0000, "oki", 0 ) /* Samples */ - ROM_COPY( "user2", 0x000000, 0x000000, 0x020000) - ROM_COPY( "user2", 0x020000, 0x020000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x040000, 0x020000) - ROM_COPY( "user2", 0x040000, 0x060000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x080000, 0x020000) - ROM_COPY( "user2", 0x060000, 0x0a0000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x0c0000, 0x020000) - ROM_COPY( "user2", 0x080000, 0x0e0000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x100000, 0x020000) - ROM_COPY( "user2", 0x0a0000, 0x120000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x140000, 0x020000) - ROM_COPY( "user2", 0x0c0000, 0x160000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x180000, 0x020000) - ROM_COPY( "user2", 0x0e0000, 0x1a0000, 0x020000) + ROM_REGION( 0x100000, "oki", 0 ) /* Samples */ + ROM_LOAD( "wbv_01.bin", 0x00000, 0x100000, CRC(ac33f25f) SHA1(5d9ed16650aeb297d565376a99b31c88ab611668) ) ROM_END ROM_START( excelsr ) @@ -1730,18 +1699,10 @@ ROM_START( excelsr ) ROM_LOAD( "23.u323", 0x100000, 0x80000, CRC(d8e1453b) SHA1(a3edb05abe486d4cce30f5caf14be619b6886f7c) ) ROM_LOAD( "27.u324", 0x180000, 0x80000, CRC(eca2c079) SHA1(a07957b427d55c8ca1efb0e83ee3b603f06bed58) ) - ROM_REGION( 0x80000, "user2", 0 ) /* OKIM6295 samples */ - ROM_LOAD( "16.i013", 0x000000, 0x80000, CRC(7ed9da5d) SHA1(352f1e89613feb1902b6d87adb996ed1c1d8108e) ) - /* $00000-$20000 stays the same in all sound banks, */ /* the second half of the bank is what gets switched */ - ROM_REGION( 0xc0000, "oki", 0 ) /* Samples */ - ROM_COPY( "user2", 0x000000, 0x000000, 0x020000) - ROM_COPY( "user2", 0x020000, 0x020000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x040000, 0x020000) - ROM_COPY( "user2", 0x040000, 0x060000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x080000, 0x020000) - ROM_COPY( "user2", 0x060000, 0x0a0000, 0x020000) + ROM_REGION( 0x80000, "oki", 0 ) /* Samples */ + ROM_LOAD( "16.i013", 0x000000, 0x80000, CRC(7ed9da5d) SHA1(352f1e89613feb1902b6d87adb996ed1c1d8108e) ) ROM_END ROM_START( excelsra ) @@ -1771,18 +1732,10 @@ ROM_START( excelsra ) ROM_LOAD( "23.u323", 0x100000, 0x80000, CRC(d8e1453b) SHA1(a3edb05abe486d4cce30f5caf14be619b6886f7c) ) ROM_LOAD( "27.u324", 0x180000, 0x80000, CRC(eca2c079) SHA1(a07957b427d55c8ca1efb0e83ee3b603f06bed58) ) - ROM_REGION( 0x80000, "user2", 0 ) /* OKIM6295 samples */ - ROM_LOAD( "16.i013", 0x000000, 0x80000, CRC(7ed9da5d) SHA1(352f1e89613feb1902b6d87adb996ed1c1d8108e) ) - /* $00000-$20000 stays the same in all sound banks, */ /* the second half of the bank is what gets switched */ - ROM_REGION( 0xc0000, "oki", 0 ) /* Samples */ - ROM_COPY( "user2", 0x000000, 0x000000, 0x020000) - ROM_COPY( "user2", 0x020000, 0x020000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x040000, 0x020000) - ROM_COPY( "user2", 0x040000, 0x060000, 0x020000) - ROM_COPY( "user2", 0x000000, 0x080000, 0x020000) - ROM_COPY( "user2", 0x060000, 0x0a0000, 0x020000) + ROM_REGION( 0x80000, "oki", 0 ) /* Samples */ + ROM_LOAD( "16.i013", 0x000000, 0x80000, CRC(7ed9da5d) SHA1(352f1e89613feb1902b6d87adb996ed1c1d8108e) ) ROM_END ROM_START( hrdtimes ) @@ -1810,15 +1763,8 @@ ROM_START( hrdtimes ) /* $00000-$20000 stays the same in all sound banks, */ /* the second half of the bank is what gets switched */ - ROM_REGION( 0x100000, "oki", 0 ) /* Samples */ - ROM_LOAD( "30.io13", 0x00000, 0x20000, CRC(fa5e50ae) SHA1(f3bd87c83fca9269cc2f19db1fbf55540c96f931) ) - ROM_CONTINUE( 0x60000, 0x20000 ) - ROM_CONTINUE( 0xa0000, 0x20000 ) - ROM_CONTINUE( 0xe0000, 0x20000 ) - ROM_COPY( "oki", 0x000000, 0x20000, 0x20000 ) - ROM_COPY( "oki", 0x000000, 0x40000, 0x20000 ) - ROM_COPY( "oki", 0x000000, 0x80000, 0x20000 ) - ROM_COPY( "oki", 0x000000, 0xc0000, 0x20000 ) + ROM_REGION( 0x80000, "oki", 0 ) /* Samples */ + ROM_LOAD( "30.io13", 0x00000, 0x80000, CRC(fa5e50ae) SHA1(f3bd87c83fca9269cc2f19db1fbf55540c96f931) ) ROM_END /* Different revision of the PCB, uses larger gfx ROMs, however the content is the same */ @@ -1844,15 +1790,8 @@ ROM_START( hrdtimesa ) /* $00000-$20000 stays the same in all sound banks, */ /* the second half of the bank is what gets switched */ - ROM_REGION( 0x100000, "oki", 0 ) /* Samples */ - ROM_LOAD( "io13.bin", 0x00000, 0x20000, CRC(fa5e50ae) SHA1(f3bd87c83fca9269cc2f19db1fbf55540c96f931) ) - ROM_CONTINUE( 0x60000, 0x20000 ) - ROM_CONTINUE( 0xa0000, 0x20000 ) - ROM_CONTINUE( 0xe0000, 0x20000 ) - ROM_COPY( "oki", 0x000000, 0x20000, 0x20000 ) - ROM_COPY( "oki", 0x000000, 0x40000, 0x20000 ) - ROM_COPY( "oki", 0x000000, 0x80000, 0x20000 ) - ROM_COPY( "oki", 0x000000, 0xc0000, 0x20000 ) + ROM_REGION( 0x80000, "oki", 0 ) /* Samples */ + ROM_LOAD( "io13.bin", 0x00000, 0x80000, CRC(fa5e50ae) SHA1(f3bd87c83fca9269cc2f19db1fbf55540c96f931) ) ROM_END /* @@ -1926,11 +1865,8 @@ ROM_START( hotmind ) ROM_LOAD16_BYTE( "25.u84", 0x40000, 0x20000, CRC(c4fd4445) SHA1(ab0c5a328a312740595b5c92a1050527140518f3) ) ROM_LOAD16_BYTE( "29.u83", 0x40001, 0x20000, CRC(0bebfb53) SHA1(d4342f808141b70af98c370004153a31d120e2a4) ) - ROM_REGION( 0x80000, "oki", 0 ) /* Samples */ - ROM_LOAD( "20.io13", 0x00000, 0x20000, CRC(0bf3a3e5) SHA1(2ae06f37a6bcd20bc5fbaa90d970aba2ebf3cf5a) ) - ROM_CONTINUE( 0x60000, 0x20000 ) - ROM_COPY( "oki", 0x000000, 0x20000, 0x20000 ) - ROM_COPY( "oki", 0x000000, 0x40000, 0x20000 ) + ROM_REGION( 0x40000, "oki", 0 ) /* Samples */ + ROM_LOAD( "20.io13", 0x00000, 0x40000, CRC(0bf3a3e5) SHA1(2ae06f37a6bcd20bc5fbaa90d970aba2ebf3cf5a) ) ROM_REGION( 0x8000, "plds", 0 ) /* These were read protected */ ROM_LOAD( "palce16v8h-25-pc4_u58.jed", 0x0000, 0xb89, BAD_DUMP CRC(ba88c1da) SHA1(9b55e96eee44a467bdfbf760137ccb2fb3afedf0) ) @@ -1969,14 +1905,12 @@ ROM_START( luckboomh ) ROM_LOAD16_BYTE( "25.u84", 0x40000, 0x20000, CRC(e1ab5cf5) SHA1(f76d00537cfd6f09439e44071875bf021622fd07) ) ROM_LOAD16_BYTE( "29.u83", 0x40001, 0x20000, CRC(9572d2d4) SHA1(90d55b1f13dc93041160530e8c1ce8def6e02bcf) ) - ROM_REGION( 0x80000, "oki", 0 ) /* Samples */ - ROM_LOAD( "20.io13", 0x00000, 0x20000, CRC(0d42c0a3) SHA1(1b1d4c7dcbb063e8bf133063770b753947d1a017) ) - ROM_CONTINUE( 0x60000, 0x20000 ) - ROM_COPY( "oki", 0x000000, 0x20000, 0x20000 ) - ROM_COPY( "oki", 0x000000, 0x40000, 0x20000 ) + ROM_REGION( 0x40000, "oki", 0 ) /* Samples */ + ROM_LOAD( "20.io13", 0x00000, 0x40000, CRC(0d42c0a3) SHA1(1b1d4c7dcbb063e8bf133063770b753947d1a017) ) ROM_END + uint8_t playmark_state::playmark_asciitohex(uint8_t data) { /* Convert ASCII data to HEX */ @@ -2061,9 +1995,9 @@ DRIVER_INIT_MEMBER(playmark_state,pic_decode) GAME( 1995, bigtwin, 0, bigtwin, bigtwin, playmark_state, pic_decode, ROT0, "Playmark", "Big Twin", MACHINE_SUPPORTS_SAVE ) GAME( 1995, bigtwinb, bigtwin, bigtwinb, bigtwinb, playmark_state, pic_decode, ROT0, "Playmark", "Big Twin (No Girls Conversion)", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, wbeachvl, 0, wbeachvl, wbeachvl, driver_device, 0, ROT0, "Playmark", "World Beach Volley (set 1)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE ) -GAME( 1995, wbeachvl2, wbeachvl, wbeachvl, wbeachvl, driver_device, 0, ROT0, "Playmark", "World Beach Volley (set 2)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE ) -GAME( 1995, wbeachvl3, wbeachvl, wbeachvl, wbeachvl, driver_device, 0, ROT0, "Playmark", "World Beach Volley (set 3)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE ) +GAME( 1995, wbeachvl, 0, wbeachvl, wbeachvl, driver_device, 0, ROT0, "Playmark", "World Beach Volley (set 1)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) +GAME( 1995, wbeachvl2, wbeachvl, wbeachvl, wbeachvl, driver_device, 0, ROT0, "Playmark", "World Beach Volley (set 2)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) +GAME( 1995, wbeachvl3, wbeachvl, wbeachvl, wbeachvl, driver_device, 0, ROT0, "Playmark", "World Beach Volley (set 3)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) GAME( 1996, excelsr, 0, excelsr, excelsr, playmark_state, pic_decode, ROT0, "Playmark", "Excelsior (set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, excelsra, excelsr, excelsr, excelsr, playmark_state, pic_decode, ROT0, "Playmark", "Excelsior (set 2)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, hrdtimes, 0, hrdtimes, hrdtimes, driver_device, 0, ROT0, "Playmark", "Hard Times (set 1)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/powerbal.cpp b/src/mame/drivers/powerbal.cpp index 675a0a88ef4..879b0c00e91 100644 --- a/src/mame/drivers/powerbal.cpp +++ b/src/mame/drivers/powerbal.cpp @@ -78,13 +78,8 @@ WRITE16_MEMBER(powerbal_state::tile_banking_w) WRITE16_MEMBER(powerbal_state::oki_banking) { - if (data & 3) - { - int addr = (data & 3) - 1; - - if (addr * 0x40000 < memregion("oki")->bytes()) - m_oki->set_rom_bank(addr); - } + int bank = data & 3; + m_okibank->set_entry(bank & (m_oki_numbanks - 1)); } static ADDRESS_MAP_START( magicstk_main_map, AS_PROGRAM, 16, powerbal_state ) @@ -128,6 +123,10 @@ static ADDRESS_MAP_START( powerbal_main_map, AS_PROGRAM, 16, powerbal_state ) AM_RANGE(0x103000, 0x103fff) AM_RAM ADDRESS_MAP_END +static ADDRESS_MAP_START( oki_map, AS_0, 8, powerbal_state ) + AM_RANGE(0x00000, 0x1ffff) AM_ROM + AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK("okibank") +ADDRESS_MAP_END static INPUT_PORTS_START( powerbal ) PORT_START("IN0") @@ -484,6 +483,7 @@ MACHINE_START_MEMBER(powerbal_state,powerbal) MACHINE_RESET_MEMBER(powerbal_state,powerbal) { m_tilebank = 0; + configure_oki_banks(); } static MACHINE_CONFIG_START( powerbal, powerbal_state ) @@ -516,6 +516,7 @@ static MACHINE_CONFIG_START( powerbal, powerbal_state ) MCFG_OKIM6295_ADD("oki", 1000000, OKIM6295_PIN7_HIGH) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) + MCFG_DEVICE_ADDRESS_MAP(AS_0, oki_map) MACHINE_CONFIG_END static MACHINE_CONFIG_START( magicstk, powerbal_state ) @@ -551,6 +552,7 @@ static MACHINE_CONFIG_START( magicstk, powerbal_state ) MCFG_OKIM6295_ADD("oki", 1000000, OKIM6295_PIN7_HIGH) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) + MCFG_DEVICE_ADDRESS_MAP(AS_0, oki_map) MACHINE_CONFIG_END @@ -622,12 +624,8 @@ ROM_START( powerbal ) /* $00000-$20000 stays the same in all sound banks, */ /* the second half of the bank is the area that gets switched */ - ROM_REGION( 0xc0000, "oki", 0 ) /* OKI Samples */ - ROM_LOAD( "1.u16", 0x00000, 0x40000, CRC(12776dbc) SHA1(9ab9930fd581296642834d2cb4ba65264a588af3) ) - ROM_CONTINUE( 0x60000, 0x20000 ) - ROM_CONTINUE( 0xa0000, 0x20000 ) - ROM_COPY( "oki", 0x000000, 0x40000, 0x20000) - ROM_COPY( "oki", 0x000000, 0x80000, 0x20000) + ROM_REGION( 0x80000, "oki", 0 ) /* OKI Samples */ + ROM_LOAD( "1.u16", 0x00000, 0x80000, CRC(12776dbc) SHA1(9ab9930fd581296642834d2cb4ba65264a588af3) ) ROM_REGION( 0x1200, "plds", 0 ) ROM_LOAD( "palce16v8h.u102", 0x0000, 0x0117, NO_DUMP ) /* PAL is read protected */ diff --git a/src/mame/drivers/raiden.cpp b/src/mame/drivers/raiden.cpp index 381d7e8d02c..d3bf1fac4ec 100644 --- a/src/mame/drivers/raiden.cpp +++ b/src/mame/drivers/raiden.cpp @@ -582,6 +582,49 @@ ROM_START( raidenk ) /* Same board as above. Not sure why the sound CPU would be ROM_LOAD( "7.u203", 0x00000, 0x10000, CRC(8f927822) SHA1(592f2719f2c448c3b4b239eeaec078b411e12dbb) ) ROM_END +ROM_START( raidenkb ) /* Korean bootleg board. ROMs for main, sub, audiocpu, chars and oki match raidenk, while object and tile ROMs are differently split */ + ROM_REGION( 0x100000, "maincpu", 0 ) /* v30 main cpu */ + ROM_LOAD16_BYTE( "1.u0253", 0x0a0000, 0x10000, CRC(a4b12785) SHA1(446314e82ce01315cb3e3d1f323eaa2ad6fb48dd) ) + ROM_LOAD16_BYTE( "2.u0252", 0x0a0001, 0x10000, CRC(17640bd5) SHA1(5bbc99900426b1a072b52537ae9a50220c378a0d) ) + ROM_LOAD16_BYTE( "3.u022", 0x0c0000, 0x20000, CRC(f6af09d0) SHA1(ecd49f3351359ea2d5cbd140c9962d45c5544ecd) ) + ROM_LOAD16_BYTE( "4k.u023", 0x0c0001, 0x20000, CRC(fddf24da) SHA1(ececed0b0b96d070d85bfb6174029142bc96d5f0) ) /* 0x1fffd == 0x02, 0x1fffe == 0xA4 */ + + ROM_REGION( 0x100000, "sub", 0 ) /* v30 sub cpu */ + ROM_LOAD16_BYTE( "5.u042", 0x0c0000, 0x20000, CRC(ed03562e) SHA1(bf6b44fb53fa2321cd52c00fcb43b8ceb6ceffff) ) + ROM_LOAD16_BYTE( "6.u043", 0x0c0001, 0x20000, CRC(a19d5b5d) SHA1(aa5e5be60b737913e5677f88ebc218302245e5af) ) + + ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */ + ROM_LOAD( "8b.u212", 0x000000, 0x08000, CRC(99ee7505) SHA1(b97c8ee5e26e8554b5de506fba3b32cc2fde53c9) ) /* Not encrypted */ + ROM_CONTINUE( 0x010000, 0x08000 ) + ROM_COPY( "audiocpu", 0x000000, 0x018000, 0x08000 ) + + ROM_REGION( 0x010000, "gfx1", 0 ) /* Chars */ + ROM_LOAD( "9", 0x00000, 0x08000, CRC(1922b25e) SHA1(da27122dd1c43770e7385ad602ef397c64d2f754) ) /* On some PCBs there is no explicit */ + ROM_LOAD( "10", 0x08000, 0x08000, CRC(5f90786a) SHA1(4f63b07c6afbcf5196a433f3356bef984fe303ef) ) /* U location for these two roms */ + + ROM_REGION( 0x080000, "gfx2", 0 ) /* tiles */ + ROM_LOAD16_BYTE( "rkb15bg.bin", 0x00000, 0x20000, CRC(13a69064) SHA1(a9fcd785e3bac7c0d39be532b3755e6dd45fc314) ) + ROM_LOAD16_BYTE( "rkb17bg.bin", 0x00001, 0x20000, CRC(d7a6c649) SHA1(01d6f18af0385466e3956c3f3afc82393acee6bc) ) + ROM_LOAD16_BYTE( "rkb16bg.bin", 0x40000, 0x20000, CRC(66ea8484) SHA1(f4452e1b0991bf81a60b580ba822fc43b1a443e6) ) + ROM_LOAD16_BYTE( "rkb18bg.bin", 0x40001, 0x20000, CRC(42362d56) SHA1(1cad19fa3f66e34865383d9a94e9058114910365) ) + + ROM_REGION( 0x080000, "gfx3", 0 ) /* tiles */ + ROM_LOAD16_BYTE( "rkb7bg.bin", 0x00000, 0x20000, CRC(25239711) SHA1(978cfc6487ed711cc1b513824741c347ec92889d) ) + ROM_LOAD16_BYTE( "rkb9bg.bin", 0x00001, 0x20000, CRC(6ca0d7b3) SHA1(ef63657a01b07aaa0ded7b0d405b872b4d3a56a8) ) + ROM_LOAD16_BYTE( "rkb8bg.bin", 0x40000, 0x20000, CRC(3cad38fc) SHA1(de2257f70c3e71905bc959f80be183c6d95fd06d) ) + ROM_LOAD16_BYTE( "rkb10bg.bin", 0x40001, 0x20000, CRC(6fce95a3) SHA1(1d3beda3a4dd0a2a3afbb7b5b16d87bf3257bcb4) ) + + + ROM_REGION( 0x090000, "gfx4", 0 ) /* sprites */ + ROM_LOAD16_BYTE( "rkb19obj.bin", 0x00000, 0x20000, CRC(34fa4485) SHA1(d9893c484ee4f80e364824500c6c048f58f49752) ) + ROM_LOAD16_BYTE( "rkb21obj.bin", 0x00001, 0x20000, CRC(d806395b) SHA1(7c6fc848aa40a49590e00d0b02ce21ad5414e387) ) + ROM_LOAD16_BYTE( "rkb20obj.bin", 0x40000, 0x20000, CRC(8b7ca3c6) SHA1(81c3e98cbd81a39e04b5e7fb3683aba50545f774) ) + ROM_LOAD16_BYTE( "rkb22obj.bin", 0x40001, 0x20000, CRC(82ee78a0) SHA1(4af0593f9c7d8db59f17d75d6f9020ecd4bdcb98) ) + + ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */ + ROM_LOAD( "7.u203", 0x00000, 0x10000, CRC(8f927822) SHA1(592f2719f2c448c3b4b239eeaec078b411e12dbb) ) +ROM_END + ROM_START( raidenb )/* Different hardware, Main & Sub CPU code not encrypted. */ ROM_REGION( 0x100000, "maincpu", 0 ) /* v30 main cpu */ ROM_LOAD16_BYTE( "1.u0253", 0x0a0000, 0x10000, CRC(a4b12785) SHA1(446314e82ce01315cb3e3d1f323eaa2ad6fb48dd) ) @@ -702,6 +745,9 @@ GAME( 1990, raident, raiden, raidene, raiden, raiden_state, raiden, ROT270, " /* Same as above, but the sound CPU code is not encrypted */ GAME( 1990, raidenk, raiden, raiden, raiden, raiden_state, raiden, ROT270, "Seibu Kaihatsu (IBL Corporation license)", "Raiden (Korea)", MACHINE_SUPPORTS_SAVE ) +/* Bootleg of the Korean release */ +GAME( 1990, raidenkb, raiden, raiden, raiden, raiden_state, raiden, ROT270, "bootleg", "Raiden (Korea, bootleg)", MACHINE_SUPPORTS_SAVE ) + /* Alternate hardware; SEI8904 + SEI9008 PCBs. Main & Sub CPU code not encrypted */ GAME( 1990, raidenua, raiden, raidenu, raiden, driver_device, 0, ROT270, "Seibu Kaihatsu (Fabtek license)", "Raiden (US set 2)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/rainbow.cpp b/src/mame/drivers/rainbow.cpp index 09c0de945de..4a180158368 100644 --- a/src/mame/drivers/rainbow.cpp +++ b/src/mame/drivers/rainbow.cpp @@ -457,7 +457,8 @@ public: m_hdc(*this, "hdc"), m_mpsc(*this, "upd7201"), - m_dbrg(*this, "com8116"), + m_dbrg_A(*this, "com8116_a"), + m_dbrg_B(*this, "com8116_b"), m_kbd8251(*this, "kbdser"), m_lk201(*this, LK201_TAG), @@ -545,6 +546,8 @@ public: DECLARE_WRITE8_MEMBER(printer_bitrate_w); DECLARE_WRITE_LINE_MEMBER( com8116_a_fr_w ); DECLARE_WRITE_LINE_MEMBER( com8116_a_ft_w ); + DECLARE_WRITE_LINE_MEMBER( com8116_b_fr_w ); + DECLARE_WRITE_LINE_MEMBER( com8116_b_ft_w ); DECLARE_WRITE8_MEMBER(GDC_EXTRA_REGISTER_w); DECLARE_READ8_MEMBER(GDC_EXTRA_REGISTER_r); @@ -604,7 +607,8 @@ private: optional_device<wd2010_device> m_hdc; required_device<upd7201_device> m_mpsc; - required_device<com8116_device> m_dbrg; + required_device<com8116_device> m_dbrg_A; + required_device<com8116_device> m_dbrg_B; required_device<i8251_device> m_kbd8251; required_device<lk201_device> m_lk201; required_shared_ptr<uint8_t> m_p_ram; @@ -835,6 +839,10 @@ void rainbow_state::machine_start() rom[0xf4000 + 0x135e] = 0x00; // Floppy / RX-50 workaround: in case of Z80 RESPONSE FAILURE ($80 bit set in AL), do not block floppy access. rom[0xf4000 + 0x198F] = 0xeb; // cond.JMP to uncond.JMP (disables error message 60...) + + rom[0xf4000 + 0x315D] = 0x00; // AND DL,0 (make sure DL is zero before ROM_Initialize7201) + rom[0xf4000 + 0x315E] = 0xe2; + rom[0xf4000 + 0x315F] = 0x02; } #endif } @@ -1148,7 +1156,7 @@ void rainbow_state::machine_reset() output().set_value("led1", 1); uint32_t max_sector = (info->cylinders) * (info->heads) * (info->sectors); - printf("\n%u (%3.2f) MB HARD DISK MOUNTED. GEOMETRY: %d HEADS (1..%d ARE OK).\n%d CYLINDERS (151 to %d ARE OK).\n%d SECTORS / TRACK (up to %d ARE OK). \n%d BYTES / SECTOR (128 to 1024 ARE OK).\n", + popmessage("\n%u (%3.2f) MB HARD DISK MOUNTED. GEOMETRY: %d HEADS (1..%d ARE OK).\n%d CYLINDERS (151 to %d ARE OK).\n%d SECTORS / TRACK (up to %d ARE OK). \n%d BYTES / SECTOR (128 to 1024 ARE OK).\n", max_sector * info->sectorbytes / 1000000, (float)max_sector * (float)info->sectorbytes / 1048576.0f, info->heads, RD51_MAX_HEAD, @@ -1301,7 +1309,6 @@ void rainbow_state::update_8088_irqs() void rainbow_state::raise_8088_irq(int ref) { m_irq_mask |= (1 << ref); - update_8088_irqs(); } @@ -1315,12 +1322,10 @@ void rainbow_state::lower_8088_irq(int ref) // IRQ service for 7201 (commm / printer) void rainbow_state::update_mpsc_irq() { - if (m_mpsc_irq == 0) { + if (m_mpsc_irq == 0) lower_8088_irq(IRQ_COMM_PTR_INTR_L); - m_mpsc->m1_r(); // interrupt acknowledge - } else + else raise_8088_irq(IRQ_COMM_PTR_INTR_L); - } WRITE_LINE_MEMBER(rainbow_state::mpsc_irq) @@ -1329,25 +1334,27 @@ WRITE_LINE_MEMBER(rainbow_state::mpsc_irq) update_mpsc_irq(); } -// PORT 0x0e : Printer bit rates -WRITE8_MEMBER(rainbow_state::printer_bitrate_w) -{ - printf("\nPRINTER bitrate = %02x HEX\n",data & 7); - - // "bit 3 controls the communications port clock (RxC,TxC). External clock when 1, internal when 0" - printf(" - CLOCK BIT: %02x", data & 8); -} - // PORT 0x06 : Communication bit rates (see page 21 of PC 100 SPEC) WRITE8_MEMBER(rainbow_state::comm_bitrate_w) { - m_dbrg->str_w(data & 0x0f); // PDF is wrong, low nibble is RECEIVE clock (verified in SETUP). + m_dbrg_A->str_w(data & 0x0f); // PDF is wrong, low nibble is RECEIVE clock (verified in SETUP). printf("\nRECEIVE bitrate = %02x HEX\n",data & 0x0f); - m_dbrg->stt_w( ((data & 0xf0) >> 4) ); + m_dbrg_A->stt_w( ((data & 0xf0) >> 4) ); printf("\nTRANSMIT bitrate = %02x HEX\n",(data & 0xf0) >> 4); } +// PORT 0x0e : Printer bit rates +WRITE8_MEMBER(rainbow_state::printer_bitrate_w) +{ + m_dbrg_B->str_w(data & 7); // bits 0 - 2 + m_dbrg_B->stt_w(data & 7); // TX and RX rate cannot be programmed independently. + printf("\n(PRINTER) RECEIVE / TRANSMIT bitrate = %02x HEX\n",data & 7); + + // "bit 3 controls the communications port clock (RxC,TxC). External clock when 1, internal when 0" + printf(" - CLOCK (0 = internal): %02x", data & 8); +} + WRITE_LINE_MEMBER(rainbow_state::com8116_a_fr_w) { m_mpsc->rxca_w(state); @@ -1358,6 +1365,15 @@ WRITE_LINE_MEMBER(rainbow_state::com8116_a_ft_w) m_mpsc->txca_w(state); } +WRITE_LINE_MEMBER(rainbow_state::com8116_b_fr_w) +{ + m_mpsc->rxcb_w(state); +} + +WRITE_LINE_MEMBER(rainbow_state::com8116_b_ft_w) +{ + m_mpsc->txcb_w(state); +} // Only Z80 * private SRAM * is wait state free // (= fast enough to allow proper I/O to the floppy) @@ -2388,6 +2404,9 @@ IRQ_CALLBACK_MEMBER(rainbow_state::irq_callback) if (i == IRQ_8088_VBL) // If VBL IRQ acknowledged... m_crtc->MHFU(MHFU_RESET); // ...reset counter (also: DC012_W) + if (i == IRQ_COMM_PTR_INTR_L) + m_mpsc->m1_r(); // serial interrupt acknowledge + intnum = vectors[i] | m_irq_high; break; } @@ -2503,10 +2522,10 @@ INTERRUPT_GEN_MEMBER(rainbow_state::vblank_irq) if (m_POWER_GOOD && m_crtc->MHFU(MHFU_IS_ENABLED)) // If enabled... { - if (m_crtc->MHFU(MHFU_VALUE) > 7) // + more than (7 * 16.666) msecs gone (108 ms would be by the book) + if (m_crtc->MHFU(MHFU_VALUE) > 10) // + more than (10 * 16.666) msecs gone (108 ms would be by the book) { m_crtc->MHFU(MHFU_RESET_and_DISABLE); - printf("\n**** WATCHDOG TRIPPED:nVBL IRQ not acknowledged within (at least) 108 milliseconds. ****\n"); + popmessage("\n**** WATCHDOG TRIPPED:nVBL IRQ not acknowledged within (at least) 108 milliseconds. ****\n"); if (m_inp12->read() == 0x01) // (DIP) for watchdog active? cmd_timer->adjust(attotime::from_msec(RESET_DURATION_MS)); @@ -3149,10 +3168,14 @@ MCFG_HARDDISK_ADD("harddisk1") MCFG_DS1315_ADD("rtc") // DS1315 (ClikClok for DEC-100 B) * OPTIONAL * -MCFG_DEVICE_ADD("com8116", COM8116, XTAL_5_0688MHz) // Baud rate generator +MCFG_DEVICE_ADD("com8116_a", COM8116, XTAL_5_0688MHz) // Baud rate generator A MCFG_COM8116_FR_HANDLER(WRITELINE(rainbow_state, com8116_a_fr_w)) MCFG_COM8116_FT_HANDLER(WRITELINE(rainbow_state, com8116_a_ft_w)) +MCFG_DEVICE_ADD("com8116_b", COM8116, XTAL_5_0688MHz) // Baud rate generator B +MCFG_COM8116_FR_HANDLER(WRITELINE(rainbow_state, com8116_b_fr_w)) +MCFG_COM8116_FT_HANDLER(WRITELINE(rainbow_state, com8116_b_ft_w)) + MCFG_UPD7201_ADD("upd7201", XTAL_2_5MHz, 0, 0, 0, 0) // 2.5 Mhz from schematics MCFG_Z80DART_OUT_INT_CB(WRITELINE(rainbow_state, mpsc_irq)) diff --git a/src/mame/drivers/rastan.cpp b/src/mame/drivers/rastan.cpp index 7be287f3702..05dc3ec558f 100644 --- a/src/mame/drivers/rastan.cpp +++ b/src/mame/drivers/rastan.cpp @@ -407,7 +407,7 @@ static MACHINE_CONFIG_START( rastan, rastan_state ) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.60) MCFG_DEVICE_ADD("adpcm_sel", LS157, 0) - MCFG_74LS157_OUT_CB(DEVWRITE8("msm", msm5205_device, data_w)) + MCFG_74157_OUT_CB(DEVWRITE8("msm", msm5205_device, data_w)) MCFG_DEVICE_ADD("tc0140syt", TC0140SYT, 0) MCFG_TC0140SYT_MASTER_CPU("maincpu") diff --git a/src/mame/drivers/spinb.cpp b/src/mame/drivers/spinb.cpp index 569c10e8287..806c8e99f14 100644 --- a/src/mame/drivers/spinb.cpp +++ b/src/mame/drivers/spinb.cpp @@ -36,6 +36,7 @@ ToDo: #include "machine/i8255.h" #include "sound/msm5205.h" #include "machine/7474.h" +#include "machine/74157.h" class spinb_state : public genpin_class { @@ -50,6 +51,8 @@ public: , m_msm_m(*this, "msm_m") , m_ic5a(*this, "ic5a") , m_ic5m(*this, "ic5m") + , m_ic14a(*this, "ic14a") + , m_ic14m(*this, "ic14m") , m_switches(*this, "SW.%u", 0) { } @@ -110,6 +113,8 @@ private: uint8_t *m_p_dmdcpu; virtual void machine_reset() override; virtual void machine_start() override; + void update_sound_a(); + void update_sound_m(); required_device<cpu_device> m_maincpu; required_device<cpu_device> m_audiocpu; required_device<cpu_device> m_musiccpu; @@ -118,6 +123,8 @@ private: required_device<msm5205_device> m_msm_m; required_device<ttl7474_device> m_ic5a; required_device<ttl7474_device> m_ic5m; + required_device<hct157_device> m_ic14a; + required_device<hct157_device> m_ic14m; required_ioport_array<11> m_switches; }; @@ -407,6 +414,8 @@ WRITE8_MEMBER( spinb_state::sndbank_a_w ) m_sound_addr_a |= (2<<19); else if (BIT(data, 7)) m_sndbank_a = 0xff; + + update_sound_a(); } WRITE8_MEMBER( spinb_state::sndbank_m_w ) @@ -420,50 +429,50 @@ WRITE8_MEMBER( spinb_state::sndbank_m_w ) m_sound_addr_m |= (2<<19); else if (BIT(data, 7)) m_sndbank_m = 0xff; + + update_sound_m(); } WRITE_LINE_MEMBER( spinb_state::vck_a_w ) { m_ic5a->clock_w(0); m_ic5a->clock_w(1); +} +void spinb_state::update_sound_a() +{ if (m_sndbank_a != 0xff) - { - if (!m_pc0a) - m_msm_a->data_w(m_p_audio[m_sound_addr_a] & 15); - else - m_msm_a->data_w(m_p_audio[m_sound_addr_a] >> 4); - } + m_ic14a->ab_w(m_p_audio[m_sound_addr_a]); else - m_msm_a->data_w(0); + m_ic14a->ab_w(0); } WRITE_LINE_MEMBER( spinb_state::vck_m_w ) { m_ic5m->clock_w(0); m_ic5m->clock_w(1); +} +void spinb_state::update_sound_m() +{ if (m_sndbank_m != 0xff) - { - if (!m_pc0m) - m_msm_m->data_w(m_p_music[m_sound_addr_m] & 15); - else - m_msm_m->data_w(m_p_music[m_sound_addr_m] >> 4); - } + m_ic14m->ab_w(m_p_music[m_sound_addr_m]); else - m_msm_m->data_w(0); + m_ic14m->ab_w(0); } WRITE_LINE_MEMBER( spinb_state::ic5a_w ) { m_pc0a = state; m_ic5a->d_w(state); + m_ic14a->select_w(state); } WRITE_LINE_MEMBER( spinb_state::ic5m_w ) { m_pc0m = state; m_ic5m->d_w(state); + m_ic14m->select_w(state); } READ8_MEMBER( spinb_state::ppia_c_r ) @@ -479,21 +488,25 @@ READ8_MEMBER( spinb_state::ppim_c_r ) WRITE8_MEMBER( spinb_state::ppia_b_w ) { m_sound_addr_a = (m_sound_addr_a & 0xffff00) | data; + update_sound_a(); } WRITE8_MEMBER( spinb_state::ppim_b_w ) { m_sound_addr_m = (m_sound_addr_m & 0xffff00) | data; + update_sound_m(); } WRITE8_MEMBER( spinb_state::ppia_a_w ) { m_sound_addr_a = (m_sound_addr_a & 0xff00ff) | (data << 8); + update_sound_a(); } WRITE8_MEMBER( spinb_state::ppim_a_w ) { m_sound_addr_m = (m_sound_addr_m & 0xff00ff) | (data << 8); + update_sound_m(); } WRITE8_MEMBER( spinb_state::ppia_c_w ) @@ -523,6 +536,8 @@ void spinb_state::machine_reset() m_sndbank_a = 0xff; m_sndbank_m = 0xff; m_row = 0; + update_sound_a(); + update_sound_m(); } void spinb_state::machine_start() @@ -703,8 +718,14 @@ static MACHINE_CONFIG_START( spinb, spinb_state ) MCFG_DEVICE_ADD("ic5a", TTL7474, 0) MCFG_7474_COMP_OUTPUT_CB(WRITELINE(spinb_state, ic5a_w)) + MCFG_DEVICE_ADD("ic14a", HCT157, 0) + MCFG_74157_OUT_CB(DEVWRITE8("msm_a", msm5205_device, data_w)) + MCFG_DEVICE_ADD("ic5m", TTL7474, 0) MCFG_7474_COMP_OUTPUT_CB(WRITELINE(spinb_state, ic5m_w)) + + MCFG_DEVICE_ADD("ic14m", HCT157, 0) + MCFG_74157_OUT_CB(DEVWRITE8("msm_m", msm5205_device, data_w)) MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( vrnwrld, spinb ) diff --git a/src/mame/drivers/system1.cpp b/src/mame/drivers/system1.cpp index 18724cfffb0..2322dd300f4 100644 --- a/src/mame/drivers/system1.cpp +++ b/src/mame/drivers/system1.cpp @@ -2805,6 +2805,28 @@ ROM_START( flicky ) ROM_LOAD( "pr-5317.76", 0x0000, 0x0100, CRC(648350b8) SHA1(c7986aa9127ef5b50b845434cb4e81dff9861cd2) ) ROM_END +// PCB label: 834-5411-11 FLICKY +ROM_START( flickya ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "epr5978a.116", 0x0000, 0x4000, CRC(296f1492) SHA1(52e2c63ce376ab8124b2c68bdfa432b6621cfa78) ) /* encrypted */ + ROM_LOAD( "epr5979a.109", 0x4000, 0x4000, CRC(64b03ef9) SHA1(7519aa7f036bce6d52a5d4be2418139559f9a8a5) ) /* encrypted */ + + ROM_REGION( 0x10000, "soundcpu", 0 ) + ROM_LOAD( "epr-5869.120", 0x0000, 0x2000, CRC(6d220d4e) SHA1(fe02a7a94a1ad046fc775a7f67f460c8d0f6dca6) ) + + ROM_REGION( 0xc000, "tiles", 0 ) + ROM_LOAD( "epr-6001.62", 0x0000, 0x4000, CRC(f1a75200) SHA1(47e57b5dbd687d0fa91de91f35f199e88d5a5d99) ) + ROM_LOAD( "epr-6000.64", 0x4000, 0x4000, CRC(299aefb7) SHA1(d0301f0bf706807891845f090e4e1f1c38dbbd54) ) + ROM_LOAD( "epr-5999.66", 0x8000, 0x4000, CRC(1ca53157) SHA1(46b4b9dac3f0506edc3957cee768e41c4754b0f4) ) + + ROM_REGION( 0x8000, "sprites", 0 ) + ROM_LOAD( "epr-5855.117", 0x0000, 0x4000, CRC(b5f894a1) SHA1(2c72dc16739dad155fcd572e1add067a7647f5bd) ) + ROM_LOAD( "epr-5856.110", 0x4000, 0x4000, CRC(266af78f) SHA1(dcbfce550d10a1f2b3ce3e7e081fc008cb575708) ) + + ROM_REGION( 0x0100, "proms", 0 ) + ROM_LOAD( "pr-5317.76", 0x0000, 0x0100, CRC(648350b8) SHA1(c7986aa9127ef5b50b845434cb4e81dff9861cd2) ) +ROM_END + ROM_START( flickys2 ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "epr-6621.bin", 0x0000, 0x4000, CRC(b21ff546) SHA1(e1d5438eaf0efeaeb4687dcfc12bf325e804182f) ) @@ -5359,8 +5381,8 @@ GAME( 1983, regulusu, regulus, sys1ppi, regulus, system1_state, b GAME( 1984, mrviking, 0, sys1ppisx_315_5041,mrviking, system1_state, bank00, ROT270, "Sega", "Mister Viking (315-5041)", MACHINE_SUPPORTS_SAVE ) GAME( 1984, mrvikingj, mrviking, sys1ppisx_315_5041,mrvikingj, system1_state, bank00, ROT270, "Sega", "Mister Viking (315-5041, Japan)", MACHINE_SUPPORTS_SAVE ) GAME( 1984, swat, 0, sys1ppix_315_5048, swat, system1_state, bank00, ROT270, "Coreland / Sega", "SWAT (315-5048)", MACHINE_SUPPORTS_SAVE ) -GAME( 1984, flickyo, flicky, sys1ppix_315_5051, flicky, system1_state, bank00, ROT0, "Sega", "Flicky (64k Version, System 1, 315-5051, set 1)", MACHINE_SUPPORTS_SAVE ) -GAME( 1984, flickys1, flicky, sys1ppix_315_5051, flickys1, system1_state, bank00, ROT0, "Sega", "Flicky (64k Version, System 1, 315-5051, set 2)", MACHINE_SUPPORTS_SAVE ) +GAME( 1984, flickyo, flicky, sys1ppix_315_5051, flicky, system1_state, bank00, ROT0, "Sega", "Flicky (64k Version, 315-5051, set 1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1984, flickys1, flicky, sys1ppix_315_5051, flickys1, system1_state, bank00, ROT0, "Sega", "Flicky (64k Version, 315-5051, set 2)", MACHINE_SUPPORTS_SAVE ) GAME( 1984, wmatch, 0, sys1ppisx_315_5064,wmatch, system1_state, bank00, ROT270, "Sega", "Water Match (315-5064)", MACHINE_SUPPORTS_SAVE ) GAME( 1984, bullfgt, 0, sys1ppix_315_5065, bullfgt, system1_state, bank00, ROT0, "Coreland / Sega", "Bullfight (315-5065)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, nprinces, seganinj, sys1ppix_315_5051, seganinj, system1_state, bank00, ROT0, "bootleg?", "Ninja Princess (315-5051, 64k Ver. bootleg?)", MACHINE_SUPPORTS_SAVE ) @@ -5372,8 +5394,9 @@ GAME( 1986, nob, 0, nobm, nob, system1_state, n GAME( 1986, nobb, nob, nob, nob, system1_state, nobb, ROT270, "bootleg (Game Electronics)", "Noboranka (Japan, bootleg)", MACHINE_SUPPORTS_SAVE ) /* PIO-based System 1 */ -GAME( 1984, flicky, 0, sys1piox_315_5051, flicky, system1_state, bank00, ROT0, "Sega", "Flicky (128k Version, System 2, 315-5051)", MACHINE_SUPPORTS_SAVE ) -GAME( 1984, flickys2, flicky, sys1pio, flickys2, system1_state, bank00, ROT0, "Sega", "Flicky (128k Version, System 2, not encrypted)", MACHINE_SUPPORTS_SAVE ) +GAME( 1984, flicky, 0, sys1piox_315_5051, flicky, system1_state, bank00, ROT0, "Sega", "Flicky (128k Version, 315-5051)", MACHINE_SUPPORTS_SAVE ) +GAME( 1984, flickya, flicky, sys1piox_315_5051, flicky, system1_state, bank00, ROT0, "Sega", "Flicky (128k Version, 315-5051, larger roms)", MACHINE_SUPPORTS_SAVE ) +GAME( 1984, flickys2, flicky, sys1pio, flickys2, system1_state, bank00, ROT0, "Sega", "Flicky (128k Version, not encrypted)", MACHINE_SUPPORTS_SAVE ) GAME( 1984, thetogyu, bullfgt, sys1piox_315_5065, bullfgt, system1_state, bank00, ROT0, "Coreland / Sega", "The Togyu (315-5065, Japan)", MACHINE_SUPPORTS_SAVE ) GAME( 1984, spatter, 0, sys1piosx_315_spat,spatter, system1_state, bank00, ROT0, "Sega", "Spatter (315-xxxx)", MACHINE_SUPPORTS_SAVE ) GAME( 1984, spattera, spatter, sys1piosx_315_5099,spatter, system1_state, bank00, ROT0, "Sega", "Spatter (315-5099)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/tosh1000.cpp b/src/mame/drivers/tosh1000.cpp new file mode 100644 index 00000000000..376241770ab --- /dev/null +++ b/src/mame/drivers/tosh1000.cpp @@ -0,0 +1,136 @@ +// license:BSD-3-Clause +// copyright-holders:Sergey Svishchev +/*************************************************************************** + + Toshiba T1000 portable + + 80C88 CPU @ 5 MHz [OKI MSM80C88A-10GS-K (56 pin PQFP)] + 512KB RAM + 16KB video RAM + 32KB BIOS ROM [Toshiba TC54256AD] + 256KB MS-DOS 2.11 ROM [Toshiba TC534000] + SuperIO chip (Toshiba T7885) = 82C84 + 82C88 + 82C59 + upd765 + 82C53 + 82C37 + 82C55 + Real Time Clock chip: TC8521 + Keyboard controller: 80C50 + RS232C controller: 8250 + + NB: dumps of ROM-DOS and CGA chargen are missing. + +***************************************************************************/ + + +#include "emu.h" + +#include "machine/genpc.h" +#include "bus/isa/isa_cards.h" +#include "bus/pc_kbd/keyboards.h" +#include "cpu/i86/i86.h" +#include "machine/bankdev.h" +#include "machine/ram.h" +#include "machine/rp5c01.h" +#include "softlist.h" + + +#define VERBOSE_DBG 1 /* general debug messages */ + +#define DBG_LOG(N,M,A) \ + do { \ + if(VERBOSE_DBG>=N) \ + { \ + if( M ) \ + logerror("%11.6f at %s: %-10s",machine().time().as_double(),machine().describe_context(),(char*)M ); \ + logerror A; \ + } \ + } while (0) + + + +class tosh1000_state : public driver_device +{ +public: + tosh1000_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_bankdev(*this, "romdos") + { } + + DECLARE_MACHINE_RESET(tosh1000); + DECLARE_DRIVER_INIT(tosh1000); + +protected: + required_device<cpu_device> m_maincpu; + optional_device<address_map_bank_device> m_bankdev; +}; + + +DRIVER_INIT_MEMBER( tosh1000_state, tosh1000 ) +{ +} + +MACHINE_RESET_MEMBER( tosh1000_state, tosh1000 ) +{ +} + + +static ADDRESS_MAP_START( tosh1000_map, AS_PROGRAM, 8, tosh1000_state ) + ADDRESS_MAP_UNMAP_HIGH + AM_RANGE(0xa0000, 0xaffff) AM_NOP // AM_DEVREADWRITE("romdos", address_map_bank_device, read8, write8) + AM_RANGE(0xf0000, 0xfffff) AM_ROM AM_REGION("bios", 0) +ADDRESS_MAP_END + +static ADDRESS_MAP_START( tosh1000_io, AS_IO, 8, tosh1000_state ) + ADDRESS_MAP_UNMAP_HIGH + AM_RANGE(0x0000, 0x00ff) AM_DEVICE("mb", ibm5160_mb_device, map) + AM_RANGE(0x00c8, 0x00c8) AM_NOP // ROM-DOS page select [p. B-15] + AM_RANGE(0x00e0, 0x00ef) AM_NOP // ??? + AM_RANGE(0x02c0, 0x02cf) AM_DEVREADWRITE("rtc", rp5c01_device, read, write) +ADDRESS_MAP_END + + +static MACHINE_CONFIG_FRAGMENT( cfg_fdc_35 ) + MCFG_DEVICE_MODIFY("fdc:0") + MCFG_SLOT_DEFAULT_OPTION("35dd") + MCFG_SLOT_FIXED(true) + + MCFG_DEVICE_REMOVE("fdc:1") +MACHINE_CONFIG_END + +static MACHINE_CONFIG_START( tosh1000, tosh1000_state ) + MCFG_CPU_ADD("maincpu", I8088, XTAL_5MHz) + MCFG_CPU_PROGRAM_MAP(tosh1000_map) + MCFG_CPU_IO_MAP(tosh1000_io) + MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("mb:pic8259", pic8259_device, inta_cb) + + MCFG_MACHINE_RESET_OVERRIDE(tosh1000_state, tosh1000) + + MCFG_IBM5160_MOTHERBOARD_ADD("mb", "maincpu") + + MCFG_DEVICE_ADD("rtc", RP5C01, XTAL_32_768kHz) + + MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "cga", false) + MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", pc_isa8_cards, "fdc_xt", false) + MCFG_SLOT_OPTION_MACHINE_CONFIG("fdc_xt", cfg_fdc_35) + MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, "lpt", false) + MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, "com", false) + +// MCFG_SOFTWARE_LIST_ADD("flop_list","tosh1000") + + MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_KEYTRONIC_PC3270) + + MCFG_RAM_ADD(RAM_TAG) + MCFG_RAM_DEFAULT_SIZE("512K") +MACHINE_CONFIG_END + + +ROM_START( tosh1000 ) + ROM_REGION16_LE(0x20000,"bios", 0) + ROM_SYSTEM_BIOS(0, "v410", "V4.10") + ROMX_LOAD( "tosh1000bios410.bin", 0x8000, 0x8000, CRC(a854939f) SHA1(0ff532f295a40716f53949a2fd64d02bf76d575a), ROM_BIOS(1)) + + /* XXX IBM 1501981(CGA) and 1501985(MDA) Character rom */ + ROM_REGION(0x2000,"gfx1", 0) + ROM_LOAD("5788005.u33", 0x00000, 0x2000, CRC(0bf56d70) SHA1(c2a8b10808bf51a3c123ba3eb1e9dd608231916f)) /* "AMI 8412PI // 5788005 // (C) IBM CORP. 1981 // KOREA" */ +ROM_END + + +/* YEAR ROM NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */ +COMP ( 1987, tosh1000, ibm5150, 0, tosh1000, 0, tosh1000_state, tosh1000, "Toshiba", "Toshiba T1000", MACHINE_IS_SKELETON) diff --git a/src/mame/drivers/triforce.cpp b/src/mame/drivers/triforce.cpp index 58344e8ce15..b71dc1319a7 100644 --- a/src/mame/drivers/triforce.cpp +++ b/src/mame/drivers/triforce.cpp @@ -70,23 +70,23 @@ Games on this system include.... | | 2004 | Virtua Striker 4 (Export) | Sega | GDROM | GDT-0014 | | | |*| 2004 | Virtua Striker 4 (Export) | Sega | GDROM | GDT-0015 | 317-0393-EXP | | | | 2004 | Virtua Striker 4 (Export) | Sega | CF | MDA-G0016 | 317-0393-EXP | | -| | 2004 | The Key Of Avalon 2: Eutaxy Commandment (server) | Sega / Hitmaker | GDROM | GDT-0016 | | | -| | 2004 | The Key Of Avalon 2: Eutaxy Commandment (client) | Sega / Hitmaker | GDROM | GDT-0017 | | | -| | 2004 | The Key Of Avalon 2: Eutaxy Commandment (client) (Rev A) | Sega / Hitmaker | GDROM | GDT-0017A | | | -|*| 2004 | The Key Of Avalon 2: Eutaxy Commandment (client) (Rev B) | Sega / Hitmaker | GDROM | GDT-0017B | | | +| | 2004 | The Key Of Avalon 2: Eutaxy Commandment (server) | Sega / Hitmaker | GDROM | GDT-0016 | 317-0403-JPN | 253-5508-0403J| +| | 2004 | The Key Of Avalon 2: Eutaxy Commandment (client) | Sega / Hitmaker | GDROM | GDT-0017 | 317-0403-JPN | 253-5508-0403J| +| | 2004 | The Key Of Avalon 2: Eutaxy Commandment (client) (Rev A) | Sega / Hitmaker | GDROM | GDT-0017A | 317-0403-JPN | 253-5508-0403J| +|*| 2004 | The Key Of Avalon 2: Eutaxy Commandment (client) (Rev B) | Sega / Hitmaker | GDROM | GDT-0017B | 317-0403-JPN | 253-5508-0403J| | | 2004 | F-Zero AX - Monster Ride Cycraft Edition | Sega / Amusement Vision / Nintendo | GDROM | | | | | | 2005 | Donkey Kong Jungle Fever | Namco / Nintendo | Cart | | | | |*| 2005 | Mario Kart Arcade GP (Japan, MKA1 Ver.A1) | Namco / Nintendo | Cart | 837-14343-4T1 |!317-5109-COM | 253-5509-5109 | -| | 2005 | The Key Of Avalon 2.5: War of the Key (server) | Sega / Hitmaker | GDROM | GDT-0018 | | | -| | 2005 | The Key Of Avalon 2.5: War of the Key (server) (Rev A) | Sega / Hitmaker | GDROM | GDT-0018A | | | -|*| 2005 | The Key Of Avalon 2.5: War of the Key (server) (Rev B) | Sega / Hitmaker | GDROM | GDT-0018B | | | -| | 2005 | The Key Of Avalon 2.5: War of the Key (client) | Sega / Hitmaker | GDROM | GDT-0019 | | | -| | 2005 | The Key Of Avalon 2.5: War of the Key (client) (Rev A) | Sega / Hitmaker | GDROM | GDT-0019A | | | -|*| 2005 | The Key Of Avalon 2.5: War of the Key (client) (Rev B) | Sega / Hitmaker | GDROM | GDT-0019B | | | -| | 2006 | Virtua Striker 4 Ver.2006 (Japan) | Sega | GDROM | GDT-0020 | | | -| | 2006 | Virtua Striker 4 Ver.2006 (Japan) (Rev A) | Sega | GDROM | GDT-0020A | | | -| | 2006 | Virtua Striker 4 Ver.2006 (Japan) (Rev B) | Sega | GDROM | GDT-0020B | | | -| | 2006 | Virtua Striker 4 Ver.2006 (Japan) (Rev C) | Sega | GDROM | GDT-0020C | | | +| | 2005 | The Key Of Avalon 2.5: War of the Key (server) | Sega / Hitmaker | GDROM | GDT-0018 | 317-0403-JPN | 253-5508-0403J| +| | 2005 | The Key Of Avalon 2.5: War of the Key (server) (Rev A) | Sega / Hitmaker | GDROM | GDT-0018A | 317-0403-JPN | 253-5508-0403J| +|*| 2005 | The Key Of Avalon 2.5: War of the Key (server) (Rev B) | Sega / Hitmaker | GDROM | GDT-0018B | 317-0403-JPN | 253-5508-0403J| +| | 2005 | The Key Of Avalon 2.5: War of the Key (client) | Sega / Hitmaker | GDROM | GDT-0019 | 317-0403-JPN | 253-5508-0403J| +| | 2005 | The Key Of Avalon 2.5: War of the Key (client) (Rev A) | Sega / Hitmaker | GDROM | GDT-0019A | 317-0403-JPN | 253-5508-0403J| +|*| 2005 | The Key Of Avalon 2.5: War of the Key (client) (Rev B) | Sega / Hitmaker | GDROM | GDT-0019B | 317-0403-JPN | 253-5508-0403J| +| | 2006 | Virtua Striker 4 Ver.2006 (Japan) | Sega | GDROM | GDT-0020 | 317-0432-JPN | 253-5508-0432J| +| | 2006 | Virtua Striker 4 Ver.2006 (Japan) (Rev A) | Sega | GDROM | GDT-0020A | 317-0432-JPN | 253-5508-0432J| +| | 2006 | Virtua Striker 4 Ver.2006 (Japan) (Rev B) | Sega | GDROM | GDT-0020B | 317-0432-JPN | 253-5508-0432J| +| | 2006 | Virtua Striker 4 Ver.2006 (Japan) (Rev C) | Sega | GDROM | GDT-0020C | 317-0432-JPN | 253-5508-0432J| |*| 2006 | Virtua Striker 4 Ver.2006 (Japan) (Rev D) | Sega | GDROM | GDT-0020D | 317-0432-JPN | 253-5508-0432J| |*| 2006 | Virtua Striker 4 Ver.2006 (Export) | Sega | GDROM | GDT-0021 | 317-0433-EXP | 253-5508-0433E| | | 2006 | Virtua Striker 4 Ver.2006 (Export) | Sega | CF | MDA-G00?? | 317-0433-EXP | 253-5508-0433E| @@ -915,7 +915,7 @@ ROM_START( avalon20 ) DISK_IMAGE_READONLY( "gdt-0017b", 0, BAD_DUMP SHA1(e2dd32c322ffcaf38b82275d2721b71bb3dfc1f2) ) ROM_REGION( 0x50, "pic", ROMREGION_ERASE) - ROM_LOAD("avalon2x.data", 0x00, 0x50, CRC(c5071ada) SHA1(70018180b917beec1b2c272f9125fa43fd1a7b00) ) + ROM_LOAD("317-0403-jpn.data", 0x00, 0x50, CRC(c5071ada) SHA1(70018180b917beec1b2c272f9125fa43fd1a7b00) ) ROM_END ROM_START( avalns25 ) @@ -925,7 +925,7 @@ ROM_START( avalns25 ) DISK_IMAGE_READONLY( "gdt-0018b", 0, SHA1(4cd10813e66b72021ca344886638025f979d40c0) ) ROM_REGION( 0x50, "pic", ROMREGION_ERASE) - ROM_LOAD("avalon2x.data", 0x00, 0x50, CRC(c5071ada) SHA1(70018180b917beec1b2c272f9125fa43fd1a7b00) ) + ROM_LOAD("317-0403-jpn.data", 0x00, 0x50, CRC(c5071ada) SHA1(70018180b917beec1b2c272f9125fa43fd1a7b00) ) ROM_END ROM_START( avalnc25 ) @@ -935,7 +935,7 @@ ROM_START( avalnc25 ) DISK_IMAGE_READONLY( "gdt-0019b", 0, SHA1(7f978ec998a86ed9c36a495bfa72073c6d2bbe31) ) ROM_REGION( 0x50, "pic", ROMREGION_ERASE) - ROM_LOAD("avalon2x.data", 0x00, 0x50, CRC(c5071ada) SHA1(70018180b917beec1b2c272f9125fa43fd1a7b00) ) + ROM_LOAD("317-0403-jpn.data", 0x00, 0x50, CRC(c5071ada) SHA1(70018180b917beec1b2c272f9125fa43fd1a7b00) ) ROM_END ROM_START( vs42006 ) @@ -945,7 +945,7 @@ ROM_START( vs42006 ) DISK_IMAGE_READONLY( "gdt-0020d", 0, BAD_DUMP SHA1(db256d094b9754d452d7a2b8a370699d21141c1f) ) ROM_REGION( 0x50, "pic", ROMREGION_ERASE) - ROM_LOAD("gdt-0020.data", 0x00, 0x50, CRC(e3d13191) SHA1(4255c09aad06eb38c16bdec881897404a3a68b37) ) + ROM_LOAD("317-0432-jpn.data", 0x00, 0x50, CRC(e3d13191) SHA1(4255c09aad06eb38c16bdec881897404a3a68b37) ) ROM_END /* diff --git a/src/mame/drivers/yunsung8.cpp b/src/mame/drivers/yunsung8.cpp index d5e4ac0ccd4..22ea8b11633 100644 --- a/src/mame/drivers/yunsung8.cpp +++ b/src/mame/drivers/yunsung8.cpp @@ -377,7 +377,7 @@ static MACHINE_CONFIG_START( yunsung8, yunsung8_state ) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0) MCFG_DEVICE_ADD("adpcm_select", LS157, 0) - MCFG_74LS157_OUT_CB(DEVWRITE8("msm", msm5205_device, data_w)) + MCFG_74157_OUT_CB(DEVWRITE8("msm", msm5205_device, data_w)) MCFG_SOUND_ADD("msm", MSM5205, XTAL_400kHz) /* verified on pcb */ MCFG_MSM5205_VCLK_CB(WRITELINE(yunsung8_state, adpcm_int)) /* interrupt function */ diff --git a/src/mame/drivers/zwackery.cpp b/src/mame/drivers/zwackery.cpp new file mode 100644 index 00000000000..930be6b1cf8 --- /dev/null +++ b/src/mame/drivers/zwackery.cpp @@ -0,0 +1,618 @@ +// license: BSD-3-Clause +// copyright-holders: Aaron Giles, Bryan McPhail +/*************************************************************************** + + Zwackery + + © 1984 Midway + + The hardware consists of the following boards: + - Venus CPU (B084-91668-A385) + - Venus Video (B084-91675-A385) + - Venus Background (B084-91672-A385) + - Artificial Artist (B084-91671-A385) + + TODO: + - Accurate screen timings + +***************************************************************************/ + +#include "emu.h" +#include "cpu/m68000/m68000.h" +#include "machine/6821pia.h" +#include "machine/6840ptm.h" +#include "machine/watchdog.h" +#include "audio/midway.h" + + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +class zwackery_state : public driver_device +{ +public: + zwackery_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_pia0(*this, "pia0"), + m_pia1(*this, "pia1"), + m_pia2(*this, "pia2"), + m_ptm(*this, "ptm"), + m_watchdog(*this, "watchdog"), + m_screen(*this, "screen"), + m_gfxdecode(*this, "gfxdecode"), + m_videoram(*this, "videoram"), + m_chip_squeak_deluxe(*this, "csd"), + m_bg_tilemap(nullptr), + m_fg_tilemap(nullptr), + m_sound_data(0) + { } + + DECLARE_VIDEO_START(zwackery); + TIMER_DEVICE_CALLBACK_MEMBER(scanline_cb); + DECLARE_WRITE16_MEMBER(videoram_w); + DECLARE_READ8_MEMBER(spriteram_r); + DECLARE_WRITE8_MEMBER(spriteram_w); + void update_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int priority); + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + TILE_GET_INFO_MEMBER(get_bg_tile_info); + TILE_GET_INFO_MEMBER(get_fg_tile_info); + + DECLARE_WRITE8_MEMBER(pia0_porta_w); + DECLARE_WRITE_LINE_MEMBER(pia0_irq_w); + DECLARE_READ8_MEMBER(pia1_porta_r); + DECLARE_WRITE8_MEMBER(pia1_porta_w); + DECLARE_READ8_MEMBER(pia1_portb_r); + DECLARE_WRITE_LINE_MEMBER(pia1_ca2_w); + DECLARE_READ8_MEMBER(pia2_porta_r); + + DECLARE_READ8_MEMBER(ptm_r); + +protected: + virtual void machine_start() override; + +private: + required_device<m68000_device> m_maincpu; + required_device<pia6821_device> m_pia0; + required_device<pia6821_device> m_pia1; + required_device<pia6821_device> m_pia2; + required_device<ptm6840_device> m_ptm; + required_device<watchdog_timer_device> m_watchdog; + required_device<screen_device> m_screen; + required_device<gfxdecode_device> m_gfxdecode; + required_shared_ptr<uint16_t> m_videoram; + required_device<midway_chip_squeak_deluxe_device> m_chip_squeak_deluxe; + + tilemap_t *m_bg_tilemap; + tilemap_t *m_fg_tilemap; + + std::unique_ptr<uint8_t[]> m_spriteram; + std::unique_ptr<uint8_t[]> m_srcdata0; + std::unique_ptr<uint8_t[]> m_srcdata2; + + uint8_t m_sound_data; +}; + + +//************************************************************************** +// ADDRESS MAPS +//************************************************************************** + +static ADDRESS_MAP_START( zwackery_map, AS_PROGRAM, 16, zwackery_state ) + ADDRESS_MAP_UNMAP_HIGH + AM_RANGE(0x000000, 0x037fff) AM_ROM + AM_RANGE(0x080000, 0x080fff) AM_RAM + AM_RANGE(0x084000, 0x084fff) AM_RAM + AM_RANGE(0x100000, 0x10000f) AM_READ8(ptm_r, 0xff00) AM_DEVWRITE8("ptm", ptm6840_device, write, 0xff00) + AM_RANGE(0x104000, 0x104007) AM_DEVREADWRITE8("pia0", pia6821_device, read, write, 0xff00) + AM_RANGE(0x108000, 0x108007) AM_DEVREADWRITE8("pia1", pia6821_device, read, write, 0x00ff) + AM_RANGE(0x10c000, 0x10c007) AM_DEVREADWRITE8("pia2", pia6821_device, read, write, 0x00ff) + AM_RANGE(0x800000, 0x800fff) AM_RAM_WRITE(videoram_w) AM_SHARE("videoram") + AM_RANGE(0x802000, 0x803fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") + AM_RANGE(0xc00000, 0xc00fff) AM_READWRITE8(spriteram_r, spriteram_w, 0x00ff) +ADDRESS_MAP_END + + +//************************************************************************** +// INPUTS +//************************************************************************** + +static INPUT_PORTS_START( zwackery ) + PORT_START("IN0") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_SERVICE( 0x0010, IP_ACTIVE_LOW ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_TILT ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Sword") + + PORT_START("IN1") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY + PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_SPECIAL ) // sound communications + + PORT_START("IN2") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Spell Up") + PORT_BIT( 0x3e, IP_ACTIVE_HIGH, IPT_UNUSED ) // encoder wheel + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Shield") + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Spell Down") + + PORT_START("IN3") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("DSW") + PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2,3") + PORT_DIPSETTING( 0x05, DEF_STR( 6C_1C ) ) + PORT_DIPSETTING( 0x04, DEF_STR( 5C_1C ) ) + PORT_DIPSETTING( 0x03, DEF_STR( 4C_1C ) ) + PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) ) + PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x06, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x07, DEF_STR( Free_Play ) ) + PORT_DIPNAME( 0x38, 0x00, "Buy-in" ) PORT_DIPLOCATION("SW1:4,5,6") + PORT_DIPSETTING( 0x00, "1 coin" ) + PORT_DIPSETTING( 0x08, "2 coins" ) + PORT_DIPSETTING( 0x10, "3 coins" ) + PORT_DIPSETTING( 0x18, "4 coins" ) + PORT_DIPSETTING( 0x20, "5 coins" ) + PORT_DIPSETTING( 0x28, "6 coins" ) + PORT_DIPSETTING( 0x30, "7 coins" ) + PORT_DIPSETTING( 0x38, DEF_STR( None ) ) + PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7,8") + PORT_DIPSETTING( 0xc0, DEF_STR( Easier ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Normal ) ) + PORT_DIPSETTING( 0x40, DEF_STR( Harder ) ) + PORT_DIPSETTING( 0x80, DEF_STR( Hardest ) ) + + PORT_START("IN5") + PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_CODE_DEC(KEYCODE_Z) PORT_CODE_INC(KEYCODE_X) PORT_REVERSE +INPUT_PORTS_END + + +//************************************************************************** +// VIDEO EMULATION +//************************************************************************** + +VIDEO_START_MEMBER( zwackery_state, zwackery ) +{ + const uint8_t *colordatabase = (const uint8_t *)memregion("bg_color")->base(); + gfx_element *gfx0 = m_gfxdecode->gfx(0); + gfx_element *gfx2 = m_gfxdecode->gfx(2); + + // initialize the background tilemap + m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(zwackery_state::get_bg_tile_info),this), TILEMAP_SCAN_ROWS, 16,16, 32,32); + + // initialize the foreground tilemap + m_fg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(zwackery_state::get_fg_tile_info),this), TILEMAP_SCAN_ROWS, 16,16, 32,32); + m_fg_tilemap->set_transparent_pen(0); + + // allocate memory for the assembled gfx data + m_srcdata0 = std::make_unique<uint8_t[]>(gfx0->elements() * gfx0->width() * gfx0->height()); + m_srcdata2 = std::make_unique<uint8_t[]>(gfx2->elements() * gfx2->width() * gfx2->height()); + + // "colorize" each code + uint8_t *dest0 = m_srcdata0.get(); + uint8_t *dest2 = m_srcdata2.get(); + for (int code = 0; code < gfx0->elements(); code++) + { + const uint8_t *coldata = colordatabase + code * 32; + const uint8_t *gfxdata0 = gfx0->get_data(code); + const uint8_t *gfxdata2 = gfx2->get_data(code); + + // assume 16 rows + for (int y = 0; y < 16; y++) + { + const uint8_t *gd0 = gfxdata0; + const uint8_t *gd2 = gfxdata2; + + // 16 columns + for (int x = 0; x < 16; x++, gd0++, gd2++) + { + int coloffs = (y & 0x0c) | ((x >> 2) & 0x03); + int pen0 = coldata[coloffs * 2 + 0]; + int pen1 = coldata[coloffs * 2 + 1]; + int tp0, tp1; + + // every 4 pixels gets its own foreground/background colors + *dest0++ = *gd0 ? pen1 : pen0; + + // for gfx 2, we convert all low-priority pens to 0 + tp0 = (pen0 & 0x80) ? pen0 : 0; + tp1 = (pen1 & 0x80) ? pen1 : 0; + *dest2++ = *gd2 ? tp1 : tp0; + } + + // advance + gfxdata0 += gfx0->rowbytes(); + gfxdata2 += gfx2->rowbytes(); + } + } + + // make the assembled data our new source data + gfx0->set_raw_layout(m_srcdata0.get(), gfx0->width(), gfx0->height(), gfx0->elements(), 8 * gfx0->width(), 8 * gfx0->width() * gfx0->height()); + gfx2->set_raw_layout(m_srcdata2.get(), gfx2->width(), gfx2->height(), gfx2->elements(), 8 * gfx2->width(), 8 * gfx2->width() * gfx2->height()); +} + +TIMER_DEVICE_CALLBACK_MEMBER( zwackery_state::scanline_cb ) +{ + switch (param) + { + case 0: + // VSYNC + m_ptm->set_c1(0); + m_ptm->set_c1(1); + break; + + case 474: + // source of this signal is pal.d3 (current value taken from original driver) + m_pia0->ca1_w(1); + break; + + case 475: + // turn it off again after one scanline + m_pia0->ca1_w(0); + break; + } + + // HSYNC + m_ptm->set_c3(0); + m_ptm->set_c3(1); +} + +WRITE16_MEMBER( zwackery_state::videoram_w ) +{ + COMBINE_DATA(&m_videoram[offset]); + m_bg_tilemap->mark_tile_dirty(offset); + m_fg_tilemap->mark_tile_dirty(offset); +} + +READ8_MEMBER( zwackery_state::spriteram_r ) +{ + return m_spriteram[offset]; +} + +WRITE8_MEMBER( zwackery_state::spriteram_w ) +{ + m_spriteram[offset] = data; +} + +void zwackery_state::update_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int priority) +{ + screen.priority().fill(1, cliprect); + + // loop over sprite RAM + for (int offs = 0x800 - 4; offs >= 0; offs -= 4) + { + int code, color, flipx, flipy, x, y, flags; + + // get the code and skip if zero + code = m_spriteram[offs + 2]; + if (code == 0) + continue; + + // extract the flag bits and determine the color + flags = m_spriteram[offs + 1]; + color = ((~flags >> 2) & 0x0f) | ((flags & 0x02) << 3); + + // for low priority, draw everything but color 7 + if (!priority) + { + if (color == 7) + continue; + } + + // for high priority, only draw color 7 + else + { + if (color != 7) + continue; + } + + // determine flipping and coordinates + flipx = ~flags & 0x40; + flipy = flags & 0x80; + x = (231 - m_spriteram[offs + 3]) * 2; + y = (241 - m_spriteram[offs]) * 2; + + if (x <= -32) x += 512; + + // sprites use color 0 for background pen and 8 for the 'under tile' pen. + // The color 8 is used to cover over other sprites. + + // first draw the sprite, visible + m_gfxdecode->gfx(1)->prio_transmask(bitmap,cliprect, code, color, flipx, flipy, x, y, + screen.priority(), 0x00, 0x0101); + + // then draw the mask, behind the background but obscuring following sprites + m_gfxdecode->gfx(1)->prio_transmask(bitmap,cliprect, code, color, flipx, flipy, x, y, + screen.priority(), 0x02, 0xfeff); + } +} + +uint32_t zwackery_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + // draw the background + m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0); + + // draw the low-priority sprites + update_sprites(screen, bitmap, cliprect, 0); + + // redraw tiles with priority over sprites + m_fg_tilemap->draw(screen, bitmap, cliprect, 1, 0); + + // draw the high-priority sprites + update_sprites(screen, bitmap, cliprect, 1); + + return 0; +} + +TILE_GET_INFO_MEMBER( zwackery_state::get_bg_tile_info ) +{ + uint16_t data = m_videoram[tile_index]; + int color = (data >> 13) & 7; + SET_TILE_INFO_MEMBER(0, data & 0x3ff, color, TILE_FLIPYX(data >> 11)); +} + +TILE_GET_INFO_MEMBER( zwackery_state::get_fg_tile_info ) +{ + uint16_t data = m_videoram[tile_index]; + int color = (data >> 13) & 7; + SET_TILE_INFO_MEMBER(2, data & 0x3ff, color, TILE_FLIPYX(data >> 11)); + tileinfo.category = (color != 0); +} + +static const gfx_layout zwackery_layout = +{ + 16,16, + RGN_FRAC(1,2), + 8, + { 0, 0, 0, 0, 0, 0, 0, 0 }, + { STEP4(3,-1), STEP4(11,-1), STEP4(19,-1), STEP4(27,-1) }, + { 4, RGN_FRAC(1,2)+4, 0, RGN_FRAC(1,2)+0, 36, RGN_FRAC(1,2)+36, 32, RGN_FRAC(1,2)+32, + 68, RGN_FRAC(1,2)+68, 64, RGN_FRAC(1,2)+64, 100, RGN_FRAC(1,2)+100, 96, RGN_FRAC(1,2)+96 }, + 128 +}; + +static const gfx_layout mcr68_sprite_layout = +{ + 32,32, + RGN_FRAC(1,4), + 4, + { STEP4(0,1) }, + { STEP2(RGN_FRAC(0,4)+0,4), STEP2(RGN_FRAC(1,4)+0,4), STEP2(RGN_FRAC(2,4)+0,4), STEP2(RGN_FRAC(3,4)+0,4), + STEP2(RGN_FRAC(0,4)+8,4), STEP2(RGN_FRAC(1,4)+8,4), STEP2(RGN_FRAC(2,4)+8,4), STEP2(RGN_FRAC(3,4)+8,4), + STEP2(RGN_FRAC(0,4)+16,4), STEP2(RGN_FRAC(1,4)+16,4), STEP2(RGN_FRAC(2,4)+16,4), STEP2(RGN_FRAC(3,4)+16,4), + STEP2(RGN_FRAC(0,4)+24,4), STEP2(RGN_FRAC(1,4)+24,4), STEP2(RGN_FRAC(2,4)+24,4), STEP2(RGN_FRAC(3,4)+24,4) }, + { STEP32(0,32) }, + 32*32 +}; + +static GFXDECODE_START( zwackery ) + GFXDECODE_ENTRY( "gfx1", 0, zwackery_layout, 0, 16 ) + GFXDECODE_ENTRY( "sprites", 0, mcr68_sprite_layout, 0x800, 32 ) + GFXDECODE_ENTRY( "gfx1", 0, zwackery_layout, 0, 16 ) // yes, an extra copy +GFXDECODE_END + + +//************************************************************************** +// AUDIO +//************************************************************************** + +WRITE8_MEMBER( zwackery_state::pia1_porta_w ) +{ + m_sound_data = (data >> 4) & 0x0f; +} + +WRITE_LINE_MEMBER( zwackery_state::pia1_ca2_w ) +{ + m_chip_squeak_deluxe->write(machine().dummy_space(), 0, (state << 4) | m_sound_data); +} + + +//************************************************************************** +// INPUTS/OUTPUTS +//************************************************************************** + +WRITE8_MEMBER( zwackery_state::pia0_porta_w ) +{ + // bits 0, 1 and 2 control meters? + // bits 3 and 4 control coin counters? + // bits 5 and 6 control hflip/vflip + + // bit 7, watchdog + if (BIT(data, 7) == 0) + m_watchdog->watchdog_reset(); +} + +WRITE_LINE_MEMBER(zwackery_state::pia0_irq_w) +{ + int irq_state = m_pia0->irq_a_state() | m_pia0->irq_b_state(); + m_maincpu->set_input_line(5, irq_state ? ASSERT_LINE : CLEAR_LINE); +} + +READ8_MEMBER( zwackery_state::pia1_porta_r ) +{ + uint8_t data = ioport("IN1")->read(); + m_pia1->set_port_a_z_mask(data); + + return data; +} + +READ8_MEMBER( zwackery_state::pia1_portb_r ) +{ + uint8_t result = ioport("IN2")->read(); + uint8_t wheel = ioport("IN5")->read(); + + return result | ((wheel >> 2) & 0x3e); +} + +READ8_MEMBER( zwackery_state::pia2_porta_r ) +{ + uint8_t data = ioport("IN3")->read(); + m_pia2->set_port_a_z_mask(data); + + return data; +} + + +//************************************************************************** +// MACHINE EMULATION +//************************************************************************** + +// Zwackery does a timer test: +// It loads $1388 into one of the timers clocked by E +// Then it sits in a tight loop counting down from $4E4 +// BTST #$1,($2,A0) +// DBNE D1,*-6 +// It expects D1 to end up between 0 and 5; in order to +// make this happen, we must assume that reads from the +// 6840 take 14 additional cycles +READ8_MEMBER( zwackery_state::ptm_r ) +{ + space.device().execute().adjust_icount(-14); + return m_ptm->read(space, offset); +} + +void zwackery_state::machine_start() +{ + // allocate 8-bit spriteram + m_spriteram = std::make_unique<uint8_t[]>(0x800); + + // register for save states + save_pointer(NAME(m_spriteram.get()), 0x800); + save_item(NAME(m_sound_data)); +} + + +//************************************************************************** +// MACHINE DEFINTIONS +//************************************************************************** + +static MACHINE_CONFIG_START( zwackery, zwackery_state ) + // basic machine hardware + MCFG_CPU_ADD("maincpu", M68000, 7652400) // based on counter usage, should be XTAL_16MHz/2 + MCFG_CPU_PROGRAM_MAP(zwackery_map) + + MCFG_WATCHDOG_ADD("watchdog") + + MCFG_DEVICE_ADD("ptm", PTM6840, 7652400 / 10) + MCFG_PTM6840_IRQ_CB(INPUTLINE("maincpu", 6)) + + MCFG_DEVICE_ADD("pia0", PIA6821, 0) + MCFG_PIA_READPB_HANDLER(IOPORT("IN0")) + MCFG_PIA_WRITEPA_HANDLER(WRITE8(zwackery_state, pia0_porta_w)) + MCFG_PIA_IRQA_HANDLER(WRITELINE(zwackery_state, pia0_irq_w)) + MCFG_PIA_IRQB_HANDLER(WRITELINE(zwackery_state, pia0_irq_w)) + + MCFG_DEVICE_ADD("pia1", PIA6821, 0) + MCFG_PIA_READPA_HANDLER(READ8(zwackery_state, pia1_porta_r)) + MCFG_PIA_WRITEPA_HANDLER(WRITE8(zwackery_state, pia1_porta_w)) + MCFG_PIA_READPB_HANDLER(READ8(zwackery_state, pia1_portb_r)) + MCFG_PIA_CA2_HANDLER(WRITELINE(zwackery_state, pia1_ca2_w)) + + MCFG_DEVICE_ADD("pia2", PIA6821, 0) + MCFG_PIA_READPA_HANDLER(READ8(zwackery_state, pia2_porta_r)) + MCFG_PIA_READPB_HANDLER(IOPORT("DSW")) + + // video hardware + MCFG_SCREEN_ADD("screen", RASTER) + MCFG_SCREEN_REFRESH_RATE(30) + MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) // not accurate + MCFG_SCREEN_SIZE(32*16, 30*16) + MCFG_SCREEN_VISIBLE_AREA(0, 32*16-1, 0, 30*16-1) + MCFG_SCREEN_UPDATE_DRIVER(zwackery_state, screen_update) + MCFG_SCREEN_PALETTE("palette") + + MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", zwackery_state, scanline_cb, "screen", 0, 1) + + MCFG_GFXDECODE_ADD("gfxdecode", "palette", zwackery) + MCFG_PALETTE_ADD("palette", 4096) + MCFG_PALETTE_FORMAT(xRRRRRBBBBBGGGGG_inverted) + + MCFG_VIDEO_START_OVERRIDE(zwackery_state, zwackery) + + // sound hardware + MCFG_SPEAKER_STANDARD_MONO("speaker") + MCFG_SOUND_ADD("csd", MIDWAY_CHIP_SQUEAK_DELUXE, 0) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.0) +MACHINE_CONFIG_END + + +//************************************************************************** +// ROM DEFINITIONS +//************************************************************************** + +ROM_START( zwackery ) + ROM_REGION( 0x40000, "maincpu", 0 ) + ROM_LOAD16_BYTE( "pro0.bin", 0x00000, 0x4000, CRC(6fb9731c) SHA1(ee5b297ef2b4cf20df5e776f1c585b51f174bfa7) ) + ROM_LOAD16_BYTE( "pro1.bin", 0x00001, 0x4000, CRC(84b92555) SHA1(9b4af81374828c1742c1e13fc425eea2973b0867) ) + ROM_LOAD16_BYTE( "pro2.bin", 0x08000, 0x4000, CRC(e6977a2a) SHA1(602bf3f7e0f4080cb5b72d8fd3ee9fd11f27c558) ) + ROM_LOAD16_BYTE( "pro3.bin", 0x08001, 0x4000, CRC(f5d0a60e) SHA1(7e0e4936cb37ac16d6db5533ae4aecdfb07ead93) ) + ROM_LOAD16_BYTE( "pro4.bin", 0x10000, 0x4000, CRC(ec5841d9) SHA1(4bafe614e8993994b0ea9aedc8dc2474361e4594) ) + ROM_LOAD16_BYTE( "pro5.bin", 0x10001, 0x4000, CRC(d7d99ce0) SHA1(fdf428ab9c96dae555d49bac47495613ba265452) ) + ROM_LOAD16_BYTE( "pro6.bin", 0x18000, 0x4000, CRC(b9fe7bf5) SHA1(a94f80f49b4520a2c1098eee8983560b4ecdf3d5) ) + ROM_LOAD16_BYTE( "pro7.bin", 0x18001, 0x4000, CRC(5e261b3b) SHA1(dcf99f528c9e3b4f8b52d413c088559bfb37d733) ) + ROM_LOAD16_BYTE( "pro8.bin", 0x20000, 0x4000, CRC(55e380a5) SHA1(e3fef8486858cd714086449327a93b4a70ae73ff) ) + ROM_LOAD16_BYTE( "pro9.bin", 0x20001, 0x4000, CRC(12249dca) SHA1(154170286047ea78645d45dfdd895a597dad17da) ) + ROM_LOAD16_BYTE( "pro10.bin", 0x28000, 0x4000, CRC(6a39a8ca) SHA1(8ac9c3e60dc6f1918bfb95acf3ee170cedfb20ea) ) + ROM_LOAD16_BYTE( "pro11.bin", 0x28001, 0x4000, CRC(ad6b45bc) SHA1(118496e898654b028f008a3d493e693ba000ef38) ) + ROM_LOAD16_BYTE( "pro12.bin", 0x30000, 0x4000, CRC(e2d25e1f) SHA1(5d8ff303441eccf431422b453a173983a4513630) ) + ROM_LOAD16_BYTE( "pro13.bin", 0x30001, 0x4000, CRC(e131f9b8) SHA1(08b131f2acc84d4c2c931bfd24e7de3d92a8a817) ) + + ROM_REGION( 0x20000, "csd:cpu", 0 ) + ROM_LOAD16_BYTE( "csd7.bin", 0x00000, 0x2000, CRC(5501f54b) SHA1(84c0851fb868e81400cfe3ebfd7b91fe98a47bac) ) + ROM_LOAD16_BYTE( "csd17.bin", 0x00001, 0x2000, CRC(2e482580) SHA1(92bd3e64ff580800ee16579d97bcb8b3bd9f755c) ) + ROM_LOAD16_BYTE( "csd8.bin", 0x04000, 0x2000, CRC(13366575) SHA1(bcf25a7d4c6b2ccd7cd9978edafc66ef0cadfe72) ) + ROM_LOAD16_BYTE( "csd18.bin", 0x04001, 0x2000, CRC(bcfe5820) SHA1(ca32daa645851a2373b3cdb8a5e63ebda84aa762) ) + + ROM_REGION( 0x8000, "gfx1", ROMREGION_INVERT ) + ROM_LOAD( "tileh.bin", 0x00000, 0x4000, CRC(a7237eb1) SHA1(197e5838ac2bc732ae9eb33a9257b9391d50abf8) ) + ROM_LOAD( "tileg.bin", 0x04000, 0x4000, CRC(626cc69b) SHA1(86142bafa78f45d1a0bed0b83f3558b21384fa1a) ) + + ROM_REGION( 0x20000, "sprites", 0 ) + ROM_LOAD( "spr6h.bin", 0x00000, 0x4000, CRC(a51158dc) SHA1(8d3b0054950443fdf57f83dcb973d05f6c7ad9c8) ) + ROM_LOAD( "spr7h.bin", 0x04000, 0x4000, CRC(941feecf) SHA1(8e88c956332e78dc7e55139879f2272116415714) ) + ROM_LOAD( "spr6j.bin", 0x08000, 0x4000, CRC(f3eef316) SHA1(026e18bdfdda8cc9d0774e6d9d758686bf16992c) ) + ROM_LOAD( "spr7j.bin", 0x0c000, 0x4000, CRC(a8a34033) SHA1(abd9fde84bb079c84126ad04d584ec03b44b60cd) ) + ROM_LOAD( "spr10h.bin", 0x10000, 0x4000, CRC(a99daea6) SHA1(c323e05f398b7e9e04b75fd8ac5e8ab675236d66) ) + ROM_LOAD( "spr11h.bin", 0x14000, 0x4000, CRC(c1a767fb) SHA1(c16e09b39b09d409b534ce4c53366e43237a3759) ) + ROM_LOAD( "spr10j.bin", 0x18000, 0x4000, CRC(4dd04376) SHA1(069b64397e7a961c1fc246671472f759bd9f6c03) ) + ROM_LOAD( "spr11j.bin", 0x1c000, 0x4000, CRC(e8c6a880) SHA1(dd3d52ddbc36e244b96cfb87e6a80adb94626407) ) + + ROM_REGION( 0x8000, "bg_color", 0 ) + ROM_LOAD16_BYTE( "tilef.bin", 0x0000, 0x4000, CRC(a0dfcd7e) SHA1(0fc6723eddef2a96de9bf1f48006dd067c148540) ) + ROM_LOAD16_BYTE( "tilee.bin", 0x0001, 0x4000, CRC(ab504dc8) SHA1(4ebdcd42624e94c29ccdb8247bfff2d8e936ddd7) ) + + ROM_REGION( 0x000D, "plds", 0 ) + // located on the "Venus CPU" board + ROM_LOAD( "pal.d5", 0x0000, 0x00001, NO_DUMP ) // H-T + ROM_LOAD( "pal.d2", 0x0001, 0x00001, NO_DUMP ) // V-T + ROM_LOAD( "pal.d4", 0x0002, 0x00001, NO_DUMP ) // MISC V&H PAL + ROM_LOAD( "pal.d3", 0x0003, 0x00001, NO_DUMP ) // MISC CUSTOM PAL + ROM_LOAD( "pal.e6", 0x0004, 0x00001, NO_DUMP ) // CPU WTS PAL + ROM_LOAD( "pal.f8", 0x0005, 0x00001, NO_DUMP ) // CPU IOC PAL + ROM_LOAD( "pal.a5", 0x0006, 0x00001, NO_DUMP ) // CPU RMD PAL + // located on the "Venus VIDEO" board + ROM_LOAD( "pal.1f", 0x0007, 0x00001, NO_DUMP ) // PAL FGBDCD + ROM_LOAD( "pal.1d", 0x0008, 0x00001, NO_DUMP ) // PAL HCT + // located on the "Venus BACKGROUND" board + ROM_LOAD( "pal.1c", 0x0009, 0x00001, NO_DUMP ) // BGBPE PAL + ROM_LOAD( "pal.5c", 0x000a, 0x00001, NO_DUMP ) // HCT PAL + ROM_LOAD( "pal.5j", 0x000b, 0x00001, NO_DUMP ) // BGBDCD PAL + // located on the "Artificial Artist" board + ROM_LOAD( "pal20.u15", 0x000c, 0x00001, NO_DUMP ) // CSD002R0, pal type not specified */ +ROM_END + + +//************************************************************************** +// SYSTEM DRIVERS +//************************************************************************** + +// YEAR NAME PARENT MACHINE INPUT CLASS INIT ROTATION COMPANY FULLNAME FLAGS +GAME( 1984, zwackery, 0, zwackery, zwackery, driver_device, 0, ROT0, "Bally Midway", "Zwackery", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/zx.cpp b/src/mame/drivers/zx.cpp index 86671e6ff5f..cf2096e31b8 100644 --- a/src/mame/drivers/zx.cpp +++ b/src/mame/drivers/zx.cpp @@ -473,13 +473,13 @@ ROM_END /* Game Drivers */ -COMP( 1980, zx80, 0, 0, zx80, zx80, zx_state, zx, "Sinclair Research Ltd", "ZX-80", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -COMP( 1981, zx81, 0, 0, zx81, zx81, zx_state, zx, "Sinclair Research Ltd", "ZX-81", MACHINE_NO_SOUND ) -COMP( 1982, ts1000, zx81, 0, ts1000, zx81, zx_state, zx, "Timex Sinclair", "Timex Sinclair 1000", MACHINE_NO_SOUND ) -COMP( 1983, ts1500, zx81, 0, ts1500, zx81, zx_state, zx, "Timex Sinclair", "Timex Sinclair 1500", MACHINE_NO_SOUND ) -COMP( 1983, tk85, zx81, 0, ts1000, zx81, zx_state, zx, "Microdigital", "TK85", MACHINE_NO_SOUND ) -COMP( 1983, ringo470, zx81, 0, ts1000, zx81, zx_state, zx, "Ritas do Brasil Ltda", "Ringo 470", MACHINE_NO_SOUND ) +COMP( 1980, zx80, 0, 0, zx80, zx80, zx_state, zx, "Sinclair Research Ltd", "ZX-80", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW ) +COMP( 1981, zx81, 0, 0, zx81, zx81, zx_state, zx, "Sinclair Research Ltd", "ZX-81", MACHINE_NO_SOUND_HW ) +COMP( 1982, ts1000, zx81, 0, ts1000, zx81, zx_state, zx, "Timex Sinclair", "Timex Sinclair 1000", MACHINE_NO_SOUND_HW ) +COMP( 1983, ts1500, zx81, 0, ts1500, zx81, zx_state, zx, "Timex Sinclair", "Timex Sinclair 1500", MACHINE_NO_SOUND_HW ) +COMP( 1983, tk85, zx81, 0, ts1000, zx81, zx_state, zx, "Microdigital", "TK85", MACHINE_NO_SOUND_HW ) +COMP( 1983, ringo470, zx81, 0, ts1000, zx81, zx_state, zx, "Ritas do Brasil Ltda", "Ringo 470", MACHINE_NO_SOUND_HW ) COMP( 1984, pc8300, zx81, 0, pc8300, pc8300, zx_state, zx, "Your Computer", "PC8300", MACHINE_NOT_WORKING ) COMP( 1983, pow3000, zx81, 0, pow3000, pow3000, zx_state, zx, "Creon Enterprises", "Power 3000", MACHINE_NOT_WORKING ) COMP( 1982, lambda, zx81, 0, pow3000, pow3000, zx_state, zx, "Lambda Electronics Ltd", "Lambda 8300", MACHINE_NOT_WORKING ) -COMP( 1997, zx97, zx81, 0, zx81, zx81, zx_state, zx, "Wilf Rigter", "ZX97", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_UNOFFICIAL ) +COMP( 1997, zx97, zx81, 0, zx81, zx81, zx_state, zx, "Wilf Rigter", "ZX97", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW | MACHINE_UNOFFICIAL ) diff --git a/src/mame/includes/mcr68.h b/src/mame/includes/mcr68.h index a290a81ccdf..e27097dfd21 100644 --- a/src/mame/includes/mcr68.h +++ b/src/mame/includes/mcr68.h @@ -6,40 +6,27 @@ ***************************************************************************/ -#include "machine/6821pia.h" #include "machine/watchdog.h" #include "audio/midway.h" #include "audio/williams.h" - -struct counter_state -{ - uint8_t control; - uint16_t latch; - uint16_t count; - emu_timer * timer; - uint8_t timer_active; - attotime period; -}; +#include "machine/6840ptm.h" class mcr68_state : public driver_device { public: mcr68_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), - m_chip_squeak_deluxe(*this, "csd"), m_sounds_good(*this, "sg"), m_turbo_chip_squeak(*this, "tcs"), m_cvsd_sound(*this, "cvsd"), m_videoram(*this, "videoram"), m_spriteram(*this, "spriteram") , m_maincpu(*this, "maincpu"), - m_watchdog(*this, "watchdog"), m_gfxdecode(*this, "gfxdecode"), m_screen(*this, "screen"), - m_palette(*this, "palette") + m_ptm(*this, "ptm") { } - optional_device<midway_chip_squeak_deluxe_device> m_chip_squeak_deluxe; optional_device<midway_sounds_good_device> m_sounds_good; optional_device<midway_turbo_chip_squeak_device> m_turbo_chip_squeak; optional_device<williams_cvsd_sound_device> m_cvsd_sound; @@ -51,22 +38,9 @@ public: attotime m_timing_factor; uint8_t m_sprite_clip; int8_t m_sprite_xoffset; - uint8_t m_m6840_status; - uint8_t m_m6840_status_read_since_int; - uint8_t m_m6840_msb_buffer; - uint8_t m_m6840_lsb_buffer; - uint8_t m_m6840_irq_state; - uint8_t m_m6840_irq_vector; - struct counter_state m_m6840_state[3]; - uint8_t m_v493_irq_state; - uint8_t m_v493_irq_vector; timer_expired_delegate m_v493_callback; - uint8_t m_zwackery_sound_data; - attotime m_m6840_counter_periods[3]; - attotime m_m6840_internal_counter_period; tilemap_t *m_bg_tilemap; tilemap_t *m_fg_tilemap; - DECLARE_READ16_MEMBER(zwackery_6840_r); DECLARE_WRITE16_MEMBER(xenophobe_control_w); DECLARE_WRITE16_MEMBER(blasted_control_w); DECLARE_READ16_MEMBER(spyhunt2_port_0_r); @@ -79,21 +53,9 @@ public: DECLARE_READ16_MEMBER(pigskin_port_1_r); DECLARE_READ16_MEMBER(pigskin_port_2_r); DECLARE_READ16_MEMBER(trisport_port_1_r); - DECLARE_WRITE16_MEMBER(mcr68_6840_upper_w); - DECLARE_WRITE16_MEMBER(mcr68_6840_lower_w); - DECLARE_READ16_MEMBER(mcr68_6840_upper_r); - DECLARE_READ16_MEMBER(mcr68_6840_lower_r); - DECLARE_WRITE8_MEMBER(mcr68_6840_w_common); - DECLARE_READ16_MEMBER(mcr68_6840_r_common); - void reload_count(int counter); - uint16_t compute_counter(int counter); DECLARE_WRITE16_MEMBER(mcr68_videoram_w); - DECLARE_WRITE16_MEMBER(zwackery_videoram_w); - DECLARE_WRITE16_MEMBER(zwackery_spriteram_w); - DECLARE_READ8_MEMBER(zwackery_port_2_r); DECLARE_DRIVER_INIT(intlaser); DECLARE_DRIVER_INIT(pigskin); - DECLARE_DRIVER_INIT(zwackery); DECLARE_DRIVER_INIT(blasted); DECLARE_DRIVER_INIT(trisport); DECLARE_DRIVER_INIT(xenophob); @@ -102,40 +64,21 @@ public: DECLARE_DRIVER_INIT(archrivlb); DECLARE_READ16_MEMBER(archrivlb_port_1_r); TILE_GET_INFO_MEMBER(get_bg_tile_info); - TILE_GET_INFO_MEMBER(zwackery_get_bg_tile_info); - TILE_GET_INFO_MEMBER(zwackery_get_fg_tile_info); - DECLARE_MACHINE_START(zwackery); - DECLARE_MACHINE_RESET(zwackery); - DECLARE_VIDEO_START(zwackery); DECLARE_MACHINE_START(mcr68); DECLARE_MACHINE_RESET(mcr68); DECLARE_VIDEO_START(mcr68); - uint32_t screen_update_zwackery(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); uint32_t screen_update_mcr68(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - INTERRUPT_GEN_MEMBER(mcr68_interrupt); + TIMER_DEVICE_CALLBACK_MEMBER(scanline_cb); TIMER_CALLBACK_MEMBER(mcr68_493_off_callback); TIMER_CALLBACK_MEMBER(mcr68_493_callback); - TIMER_CALLBACK_MEMBER(zwackery_493_off_callback); - TIMER_CALLBACK_MEMBER(zwackery_493_callback); - TIMER_CALLBACK_MEMBER(counter_fired_callback); - DECLARE_READ8_MEMBER(zwackery_port_1_r); - DECLARE_READ8_MEMBER(zwackery_port_3_r); - DECLARE_WRITE8_MEMBER(zwackery_pia0_w); - DECLARE_WRITE8_MEMBER(zwackery_pia1_w); - DECLARE_WRITE_LINE_MEMBER(zwackery_ca2_w); - DECLARE_WRITE_LINE_MEMBER(zwackery_pia_irq); void mcr68_update_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int priority); - void zwackery_update_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int priority); - void mcr68_common_init(); - void update_mcr68_interrupts(); - inline void update_interrupts(); - void subtract_from_counter(int counter, int count); void mcr68_common_init(int clip, int xoffset); required_device<cpu_device> m_maincpu; - required_device<watchdog_timer_device> m_watchdog; required_device<gfxdecode_device> m_gfxdecode; required_device<screen_device> m_screen; - required_device<palette_device> m_palette; std::unique_ptr<uint8_t[]> m_srcdata0; std::unique_ptr<uint8_t[]> m_srcdata2; + +private: + required_device<ptm6840_device> m_ptm; }; diff --git a/src/mame/includes/mitchell.h b/src/mame/includes/mitchell.h index 441b43ed009..01ccf76b793 100644 --- a/src/mame/includes/mitchell.h +++ b/src/mame/includes/mitchell.h @@ -6,11 +6,12 @@ *************************************************************************/ -#include "sound/okim6295.h" +#include "machine/74157.h" #include "machine/nvram.h" #include "machine/eepromser.h" #include "machine/gen_latch.h" #include "sound/msm5205.h" +#include "sound/okim6295.h" class mitchell_state : public driver_device { @@ -19,10 +20,11 @@ public: : driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), m_audiocpu(*this, "audiocpu"), - m_oki(*this, "oki") , + m_oki(*this, "oki"), m_nvram(*this, "nvram"), m_eeprom(*this, "eeprom"), m_msm(*this, "msm"), + m_adpcm_select(*this, "adpcm_select"), m_gfxdecode(*this, "gfxdecode"), m_palette(*this, "palette"), m_soundlatch(*this, "soundlatch"), @@ -30,7 +32,8 @@ public: m_videoram(*this, "videoram"), m_bank1(*this, "bank1"), m_bank0d(*this, "bank0d"), - m_bank1d(*this, "bank1d") { } + m_bank1d(*this, "bank1d"), + m_soundbank(*this, "soundbank") { } /* devices */ required_device<cpu_device> m_maincpu; @@ -39,6 +42,7 @@ public: optional_device<nvram_device> m_nvram; optional_device<eeprom_serial_93cxx_device> m_eeprom; optional_device<msm5205_device> m_msm; + optional_device<ls157_device> m_adpcm_select; required_device<gfxdecode_device> m_gfxdecode; required_device<palette_device> m_palette; optional_device<generic_latch_8_device> m_soundlatch; @@ -49,6 +53,7 @@ public: required_memory_bank m_bank1; optional_memory_bank m_bank0d; optional_memory_bank m_bank1d; + optional_memory_bank m_soundbank; /* video-related */ tilemap_t *m_bg_tilemap; @@ -59,8 +64,7 @@ public: std::vector<uint8_t> m_paletteram; /* sound-related */ - int m_sample_buffer; - int m_sample_select; + bool m_sample_select; /* misc */ int m_input_type; @@ -127,5 +131,8 @@ public: void draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect ); void bootleg_decode(); void configure_banks(void (*decode)(uint8_t *src, uint8_t *dst, int size)); + DECLARE_WRITE8_MEMBER(sound_command_w); + DECLARE_READ8_MEMBER(sound_command_r); + DECLARE_WRITE8_MEMBER(sound_bankswitch_w); DECLARE_WRITE_LINE_MEMBER(spangbl_adpcm_int); }; diff --git a/src/mame/includes/model1.h b/src/mame/includes/model1.h index 04c8f9cca44..ce82135e169 100644 --- a/src/mame/includes/model1.h +++ b/src/mame/includes/model1.h @@ -86,6 +86,11 @@ public: DECLARE_READ32_MEMBER(copro_fifoin_pop); DECLARE_WRITE32_MEMBER(copro_fifoout_push); + uint16_t m_r360_state; + DECLARE_DRIVER_INIT(wingwar360); + DECLARE_READ16_MEMBER(r360_r); + DECLARE_WRITE16_MEMBER(r360_w); + // Rendering DECLARE_VIDEO_START(model1); DECLARE_READ16_MEMBER(model1_listctl_r); diff --git a/src/mame/includes/model2.h b/src/mame/includes/model2.h index 09348dd51af..8fc3829aa4d 100644 --- a/src/mame/includes/model2.h +++ b/src/mame/includes/model2.h @@ -5,6 +5,7 @@ #include "audio/segam1audio.h" #include "machine/eepromser.h" #include "cpu/i960/i960.h" +#include "cpu/mb86235/mb86235.h" #include "sound/scsp.h" #include "machine/315-5881_crypt.h" #include "machine/315-5838_317-0229_comp.h" @@ -67,7 +68,7 @@ public: optional_device<cpu_device> m_audiocpu; optional_device<cpu_device> m_tgp; optional_device<cpu_device> m_dsp; - optional_device<cpu_device> m_tgpx4; + optional_device<mb86235_device> m_tgpx4; optional_device<cpu_device> m_drivecpu; required_device<eeprom_serial_93cxx_device> m_eeprom; required_device<screen_device> m_screen; diff --git a/src/mame/includes/playmark.h b/src/mame/includes/playmark.h index 8ac6c84c139..09f3842a499 100644 --- a/src/mame/includes/playmark.h +++ b/src/mame/includes/playmark.h @@ -16,6 +16,7 @@ public: m_spriteram(*this, "spriteram"), m_rowscroll(*this, "rowscroll"), m_oki(*this, "oki"), + m_okibank(*this, "okibank"), m_eeprom(*this, "eeprom"), m_maincpu(*this, "maincpu"), m_audiocpu(*this, "audiocpu"), @@ -51,11 +52,13 @@ public: uint16_t m_snd_flag; uint8_t m_oki_control; uint8_t m_oki_command; - int m_old_oki_bank; uint8_t m_dispenser_latch; + int m_oki_numbanks; + void configure_oki_banks(); /* devices */ required_device<okim6295_device> m_oki; + optional_memory_bank m_okibank; optional_device<eeprom_serial_93cxx_device> m_eeprom; DECLARE_WRITE16_MEMBER(coinctrl_w); DECLARE_WRITE16_MEMBER(wbeachvl_coin_eeprom_w); diff --git a/src/mame/layout/qkracer.lay b/src/mame/layout/qkracer.lay new file mode 100644 index 00000000000..fe4616ce21b --- /dev/null +++ b/src/mame/layout/qkracer.lay @@ -0,0 +1,63 @@ +<?xml version="1.0"?> +<mamelayout version="2"> + +<!-- define elements --> + + <element name="digit" defstate="0"> + <led7seg><color red="1.0" green="0.3" blue="0.2" /></led7seg> + </element> + + <element name="seg_rect" defstate="0"> + <rect state="1"><color red="1.0" green="0.3" blue="0.2" /></rect> + <rect state="0"><color red="0.125490" green="0.035294" blue="0.0235294" /></rect> + </element> + <element name="seg_x1" defstate="0"> + <text string="/" state="1"><color red="1.0" green="0.3" blue="0.2" /></text> + <text string="/" state="0"><color red="0.125490" green="0.035294" blue="0.0235294" /></text> + </element> + <element name="seg_x2" defstate="0"> + <text string="\" state="1"><color red="1.0" green="0.3" blue="0.2" /></text> + <text string="\" state="0"><color red="0.125490" green="0.035294" blue="0.0235294" /></text> + </element> + + <element name="gled" defstate="0"> + <disk state="1"><color red="0.2" green="1.0" blue="0.2" /></disk> + <disk state="0"><color red="0.04" green="0.2" blue="0.04" /></disk> + </element> + <element name="text_right"> + <text string="RIGHT"><color red="0.5" green="0.4" blue="0.3" /></text> + </element> + + +<!-- build screen --> + + <view name="Internal Layout"> + <bounds left="0" right="93.5" top="0" bottom="15" /> + + <bezel name="8.a" element="gled"><bounds x="84.5" y="5" width="4.5" height="4.5" /></bezel> + <bezel element="text_right"><bounds x="80" y="10" width="14" height="4.5" /></bezel> + + <bezel name="digit0" element="digit"><bounds x="0" y="0" width="10" height="15" /></bezel> + <bezel name="digit1" element="digit"><bounds x="10" y="0" width="10" height="15" /></bezel> + + <bezel name="digit3" element="digit"><bounds x="30" y="0" width="10" height="15" /></bezel> + <bezel name="digit4" element="digit"><bounds x="40" y="0" width="10" height="15" /></bezel> + <bezel name="digit5" element="digit"><bounds x="50" y="3.5" width="10" height="15" /></bezel> + <bezel name="digit6" element="digit"><bounds x="60" y="0" width="10" height="15" /></bezel> + <bezel name="digit7" element="digit"><bounds x="70" y="0" width="10" height="15" /></bezel> + +<!-- math symbols custom digit --> + + <bezel name="2.4" element="seg_rect"><bounds x="21.5" y="7.25" width="7" height="0.5" /></bezel> + + <bezel name="2.0" element="seg_rect"><bounds x="24.75" y="0.9" width="0.5" height="5.75" /></bezel> + <bezel name="2.3" element="seg_rect"><bounds x="24.75" y="8.5" width="0.5" height="5.75" /></bezel> + + <bezel name="2.1" element="seg_x1"><bounds x="24" y="-0.5" width="5" height="7.5" /></bezel> + <bezel name="2.2" element="seg_x1"><bounds x="21" y="7" width="5" height="7.5" /></bezel> + + <bezel name="2.5" element="seg_x2"><bounds x="21" y="-0.5" width="5" height="7.5" /></bezel> + <bezel name="2.6" element="seg_x2"><bounds x="24" y="7" width="5" height="7.5" /></bezel> + + </view> +</mamelayout> diff --git a/src/mame/machine/mcr68.cpp b/src/mame/machine/mcr68.cpp index 4866a30f86f..ae00aa8ab90 100644 --- a/src/mame/machine/mcr68.cpp +++ b/src/mame/machine/mcr68.cpp @@ -11,32 +11,6 @@ #include "includes/mcr68.h" #define VERBOSE 0 -#define LOG(x) do { if (VERBOSE) logerror x; } while (0) - -/************************************* - * - * 6821 PIA declarations - * - *************************************/ - -READ8_MEMBER(mcr68_state::zwackery_port_1_r) -{ - uint8_t ret = ioport("IN1")->read(); - - downcast<pia6821_device *>(machine().device("pia1"))->set_port_a_z_mask(ret); - - return ret; -} - - -READ8_MEMBER(mcr68_state::zwackery_port_3_r) -{ - uint8_t ret = ioport("IN3")->read(); - - downcast<pia6821_device *>(machine().device("pia2"))->set_port_a_z_mask(ret); - - return ret; -} @@ -48,104 +22,43 @@ READ8_MEMBER(mcr68_state::zwackery_port_3_r) MACHINE_START_MEMBER(mcr68_state,mcr68) { - for (int i = 0; i < 3; i++) - { - struct counter_state *m6840 = &m_m6840_state[i]; - - m6840->timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(mcr68_state::counter_fired_callback),this)); - - save_item(m6840->control, "m6840/control", i); - save_item(m6840->latch, "m6840/latch", i); - save_item(m6840->count, "m6840/count", i); - save_item(m6840->timer_active, "m6840/timer_active", i); - } - - save_item(NAME(m_m6840_status)); - save_item(NAME(m_m6840_status_read_since_int)); - save_item(NAME(m_m6840_msb_buffer)); - save_item(NAME(m_m6840_lsb_buffer)); - save_item(NAME(m_m6840_irq_state)); - save_item(NAME(m_v493_irq_state)); - save_item(NAME(m_zwackery_sound_data)); -} - - -void mcr68_state::mcr68_common_init() -{ - /* reset the 6840's */ - m_m6840_counter_periods[0] = attotime::from_hz(30); /* clocked by /VBLANK */ - m_m6840_counter_periods[1] = attotime::never; /* grounded */ - m_m6840_counter_periods[2] = attotime::from_hz(512 * 30); /* clocked by /HSYNC */ - - m_m6840_status = 0x00; - m_m6840_status_read_since_int = 0x00; - m_m6840_msb_buffer = m_m6840_lsb_buffer = 0; - for (int i = 0; i < 3; i++) - { - struct counter_state *m6840 = &m_m6840_state[i]; - - m6840->control = 0x00; - m6840->latch = 0xffff; - m6840->count = 0xffff; - m6840->timer->enable(false); - m6840->timer_active = 0; - m6840->period = m_m6840_counter_periods[i]; - } - - /* initialize the clock */ - m_m6840_internal_counter_period = attotime::from_hz(m_maincpu->unscaled_clock() / 10); } MACHINE_RESET_MEMBER(mcr68_state,mcr68) { /* for the most part all MCR/68k games are the same */ - mcr68_common_init(); m_v493_callback = timer_expired_delegate(FUNC(mcr68_state::mcr68_493_callback),this); - - /* vectors are 1 and 2 */ - m_v493_irq_vector = 1; - m_m6840_irq_vector = 2; -} - - -MACHINE_START_MEMBER(mcr68_state,zwackery) -{ - MACHINE_START_CALL_MEMBER(mcr68); -} - - -MACHINE_RESET_MEMBER(mcr68_state,zwackery) -{ - /* for the most part all MCR/68k games are the same */ - mcr68_common_init(); - m_v493_callback = timer_expired_delegate(FUNC(mcr68_state::zwackery_493_callback),this); - - /* vectors are 5 and 6 */ - m_v493_irq_vector = 5; - m_m6840_irq_vector = 6; } /************************************* * - * Generic MCR interrupt handler + * Scanline callback * *************************************/ -INTERRUPT_GEN_MEMBER(mcr68_state::mcr68_interrupt) +TIMER_DEVICE_CALLBACK_MEMBER( mcr68_state::scanline_cb ) { - /* update the 6840 VBLANK clock */ - if (!m_m6840_state[0].timer_active) - subtract_from_counter(0, 1); + // VSYNC + if (param == 0) + { + if (VERBOSE) + logerror("--- VBLANK ---\n"); + + m_ptm->set_c1(0); + m_ptm->set_c1(1); - logerror("--- VBLANK ---\n"); + /* also set a timer to generate the 493 signal at a specific time before the next VBLANK */ + /* the timing of this is crucial for Blasted and Tri-Sports, which check the timing of */ + /* VBLANK and 493 using counter 2 */ + machine().scheduler().timer_set(attotime::from_hz(30) - m_timing_factor, m_v493_callback); + } - /* also set a timer to generate the 493 signal at a specific time before the next VBLANK */ - /* the timing of this is crucial for Blasted and Tri-Sports, which check the timing of */ - /* VBLANK and 493 using counter 2 */ - machine().scheduler().timer_set(attotime::from_hz(30) - m_timing_factor, m_v493_callback); + // HSYNC + m_ptm->set_c3(0); + m_ptm->set_c3(1); } @@ -156,386 +69,17 @@ INTERRUPT_GEN_MEMBER(mcr68_state::mcr68_interrupt) * *************************************/ -void mcr68_state::update_mcr68_interrupts() -{ - m_maincpu->set_input_line(m_v493_irq_vector, m_v493_irq_state ? ASSERT_LINE : CLEAR_LINE); - m_maincpu->set_input_line(m_m6840_irq_vector, m_m6840_irq_state ? ASSERT_LINE : CLEAR_LINE); -} - - TIMER_CALLBACK_MEMBER(mcr68_state::mcr68_493_off_callback) { - m_v493_irq_state = 0; - update_mcr68_interrupts(); + m_maincpu->set_input_line(1, CLEAR_LINE); } TIMER_CALLBACK_MEMBER(mcr68_state::mcr68_493_callback) { - m_v493_irq_state = 1; - update_mcr68_interrupts(); + m_maincpu->set_input_line(1, ASSERT_LINE); machine().scheduler().timer_set(m_screen->scan_period(), timer_expired_delegate(FUNC(mcr68_state::mcr68_493_off_callback),this)); - logerror("--- (INT1) ---\n"); -} - - - -/************************************* - * - * Zwackery-specific interfaces - * - *************************************/ - -WRITE8_MEMBER(mcr68_state::zwackery_pia0_w) -{ - /* bit 7 is the watchdog */ - if (!(data & 0x80)) m_watchdog->watchdog_reset(); - - /* bits 5 and 6 control hflip/vflip */ - /* bits 3 and 4 control coin counters? */ - /* bits 0, 1 and 2 control meters? */ -} - - -WRITE8_MEMBER(mcr68_state::zwackery_pia1_w) -{ - m_zwackery_sound_data = (data >> 4) & 0x0f; -} - - -WRITE_LINE_MEMBER(mcr68_state::zwackery_ca2_w) -{ - address_space &space = m_maincpu->space(AS_PROGRAM); - m_chip_squeak_deluxe->write(space, 0, (state << 4) | m_zwackery_sound_data); -} - - -WRITE_LINE_MEMBER(mcr68_state::zwackery_pia_irq) -{ - pia6821_device *pia = machine().device<pia6821_device>("pia0"); - m_v493_irq_state = pia->irq_a_state() | pia->irq_b_state(); - update_mcr68_interrupts(); -} - - -TIMER_CALLBACK_MEMBER(mcr68_state::zwackery_493_off_callback) -{ - pia6821_device *pia = machine().device<pia6821_device>("pia0"); - pia->ca1_w(0); -} - - -TIMER_CALLBACK_MEMBER(mcr68_state::zwackery_493_callback) -{ - pia6821_device *pia = machine().device<pia6821_device>("pia0"); - - pia->ca1_w(1); - machine().scheduler().timer_set(m_screen->scan_period(), timer_expired_delegate(FUNC(mcr68_state::zwackery_493_off_callback),this)); -} - - - -/************************************* - * - * M6840 timer utilities - * - *************************************/ - -inline void mcr68_state::update_interrupts() -{ - m_m6840_status &= ~0x80; - - if ((m_m6840_status & 0x01) && (m_m6840_state[0].control & 0x40)) m_m6840_status |= 0x80; - if ((m_m6840_status & 0x02) && (m_m6840_state[1].control & 0x40)) m_m6840_status |= 0x80; - if ((m_m6840_status & 0x04) && (m_m6840_state[2].control & 0x40)) m_m6840_status |= 0x80; - - m_m6840_irq_state = m_m6840_status >> 7; - update_mcr68_interrupts(); -} - - -void mcr68_state::subtract_from_counter(int counter, int count) -{ - struct counter_state *m6840 = &m_m6840_state[counter]; - - /* dual-byte mode */ - if (m6840->control & 0x04) - { - int lsb = m6840->count & 0xff; - int msb = m6840->count >> 8; - - /* count the clocks */ - lsb -= count; - - /* loop while we're less than zero */ - while (lsb < 0) - { - /* borrow from the MSB */ - lsb += (m6840->latch & 0xff) + 1; - msb--; - - /* if MSB goes less than zero, we've expired */ - if (msb < 0) - { - m_m6840_status |= 1 << counter; - m_m6840_status_read_since_int &= ~(1 << counter); - update_interrupts(); - msb = (m6840->latch >> 8) + 1; - LOG(("** Counter %d fired\n", counter)); - } - } - /* store the result */ - m6840->count = (msb << 8) | lsb; - } - - /* word mode */ - else - { - int word = m6840->count; - - /* count the clocks */ - word -= count; - - /* loop while we're less than zero */ - while (word < 0) - { - /* borrow from the MSB */ - word += m6840->latch + 1; - - /* we've expired */ - m_m6840_status |= 1 << counter; - m_m6840_status_read_since_int &= ~(1 << counter); - update_interrupts(); - LOG(("** Counter %d fired\n", counter)); - } - - /* store the result */ - m6840->count = word; - } -} - - -TIMER_CALLBACK_MEMBER(mcr68_state::counter_fired_callback) -{ - int count = param >> 2; - int counter = param & 3; - struct counter_state *m6840 = &m_m6840_state[counter]; - - /* reset the timer */ - m6840->timer_active = 0; - - /* subtract it all from the counter; this will generate an interrupt */ - subtract_from_counter(counter, count); -} - - -void mcr68_state::reload_count(int counter) -{ - struct counter_state *m6840 = &m_m6840_state[counter]; - attotime period; - attotime total_period; - int count; - - /* copy the latched value in */ - m6840->count = m6840->latch; - - /* counter 0 is self-updating if clocked externally */ - if (counter == 0 && !(m6840->control & 0x02)) - { - m6840->timer->adjust(attotime::never); - m6840->timer_active = 0; - return; - } - - /* determine the clock period for this timer */ - if (m6840->control & 0x02) - period = m_m6840_internal_counter_period; - else - period = m_m6840_counter_periods[counter]; - - /* determine the number of clock periods before we expire */ - count = m6840->count; - if (m6840->control & 0x04) - count = ((count >> 8) + 1) * ((count & 0xff) + 1); - else - count = count + 1; - - /* set the timer */ - total_period = period * count; -LOG(("reload_count(%d): period = %f count = %d\n", counter, period.as_double(), count)); - m6840->timer->adjust(total_period, (count << 2) + counter); - m6840->timer_active = 1; -} - - -uint16_t mcr68_state::compute_counter(int counter) -{ - struct counter_state *m6840 = &m_m6840_state[counter]; - attotime period; - int remaining; - - /* if there's no timer, return the count */ - if (!m6840->timer_active) - return m6840->count; - - /* determine the clock period for this timer */ - if (m6840->control & 0x02) - period = m_m6840_internal_counter_period; - else - period = m_m6840_counter_periods[counter]; - /* see how many are left */ - remaining = m6840->timer->remaining().as_attoseconds() / period.as_attoseconds(); - - /* adjust the count for dual byte mode */ - if (m6840->control & 0x04) - { - int divisor = (m6840->count & 0xff) + 1; - int msb = remaining / divisor; - int lsb = remaining % divisor; - remaining = (msb << 8) | lsb; - } - - return remaining; -} - - - -/************************************* - * - * M6840 timer I/O - * - *************************************/ - -WRITE8_MEMBER(mcr68_state::mcr68_6840_w_common) -{ - int i; - - /* offsets 0 and 1 are control registers */ - if (offset < 2) - { - int counter = (offset == 1) ? 1 : (m_m6840_state[1].control & 0x01) ? 0 : 2; - struct counter_state *m6840 = &m_m6840_state[counter]; - uint8_t diffs = data ^ m6840->control; - - m6840->control = data; - - /* reset? */ - if (counter == 0 && (diffs & 0x01)) - { - /* holding reset down */ - if (data & 0x01) - { - for (i = 0; i < 3; i++) - { - m_m6840_state[i].timer->adjust(attotime::never); - m_m6840_state[i].timer_active = 0; - } - } - - /* releasing reset */ - else - { - for (i = 0; i < 3; i++) - reload_count(i); - } - - m_m6840_status = 0; - update_interrupts(); - } - - /* changing the clock source? (needed for Zwackery) */ - if (diffs & 0x02) - reload_count(counter); - - LOG(("%06X:Counter %d control = %02X\n", space.device().safe_pcbase(), counter, data)); - } - - /* offsets 2, 4, and 6 are MSB buffer registers */ - else if ((offset & 1) == 0) - { - LOG(("%06X:MSB = %02X\n", space.device().safe_pcbase(), data)); - m_m6840_msb_buffer = data; - } - - /* offsets 3, 5, and 7 are Write Timer Latch commands */ - else - { - int counter = (offset - 2) / 2; - struct counter_state *m6840 = &m_m6840_state[counter]; - m6840->latch = (m_m6840_msb_buffer << 8) | (data & 0xff); - - /* clear the interrupt */ - m_m6840_status &= ~(1 << counter); - update_interrupts(); - - /* reload the count if in an appropriate mode */ - if (!(m6840->control & 0x10)) - reload_count(counter); - - LOG(("%06X:Counter %d latch = %04X\n", space.device().safe_pcbase(), counter, m6840->latch)); - } -} - - -READ16_MEMBER(mcr68_state::mcr68_6840_r_common) -{ - /* offset 0 is a no-op */ - if (offset == 0) - return 0; - - /* offset 1 is the status register */ - else if (offset == 1) - { - LOG(("%06X:Status read = %04X\n", space.device().safe_pcbase(), m_m6840_status)); - m_m6840_status_read_since_int |= m_m6840_status & 0x07; - return m_m6840_status; - } - - /* offsets 2, 4, and 6 are Read Timer Counter commands */ - else if ((offset & 1) == 0) - { - int counter = (offset - 2) / 2; - int result = compute_counter(counter); - - /* clear the interrupt if the status has been read */ - if (m_m6840_status_read_since_int & (1 << counter)) - m_m6840_status &= ~(1 << counter); - update_interrupts(); - - m_m6840_lsb_buffer = result & 0xff; - - LOG(("%06X:Counter %d read = %04X\n", space.device().safe_pcbase(), counter, result)); - return result >> 8; - } - - /* offsets 3, 5, and 7 are LSB buffer registers */ - else - return m_m6840_lsb_buffer; -} - - -WRITE16_MEMBER(mcr68_state::mcr68_6840_upper_w) -{ - if (ACCESSING_BITS_8_15) - mcr68_6840_w_common(space, offset, (data >> 8) & 0xff); -} - - -WRITE16_MEMBER(mcr68_state::mcr68_6840_lower_w) -{ - if (ACCESSING_BITS_0_7) - mcr68_6840_w_common(space, offset, data & 0xff); -} - - -READ16_MEMBER(mcr68_state::mcr68_6840_upper_r) -{ - return (mcr68_6840_r_common(space,offset,0) << 8) | 0x00ff; -} - - -READ16_MEMBER(mcr68_state::mcr68_6840_lower_r) -{ - return mcr68_6840_r_common(space,offset,0) | 0xff00; + if (VERBOSE) + logerror("--- (INT1) ---\n"); } diff --git a/src/mame/machine/naomigd.cpp b/src/mame/machine/naomigd.cpp index 5b2e6cf6b14..329ff6211f2 100644 --- a/src/mame/machine/naomigd.cpp +++ b/src/mame/machine/naomigd.cpp @@ -6,7 +6,81 @@ #include "imagedev/chd_cd.h" /* - Dimm board registers (add more information if you find it): + + GPIO pins(main board: EEPROM, DIMM SPDs, option board: PIC16, JPs) + | + SH4 <-> 315-6154 <-> PCI bus -> Sega 315-6322 -> Host system interface (NAOMI, Triforce, Chihiro) + | | -> 2x DIMM RAM modules + RAM RAM -> Altera (PCI IDE Bus Master Controller) -> IDE bus -> GD-ROM or CF + 16MB 4MB -> PCnet-FAST III -> Ethernet + +315-6154 - SH4 CPU to PCI bridge and SDRAM controller, also used in Sega Hikaru (2x) +315-6322 - DIMM SDRAM controller, DES decryption, host system communication + + SH4 address space +------------------- +00000000 - 001FFFFF Flash ROM (1st half - stock firmware, 2nd half - updated firmware) +04000000 - 040000FF memory/PCI bridge registers (Sega 315-6154) +0C000000 - 0CFFFFFF SH4 local RAM +10000000 - 103FFFFF memory/PCI controller RAM +14000000 - 1BFFFFFF 8x banked pages + +internal / PCI memory space +------------------- +00000000 - 000000FF DIMM controller registers (Sega 315-6322) +10000000 - 4FFFFFFF DIMM memory, upto 1GB (if register 28 bit 1 is 0, otherwise some unknown MMIO) +70000000 - 70FFFFFF SH4 local RAM +78000000 - 783FFFFF 315-6154 PCI bridge RAM +C00001xx IDE registers \ +C00003xx IDE registers | software configured in VxWorks, preconfigured or hardcoded in 1.02 +C000CCxx IDE Bus Master DMA registers / +C1xxxxxx Network registers + +PCI configuration space (enabled using memctl 1C reg) +------------------- +00000000 - 00000FFF unknown, write 142 to reg 04 at very start +00001000 - 00001FFF PCI IDE controller (upper board Altera Flex) Vendor 11db Device 189d +00002000 - 00002FFF AMD AM79C973BVC PCnet-FAST III Network + +DIMM controller registers +------------------- +14 5F703C | +18 5F7040 | +1C 5F7044 | 16bit 4x Communication registers +20 5F7048 | +24 5F704C 16bit Interrupt register + -------c ---b---a + a - IRQ to DIMM (SH4 IRL3): 0 set / 1 clear + b - unk, mask of a ??? + c - IRQ to NAOMI (HOLLY EXT 3): 0 set / 1 clear (write 0 from NAOMI seems ignored) + +28 16bit dddd---c ------ba + a - 0->1 NAOMI reset + b - 1 seems disable DIMM RAM access, followed by write 01010101 to bank 10 offset 000110 or 000190 (some MMIO?) + c - unk, set to 1 in VxWorks, 0 in 1.02 + d - unk, checked for == 1 in 1.02 + +2A 8bit possible DES decryption area size 8 MSB bits (16MB units number) + VxWorks firmwares set this to ((DIMMsize >> 24) - 1), 1.02 set it to FF + +2C 32bit SDRAM config +30 32bit DES key low +34 32bit DES key high + +SH4 IO port A bits +------------------- +9 select input, 0 - main/lower board, 1 - option/upper board (IDE, Net, PIC) + 0 1 +0 DIMM SPD clk JP? 0 - enable IDE +1 DIMM SPD data JP? 0 - enable Network +2 93C46 DI PIC16 D0 +3 93C46 CS PIC16 D1 +4 93C46 CLK PIC16 D2 +5 93C46 DO PIC16 CLK + + + + Dimm board communication registers software level usage: Name: Naomi Dimm Bd. NAOMI_DIMM_COMMAND = 5f703c 14000014 (16 bit): @@ -565,6 +639,10 @@ ROM_START( dimm ) // unused and/or unknown security PICs // 253-5508-0352E 317-0352-EXP BFC.BIN unknown, presumable some mahjong game (MJ1 ?) ROM_LOAD("317-0352-exp.pic", 0x00, 0x4000, CRC(b216fbfc) SHA1(da2341003b35d1600d63fbe34d13ff3b42bdc939) ) + // 253-5508-0364 317-0364-COM BGK.BIN unknown, have been seen with DIMM board labeled "DIMM BD NAO DGS SATL" + ROM_LOAD("317-0364-com.pic", 0x00, 0x4000, CRC(82975008) SHA1(6732842d4af630d6c6d96bb11ba98caed1cb6b24) ) + // 253-5508-0422J 317-0422-JPN BHE.BIN Quest of D undumped version + ROM_LOAD("317-0422-jpn.pic", 0x00, 0x4000, CRC(54197fbf) SHA1(a18b5b7aec0498c7a62cacf9f2298ddefb7482c9) ) // 253-5508-0456J 317-0456-JPN BEG.BIN WCCF 2005-2006 undumped Japan version ROM_LOAD("317-0456-jpn.pic", 0x00, 0x4000, CRC(cf3bd834) SHA1(6236cdb780260d34c02806478a39c9f3432a45e8) ) // 253-5508-0506J 317-0506-JPN BPK.BIN unknown, something Chihiro ? diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 7cc2ddafdc1..9bbd6af8bc9 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -9612,6 +9612,7 @@ cocoe // Color Computer (Extended BASIC 1.0) cp400 // Prologica CP400 lzcolor64 // Digiponto LZ Color64 mx1600 // Dynacom MX-1600 +t4426 // Terco T4426 CNC programming station @source:coco3.cpp coco3 // Color Computer 3 (NTSC) @@ -14194,6 +14195,7 @@ funrlgl // Mattel h2hbaskb // Coleco lightfgt // Milton Bradley plus1 // Milton Bradley +qkracer // National Semiconductor @source:hh_hmcs40.cpp alnattck // Coleco @@ -17006,9 +17008,9 @@ tricktrp // GX771 (c) 1987 cavenger // 8106 (c) 1981 dorodon // Falcon dorodon2 // Falcon -ladybgb2 // bootleg ladybug // 8110 (c) 1981 ladybugb // bootleg +ladybugb2 // bootleg snapjack // ???? (c) @source:ladyfrog.cpp @@ -19764,7 +19766,6 @@ spyhunt2 // (c) 1987 spyhunt2a // (c) 1987 trisport // (c) 1989 xenophob // (c) 1987 -zwackery // (c) 1984 @source:meadows.cpp bowl3d // [1978?] @@ -28854,6 +28855,7 @@ quizkofk // 0080 (c) 1995 Saurus ragnagrd // 0218 (c) 1996 Saurus rbff1 // 0095 (c) 1995 SNK rbff1a // 0095 (c) 1995 SNK +rbff1k // 0095 (c) 1995 SNK rbff2 // 0240 (c) 1998 SNK rbff2h // 0240 (c) 1998 SNK rbff2k // 0140 Censored Korean release of rbff2 @@ -31482,6 +31484,7 @@ raiden // (c) 1990 Seibu Kaihatsu raidena // (c) 1990 Seibu Kaihatsu raidenb // (c) 1990 Seibu Kaihatsu raidenk // (c) 1990 Seibu Kaihatsu + IBL Corporation license +raidenkb // (c) bootleg raident // (c) 1990 Seibu Kaihatsu + Liang HWA Electronics license raidenu // (c) 1990 Seibu Kaihatsu + Fabtek license raidenua // (c) 1990 Seibu Kaihatsu + Fabtek license @@ -34672,6 +34675,7 @@ chopliftbl // bootleg (S2) chopliftu // 834-5795 (c) 1985, (c) 1982 Dan Gorlin (S2) dakkochn // 836-6483 (S2) flicky // (c) 1984 (S1) +flickya // (c) 1984 (S1) flickyo // (c) 1984 (S1) flickys1 // (c) 1984 (S1) flickys2 // (c) 1984 (S1) @@ -35936,6 +35940,9 @@ topspeedu // B14 (c) 1987 Taito America Corporation (US) toratora // (c) 1980 Game Plan toratorab // (c) 1980 Game Plan +@source:tosh1000.cpp +tosh1000 + @source:tourtabl.cpp tourtab2 // 030170 1978/03 [6507] tourtabl // 030170 1978/03 [6507] @@ -37975,6 +37982,9 @@ zrt80 // @source:zsbc3.cpp zsbc3 // +@source:zwackery.cpp +zwackery // (c) 1984 + @source:zx.cpp lambda // Lambda 8300 pc8300 // Your Computer - PC8300 diff --git a/src/mame/mess.flt b/src/mame/mess.flt index 61358680303..e701eea7b43 100644 --- a/src/mame/mess.flt +++ b/src/mame/mess.flt @@ -625,6 +625,7 @@ tm990189.cpp tmc1800.cpp tmc2000e.cpp tmc600.cpp +tosh1000.cpp tr606.cpp tranz330.cpp tricep.cpp diff --git a/src/mame/video/finalizr.cpp b/src/mame/video/finalizr.cpp index dfff8a344fc..716c03831e3 100644 --- a/src/mame/video/finalizr.cpp +++ b/src/mame/video/finalizr.cpp @@ -217,9 +217,17 @@ uint32_t finalizr_state::screen_update_finalizr(screen_device &screen, bitmap_in const rectangle &visarea = screen.visible_area(); rectangle clip = cliprect; - clip.min_x = visarea.min_x; - clip.max_x = visarea.min_x + 31; - m_fg_tilemap->set_scrolldx(0,-32); + if (flip_screen()) + { + clip.min_x = visarea.max_x - 31; + clip.max_x = visarea.max_x; + } + else + { + clip.min_x = visarea.min_x; + clip.max_x = visarea.min_x + 31; + } + m_fg_tilemap->draw(screen, bitmap, clip, 0, 0); return 0; diff --git a/src/mame/video/mcr68.cpp b/src/mame/video/mcr68.cpp index 30de02962b7..10479d10075 100644 --- a/src/mame/video/mcr68.cpp +++ b/src/mame/video/mcr68.cpp @@ -31,25 +31,6 @@ TILE_GET_INFO_MEMBER(mcr68_state::get_bg_tile_info) } -TILE_GET_INFO_MEMBER(mcr68_state::zwackery_get_bg_tile_info) -{ - uint16_t *videoram = m_videoram; - int data = videoram[tile_index]; - int color = (data >> 13) & 7; - SET_TILE_INFO_MEMBER(0, data & 0x3ff, color, TILE_FLIPYX(data >> 11)); -} - - -TILE_GET_INFO_MEMBER(mcr68_state::zwackery_get_fg_tile_info) -{ - uint16_t *videoram = m_videoram; - int data = videoram[tile_index]; - int color = (data >> 13) & 7; - SET_TILE_INFO_MEMBER(2, data & 0x3ff, color, TILE_FLIPYX(data >> 11)); - tileinfo.category = (color != 0); -} - - /************************************* * @@ -65,70 +46,6 @@ VIDEO_START_MEMBER(mcr68_state,mcr68) } -VIDEO_START_MEMBER(mcr68_state,zwackery) -{ - const uint8_t *colordatabase = (const uint8_t *)memregion("gfx3")->base(); - gfx_element *gfx0 = m_gfxdecode->gfx(0); - gfx_element *gfx2 = m_gfxdecode->gfx(2); - uint8_t *dest0; - uint8_t *dest2; - int code, y, x; - - /* initialize the background tilemap */ - m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(mcr68_state::zwackery_get_bg_tile_info),this), TILEMAP_SCAN_ROWS, 16,16, 32,32); - - /* initialize the foreground tilemap */ - m_fg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(mcr68_state::zwackery_get_fg_tile_info),this), TILEMAP_SCAN_ROWS, 16,16, 32,32); - m_fg_tilemap->set_transparent_pen(0); - - /* allocate memory for the assembled gfx data */ - m_srcdata0 = std::make_unique<uint8_t[]>(gfx0->elements() * gfx0->width() * gfx0->height()); - m_srcdata2 = std::make_unique<uint8_t[]>(gfx2->elements() * gfx2->width() * gfx2->height()); - - /* "colorize" each code */ - dest0 = m_srcdata0.get(); - dest2 = m_srcdata2.get(); - for (code = 0; code < gfx0->elements(); code++) - { - const uint8_t *coldata = colordatabase + code * 32; - const uint8_t *gfxdata0 = gfx0->get_data(code); - const uint8_t *gfxdata2 = gfx2->get_data(code); - - /* assume 16 rows */ - for (y = 0; y < 16; y++) - { - const uint8_t *gd0 = gfxdata0; - const uint8_t *gd2 = gfxdata2; - - /* 16 columns */ - for (x = 0; x < 16; x++, gd0++, gd2++) - { - int coloffs = (y & 0x0c) | ((x >> 2) & 0x03); - int pen0 = coldata[coloffs * 2 + 0]; - int pen1 = coldata[coloffs * 2 + 1]; - int tp0, tp1; - - /* every 4 pixels gets its own foreground/background colors */ - *dest0++ = *gd0 ? pen1 : pen0; - - /* for gfx 2, we convert all low-priority pens to 0 */ - tp0 = (pen0 & 0x80) ? pen0 : 0; - tp1 = (pen1 & 0x80) ? pen1 : 0; - *dest2++ = *gd2 ? tp1 : tp0; - } - - /* advance */ - gfxdata0 += gfx0->rowbytes(); - gfxdata2 += gfx2->rowbytes(); - } - } - - /* make the assembled data our new source data */ - gfx0->set_raw_layout(m_srcdata0.get(), gfx0->width(), gfx0->height(), gfx0->elements(), 8 * gfx0->width(), 8 * gfx0->width() * gfx0->height()); - gfx2->set_raw_layout(m_srcdata2.get(), gfx2->width(), gfx2->height(), gfx2->elements(), 8 * gfx2->width(), 8 * gfx2->width() * gfx2->height()); -} - - /************************************* * @@ -144,24 +61,6 @@ WRITE16_MEMBER(mcr68_state::mcr68_videoram_w) } -WRITE16_MEMBER(mcr68_state::zwackery_videoram_w) -{ - uint16_t *videoram = m_videoram; - COMBINE_DATA(&videoram[offset]); - m_bg_tilemap->mark_tile_dirty(offset); - m_fg_tilemap->mark_tile_dirty(offset); -} - - -WRITE16_MEMBER(mcr68_state::zwackery_spriteram_w) -{ - /* yech -- Zwackery relies on the upper 8 bits of a spriteram read being $ff! */ - /* to make this happen we always write $ff in the upper 8 bits */ - COMBINE_DATA(&m_spriteram[offset]); - m_spriteram[offset] |= 0xff00; -} - - /************************************* * @@ -222,63 +121,6 @@ void mcr68_state::mcr68_update_sprites(screen_device &screen, bitmap_ind16 &bitm } -void mcr68_state::zwackery_update_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int priority) -{ - uint16_t *spriteram = m_spriteram; - int offs; - - screen.priority().fill(1, cliprect); - - /* loop over sprite RAM */ - for (offs = m_spriteram.bytes() / 2 - 4;offs >= 0;offs -= 4) - { - int code, color, flipx, flipy, x, y, flags; - - /* get the code and skip if zero */ - code = LOW_BYTE(spriteram[offs + 2]); - if (code == 0) - continue; - - /* extract the flag bits and determine the color */ - flags = LOW_BYTE(spriteram[offs + 1]); - color = ((~flags >> 2) & 0x0f) | ((flags & 0x02) << 3); - - /* for low priority, draw everything but color 7 */ - if (!priority) - { - if (color == 7) - continue; - } - - /* for high priority, only draw color 7 */ - else - { - if (color != 7) - continue; - } - - /* determine flipping and coordinates */ - flipx = ~flags & 0x40; - flipy = flags & 0x80; - x = (231 - LOW_BYTE(spriteram[offs + 3])) * 2; - y = (241 - LOW_BYTE(spriteram[offs])) * 2; - - if (x <= -32) x += 512; - - /* sprites use color 0 for background pen and 8 for the 'under tile' pen. - The color 8 is used to cover over other sprites. */ - - /* first draw the sprite, visible */ - m_gfxdecode->gfx(1)->prio_transmask(bitmap,cliprect, code, color, flipx, flipy, x, y, - screen.priority(), 0x00, 0x0101); - - /* then draw the mask, behind the background but obscuring following sprites */ - m_gfxdecode->gfx(1)->prio_transmask(bitmap,cliprect, code, color, flipx, flipy, x, y, - screen.priority(), 0x02, 0xfeff); - } -} - - /************************************* * @@ -301,20 +143,3 @@ uint32_t mcr68_state::screen_update_mcr68(screen_device &screen, bitmap_ind16 &b mcr68_update_sprites(screen, bitmap, cliprect, 1); return 0; } - - -uint32_t mcr68_state::screen_update_zwackery(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - /* draw the background */ - m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0); - - /* draw the low-priority sprites */ - zwackery_update_sprites(screen, bitmap, cliprect, 0); - - /* redraw tiles with priority over sprites */ - m_fg_tilemap->draw(screen, bitmap, cliprect, 1, 0); - - /* draw the high-priority sprites */ - zwackery_update_sprites(screen, bitmap, cliprect, 1); - return 0; -} diff --git a/src/osd/modules/debugger/debugimgui.cpp b/src/osd/modules/debugger/debugimgui.cpp index de459240e85..8c48d1a2b7d 100644 --- a/src/osd/modules/debugger/debugimgui.cpp +++ b/src/osd/modules/debugger/debugimgui.cpp @@ -1000,6 +1000,7 @@ void debug_imgui::refresh_filelist() util::zippath_directory* dir = nullptr; const char *volume_name; const osd::directory::entry *dirent; + uint8_t first = 0; // todo m_filelist.clear(); @@ -1019,6 +1020,7 @@ void debug_imgui::refresh_filelist() m_filelist.emplace_back(std::move(temp)); x++; } + first = m_filelist.size(); while((dirent = util::zippath_readdir(dir)) != nullptr) { file_entry temp; @@ -1040,6 +1042,9 @@ void debug_imgui::refresh_filelist() } if (dir != nullptr) util::zippath_closedir(dir); + + // sort file list, as it is not guaranteed to be in any particular order + std::sort(m_filelist.begin()+first,m_filelist.end(),[](file_entry x, file_entry y) { return x.basename < y.basename; } ); } void debug_imgui::refresh_typelist() diff --git a/src/osd/modules/debugger/win/editwininfo.cpp b/src/osd/modules/debugger/win/editwininfo.cpp index 6dc4954a796..96b424a5afc 100644 --- a/src/osd/modules/debugger/win/editwininfo.cpp +++ b/src/osd/modules/debugger/win/editwininfo.cpp @@ -16,9 +16,15 @@ #include "winutil.h" -// edit box styles -#define EDIT_BOX_STYLE WS_CHILD | WS_VISIBLE | ES_AUTOHSCROLL -#define EDIT_BOX_STYLE_EX 0 +namespace { + +constexpr DWORD EDIT_BOX_STYLE = WS_CHILD | WS_VISIBLE | ES_AUTOHSCROLL; +constexpr DWORD EDIT_BOX_STYLE_EX = 0; + +constexpr int MAX_EDIT_STRING = 256; +constexpr int HISTORY_LENGTH = 20; + +} // anonymous namespace editwin_info::editwin_info(debugger_windows_interface &debugger, bool is_main_console, LPCSTR title, WNDPROC handler) : @@ -26,7 +32,7 @@ editwin_info::editwin_info(debugger_windows_interface &debugger, bool is_main_co m_editwnd(nullptr), m_edit_defstr(), m_original_editproc(nullptr), - m_history_count(0), + m_history(), m_last_history(0) { if (window() == nullptr) @@ -35,11 +41,11 @@ editwin_info::editwin_info(debugger_windows_interface &debugger, bool is_main_co // create an edit box and override its key handling m_editwnd = CreateWindowEx(EDIT_BOX_STYLE_EX, TEXT("EDIT"), nullptr, EDIT_BOX_STYLE, 0, 0, 100, 100, window(), nullptr, GetModuleHandleUni(), nullptr); - m_original_editproc = (WNDPROC)(uintptr_t)GetWindowLongPtr(m_editwnd, GWLP_WNDPROC); - SetWindowLongPtr(m_editwnd, GWLP_USERDATA, (LONG_PTR)this); - SetWindowLongPtr(m_editwnd, GWLP_WNDPROC, (LONG_PTR)&editwin_info::static_edit_proc); - SendMessage(m_editwnd, WM_SETFONT, (WPARAM)metrics().debug_font(), (LPARAM)FALSE); - SendMessage(m_editwnd, EM_LIMITTEXT, (WPARAM)MAX_EDIT_STRING, (LPARAM)0); + m_original_editproc = WNDPROC(uintptr_t(GetWindowLongPtr(m_editwnd, GWLP_WNDPROC))); + SetWindowLongPtr(m_editwnd, GWLP_USERDATA, LONG_PTR(this)); + SetWindowLongPtr(m_editwnd, GWLP_WNDPROC, LONG_PTR(&editwin_info::static_edit_proc)); + SendMessage(m_editwnd, WM_SETFONT, WPARAM(metrics().debug_font()), LPARAM(FALSE)); + SendMessage(m_editwnd, EM_LIMITTEXT, WPARAM(MAX_EDIT_STRING), LPARAM(0)); set_editwnd_text(""); } @@ -80,13 +86,13 @@ void editwin_info::set_editwnd_bounds(RECT const &bounds) void editwin_info::set_editwnd_text(char const *text) { auto tc_buffer = osd::text::to_tstring(text); - SendMessage(m_editwnd, WM_SETTEXT, (WPARAM)0, (LPARAM)tc_buffer.c_str()); + SendMessage(m_editwnd, WM_SETTEXT, WPARAM(0), LPARAM(tc_buffer.c_str())); } void editwin_info::editwnd_select_all() { - SendMessage(m_editwnd, EM_SETSEL, (WPARAM)0, (LPARAM)-1); + SendMessage(m_editwnd, EM_SETSEL, WPARAM(0), LPARAM(-1)); } @@ -100,8 +106,6 @@ void editwin_info::draw_contents(HDC dc) LRESULT editwin_info::edit_proc(UINT message, WPARAM wparam, LPARAM lparam) { - TCHAR buffer[MAX_EDIT_STRING]; - // handle a few messages switch (message) { @@ -114,23 +118,28 @@ LRESULT editwin_info::edit_proc(UINT message, WPARAM wparam, LPARAM lparam) switch (wparam) { case VK_UP: - if (m_last_history < (m_history_count - 1)) + if (!m_history.empty()) + { m_last_history++; - else - m_last_history = 0; - SendMessage(m_editwnd, WM_SETTEXT, (WPARAM)0, (LPARAM)&m_history[m_last_history][0]); - SendMessage(m_editwnd, EM_SETSEL, (WPARAM)MAX_EDIT_STRING, (LPARAM)MAX_EDIT_STRING); + if (m_last_history >= m_history.size()) + m_last_history = 0; + auto const &entry(m_history[m_last_history]); + SendMessage(m_editwnd, WM_SETTEXT, WPARAM(0), LPARAM(entry.c_str())); + SendMessage(m_editwnd, EM_SETSEL, WPARAM(entry.length()), LPARAM(entry.length())); + } break; case VK_DOWN: - if (m_last_history > 0) - m_last_history--; - else if (m_history_count > 0) - m_last_history = m_history_count - 1; - else - m_last_history = 0; - SendMessage(m_editwnd, WM_SETTEXT, (WPARAM)0, (LPARAM)&m_history[m_last_history][0]); - SendMessage(m_editwnd, EM_SETSEL, (WPARAM)MAX_EDIT_STRING, (LPARAM)MAX_EDIT_STRING); + if (!m_history.empty()) + { + if (m_last_history > 0) + m_last_history--; + else + m_last_history = m_history.size() - 1; + auto const &entry(m_history[m_last_history]); + SendMessage(m_editwnd, WM_SETTEXT, WPARAM(0), LPARAM(entry.c_str())); + SendMessage(m_editwnd, EM_SETSEL, WPARAM(entry.length()), LPARAM(entry.length())); + } break; case VK_PRIOR: @@ -168,35 +177,36 @@ LRESULT editwin_info::edit_proc(UINT message, WPARAM wparam, LPARAM lparam) { if (waiting_for_debugger() || !seq_pressed()) { + TCHAR buffer[MAX_EDIT_STRING]; + switch (wparam) { - case 13: + case 13: // carriage return { // fetch the text - SendMessage(m_editwnd, WM_GETTEXT, (WPARAM)ARRAY_LENGTH(buffer), (LPARAM)buffer); + SendMessage(m_editwnd, WM_GETTEXT, WPARAM(ARRAY_LENGTH(buffer)), LPARAM(buffer)); // add to the history if it's not a repeat of the last one - if (buffer[0] != 0 && _tcscmp(buffer, &m_history[0][0])) + if (buffer[0] && (m_history.empty() || _tcscmp(buffer, m_history[0].c_str()))) { - memmove(&m_history[1][0], &m_history[0][0], (HISTORY_LENGTH - 1) * MAX_EDIT_STRING * sizeof(TCHAR)); - _tcscpy(&m_history[0][0], buffer); - if (m_history_count < HISTORY_LENGTH) - m_history_count++; + while (m_history.size() >= HISTORY_LENGTH) + m_history.pop_back(); + m_history.emplace_front(buffer); } - m_last_history = m_history_count - 1; + m_last_history = m_history.size() - 1; // process { auto utf8_buffer = osd::text::from_tstring(buffer); process_string(utf8_buffer.c_str()); } - break; } + break; - case 27: + case 27: // escape { // fetch the text - SendMessage(m_editwnd, WM_GETTEXT, (WPARAM)sizeof(buffer), (LPARAM)buffer); + SendMessage(m_editwnd, WM_GETTEXT, WPARAM(sizeof(buffer)), LPARAM(buffer)); // if it's not empty, clear the text if (_tcslen(buffer) > 0) @@ -205,8 +215,8 @@ LRESULT editwin_info::edit_proc(UINT message, WPARAM wparam, LPARAM lparam) set_editwnd_text(m_edit_defstr.c_str()); editwnd_select_all(); } - break; } + break; default: return CallWindowProc(m_original_editproc, m_editwnd, message, wparam, lparam); @@ -226,7 +236,7 @@ LRESULT editwin_info::edit_proc(UINT message, WPARAM wparam, LPARAM lparam) LRESULT CALLBACK editwin_info::static_edit_proc(HWND wnd, UINT message, WPARAM wparam, LPARAM lparam) { - editwin_info *const info = (editwin_info *)(uintptr_t)GetWindowLongPtr(wnd, GWLP_USERDATA); + editwin_info *const info = (editwin_info *)uintptr_t(GetWindowLongPtr(wnd, GWLP_USERDATA)); assert(info->m_editwnd == wnd); return info->edit_proc(message, wparam, lparam); } diff --git a/src/osd/modules/debugger/win/editwininfo.h b/src/osd/modules/debugger/win/editwininfo.h index 5da80597272..4a1e42371e1 100644 --- a/src/osd/modules/debugger/win/editwininfo.h +++ b/src/osd/modules/debugger/win/editwininfo.h @@ -6,13 +6,16 @@ // //============================================================ -#ifndef __DEBUG_WIN_EDIT_WIN_INFO_H__ -#define __DEBUG_WIN_EDIT_WIN_INFO_H__ +#ifndef MAME_DEBUG_WIN_EDIT_WIN_INFO_H +#define MAME_DEBUG_WIN_EDIT_WIN_INFO_H #include "debugwin.h" #include "debugwininfo.h" +#include <deque> +#include <string> + class editwin_info : public debugwin_info { @@ -25,8 +28,8 @@ public: virtual bool set_default_focus() override; protected: - static DWORD const COMBO_BOX_STYLE = WS_CHILD | WS_VISIBLE | CBS_DROPDOWNLIST | WS_VSCROLL; - static DWORD const COMBO_BOX_STYLE_EX = 0; + constexpr static DWORD COMBO_BOX_STYLE = WS_CHILD | WS_VISIBLE | CBS_DROPDOWNLIST | WS_VSCROLL; + constexpr static DWORD COMBO_BOX_STYLE_EX = 0; void set_editwnd_bounds(RECT const &bounds); void set_editwnd_text(char const *text); @@ -36,21 +39,19 @@ protected: virtual void draw_contents(HDC dc) override; private: + typedef std::deque<std::basic_string<TCHAR> > history_deque; + virtual void process_string(char const *string) = 0; LRESULT edit_proc(UINT message, WPARAM wparam, LPARAM lparam); static LRESULT CALLBACK static_edit_proc(HWND wnd, UINT message, WPARAM wparam, LPARAM lparam); - static int const MAX_EDIT_STRING = 256; - static int const HISTORY_LENGTH = 20; - - HWND m_editwnd; - std::string m_edit_defstr; - WNDPROC m_original_editproc; - TCHAR m_history[HISTORY_LENGTH][MAX_EDIT_STRING]; - int m_history_count; - int m_last_history; + HWND m_editwnd; + std::string m_edit_defstr; + WNDPROC m_original_editproc; + history_deque m_history; + int m_last_history; }; #endif |