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-rw-r--r--src/devices/cpu/mcs48/mcs48.cpp2
-rw-r--r--src/devices/machine/i8243.cpp88
-rw-r--r--src/devices/machine/i8243.h53
-rw-r--r--src/mame/audio/segag80r.cpp125
-rw-r--r--src/mame/audio/segag80r.h3
-rw-r--r--src/mame/drivers/fidelz80.cpp15
-rw-r--r--src/mame/drivers/odyssey2.cpp93
-rw-r--r--src/mame/drivers/othello.cpp57
-rw-r--r--src/mame/drivers/segas16a.cpp17
-rw-r--r--src/mame/includes/segas16a.h2
-rw-r--r--src/mame/machine/ms7004.cpp23
-rw-r--r--src/mame/machine/ms7004.h2
12 files changed, 262 insertions, 218 deletions
diff --git a/src/devices/cpu/mcs48/mcs48.cpp b/src/devices/cpu/mcs48/mcs48.cpp
index c720507205b..5c6ebcf427d 100644
--- a/src/devices/cpu/mcs48/mcs48.cpp
+++ b/src/devices/cpu/mcs48/mcs48.cpp
@@ -541,7 +541,7 @@ void mcs48_cpu_device::expander_operation(expander_op operation, uint8_t port)
if (operation != EXPANDER_OP_READ)
port_w(2, m_p2 = (m_p2 & 0xf0) | (m_a & 0x0f));
else
- m_a = port_r(2) | 0x0f;
+ m_a = port_r(2) & 0x0f;
/* generate low-to-high transition on PROG line */
prog_w(1);
diff --git a/src/devices/machine/i8243.cpp b/src/devices/machine/i8243.cpp
index 5a387b55705..c2b60c4b8c7 100644
--- a/src/devices/machine/i8243.cpp
+++ b/src/devices/machine/i8243.cpp
@@ -4,7 +4,7 @@
i8243.c
- Intel 8243 Port Expander (for MCS-48)
+ Intel 8243 Input/Output Expander (for MCS-48)
***************************************************************************/
@@ -25,9 +25,9 @@ DEFINE_DEVICE_TYPE(I8243, i8243_device, "i8243", "Intel 8243 I/O Expander")
i8243_device::i8243_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, I8243, tag, owner, clock)
- , m_p2out(0), m_p2(0), m_opcode(0), m_prog(0)
- , m_readhandler(*this)
- , m_writehandler(*this)
+ , m_p2out(0x0f), m_p2(0x0f), m_opcode(0), m_prog(1), m_cs(0)
+ , m_readhandler{{*this}, {*this}, {*this}, {*this}}
+ , m_writehandler{{*this}, {*this}, {*this}, {*this}}
{
}
@@ -37,68 +37,74 @@ i8243_device::i8243_device(const machine_config &mconfig, const char *tag, devic
void i8243_device::device_start()
{
- m_readhandler.resolve_safe(0);
- m_writehandler.resolve_safe();
+ for (auto &cb : m_readhandler)
+ cb.resolve();
+ for (auto &cb : m_writehandler)
+ cb.resolve();
}
//-------------------------------------------------
-// device_reset - device-specific reset
+// p2_r - handle a read from the MCU port
//-------------------------------------------------
-void i8243_device::device_reset()
+uint8_t i8243_device::p2_r()
{
- m_p2 = 0x0f;
- m_p2out = 0x0f;
- m_prog = 1;
+ return m_p2out;
}
-/*-------------------------------------------------
- i8243_p2_r - handle a read from port 2
--------------------------------------------------*/
+//-------------------------------------------------
+// p2_w - handle a write to the MCU port
+//-------------------------------------------------
-READ8_MEMBER(i8243_device::p2_r)
+void i8243_device::p2_w(uint8_t data)
{
- return m_p2out;
+ m_p2 = data & 0x0f;
}
-/*-------------------------------------------------
- i8243_p2_r - handle a write to port 2
--------------------------------------------------*/
+//-------------------------------------------------
+// output_update - helper for port writes
+//-------------------------------------------------
-WRITE8_MEMBER(i8243_device::p2_w)
+void i8243_device::output_update(int which)
{
- m_p2 = data & 0x0f;
+ if (m_writehandler[which].isnull())
+ logerror("%s: Unconfigured write to P%d (%01X)\n", machine().describe_context(), which + 4, m_p[which]);
+ else
+ m_writehandler[which](m_p[which]);
}
-/*-------------------------------------------------
- i8243_prog_w - handle a change in the PROG
- line state
--------------------------------------------------*/
+//-------------------------------------------------
+// prog_w - handle a change in the PROG line
+// state
+//-------------------------------------------------
WRITE_LINE_MEMBER(i8243_device::prog_w)
{
/* on high->low transition state, latch opcode/port */
- if (m_prog && !state)
+ if (m_prog && !state && !m_cs)
{
m_opcode = m_p2;
/* if this is a read opcode, copy result to p2out */
if ((m_opcode >> 2) == mcs48_cpu_device::EXPANDER_OP_READ)
{
- if (m_readhandler.isnull())
- {
- m_p[m_opcode & 3] = m_readhandler(m_opcode & 3);
- }
- m_p2out = m_p[m_opcode & 3] & 0x0f;
+ int which = m_opcode & 3;
+ if (m_readhandler[which].isnull())
+ logerror("%s: Unconfigured read from P%d\n", machine().describe_context(), which + 4);
+ else
+ m_p[which] = m_readhandler[which]();
+ m_p2out = m_p[which] & 0x0f;
}
+ else
+ m_p2out = 0x0f;
}
/* on low->high transition state, act on opcode */
- else if (!m_prog && state)
+ else if (!m_prog && state && !m_cs)
{
switch (m_opcode >> 2)
{
@@ -107,17 +113,17 @@ WRITE_LINE_MEMBER(i8243_device::prog_w)
case mcs48_cpu_device::EXPANDER_OP_WRITE:
m_p[m_opcode & 3] = m_p2 & 0x0f;
- m_writehandler((offs_t)(m_opcode & 3), m_p[m_opcode & 3]);
+ output_update(m_opcode & 3);
break;
case mcs48_cpu_device::EXPANDER_OP_OR:
m_p[m_opcode & 3] |= m_p2 & 0x0f;
- m_writehandler((offs_t)(m_opcode & 3), m_p[m_opcode & 3]);
+ output_update(m_opcode & 3);
break;
case mcs48_cpu_device::EXPANDER_OP_AND:
m_p[m_opcode & 3] &= m_p2 & 0x0f;
- m_writehandler((offs_t)(m_opcode & 3), m_p[m_opcode & 3]);
+ output_update(m_opcode & 3);
break;
}
}
@@ -125,3 +131,15 @@ WRITE_LINE_MEMBER(i8243_device::prog_w)
/* remember the state */
m_prog = state;
}
+
+
+//-------------------------------------------------
+// cs_w - handle chip select line (active low)
+//-------------------------------------------------
+
+WRITE_LINE_MEMBER(i8243_device::cs_w)
+{
+ m_cs = state;
+ if (m_cs)
+ m_p2out = 0x0f;
+}
diff --git a/src/devices/machine/i8243.h b/src/devices/machine/i8243.h
index cea6fe4f468..d6f7d72a0e2 100644
--- a/src/devices/machine/i8243.h
+++ b/src/devices/machine/i8243.h
@@ -4,7 +4,22 @@
i8243.h
- Intel 8243 Port Expander
+ Intel 8243 Input/Output Expander
+
+****************************************************************************
+ _____ _____
+ P50 1 |* \_/ | 24 VCC
+ P40 2 | | 23 P51
+ P41 3 | | 22 P52
+ P42 4 | | 21 P53
+ P43 5 | | 20 P60
+ _CS 6 | | 19 P61
+ PROG 7 | 8243 | 18 P62
+ P23 8 | | 17 P63
+ P22 9 | | 16 P73
+ P21 10 | | 15 P72
+ P20 11 | | 14 P71
+ GND 12 |_____________| 13 P70
***************************************************************************/
@@ -20,31 +35,37 @@ public:
i8243_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
// configuration helpers
- auto read_handler() { return m_readhandler.bind(); }
- auto write_handler() { return m_writehandler.bind(); }
-
- DECLARE_READ8_MEMBER(p2_r);
- DECLARE_WRITE8_MEMBER(p2_w);
+ auto p4_in_cb() { return m_readhandler[0].bind(); }
+ auto p4_out_cb() { return m_writehandler[0].bind(); }
+ auto p5_in_cb() { return m_readhandler[1].bind(); }
+ auto p5_out_cb() { return m_writehandler[1].bind(); }
+ auto p6_in_cb() { return m_readhandler[2].bind(); }
+ auto p6_out_cb() { return m_writehandler[2].bind(); }
+ auto p7_in_cb() { return m_readhandler[3].bind(); }
+ auto p7_out_cb() { return m_writehandler[3].bind(); }
+
+ uint8_t p2_r();
+ void p2_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(prog_w);
+ DECLARE_WRITE_LINE_MEMBER(cs_w);
protected:
// device-level overrides
virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_post_load() override { }
- virtual void device_clock_changed() override { }
private:
+ void output_update(int which);
- uint8_t m_p[4]; /* 4 ports' worth of data */
- uint8_t m_p2out; /* port 2 bits that will be returned */
- uint8_t m_p2; /* most recent port 2 value */
- uint8_t m_opcode; /* latched opcode */
- uint8_t m_prog; /* previous PROG state */
+ uint8_t m_p[4]; // 4 ports' worth of data
+ uint8_t m_p2out; // port 2 bits that will be returned
+ uint8_t m_p2; // most recent port 2 value
+ uint8_t m_opcode; // latched opcode
+ bool m_prog; // previous PROG state
+ bool m_cs; // chip select
- devcb_read8 m_readhandler;
- devcb_write8 m_writehandler;
+ devcb_read8 m_readhandler[4];
+ devcb_write8 m_writehandler[4];
};
diff --git a/src/mame/audio/segag80r.cpp b/src/mame/audio/segag80r.cpp
index 50704c5a648..27e5f47a68f 100644
--- a/src/mame/audio/segag80r.cpp
+++ b/src/mame/audio/segag80r.cpp
@@ -687,43 +687,6 @@ void monsterb_sound_device::device_start()
save_item(NAME(m_sound_addr));
}
-/*************************************
- *
- * Machine driver
- *
- *************************************/
-
-MACHINE_CONFIG_START(monsterb_sound_device::device_add_mconfig)
- /* basic machine hardware */
- MCFG_DEVICE_ADD(m_audiocpu, N7751, 6000000)
- MCFG_MCS48_PORT_T1_IN_CB(CONSTANT(0)) // labelled as "TEST", connected to ground
- MCFG_MCS48_PORT_P2_IN_CB(READ8(*this, monsterb_sound_device, n7751_command_r))
- MCFG_MCS48_PORT_BUS_IN_CB(READ8(*this, monsterb_sound_device, n7751_rom_r))
- MCFG_MCS48_PORT_P1_OUT_CB(WRITE8("dac", dac_byte_interface, data_w))
- MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(*this, monsterb_sound_device, n7751_p2_w))
- MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(m_i8243, i8243_device, prog_w))
-
- I8243(config, m_i8243);
- m_i8243->read_handler().set_constant(0);
- m_i8243->write_handler().set(FUNC(monsterb_sound_device::n7751_rom_control_w));
-
- MCFG_DEVICE_ADD(m_samples, SAMPLES)
- MCFG_SAMPLES_CHANNELS(2)
- MCFG_SAMPLES_NAMES(monsterb_sample_names)
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.25)
-
- MCFG_TMS36XX_ADD(m_music, 247)
- MCFG_TMS36XX_TYPE(TMS3617)
- MCFG_TMS36XX_DECAY_TIMES(0.5, 0.5, 0.5, 0.5, 0.5, 0.5)
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5)
-
- MCFG_DEVICE_ADD("dac", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5) // 50K (R91-97)/100K (R98-106) ladder network
- MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0)
- MCFG_SOUND_ROUTE(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "dac", -1.0, DAC_VREF_NEG_INPUT)
-
- SPEAKER(config, "speaker").front_center();
-MACHINE_CONFIG_END
-
/*************************************
*
@@ -791,37 +754,26 @@ WRITE8_MEMBER(monsterb_sound_device::n7751_command_w)
}
-WRITE8_MEMBER(monsterb_sound_device::n7751_rom_control_w)
+template<int Shift>
+void monsterb_sound_device::n7751_rom_addr_w(uint8_t data)
{
- /* P4 - address lines 0-3 */
- /* P5 - address lines 4-7 */
- /* P6 - address lines 8-11 */
- /* P7 - ROM selects */
- switch (offset)
- {
- case 0:
- m_sound_addr = (m_sound_addr & ~0x00f) | ((data & 0x0f) << 0);
- break;
-
- case 1:
- m_sound_addr = (m_sound_addr & ~0x0f0) | ((data & 0x0f) << 4);
- break;
+ // P4 - address lines 0-3
+ // P5 - address lines 4-7
+ // P5 - address lines 8-11
+ m_sound_addr = (m_sound_addr & ~(0x00f << Shift)) | ((data & 0x0f) << Shift);
+}
- case 2:
- m_sound_addr = (m_sound_addr & ~0xf00) | ((data & 0x0f) << 8);
- break;
- case 3:
- m_sound_addr &= 0xfff;
- {
- int numroms = m_audiocpu_region->bytes() / 0x1000;
- if (!(data & 0x01) && numroms >= 1) m_sound_addr |= 0x0000;
- if (!(data & 0x02) && numroms >= 2) m_sound_addr |= 0x1000;
- if (!(data & 0x04) && numroms >= 3) m_sound_addr |= 0x2000;
- if (!(data & 0x08) && numroms >= 4) m_sound_addr |= 0x3000;
- }
- break;
- }
+void monsterb_sound_device::n7751_rom_select_w(uint8_t data)
+{
+ // P7 - ROM selects
+ m_sound_addr &= 0xfff;
+
+ int numroms = m_audiocpu_region->bytes() / 0x1000;
+ if (!(data & 0x01) && numroms >= 1) m_sound_addr |= 0x0000;
+ if (!(data & 0x02) && numroms >= 2) m_sound_addr |= 0x1000;
+ if (!(data & 0x04) && numroms >= 3) m_sound_addr |= 0x2000;
+ if (!(data & 0x08) && numroms >= 4) m_sound_addr |= 0x3000;
}
@@ -843,9 +795,50 @@ READ8_MEMBER(monsterb_sound_device::n7751_command_r)
WRITE8_MEMBER(monsterb_sound_device::n7751_p2_w)
{
/* write to P2; low 4 bits go to 8243 */
- m_i8243->p2_w(space, offset, data & 0x0f);
+ m_i8243->p2_w(data & 0x0f);
/* output of bit $80 indicates we are ready (1) or busy (0) */
/* no other outputs are used */
m_n7751_busy = data >> 7;
}
+
+
+
+/*************************************
+ *
+ * Machine driver
+ *
+ *************************************/
+
+MACHINE_CONFIG_START(monsterb_sound_device::device_add_mconfig)
+ /* basic machine hardware */
+ MCFG_DEVICE_ADD(m_audiocpu, N7751, 6000000)
+ MCFG_MCS48_PORT_T1_IN_CB(CONSTANT(0)) // labelled as "TEST", connected to ground
+ MCFG_MCS48_PORT_P2_IN_CB(READ8(*this, monsterb_sound_device, n7751_command_r))
+ MCFG_MCS48_PORT_BUS_IN_CB(READ8(*this, monsterb_sound_device, n7751_rom_r))
+ MCFG_MCS48_PORT_P1_OUT_CB(WRITE8("dac", dac_byte_interface, data_w))
+ MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(*this, monsterb_sound_device, n7751_p2_w))
+ MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(m_i8243, i8243_device, prog_w))
+
+ I8243(config, m_i8243);
+ m_i8243->p4_out_cb().set(FUNC(monsterb_sound_device::n7751_rom_addr_w<0>));
+ m_i8243->p5_out_cb().set(FUNC(monsterb_sound_device::n7751_rom_addr_w<4>));
+ m_i8243->p6_out_cb().set(FUNC(monsterb_sound_device::n7751_rom_addr_w<8>));
+ m_i8243->p7_out_cb().set(FUNC(monsterb_sound_device::n7751_rom_select_w));
+
+ MCFG_DEVICE_ADD(m_samples, SAMPLES)
+ MCFG_SAMPLES_CHANNELS(2)
+ MCFG_SAMPLES_NAMES(monsterb_sample_names)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.25)
+
+ MCFG_TMS36XX_ADD(m_music, 247)
+ MCFG_TMS36XX_TYPE(TMS3617)
+ MCFG_TMS36XX_DECAY_TIMES(0.5, 0.5, 0.5, 0.5, 0.5, 0.5)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5)
+
+ MCFG_DEVICE_ADD("dac", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5) // 50K (R91-97)/100K (R98-106) ladder network
+ MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0)
+ MCFG_SOUND_ROUTE(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "dac", -1.0, DAC_VREF_NEG_INPUT)
+
+ SPEAKER(config, "speaker").front_center();
+MACHINE_CONFIG_END
diff --git a/src/mame/audio/segag80r.h b/src/mame/audio/segag80r.h
index 6338984dadc..833a5d94f74 100644
--- a/src/mame/audio/segag80r.h
+++ b/src/mame/audio/segag80r.h
@@ -47,7 +47,8 @@ protected:
DECLARE_WRITE8_MEMBER(n7751_p2_w);
DECLARE_READ8_MEMBER(n7751_rom_r);
- DECLARE_WRITE8_MEMBER(n7751_rom_control_w);
+ template<int Shift> void n7751_rom_addr_w(uint8_t data);
+ void n7751_rom_select_w(uint8_t data);
required_device<n7751_device> m_audiocpu;
required_memory_region m_audiocpu_region;
diff --git a/src/mame/drivers/fidelz80.cpp b/src/mame/drivers/fidelz80.cpp
index 78ca19684db..537cc0600a2 100644
--- a/src/mame/drivers/fidelz80.cpp
+++ b/src/mame/drivers/fidelz80.cpp
@@ -597,7 +597,7 @@ private:
DECLARE_READ_LINE_MEMBER(vbrc_mcu_t0_r);
DECLARE_READ_LINE_MEMBER(vbrc_mcu_t1_r);
DECLARE_READ8_MEMBER(vbrc_mcu_p2_r);
- DECLARE_WRITE8_MEMBER(vbrc_ioexp_port_w);
+ template<int Shift> void vbrc_ioexp_port_w(uint8_t data);
void vbrc_main_io(address_map &map);
void vbrc_main_map(address_map &map);
@@ -1050,10 +1050,11 @@ WRITE8_MEMBER(fidelz80_state::vbrc_speech_w)
// I8243 I/O expander
-WRITE8_MEMBER(fidelz80_state::vbrc_ioexp_port_w)
+template<int P>
+void fidelz80_state::vbrc_ioexp_port_w(uint8_t data)
{
// P4-P7: digit segment data
- m_7seg_data = (m_7seg_data & ~(0xf << (4*offset))) | ((data & 0xf) << (4*offset));
+ m_7seg_data = (m_7seg_data & ~(0xf << (4*P))) | ((data & 0xf) << (4*P));
vbrc_prepare_display();
}
@@ -1071,7 +1072,7 @@ READ8_MEMBER(fidelz80_state::vbrc_mcu_p2_r)
{
// P20-P23: I8243 P2
// P24-P27: multiplexed inputs (active low)
- return (m_i8243->p2_r(space, offset) & 0x0f) | (read_inputs(8) << 4 ^ 0xf0);
+ return (m_i8243->p2_r() & 0x0f) | (read_inputs(8) << 4 ^ 0xf0);
}
READ_LINE_MEMBER(fidelz80_state::vbrc_mcu_t0_r)
@@ -1792,8 +1793,10 @@ MACHINE_CONFIG_START(fidelz80_state::vbrc)
MCFG_MCS48_PORT_T1_IN_CB(READLINE(*this, fidelz80_state, vbrc_mcu_t1_r))
I8243(config, m_i8243);
- m_i8243->read_handler().set_constant(0);
- m_i8243->write_handler().set(FUNC(fidelz80_state::vbrc_ioexp_port_w));
+ m_i8243->p4_out_cb().set(FUNC(fidelz80_state::vbrc_ioexp_port_w<0>));
+ m_i8243->p5_out_cb().set(FUNC(fidelz80_state::vbrc_ioexp_port_w<1>));
+ m_i8243->p6_out_cb().set(FUNC(fidelz80_state::vbrc_ioexp_port_w<2>));
+ m_i8243->p7_out_cb().set(FUNC(fidelz80_state::vbrc_ioexp_port_w<3>));
MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", fidelbase_state, display_decay_tick, attotime::from_msec(1))
config.set_default_layout(layout_fidel_vbrc);
diff --git a/src/mame/drivers/odyssey2.cpp b/src/mame/drivers/odyssey2.cpp
index d5530db733b..1d0efddb345 100644
--- a/src/mame/drivers/odyssey2.cpp
+++ b/src/mame/drivers/odyssey2.cpp
@@ -113,7 +113,10 @@ private:
DECLARE_WRITE8_MEMBER(p2_write);
DECLARE_READ8_MEMBER(io_read);
DECLARE_WRITE8_MEMBER(io_write);
- DECLARE_WRITE8_MEMBER(i8243_port_w);
+ void i8243_p4_w(uint8_t data);
+ void i8243_p5_w(uint8_t data);
+ void i8243_p6_w(uint8_t data);
+ void i8243_p7_w(uint8_t data);
DECLARE_WRITE16_MEMBER(scanline_postprocess);
void g7400_io(address_map &map);
@@ -555,7 +558,7 @@ WRITE8_MEMBER(odyssey2_state::p2_write)
WRITE8_MEMBER(g7400_state::p2_write)
{
m_p2 = data;
- m_i8243->p2_w( space, 0, m_p2 & 0x0f );
+ m_i8243->p2_w(m_p2 & 0x0f);
}
@@ -587,43 +590,47 @@ WRITE8_MEMBER(odyssey2_state::bus_write)
i8243 in the g7400
*/
-WRITE8_MEMBER(g7400_state::i8243_port_w)
+void g7400_state::i8243_p4_w(uint8_t data)
{
- switch ( offset & 3 )
- {
- case 0: // "port 4"
-logerror("setting ef-port4 to %02x\n", data);
- m_ic674_decode[4] = BIT(data,0);
- m_ic674_decode[5] = BIT(data,1);
- m_ic674_decode[6] = BIT(data,2);
- m_ic674_decode[7] = BIT(data,3);
- break;
-
- case 1: // "port 5"
-logerror("setting ef-port5 to %02x\n", data);
- m_ic674_decode[0] = BIT(data,0);
- m_ic674_decode[1] = BIT(data,1);
- m_ic674_decode[2] = BIT(data,2);
- m_ic674_decode[3] = BIT(data,3);
- break;
-
- case 2: // "port 6"
-logerror("setting vdc-port6 to %02x\n", data);
- m_ic678_decode[4] = BIT(data,0);
- m_ic678_decode[5] = BIT(data,1);
- m_ic678_decode[6] = BIT(data,2);
- m_ic678_decode[7] = BIT(data,3);
- break;
-
- case 3: // "port 7"
-logerror("setting vdc-port7 to %02x\n", data);
- m_ic678_decode[0] = BIT(data,0);
- m_ic678_decode[1] = BIT(data,1);
- m_ic678_decode[2] = BIT(data,2);
- m_ic678_decode[3] = BIT(data,3);
- break;
+ // "port 4"
+ logerror("setting ef-port4 to %02x\n", data);
+ m_ic674_decode[4] = BIT(data,0);
+ m_ic674_decode[5] = BIT(data,1);
+ m_ic674_decode[6] = BIT(data,2);
+ m_ic674_decode[7] = BIT(data,3);
+}
- }
+
+void g7400_state::i8243_p5_w(uint8_t data)
+{
+ // "port 5"
+ logerror("setting ef-port5 to %02x\n", data);
+ m_ic674_decode[0] = BIT(data,0);
+ m_ic674_decode[1] = BIT(data,1);
+ m_ic674_decode[2] = BIT(data,2);
+ m_ic674_decode[3] = BIT(data,3);
+}
+
+
+void g7400_state::i8243_p6_w(uint8_t data)
+{
+ // "port 6"
+ logerror("setting vdc-port6 to %02x\n", data);
+ m_ic678_decode[4] = BIT(data,0);
+ m_ic678_decode[5] = BIT(data,1);
+ m_ic678_decode[6] = BIT(data,2);
+ m_ic678_decode[7] = BIT(data,3);
+}
+
+
+void g7400_state::i8243_p7_w(uint8_t data)
+{
+ // "port 7"
+ logerror("setting vdc-port7 to %02x\n", data);
+ m_ic678_decode[0] = BIT(data,0);
+ m_ic678_decode[1] = BIT(data,1);
+ m_ic678_decode[2] = BIT(data,2);
+ m_ic678_decode[3] = BIT(data,3);
}
@@ -767,8 +774,10 @@ MACHINE_CONFIG_START(g7400_state::g7400)
MCFG_PALETTE_INIT_OWNER(g7400_state, g7400)
I8243(config, m_i8243);
- m_i8243->read_handler().set_constant(0);
- m_i8243->write_handler().set(FUNC(g7400_state::i8243_port_w));
+ m_i8243->p4_out_cb().set(FUNC(g7400_state::i8243_p4_w));
+ m_i8243->p5_out_cb().set(FUNC(g7400_state::i8243_p5_w));
+ m_i8243->p6_out_cb().set(FUNC(g7400_state::i8243_p6_w));
+ m_i8243->p7_out_cb().set(FUNC(g7400_state::i8243_p7_w));
MCFG_EF9340_1_ADD("ef9340_1", 3540000, "screen")
@@ -810,8 +819,10 @@ MACHINE_CONFIG_START(g7400_state::odyssey3)
MCFG_PALETTE_INIT_OWNER(g7400_state, g7400)
I8243(config, m_i8243);
- m_i8243->read_handler().set_constant(0);
- m_i8243->write_handler().set(FUNC(g7400_state::i8243_port_w));
+ m_i8243->p4_out_cb().set(FUNC(g7400_state::i8243_p4_w));
+ m_i8243->p5_out_cb().set(FUNC(g7400_state::i8243_p5_w));
+ m_i8243->p6_out_cb().set(FUNC(g7400_state::i8243_p6_w));
+ m_i8243->p7_out_cb().set(FUNC(g7400_state::i8243_p7_w));
MCFG_EF9340_1_ADD("ef9340_1", 3540000, "screen")
diff --git a/src/mame/drivers/othello.cpp b/src/mame/drivers/othello.cpp
index 21b4dd7a93d..9d0439c2d17 100644
--- a/src/mame/drivers/othello.cpp
+++ b/src/mame/drivers/othello.cpp
@@ -117,7 +117,8 @@ private:
DECLARE_READ8_MEMBER(n7751_rom_r);
DECLARE_READ8_MEMBER(n7751_command_r);
DECLARE_WRITE8_MEMBER(n7751_p2_w);
- DECLARE_WRITE8_MEMBER(n7751_rom_control_w);
+ template<int Shift> void n7751_rom_addr_w(uint8_t data);
+ void n7751_rom_select_w(uint8_t data);
DECLARE_PALETTE_INIT(othello);
MC6845_UPDATE_ROW(crtc_update_row);
@@ -280,36 +281,24 @@ void othello_state::audio_portmap(address_map &map)
map(0x08, 0x08).w(FUNC(othello_state::ay_select_w));
}
-WRITE8_MEMBER(othello_state::n7751_rom_control_w)
+template<int Shift>
+void othello_state::n7751_rom_addr_w(uint8_t data)
{
- /* P4 - address lines 0-3 */
- /* P5 - address lines 4-7 */
- /* P6 - address lines 8-11 */
- /* P7 - ROM selects */
- switch (offset)
- {
- case 0:
- m_sound_addr = (m_sound_addr & ~0x00f) | ((data & 0x0f) << 0);
- break;
-
- case 1:
- m_sound_addr = (m_sound_addr & ~0x0f0) | ((data & 0x0f) << 4);
- break;
-
- case 2:
- m_sound_addr = (m_sound_addr & ~0xf00) | ((data & 0x0f) << 8);
- break;
-
- case 3:
- m_sound_addr &= 0xfff;
- {
- if (!BIT(data, 0)) m_sound_addr |= 0x0000;
- if (!BIT(data, 1)) m_sound_addr |= 0x1000;
- if (!BIT(data, 2)) m_sound_addr |= 0x2000;
- if (!BIT(data, 3)) m_sound_addr |= 0x3000;
- }
- break;
- }
+ // P4 - address lines 0-3
+ // P5 - address lines 4-7
+ // P6 - address lines 8-11
+ m_sound_addr = (m_sound_addr & ~(0x00f << Shift)) | ((data & 0x0f) << Shift);
+}
+
+void othello_state::n7751_rom_select_w(uint8_t data)
+{
+ // P7 - ROM selects
+ m_sound_addr &= 0xfff;
+
+ if (!BIT(data, 0)) m_sound_addr |= 0x0000;
+ if (!BIT(data, 1)) m_sound_addr |= 0x1000;
+ if (!BIT(data, 2)) m_sound_addr |= 0x2000;
+ if (!BIT(data, 3)) m_sound_addr |= 0x3000;
}
READ8_MEMBER(othello_state::n7751_rom_r)
@@ -325,7 +314,7 @@ READ8_MEMBER(othello_state::n7751_command_r)
WRITE8_MEMBER(othello_state::n7751_p2_w)
{
/* write to P2; low 4 bits go to 8243 */
- m_i8243->p2_w(space, offset, data & 0x0f);
+ m_i8243->p2_w(data & 0x0f);
/* output of bit $80 indicates we are ready (1) or busy (0) */
/* no other outputs are used */
@@ -419,8 +408,10 @@ MACHINE_CONFIG_START(othello_state::othello)
MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(m_i8243, i8243_device, prog_w))
I8243(config, m_i8243);
- m_i8243->read_handler().set_constant(0);
- m_i8243->write_handler().set(FUNC(othello_state::n7751_rom_control_w));
+ m_i8243->p4_out_cb().set(FUNC(othello_state::n7751_rom_addr_w<0>));
+ m_i8243->p5_out_cb().set(FUNC(othello_state::n7751_rom_addr_w<4>));
+ m_i8243->p6_out_cb().set(FUNC(othello_state::n7751_rom_addr_w<8>));
+ m_i8243->p7_out_cb().set(FUNC(othello_state::n7751_rom_select_w));
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
diff --git a/src/mame/drivers/segas16a.cpp b/src/mame/drivers/segas16a.cpp
index 74f1112d83c..df5b3c157d2 100644
--- a/src/mame/drivers/segas16a.cpp
+++ b/src/mame/drivers/segas16a.cpp
@@ -371,14 +371,15 @@ WRITE8_MEMBER( segas16a_state::n7751_control_w )
// n7751_rom_offset_w - post expander callback
//-------------------------------------------------
-WRITE8_MEMBER( segas16a_state::n7751_rom_offset_w )
+template<int Shift>
+void segas16a_state::n7751_rom_offset_w(uint8_t data)
{
// P4 - address lines 0-3
// P5 - address lines 4-7
// P6 - address lines 8-11
// P7 - address lines 12-13
- int mask = (0xf << (4 * offset)) & 0x3fff;
- int newdata = (data << (4 * offset)) & mask;
+ int mask = (0xf << Shift) & 0x3fff;
+ int newdata = (data << Shift) & mask;
m_n7751_rom_address = (m_n7751_rom_address & ~mask) | newdata;
}
@@ -405,7 +406,7 @@ READ8_MEMBER( segas16a_state::n7751_p2_r )
{
// read from P2 - 8255's PC0-2 connects to 7751's S0-2 (P24-P26 on an 8048)
// bit 0x80 is an alternate way to control the sample on/off; doesn't appear to be used
- return 0x80 | ((m_n7751_command & 0x07) << 4) | (m_n7751_i8243->p2_r(space, offset) & 0x0f);
+ return 0x80 | ((m_n7751_command & 0x07) << 4) | (m_n7751_i8243->p2_r() & 0x0f);
}
@@ -416,7 +417,7 @@ READ8_MEMBER( segas16a_state::n7751_p2_r )
WRITE8_MEMBER( segas16a_state::n7751_p2_w )
{
// write to P2; low 4 bits go to 8243
- m_n7751_i8243->p2_w(space, offset, data & 0x0f);
+ m_n7751_i8243->p2_w(data & 0x0f);
// output of bit $80 indicates we are ready (1) or busy (0)
// no other outputs are used
@@ -1982,8 +1983,10 @@ MACHINE_CONFIG_START(segas16a_state::system16a)
MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE("n7751_8243", i8243_device, prog_w))
I8243(config, m_n7751_i8243);
- m_n7751_i8243->read_handler().set_constant(0);
- m_n7751_i8243->write_handler().set(FUNC(segas16a_state::n7751_rom_offset_w));
+ m_n7751_i8243->p4_out_cb().set(FUNC(segas16a_state::n7751_rom_offset_w<0>));
+ m_n7751_i8243->p5_out_cb().set(FUNC(segas16a_state::n7751_rom_offset_w<4>));
+ m_n7751_i8243->p6_out_cb().set(FUNC(segas16a_state::n7751_rom_offset_w<8>));
+ m_n7751_i8243->p7_out_cb().set(FUNC(segas16a_state::n7751_rom_offset_w<12>));
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
diff --git a/src/mame/includes/segas16a.h b/src/mame/includes/segas16a.h
index 90804513a4b..9862f1cc662 100644
--- a/src/mame/includes/segas16a.h
+++ b/src/mame/includes/segas16a.h
@@ -95,7 +95,7 @@ private:
DECLARE_READ8_MEMBER( sound_data_r );
DECLARE_WRITE8_MEMBER( n7751_command_w );
DECLARE_WRITE8_MEMBER( n7751_control_w );
- DECLARE_WRITE8_MEMBER( n7751_rom_offset_w );
+ template<int Shift> void n7751_rom_offset_w(uint8_t data);
// N7751 sound generator CPU read/write handlers
DECLARE_READ8_MEMBER( n7751_rom_r );
diff --git a/src/mame/machine/ms7004.cpp b/src/mame/machine/ms7004.cpp
index 5eb66f2c64f..52183ba835b 100644
--- a/src/mame/machine/ms7004.cpp
+++ b/src/mame/machine/ms7004.cpp
@@ -66,8 +66,10 @@ MACHINE_CONFIG_START(ms7004_device::device_add_mconfig)
MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(m_i8243, i8243_device, prog_w))
I8243(config, m_i8243);
- m_i8243->read_handler().set_constant(0);
- m_i8243->write_handler().set(FUNC(ms7004_device::i8243_port_w));
+ m_i8243->p4_out_cb().set(FUNC(ms7004_device::i8243_port_w<0>));
+ m_i8243->p5_out_cb().set(FUNC(ms7004_device::i8243_port_w<1>));
+ m_i8243->p6_out_cb().set(FUNC(ms7004_device::i8243_port_w<2>));
+ m_i8243->p7_out_cb().set(FUNC(ms7004_device::i8243_port_w<3>));
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD(MS7004_SPK_TAG, BEEP, 3250)
@@ -432,7 +434,7 @@ WRITE8_MEMBER( ms7004_device::p2_w )
DBG_LOG(2,0,( "p2_w %02x = col %d\n", data, data&15));
m_p2 = data;
- m_i8243->p2_w(space, offset, data);
+ m_i8243->p2_w(data);
}
@@ -440,23 +442,24 @@ WRITE8_MEMBER( ms7004_device::p2_w )
// prog_w -
//-------------------------------------------------
-WRITE8_MEMBER( ms7004_device::i8243_port_w )
+template<int P>
+void ms7004_device::i8243_port_w(uint8_t data)
{
int sense = 0;
- DBG_LOG(2,0,( "8243 port %d data %02xH\n", offset + 4, data));
+ DBG_LOG(2,0,( "8243 port %d data %02xH\n", P + 4, data));
if (data) {
switch(data) {
- case 0x01: sense = m_kbd[(offset << 2) + 0]->read(); break;
- case 0x02: sense = m_kbd[(offset << 2) + 1]->read(); break;
- case 0x04: sense = m_kbd[(offset << 2) + 2]->read(); break;
- case 0x08: sense = m_kbd[(offset << 2) + 3]->read(); break;
+ case 0x01: sense = m_kbd[(P << 2) + 0]->read(); break;
+ case 0x02: sense = m_kbd[(P << 2) + 1]->read(); break;
+ case 0x04: sense = m_kbd[(P << 2) + 2]->read(); break;
+ case 0x08: sense = m_kbd[(P << 2) + 3]->read(); break;
}
m_keylatch = BIT(sense, (m_p1 & 7));
if (m_keylatch)
DBG_LOG(1,0,( "row %d col %02x t1 %d\n",
- (m_p1 & 7), (offset << 4 | data), m_keylatch));
+ (m_p1 & 7), (P << 4 | data), m_keylatch));
}
}
diff --git a/src/mame/machine/ms7004.h b/src/mame/machine/ms7004.h
index 4c6979a486e..654cc4d33dc 100644
--- a/src/mame/machine/ms7004.h
+++ b/src/mame/machine/ms7004.h
@@ -66,7 +66,7 @@ private:
DECLARE_WRITE8_MEMBER( p1_w );
DECLARE_WRITE8_MEMBER( p2_w );
DECLARE_READ_LINE_MEMBER( t1_r );
- DECLARE_WRITE8_MEMBER( i8243_port_w );
+ template<int P> void i8243_port_w(uint8_t data);
};
// device type definition