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author hap <happppp@users.noreply.github.com>2021-09-03 14:18:04 +0200
committer hap <happppp@users.noreply.github.com>2021-09-03 14:18:04 +0200
commitf17fb8295f40933c3a6294ace23604e07f982f68 (patch)
tree58aa0642aa48b0f1a944004e8ae999ace6d26702 /src
parent3ba31270ab7b1f1ac3fdc510ed6eeeff1afa8150 (diff)
changela: bool(~BIT(x)) is always true (does not fix steering problem)
Diffstat (limited to 'src')
-rw-r--r--src/mame/drivers/changela.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mame/drivers/changela.cpp b/src/mame/drivers/changela.cpp
index cb8e2ec6848..ec4f5e5d038 100644
--- a/src/mame/drivers/changela.cpp
+++ b/src/mame/drivers/changela.cpp
@@ -49,7 +49,7 @@ void changela_state::changela_68705_port_a_w(uint8_t data)
void changela_state::changela_68705_port_c_w(uint8_t data)
{
/* PC3 is connected to the CLOCK input of the LS374, so we latch the data on rising edge */
- if (BIT(data, 3) && ~BIT(m_port_c_out, 3))
+ if (BIT(data, 3) && !BIT(m_port_c_out, 3))
m_mcu_out = m_port_a_out & (BIT(m_port_c_out, 2) ? 0xff : m_mcu_in);
/* PC2 is connected to the /OE input of the LS374 */