diff options
author | 2015-05-26 20:24:52 +0200 | |
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committer | 2015-05-26 20:24:52 +0200 | |
commit | d3c13bbff35b7eb6e198a0f4dce978eb339938f3 (patch) | |
tree | cf155093aa77ea130113a6b09dd55833d745380d /src | |
parent | e5d3af5c01151479b515ae27f16cd19530cc5133 (diff) |
added pinout for common tms1x chips
Diffstat (limited to 'src')
-rw-r--r-- | src/emu/cpu/tms0980/tms0980.c | 3 | ||||
-rw-r--r-- | src/emu/cpu/tms0980/tms0980.h | 41 |
2 files changed, 42 insertions, 2 deletions
diff --git a/src/emu/cpu/tms0980/tms0980.c b/src/emu/cpu/tms0980/tms0980.c index d7b13db1d62..50f61788086 100644 --- a/src/emu/cpu/tms0980/tms0980.c +++ b/src/emu/cpu/tms0980/tms0980.c @@ -7,7 +7,6 @@ TODO: - emulate TMS1600 L-pins - fix debugger disasm view - - add pinout diagrams for reference The TMS0980 and TMS1000-family MCU cores are very similar. The TMS0980 has a @@ -175,7 +174,7 @@ const device_type TMS0980 = &device_creator<tms0980_cpu_device>; // 28-pin DIP, // - main instructions PLA at the top half, to the right of the midline // - 32-term microinstructions PLA between the RAM and ROM, supporting 15 microinstructions // - 16-term output PLA and segment PLA above the RAM (rotate opla 90 degrees) -const device_type TMS0970 = &device_creator<tms0970_cpu_device>; // 28-pin DIP, 11 R pins +const device_type TMS0970 = &device_creator<tms0970_cpu_device>; // 28-pin DIP, 11 R pins (note: pinout may slightly differ from chip to chip) const device_type TMS1990 = &device_creator<tms1990_cpu_device>; // 28-pin DIP, ? R pins.. // TMS0950 is same? diff --git a/src/emu/cpu/tms0980/tms0980.h b/src/emu/cpu/tms0980/tms0980.h index b3d8b2163e0..fb9c3690fdd 100644 --- a/src/emu/cpu/tms0980/tms0980.h +++ b/src/emu/cpu/tms0980/tms0980.h @@ -46,6 +46,47 @@ tms0270_cpu_device::set_write_pdc_callback(*device, DEVCB_##_devcb); +// pinout reference + +/* + + ____ ____ ____ ____ + R8 1 |* \_/ | 28 R7 R0 1 |* \_/ | 28 Vss + R9 2 | | 27 R6 R1 2 | | 27 OSC2 + R10 3 | | 26 R5 R2 3 | | 26 OSC1 + Vdd 4 | | 25 R4 R3 4 | | 25 O0 + K1 5 | | 24 R3 R4 5 | | 24 O1 + K2 6 | TMS1000 | 23 R2 R5 6 | | 23 O2 + K4 7 | TMS1070 | 22 R1 R6 7 | TMS1400 | 22 O3 + K8 8 | TMS1100 | 21 R0 R7 8 | | 21 O4 + INIT 9 | TMS1170 | 20 Vss R8 9 | | 20 O5 + O7 10 | | 19 OSC2 R9 10 | | 19 O6 + O6 11 | | 18 OSC1 R10 11 | | 18 O7 + O5 12 | | 17 O0 Vdd 12 | | 17 K8 + O4 13 | | 16 O1 INIT 13 | | 16 K4 + O3 14 |___________| 15 O2 K1 14 |___________| 15 K2 + + + ____ ____ + R2 1 |* \_/ | 28 R3 + R1 2 | | 27 R4 + R0 3 | | 26 R5 + ? 4 | | 25 R6 + Vdd 5 | | 24 R7 + K3 6 | | 23 R8 + K8 7 | TMS0980 | 22 ? + K4 8 | | 21 ? + K2 9 | | 20 Vss + K1 10 | | 19 ? + O7 11 | | 18 O0 + O6 12 | | 17 O1 + O5 13 | | 16 O2 + O4 14 |___________| 15 O3 + + note: TMS0980 official pin names for R0-R8 is D9-D1, O0-O7 is S(A-G,DP) + +*/ + class tms1xxx_cpu_device : public cpu_device { |