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author couriersud <couriersud@arcor.de>2015-05-07 01:32:08 +0200
committer couriersud <couriersud@arcor.de>2015-05-07 01:32:08 +0200
commit023a9705df3564eb009b25a5b610a88e7e016b0c (patch)
tree8be185ab9f7088c59d60a5606f269731d72010b7 /src
parenta38d5d5fe0a6d533bf982f432d15d2d03436c2a3 (diff)
Netlist:
- fixed save state in 9312 - Added EXTCLOCK which can generate arbitrary timing patterns. - Use two EXTCLOCKs to replace timing circuit (9316) in breakout. This gives a speed increase from 60% to 75%. [Couriersud]
Diffstat (limited to 'src')
-rw-r--r--src/emu/netlist/devices/net_lib.c1
-rw-r--r--src/emu/netlist/devices/nld_9312.c3
-rw-r--r--src/emu/netlist/devices/nld_system.c59
-rw-r--r--src/emu/netlist/devices/nld_system.h22
-rw-r--r--src/mame/drivers/nl_breakout.c22
5 files changed, 101 insertions, 6 deletions
diff --git a/src/emu/netlist/devices/net_lib.c b/src/emu/netlist/devices/net_lib.c
index ed2f7ae8d27..a30b3707561 100644
--- a/src/emu/netlist/devices/net_lib.c
+++ b/src/emu/netlist/devices/net_lib.c
@@ -99,6 +99,7 @@ void nl_initialize_factory(netlist_factory_t &factory)
ENTRY(log, LOG, "+I")
ENTRY(logD, LOGD, "+I,I2")
ENTRY(clock, CLOCK, "FREQ")
+ ENTRY(extclock, EXTCLOCK, "FREQ")
ENTRY(mainclock, MAINCLOCK, "FREQ")
ENTRY(solver, SOLVER, "FREQ")
ENTRY(res_sw, RES_SWITCH, "+IN,P1,P2")
diff --git a/src/emu/netlist/devices/nld_9312.c b/src/emu/netlist/devices/nld_9312.c
index 1565a5dada9..00078a3c033 100644
--- a/src/emu/netlist/devices/nld_9312.c
+++ b/src/emu/netlist/devices/nld_9312.c
@@ -109,6 +109,9 @@ NETLIB_START(9312)
m_last_chan = 0;
m_last_G = 0;
+
+ save(NLNAME(m_last_chan));
+ save(NLNAME(m_last_G));
}
NETLIB_RESET(9312)
diff --git a/src/emu/netlist/devices/nld_system.c b/src/emu/netlist/devices/nld_system.c
index 3cef83228ac..56cb6d61420 100644
--- a/src/emu/netlist/devices/nld_system.c
+++ b/src/emu/netlist/devices/nld_system.c
@@ -36,6 +36,65 @@ NETLIB_UPDATE(clock)
}
// ----------------------------------------------------------------------------------------
+// extclock
+// ----------------------------------------------------------------------------------------
+
+NETLIB_START(extclock)
+{
+ register_output("Q", m_Q);
+ register_input("FB", m_feedback);
+
+ register_param("FREQ", m_freq, 7159000.0 * 5.0);
+ register_param("PATTERN", m_pattern, "1,1");
+ register_param("OFFSET", m_offset, 0.0);
+ m_inc[0] = netlist_time::from_hz(m_freq.Value()*2);
+
+ connect(m_feedback, m_Q);
+ {
+ netlist_time base = netlist_time::from_hz(m_freq.Value()*2);
+ nl_util::pstring_list pat = nl_util::split(m_pattern.Value(),",");
+ m_off = netlist_time::from_double(m_offset.Value());
+
+ int pati[256];
+ m_size = pat.count();
+ int total = 0;
+ for (int i=0; i<m_size; i++)
+ {
+ pati[i] = pat[i].as_long();
+ total += pati[i];
+ }
+ netlist_time ttotal = netlist_time::zero;
+ for (int i=0; i<m_size - 1; i++)
+ {
+ m_inc[i] = base * pati[i];
+ ttotal += m_inc[i];
+ }
+ m_inc[m_size - 1] = base * total - ttotal;
+ }
+ save(NLNAME(m_cnt));
+ save(NLNAME(m_off));
+}
+
+NETLIB_RESET(extclock)
+{
+ m_cnt = 0;
+ m_off = netlist_time::from_double(m_offset.Value());
+ m_Q.initial(0);
+}
+
+NETLIB_UPDATE_PARAM(extclock)
+{
+}
+
+NETLIB_UPDATE(extclock)
+{
+ //static UINT8 pattern[6] = { 4, 4, 4, 4, 4, 8 };
+ OUTLOGIC(m_Q, (m_cnt & 1) ^ 1, m_inc[m_cnt] + m_off);
+ m_cnt = (m_cnt + 1) % m_size;
+ m_off = netlist_time::zero;
+}
+
+// ----------------------------------------------------------------------------------------
// logic_input
// ----------------------------------------------------------------------------------------
diff --git a/src/emu/netlist/devices/nld_system.h b/src/emu/netlist/devices/nld_system.h
index 350e62cbffe..cfadb192d6e 100644
--- a/src/emu/netlist/devices/nld_system.h
+++ b/src/emu/netlist/devices/nld_system.h
@@ -33,6 +33,11 @@
NET_REGISTER_DEV(clock, _name) \
PARAM(_name.FREQ, _freq)
+#define EXTCLOCK(_name, _freq, _pattern) \
+ NET_REGISTER_DEV(extclock, _name) \
+ PARAM(_name.FREQ, _freq) \
+ PARAM(_name.PATTERN, _pattern)
+
#define GNDA() \
NET_REGISTER_DEV(gnd, GND)
@@ -77,6 +82,23 @@ NETLIB_DEVICE_WITH_PARAMS(clock,
netlist_time m_inc;
);
+// -----------------------------------------------------------------------------
+// extclock
+// -----------------------------------------------------------------------------
+
+NETLIB_DEVICE_WITH_PARAMS(extclock,
+ netlist_ttl_input_t m_feedback;
+ netlist_ttl_output_t m_Q;
+
+ netlist_param_double_t m_freq;
+ netlist_param_str_t m_pattern;
+ netlist_param_double_t m_offset;
+
+ UINT8 m_cnt;
+ UINT8 m_size;
+ netlist_time m_off;
+ netlist_time m_inc[32];
+);
// -----------------------------------------------------------------------------
// Special support devices ...
diff --git a/src/mame/drivers/nl_breakout.c b/src/mame/drivers/nl_breakout.c
index 947ca65cb8e..582841c5853 100644
--- a/src/mame/drivers/nl_breakout.c
+++ b/src/mame/drivers/nl_breakout.c
@@ -106,11 +106,13 @@ CIRCUIT_LAYOUT( breakout )
#if (SLOW_BUT_ACCURATE)
SOLVER(Solver, 48000)
PARAM(Solver.ACCURACY, 1e-8) // less accuracy and diode will not work
+ PARAM(Solver.GS_THRESHOLD, 6)
#else
SOLVER(Solver, 48000)
PARAM(Solver.ACCURACY, 1e-6)
PARAM(Solver.GS_THRESHOLD, 6)
- //PARAM(Solver.SOR_FACTOR, 1)
+ // FIXME: PARALLEL Doesn't work in breakout!
+ PARAM(Solver.PARALLEL, 0)
#endif
// DIPSWITCH - Free game
@@ -140,7 +142,7 @@ CIRCUIT_LAYOUT( breakout )
//----------------------------------------------------------------
// Clock circuit
//----------------------------------------------------------------
-#if 1 || (SLOW_BUT_ACCURATE)
+#if 0 || (SLOW_BUT_ACCURATE)
MAINCLOCK(Y1, 14318000.0)
CHIP("F1", 9316)
NET_C(Y1.Q, F1.2)
@@ -160,12 +162,20 @@ CIRCUIT_LAYOUT( breakout )
#define CKBH "F1", 13
#define DICECLOCK "H1", 11
#else
- /* This works with bugs. The DICECLOCK (Y2) duty cycles are out of sync.
- * Speed gain is from 50% to 60% and not what would have been expected.
+ /*
+ * 9316 2 3 4 5 6 7 8 9 10 11 12 13 14 15 2 3 4 5 6
+ * A 0 1 0 1 0 1 0 1 0 1 0 1 0 1
+ * B 1 1 0 0 1 1 0 0 1 1 0 0 1 1
+ * CKBH 1 1 0 0 1 1 0 0 1 1 0 0 1 1 1 1
+ * ^--- Pattern Start
+ * CLOCK 1 0 1 1 1 0 1 1 1 0 1 1 1 0 1 0 1 1 1
+ * ^--- Pattern Start
+ * <--------> 3 Clocks Offset
*/
- MAINCLOCK(Y1, 14318000.0 / 2.0)
+ EXTCLOCK(Y1, 14318000.0, "4,4,4,4,4,8")
+ EXTCLOCK(Y2, 14318000.0, "2,6,2,6,2,2,2,6")
+ PARAM(Y2.OFFSET, 3.0 / 14318000.0 + 20.0e-9 )
#define CKBH "Y1", Q
- CLOCK(Y2, 14318000.0 / 3.5)
#define DICECLOCK "Y2", Q
NET_C(ttlhigh, H1.13)