diff options
author | 2020-09-09 23:21:46 +0200 | |
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committer | 2020-09-09 23:23:38 +0200 | |
commit | 4f9ffb733327f96e08dd5d7555a475a6d92f7a1d (patch) | |
tree | 315d68ada56fd4e653d58f92d6bff65df3ef8dc0 /src/lib | |
parent | 9f66daa7301274b70150e2769011541836b345bc (diff) |
netlist: Implement voltage dependent timing for CD4006
Diffstat (limited to 'src/lib')
-rw-r--r-- | src/lib/netlist/core/devices.h | 15 | ||||
-rw-r--r-- | src/lib/netlist/devices/nld_4006.cpp | 29 |
2 files changed, 35 insertions, 9 deletions
diff --git a/src/lib/netlist/core/devices.h b/src/lib/netlist/core/devices.h index 36631c5913d..15a3f40dabc 100644 --- a/src/lib/netlist/core/devices.h +++ b/src/lib/netlist/core/devices.h @@ -75,6 +75,12 @@ namespace netlist { } + explicit nld_power_pins(device_t &owner, nldelegate delegate) + : m_VCC(owner, owner.logic_family()->vcc_pin(), delegate) + , m_GND(owner, owner.logic_family()->gnd_pin(), delegate) + { + } + // Some devices like the 74LS629 have two pairs of supply pins. explicit nld_power_pins(device_t &owner, const pstring &vcc, const pstring &gnd) @@ -83,6 +89,15 @@ namespace netlist { } + // Some devices like the 74LS629 have two pairs of supply pins. + explicit nld_power_pins(device_t &owner, + const pstring &vcc, const pstring &gnd, + nldelegate delegate) + : m_VCC(owner, vcc, delegate) + , m_GND(owner, gnd, delegate) + { + } + const analog_input_t &VCC() const noexcept { return m_VCC; diff --git a/src/lib/netlist/devices/nld_4006.cpp b/src/lib/netlist/devices/nld_4006.cpp index 358b2097654..a61536175f6 100644 --- a/src/lib/netlist/devices/nld_4006.cpp +++ b/src/lib/netlist/devices/nld_4006.cpp @@ -35,7 +35,7 @@ * * Naming conventions follow SYC datasheet * - * FIXME: Timing depends on VDD-VSS + * FIXME: Timing depends on VDD-VSS - partially done * */ @@ -57,7 +57,8 @@ namespace netlist , m_Q(*this, {"D1P4", "D1P4S", "D2P4", "D2P5", "D3P4", "D4P4", "D4P5"}) , m_d(*this, "m_d", 0) , m_last_clock(*this, "m_last_clock", 0) - , m_supply(*this) + , m_tp(*this, "m_tp", netlist_time::from_nsec(200)) + , m_supply(*this, NETLIB_DELEGATE(vdd_vss)) { } @@ -71,18 +72,18 @@ namespace netlist m_d[2] >>= 1; m_d[3] >>= 1; // falling, output all but D1P4S - m_Q[0].push(m_d[0] & 1, netlist_time::from_nsec(200)); - m_Q[2].push((m_d[1] >> 1) & 1, netlist_time::from_nsec(200)); // D2 + 4 - m_Q[3].push( m_d[1] & 1, netlist_time::from_nsec(200)); // D2 + 5 - m_Q[4].push( m_d[2] & 1, netlist_time::from_nsec(200)); // D3 + 4 - m_Q[5].push((m_d[3] >> 1) & 1, netlist_time::from_nsec(200)); // D4 + 4 - m_Q[6].push( m_d[3] & 1, netlist_time::from_nsec(200)); // D5 + 5 + m_Q[0].push(m_d[0] & 1, m_tp); + m_Q[2].push((m_d[1] >> 1) & 1, m_tp); // D2 + 4 + m_Q[3].push( m_d[1] & 1, m_tp); // D2 + 5 + m_Q[4].push( m_d[2] & 1, m_tp); // D3 + 4 + m_Q[5].push((m_d[3] >> 1) & 1, m_tp); // D4 + 4 + m_Q[6].push( m_d[3] & 1, m_tp); // D5 + 5 m_last_clock = m_CLOCK(); } else if (!m_last_clock && m_CLOCK()) { // rising, output D1P4S - m_Q[1].push(m_d[0] & 1, netlist_time::from_nsec(200)); + m_Q[1].push(m_d[0] & 1, m_tp); m_last_clock = m_CLOCK(); } else @@ -94,11 +95,21 @@ namespace netlist } } + NETLIB_HANDLERI(vdd_vss) + { + auto d = m_supply.VCC()() - m_supply.GND()(); + if (d > 0.1) // avoid unrealistic values + { + m_tp = netlist_time::from_nsec(923.0 / d + 13.0); // calculated from datasheet + } + } + logic_input_t m_CLOCK; object_array_t<logic_input_t, 4> m_I; object_array_t<logic_output_t, 7> m_Q; state_container<std::array<uint8_t, 4>> m_d; state_var<netlist_sig_t> m_last_clock; + state_var<netlist_time> m_tp; // propagation time nld_power_pins m_supply; }; |