diff options
| author | 2019-04-23 22:20:47 +0200 | |
|---|---|---|
| committer | 2019-04-23 22:20:47 +0200 | |
| commit | a2f81534112ee672fb32b854b5708b115bebcf59 (patch) | |
| tree | a1dbba6f888424298ff702006eca41531df07129 /src/lib | |
| parent | e669c0c4725bd98827ff11e3b93cf0009f6dba43 (diff) | |
netlist: Fix the 7448 mess.
Moved truth table implementation of 7448 in macro. At the same time
added power terminals and update game netlists accordingly.
Diffstat (limited to 'src/lib')
| -rw-r--r-- | src/lib/netlist/devices/net_lib.cpp | 2 | ||||
| -rw-r--r-- | src/lib/netlist/devices/nld_7448.cpp | 74 | ||||
| -rw-r--r-- | src/lib/netlist/devices/nld_7448.h | 23 | ||||
| -rw-r--r-- | src/lib/netlist/devices/nlid_truthtable.h | 13 | ||||
| -rw-r--r-- | src/lib/netlist/macro/nlm_ttl74xx.cpp | 110 | ||||
| -rw-r--r-- | src/lib/netlist/macro/nlm_ttl74xx.h | 18 |
6 files changed, 153 insertions, 87 deletions
diff --git a/src/lib/netlist/devices/net_lib.cpp b/src/lib/netlist/devices/net_lib.cpp index 43a74fd43f1..4964306f55a 100644 --- a/src/lib/netlist/devices/net_lib.cpp +++ b/src/lib/netlist/devices/net_lib.cpp @@ -67,8 +67,10 @@ namespace devices LIB_ENTRY(2102A_dip) LIB_ENTRY(2716) LIB_ENTRY(2716_dip) +#if !(USE_TRUTHTABLE_7448) LIB_ENTRY(7448) LIB_ENTRY(7448_dip) +#endif LIB_ENTRY(7450) LIB_ENTRY(7450_dip) LIB_ENTRY(7473) diff --git a/src/lib/netlist/devices/nld_7448.cpp b/src/lib/netlist/devices/nld_7448.cpp index 4500229a1c5..c74e8a42496 100644 --- a/src/lib/netlist/devices/nld_7448.cpp +++ b/src/lib/netlist/devices/nld_7448.cpp @@ -7,6 +7,7 @@ #include "nld_7448.h" #include "nlid_truthtable.h" +#include "nlid_system.h" #include <array> @@ -14,12 +15,7 @@ namespace netlist { namespace devices { - #if (USE_TRUTHTABLE_7448) - - NETLIB_TRUTHTABLE(7448, 7, 7); - - #else - + #if !(USE_TRUTHTABLE_7448) NETLIB_OBJECT(7448) { NETLIB_CONSTRUCTOR(7448) @@ -32,6 +28,7 @@ namespace netlist , m_RBIQ(*this, "RBIQ") , m_state(*this, "m_state", 0) , m_Q(*this, {{"a", "b", "c", "d", "e", "f", "g"}}) + , m_power_pins(*this) { } @@ -52,6 +49,7 @@ namespace netlist state_var<unsigned> m_state; object_array_t<logic_output_t, 7> m_Q; /* a .. g */ + nld_power_pins m_power_pins; }; @@ -66,6 +64,7 @@ namespace netlist register_subalias("5", m_RBIQ); register_subalias("6", m_D); register_subalias("7", m_A); + register_subalias("8", "GND"); register_subalias("9", m_Q[4]); // e register_subalias("10", m_Q[3]); // d @@ -74,66 +73,13 @@ namespace netlist register_subalias("13", m_Q[0]); // a register_subalias("14", m_Q[6]); // g register_subalias("15", m_Q[5]); // f + register_subalias("16", "VCC"); } }; #endif - #if (USE_TRUTHTABLE_7448) - nld_7448::truthtable_t nld_7448::m_ttbl; - std::vector<pstring> nld_7448::m_desc = { - " LTQ,BIQ,RBIQ, A , B , C , D | a, b, c, d, e, f, g", - - " 1, 1, 1, 0, 0, 0, 0 | 1, 1, 1, 1, 1, 1, 0|100,100,100,100,100,100,100", - " 1, 1, X, 1, 0, 0, 0 | 0, 1, 1, 0, 0, 0, 0|100,100,100,100,100,100,100", - " 1, 1, X, 0, 1, 0, 0 | 1, 1, 0, 1, 1, 0, 1|100,100,100,100,100,100,100", - " 1, 1, X, 1, 1, 0, 0 | 1, 1, 1, 1, 0, 0, 1|100,100,100,100,100,100,100", - " 1, 1, X, 0, 0, 1, 0 | 0, 1, 1, 0, 0, 1, 1|100,100,100,100,100,100,100", - " 1, 1, X, 1, 0, 1, 0 | 1, 0, 1, 1, 0, 1, 1|100,100,100,100,100,100,100", - " 1, 1, X, 0, 1, 1, 0 | 0, 0, 1, 1, 1, 1, 1|100,100,100,100,100,100,100", - " 1, 1, X, 1, 1, 1, 0 | 1, 1, 1, 0, 0, 0, 0|100,100,100,100,100,100,100", - " 1, 1, X, 0, 0, 0, 1 | 1, 1, 1, 1, 1, 1, 1|100,100,100,100,100,100,100", - " 1, 1, X, 1, 0, 0, 1 | 1, 1, 1, 0, 0, 1, 1|100,100,100,100,100,100,100", - " 1, 1, X, 0, 1, 0, 1 | 0, 0, 0, 1, 1, 0, 1|100,100,100,100,100,100,100", - " 1, 1, X, 1, 1, 0, 1 | 0, 0, 1, 1, 0, 0, 1|100,100,100,100,100,100,100", - " 1, 1, X, 0, 0, 1, 1 | 0, 1, 0, 0, 0, 1, 1|100,100,100,100,100,100,100", - " 1, 1, X, 1, 0, 1, 1 | 1, 0, 0, 1, 0, 1, 1|100,100,100,100,100,100,100", - " 1, 1, X, 0, 1, 1, 1 | 0, 0, 0, 1, 1, 1, 1|100,100,100,100,100,100,100", - " 1, 1, X, 1, 1, 1, 1 | 0, 0, 0, 0, 0, 0, 0|100,100,100,100,100,100,100", - - // BI/RBO is input output. In the next case it is used as an input will go low. - " 1, 1, 0, 0, 0, 0, 0 | 0, 0, 0, 0, 0, 0, 0|100,100,100,100,100,100,100", // RBI - - " 0, 1, X, X, X, X, X | 1, 1, 1, 1, 1, 1, 1|100,100,100,100,100,100,100", // LT - - // This condition has precedence - " X, 0, X, X, X, X, X | 0, 0, 0, 0, 0, 0, 0|100,100,100,100,100,100,100", // BI - "" - }; - - NETLIB_OBJECT_DERIVED(7448_dip, 7448) - { - NETLIB_CONSTRUCTOR_DERIVED(7448_dip, 7448) - { - register_subalias("1", m_I[4]); // B - register_subalias("2", m_I[5]); // C - register_subalias("3", m_I[0]); // LTQ - register_subalias("4", m_I[1]); // BIQ - register_subalias("5", m_I[2]); // RBIQ - register_subalias("6", m_I[6]); // D - register_subalias("7", m_I[3]); // A - - register_subalias("9", m_Q[4]); // e - register_subalias("10", m_Q[3]); // d - register_subalias("11", m_Q[2]); // c - register_subalias("12", m_Q[1]); // b - register_subalias("13", m_Q[0]); // a - register_subalias("14", m_Q[6]); // g - register_subalias("15", m_Q[5]); // f - } - }; - - #else + #if !(USE_TRUTHTABLE_7448) #define BITS7(b6,b5,b4,b3,b2,b1,b0) ((b6)<<6) | ((b5)<<5) | ((b4)<<4) | ((b3)<<3) | ((b2)<<2) | ((b1)<<1) | ((b0)<<0) @@ -213,11 +159,11 @@ namespace netlist } } - #endif - - NETLIB_DEVICE_IMPL(7448, "TTL_7448", "+A,+B,+C,+D,+LTQ,+BIQ,+RBIQ") + NETLIB_DEVICE_IMPL(7448, "TTL_7448", "+A,+B,+C,+D,+LTQ,+BIQ,+RBIQ,@VCC,@GND") NETLIB_DEVICE_IMPL(7448_dip, "TTL_7448_DIP", "") + #endif + } //namespace devices } // namespace netlist diff --git a/src/lib/netlist/devices/nld_7448.h b/src/lib/netlist/devices/nld_7448.h index b9c03ae6360..55ebfd8d6e4 100644 --- a/src/lib/netlist/devices/nld_7448.h +++ b/src/lib/netlist/devices/nld_7448.h @@ -27,20 +27,23 @@ #include "netlist/nl_setup.h" #ifndef NL_AUTO_DEVICES - -#define TTL_7448(name, cA0, cA1, cA2, cA3, cLTQ, cBIQ, cRBIQ) \ - NET_REGISTER_DEV(TTL_7448, name) \ - NET_CONNECT(name, A, cA0) \ - NET_CONNECT(name, B, cA1) \ - NET_CONNECT(name, C, cA2) \ - NET_CONNECT(name, D, cA3) \ - NET_CONNECT(name, LTQ, cLTQ) \ - NET_CONNECT(name, BIQ, cBIQ) \ +#if !(USE_TRUTHTABLE_7448) +#define TTL_7448(name, cA0, cA1, cA2, cA3, cLTQ, cBIQ, cRBIQ) \ + NET_REGISTER_DEV(TTL_7448, name) \ + NET_CONNECT(name, VCC, VCC) \ + NET_CONNECT(name, GND, GND) \ + NET_CONNECT(name, A, cA0) \ + NET_CONNECT(name, B, cA1) \ + NET_CONNECT(name, C, cA2) \ + NET_CONNECT(name, D, cA3) \ + NET_CONNECT(name, LTQ, cLTQ) \ + NET_CONNECT(name, BIQ, cBIQ) \ NET_CONNECT(name, RBIQ, cRBIQ) -#define TTL_7448_DIP(name) \ +#define TTL_7448_DIP(name) \ NET_REGISTER_DEV(TTL_7448_DIP, name) #endif +#endif #endif /* NLD_7448_H_ */ diff --git a/src/lib/netlist/devices/nlid_truthtable.h b/src/lib/netlist/devices/nlid_truthtable.h index b22d9780728..564bb16451b 100644 --- a/src/lib/netlist/devices/nlid_truthtable.h +++ b/src/lib/netlist/devices/nlid_truthtable.h @@ -15,19 +15,6 @@ #include "netlist/nl_setup.h" #include "plib/putil.h" -#define NETLIB_TRUTHTABLE(cname, nIN, nOUT) \ - class NETLIB_NAME(cname) : public nld_truthtable_t<nIN, nOUT> \ - { \ - public: \ - template <class C> \ - NETLIB_NAME(cname)(C &owner, const pstring &name) \ - : nld_truthtable_t<nIN, nOUT>(owner, name, family_TTL(), &m_ttbl, m_desc) { } \ - private: \ - static truthtable_t m_ttbl; \ - static std::vector<pstring> m_desc; \ - } - - namespace netlist { namespace devices diff --git a/src/lib/netlist/macro/nlm_ttl74xx.cpp b/src/lib/netlist/macro/nlm_ttl74xx.cpp index 22c3ae976ab..aca01bf6a8b 100644 --- a/src/lib/netlist/macro/nlm_ttl74xx.cpp +++ b/src/lib/netlist/macro/nlm_ttl74xx.cpp @@ -818,6 +818,47 @@ static NETLIST_START(DM9312_DIP) ) NETLIST_END() +#if (USE_TRUTHTABLE_7448) + +/* + * DM7448: BCD to 7-Segment decoders/drivers + * + * +--------------+ + * B |1 ++ 16| VCC + * C |2 15| f + * LAMP TEST |3 14| g + * BI/RBQ |4 7448 13| a + * RBI |5 12| b + * D |6 11| c + * A |7 10| d + * GND |8 9| e + * +--------------+ + * + * + * Naming conventions follow National Semiconductor datasheet + * + */ +#ifndef __PLIB_PREPROCESSOR__ +#define TTL_7448_TT(name) \ + NET_REGISTER_DEV(TTL_7448_TT, name) +#endif + +static NETLIST_START(TTL_7448_DIP) + TTL_7448_TT(s) + + DIPPINS( /* +--------------+ */ + s.B, /* B |1 ++ 16| VCC */ s.VCC, + s.C, /* C |2 15| f */ s.f, + s.LTQ, /* LTQ |3 14| g */ s.g, + s.BIQ, /* BIQ |4 7448 13| a */ s.a, + s.RBIQ, /* RBIQ |5 12| b */ s.b, + s.D, /* D |6 11| c */ s.c, + s.A, /* A |7 10| d */ s.d, + s.GND, /* GND |8 9| e */ s.e + /* +--------------+ */ + ) +NETLIST_END() +#endif NETLIST_START(TTL74XX_lib) NET_MODEL("DM7414 SCHMITT_TRIGGER(VTP=1.7 VTM=0.9 VI=4.35 RI=6.15k VOH=3.5 ROH=120 VOL=0.1 ROL=37.5 TPLH=15 TPHL=15)") @@ -1046,6 +1087,72 @@ NETLIST_START(TTL74XX_lib) TT_FAMILY("74XX") TRUTHTABLE_END() +#if (USE_TRUTHTABLE_7448) + TRUTHTABLE_START(TTL_7448, 7, 7, "+A,+B,+C,+D,+LTQ,+BIQ,+RBIQ,@VCC,@GND") + TT_HEAD(" LTQ,BIQ,RBIQ, A , B , C , D | a, b, c, d, e, f, g") + + TT_LINE(" 1, 1, 1, 0, 0, 0, 0 | 1, 1, 1, 1, 1, 1, 0|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 1, 0, 0, 0 | 0, 1, 1, 0, 0, 0, 0|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 0, 1, 0, 0 | 1, 1, 0, 1, 1, 0, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 1, 1, 0, 0 | 1, 1, 1, 1, 0, 0, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 0, 0, 1, 0 | 0, 1, 1, 0, 0, 1, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 1, 0, 1, 0 | 1, 0, 1, 1, 0, 1, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 0, 1, 1, 0 | 0, 0, 1, 1, 1, 1, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 1, 1, 1, 0 | 1, 1, 1, 0, 0, 0, 0|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 0, 0, 0, 1 | 1, 1, 1, 1, 1, 1, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 1, 0, 0, 1 | 1, 1, 1, 0, 0, 1, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 0, 1, 0, 1 | 0, 0, 0, 1, 1, 0, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 1, 1, 0, 1 | 0, 0, 1, 1, 0, 0, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 0, 0, 1, 1 | 0, 1, 0, 0, 0, 1, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 1, 0, 1, 1 | 1, 0, 0, 1, 0, 1, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 0, 1, 1, 1 | 0, 0, 0, 1, 1, 1, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 1, 1, 1, 1 | 0, 0, 0, 0, 0, 0, 0|100,100,100,100,100,100,100") + + // BI/RBO is input output. In the next case it is used as an input will go low. + TT_LINE(" 1, 1, 0, 0, 0, 0, 0 | 0, 0, 0, 0, 0, 0, 0|100,100,100,100,100,100,100") // RBI + + TT_LINE(" 0, 1, X, X, X, X, X | 1, 1, 1, 1, 1, 1, 1|100,100,100,100,100,100,100") // LT + + // This condition has precedence + TT_LINE(" X, 0, X, X, X, X, X | 0, 0, 0, 0, 0, 0, 0|100,100,100,100,100,100,100") // BI + TT_FAMILY("74XX") + + TRUTHTABLE_END() + + // FIXME: We need a more elegant solution than defining twice + TRUTHTABLE_START(TTL_7448_TT, 7, 7, "") + TT_HEAD(" LTQ,BIQ,RBIQ, A , B , C , D | a, b, c, d, e, f, g") + + TT_LINE(" 1, 1, 1, 0, 0, 0, 0 | 1, 1, 1, 1, 1, 1, 0|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 1, 0, 0, 0 | 0, 1, 1, 0, 0, 0, 0|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 0, 1, 0, 0 | 1, 1, 0, 1, 1, 0, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 1, 1, 0, 0 | 1, 1, 1, 1, 0, 0, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 0, 0, 1, 0 | 0, 1, 1, 0, 0, 1, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 1, 0, 1, 0 | 1, 0, 1, 1, 0, 1, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 0, 1, 1, 0 | 0, 0, 1, 1, 1, 1, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 1, 1, 1, 0 | 1, 1, 1, 0, 0, 0, 0|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 0, 0, 0, 1 | 1, 1, 1, 1, 1, 1, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 1, 0, 0, 1 | 1, 1, 1, 0, 0, 1, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 0, 1, 0, 1 | 0, 0, 0, 1, 1, 0, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 1, 1, 0, 1 | 0, 0, 1, 1, 0, 0, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 0, 0, 1, 1 | 0, 1, 0, 0, 0, 1, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 1, 0, 1, 1 | 1, 0, 0, 1, 0, 1, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 0, 1, 1, 1 | 0, 0, 0, 1, 1, 1, 1|100,100,100,100,100,100,100") + TT_LINE(" 1, 1, X, 1, 1, 1, 1 | 0, 0, 0, 0, 0, 0, 0|100,100,100,100,100,100,100") + + // BI/RBO is input output. In the next case it is used as an input will go low. + TT_LINE(" 1, 1, 0, 0, 0, 0, 0 | 0, 0, 0, 0, 0, 0, 0|100,100,100,100,100,100,100") // RBI + + TT_LINE(" 0, 1, X, X, X, X, X | 1, 1, 1, 1, 1, 1, 1|100,100,100,100,100,100,100") // LT + + // This condition has precedence + TT_LINE(" X, 0, X, X, X, X, X | 0, 0, 0, 0, 0, 0, 0|100,100,100,100,100,100,100") // BI + TT_FAMILY("74XX") + + TRUTHTABLE_END() + +#endif + TRUTHTABLE_START(TTL_7437_NAND, 2, 1, "+A,+B") TT_HEAD("A,B|Q ") TT_LINE("0,X|1|22") @@ -1197,6 +1304,9 @@ NETLIST_START(TTL74XX_lib) LOCAL_LIB_ENTRY(TTL_7430_DIP) LOCAL_LIB_ENTRY(TTL_7432_DIP) LOCAL_LIB_ENTRY(TTL_7437_DIP) +#if (USE_TRUTHTABLE_7448) + LOCAL_LIB_ENTRY(TTL_7448_DIP) +#endif LOCAL_LIB_ENTRY(TTL_7486_DIP) LOCAL_LIB_ENTRY(TTL_74155_DIP) LOCAL_LIB_ENTRY(TTL_74156_DIP) diff --git a/src/lib/netlist/macro/nlm_ttl74xx.h b/src/lib/netlist/macro/nlm_ttl74xx.h index 527aebf6d29..38a08f99e03 100644 --- a/src/lib/netlist/macro/nlm_ttl74xx.h +++ b/src/lib/netlist/macro/nlm_ttl74xx.h @@ -209,6 +209,24 @@ NET_REGISTER_DEV(TTL_7437_DIP, name) +#if (USE_TRUTHTABLE_7448) +#define TTL_7448(name, cA0, cA1, cA2, cA3, cLTQ, cBIQ, cRBIQ) \ + NET_REGISTER_DEV(TTL_7448, name) \ + NET_CONNECT(name, VCC, VCC) \ + NET_CONNECT(name, GND, GND) \ + NET_CONNECT(name, A, cA0) \ + NET_CONNECT(name, B, cA1) \ + NET_CONNECT(name, C, cA2) \ + NET_CONNECT(name, D, cA3) \ + NET_CONNECT(name, LTQ, cLTQ) \ + NET_CONNECT(name, BIQ, cBIQ) \ + NET_CONNECT(name, RBIQ, cRBIQ) + +#define TTL_7448_DIP(name) \ + NET_REGISTER_DEV(TTL_7448_DIP, name) + +#endif + #define TTL_7486_GATE(name) \ NET_REGISTER_DEV(TTL_7486_GATE, name) |
