diff options
author | 2012-12-18 09:36:12 +0000 | |
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committer | 2012-12-18 09:36:12 +0000 | |
commit | 4e8389ee4f2775ff3011d62eec38a62d3fe81d49 (patch) | |
tree | a0cd9fdd425a644f5a2ea8eb316ba75e4e9d6b16 /src/emu/cpu/mcs96 | |
parent | 30f660cc76ae6df6987f3fc0f5d9af751e071f9c (diff) |
mcs96: Fix V setting on divb [O. Galibert]
Diffstat (limited to 'src/emu/cpu/mcs96')
-rw-r--r-- | src/emu/cpu/mcs96/mcs96ops.lst | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/emu/cpu/mcs96/mcs96ops.lst b/src/emu/cpu/mcs96/mcs96ops.lst index e5ffdf2a663..40084dfa161 100644 --- a/src/emu/cpu/mcs96/mcs96ops.lst +++ b/src/emu/cpu/mcs96/mcs96ops.lst @@ -1157,7 +1157,7 @@ fe9c divb direct_2 if(OP1) { TMP = reg_r16(OP2); UINT32 TMP2 = INT16(TMP) / INT8(OP1); - if(INT8(TMP2) > 127 || INT8(TMP2) < -128) + if(INT16(TMP2) > 127 || INT16(TMP2) < -128) PSW |= F_V|F_VT; TMP = INT16(TMP) % INT8(OP1); TMP = (TMP2 & 0xff) | ((TMP & 0xff) << 8); @@ -1170,7 +1170,7 @@ fe9d divb immed_2b if(OP1) { TMP = reg_r16(OP2); UINT32 TMP2 = INT16(TMP) / INT8(OP1); - if(INT8(TMP2) > 127 || INT8(TMP2) < -128) + if(INT16(TMP2) > 127 || INT16(TMP2) < -128) PSW |= F_V|F_VT; TMP = INT16(TMP) % INT8(OP1); TMP = (TMP2 & 0xff) | ((TMP & 0xff) << 8); |