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author Andrew Gardner <andrew-gardner@users.noreply.github.com>2013-01-08 05:44:36 +0000
committer Andrew Gardner <andrew-gardner@users.noreply.github.com>2013-01-08 05:44:36 +0000
commita5c451ab17a647a4d5e3ceeddb93963a0c9a8a2c (patch)
treead9b0cd7bb1e9f90b2ffb9b83531419ce0b697f8 /src/emu/cpu/dsp16
parent62753a82b699ff9d67be04fb5d8b19c684400f2c (diff)
dsp16: Few more opcodes & spaces->tabs. (nw)
Diffstat (limited to 'src/emu/cpu/dsp16')
-rw-r--r--src/emu/cpu/dsp16/dsp16.c21
-rw-r--r--src/emu/cpu/dsp16/dsp16.h21
-rw-r--r--src/emu/cpu/dsp16/dsp16dis.c1020
-rw-r--r--src/emu/cpu/dsp16/dsp16ops.c169
4 files changed, 678 insertions, 553 deletions
diff --git a/src/emu/cpu/dsp16/dsp16.c b/src/emu/cpu/dsp16/dsp16.c
index e082c81f8a0..dc76c854653 100644
--- a/src/emu/cpu/dsp16/dsp16.c
+++ b/src/emu/cpu/dsp16/dsp16.c
@@ -31,6 +31,7 @@ const device_type DSP16 = &device_creator<dsp16_device>;
dsp16_device::dsp16_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, DSP16, "DSP16", tag, owner, clock),
m_program_config("program", ENDIANNESS_LITTLE, 16, 16, -1),
+ m_data_config("data", ENDIANNESS_LITTLE, 16, 16, -1),
m_i(0),
m_pc(0),
m_pt(0),
@@ -62,10 +63,11 @@ dsp16_device::dsp16_device(const machine_config &mconfig, const char *tag, devic
m_cacheRedoNextPC(CACHE_INVALID),
m_cacheIterations(0),
m_program(NULL),
+ m_data(NULL),
m_direct(NULL),
m_icount(0)
{
- // Allocate & setup
+ // Allocate & setup
}
@@ -140,6 +142,7 @@ void dsp16_device::device_start()
// get our address spaces
m_program = &space(AS_PROGRAM);
+ m_data = &space(AS_DATA);
m_direct = &m_program->direct();
// set our instruction counter
@@ -178,7 +181,9 @@ void dsp16_device::device_reset()
const address_space_config *dsp16_device::memory_space_config(address_spacenum spacenum) const
{
- return (spacenum == AS_PROGRAM) ? &m_program_config : NULL;
+ return (spacenum == AS_PROGRAM) ? &m_program_config :
+ (spacenum == AS_DATA) ? &m_data_config :
+ NULL;
}
@@ -242,14 +247,14 @@ offs_t dsp16_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *op
MEMORY ACCESSORS
***************************************************************************/
-inline UINT32 dsp16_device::program_read(UINT32 addr)
+inline UINT32 dsp16_device::data_read(const UINT16& addr)
{
- return m_program->read_dword(addr << 1);
+ return m_data->read_word(addr << 1);
}
-inline void dsp16_device::program_write(UINT32 addr, UINT32 data)
+inline void dsp16_device::data_write(const UINT16& addr, const UINT16& data)
{
- m_program->write_dword(addr << 1, data & 0xffff);
+ m_data->write_word(addr << 1, data & 0xffff);
}
inline UINT32 dsp16_device::opcode_read(const UINT8 pcOffset)
@@ -312,11 +317,9 @@ void dsp16_device::execute_run()
// instruction fetch & execute
UINT8 cycles;
- INT16 pcAdvance;
+ UINT8 pcAdvance;
const UINT16 op = opcode_read();
- printf("%d ", m_cacheIterations);
execute_one(op, cycles, pcAdvance);
- printf("%d\n", m_cacheIterations);
// step
m_pc += pcAdvance;
diff --git a/src/emu/cpu/dsp16/dsp16.h b/src/emu/cpu/dsp16/dsp16.h
index ed69aff5b99..7bdee3838ac 100644
--- a/src/emu/cpu/dsp16/dsp16.h
+++ b/src/emu/cpu/dsp16/dsp16.h
@@ -51,6 +51,7 @@ protected:
// address spaces
const address_space_config m_program_config;
+ const address_space_config m_data_config;
// CPU registers
// ROM Address Arithmetic Unit (XAAU)
@@ -83,7 +84,7 @@ protected:
UINT16 m_sioc;
UINT16 m_pioc;
- // internal stuff
+ // internal stuff
UINT16 m_ppc;
// This core handles the cache as more of a loop than 15 seperate memory elements.
@@ -95,23 +96,29 @@ protected:
static const UINT16 CACHE_INVALID = 0xffff;
// memory access
- inline UINT32 program_read(UINT32 addr);
- inline void program_write(UINT32 addr, UINT32 data);
+ inline UINT32 data_read(const UINT16& addr);
+ inline void data_write(const UINT16& addr, const UINT16& data);
inline UINT32 opcode_read(const UINT8 pcOffset=0);
// address spaces
- address_space* m_program;
- direct_read_data* m_direct;
+ address_space* m_program;
+ address_space* m_data;
+ direct_read_data* m_direct;
// other internal states
- int m_icount;
+ int m_icount;
// operations
- void execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance);
+ void execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance);
// table decoders
void* registerFromRImmediateField(const UINT8& R);
void* registerFromRTable(const UINT8& R);
+ void* registerFromYFieldUpper(const UINT8& Y);
+
+ // execution
+ void executeF1Field(const UINT8& F1, const UINT8& D, const UINT8& S);
+ void executeYFieldPost(const UINT8& Y);
// helpers
void* addressYL();
diff --git a/src/emu/cpu/dsp16/dsp16dis.c b/src/emu/cpu/dsp16/dsp16dis.c
index 819c90eaa25..59fdd6008d1 100644
--- a/src/emu/cpu/dsp16/dsp16dis.c
+++ b/src/emu/cpu/dsp16/dsp16dis.c
@@ -3,438 +3,438 @@
astring disasmF1Field(const UINT8& F1, const UINT8& D, const UINT8& S)
{
- astring ret = "";
- switch (F1)
- {
- case 0x00: ret.printf("a%d = p, p = x*y", D); break;
- case 0x01: ret.printf("a%d = a%d + p, p = x*y", D, S); break;
- case 0x02: ret.printf("p = x*y"); break;
- case 0x03: ret.printf("a%d = a%d - p, p = x*y", D, S); break;
- case 0x04: ret.printf("a%d = p", D); break;
- case 0x05: ret.printf("a%d = a%d + p", D, S); break;
- case 0x06: ret.printf("NOP"); break;
- case 0x07: ret.printf("a%d = a%d - p", D, S); break;
- case 0x08: ret.printf("a%d = a%d | y", D, S); break;
- case 0x09: ret.printf("a%d = a%d ^ y", D, S); break;
- case 0x0a: ret.printf("a%d & y", S); break;
- case 0x0b: ret.printf("a%d - y", S); break;
- case 0x0c: ret.printf("a%d = y", D); break;
- case 0x0d: ret.printf("a%d = a%d + y", D, S); break;
- case 0x0e: ret.printf("a%d = a%d & y", D, S); break;
- case 0x0f: ret.printf("a%d = a%d - y", D, S); break;
-
- default: return "UNKNOWN";
- }
- return ret;
+ astring ret = "";
+ switch (F1)
+ {
+ case 0x00: ret.printf("a%d = p, p = x*y", D); break;
+ case 0x01: ret.printf("a%d = a%d + p, p = x*y", D, S); break;
+ case 0x02: ret.printf("p = x*y"); break;
+ case 0x03: ret.printf("a%d = a%d - p, p = x*y", D, S); break;
+ case 0x04: ret.printf("a%d = p", D); break;
+ case 0x05: ret.printf("a%d = a%d + p", D, S); break;
+ case 0x06: ret.printf("NOP"); break;
+ case 0x07: ret.printf("a%d = a%d - p", D, S); break;
+ case 0x08: ret.printf("a%d = a%d | y", D, S); break;
+ case 0x09: ret.printf("a%d = a%d ^ y", D, S); break;
+ case 0x0a: ret.printf("a%d & y", S); break;
+ case 0x0b: ret.printf("a%d - y", S); break;
+ case 0x0c: ret.printf("a%d = y", D); break;
+ case 0x0d: ret.printf("a%d = a%d + y", D, S); break;
+ case 0x0e: ret.printf("a%d = a%d & y", D, S); break;
+ case 0x0f: ret.printf("a%d = a%d - y", D, S); break;
+
+ default: return "UNKNOWN";
+ }
+ return ret;
}
astring disasmYField(const UINT8& Y)
{
- switch (Y)
- {
- case 0x00: return "*r0";
- case 0x01: return "*r0++";
- case 0x02: return "*r0--";
- case 0x03: return "*r0++j";
-
- case 0x04: return "*r1";
- case 0x05: return "*r1++";
- case 0x06: return "*r1--";
- case 0x07: return "*r1++j";
-
- case 0x08: return "*r2";
- case 0x09: return "*r2++";
- case 0x0a: return "*r2--";
- case 0x0b: return "*r2++j";
-
- case 0x0c: return "*r3";
- case 0x0d: return "*r3++";
- case 0x0e: return "*r3--";
- case 0x0f: return "*r3++j";
-
- default: return "UNKNOWN";
- }
- return "";
+ switch (Y)
+ {
+ case 0x00: return "*r0";
+ case 0x01: return "*r0++";
+ case 0x02: return "*r0--";
+ case 0x03: return "*r0++j";
+
+ case 0x04: return "*r1";
+ case 0x05: return "*r1++";
+ case 0x06: return "*r1--";
+ case 0x07: return "*r1++j";
+
+ case 0x08: return "*r2";
+ case 0x09: return "*r2++";
+ case 0x0a: return "*r2--";
+ case 0x0b: return "*r2++j";
+
+ case 0x0c: return "*r3";
+ case 0x0d: return "*r3++";
+ case 0x0e: return "*r3--";
+ case 0x0f: return "*r3++j";
+
+ default: return "UNKNOWN";
+ }
+ return "";
}
astring disasmZField(const UINT8& Z)
{
- switch (Z)
- {
- case 0x00: return "*r0zp";
- case 0x01: return "*r0pz";
- case 0x02: return "*r0m2";
- case 0x03: return "*r0jk";
-
- case 0x04: return "*r1zp";
- case 0x05: return "*r1pz";
- case 0x06: return "*r1m2";
- case 0x07: return "*r1jk";
-
- case 0x08: return "*r2zp";
- case 0x09: return "*r2pz";
- case 0x0a: return "*r2m2";
- case 0x0b: return "*r2jk";
-
- case 0x0c: return "*r3zp";
- case 0x0d: return "*r3pz";
- case 0x0e: return "*r3m2";
- case 0x0f: return "*r3jk";
-
- default: return "UNKNOWN";
- }
- return "";
+ switch (Z)
+ {
+ case 0x00: return "*r0zp";
+ case 0x01: return "*r0pz";
+ case 0x02: return "*r0m2";
+ case 0x03: return "*r0jk";
+
+ case 0x04: return "*r1zp";
+ case 0x05: return "*r1pz";
+ case 0x06: return "*r1m2";
+ case 0x07: return "*r1jk";
+
+ case 0x08: return "*r2zp";
+ case 0x09: return "*r2pz";
+ case 0x0a: return "*r2m2";
+ case 0x0b: return "*r2jk";
+
+ case 0x0c: return "*r3zp";
+ case 0x0d: return "*r3pz";
+ case 0x0e: return "*r3m2";
+ case 0x0f: return "*r3jk";
+
+ default: return "UNKNOWN";
+ }
+ return "";
}
astring disasmF2Field(const UINT8& F2, const UINT8& D, const UINT8& S)
{
- astring ret = "";
- switch (F2)
- {
- case 0x00: ret.printf("a%d = a%d >> 1", D, S); break;
- case 0x01: ret.printf("a%d = a%d << 1", D, S); break;
- case 0x02: ret.printf("a%d = a%d >> 4", D, S); break;
- case 0x03: ret.printf("a%d = a%d << 4", D, S); break;
- case 0x04: ret.printf("a%d = a%d >> 8", D, S); break;
- case 0x05: ret.printf("a%d = a%d << 8", D, S); break;
- case 0x06: ret.printf("a%d = a%d >> 16", D, S); break;
- case 0x07: ret.printf("a%d = a%d << 16", D, S); break;
-
- case 0x08: ret.printf("a%d = p", D); break;
- case 0x09: ret.printf("a%dh = a%dh + 1", D, S); break;
- case 0x0a: ret.printf("RESERVED"); break;
- case 0x0b: ret.printf("a%d = rnd(a%d)", D, S); break;
- case 0x0c: ret.printf("a%d = y", D); break;
- case 0x0d: ret.printf("a%d = a%d + 1", D, S); break;
- case 0x0e: ret.printf("a%d = a%d", D, S); break;
- case 0x0f: ret.printf("a%d = -a%d", D, S); break;
-
- default: return "UNKNOWN";
- }
- return "";
+ astring ret = "";
+ switch (F2)
+ {
+ case 0x00: ret.printf("a%d = a%d >> 1", D, S); break;
+ case 0x01: ret.printf("a%d = a%d << 1", D, S); break;
+ case 0x02: ret.printf("a%d = a%d >> 4", D, S); break;
+ case 0x03: ret.printf("a%d = a%d << 4", D, S); break;
+ case 0x04: ret.printf("a%d = a%d >> 8", D, S); break;
+ case 0x05: ret.printf("a%d = a%d << 8", D, S); break;
+ case 0x06: ret.printf("a%d = a%d >> 16", D, S); break;
+ case 0x07: ret.printf("a%d = a%d << 16", D, S); break;
+
+ case 0x08: ret.printf("a%d = p", D); break;
+ case 0x09: ret.printf("a%dh = a%dh + 1", D, S); break;
+ case 0x0a: ret.printf("RESERVED"); break;
+ case 0x0b: ret.printf("a%d = rnd(a%d)", D, S); break;
+ case 0x0c: ret.printf("a%d = y", D); break;
+ case 0x0d: ret.printf("a%d = a%d + 1", D, S); break;
+ case 0x0e: ret.printf("a%d = a%d", D, S); break;
+ case 0x0f: ret.printf("a%d = -a%d", D, S); break;
+
+ default: return "UNKNOWN";
+ }
+ return "";
}
astring disasmCONField(const UINT8& CON)
{
- switch (CON)
- {
- case 0x00: return "mi";
- case 0x01: return "pl";
- case 0x02: return "eq";
- case 0x03: return "ne";
- case 0x04: return "lvs";
- case 0x05: return "lvc";
- case 0x06: return "mvs";
- case 0x07: return "mvc";
- case 0x08: return "heads";
- case 0x09: return "tails";
- case 0x0a: return "c0ge";
- case 0x0b: return "c0lt";
- case 0x0c: return "c1ge";
- case 0x0d: return "c1lt";
- case 0x0e: return "true";
- case 0x0f: return "false";
- case 0x10: return "gt";
- case 0x11: return "le";
-
- default: return "RESERVED";
- }
- return "";
+ switch (CON)
+ {
+ case 0x00: return "mi";
+ case 0x01: return "pl";
+ case 0x02: return "eq";
+ case 0x03: return "ne";
+ case 0x04: return "lvs";
+ case 0x05: return "lvc";
+ case 0x06: return "mvs";
+ case 0x07: return "mvc";
+ case 0x08: return "heads";
+ case 0x09: return "tails";
+ case 0x0a: return "c0ge";
+ case 0x0b: return "c0lt";
+ case 0x0c: return "c1ge";
+ case 0x0d: return "c1lt";
+ case 0x0e: return "true";
+ case 0x0f: return "false";
+ case 0x10: return "gt";
+ case 0x11: return "le";
+
+ default: return "RESERVED";
+ }
+ return "";
}
astring disasmBField(const UINT8& B)
{
- switch (B)
- {
- case 0x00: return "return";
- case 0x01: return "ireturn";
- case 0x02: return "goto pt";
- case 0x03: return "call pt";
- case 0x04:
- case 0x05:
- case 0x06:
- case 0x07: return "RESERVED";
-
- default: return "UNKNOWN";
- }
- return "";
+ switch (B)
+ {
+ case 0x00: return "return";
+ case 0x01: return "ireturn";
+ case 0x02: return "goto pt";
+ case 0x03: return "call pt";
+ case 0x04:
+ case 0x05:
+ case 0x06:
+ case 0x07: return "RESERVED";
+
+ default: return "UNKNOWN";
+ }
+ return "";
}
astring disasmRImmediateField(const UINT8& R)
{
- switch (R)
- {
- case 0x00: return "j";
- case 0x01: return "k";
- case 0x02: return "rb";
- case 0x03: return "re";
- case 0x04: return "r0";
- case 0x05: return "r1";
- case 0x06: return "r2";
- case 0x07: return "r3";
-
- default: return "UNKNOWN";
- }
- return "";
+ switch (R)
+ {
+ case 0x00: return "j";
+ case 0x01: return "k";
+ case 0x02: return "rb";
+ case 0x03: return "re";
+ case 0x04: return "r0";
+ case 0x05: return "r1";
+ case 0x06: return "r2";
+ case 0x07: return "r3";
+
+ default: return "UNKNOWN";
+ }
+ return "";
}
astring disasmRField(const UINT8& R)
{
- switch (R)
- {
+ switch (R)
+ {
case 0x00: return "r0";
- case 0x01: return "r1";
- case 0x02: return "r2";
- case 0x03: return "r3";
- case 0x04: return "j";
- case 0x05: return "k";
- case 0x06: return "rb";
- case 0x07: return "re";
- case 0x08: return "pt";
- case 0x09: return "pr";
- case 0x0a: return "pi";
- case 0x0b: return "i";
-
- case 0x10: return "x";
- case 0x11: return "y";
- case 0x12: return "yl";
- case 0x13: return "auc";
- case 0x14: return "psw";
- case 0x15: return "c0";
- case 0x16: return "c1";
- case 0x17: return "c2";
+ case 0x01: return "r1";
+ case 0x02: return "r2";
+ case 0x03: return "r3";
+ case 0x04: return "j";
+ case 0x05: return "k";
+ case 0x06: return "rb";
+ case 0x07: return "re";
+ case 0x08: return "pt";
+ case 0x09: return "pr";
+ case 0x0a: return "pi";
+ case 0x0b: return "i";
+
+ case 0x10: return "x";
+ case 0x11: return "y";
+ case 0x12: return "yl";
+ case 0x13: return "auc";
+ case 0x14: return "psw";
+ case 0x15: return "c0";
+ case 0x16: return "c1";
+ case 0x17: return "c2";
case 0x18: return "sioc";
- case 0x19: return "srta";
- case 0x1a: return "sdx";
- case 0x1b: return "tdms";
- case 0x1c: return "pioc";
- case 0x1d: return "pdx0";
- case 0x1e: return "pdx1";
-
- default: return "RESERVED";
- }
- return "";
+ case 0x19: return "srta";
+ case 0x1a: return "sdx";
+ case 0x1b: return "tdms";
+ case 0x1c: return "pioc";
+ case 0x1d: return "pdx0";
+ case 0x1e: return "pdx1";
+
+ default: return "RESERVED";
+ }
+ return "";
}
astring disasmIField(const UINT8& I)
{
- switch (I)
- {
- case 0x00: return "r0/j";
- case 0x01: return "r1/k";
- case 0x02: return "r2/rb";
- case 0x03: return "r3/re";
-
- default: return "UNKNOWN";
- }
- return "";
+ switch (I)
+ {
+ case 0x00: return "r0/j";
+ case 0x01: return "r1/k";
+ case 0x02: return "r2/rb";
+ case 0x03: return "r3/re";
+
+ default: return "UNKNOWN";
+ }
+ return "";
}
bool disasmSIField(const UINT8& SI)
{
- switch (SI)
- {
- case 0x00: return 0; // Not a software interrupt
- case 0x01: return 1; // Software Interrupt
- }
- return false;
+ switch (SI)
+ {
+ case 0x00: return 0; // Not a software interrupt
+ case 0x01: return 1; // Software Interrupt
+ }
+ return false;
}
CPU_DISASSEMBLE( dsp16a )
{
- UINT8 opSize = 1;
- UINT32 dasmflags = 0;
- UINT16 op = oprom[0] | (oprom[1] << 8);
- UINT16 op2 = oprom[2] | (oprom[3] << 8);
-
- // TODO: Test for previous "if CON" instruction and tab the next instruction in?
-
- const UINT8 opcode = (op >> 11) & 0x1f;
- switch(opcode)
- {
- // Format 1: Multiply/ALU Read/Write Group
- case 0x06:
- {
- // F1, Y
- const UINT8 Y = (op & 0x000f);
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
- astring yString = disasmYField(Y);
- astring fString = disasmF1Field(F1, D, S);
- sprintf(buffer, "%s, %s", fString.cstr(), yString.cstr());
- break;
- }
- case 0x04: case 0x1c:
- {
- // F1 Y=a0[1] | F1 Y=a1[1]
- const UINT8 Y = (op & 0x000f);
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
- astring yString = disasmYField(Y);
- astring fString = disasmF1Field(F1, D, S);
- astring aString = (opcode == 0x1c) ? "a0" : "a1";
- sprintf(buffer, "%s = %s, %s", yString.cstr(), aString.cstr(), fString.cstr());
- break;
- }
- case 0x16:
- {
- // F1, x = Y
- const UINT8 Y = (op & 0x000f);
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
- astring yString = disasmYField(Y);
- astring fString = disasmF1Field(F1, D, S);
- sprintf(buffer, "%s, x = %s", fString.cstr(), yString.cstr());
- break;
- }
- case 0x17:
- {
- // F1, y[l] = Y
- const UINT8 Y = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
- astring yString = disasmYField(Y);
- astring fString = disasmF1Field(F1, D, S);
- astring xString = (X ? "y" : "y1");
- sprintf(buffer, "%s, %s = %s", fString.cstr(), xString.cstr(), yString.cstr());
- break;
- }
- case 0x1f:
- {
- // F1, y = Y, x = *pt++[i]
- const UINT8 Y = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
- astring yString = disasmYField(Y);
- astring fString = disasmF1Field(F1, D, S);
- astring xString = (X ? "*pt++i" : "*pt++");
- sprintf(buffer, "%s, y = %s, x = %s", fString.cstr(), yString.cstr(), xString.cstr());
- break;
- }
- case 0x19: case 0x1b:
- {
- // F1, y = a0|1, x = *pt++[i]
- const UINT8 Y = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
- astring fString = disasmF1Field(F1, D, S);
- astring xString = (X ? "*pt++i" : "*pt++");
- astring aString = (opcode == 0x19) ? "a0" : "a1";
- sprintf(buffer, "%s, y = %s, x = %s", fString.cstr(), aString.cstr(), xString.cstr());
- if (Y != 0x00) sprintf(buffer, "UNKNOWN");
- break;
- }
- case 0x14:
- {
- // F1, Y = y[1]
- const UINT8 Y = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
- astring yString = disasmYField(Y);
- astring xString = (X ? "y" : "y1");
- astring fString = disasmF1Field(F1, D, S);
- sprintf(buffer, "%s, %s = %s", fString.cstr(), yString.cstr(), xString.cstr());
- break;
- }
-
- // Format 1a: Multiply/ALU Read/Write Group (major typo in docs on p3-51)
- case 0x07:
- {
- // F1, At[1] = Y
- const UINT8 Y = (op & 0x000f);
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 aT = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
- astring yString = disasmYField(Y);
- astring atString = (aT ? "a0" : "a1");
- astring fString = disasmF1Field(F1, aT, S);
- sprintf(buffer, "%s, %s = %s", fString.cstr(), atString.cstr(), yString.cstr());
- break;
- }
-
- // Format 2: Multiply/ALU Read/Write Group
- case 0x15:
- {
- // F1, Z : y[1]
- const UINT8 Z = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
- astring zString = disasmZField(Z);
- astring xString = (X ? "y" : "y1");
- astring fString = disasmF1Field(F1, D, S);
- sprintf(buffer, "%s, %s <=> %s", fString.cstr(), xString.cstr(), zString.cstr());
- break;
- }
- case 0x1d:
- {
- // F1, Z : y, x=*pt++[i]
- const UINT8 Z = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
- astring zString = disasmZField(Z);
- astring xString = (X ? "*pt++i" : "*pt++");
- astring fString = disasmF1Field(F1, D, S);
- sprintf(buffer, "%s, %s <=> y, x = %s", fString.cstr(), zString.cstr(), xString.cstr());
- break;
- }
-
- // Format 2a: Multiply/ALU Read/Write Group
- case 0x05:
- {
- // F1, Z : aT[1]
- const UINT8 Z = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 aT = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
- astring zString = disasmZField(Z);
- astring atString = (aT ? "a0" : "a1");
- atString += X ? "" : "1"; // TODO: Figure out unclear wording.
- astring fString = disasmF1Field(F1, aT, S);
- sprintf(buffer, "%s, %s <=> %s", fString.cstr(), zString.cstr(), atString.cstr());
- break;
- }
-
- // Format 3: Special Functions
- case 0x12:
- case 0x13:
- {
- // if|ifc CON F2
- const UINT8 CON = (op & 0x001f);
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F2 = (op & 0x01e0) >> 5;
- astring fString = disasmF2Field(F2, D, S);
- astring conString = disasmCONField(CON);
- if (op & 0x0800) sprintf(buffer, "if %s : %s", conString.cstr(), fString.cstr());
- else sprintf(buffer, "ifc %s : %s", conString.cstr(), fString.cstr());
- break;
- }
-
- // Format 4: Branch Direct Group
- case 0x00: case 0x01:
- {
+ UINT8 opSize = 1;
+ UINT32 dasmflags = 0;
+ UINT16 op = oprom[0] | (oprom[1] << 8);
+ UINT16 op2 = oprom[2] | (oprom[3] << 8);
+
+ // TODO: Test for previous "if CON" instruction and tab the next instruction in?
+
+ const UINT8 opcode = (op >> 11) & 0x1f;
+ switch(opcode)
+ {
+ // Format 1: Multiply/ALU Read/Write Group
+ case 0x06:
+ {
+ // F1, Y
+ const UINT8 Y = (op & 0x000f);
+ const UINT8 S = (op & 0x0200) >> 9;
+ const UINT8 D = (op & 0x0400) >> 10;
+ const UINT8 F1 = (op & 0x01e0) >> 5;
+ astring yString = disasmYField(Y);
+ astring fString = disasmF1Field(F1, D, S);
+ sprintf(buffer, "%s, %s", fString.cstr(), yString.cstr());
+ break;
+ }
+ case 0x04: case 0x1c:
+ {
+ // F1 Y=a0[1] | F1 Y=a1[1]
+ const UINT8 Y = (op & 0x000f);
+ const UINT8 S = (op & 0x0200) >> 9;
+ const UINT8 D = (op & 0x0400) >> 10;
+ const UINT8 F1 = (op & 0x01e0) >> 5;
+ astring yString = disasmYField(Y);
+ astring fString = disasmF1Field(F1, D, S);
+ astring aString = (opcode == 0x1c) ? "a0" : "a1";
+ sprintf(buffer, "%s = %s, %s", yString.cstr(), aString.cstr(), fString.cstr());
+ break;
+ }
+ case 0x16:
+ {
+ // F1, x = Y
+ const UINT8 Y = (op & 0x000f);
+ const UINT8 S = (op & 0x0200) >> 9;
+ const UINT8 D = (op & 0x0400) >> 10;
+ const UINT8 F1 = (op & 0x01e0) >> 5;
+ astring yString = disasmYField(Y);
+ astring fString = disasmF1Field(F1, D, S);
+ sprintf(buffer, "%s, x = %s", fString.cstr(), yString.cstr());
+ break;
+ }
+ case 0x17:
+ {
+ // F1, y[l] = Y
+ const UINT8 Y = (op & 0x000f);
+ const UINT8 X = (op & 0x0010) >> 4;
+ const UINT8 S = (op & 0x0200) >> 9;
+ const UINT8 D = (op & 0x0400) >> 10;
+ const UINT8 F1 = (op & 0x01e0) >> 5;
+ astring yString = disasmYField(Y);
+ astring fString = disasmF1Field(F1, D, S);
+ astring xString = (X ? "y" : "y1");
+ sprintf(buffer, "%s, %s = %s", fString.cstr(), xString.cstr(), yString.cstr());
+ break;
+ }
+ case 0x1f:
+ {
+ // F1, y = Y, x = *pt++[i]
+ const UINT8 Y = (op & 0x000f);
+ const UINT8 X = (op & 0x0010) >> 4;
+ const UINT8 S = (op & 0x0200) >> 9;
+ const UINT8 D = (op & 0x0400) >> 10;
+ const UINT8 F1 = (op & 0x01e0) >> 5;
+ astring yString = disasmYField(Y);
+ astring fString = disasmF1Field(F1, D, S);
+ astring xString = (X ? "*pt++i" : "*pt++");
+ sprintf(buffer, "%s, y = %s, x = %s", fString.cstr(), yString.cstr(), xString.cstr());
+ break;
+ }
+ case 0x19: case 0x1b:
+ {
+ // F1, y = a0|1, x = *pt++[i]
+ const UINT8 Y = (op & 0x000f);
+ const UINT8 X = (op & 0x0010) >> 4;
+ const UINT8 S = (op & 0x0200) >> 9;
+ const UINT8 D = (op & 0x0400) >> 10;
+ const UINT8 F1 = (op & 0x01e0) >> 5;
+ astring fString = disasmF1Field(F1, D, S);
+ astring xString = (X ? "*pt++i" : "*pt++");
+ astring aString = (opcode == 0x19) ? "a0" : "a1";
+ sprintf(buffer, "%s, y = %s, x = %s", fString.cstr(), aString.cstr(), xString.cstr());
+ if (Y != 0x00) sprintf(buffer, "UNKNOWN");
+ break;
+ }
+ case 0x14:
+ {
+ // F1, Y = y[1]
+ const UINT8 Y = (op & 0x000f);
+ const UINT8 X = (op & 0x0010) >> 4;
+ const UINT8 S = (op & 0x0200) >> 9;
+ const UINT8 D = (op & 0x0400) >> 10;
+ const UINT8 F1 = (op & 0x01e0) >> 5;
+ astring yString = disasmYField(Y);
+ astring xString = (X ? "y" : "y1");
+ astring fString = disasmF1Field(F1, D, S);
+ sprintf(buffer, "%s, %s = %s", fString.cstr(), yString.cstr(), xString.cstr());
+ break;
+ }
+
+ // Format 1a: Multiply/ALU Read/Write Group (major typo in docs on p3-51)
+ case 0x07:
+ {
+ // F1, At[1] = Y
+ const UINT8 Y = (op & 0x000f);
+ const UINT8 S = (op & 0x0200) >> 9;
+ const UINT8 aT = (op & 0x0400) >> 10;
+ const UINT8 F1 = (op & 0x01e0) >> 5;
+ astring yString = disasmYField(Y);
+ astring atString = (aT ? "a0" : "a1");
+ astring fString = disasmF1Field(F1, aT, S);
+ sprintf(buffer, "%s, %s = %s", fString.cstr(), atString.cstr(), yString.cstr());
+ break;
+ }
+
+ // Format 2: Multiply/ALU Read/Write Group
+ case 0x15:
+ {
+ // F1, Z : y[1]
+ const UINT8 Z = (op & 0x000f);
+ const UINT8 X = (op & 0x0010) >> 4;
+ const UINT8 S = (op & 0x0200) >> 9;
+ const UINT8 D = (op & 0x0400) >> 10;
+ const UINT8 F1 = (op & 0x01e0) >> 5;
+ astring zString = disasmZField(Z);
+ astring xString = (X ? "y" : "y1");
+ astring fString = disasmF1Field(F1, D, S);
+ sprintf(buffer, "%s, %s <=> %s", fString.cstr(), xString.cstr(), zString.cstr());
+ break;
+ }
+ case 0x1d:
+ {
+ // F1, Z : y, x=*pt++[i]
+ const UINT8 Z = (op & 0x000f);
+ const UINT8 X = (op & 0x0010) >> 4;
+ const UINT8 S = (op & 0x0200) >> 9;
+ const UINT8 D = (op & 0x0400) >> 10;
+ const UINT8 F1 = (op & 0x01e0) >> 5;
+ astring zString = disasmZField(Z);
+ astring xString = (X ? "*pt++i" : "*pt++");
+ astring fString = disasmF1Field(F1, D, S);
+ sprintf(buffer, "%s, %s <=> y, x = %s", fString.cstr(), zString.cstr(), xString.cstr());
+ break;
+ }
+
+ // Format 2a: Multiply/ALU Read/Write Group
+ case 0x05:
+ {
+ // F1, Z : aT[1]
+ const UINT8 Z = (op & 0x000f);
+ const UINT8 X = (op & 0x0010) >> 4;
+ const UINT8 S = (op & 0x0200) >> 9;
+ const UINT8 aT = (op & 0x0400) >> 10;
+ const UINT8 F1 = (op & 0x01e0) >> 5;
+ astring zString = disasmZField(Z);
+ astring atString = (aT ? "a0" : "a1");
+ atString += X ? "" : "1"; // TODO: Figure out unclear wording.
+ astring fString = disasmF1Field(F1, aT, S);
+ sprintf(buffer, "%s, %s <=> %s", fString.cstr(), zString.cstr(), atString.cstr());
+ break;
+ }
+
+ // Format 3: Special Functions
+ case 0x12:
+ case 0x13:
+ {
+ // if|ifc CON F2
+ const UINT8 CON = (op & 0x001f);
+ const UINT8 S = (op & 0x0200) >> 9;
+ const UINT8 D = (op & 0x0400) >> 10;
+ const UINT8 F2 = (op & 0x01e0) >> 5;
+ astring fString = disasmF2Field(F2, D, S);
+ astring conString = disasmCONField(CON);
+ if (op & 0x0800) sprintf(buffer, "if %s : %s", conString.cstr(), fString.cstr());
+ else sprintf(buffer, "ifc %s : %s", conString.cstr(), fString.cstr());
+ break;
+ }
+
+ // Format 4: Branch Direct Group
+ case 0x00: case 0x01:
+ {
// goto JA
- const UINT16 JA = (op & 0x0fff) | (pc & 0xf000);
+ const UINT16 JA = (op & 0x0fff) | (pc & 0xf000);
sprintf(buffer, "goto 0x%04x", JA);
- break;
- }
+ break;
+ }
case 0x10: case 0x11:
{
// call JA
@@ -443,129 +443,129 @@ CPU_DISASSEMBLE( dsp16a )
break;
}
- // Format 5: Branch Indirect Group
- case 0x18:
- {
- // goto B
- const UINT8 B = (op & 0x0700) >> 8;
- astring bString = disasmBField(B);
- sprintf(buffer, "%s", bString.cstr());
- break;
- }
-
- // Format 6: Contitional Branch Qualifier/Software Interrupt (icall)
- case 0x1a:
- {
- // if CON [goto/call/return]
- const UINT8 CON = (op & 0x001f);
- astring conString = disasmCONField(CON);
- sprintf(buffer, "if %s:", conString.cstr());
- // TODO: Test for invalid ops
- // icall
- if (op == 0xd40e) sprintf(buffer, "icall");
- break;
- }
-
- // Format 7: Data Move Group
- case 0x09: case 0x0b:
- {
- // R = aS
- const UINT8 R = (op & 0x03f0) >> 4;
- const UINT8 S = (op & 0x1000) >> 12;
- astring rString = disasmRField(R);
- sprintf(buffer, "%s = %s", rString.cstr(), (S ? "a1" : "a0"));
- break;
- }
- case 0x08:
- {
- // aT = R
- const UINT8 R = (op & 0x03f0) >> 4;
- const UINT8 aT = (op & 0x0400) >> 10;
- astring rString = disasmRField(R);
- sprintf(buffer, "%s = %s", (aT ? "a0" : "a1"), rString.cstr());
- break;
- }
- case 0x0f:
- {
- // R = Y
- const UINT8 Y = (op & 0x000f);
- const UINT8 R = (op & 0x03f0) >> 4;
- astring yString = disasmYField(Y);
- astring rString = disasmRField(R);
- sprintf(buffer, "%s = %s", rString.cstr(), yString.cstr());
- // TODO: Special case the R == [y, y1, or x] case
- break;
- }
- case 0x0c:
- {
- // Y = R
- const UINT8 Y = (op & 0x000f);
- const UINT8 R = (op & 0x03f0) >> 4;
- astring yString = disasmYField(Y);
- astring rString = disasmRField(R);
- sprintf(buffer, "%s = %s", yString.cstr(), rString.cstr());
- break;
- }
- case 0x0d:
- {
- // Z : R
- const UINT8 Z = (op & 0x000f);
- const UINT8 R = (op & 0x03f0) >> 4;
- astring zString = disasmZField(Z);
- astring rString = disasmRField(R);
- sprintf(buffer, "%s <=> %s", zString.cstr(), rString.cstr());
- break;
- }
-
- // Format 8: Data Move (immediate operand - 2 words)
- case 0x0a:
- {
- // R = N
- const UINT8 R = (op & 0x03f0) >> 4;
- astring rString = disasmRField(R);
+ // Format 5: Branch Indirect Group
+ case 0x18:
+ {
+ // goto B
+ const UINT8 B = (op & 0x0700) >> 8;
+ astring bString = disasmBField(B);
+ sprintf(buffer, "%s", bString.cstr());
+ break;
+ }
+
+ // Format 6: Contitional Branch Qualifier/Software Interrupt (icall)
+ case 0x1a:
+ {
+ // if CON [goto/call/return]
+ const UINT8 CON = (op & 0x001f);
+ astring conString = disasmCONField(CON);
+ sprintf(buffer, "if %s:", conString.cstr());
+ // TODO: Test for invalid ops
+ // icall
+ if (op == 0xd40e) sprintf(buffer, "icall");
+ break;
+ }
+
+ // Format 7: Data Move Group
+ case 0x09: case 0x0b:
+ {
+ // R = aS
+ const UINT8 R = (op & 0x03f0) >> 4;
+ const UINT8 S = (op & 0x1000) >> 12;
+ astring rString = disasmRField(R);
+ sprintf(buffer, "%s = %s", rString.cstr(), (S ? "a1" : "a0"));
+ break;
+ }
+ case 0x08:
+ {
+ // aT = R
+ const UINT8 R = (op & 0x03f0) >> 4;
+ const UINT8 aT = (op & 0x0400) >> 10;
+ astring rString = disasmRField(R);
+ sprintf(buffer, "%s = %s", (aT ? "a0" : "a1"), rString.cstr());
+ break;
+ }
+ case 0x0f:
+ {
+ // R = Y
+ const UINT8 Y = (op & 0x000f);
+ const UINT8 R = (op & 0x03f0) >> 4;
+ astring yString = disasmYField(Y);
+ astring rString = disasmRField(R);
+ sprintf(buffer, "%s = %s", rString.cstr(), yString.cstr());
+ // TODO: Special case the R == [y, y1, or x] case
+ break;
+ }
+ case 0x0c:
+ {
+ // Y = R
+ const UINT8 Y = (op & 0x000f);
+ const UINT8 R = (op & 0x03f0) >> 4;
+ astring yString = disasmYField(Y);
+ astring rString = disasmRField(R);
+ sprintf(buffer, "%s = %s", yString.cstr(), rString.cstr());
+ break;
+ }
+ case 0x0d:
+ {
+ // Z : R
+ const UINT8 Z = (op & 0x000f);
+ const UINT8 R = (op & 0x03f0) >> 4;
+ astring zString = disasmZField(Z);
+ astring rString = disasmRField(R);
+ sprintf(buffer, "%s <=> %s", zString.cstr(), rString.cstr());
+ break;
+ }
+
+ // Format 8: Data Move (immediate operand - 2 words)
+ case 0x0a:
+ {
+ // R = N
+ const UINT8 R = (op & 0x03f0) >> 4;
+ astring rString = disasmRField(R);
sprintf(buffer, "%s = 0x%04x", rString.cstr(), op2);
- opSize = 2;
- break;
- }
-
- // Format 9: Short Immediate Group
- case 0x02: case 0x03:
- {
- // R = M
- const UINT8 M = (op & 0x00ff);
- const UINT8 R = (op & 0x0e00) >> 9;
- astring rString = disasmRImmediateField(R);
- sprintf(buffer, "%s = 0x%02x", rString.cstr(), M);
- break;
- }
-
- // Format 10: do - redo
- case 0x0e:
- {
- // do|redo K
- const UINT8 K = (op & 0x007f);
- const UINT8 NI = (op & 0x0780) >> 7;
- sprintf(buffer, "do (next %d inst) %d times", NI, K);
- // TODO: Limits on K & NI
- if (NI == 0x00)
+ opSize = 2;
+ break;
+ }
+
+ // Format 9: Short Immediate Group
+ case 0x02: case 0x03:
+ {
+ // R = M
+ const UINT8 M = (op & 0x00ff);
+ const UINT8 R = (op & 0x0e00) >> 9;
+ astring rString = disasmRImmediateField(R);
+ sprintf(buffer, "%s = 0x%02x", rString.cstr(), M);
+ break;
+ }
+
+ // Format 10: do - redo
+ case 0x0e:
+ {
+ // do|redo K
+ const UINT8 K = (op & 0x007f);
+ const UINT8 NI = (op & 0x0780) >> 7;
+ sprintf(buffer, "do (next %d inst) %d times", NI, K);
+ // TODO: Limits on K & NI
+ if (NI == 0x00)
sprintf(buffer, "redo %d", K);
- break;
- }
-
- // RESERVED
- case 0x1e:
- {
- sprintf(buffer, "RESERVED");
- break;
- }
-
- // UNKNOWN
- default:
- {
- sprintf(buffer, "UNKNOWN");
- break;
- }
- }
-
- return opSize | dasmflags | DASMFLAG_SUPPORTED;
+ break;
+ }
+
+ // RESERVED
+ case 0x1e:
+ {
+ sprintf(buffer, "RESERVED");
+ break;
+ }
+
+ // UNKNOWN
+ default:
+ {
+ sprintf(buffer, "UNKNOWN");
+ break;
+ }
+ }
+
+ return opSize | dasmflags | DASMFLAG_SUPPORTED;
}
diff --git a/src/emu/cpu/dsp16/dsp16ops.c b/src/emu/cpu/dsp16/dsp16ops.c
index 88962fcc873..9b9db698f8f 100644
--- a/src/emu/cpu/dsp16/dsp16ops.c
+++ b/src/emu/cpu/dsp16/dsp16ops.c
@@ -103,10 +103,92 @@ void* dsp16_device::registerFromRTable(const UINT8 &R)
}
-void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance)
+void dsp16_device::executeF1Field(const UINT8& F1, const UINT8& D, const UINT8& S)
+{
+ // Where is the first operation being written?
+ //UINT64* destinationReg = NULL;
+ //switch (D)
+ //{
+ // case 0x00: destinationReg = &m_a0;
+ // case 0x01: destinationReg = &m_a1;
+ // default: break;
+ //}
+
+ // Which source is being used?
+ //UINT64* sourceReg = NULL;
+ //switch (S)
+ //{
+ // case 0x00: sourceReg = &m_a0;
+ // case 0x01: sourceReg = &m_a1;
+ // default: break;
+ //}
+
+ switch (F1)
+ {
+ case 0x00: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
+ case 0x01: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
+ case 0x02: m_p = (INT32)((INT16)m_x * (INT16)m_y); break;
+ case 0x03: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
+ case 0x04: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
+ case 0x05: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
+ case 0x06: /* nop */ break;
+ case 0x07: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
+ case 0x08: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
+ case 0x09: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
+ case 0x0a: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
+ case 0x0b: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
+ case 0x0c: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
+ case 0x0d: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
+ case 0x0e: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
+ case 0x0f: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
+ }
+}
+
+
+void* dsp16_device::registerFromYFieldUpper(const UINT8& Y)
+{
+ UINT16* destinationReg = NULL;
+ const UINT8 N = (Y & 0x0c) >> 2;
+ switch (N)
+ {
+ case 0x00: destinationReg = &m_r0; break;
+ case 0x01: destinationReg = &m_r1; break;
+ case 0x02: destinationReg = &m_r2; break;
+ case 0x03: destinationReg = &m_r3; break;
+ default: break;
+ }
+ return destinationReg;
+}
+
+
+void dsp16_device::executeYFieldPost(const UINT8& Y)
+{
+ UINT16* opReg = NULL;
+ const UINT8 N = (Y & 0x0c) >> 2;
+ switch (N)
+ {
+ case 0x00: opReg = &m_r0; break;
+ case 0x01: opReg = &m_r1; break;
+ case 0x02: opReg = &m_r2; break;
+ case 0x03: opReg = &m_r3; break;
+ default: break;
+ }
+
+ const UINT8 lower = Y & 0x03;
+ switch (lower)
+ {
+ case 0x00: /* nop */ break;
+ case 0x01: (*opReg)++; break;
+ case 0x02: (*opReg)--; break;
+ case 0x03: (*opReg) += m_j; break;
+ }
+}
+
+
+void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance)
{
cycles = 1;
- pcAdvance = 1;
+ pcAdvance = 0;
const UINT8 opcode = (op >> 11) & 0x1f;
switch(opcode)
@@ -114,11 +196,15 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
// Format 1: Multiply/ALU Read/Write Group
case 0x06:
{
- // F1, Y
- //const UINT8 Y = (op & 0x000f);
- //const UINT8 S = (op & 0x0200) >> 9;
- //const UINT8 D = (op & 0x0400) >> 10;
- //const UINT8 F1 = (op & 0x01e0) >> 5;
+ // F1, Y : (page 3-38)
+ const UINT8 Y = (op & 0x000f);
+ const UINT8 S = (op & 0x0200) >> 9;
+ const UINT8 D = (op & 0x0400) >> 10;
+ const UINT8 F1 = (op & 0x01e0) >> 5;
+ executeF1Field(F1, D, S);
+ executeYFieldPost(Y);
+ cycles = 1;
+ pcAdvance = 1;
break;
}
case 0x04: case 0x1c:
@@ -171,12 +257,25 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
}
case 0x14:
{
- // F1, Y = y[1]
- //const UINT8 Y = (op & 0x000f);
- //const UINT8 X = (op & 0x0010) >> 4;
- //const UINT8 S = (op & 0x0200) >> 9;
- //const UINT8 D = (op & 0x0400) >> 10;
- //const UINT8 F1 = (op & 0x01e0) >> 5;
+ // F1, Y = y[1] : (page 3-53)
+ const UINT8 Y = (op & 0x000f);
+ const UINT8 X = (op & 0x0010) >> 4;
+ const UINT8 S = (op & 0x0200) >> 9;
+ const UINT8 D = (op & 0x0400) >> 10;
+ const UINT8 F1 = (op & 0x01e0) >> 5;
+ executeF1Field(F1, D, S);
+ UINT16* destinationReg = (UINT16*)registerFromYFieldUpper(Y);
+ UINT16 yRegValue = 0x0000;
+ switch (X)
+ {
+ case 0x00: yRegValue = (m_y & 0x0000ffff); break;
+ case 0x01: yRegValue = (m_y & 0xffff0000) >> 16; break;
+ default: break;
+ }
+ data_write(*destinationReg, yRegValue);
+ executeYFieldPost(Y);
+ cycles = 2;
+ pcAdvance = 1;
break;
}
@@ -240,7 +339,7 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
// Format 4: Branch Direct Group
case 0x00: case 0x01:
{
- // goto JA
+ // goto JA : (page 3-20)
const UINT16 JA = (op & 0x0fff) | (m_pc & 0xf000);
m_pc = JA;
cycles = 2;
@@ -250,8 +349,12 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
case 0x10: case 0x11:
{
- // call JA
- //const UINT16 JA = (op & 0x0fff) | (m_pc & 0xf000);
+ // call JA : (page 3-23)
+ const UINT16 JA = (op & 0x0fff) | (m_pc & 0xf000);
+ m_pr = m_pc + 1;
+ m_pc = JA;
+ cycles = 2;
+ pcAdvance = 0;
break;
}
@@ -295,9 +398,15 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
}
case 0x0c:
{
- // Y = R
- //const UINT8 Y = (op & 0x000f);
- //const UINT8 R = (op & 0x03f0) >> 4;
+ // Y = R : (page 3-33)
+ const UINT8 Y = (op & 0x000f);
+ const UINT8 R = (op & 0x03f0) >> 4;
+ UINT16* destinationReg = (UINT16*)registerFromYFieldUpper(Y);
+ UINT16* sourceReg = (UINT16*)registerFromRTable(R);
+ data_write(*destinationReg, *sourceReg);
+ executeYFieldPost(Y);
+ cycles = 2;
+ pcAdvance = 1;
break;
}
case 0x0d:
@@ -311,7 +420,7 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
// Format 8: Data Move (immediate operand - 2 words)
case 0x0a:
{
- // R = N
+ // R = N : (page 3-28)
const UINT8 R = (op & 0x03f0) >> 4;
const UINT16 iVal = opcode_read(1);
void* reg = registerFromRTable(R);
@@ -324,19 +433,20 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
// Format 9: Short Immediate Group
case 0x02: case 0x03:
{
- // R = M
+ // R = M : (page 3-27)
const INT8 M = (op & 0x00ff);
const UINT8 R = (op & 0x0e00) >> 9;
void* reg = registerFromRImmediateField(R);
writeRegister(reg, (INT16)M); // Sign extend 8 bit int
cycles = 1;
+ pcAdvance = 1;
break;
}
// Format 10: do - redo
case 0x0e:
{
- // do|redo K
+ // do|redo K : (pages 3-25 & 3-26)
const UINT8 K = (op & 0x007f);
const UINT8 NI = (op & 0x0780) >> 7;
if (NI != 0)
@@ -344,16 +454,19 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
// Do
m_cacheStart = m_pc + 1;
m_cacheEnd = m_pc + NI + 1;
- m_cacheIterations = K+1;
+ m_cacheIterations = K-1; // -1 because we check the counter below
cycles = 1;
+ pcAdvance = 1;
}
else
{
// Redo
- m_cacheIterations = K+1;
+ m_cacheIterations = K-1; // -1 because we check the counter below
m_cacheRedoNextPC = m_pc + 1;
- pcAdvance = m_cacheStart - m_pc;
+ m_pc = m_cacheStart;
+ pcAdvance = 0;
cycles = 2;
+ pcAdvance = 1;
}
break;
}
@@ -375,13 +488,15 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
if (m_cacheIterations == 0 && m_cacheRedoNextPC != CACHE_INVALID)
{
// You've reached the end of a cache loop after a redo opcode.
- pcAdvance = m_cacheRedoNextPC - m_pc;
+ m_pc = m_cacheRedoNextPC;
m_cacheRedoNextPC = CACHE_INVALID;
+ pcAdvance = 0;
}
if (m_cacheIterations > 0 && (m_pc+pcAdvance == m_cacheEnd))
{
// A regular iteration on a cached loop.
m_cacheIterations--;
- pcAdvance = m_cacheStart - m_pc;
+ m_pc = m_cacheStart;
+ pcAdvance = 0;
}
}