summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices
diff options
context:
space:
mode:
author Vas Crabb <vas@vastheman.com>2019-06-23 18:02:43 +1000
committer Vas Crabb <vas@vastheman.com>2019-06-23 18:02:43 +1000
commitd3af11cb11676ae88e9feb4bac5fa02aff7967a2 (patch)
treee4f6c23dbf428c612d656d5069bb08833d543e73 /src/devices
parent12561ec937565b4c53d336f0a5658b015d99af8d (diff)
srcclean (nw)
Diffstat (limited to 'src/devices')
-rw-r--r--src/devices/bus/gio64/newport.cpp372
-rw-r--r--src/devices/bus/gio64/newport.h20
-rw-r--r--src/devices/bus/isa/myb3k_fdc.cpp8
-rw-r--r--src/devices/cpu/jaguar/jaguar.cpp10
-rw-r--r--src/devices/cpu/m6502/xavix.cpp4
-rw-r--r--src/devices/cpu/sh/sh2.cpp28
-rw-r--r--src/devices/cpu/sh/sh2.h38
-rw-r--r--src/devices/cpu/sh/sh2comn.cpp30
-rw-r--r--src/devices/machine/am2910.cpp48
-rw-r--r--src/devices/machine/am2910.h10
-rw-r--r--src/devices/machine/upd7004.cpp6
11 files changed, 287 insertions, 287 deletions
diff --git a/src/devices/bus/gio64/newport.cpp b/src/devices/bus/gio64/newport.cpp
index d643d72f97a..d1099c94647 100644
--- a/src/devices/bus/gio64/newport.cpp
+++ b/src/devices/bus/gio64/newport.cpp
@@ -24,7 +24,7 @@
#define LOG_XMAP0 (1 << 4)
#define LOG_XMAP1 (1 << 5)
#define LOG_REX3 (1 << 6)
-#define LOG_RAMDAC (1 << 7)
+#define LOG_RAMDAC (1 << 7)
#define LOG_COMMANDS (1 << 8)
#define LOG_REJECTS (1 << 9)
#define LOG_ALL (LOG_UNKNOWN | LOG_VC2 | LOG_CMAP0 | LOG_CMAP1 | LOG_XMAP0 | LOG_XMAP1 | LOG_REX3 | LOG_RAMDAC | LOG_COMMANDS | LOG_REJECTS)
@@ -1843,7 +1843,7 @@ READ64_MEMBER(newport_base_device::rex3_r)
uint32_t newport_base_device::do_endian_swap(uint32_t color)
{
- return (color >> 24) | (color << 24) | ((color >> 8) & 0x0000ff00) | ((color << 8) & 0x00ff0000);
+ return (color >> 24) | (color << 24) | ((color >> 8) & 0x0000ff00) | ((color << 8) & 0x00ff0000);
}
uint32_t newport_base_device::get_host_color()
@@ -1862,47 +1862,47 @@ uint32_t newport_base_device::get_host_color()
{
default:
// No conversion needed
- break;
+ break;
case 1: // 4bpp -> 8bpp
color = convert_4bpp_bgr_to_8bpp((uint8_t)color);
- break;
+ break;
case 2: // 4bpp -> 12bpp
color = convert_4bpp_bgr_to_12bpp((uint8_t)color);
- break;
+ break;
case 3: // 4bpp -> 24bpp
color = convert_4bpp_bgr_to_24bpp((uint8_t)color);
- break;
+ break;
case 4: // 8bpp -> 4bpp
color = convert_8bpp_bgr_to_4bpp((uint8_t)color);
- break;
+ break;
case 6: // 8bpp -> 12bpp
color = convert_8bpp_bgr_to_12bpp((uint8_t)color);
- break;
+ break;
case 7: // 8bpp -> 24bpp
color = convert_8bpp_bgr_to_24bpp((uint8_t)color);
- break;
+ break;
case 8: // 12bpp -> 4bpp
color = convert_12bpp_bgr_to_4bpp((uint16_t)color);
- break;
+ break;
case 9: // 12bpp -> 8bpp
color = convert_12bpp_bgr_to_8bpp((uint16_t)color);
- break;
+ break;
case 11: // 12bpp -> 24bpp
color = convert_12bpp_bgr_to_24bpp((uint16_t)color);
- break;
+ break;
case 12: // 32bpp -> 4bpp
color = convert_24bpp_bgr_to_4bpp(color);
- break;
+ break;
case 13: // 32bpp -> 8bpp
color = convert_24bpp_bgr_to_8bpp(color);
- break;
+ break;
case 14: // 32bpp -> 12bpp
color = convert_24bpp_bgr_to_12bpp(color);
- break;
+ break;
}
if (BIT(m_rex3.m_draw_mode1, 11))
- color = do_endian_swap(color);
- return color;
+ color = do_endian_swap(color);
+ return color;
}
void newport_base_device::write_pixel(uint32_t color)
@@ -2024,11 +2024,11 @@ void newport_base_device::blend_pixel(uint32_t *dest_buf, uint32_t src)
switch (m_rex3.m_plane_depth)
{
case 0: // 4bpp (not supported)
- break;
+ break;
case 1: // 8bpp
- sb = (0xaa * BIT(src, 7)) | (0x55 * BIT(src, 6));
- sg = (0x92 * BIT(src, 5)) | (0x49 * BIT(src, 4)) | (0x24 * BIT(src, 3));
- sr = (0x92 * BIT(src, 2)) | (0x49 * BIT(src, 1)) | (0x24 * BIT(src, 0));
+ sb = (0xaa * BIT(src, 7)) | (0x55 * BIT(src, 6));
+ sg = (0x92 * BIT(src, 5)) | (0x49 * BIT(src, 4)) | (0x24 * BIT(src, 3));
+ sr = (0x92 * BIT(src, 2)) | (0x49 * BIT(src, 1)) | (0x24 * BIT(src, 0));
if (BIT(m_rex3.m_draw_mode1, 25))
{
@@ -2258,58 +2258,58 @@ uint32_t newport_base_device::get_rgb_color(int16_t x, int16_t y)
{
static const uint8_t s_bayer[4][4] = { { 0, 12, 3, 15 },{ 8, 4, 11, 7 },{ 2, 14, 1, 13 },{ 10, 6, 9, 5 } };
- uint32_t red = ((m_rex3.m_curr_color_red >> 11) & 0x1ff);
- uint32_t green = ((m_rex3.m_curr_color_green >> 11) & 0x1ff);
- uint32_t blue = ((m_rex3.m_curr_color_blue >> 11) & 0x1ff);
- uint32_t alpha = ((m_rex3.m_curr_color_alpha >> 11) & 0x1ff);
+ uint32_t red = ((m_rex3.m_curr_color_red >> 11) & 0x1ff);
+ uint32_t green = ((m_rex3.m_curr_color_green >> 11) & 0x1ff);
+ uint32_t blue = ((m_rex3.m_curr_color_blue >> 11) & 0x1ff);
+ uint32_t alpha = ((m_rex3.m_curr_color_alpha >> 11) & 0x1ff);
- if (red >= 0x180 || BIT(m_rex3.m_curr_color_red, 31))
- {
- red = 0;
+ if (red >= 0x180 || BIT(m_rex3.m_curr_color_red, 31))
+ {
+ red = 0;
}
- else if (red > 0xff)
- {
- red = 0xff;
+ else if (red > 0xff)
+ {
+ red = 0xff;
}
- if (green >= 0x180 || BIT(m_rex3.m_curr_color_green, 31))
- {
- green = 0;
+ if (green >= 0x180 || BIT(m_rex3.m_curr_color_green, 31))
+ {
+ green = 0;
}
- else if (green > 0xff)
- {
- green = 0xff;
+ else if (green > 0xff)
+ {
+ green = 0xff;
}
- if (blue >= 0x180 || BIT(m_rex3.m_curr_color_blue, 31))
- {
- blue = 0;
+ if (blue >= 0x180 || BIT(m_rex3.m_curr_color_blue, 31))
+ {
+ blue = 0;
}
- else if (blue > 0xff)
- {
- blue = 0xff;
+ else if (blue > 0xff)
+ {
+ blue = 0xff;
}
- if (alpha >= 0x180 || BIT(m_rex3.m_curr_color_alpha, 31))
- {
- alpha = 0;
+ if (alpha >= 0x180 || BIT(m_rex3.m_curr_color_alpha, 31))
+ {
+ alpha = 0;
}
- else if (alpha > 0xff)
- {
- alpha = 0xff;
+ else if (alpha > 0xff)
+ {
+ alpha = 0xff;
}
- alpha <<= 24;
+ alpha <<= 24;
if (!BIT(m_rex3.m_draw_mode1, 15)) // RGB
{
switch (m_rex3.m_plane_depth)
{
case 0: // 4bpp
- return (m_rex3.m_curr_color_red >> 11) & 0x0000000f;
+ return (m_rex3.m_curr_color_red >> 11) & 0x0000000f;
case 1: // 8bpp
- return (m_rex3.m_curr_color_red >> 11) & 0x000000ff;
+ return (m_rex3.m_curr_color_red >> 11) & 0x000000ff;
case 2: // 12bpp
- return (m_rex3.m_curr_color_red >> 9) & 0x00000fff;
+ return (m_rex3.m_curr_color_red >> 9) & 0x00000fff;
case 3: // 24bpp
// Not supported
return 0;
@@ -2915,66 +2915,66 @@ uint64_t newport_base_device::do_pixel_word_read()
void newport_base_device::iterate_shade()
{
- if (m_rex3.m_slope_red & 0x7fffff)
- m_rex3.m_curr_color_red += (m_rex3.m_slope_red << 8) >> 8;
- if (m_rex3.m_slope_green & 0x7ffff)
- m_rex3.m_curr_color_green += (m_rex3.m_slope_green << 12) >> 12;
- if (m_rex3.m_slope_blue & 0x7ffff)
- m_rex3.m_curr_color_blue += (m_rex3.m_slope_blue << 12) >> 12;
- if (m_rex3.m_slope_alpha & 0x7ffff)
- m_rex3.m_curr_color_alpha += (m_rex3.m_slope_alpha << 12) >> 12;
-
- if (BIT(m_rex3.m_draw_mode0, 21)) // CIClamp
- {
- if (BIT(m_rex3.m_draw_mode1, 15)) // RGBMode
- {
- const uint32_t val_red = ((m_rex3.m_curr_color_red >> 11) & 0x1ff);
- const uint32_t val_grn = ((m_rex3.m_curr_color_green >> 11) & 0x1ff);
- const uint32_t val_blu = ((m_rex3.m_curr_color_blue >> 11) & 0x1ff);
- const uint32_t val_alpha = ((m_rex3.m_curr_color_alpha >> 11) & 0x1ff);
-
- if (val_red >= 0x180 || BIT(m_rex3.m_curr_color_red, 31))
- m_rex3.m_curr_color_red = 0;
- else if (val_red > 0xff)
- m_rex3.m_curr_color_red = 0x7ffff;
-
- if (val_grn >= 0x180 || BIT(m_rex3.m_curr_color_green, 31))
- m_rex3.m_curr_color_green = 0;
- else if (val_grn > 0xff)
- m_rex3.m_curr_color_green = 0x7ffff;
-
- if (val_blu >= 0x180 || BIT(m_rex3.m_curr_color_blue, 31))
- m_rex3.m_curr_color_blue = 0;
- else if (val_blu > 0xff)
- m_rex3.m_curr_color_blue = 0x7ffff;
-
- if (val_alpha >= 0x180 || BIT(m_rex3.m_curr_color_alpha, 31))
- m_rex3.m_curr_color_alpha = 0;
- else if (val_alpha > 0xff)
- m_rex3.m_curr_color_alpha = 0x7ffff;
- }
- else
- {
- switch ((m_rex3.m_draw_mode1 >> 3) & 3)
- {
- case 0: // 4bpp
- if (BIT(m_rex3.m_color_red, 15))
- m_rex3.m_color_red = 0x00007fff;
- break;
- case 1: // 8bpp
- if (BIT(m_rex3.m_color_red, 19))
- m_rex3.m_color_red = 0x0007ffff;
- break;
- case 2: // 12bpp
- if (BIT(m_rex3.m_color_red, 21))
- m_rex3.m_color_red = 0x001fffff;
- break;
- case 3: // 24bpp
- // No clamping on CI
- break;
- }
- }
- }
+ if (m_rex3.m_slope_red & 0x7fffff)
+ m_rex3.m_curr_color_red += (m_rex3.m_slope_red << 8) >> 8;
+ if (m_rex3.m_slope_green & 0x7ffff)
+ m_rex3.m_curr_color_green += (m_rex3.m_slope_green << 12) >> 12;
+ if (m_rex3.m_slope_blue & 0x7ffff)
+ m_rex3.m_curr_color_blue += (m_rex3.m_slope_blue << 12) >> 12;
+ if (m_rex3.m_slope_alpha & 0x7ffff)
+ m_rex3.m_curr_color_alpha += (m_rex3.m_slope_alpha << 12) >> 12;
+
+ if (BIT(m_rex3.m_draw_mode0, 21)) // CIClamp
+ {
+ if (BIT(m_rex3.m_draw_mode1, 15)) // RGBMode
+ {
+ const uint32_t val_red = ((m_rex3.m_curr_color_red >> 11) & 0x1ff);
+ const uint32_t val_grn = ((m_rex3.m_curr_color_green >> 11) & 0x1ff);
+ const uint32_t val_blu = ((m_rex3.m_curr_color_blue >> 11) & 0x1ff);
+ const uint32_t val_alpha = ((m_rex3.m_curr_color_alpha >> 11) & 0x1ff);
+
+ if (val_red >= 0x180 || BIT(m_rex3.m_curr_color_red, 31))
+ m_rex3.m_curr_color_red = 0;
+ else if (val_red > 0xff)
+ m_rex3.m_curr_color_red = 0x7ffff;
+
+ if (val_grn >= 0x180 || BIT(m_rex3.m_curr_color_green, 31))
+ m_rex3.m_curr_color_green = 0;
+ else if (val_grn > 0xff)
+ m_rex3.m_curr_color_green = 0x7ffff;
+
+ if (val_blu >= 0x180 || BIT(m_rex3.m_curr_color_blue, 31))
+ m_rex3.m_curr_color_blue = 0;
+ else if (val_blu > 0xff)
+ m_rex3.m_curr_color_blue = 0x7ffff;
+
+ if (val_alpha >= 0x180 || BIT(m_rex3.m_curr_color_alpha, 31))
+ m_rex3.m_curr_color_alpha = 0;
+ else if (val_alpha > 0xff)
+ m_rex3.m_curr_color_alpha = 0x7ffff;
+ }
+ else
+ {
+ switch ((m_rex3.m_draw_mode1 >> 3) & 3)
+ {
+ case 0: // 4bpp
+ if (BIT(m_rex3.m_color_red, 15))
+ m_rex3.m_color_red = 0x00007fff;
+ break;
+ case 1: // 8bpp
+ if (BIT(m_rex3.m_color_red, 19))
+ m_rex3.m_color_red = 0x0007ffff;
+ break;
+ case 2: // 12bpp
+ if (BIT(m_rex3.m_color_red, 21))
+ m_rex3.m_color_red = 0x001fffff;
+ break;
+ case 3: // 24bpp
+ // No clamping on CI
+ break;
+ }
+ }
+ }
}
void newport_base_device::do_rex3_command()
@@ -3197,10 +3197,10 @@ void newport_base_device::do_rex3_command()
if ((dx > 0 && start_x >= end_x) || (dx < 0 && start_x <= end_x) || lr_abort)
{
- m_rex3.m_curr_color_red = m_rex3.m_color_red;
- m_rex3.m_curr_color_alpha = m_rex3.m_color_alpha;
- m_rex3.m_curr_color_green = m_rex3.m_color_green;
- m_rex3.m_curr_color_blue = m_rex3.m_color_blue;
+ m_rex3.m_curr_color_red = m_rex3.m_color_red;
+ m_rex3.m_curr_color_alpha = m_rex3.m_color_alpha;
+ m_rex3.m_curr_color_green = m_rex3.m_color_green;
+ m_rex3.m_curr_color_blue = m_rex3.m_color_blue;
start_x = m_rex3.m_x_save;
start_y += dy;
}
@@ -3519,48 +3519,48 @@ WRITE64_MEMBER(newport_base_device::rex3_w)
}
m_rex3.m_draw_mode1 = data32;
- static const uint32_t s_store_shift[8][4][2] = {
- { { 0, 0 }, // None, 4bpp, Buffer 0/1
- { 0, 0 }, // None, 8bpp, Buffer 0/1
- { 0, 0 }, // None, 12bpp, Buffer 0/1
- { 0, 0 }, // None, 24bpp, Buffer 0/1 (not valid)
- },
- { { 0, 0 }, // RGB/CI, 4bpp, Buffer 0/1
- { 0, 8 }, // RGB/CI, 8bpp, Buffer 0/1
- { 0, 12 }, // RGB/CI, 12bpp, Buffer 0/1
- { 0, 0 }, // RGB/CI, 24bpp, Buffer 0/1 (not valid)
- },
- { { 0, 0 }, // RGBA, 4bpp, Buffer 0/1
- { 0, 8 }, // RGBA, 8bpp, Buffer 0/1
- { 0, 12 }, // RGBA, 12bpp, Buffer 0/1
- { 0, 0 }, // RGBA, 24bpp, Buffer 0/1 (not valid)
- },
- { { 0, 0 }, // Invalid, 4bpp, Buffer 0/1
- { 0, 0 }, // Invalid, 8bpp, Buffer 0/1
- { 0, 0 }, // Invalid, 12bpp, Buffer 0/1
- { 0, 0 }, // Invalid, 24bpp, Buffer 0/1 (not valid)
- },
- { { 8, 16 }, // Overlay, 4bpp, Buffer 0/1
- { 8, 16 }, // Overlay, 8bpp, Buffer 0/1
- { 8, 16 }, // Overlay, 12bpp, Buffer 0/1
- { 8, 16 }, // Overlay, 24bpp, Buffer 0/1 (not valid)
- },
- { { 0, 0 }, // Popup, 4bpp, Buffer 0/1
- { 0, 8 }, // Popup, 8bpp, Buffer 0/1
- { 0, 12 }, // Popup, 12bpp, Buffer 0/1
- { 0, 0 }, // Popup, 24bpp, Buffer 0/1 (not valid)
- },
- { { 0, 0 }, // CID, 4bpp, Buffer 0/1
- { 0, 8 }, // CID, 8bpp, Buffer 0/1
- { 0, 12 }, // CID, 12bpp, Buffer 0/1
- { 0, 0 }, // CID, 24bpp, Buffer 0/1 (not valid)
- },
- { { 0, 0 }, // Invalid, 4bpp, Buffer 0/1
- { 0, 0 }, // Invalid, 8bpp, Buffer 0/1
- { 0, 0 }, // Invalid, 12bpp, Buffer 0/1
- { 0, 0 }, // Invalid, 24bpp, Buffer 0/1 (not valid)
- },
- };
+ static const uint32_t s_store_shift[8][4][2] = {
+ { { 0, 0 }, // None, 4bpp, Buffer 0/1
+ { 0, 0 }, // None, 8bpp, Buffer 0/1
+ { 0, 0 }, // None, 12bpp, Buffer 0/1
+ { 0, 0 }, // None, 24bpp, Buffer 0/1 (not valid)
+ },
+ { { 0, 0 }, // RGB/CI, 4bpp, Buffer 0/1
+ { 0, 8 }, // RGB/CI, 8bpp, Buffer 0/1
+ { 0, 12 }, // RGB/CI, 12bpp, Buffer 0/1
+ { 0, 0 }, // RGB/CI, 24bpp, Buffer 0/1 (not valid)
+ },
+ { { 0, 0 }, // RGBA, 4bpp, Buffer 0/1
+ { 0, 8 }, // RGBA, 8bpp, Buffer 0/1
+ { 0, 12 }, // RGBA, 12bpp, Buffer 0/1
+ { 0, 0 }, // RGBA, 24bpp, Buffer 0/1 (not valid)
+ },
+ { { 0, 0 }, // Invalid, 4bpp, Buffer 0/1
+ { 0, 0 }, // Invalid, 8bpp, Buffer 0/1
+ { 0, 0 }, // Invalid, 12bpp, Buffer 0/1
+ { 0, 0 }, // Invalid, 24bpp, Buffer 0/1 (not valid)
+ },
+ { { 8, 16 }, // Overlay, 4bpp, Buffer 0/1
+ { 8, 16 }, // Overlay, 8bpp, Buffer 0/1
+ { 8, 16 }, // Overlay, 12bpp, Buffer 0/1
+ { 8, 16 }, // Overlay, 24bpp, Buffer 0/1 (not valid)
+ },
+ { { 0, 0 }, // Popup, 4bpp, Buffer 0/1
+ { 0, 8 }, // Popup, 8bpp, Buffer 0/1
+ { 0, 12 }, // Popup, 12bpp, Buffer 0/1
+ { 0, 0 }, // Popup, 24bpp, Buffer 0/1 (not valid)
+ },
+ { { 0, 0 }, // CID, 4bpp, Buffer 0/1
+ { 0, 8 }, // CID, 8bpp, Buffer 0/1
+ { 0, 12 }, // CID, 12bpp, Buffer 0/1
+ { 0, 0 }, // CID, 24bpp, Buffer 0/1 (not valid)
+ },
+ { { 0, 0 }, // Invalid, 4bpp, Buffer 0/1
+ { 0, 0 }, // Invalid, 8bpp, Buffer 0/1
+ { 0, 0 }, // Invalid, 12bpp, Buffer 0/1
+ { 0, 0 }, // Invalid, 24bpp, Buffer 0/1 (not valid)
+ },
+ };
m_rex3.m_plane_enable = m_rex3.m_draw_mode1 & 7;
m_rex3.m_plane_depth = (m_rex3.m_draw_mode1 >> 3) & 3;
@@ -3879,30 +3879,30 @@ WRITE64_MEMBER(newport_base_device::rex3_w)
LOGMASKED(LOG_REX3, "REX3 Red/CI Full State Write: %08x\n", (uint32_t)(data >> 32));
m_rex3.m_color_red = (int32_t)((data >> 32) & 0xffffff);
m_rex3.m_curr_color_red = m_rex3.m_color_red;
- if (!BIT(m_rex3.m_draw_mode1, 15))
- {
- switch (m_rex3.m_plane_depth)
- {
- case 0: // 4bpp
- m_rex3.m_color_i = (uint32_t)((data >> 43) & 0xf);
- break;
- case 1: // 8bpp
- m_rex3.m_color_i = (uint32_t)((data >> 43) & 0xff);
- break;
- case 2: // 12bpp
- m_rex3.m_color_i = (uint32_t)((data >> 41) & 0xfff);
- break;
- case 3: // 32bpp
- // Invalid for CI mode
- break;
- }
- }
+ if (!BIT(m_rex3.m_draw_mode1, 15))
+ {
+ switch (m_rex3.m_plane_depth)
+ {
+ case 0: // 4bpp
+ m_rex3.m_color_i = (uint32_t)((data >> 43) & 0xf);
+ break;
+ case 1: // 8bpp
+ m_rex3.m_color_i = (uint32_t)((data >> 43) & 0xff);
+ break;
+ case 2: // 12bpp
+ m_rex3.m_color_i = (uint32_t)((data >> 41) & 0xfff);
+ break;
+ case 3: // 32bpp
+ // Invalid for CI mode
+ break;
+ }
+ }
}
if (ACCESSING_BITS_0_31)
{
LOGMASKED(LOG_REX3, "REX3 Alpha Full State Write: %08x\n", (uint32_t)data);
m_rex3.m_color_alpha = (int32_t)(data & 0xfffff);
- m_rex3.m_curr_color_alpha = m_rex3.m_color_alpha;
+ m_rex3.m_curr_color_alpha = m_rex3.m_color_alpha;
}
break;
case 0x0208/8:
@@ -3910,13 +3910,13 @@ WRITE64_MEMBER(newport_base_device::rex3_w)
{
LOGMASKED(LOG_REX3, "REX3 Green Full State Write: %08x\n", (uint32_t)(data >> 32));
m_rex3.m_color_green = (int32_t)((data >> 32) & 0xfffff);
- m_rex3.m_curr_color_green = m_rex3.m_color_green;
+ m_rex3.m_curr_color_green = m_rex3.m_color_green;
}
if (ACCESSING_BITS_0_31)
{
LOGMASKED(LOG_REX3, "REX3 Blue Full State Write: %08x\n", (uint32_t)data);
m_rex3.m_color_blue = (int32_t)(data & 0xfffff);
- m_rex3.m_curr_color_blue = m_rex3.m_color_blue;
+ m_rex3.m_curr_color_blue = m_rex3.m_color_blue;
}
break;
case 0x0210/8:
@@ -4004,16 +4004,16 @@ WRITE64_MEMBER(newport_base_device::rex3_w)
{
LOGMASKED(LOG_REX3, "REX3 Packed Color Write: %08x\n", (uint32_t)data);
m_rex3.m_color_i = (uint32_t)data;
- if (BIT(m_rex3.m_draw_mode1, 15))
- {
+ if (BIT(m_rex3.m_draw_mode1, 15))
+ {
m_rex3.m_color_red = (data & 0xff) << 11;
m_rex3.m_color_green = (data & 0xff00) << 3;
m_rex3.m_color_blue = (data & 0xff0000) >> 5;
- m_rex3.m_curr_color_red = m_rex3.m_color_red;
- m_rex3.m_curr_color_green = m_rex3.m_color_green;
- m_rex3.m_curr_color_blue = m_rex3.m_color_blue;
- }
+ m_rex3.m_curr_color_red = m_rex3.m_color_red;
+ m_rex3.m_curr_color_green = m_rex3.m_color_green;
+ m_rex3.m_curr_color_blue = m_rex3.m_color_blue;
+ }
}
break;
case 0x0228/8:
diff --git a/src/devices/bus/gio64/newport.h b/src/devices/bus/gio64/newport.h
index f48245df79f..019fd704b50 100644
--- a/src/devices/bus/gio64/newport.h
+++ b/src/devices/bus/gio64/newport.h
@@ -73,16 +73,16 @@ protected:
enum
{
- STATUS_GFXBUSY = (1 << 3),
- STATUS_BACKBUSY = (1 << 4),
- STATUS_VRINT = (1 << 5),
- STATUS_VIDEOINT = (1 << 6),
- STATUS_GFIFOLEVEL_SHIFT = 7,
- STATUS_GFIFOLEVEL_MASK = (0x3f << STATUS_GFIFOLEVEL_SHIFT),
- STATUS_BFIFOLEVEL_SHIFT = 13,
- STATUS_BFIFOLEVEL_MASK = (0x1f << STATUS_BFIFOLEVEL_SHIFT),
- STATUS_BFIFO_INT = 18,
- STATUS_GFIFO_INT = 19
+ STATUS_GFXBUSY = (1 << 3),
+ STATUS_BACKBUSY = (1 << 4),
+ STATUS_VRINT = (1 << 5),
+ STATUS_VIDEOINT = (1 << 6),
+ STATUS_GFIFOLEVEL_SHIFT = 7,
+ STATUS_GFIFOLEVEL_MASK = (0x3f << STATUS_GFIFOLEVEL_SHIFT),
+ STATUS_BFIFOLEVEL_SHIFT = 13,
+ STATUS_BFIFOLEVEL_MASK = (0x1f << STATUS_BFIFOLEVEL_SHIFT),
+ STATUS_BFIFO_INT = 18,
+ STATUS_GFIFO_INT = 19
};
struct vc2_t
diff --git a/src/devices/bus/isa/myb3k_fdc.cpp b/src/devices/bus/isa/myb3k_fdc.cpp
index 286dc155184..90eb28c706b 100644
--- a/src/devices/bus/isa/myb3k_fdc.cpp
+++ b/src/devices/bus/isa/myb3k_fdc.cpp
@@ -259,7 +259,7 @@ WRITE8_MEMBER( isa8_myb3k_fdc471x_device_base::myb3k_fdc_command )
LOGCMD(" - Drive %d\n", selected_drive);
LOGCMD(" - Side %d\n", selected_side);
LOGCMD(" - Density %s\n", dden ? "MFM" : "FM");
-
+
if (has_motor_control)
LOGCMD(" - Motor %s\n", motor_on ? "ON" : "OFF");
@@ -268,7 +268,7 @@ WRITE8_MEMBER( isa8_myb3k_fdc471x_device_base::myb3k_fdc_command )
if (floppy_connector.found())
floppy = floppy_connector->get_device();
-
+
m_fdc->set_floppy(floppy);
if (floppy != nullptr)
@@ -277,7 +277,7 @@ WRITE8_MEMBER( isa8_myb3k_fdc471x_device_base::myb3k_fdc_command )
if (has_motor_control)
floppy->mon_w(motor_on ? 0 : 1); // Active low and inverter on incoming data line
- }
+ }
m_fdc->dden_w(dden ? 0 : 1); // active low == MFM
}
@@ -307,7 +307,7 @@ READ8_MEMBER( isa8_myb3k_fdc4712_device::myb3k_fdc_status )
auto floppy_connector = m_floppy_connectors[selected_drive];
floppy_image_device *floppy = nullptr;
-
+
if (floppy_connector.found())
floppy = floppy_connector->get_device();
diff --git a/src/devices/cpu/jaguar/jaguar.cpp b/src/devices/cpu/jaguar/jaguar.cpp
index a116776652f..de7421181f9 100644
--- a/src/devices/cpu/jaguar/jaguar.cpp
+++ b/src/devices/cpu/jaguar/jaguar.cpp
@@ -6,11 +6,11 @@
Core implementation for the portable Jaguar DSP emulator.
Written by Aaron Giles
- TODO:
- - Implement pipeline, actually instruction cycles;
- Currently implementation is similar to single stepping
- with single cycle
- - Implement and acknowlodge remain registers
+ TODO:
+ - Implement pipeline, actually instruction cycles;
+ Currently implementation is similar to single stepping
+ with single cycle
+ - Implement and acknowlodge remain registers
***************************************************************************/
diff --git a/src/devices/cpu/m6502/xavix.cpp b/src/devices/cpu/m6502/xavix.cpp
index 1cb4323586e..522d9374b5f 100644
--- a/src/devices/cpu/m6502/xavix.cpp
+++ b/src/devices/cpu/m6502/xavix.cpp
@@ -18,8 +18,8 @@
0x0000-0x7fff seems to be a 'low bus' area, it is always the same regardless
of banking
0x8000-0xffff is a banked area with individual code and data banks
-
- Zero Page notes:
+
+ Zero Page notes:
0x00ff contains the DATA bank, set manually in code
0x00fe appears to be the current CODE bank, set with either the
diff --git a/src/devices/cpu/sh/sh2.cpp b/src/devices/cpu/sh/sh2.cpp
index e00c0e60c57..28a952f0d22 100644
--- a/src/devices/cpu/sh/sh2.cpp
+++ b/src/devices/cpu/sh/sh2.cpp
@@ -130,8 +130,8 @@ void sh2_device::sh7604_map(address_map &map)
// TODO: cps3boot breaks with this enabled. Needs callback
// AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM // cache data array
-
-// map(0xe0000000, 0xe00001ff).mirror(0x1ffffe00).rw(FUNC(sh2_device::sh7604_r), FUNC(sh2_device::sh7604_w));
+
+// map(0xe0000000, 0xe00001ff).mirror(0x1ffffe00).rw(FUNC(sh2_device::sh7604_r), FUNC(sh2_device::sh7604_w));
// TODO: internal map takes way too much resources if mirrored with 0x1ffffe00
// we eventually internalize again via trampoline & sh7604_device
// Also area 0xffff8000-0xffffbfff is for synchronous DRAM mode,
@@ -143,7 +143,7 @@ void sh2_device::sh7604_map(address_map &map)
map(0xfffffe03, 0xfffffe03).rw(FUNC(sh2_device::tdr_r), FUNC(sh2_device::tdr_w));
map(0xfffffe04, 0xfffffe04).rw(FUNC(sh2_device::ssr_r), FUNC(sh2_device::ssr_w));
map(0xfffffe05, 0xfffffe05).r(FUNC(sh2_device::rdr_r));
-
+
// FRC
map(0xfffffe10, 0xfffffe10).rw(FUNC(sh2_device::tier_r), FUNC(sh2_device::tier_w));
map(0xfffffe11, 0xfffffe11).rw(FUNC(sh2_device::ftcsr_r), FUNC(sh2_device::ftcsr_w));
@@ -162,7 +162,7 @@ void sh2_device::sh7604_map(address_map &map)
map(0xfffffe71, 0xfffffe71).rw(FUNC(sh2_device::drcr_r<0>), FUNC(sh2_device::drcr_w<0>));
map(0xfffffe72, 0xfffffe72).rw(FUNC(sh2_device::drcr_r<1>), FUNC(sh2_device::drcr_w<1>));
-
+
// WTC
map(0xfffffe80, 0xfffffe81).rw(FUNC(sh2_device::wtcnt_r), FUNC(sh2_device::wtcnt_w));
map(0xfffffe82, 0xfffffe83).rw(FUNC(sh2_device::rstcsr_r), FUNC(sh2_device::rstcsr_w));
@@ -170,7 +170,7 @@ void sh2_device::sh7604_map(address_map &map)
// standby and cache control
map(0xfffffe91, 0xfffffe91).rw(FUNC(sh2_device::sbycr_r), FUNC(sh2_device::sbycr_w));
map(0xfffffe92, 0xfffffe92).rw(FUNC(sh2_device::ccr_r), FUNC(sh2_device::ccr_w));
-
+
// INTC second section
map(0xfffffee0, 0xfffffee1).rw(FUNC(sh2_device::intc_icr_r), FUNC(sh2_device::intc_icr_w));
map(0xfffffee2, 0xfffffee3).rw(FUNC(sh2_device::ipra_r), FUNC(sh2_device::ipra_w));
@@ -198,11 +198,11 @@ void sh2_device::sh7604_map(address_map &map)
map(0xffffff94, 0xffffff97).rw(FUNC(sh2_device::dar_r<1>), FUNC(sh2_device::dar_w<1>));
map(0xffffff98, 0xffffff9b).rw(FUNC(sh2_device::dmac_tcr_r<1>), FUNC(sh2_device::dmac_tcr_w<1>));
map(0xffffff9c, 0xffffff9f).rw(FUNC(sh2_device::chcr_r<1>), FUNC(sh2_device::chcr_w<1>));
-
+
map(0xffffffa0, 0xffffffa3).rw(FUNC(sh2_device::vcrdma_r<0>), FUNC(sh2_device::vcrdma_w<0>));
map(0xffffffa8, 0xffffffab).rw(FUNC(sh2_device::vcrdma_r<1>), FUNC(sh2_device::vcrdma_w<1>));
map(0xffffffb0, 0xffffffb3).rw(FUNC(sh2_device::dmaor_r), FUNC(sh2_device::dmaor_w));
-
+
// BSC
map(0xffffffe0, 0xffffffe3).rw(FUNC(sh2_device::bcr1_r), FUNC(sh2_device::bcr1_w));
map(0xffffffe4, 0xffffffe7).rw(FUNC(sh2_device::bcr2_r), FUNC(sh2_device::bcr2_w));
@@ -575,7 +575,7 @@ void sh2_device::device_start()
save_item(NAME(m_irq_vector.divu));
save_item(NAME(m_irq_vector.dmac[0]));
save_item(NAME(m_irq_vector.dmac[1]));
-
+
save_item(NAME(m_ipra));
save_item(NAME(m_iprb));
save_item(NAME(m_vcra));
@@ -590,14 +590,14 @@ void sh2_device::device_start()
save_item(NAME(m_vecmd));
save_item(NAME(m_nmie));
-
+
// DIVU
save_item(NAME(m_divu_ovf));
save_item(NAME(m_divu_ovfie));
save_item(NAME(m_dvsr));
save_item(NAME(m_dvdntl));
save_item(NAME(m_dvdnth));
-
+
// WTC
save_item(NAME(m_wtcnt));
save_item(NAME(m_wtcsr));
@@ -617,11 +617,11 @@ void sh2_device::device_start()
save_item(NAME(m_dmac[1].tcr));
save_item(NAME(m_dmac[0].chcr));
save_item(NAME(m_dmac[1].chcr));
-
+
// misc
save_item(NAME(m_sbycr));
save_item(NAME(m_ccr));
-
+
// BSC
save_item(NAME(m_bcr1));
save_item(NAME(m_bcr2));
@@ -630,7 +630,7 @@ void sh2_device::device_start()
save_item(NAME(m_rtcsr));
save_item(NAME(m_rtcor));
save_item(NAME(m_rtcnt));
-
+
/*
for (int i = 0; i < 16; ++i)
{
@@ -647,7 +647,7 @@ void sh2_device::device_start()
save_item(NAME(m_internal_irq_vector));
save_item(NAME(m_dma_timer_active));
save_item(NAME(m_dma_irq));
-
+
state_add( STATE_GENPC, "PC", m_sh2_state->pc).mask(SH12_AM).callimport();
state_add( STATE_GENPCBASE, "CURPC", m_sh2_state->pc ).callimport().noshow();
diff --git a/src/devices/cpu/sh/sh2.h b/src/devices/cpu/sh/sh2.h
index e119d6bc098..1e5abeb795b 100644
--- a/src/devices/cpu/sh/sh2.h
+++ b/src/devices/cpu/sh/sh2.h
@@ -95,7 +95,7 @@ public:
DECLARE_READ8_MEMBER( ssr_r );
DECLARE_WRITE8_MEMBER( ssr_w );
DECLARE_READ8_MEMBER( rdr_r );
-
+
// FRT / FRC
DECLARE_READ8_MEMBER( tier_r );
DECLARE_WRITE8_MEMBER( tier_w );
@@ -110,7 +110,7 @@ public:
DECLARE_READ8_MEMBER( tocr_r );
DECLARE_WRITE8_MEMBER( tocr_w );
DECLARE_READ16_MEMBER( frc_icr_r );
-
+
// INTC
DECLARE_READ16_MEMBER( ipra_r );
DECLARE_WRITE16_MEMBER( ipra_w );
@@ -130,7 +130,7 @@ public:
DECLARE_WRITE32_MEMBER( vcrdiv_w );
DECLARE_READ16_MEMBER( intc_icr_r );
DECLARE_WRITE16_MEMBER( intc_icr_w );
-
+
// DIVU
DECLARE_READ32_MEMBER( dvsr_r );
DECLARE_WRITE32_MEMBER( dvsr_w );
@@ -143,21 +143,21 @@ public:
DECLARE_READ32_MEMBER( dvcr_r );
DECLARE_WRITE32_MEMBER( dvcr_w );
-
+
// DMAC
template <int Channel> READ32_MEMBER(vcrdma_r)
{
return m_vcrdma[Channel] & 0x7f;
}
-
+
template <int Channel> WRITE32_MEMBER(vcrdma_w)
{
COMBINE_DATA(&m_vcrdma[Channel]);
m_irq_vector.dmac[Channel] = m_vcrdma[Channel] & 0x7f;
sh2_recalc_irq();
}
-
- template <int Channel> READ8_MEMBER(drcr_r) { return m_dmac[Channel].drcr & 3; }
+
+ template <int Channel> READ8_MEMBER(drcr_r) { return m_dmac[Channel].drcr & 3; }
template <int Channel> WRITE8_MEMBER(drcr_w) { m_dmac[Channel].drcr = data & 3; sh2_recalc_irq(); }
template <int Channel> READ32_MEMBER(sar_r) { return m_dmac[Channel].sar; }
template <int Channel> WRITE32_MEMBER(sar_w) { COMBINE_DATA(&m_dmac[Channel].sar); }
@@ -166,8 +166,8 @@ public:
template <int Channel> READ32_MEMBER(dmac_tcr_r) { return m_dmac[Channel].tcr; }
template <int Channel> WRITE32_MEMBER(dmac_tcr_w) { COMBINE_DATA(&m_dmac[Channel].tcr); m_dmac[Channel].tcr &= 0xffffff; }
template <int Channel> READ32_MEMBER(chcr_r) { return m_dmac[Channel].chcr; }
- template <int Channel> WRITE32_MEMBER(chcr_w)
- {
+ template <int Channel> WRITE32_MEMBER(chcr_w)
+ {
uint32_t old;
old = m_dmac[Channel].chcr;
COMBINE_DATA(&m_dmac[Channel].chcr);
@@ -186,19 +186,19 @@ public:
sh2_dmac_check(1);
}
}
-
+
// WTC
DECLARE_READ16_MEMBER( wtcnt_r );
DECLARE_WRITE16_MEMBER( wtcnt_w );
DECLARE_READ16_MEMBER( rstcsr_r );
DECLARE_WRITE16_MEMBER( rstcsr_w );
-
+
// misc
DECLARE_READ8_MEMBER( sbycr_r );
DECLARE_WRITE8_MEMBER( sbycr_w );
DECLARE_READ8_MEMBER( ccr_r );
DECLARE_WRITE8_MEMBER( ccr_w );
-
+
// BSC
DECLARE_READ32_MEMBER( bcr1_r );
DECLARE_WRITE32_MEMBER( bcr1_w );
@@ -215,7 +215,7 @@ public:
DECLARE_READ32_MEMBER( rtcnt_r );
DECLARE_WRITE32_MEMBER( rtcnt_w );
-
+
virtual void set_frt_input(int state) override;
void sh2_notify_dma_data_available();
void func_fastirq();
@@ -283,16 +283,16 @@ private:
uint16_t m_ipra, m_iprb;
uint16_t m_vcra, m_vcrb, m_vcrc, m_vcrd, m_vcrwdt, m_vcrdiv, m_intc_icr, m_vcrdma[2];
bool m_vecmd, m_nmie;
-
+
// DIVU
bool m_divu_ovf, m_divu_ovfie;
uint32_t m_dvsr, m_dvdntl, m_dvdnth;
-
+
// WTC
uint8_t m_wtcnt, m_wtcsr;
uint8_t m_rstcsr;
uint16_t m_wtcw[2];
-
+
// DMAC
struct {
uint8_t drcr;
@@ -302,13 +302,13 @@ private:
uint32_t chcr;
} m_dmac[2];
uint8_t m_dmaor;
-
+
// misc
uint8_t m_sbycr, m_ccr;
-
+
// BSC
uint32_t m_bcr1, m_bcr2, m_wcr, m_mcr, m_rtcsr, m_rtcor, m_rtcnt;
-
+
int8_t m_nmi_line_state;
uint64_t m_frc_base;
diff --git a/src/devices/cpu/sh/sh2comn.cpp b/src/devices/cpu/sh/sh2comn.cpp
index 7a7829e9db9..42ff2e358fb 100644
--- a/src/devices/cpu/sh/sh2comn.cpp
+++ b/src/devices/cpu/sh/sh2comn.cpp
@@ -510,10 +510,10 @@ READ8_MEMBER( sh2_device::rdr_r )
return 0;
}
-/*
+/*
* FRC
*/
-
+
READ8_MEMBER( sh2_device::tier_r )
{
return m_tier;
@@ -529,10 +529,10 @@ WRITE8_MEMBER( sh2_device::tier_w )
READ8_MEMBER( sh2_device::ftcsr_r )
{
- // TODO: to be tested
+ // TODO: to be tested
if (!m_ftcsr_read_cb.isnull())
m_ftcsr_read_cb((((m_tier<<24) | (m_ftcsr<<16)) & 0xffff0000) | m_frc);
-
+
return m_ftcsr;
}
@@ -610,7 +610,7 @@ READ16_MEMBER( sh2_device::frc_icr_r )
return m_frc_icr;
}
-/*
+/*
* INTC
*/
@@ -641,7 +641,7 @@ WRITE16_MEMBER( sh2_device::ipra_w )
m_irq_level.wdt = (m_ipra >> 4) & 0xf;
sh2_recalc_irq();
}
-
+
READ16_MEMBER( sh2_device::iprb_r )
{
return m_iprb & 0xff00;
@@ -729,13 +729,13 @@ WRITE32_MEMBER( sh2_device::vcrdiv_w )
sh2_recalc_irq();
}
-/*
+/*
* DIVU
*/
READ32_MEMBER( sh2_device::dvcr_r )
{
- return (m_divu_ovfie == true ? 2 : 0) | (m_divu_ovf == true ? 1 : 0);
+ return (m_divu_ovfie == true ? 2 : 0) | (m_divu_ovf == true ? 1 : 0);
}
WRITE32_MEMBER( sh2_device::dvcr_w )
@@ -835,7 +835,7 @@ WRITE32_MEMBER( sh2_device::dvdntl_w )
}
}
-/*
+/*
* WTC
*/
@@ -907,12 +907,12 @@ READ8_MEMBER( sh2_device::ccr_r )
WRITE8_MEMBER( sh2_device::ccr_w )
{
/*
- xx-- ---- Way 0/1
- ---x ---- Cache Purge (CP), write only
- ---- x--- Two-Way Mode (TW)
- ---- -x-- Data Replacement Disable (OD)
- ---- --x- Instruction Replacement Disable (ID)
- ---- ---x Cache Enable (CE)
+ xx-- ---- Way 0/1
+ ---x ---- Cache Purge (CP), write only
+ ---- x--- Two-Way Mode (TW)
+ ---- -x-- Data Replacement Disable (OD)
+ ---- --x- Instruction Replacement Disable (ID)
+ ---- ---x Cache Enable (CE)
*/
m_ccr = data;
}
diff --git a/src/devices/machine/am2910.cpp b/src/devices/machine/am2910.cpp
index f547d93f00b..f3b425d86cb 100644
--- a/src/devices/machine/am2910.cpp
+++ b/src/devices/machine/am2910.cpp
@@ -5,21 +5,21 @@
am2910.cpp
AMD Am2910 Microprogram Controller emulation
- TODO:
- - Check /RLD behavior
- - Find and fix bugs that almost surely exist
+ TODO:
+ - Check /RLD behavior
+ - Find and fix bugs that almost surely exist
***************************************************************************/
#include "emu.h"
#include "am2910.h"
-#define LOG_INSN (1 << 0)
-#define LOG_STACK (1 << 1)
-#define LOG_ERROR (1 << 2)
-#define LOG_ALL (LOG_INSN | LOG_STACK | LOG_ERROR)
+#define LOG_INSN (1 << 0)
+#define LOG_STACK (1 << 1)
+#define LOG_ERROR (1 << 2)
+#define LOG_ALL (LOG_INSN | LOG_STACK | LOG_ERROR)
-#define VERBOSE (0)
+#define VERBOSE (0)
#include "logmacro.h"
/*****************************************************************************/
@@ -162,12 +162,12 @@ void am2910_device::execute()
m_pc += (uint16_t)m_ci;
switch (m_i)
{
- case 0: // JZ, Jump Zero
+ case 0: // JZ, Jump Zero
LOGMASKED(LOG_INSN, "%04x: JZ\n", m_pc);
m_pc = 0;
m_sp = 0;
break;
- case 1: // CJS, Conditional Jump-To-Subroutine PL
+ case 1: // CJS, Conditional Jump-To-Subroutine PL
LOGMASKED(LOG_INSN, "%04x: CJS\n", m_pc);
if (test_pass())
{
@@ -175,22 +175,22 @@ void am2910_device::execute()
m_pc = m_d;
}
break;
- case 2: // JMAP, Jump Map
+ case 2: // JMAP, Jump Map
LOGMASKED(LOG_INSN, "%04x: JMAP\n", m_pc);
m_pc = m_d;
break;
- case 3: // CJP, Conditional Jump PL
+ case 3: // CJP, Conditional Jump PL
LOGMASKED(LOG_INSN, "%04x: CJP\n", m_pc);
if (test_pass())
m_pc = m_d;
break;
- case 4: // PUSH, Push / Conditional Load Counter
+ case 4: // PUSH, Push / Conditional Load Counter
LOGMASKED(LOG_INSN, "%04x: PUSH\n", m_pc);
push(m_pc);
if (test_pass())
m_r = m_d;
break;
- case 5: // JSRP, Conditional JSB R/PL
+ case 5: // JSRP, Conditional JSB R/PL
LOGMASKED(LOG_INSN, "%04x: JSRP\n", m_pc);
push(m_pc);
if (test_pass())
@@ -198,21 +198,21 @@ void am2910_device::execute()
else
m_pc = m_r;
break;
- case 6: // CJV, Conditional Jump Vector
+ case 6: // CJV, Conditional Jump Vector
LOGMASKED(LOG_INSN, "%04x: CJV\n", m_pc);
if (test_pass())
{
m_pc = m_d;
}
break;
- case 7: // JRP, Conditional Jump R/PL
+ case 7: // JRP, Conditional Jump R/PL
LOGMASKED(LOG_INSN, "%04x: JRP\n", m_pc);
if (test_pass())
m_pc = m_d;
else
m_pc = m_r;
break;
- case 8: // RFCT, Repeat Loop, Counter != 0
+ case 8: // RFCT, Repeat Loop, Counter != 0
LOGMASKED(LOG_INSN, "%04x: RFCT\n", m_pc);
if (m_r != 0)
{
@@ -220,7 +220,7 @@ void am2910_device::execute()
m_pc = m_stack[m_sp];
}
break;
- case 9: // RPCT, Repeat PL, Counter != 0
+ case 9: // RPCT, Repeat PL, Counter != 0
LOGMASKED(LOG_INSN, "%04x: RPCT\n", m_pc);
if (m_r != 0)
{
@@ -228,12 +228,12 @@ void am2910_device::execute()
m_pc = m_d;
}
break;
- case 10: // CRTN, Conditional Return
+ case 10: // CRTN, Conditional Return
LOGMASKED(LOG_INSN, "%04x: CRTN\n", m_pc);
if (test_pass())
m_pc = m_stack[m_sp];
break;
- case 11: // CJPP, Conditional Jump PL & Pop
+ case 11: // CJPP, Conditional Jump PL & Pop
LOGMASKED(LOG_INSN, "%04x: CJPP\n", m_pc);
if (test_pass())
{
@@ -241,19 +241,19 @@ void am2910_device::execute()
pop();
}
break;
- case 12: // LDCT, Load Counter & Continue
+ case 12: // LDCT, Load Counter & Continue
LOGMASKED(LOG_INSN, "%04x: LDCT\n", m_pc);
m_r = m_d;
break;
- case 13: // LOOP, Test End Loop
+ case 13: // LOOP, Test End Loop
LOGMASKED(LOG_INSN, "%04x: LOOP\n", m_pc);
if (!test_pass())
m_pc = m_stack[m_sp];
break;
- case 14: // CONT, Continue
+ case 14: // CONT, Continue
LOGMASKED(LOG_INSN, "%04x: CONT\n", m_pc);
break;
- case 15: // TWB, Three-Way Branch
+ case 15: // TWB, Three-Way Branch
LOGMASKED(LOG_INSN, "%04x: TWB\n", m_pc);
if (!test_pass())
{
diff --git a/src/devices/machine/am2910.h b/src/devices/machine/am2910.h
index 6990944e572..b304d7a09a9 100644
--- a/src/devices/machine/am2910.h
+++ b/src/devices/machine/am2910.h
@@ -24,11 +24,11 @@ public:
// construction/destruction
am2910_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- DECLARE_WRITE_LINE_MEMBER(cc_w); // !CC
- DECLARE_WRITE_LINE_MEMBER(ccen_w); // !CCEN
- DECLARE_WRITE_LINE_MEMBER(ci_w); // CI
- DECLARE_WRITE_LINE_MEMBER(rld_w); // !RLD
- DECLARE_WRITE_LINE_MEMBER(cp_w); // CP
+ DECLARE_WRITE_LINE_MEMBER(cc_w); // !CC
+ DECLARE_WRITE_LINE_MEMBER(ccen_w); // !CCEN
+ DECLARE_WRITE_LINE_MEMBER(ci_w); // CI
+ DECLARE_WRITE_LINE_MEMBER(rld_w); // !RLD
+ DECLARE_WRITE_LINE_MEMBER(cp_w); // CP
void d_w(uint16_t data);
void i_w(uint8_t data);
diff --git a/src/devices/machine/upd7004.cpp b/src/devices/machine/upd7004.cpp
index 26ca3c45622..ceb54d09acb 100644
--- a/src/devices/machine/upd7004.cpp
+++ b/src/devices/machine/upd7004.cpp
@@ -6,9 +6,9 @@
10-bit 8 Channel A/D Converter
- TODO:
- - Serial modes
- - 2s complement output
+ TODO:
+ - Serial modes
+ - 2s complement output
***************************************************************************/