diff options
| author | 2017-05-07 23:18:47 +1000 | |
|---|---|---|
| committer | 2017-05-14 21:44:11 +1000 | |
| commit | 0f0d39ef81562c75e79176dd3bebb1e491ca39d5 (patch) | |
| tree | 201cee7fdf55ee800f83859a92efd2cfe66cf2b3 /src/devices/machine/68340sim.cpp | |
| parent | e6c4be2b4d71c7a6c95be0bae111eb416ff0f9e7 (diff) | |
Move static data out of devices into the device types. This is a significant change, so please pay attention.
The core changes are:
* Short name, full name and source file are no longer members of device_t, they are part of the device type
* MACHINE_COFIG_START no longer needs a driver class
* MACHINE_CONFIG_DERIVED_CLASS is no longer necessary
* Specify the state class you want in the GAME/COMP/CONS line
* The compiler will work out the base class where the driver init member is declared
* There is one static device type object per driver rather than one per machine configuration
Use DECLARE_DEVICE_TYPE or DECLARE_DEVICE_TYPE_NS to declare device type.
* DECLARE_DEVICE_TYPE forward-declares teh device type and class, and declares extern object finders.
* DECLARE_DEVICE_TYPE_NS is for devices classes in namespaces - it doesn't forward-declare the device type.
Use DEFINE_DEVICE_TYPE or DEFINE_DEVICE_TYPE_NS to define device types.
* These macros declare storage for the static data, and instantiate the device type and device finder templates.
The rest of the changes are mostly just moving stuff out of headers that shouldn't be there, renaming stuff for consistency, and scoping stuff down where appropriate.
Things I've actually messed with substantially:
* More descriptive names for a lot of devices
* Untangled the fantasy sound from the driver state, which necessitates breaking up sound/flip writes
* Changed DECO BSMT2000 ready callback into a device delegate
* Untangled Microprose 3D noise from driver state
* Used object finders for CoCo multipak, KC85 D002, and Irem sound subdevices
* Started to get TI-99 stuff out of the TI-990 directory and arrange bus devices properly
* Started to break out common parts of Samsung ARM SoC devices
* Turned some of FM, SID, SCSP DSP, EPIC12 and Voodoo cores into something resmbling C++
* Tried to make Z180 table allocation/setup a bit safer
* Converted generic keyboard/terminal to not use WRITE8 - space/offset aren't relevant
* Dynamically allocate generic terminal buffer so derived devices (e.g. teleprinter) can specify size
* Imporved encapsulation of Z80DART channels
* Refactored the SPC7110 bit table generator loop to make it more readable
* Added wrappers for SNES PPU operations so members can be made protected
* Factored out some boilerplate for YM chips with PSG
* toaplan2 gfx
* stic/intv resolution
* Video System video
* Out Run/Y-board sprite alignment
* GIC video hookup
* Amstrad CPC ROM box members
* IQ151 ROM cart region
* MSX cart IRQ callback resolution time
* SMS passthrough control devices starting subslots
I've smoke-tested several drivers, but I've probably missed something. Things I've missed will likely blow up spectacularly with failure to bind errors and the like. Let me know if there's more subtle breakage (could have happened in FM or Voodoo).
And can everyone please, please try to keep stuff clean. In particular, please stop polluting the global namespace. Keep things out of headers that don't need to be there, and use things that can be scoped down rather than macros.
It feels like an uphill battle trying to get this stuff under control while more of it's added.
Diffstat (limited to 'src/devices/machine/68340sim.cpp')
| -rw-r--r-- | src/devices/machine/68340sim.cpp | 453 |
1 files changed, 231 insertions, 222 deletions
diff --git a/src/devices/machine/68340sim.cpp b/src/devices/machine/68340sim.cpp index f1d346e880b..fda96a762b1 100644 --- a/src/devices/machine/68340sim.cpp +++ b/src/devices/machine/68340sim.cpp @@ -6,310 +6,319 @@ #include "68340.h" - -READ16_MEMBER( m68340cpu_device::m68340_internal_sim_r ) +#define m68340SIM_MCR (0x00) +// (0x02) +#define m68340SIM_SYNCR (0x04) +#define m68340SIM_AVR_RSR (0x06) +// (0x08) +// (0x0a) +// (0x0c) +// (0x0e) +#define m68340SIM_PORTA (0x11) +#define m68340SIM_DDRA (0x13) +#define m68340SIM_PPRA1 (0x15) +#define m68340SIM_PPRA2 (0x17) +#define m68340SIM_PORTB (0x19) +#define m68340SIM_PORTB1 (0x1b) +#define m68340SIM_DDRB (0x1d) +#define m68340SIM_PPARB (0x1f) +#define m68340SIM_SWIV_SYPCR (0x20) +#define m68340SIM_PICR (0x22) +#define m68340SIM_PITR (0x24) +#define m68340SIM_SWSR (0x26) +// (0x28) +// (0x2a) +// (0x2c) +// (0x2e) +// (0x30) +// (0x32) +// (0x34) +// (0x36) +// (0x38) +// (0x3a) +// (0x3c) +// (0x3e) +#define m68340SIM_AM_CS0 (0x40) +#define m68340SIM_BA_CS0 (0x44) +#define m68340SIM_AM_CS1 (0x48) +#define m68340SIM_BA_CS1 (0x4c) +#define m68340SIM_AM_CS2 (0x50) +#define m68340SIM_BA_CS2 (0x54) +#define m68340SIM_AM_CS3 (0x58) +#define m68340SIM_BA_CS3 (0x5c) + + + +READ16_MEMBER( m68340_cpu_device::m68340_internal_sim_r ) { - m68340cpu_device *m68k = this; - m68340_sim* sim = m68k->m68340SIM; - assert(sim != nullptr); - - if (sim) - { - int pc = space.device().safe_pc(); - - switch (offset<<1) - { - case m68340SIM_MCR: - logerror("%08x m68340_internal_sim_r %04x, (%04x) (MCR - Module Configuration Register)\n", pc, offset*2,mem_mask); - return space.machine().rand(); + assert(m68340SIM); + //m68340_sim &sim = *m68340SIM; - case m68340SIM_SYNCR: - logerror("%08x m68340_internal_sim_r %04x, (%04x) (SYNCR - Clock Synthesizer Register)\n", pc, offset*2,mem_mask); - return space.machine().rand(); + int pc = space.device().safe_pc(); - case m68340SIM_AVR_RSR: - logerror("%08x m68340_internal_sim_r %04x, (%04x) (AVR, RSR - Auto Vector Register, Reset Status Register)\n", pc, offset*2,mem_mask); - return space.machine().rand(); + switch (offset<<1) + { + case m68340SIM_MCR: + logerror("%08x m68340_internal_sim_r %04x, (%04x) (MCR - Module Configuration Register)\n", pc, offset*2,mem_mask); + return space.machine().rand(); - case m68340SIM_SWIV_SYPCR: - logerror("%08x m68340_internal_sim_r %04x, (%04x) (SWIV_SYPCR - Software Interrupt Vector, System Protection Control Register)\n", pc, offset*2,mem_mask); - return space.machine().rand(); + case m68340SIM_SYNCR: + logerror("%08x m68340_internal_sim_r %04x, (%04x) (SYNCR - Clock Synthesizer Register)\n", pc, offset*2,mem_mask); + return space.machine().rand(); - case m68340SIM_PICR: - logerror("%08x m68340_internal_sim_r %04x, (%04x) (PICR - Periodic Interrupt Control Register)\n", pc, offset*2,mem_mask); - return space.machine().rand(); + case m68340SIM_AVR_RSR: + logerror("%08x m68340_internal_sim_r %04x, (%04x) (AVR, RSR - Auto Vector Register, Reset Status Register)\n", pc, offset*2,mem_mask); + return space.machine().rand(); - case m68340SIM_PITR: - logerror("%08x m68340_internal_sim_r %04x, (%04x) (PITR - Periodic Interrupt Timer Register)\n", pc, offset*2,mem_mask); - return space.machine().rand(); + case m68340SIM_SWIV_SYPCR: + logerror("%08x m68340_internal_sim_r %04x, (%04x) (SWIV_SYPCR - Software Interrupt Vector, System Protection Control Register)\n", pc, offset*2,mem_mask); + return space.machine().rand(); - case m68340SIM_SWSR: - logerror("%08x m68340_internal_sim_r %04x, (%04x) (SWSR - Software Service)\n", pc, offset*2,mem_mask); - return space.machine().rand(); + case m68340SIM_PICR: + logerror("%08x m68340_internal_sim_r %04x, (%04x) (PICR - Periodic Interrupt Control Register)\n", pc, offset*2,mem_mask); + return space.machine().rand(); - default: - logerror("%08x m68340_internal_sim_r %04x, (%04x)\n", pc, offset*2,mem_mask); + case m68340SIM_PITR: + logerror("%08x m68340_internal_sim_r %04x, (%04x) (PITR - Periodic Interrupt Timer Register)\n", pc, offset*2,mem_mask); + return space.machine().rand(); + case m68340SIM_SWSR: + logerror("%08x m68340_internal_sim_r %04x, (%04x) (SWSR - Software Service)\n", pc, offset*2,mem_mask); + return space.machine().rand(); - } + default: + logerror("%08x m68340_internal_sim_r %04x, (%04x)\n", pc, offset*2,mem_mask); } return 0x0000; } -READ8_MEMBER( m68340cpu_device::m68340_internal_sim_ports_r ) +READ8_MEMBER( m68340_cpu_device::m68340_internal_sim_ports_r ) { offset += 0x10; - m68340cpu_device *m68k = this; - m68340_sim* sim = m68k->m68340SIM; - assert(sim != nullptr); + assert(m68340SIM); + //m68340_sim &sim = *m68340SIM; - if (sim) - { - int pc = space.device().safe_pc(); + int pc = space.device().safe_pc(); - switch (offset) - { - case m68340SIM_PORTA: - logerror("%08x m68340_internal_sim_r %04x (PORTA - Port A Data)\n", pc, offset); - return space.machine().rand(); - - case m68340SIM_DDRA: - logerror("%08x m68340_internal_sim_r %04x (DDRA - Port A Data Direction)\n", pc, offset); - return space.machine().rand(); + switch (offset) + { + case m68340SIM_PORTA: + logerror("%08x m68340_internal_sim_r %04x (PORTA - Port A Data)\n", pc, offset); + return space.machine().rand(); - case m68340SIM_PPRA1: - logerror("%08x m68340_internal_sim_r %04x (PPRA1 - Port A Pin Assignment 1)\n", pc, offset); - return space.machine().rand(); + case m68340SIM_DDRA: + logerror("%08x m68340_internal_sim_r %04x (DDRA - Port A Data Direction)\n", pc, offset); + return space.machine().rand(); - case m68340SIM_PPRA2: - logerror("%08x m68340_internal_sim_r %04x (PPRA2 - Port A Pin Assignment 2)\n", pc, offset); - return space.machine().rand(); + case m68340SIM_PPRA1: + logerror("%08x m68340_internal_sim_r %04x (PPRA1 - Port A Pin Assignment 1)\n", pc, offset); + return space.machine().rand(); - case m68340SIM_PORTB: - logerror("%08x m68340_internal_sim_r %04x (PORTB - Port B Data 0)\n", pc, offset); - return space.machine().rand(); + case m68340SIM_PPRA2: + logerror("%08x m68340_internal_sim_r %04x (PPRA2 - Port A Pin Assignment 2)\n", pc, offset); + return space.machine().rand(); - case m68340SIM_PORTB1: - logerror("%08x m68340_internal_sim_r %04x (PORTB1 - Port B Data 1)\n", pc, offset); - return space.machine().rand(); + case m68340SIM_PORTB: + logerror("%08x m68340_internal_sim_r %04x (PORTB - Port B Data 0)\n", pc, offset); + return space.machine().rand(); - case m68340SIM_DDRB: - logerror("%08x m68340_internal_sim_r %04x (DDR - Port B Data Direction)\n", pc, offset); - return space.machine().rand(); + case m68340SIM_PORTB1: + logerror("%08x m68340_internal_sim_r %04x (PORTB1 - Port B Data 1)\n", pc, offset); + return space.machine().rand(); - case m68340SIM_PPARB: - logerror("%08x m68340_internal_sim_r %04x (PPARB - Port B Pin Assignment)\n", pc, offset); - return space.machine().rand(); + case m68340SIM_DDRB: + logerror("%08x m68340_internal_sim_r %04x (DDR - Port B Data Direction)\n", pc, offset); + return space.machine().rand(); - default: - logerror("%08x m68340_internal_sim_r %04x (ILLEGAL?)\n", pc, offset); - return space.machine().rand(); + case m68340SIM_PPARB: + logerror("%08x m68340_internal_sim_r %04x (PPARB - Port B Pin Assignment)\n", pc, offset); + return space.machine().rand(); - } + default: + logerror("%08x m68340_internal_sim_r %04x (ILLEGAL?)\n", pc, offset); + return space.machine().rand(); } - - return 0x00; } -READ32_MEMBER( m68340cpu_device::m68340_internal_sim_cs_r ) +READ32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_r ) { offset += m68340SIM_AM_CS0>>2; - m68340cpu_device *m68k = this; - m68340_sim* sim = m68k->m68340SIM; - assert(sim != nullptr); + assert(m68340SIM); + m68340_sim &sim = *m68340SIM; - if (sim) - { - int pc = space.device().safe_pc(); - - switch (offset<<2) - { - case m68340SIM_AM_CS0: return sim->m_am[0]; - case m68340SIM_BA_CS0: return sim->m_ba[0]; - case m68340SIM_AM_CS1: return sim->m_am[1]; - case m68340SIM_BA_CS1: return sim->m_ba[1]; - case m68340SIM_AM_CS2: return sim->m_am[2]; - case m68340SIM_BA_CS2: return sim->m_ba[2]; - case m68340SIM_AM_CS3: return sim->m_am[3]; - case m68340SIM_BA_CS3: return sim->m_ba[3]; - - default: - logerror("%08x m68340_internal_sim_r %08x, (%08x)\n", pc, offset*4,mem_mask); + int pc = space.device().safe_pc(); - } + switch (offset<<2) + { + case m68340SIM_AM_CS0: return sim.m_am[0]; + case m68340SIM_BA_CS0: return sim.m_ba[0]; + case m68340SIM_AM_CS1: return sim.m_am[1]; + case m68340SIM_BA_CS1: return sim.m_ba[1]; + case m68340SIM_AM_CS2: return sim.m_am[2]; + case m68340SIM_BA_CS2: return sim.m_ba[2]; + case m68340SIM_AM_CS3: return sim.m_am[3]; + case m68340SIM_BA_CS3: return sim.m_ba[3]; + + default: + logerror("%08x m68340_internal_sim_r %08x, (%08x)\n", pc, offset*4,mem_mask); } return 0x00000000; } -WRITE16_MEMBER( m68340cpu_device::m68340_internal_sim_w ) +WRITE16_MEMBER( m68340_cpu_device::m68340_internal_sim_w ) { - m68340cpu_device *m68k = this; - m68340_sim* sim = m68k->m68340SIM; - assert(sim != nullptr); + assert(m68340SIM); + //m68340_sim &sim = *m68340SIM; - if (sim) - { - int pc = space.device().safe_pc(); + int pc = space.device().safe_pc(); - switch (offset<<1) - { - case m68340SIM_MCR: - logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (MCR - Module Configuration Register)\n", pc, offset*2,data,mem_mask); - break; + switch (offset<<1) + { + case m68340SIM_MCR: + logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (MCR - Module Configuration Register)\n", pc, offset*2,data,mem_mask); + break; - case m68340SIM_SYNCR: - logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (SYNCR - Clock Synthesizer Register)\n", pc, offset*2,data,mem_mask); - break; + case m68340SIM_SYNCR: + logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (SYNCR - Clock Synthesizer Register)\n", pc, offset*2,data,mem_mask); + break; - case m68340SIM_AVR_RSR: - logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (AVR, RSR - Auto Vector Register, Reset Status Register)\n", pc, offset*2,data,mem_mask); - COMBINE_DATA(&m_avr); - break; + case m68340SIM_AVR_RSR: + logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (AVR, RSR - Auto Vector Register, Reset Status Register)\n", pc, offset*2,data,mem_mask); + COMBINE_DATA(&m_avr); + break; - case m68340SIM_SWIV_SYPCR: - logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (SWIV_SYPCR - Software Interrupt Vector, System Protection Control Register)\n", pc, offset*2,data,mem_mask); - break; + case m68340SIM_SWIV_SYPCR: + logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (SWIV_SYPCR - Software Interrupt Vector, System Protection Control Register)\n", pc, offset*2,data,mem_mask); + break; - case m68340SIM_PICR: - logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (PICR - Periodic Interrupt Control Register)\n", pc, offset*2,data,mem_mask); - COMBINE_DATA(&m_picr); - break; + case m68340SIM_PICR: + logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (PICR - Periodic Interrupt Control Register)\n", pc, offset*2,data,mem_mask); + COMBINE_DATA(&m_picr); + break; - case m68340SIM_PITR: - logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (PITR - Periodic Interrupt Timer Register)\n", pc, offset*2,data,mem_mask); - COMBINE_DATA(&m_pitr); - if (m_pitr !=0 ) // hack - { - //logerror("timer set\n"); - m_irq_timer->adjust(cycles_to_attotime(20000)); // hack - } + case m68340SIM_PITR: + logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (PITR - Periodic Interrupt Timer Register)\n", pc, offset*2,data,mem_mask); + COMBINE_DATA(&m_pitr); + if (m_pitr !=0 ) // hack + { + //logerror("timer set\n"); + m_irq_timer->adjust(cycles_to_attotime(20000)); // hack + } - break; + break; - case m68340SIM_SWSR: - // basically watchdog, you must write an alternating pattern of 0x55 / 0xaa to keep the watchdog from resetting the system - //logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (SWSR - Software Service)\n", pc, offset*2,data,mem_mask); - break; + case m68340SIM_SWSR: + // basically watchdog, you must write an alternating pattern of 0x55 / 0xaa to keep the watchdog from resetting the system + //logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (SWSR - Software Service)\n", pc, offset*2,data,mem_mask); + break; - default: - logerror("%08x m68340_internal_sim_w %04x, %04x (%04x)\n", pc, offset*2,data,mem_mask); + default: + logerror("%08x m68340_internal_sim_w %04x, %04x (%04x)\n", pc, offset*2,data,mem_mask); - } } } -WRITE8_MEMBER( m68340cpu_device::m68340_internal_sim_ports_w ) +WRITE8_MEMBER( m68340_cpu_device::m68340_internal_sim_ports_w ) { offset += 0x10; - m68340cpu_device *m68k = this; - m68340_sim* sim = m68k->m68340SIM; - assert(sim != nullptr); - - if (sim) - { - int pc = space.device().safe_pc(); + assert(m68340SIM); + //m68340_sim &sim = *m68340SIM; - switch (offset) - { - case m68340SIM_PORTA: - logerror("%08x m68340_internal_sim_w %04x, %02x (PORTA - Port A Data)\n", pc, offset,data); - break; + int pc = space.device().safe_pc(); - case m68340SIM_DDRA: - logerror("%08x m68340_internal_sim_w %04x, %02x (DDRA - Port A Data Direction)\n", pc, offset,data); - break; + switch (offset) + { + case m68340SIM_PORTA: + logerror("%08x m68340_internal_sim_w %04x, %02x (PORTA - Port A Data)\n", pc, offset,data); + break; - case m68340SIM_PPRA1: - logerror("%08x m68340_internal_sim_w %04x, %02x (PPRA1 - Port A Pin Assignment 1)\n", pc, offset,data); - break; + case m68340SIM_DDRA: + logerror("%08x m68340_internal_sim_w %04x, %02x (DDRA - Port A Data Direction)\n", pc, offset,data); + break; - case m68340SIM_PPRA2: - logerror("%08x m68340_internal_sim_w %04x, %02x (PPRA2 - Port A Pin Assignment 2)\n", pc, offset,data); - break; + case m68340SIM_PPRA1: + logerror("%08x m68340_internal_sim_w %04x, %02x (PPRA1 - Port A Pin Assignment 1)\n", pc, offset,data); + break; - case m68340SIM_PORTB: - logerror("%08x m68340_internal_sim_w %04x, %02x (PORTB - Port B Data)\n", pc, offset,data); - break; + case m68340SIM_PPRA2: + logerror("%08x m68340_internal_sim_w %04x, %02x (PPRA2 - Port A Pin Assignment 2)\n", pc, offset,data); + break; - case m68340SIM_PORTB1: - logerror("%08x m68340_internal_sim_w %04x, %02x (PORTB1 - Port B Data - mirror)\n", pc, offset,data); - break; + case m68340SIM_PORTB: + logerror("%08x m68340_internal_sim_w %04x, %02x (PORTB - Port B Data)\n", pc, offset,data); + break; - case m68340SIM_DDRB: - logerror("%08x m68340_internal_sim_w %04x, %02x (DDR - Port B Data Direction)\n", pc, offset,data); - break; + case m68340SIM_PORTB1: + logerror("%08x m68340_internal_sim_w %04x, %02x (PORTB1 - Port B Data - mirror)\n", pc, offset,data); + break; - case m68340SIM_PPARB: - logerror("%08x m68340_internal_sim_w %04x, %02x (PPARB - Port B Pin Assignment)\n", pc, offset,data); - break; + case m68340SIM_DDRB: + logerror("%08x m68340_internal_sim_w %04x, %02x (DDR - Port B Data Direction)\n", pc, offset,data); + break; - default: - logerror("%08x m68340_internal_sim_w %04x, %02x (ILLEGAL?)\n", pc, offset,data); - break; + case m68340SIM_PPARB: + logerror("%08x m68340_internal_sim_w %04x, %02x (PPARB - Port B Pin Assignment)\n", pc, offset,data); + break; - } + default: + logerror("%08x m68340_internal_sim_w %04x, %02x (ILLEGAL?)\n", pc, offset,data); + break; } } -WRITE32_MEMBER( m68340cpu_device::m68340_internal_sim_cs_w ) +WRITE32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_w ) { offset += m68340SIM_AM_CS0>>2; - m68340cpu_device *m68k = this; - m68340_sim* sim = m68k->m68340SIM; - assert(sim != nullptr); - - if (sim) - { - int pc = space.device().safe_pc(); + assert(m68340SIM); + m68340_sim &sim = *m68340SIM; - switch (offset<<2) - { - case m68340SIM_AM_CS0: - COMBINE_DATA(&sim->m_am[0]); - break; + int pc = space.device().safe_pc(); - case m68340SIM_BA_CS0: - COMBINE_DATA(&sim->m_ba[0]); - break; + switch (offset<<2) + { + case m68340SIM_AM_CS0: + COMBINE_DATA(&sim.m_am[0]); + break; - case m68340SIM_AM_CS1: - COMBINE_DATA(&sim->m_am[1]); - break; + case m68340SIM_BA_CS0: + COMBINE_DATA(&sim.m_ba[0]); + break; - case m68340SIM_BA_CS1: - COMBINE_DATA(&sim->m_ba[1]); - break; + case m68340SIM_AM_CS1: + COMBINE_DATA(&sim.m_am[1]); + break; - case m68340SIM_AM_CS2: - COMBINE_DATA(&sim->m_am[2]); - break; + case m68340SIM_BA_CS1: + COMBINE_DATA(&sim.m_ba[1]); + break; - case m68340SIM_BA_CS2: - COMBINE_DATA(&sim->m_ba[2]); - break; + case m68340SIM_AM_CS2: + COMBINE_DATA(&sim.m_am[2]); + break; - case m68340SIM_AM_CS3: - COMBINE_DATA(&sim->m_am[3]); - break; + case m68340SIM_BA_CS2: + COMBINE_DATA(&sim.m_ba[2]); + break; - case m68340SIM_BA_CS3: - COMBINE_DATA(&sim->m_ba[3]); - break; + case m68340SIM_AM_CS3: + COMBINE_DATA(&sim.m_am[3]); + break; - default: - logerror("%08x m68340_internal_sim_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask); - break; + case m68340SIM_BA_CS3: + COMBINE_DATA(&sim.m_ba[3]); + break; - } + default: + logerror("%08x m68340_internal_sim_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask); + break; } - } -void m68340cpu_device::do_timer_irq(void) +void m68340_cpu_device::do_timer_irq() { //logerror("do_timer_irq\n"); int timer_irq_level = (m_picr & 0x0700)>>8; @@ -333,17 +342,17 @@ void m68340cpu_device::do_timer_irq(void) } } -TIMER_CALLBACK_MEMBER(m68340cpu_device::periodic_interrupt_timer_callback) +TIMER_CALLBACK_MEMBER(m68340_cpu_device::periodic_interrupt_timer_callback) { do_timer_irq(); m_irq_timer->adjust(cycles_to_attotime(20000)); // hack } -void m68340cpu_device::start_68340_sim(void) +void m68340_cpu_device::start_68340_sim() { - m_irq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(m68340cpu_device::periodic_interrupt_timer_callback),this)); + m_irq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(m68340_cpu_device::periodic_interrupt_timer_callback),this)); } -void m68340_sim::reset(void) +void m68340_sim::reset() { } |
