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author hap <happppp@users.noreply.github.com>2022-08-06 00:08:56 +0200
committer hap <happppp@users.noreply.github.com>2022-08-06 00:08:56 +0200
commited04c5d88cde3f9d5c41006c2cfdfafeee1253d9 (patch)
tree3ba421e55aba3080c6b9485122fdbf83880bfae8 /src/devices/cpu/tms1000/tms1k_base.cpp
parent9399b0f4c530c4503d941dfb9c107e4a1197141c (diff)
tms1000: move common memory maps to base file
Diffstat (limited to 'src/devices/cpu/tms1000/tms1k_base.cpp')
-rw-r--r--src/devices/cpu/tms1000/tms1k_base.cpp82
1 files changed, 59 insertions, 23 deletions
diff --git a/src/devices/cpu/tms1000/tms1k_base.cpp b/src/devices/cpu/tms1000/tms1k_base.cpp
index 87989cfae74..ab3e851e7ad 100644
--- a/src/devices/cpu/tms1000/tms1k_base.cpp
+++ b/src/devices/cpu/tms1000/tms1k_base.cpp
@@ -71,29 +71,29 @@ unknown cycle: CME, SSE, SSS
#include "emu.h"
#include "tms1k_base.h"
-tms1k_base_device::tms1k_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 o_pins, u8 r_pins, u8 pc_bits, u8 byte_bits, u8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data)
- : cpu_device(mconfig, type, tag, owner, clock)
- , m_program_config("program", ENDIANNESS_BIG, byte_bits > 8 ? 16 : 8, prgwidth, byte_bits > 8 ? -1 : 0, program)
- , m_data_config("data", ENDIANNESS_BIG, 8, datawidth, 0, data)
- , m_mpla(*this, "mpla")
- , m_ipla(*this, "ipla")
- , m_opla(*this, "opla")
- , m_opla_b(*this, "opla_b")
- , m_spla(*this, "spla")
- , m_o_pins(o_pins)
- , m_r_pins(r_pins)
- , m_pc_bits(pc_bits)
- , m_byte_bits(byte_bits)
- , m_x_bits(x_bits)
- , m_output_pla_table(nullptr)
- , m_read_k(*this)
- , m_write_o(*this)
- , m_write_r(*this)
- , m_power_off(*this)
- , m_read_ctl(*this)
- , m_write_ctl(*this)
- , m_write_pdc(*this)
- , m_decode_micro(*this)
+tms1k_base_device::tms1k_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 o_pins, u8 r_pins, u8 pc_bits, u8 byte_bits, u8 x_bits, int rom_width, address_map_constructor rom_map, int ram_width, address_map_constructor ram_map) :
+ cpu_device(mconfig, type, tag, owner, clock),
+ m_program_config("program", ENDIANNESS_BIG, byte_bits > 8 ? 16 : 8, rom_width, byte_bits > 8 ? -1 : 0, rom_map),
+ m_data_config("data", ENDIANNESS_BIG, 8, ram_width, 0, ram_map),
+ m_mpla(*this, "mpla"),
+ m_ipla(*this, "ipla"),
+ m_opla(*this, "opla"),
+ m_opla_b(*this, "opla_b"),
+ m_spla(*this, "spla"),
+ m_o_pins(o_pins),
+ m_r_pins(r_pins),
+ m_pc_bits(pc_bits),
+ m_byte_bits(byte_bits),
+ m_x_bits(x_bits),
+ m_output_pla_table(nullptr),
+ m_read_k(*this),
+ m_write_o(*this),
+ m_write_r(*this),
+ m_power_off(*this),
+ m_read_ctl(*this),
+ m_write_ctl(*this),
+ m_write_pdc(*this),
+ m_decode_micro(*this)
{ }
// disasm
@@ -278,6 +278,42 @@ void tms1k_base_device::device_reset()
//-------------------------------------------------
+// common internal memory maps
+//-------------------------------------------------
+
+void tms1k_base_device::rom_10bit(address_map &map)
+{
+ map(0x000, 0x3ff).rom();
+}
+
+void tms1k_base_device::rom_11bit(address_map &map)
+{
+ map(0x000, 0x7ff).rom();
+}
+
+void tms1k_base_device::rom_12bit(address_map &map)
+{
+ map(0x000, 0xfff).rom();
+}
+
+void tms1k_base_device::ram_6bit(address_map &map)
+{
+ map(0x00, 0x3f).ram();
+}
+
+void tms1k_base_device::ram_7bit(address_map &map)
+{
+ map(0x00, 0x7f).ram();
+}
+
+void tms1k_base_device::ram_8bit(address_map &map)
+{
+ map(0x00, 0xff).ram();
+}
+
+
+
+//-------------------------------------------------
// program counter/opcode decode
//-------------------------------------------------