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author Olivier Galibert <galibert@pobox.com>2022-06-16 12:47:52 +0200
committer Olivier Galibert <galibert@pobox.com>2025-04-29 23:06:41 +0200
commit45d4cd52a8194f2ef9e0383cfb2e2a35634af6ff (patch)
tree4e8d8fcb7382a5e9e0bce5ec59939bcfbe67155a /src/devices/cpu/mips/mips1.h
parent5c14bcdfcb4aefb71b5b62387c4ad05dbeb3814e (diff)
full xtal conversionxtal
Diffstat (limited to 'src/devices/cpu/mips/mips1.h')
-rw-r--r--src/devices/cpu/mips/mips1.h26
1 files changed, 13 insertions, 13 deletions
diff --git a/src/devices/cpu/mips/mips1.h b/src/devices/cpu/mips/mips1.h
index df6b1c8e6c9..bdf5c67f51d 100644
--- a/src/devices/cpu/mips/mips1.h
+++ b/src/devices/cpu/mips/mips1.h
@@ -17,7 +17,7 @@ public:
void berr_w(int state) { m_bus_error = bool(state); }
protected:
- mips1core_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock, u32 cpurev, size_t icache_size, size_t dcache_size);
+ mips1core_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, const XTAL &clock, u32 cpurev, size_t icache_size, size_t dcache_size);
enum registers : unsigned
{
@@ -261,7 +261,7 @@ public:
void set_fpu(u32 revision, unsigned interrupt = 3) { m_fcr0 = revision; m_fpu_irq = interrupt; }
protected:
- mips1_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock, u32 cpurev, size_t icache_size, size_t dcache_size);
+ mips1_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, const XTAL &clock, u32 cpurev, size_t icache_size, size_t dcache_size);
enum cp1_fcr31_mask : u32
{
@@ -324,31 +324,31 @@ private:
class r2000_device : public mips1_device_base
{
public:
- r2000_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, size_t icache_size = 0, size_t dcache_size = 0);
+ r2000_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock, size_t icache_size = 0, size_t dcache_size = 0);
};
class r2000a_device : public mips1_device_base
{
public:
- r2000a_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, size_t icache_size = 0, size_t dcache_size = 0);
+ r2000a_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock, size_t icache_size = 0, size_t dcache_size = 0);
};
class r3000_device : public mips1_device_base
{
public:
- r3000_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, size_t icache_size = 0, size_t dcache_size = 0);
+ r3000_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock, size_t icache_size = 0, size_t dcache_size = 0);
};
class r3000a_device : public mips1_device_base
{
public:
- r3000a_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, size_t icache_size = 0, size_t dcache_size = 0);
+ r3000a_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock, size_t icache_size = 0, size_t dcache_size = 0);
};
class r3041_device : public mips1core_device_base
{
public:
- r3041_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
+ r3041_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock);
protected:
virtual void device_start() override;
@@ -358,37 +358,37 @@ protected:
class r3051_device : public mips1core_device_base
{
public:
- r3051_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
+ r3051_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock);
};
class r3052_device : public mips1core_device_base
{
public:
- r3052_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
+ r3052_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock);
};
class r3052e_device : public mips1_device_base
{
public:
- r3052e_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
+ r3052e_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock);
};
class r3071_device : public mips1_device_base
{
public:
- r3071_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, size_t icache_size = 16384, size_t dcache_size = 4096);
+ r3071_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock, size_t icache_size = 16384, size_t dcache_size = 4096);
};
class r3081_device : public mips1_device_base
{
public:
- r3081_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, size_t icache_size = 16384, size_t dcache_size = 4096);
+ r3081_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock, size_t icache_size = 16384, size_t dcache_size = 4096);
};
class iop_device : public mips1core_device_base
{
public:
- iop_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
+ iop_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock);
};
DECLARE_DEVICE_TYPE(R2000, r2000_device)