diff options
author | 2020-05-25 16:42:42 +0200 | |
---|---|---|
committer | 2020-05-25 16:42:57 +0200 | |
commit | 22513fb6fe281f5ccb75aaddb6417a12a66c313d (patch) | |
tree | 3cf84032cc6482d685a8dbb57e015bd17c7f7fdc /src/devices/cpu/mcs40/mcs40.cpp | |
parent | e42c2d2874cf9c1092c01ab5ce9ef997d465ce25 (diff) |
emumem: A little more speedup. cache and specific change syntax, and are not pointers anymore [O. Galibert]
The last(?) two changes are:
- Add a template parameter to everything (theoretically the address
space width, in practice a level derived from it to keep as much
compatibility between widths as possible) so that the shift size
becomes a constant.
- Change the syntax of declaring and initializing the caches and
specifics so that they're embedded in the owner device. Solves
lifetime issues and also removes one indirection (looking up the base
dispatch pointer through the cache/specific pointer).
Diffstat (limited to 'src/devices/cpu/mcs40/mcs40.cpp')
-rw-r--r-- | src/devices/cpu/mcs40/mcs40.cpp | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/devices/cpu/mcs40/mcs40.cpp b/src/devices/cpu/mcs40/mcs40.cpp index e973d1ab549..969f08c4197 100644 --- a/src/devices/cpu/mcs40/mcs40.cpp +++ b/src/devices/cpu/mcs40/mcs40.cpp @@ -102,7 +102,6 @@ mcs40_cpu_device_base::mcs40_cpu_device_base( { "ramport", ENDIANNESS_LITTLE, 8, u8(5), 0 }, { "program", ENDIANNESS_LITTLE, 8, u8(rom_width - 3), 0 }, } , m_spaces{ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr } - , m_cache(nullptr) , m_bus_cycle_cb(*this) , m_sync_cb(*this) , m_cm_rom_cb(*this) @@ -142,7 +141,7 @@ void mcs40_cpu_device_base::device_start() m_spaces[AS_RAM_STATUS] = &space(AS_RAM_STATUS); m_spaces[AS_RAM_PORTS] = &space(AS_RAM_PORTS); m_spaces[AS_PROGRAM_MEMORY] = &space(AS_PROGRAM_MEMORY); - m_cache = m_spaces[AS_ROM]->cache<0, 0, ENDIANNESS_LITTLE>(); + m_spaces[AS_ROM]->cache(m_cache); m_bus_cycle_cb.resolve(); m_sync_cb.resolve_safe(); @@ -633,7 +632,7 @@ inline void mcs40_cpu_device_base::do_m1() update_cm_rom(0x0fU); } // TODO: just read the high nybble here - MAME doesn't support this - u8 const read = m_cache->read_byte(rom_bank() | m_rom_addr); + u8 const read = m_cache.read_byte(rom_bank() | m_rom_addr); if (cycle::OP == m_cycle) { m_opr = (m_stop_ff) ? 0x0U : (read >> 4); @@ -651,7 +650,7 @@ inline void mcs40_cpu_device_base::do_m1() inline void mcs40_cpu_device_base::do_m2() { // TODO: just read the low nybble here - MAME doesn't support this - u8 const read = m_cache->read_byte(rom_bank() | m_rom_addr); + u8 const read = m_cache.read_byte(rom_bank() | m_rom_addr); if (cycle::OP == m_cycle) m_opa = (m_stop_ff) ? 0x0U : (read & 0x0fU); else |