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author AJR <ajrhacker@users.noreply.github.com>2022-02-08 07:55:41 -0500
committer AJR <ajrhacker@users.noreply.github.com>2022-02-08 08:01:55 -0500
commit668bc119b89501677deba425bf4972cd5667ae8a (patch)
tree906c93877d2a3d85138ae08c9593240b0addf366 /src/devices/cpu/arm/arm.cpp
parent84147ca7ab013c0c11c634080ee77d888a094206 (diff)
arm: Disassembly improvements
- Correct mnemonic suffixes for LDM and STM - Correctly distinguish between pre-indexed and post-indexed modes of LDR and STR - Use shorter syntax for R15-relative LDR or STR - Disassemble R15-relative ADD and SUB as ADR - Identify RRX shift type - Identify P modes of test instructions - Change hexadecimal prefix to & - Make ! and ^ suffixes for operands, not mnemonics - Many minor syntax corrections - Fix PC display for watchpoint hit message
Diffstat (limited to 'src/devices/cpu/arm/arm.cpp')
-rw-r--r--src/devices/cpu/arm/arm.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/devices/cpu/arm/arm.cpp b/src/devices/cpu/arm/arm.cpp
index d5f577a390f..55a516f381d 100644
--- a/src/devices/cpu/arm/arm.cpp
+++ b/src/devices/cpu/arm/arm.cpp
@@ -542,8 +542,8 @@ void arm_cpu_device::device_start()
state_add( ARM32_SR13, "SR13", m_sArmRegister[eR13_SVC] ).formatstr("%08X");
state_add( ARM32_SR14, "SR14", m_sArmRegister[eR14_SVC] ).formatstr("%08X");
- state_add(STATE_GENPC, "GENPC", m_sArmRegister[15]).mask(ADDRESS_MASK).formatstr("%8s").noshow();
- state_add(STATE_GENPCBASE, "CURPC", m_sArmRegister[15]).mask(ADDRESS_MASK).formatstr("%8s").noshow();
+ state_add(STATE_GENPC, "GENPC", m_sArmRegister[15]).mask(ADDRESS_MASK).noshow();
+ state_add(STATE_GENPCBASE, "CURPC", m_sArmRegister[15]).mask(ADDRESS_MASK).noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_sArmRegister[15]).formatstr("%11s").noshow();
set_icountptr(m_icount);