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author | 2018-08-03 00:23:32 +0100 | |
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committer | 2018-08-03 09:38:59 +1000 | |
commit | c1b84b9e30a773eefaf50a82983e89fc0ba7cebf (patch) | |
tree | bfae47d00cc8fc37c37d530b563a94441f9e2cef /scripts/src/cpu.lua | |
parent | ae110ad5e6496797f2fb4a47369705209bc046e3 (diff) |
fix silly PSW trashing on interrupts, allow Register Bank to be shown in debugger
code now gets to the 'main loop' (starts at C3E0, jumps back there once it hits C6A3) and continues to execute that loop once it arrives there.
Diffstat (limited to 'scripts/src/cpu.lua')
0 files changed, 0 insertions, 0 deletions