diff options
| author | 2021-04-20 10:06:33 -0400 | |
|---|---|---|
| committer | 2021-04-20 10:06:33 -0400 | |
| commit | cb41f89eeb00b0984c3364da2c9157400b05b676 (patch) | |
| tree | f8be8e4f1f4e84f8bf19fa8c07588a99434a46bf | |
| parent | dd55931072bad4f41eac66ea7da50619a2105a92 (diff) | |
rx01: Preliminary, untested host interface
| -rw-r--r-- | src/devices/cpu/rx01/rx01.cpp | 170 | ||||
| -rw-r--r-- | src/devices/cpu/rx01/rx01.h | 24 | ||||
| -rw-r--r-- | src/devices/cpu/rx01/rx01dasm.cpp | 2 |
3 files changed, 176 insertions, 20 deletions
diff --git a/src/devices/cpu/rx01/rx01.cpp b/src/devices/cpu/rx01/rx01.cpp index 58f90dba842..86876ef6363 100644 --- a/src/devices/cpu/rx01/rx01.cpp +++ b/src/devices/cpu/rx01/rx01.cpp @@ -39,6 +39,7 @@ rx01_cpu_device::rx01_cpu_device(const machine_config &mconfig, const char *tag, : cpu_device(mconfig, RX01_CPU, tag, owner, clock) , m_inst_config("program", ENDIANNESS_LITTLE, 8, 12, 0) , m_data_config("sector data", ENDIANNESS_LITTLE, 8, 10, 0) // actually 1 bit wide + , m_interface_callback(*this) , m_pc(0) , m_ppc(0) , m_mb(0) @@ -51,6 +52,9 @@ rx01_cpu_device::rx01_cpu_device(const machine_config &mconfig, const char *tag, , m_bar(0) , m_crc(0) , m_flags(0) + , m_run(false) + , m_12_bit(false) + , m_data_in(false) , m_unit(false) , m_load_head(false) , m_syn_index(false) @@ -73,6 +77,11 @@ device_memory_interface::space_config_vector rx01_cpu_device::memory_space_confi }; } +void rx01_cpu_device::device_resolve_objects() +{ + m_interface_callback.resolve_all_safe(); +} + void rx01_cpu_device::device_start() { space(AS_PROGRAM).cache(m_inst_cache); @@ -109,6 +118,9 @@ void rx01_cpu_device::device_start() save_item(NAME(m_bar)); save_item(NAME(m_crc)); save_item(NAME(m_flags)); + save_item(NAME(m_run)); + save_item(NAME(m_12_bit)); + save_item(NAME(m_data_in)); save_item(NAME(m_unit)); save_item(NAME(m_load_head)); save_item(NAME(m_syn_index)); @@ -128,6 +140,29 @@ void rx01_cpu_device::device_reset() m_flags = 0; m_unit = false; m_load_head = false; + + // Clear interface outputs (inactive high) + for (auto &cb : m_interface_callback) + cb(1); +} + +void rx01_cpu_device::execute_set_input(int linenum, int state) +{ + // All inputs (and outputs) are active low + switch (linenum) + { + case RX_RUN: + m_run = (state == ASSERT_LINE); + break; + + case RX_12_BIT: + m_12_bit = (state == ASSERT_LINE); + break; + + case RX_DATA: + m_data_in = (state == ASSERT_LINE); + break; + } } u8 rx01_cpu_device::mux_out() @@ -140,8 +175,17 @@ u8 rx01_cpu_device::mux_out() bool rx01_cpu_device::data_in() { - // TODO - return false; + if (m_data_in) + return true; + else if (m_flags & FF_IOB3) + { + if (m_flags & FF_IOB6) + return bool(m_data_cache.read_byte(m_bar)); + else + return BIT(m_sr, 7); + } + else + return false; } bool rx01_cpu_device::sep_data() @@ -181,8 +225,8 @@ bool rx01_cpu_device::test_condition() switch (m_mb & 074) { case 000: - // Interface transfer request or command pending (TODO) - return false; + // Interface transfer request or command pending + return m_run; case 004: // Output buffer bit 3 @@ -221,8 +265,8 @@ bool rx01_cpu_device::test_condition() return sep_clk(); case 050: - // 12-bit interface mode selected (TODO) - return false; + // 12-bit interface mode selected + return m_12_bit; case 054: // Separated data equals shift register MSB @@ -241,7 +285,7 @@ bool rx01_cpu_device::test_condition() if (m_flags & FF_WRTBUF) return sec_buf_in(); else - return m_data_cache.read_byte(m_bar) & 1; + return bool(m_data_cache.read_byte(m_bar)); case 074: // Flag state equals one @@ -327,52 +371,140 @@ void rx01_cpu_device::execute_run() else switch (m_mb & 074) { case 000: - if (BIT(m_mb, 1)) + if (BIT(m_mb, 1) && (m_flags & FF_IOB0) == 0) + { + LOG("%04o: Drive bus selected\n", m_ppc); m_flags |= FF_IOB0; - else + for (int i = 0; i < 5; i++) + if (m_flags & (FF_IOB1 << i)) + m_interface_callback[i](1); + } + else if (!BIT(m_mb, 1) && (m_flags & FF_IOB0) != 0) + { + LOG("%04o: Interface bus selected\n", m_ppc); m_flags &= ~FF_IOB0; + for (int i = 0; i < 5; i++) + if (m_flags & (FF_IOB1 << i)) + m_interface_callback[i](0); + } break; case 004: - if (BIT(m_mb, 1)) + if (BIT(m_mb, 1) && (m_flags & FF_IOB1) == 0) + { m_flags |= FF_IOB1; - else + if ((m_flags & FF_IOB0) == 0) + { + LOG("%04o: RX ERROR asserted\n", m_ppc); + m_interface_callback[0](0); + } + } + else if (!BIT(m_mb, 1) && (m_flags & FF_IOB1) != 0) + { m_flags &= ~FF_IOB1; + if ((m_flags & FF_IOB0) == 0) + { + LOG("%04o: RX ERROR cleared\n", m_ppc); + m_interface_callback[0](1); + } + } break; case 010: - if (BIT(m_mb, 1)) + if (BIT(m_mb, 1) && (m_flags & FF_IOB2) == 0) + { m_flags |= FF_IOB2; - else + if ((m_flags & FF_IOB0) == 0) + { + LOG("%04o: RX TRANSFER REQUEST asserted\n", m_ppc); + m_interface_callback[1](0); + } + } + else if (!BIT(m_mb, 1) && (m_flags & FF_IOB2) != 0) + { m_flags &= ~FF_IOB2; + if ((m_flags & FF_IOB0) == 0) + { + LOG("%04o: RX TRANSFER REQUEST cleared\n", m_ppc); + m_interface_callback[1](1); + } + } break; case 014: - if (BIT(m_mb, 1)) + if (BIT(m_mb, 1) && (m_flags & FF_IOB3) == 0) + { m_flags |= FF_IOB3; - else + if ((m_flags & FF_IOB0) == 0) + { + LOG("%04o: RX OUT mode selected\n", m_ppc); + m_interface_callback[2](0); + } + } + else if (!BIT(m_mb, 1) && (m_flags & FF_IOB3) != 0) + { m_flags &= ~FF_IOB3; + if ((m_flags & FF_IOB0) == 0) + { + LOG("%04o: RX IN mode selected\n", m_ppc); + m_interface_callback[2](1); + } + } break; case 020: - if (BIT(m_mb, 1)) + if (BIT(m_mb, 1) && (m_flags & FF_IOB4) == 0) + { m_flags |= FF_IOB4; - else + if ((m_flags & FF_IOB0) == 0) + { + LOG("%04o: RX DONE asserted\n", m_ppc); + m_interface_callback[3](0); + } + } + else if (!BIT(m_mb, 1) && (m_flags & FF_IOB4) != 0) + { m_flags &= ~FF_IOB4; + if ((m_flags & FF_IOB0) == 0) + { + LOG("%04o: RX DONE cleared\n", m_ppc); + m_interface_callback[3](1); + } + } break; case 024: - if (BIT(m_mb, 1)) + if (BIT(m_mb, 1) && (m_flags & FF_IOB5) == 0) + { m_flags |= FF_IOB5; - else + if ((m_flags & FF_IOB0) == 0) + { + LOG("%04o: RX SHIFT asserted\n", m_ppc); + m_interface_callback[4](0); + } + } + else if (!BIT(m_mb, 1) && (m_flags & FF_IOB5) != 0) + { m_flags &= ~FF_IOB5; + if ((m_flags & FF_IOB0) == 0) + { + LOG("%04o: RX SHIFT cleared\n", m_ppc); + m_interface_callback[4](1); + } + } break; case 030: if (BIT(m_mb, 1)) + { + LOG("%04o: SEC BUF selected for output\n", m_ppc); m_flags |= FF_IOB6; + } else + { + LOG("%04o: SR selected for output\n", m_ppc); m_flags &= ~FF_IOB6; + } break; case 034: diff --git a/src/devices/cpu/rx01/rx01.h b/src/devices/cpu/rx01/rx01.h index 2b990e96867..b8806c354f3 100644 --- a/src/devices/cpu/rx01/rx01.h +++ b/src/devices/cpu/rx01/rx01.h @@ -31,17 +31,35 @@ public: FF_FLAG = 1 << 8 }; + enum { + RX_RUN = 0, + RX_12_BIT, + RX_DATA + }; + // device type constructor rx01_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + // callback configuration + auto error_callback() { return m_interface_callback[0].bind(); } + auto transfer_request_callback() { return m_interface_callback[1].bind(); } + auto out_callback() { return m_interface_callback[2].bind(); } + auto done_callback() { return m_interface_callback[3].bind(); } + auto shift_callback() { return m_interface_callback[4].bind(); } + + // serial input for controller + DECLARE_READ_LINE_MEMBER(data_r) { return !data_in(); } + protected: // device-level overrides + virtual void device_resolve_objects() override; virtual void device_start() override; virtual void device_reset() override; // device_execute_interface overrides virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; } virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 4); } + virtual void execute_set_input(int linenum, int state) override; virtual void execute_run() override; // device_disasm_interface overrides @@ -73,6 +91,9 @@ private: memory_access<12, 0, 0, ENDIANNESS_LITTLE>::cache m_inst_cache; memory_access<10, 0, 0, ENDIANNESS_LITTLE>::cache m_data_cache; + // interface output callbacks + devcb_write_line::array<5> m_interface_callback; + // internal state u16 m_pc; u16 m_ppc; @@ -87,6 +108,9 @@ private: u16 m_bar; u16 m_crc; u16 m_flags; + bool m_run; + bool m_12_bit; + bool m_data_in; bool m_unit; bool m_load_head; bool m_syn_index; diff --git a/src/devices/cpu/rx01/rx01dasm.cpp b/src/devices/cpu/rx01/rx01dasm.cpp index 978d9398014..1e8d8692a66 100644 --- a/src/devices/cpu/rx01/rx01dasm.cpp +++ b/src/devices/cpu/rx01/rx01dasm.cpp @@ -60,7 +60,7 @@ offs_t rx01_disassembler::disassemble(std::ostream &stream, offs_t pc, const rx0 util::stream_format(stream, "%sBR %s ", BIT(opcode, 7) ? "W" : "", s_conditions[(opcode & 074) >> 2]); - if ((opcode & 074) == 020) + if ((opcode & 074) == 010 || (opcode & 074) == 020) stream << s_0_or_1[BIT(opcode, 1)]; else stream << (BIT(opcode, 1) ? "T" : "F"); |
