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| author | 2021-04-19 22:05:47 -0400 | |
|---|---|---|
| committer | 2021-04-19 22:05:47 -0400 | |
| commit | 782f561bf2150288f42821f1923ed0138cf2e3db (patch) | |
| tree | 6f7cacaf4f43e0d4d49c7f51d90e56f4c16fa894 | |
| parent | 0cf7fef0a194a0b63fde6d3916c786778d08d36d (diff) | |
mn1880d.cpp: Minor documentation fixes
| -rw-r--r-- | src/devices/cpu/mn1880/mn1880d.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/devices/cpu/mn1880/mn1880d.cpp b/src/devices/cpu/mn1880/mn1880d.cpp index 1064137f86a..912e1e19d80 100644 --- a/src/devices/cpu/mn1880/mn1880d.cpp +++ b/src/devices/cpu/mn1880/mn1880d.cpp @@ -47,7 +47,7 @@ mn1880_disassembler::mn1880_disassembler() { } -// MOV, RDTBL, MOV1 and MOV1N may also be known as MV, MVROM, MV1 and MV1CPL +// MOV, RDTBL, MOV1, MOV1N, ADDC and SUBC may also be known as MV, MVROM, MV1, MV1CPL, ADD and SUB const char *const mn1880_disassembler::s_inst_names[256] = { "nop", "rep", "rep", "rep", "rep", "rep", "rep", "rep", @@ -441,7 +441,7 @@ void mn1880_disassembler::dasm_operands(std::ostream &stream, u8 opcode, offs_t } else { - // 3 direct operands? (MN1880 only) + // 3 direct operands? (MN1860 only) format_direct(stream, opcodes.r8(pc + 2)); stream << ", "; format_direct(stream, opcodes.r8(pc)); |
